1. 13ac44a Eliminate psci_suspend_context array by Andrew Thoelke · 10 years ago
  2. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  3. 5298f2c Merge pull request #138 from athoelke/at/cpu-context by danh-arm · 10 years ago
  4. 92152ee Merge pull request #137 from athoelke/at/no-early-exceptions by danh-arm · 10 years ago
  5. 2e35b92 Merge pull request #136 from athoelke/at/cpu-data by danh-arm · 10 years ago
  6. c2c5ee2 Merge pull request #142 from athoelke/at/fix-console_putc by danh-arm · 10 years ago
  7. 0695dc4 Remove broken assertion in console_putc() by Andrew Thoelke · 10 years ago
  8. e869310 Merge pull request #135 from soby-mathew/sm/remove-reinit-of-timers by danh-arm · 10 years ago
  9. b1e71b2 Remove re-initialisation of system timers after warm boot for FVP by Soby Mathew · 10 years ago
  10. 5d292ab Merge pull request #134 from jcastillo-arm/jc/tf-issues/179 by danh-arm · 10 years ago
  11. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  12. aaba4f2 Move CPU context pointers into cpu_data by Andrew Thoelke · 10 years ago
  13. 5e91007 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  14. 84e9b09 Set correct value for SYS_ID_REV_SHIFT in FVP by Juan Castillo · 10 years ago
  15. dbc64b3 Merge pull request #133 from athoelke/at/crash-reporting-opt by danh-arm · 10 years ago
  16. 30e3b31 Merge pull request #131 from athoelke/at/cm_get_context by danh-arm · 10 years ago
  17. 5c633bd Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 10 years ago
  18. 3934d1a Merge pull request #128 from sandrine-bailleux/sb/make-load_image-ep-optional by danh-arm · 10 years ago
  19. 2966dc2 Merge pull request #127 from sandrine-bailleux/sb/fix-pl011-fifo-polling by achingupta · 10 years ago
  20. ca1e6b6 Merge pull request #126 from sandrine-bailleux/sb/include-missing-hfile by achingupta · 10 years ago
  21. 4c5f8dc Merge pull request #125 from sandrine-bailleux/sb/remove-bl2_el_change_mem_ptr by achingupta · 10 years ago
  22. 9c22b32 Make the BL3-1 crash reporting optional by Andrew Thoelke · 10 years ago
  23. 08ab89d Provide cm_get/set_context() for current CPU by Andrew Thoelke · 10 years ago
  24. 2b67765 Merge Pull Request #120 (patch 1) from 'linmaonly:lin_patch2' by Andrew Thoelke · 10 years ago
  25. 5c3272a Make system register functions inline assembly by Andrew Thoelke · 10 years ago
  26. 743a611 fvp: Remove unused 'bl2_el_change_mem_ptr' variable by Sandrine Bailleux · 10 years ago
  27. 63db7ba Make the entry point argument optional in load_image() by Sandrine Bailleux · 10 years ago
  28. d831af9 PL011: Fix a bug in the UART FIFO polling by Sandrine Bailleux · 10 years ago
  29. e4d1338 Include 'platform_def.h' header file in 'crash_reporting.S' by Sandrine Bailleux · 10 years ago
  30. 977fbcd Merge pull request #122 from 'danh-arm:dh/v0.4-docs' by Dan Handley · 10 years ago
  31. a96e12d Merge pull request #124 from 'danh-arm:sm/imf-documentation' by Dan Handley · 10 years ago
  32. a4fa3cb Document design of the Interrupt Mangement Framework by Achin Gupta · 10 years ago
  33. eab932b Merge pull request #119 from 'soby-mathew:sm/doc_crash_reporting' by Dan Handley · 10 years ago
  34. 7824745 Merge pull request #117 from 'danh-arm:dh/v0.4-user-guide' by Dan Handley · 10 years ago
  35. 79a9ae5 Merge pull request #121 'vikramkanigiri:vk/doc_for_133' by Dan Handley · 10 years ago
  36. e452cd8 Documentation for BL3-1 hardening and reset vector by Vikram Kanigiri · 10 years ago
  37. db2c760 Trusted Firmware v0.4 release documentation by Dan Handley · 10 years ago
  38. 5e831e6 User guide updates for v0.4 release by Dan Handley · 10 years ago
  39. f984ce8 Enable mapping higher physical address by Lin Ma · 10 years ago
  40. 87625fd Documentation for the new crash reporting implementation by Soby Mathew · 10 years ago
  41. 279afef Merge pull request #116 from 'danh-arm:dh/refactoring-docs' by Dan Handley · 10 years ago
  42. b68954c Fix porting guide references to platform.h by Dan Handley · 10 years ago
  43. e10af77 Merge pull request #111 'soby-mathew-sm:fix_cookie_to_int_handler' by Dan Handley · 10 years ago
  44. 886dfdf Merge pull request #115 'athoelke-at:fix-bl31-X1-parameter' by Dan Handley · 10 years ago
  45. bcc8d77 Merge pull request #114 from 'vikramkanigiri:vk/pass_bl33_args' by Dan Handley · 10 years ago
  46. a378108 Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · 10 years ago
  47. b460b8b Pass 'cookie' parameter to interrupt handler in BL3-1 by Soby Mathew · 10 years ago
  48. 0346267 Allow platform parameter X1 to be passed to BL3-1 by Andrew Thoelke · 10 years ago
  49. f05cb4a Pass the args to the BL3-3 entrypoint by Vikram Kanigiri · 10 years ago
  50. 05b6edf Merge pull request #110 from soby-mathew:sm/support_normal_irq_in_tsp-v4 into for-v0.4 by Dan Handley · 10 years ago
  51. 22e002d Merge pull request #112 from danh-arm:dh/refactor-plat-header-v4 into for-v0.4 by Dan Handley · 10 years ago
  52. 9865ac1 Further renames of platform porting functions by Dan Handley · 10 years ago
  53. 0ad4691 Remove FVP specific comments in platform.h by Dan Handley · 10 years ago
  54. 10b65ec Fixup Standard SMC Resume Handling by Soby Mathew · 10 years ago
  55. dff8e47 Add enable mmu platform porting interfaces by Dan Handley · 10 years ago
  56. 17a387a Rename FVP specific files and functions by Dan Handley · 10 years ago
  57. dec5e0d Move BL porting functions into platform.h by Dan Handley · 10 years ago
  58. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 10 years ago
  59. 7a9a5f2 Remove unused data declarations by Dan Handley · 10 years ago
  60. c6bc071 Remove extern keyword from function declarations by Dan Handley · 10 years ago
  61. f53d0fc Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · 10 years ago
  62. 638363e doc: Update information about the memory layout by Sandrine Bailleux · 10 years ago
  63. a37255a Make the memory layout more flexible by Sandrine Bailleux · 10 years ago
  64. 4f59d83 Make BL1 RO and RW base addresses configurable by Sandrine Bailleux · 10 years ago
  65. 8957fc7 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · 10 years ago
  66. 65335d4 Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · 10 years ago
  67. 8545a87 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 10 years ago
  68. 9253530 Merge pull request #100 from jcastillo-arm:jc/tf-issues/149-v4 by Andrew Thoelke · 10 years ago
  69. 659a670 Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · 10 years ago
  70. b3bcbcf Merge pull request #103 from athoelke:dh/tf-issues#68-v3 by Andrew Thoelke · 10 years ago
  71. db0de0e Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · 10 years ago
  72. 3ea8540 Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · 10 years ago
  73. 445fe84 Limit BL3-1 read/write access to SRAM by Andrew Thoelke · 10 years ago
  74. 399fb08 Use a vector table for TSP entrypoints by Andrew Thoelke · 10 years ago
  75. 239b04f Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · 10 years ago
  76. 1151c82 Allow BL3-2 platform definitions to be optional by Dan Handley · 10 years ago
  77. a20a81e Enable secure timer to generate S-EL1 interrupts by Achin Gupta · 10 years ago
  78. b44a443 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · 10 years ago
  79. 57356e9 Add support for asynchronous FIQ handling in TSP by Achin Gupta · 10 years ago
  80. 6cf8902 Add support for synchronous FIQ handling in TSP by Achin Gupta · 10 years ago
  81. fa9c08b Use secure timer to generate S-EL1 interrupts by Achin Gupta · 10 years ago
  82. dce74b8 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 10 years ago
  83. dcc1816 Introduce platform api to access an ARM GIC by Achin Gupta · 10 years ago
  84. e1333f7 Introduce interrupt registration framework in BL3-1 by Achin Gupta · 10 years ago
  85. c429b5e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 10 years ago
  86. 3ee8a16 Rework 'state' field usage in per-cpu TSP context by Achin Gupta · 10 years ago
  87. f860e2c Doc: Add the "Building the Test Secure Payload" section by Sandrine Bailleux · 10 years ago
  88. 53514b2 fvp: Move TSP from Secure DRAM to Secure SRAM by Sandrine Bailleux · 10 years ago
  89. 2467f70 TSP: Let the platform decide which secure memory to use by Sandrine Bailleux · 10 years ago
  90. 364daf9 Reserve some DDR DRAM for secure use on FVP platforms by Juan Castillo · 10 years ago
  91. dbad1ba Add support for BL3-1 as a reset vector by Vikram Kanigiri · 10 years ago
  92. 6871c5d Rework memory information passing to BL3-x images by Vikram Kanigiri · 10 years ago
  93. 4112bfa Populate BL31 input parameters as per new spec by Vikram Kanigiri · 10 years ago
  94. 29fb905 Rework handover interface between BL stages by Vikram Kanigiri · 10 years ago
  95. 23ff9ba Introduce macros to manipulate the SPSR by Vikram Kanigiri · 10 years ago
  96. 1a4f19e Merge pull request #91 from linmaonly/lin_dev by Andrew Thoelke · 10 years ago
  97. ba9dbd1 Merge pull request #83 from athoelke/at/tf-issues-126 by Andrew Thoelke · 10 years ago
  98. 39f6a68 Merge pull request #85 from hliebel/hl/bl30-doc by Andrew Thoelke · 10 years ago
  99. 444281c Address issue 156: 64-bit addresses get truncated by Lin Ma · 10 years ago
  100. 36eb6a7 Improve BL3-0 documentation by Harry Liebel · 10 years ago