1. 47ca01e Remove IRQ_SEC_SGI_8 constant by Sandrine Bailleux · 10 years ago
  2. 435cdcf Merge pull request #220 from soby-mathew/sm/reassign_crash_console by danh-arm · 10 years ago
  3. ce6ee93 Use the BL3-1 runtime console as the crash console. by Soby Mathew · 10 years ago
  4. 20d51ca FVP: keep shared data in Trusted SRAM by Juan Castillo · 10 years ago
  5. 7e998c4 Merge pull request #214 from soby-mathew/sm/bl_specific_mmap by achingupta · 10 years ago
  6. d0ecd97 Create BL stage specific translation tables by Soby Mathew · 10 years ago
  7. 6ab0391 Remove BSS section access by 'plat_print_gic' during crash reporting by Soby Mathew · 10 years ago
  8. 4480425 Miscellaneous documentation fixes by Sandrine Bailleux · 10 years ago
  9. 12d554f Rationalize UART usage among different BL stages by Soby Mathew · 10 years ago
  10. add4035 Add CPU specific power management operations by Soby Mathew · 10 years ago
  11. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  12. aecc084 Rework use of labels in assembly macros. by Soby Mathew · 10 years ago
  13. 7d2ccfd fvp: Rework when platform actions are performed by Achin Gupta · 10 years ago
  14. d5f1309 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 10 years ago
  15. 5a06bb7 Clarify platform porting interface to TSP by Dan Handley · 10 years ago
  16. 3279f62 Simplify interface to TZC-400 driver by Dan Handley · 10 years ago
  17. 935db69 Move IO storage source to drivers directory by Dan Handley · 10 years ago
  18. 6d16ce0 Remove redundant io_init() function by Dan Handley · 10 years ago
  19. cae3ef9 Remove platform dependency in CCI-400 driver by Dan Handley · 10 years ago
  20. f0e240d Merge pull request #184 from jcastillo-arm/jc/tf-issues/100 by danh-arm · 10 years ago
  21. 186c1d4 FVP: make usage of Trusted DRAM optional at build time by Juan Castillo · 10 years ago
  22. 6f08fd5 Merge pull request #183 from danh-arm/dh/print_output2 by danh-arm · 10 years ago
  23. 6ad2e46 Rationalize console log output by Dan Handley · 10 years ago
  24. 637ebd2 FVP: apply new naming conventions to memory regions by Juan Castillo · 10 years ago
  25. aa442d3 Reduce the runtime stack size in BL stages. by Soby Mathew · 10 years ago
  26. c1efc4c Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · 10 years ago
  27. 50e27da Rework the TSPD setup code by Vikram Kanigiri · 10 years ago
  28. 53fdceb Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 10 years ago
  29. dd2bdee Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · 10 years ago
  30. 6397bf6 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  31. d9b1128 Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · 10 years ago
  32. d3280be Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 10 years ago
  33. 8c10690 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 10 years ago
  34. 626ed51 Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  35. c67b09b Introduce crash console APIs for crash reporting by Soby Mathew · 10 years ago
  36. 462c835 Parametrize baudrate and UART clock during console_init() by Soby Mathew · 10 years ago
  37. fce5f75 Introduce asm console functions in TF by Soby Mathew · 10 years ago
  38. 539a7b3 Remove the concept of coherent stacks by Achin Gupta · 10 years ago
  39. 2d4acea Merge pull request #167 from jcastillo-arm/jc/tf-issues/217 by Dan Handley · 10 years ago
  40. afff8cb Make enablement of the MMU more flexible by Achin Gupta · 10 years ago
  41. 2b98e78 Define ARM_GIC_ARCH default value for all platforms by Sandrine Bailleux · 10 years ago
  42. 08783e4 FVP: Ensure system reset wake-up results in cold boot by Juan Castillo · 10 years ago
  43. 414cfa1 Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2 by danh-arm · 10 years ago
  44. a1b6db6 fvp: Reuse BL1 and BL2 memory through image overlaying by Sandrine Bailleux · 10 years ago
  45. 6a22315 Merge pull request #157 from sandrine-bailleux/sb/tf-issue-109 by danh-arm · 10 years ago
  46. 1e8c5c4 Refactor fvp gic code to be a generic driver by Dan Handley · 10 years ago
  47. 6f3b195 Refactor fvp_config into common platform header by Dan Handley · 10 years ago
  48. 6063379 fvp: Properly detect the location of BL1 R/W data by Sandrine Bailleux · 10 years ago
  49. 8f55dfb Remove concept of top/bottom image loading by Sandrine Bailleux · 10 years ago
  50. dac1235 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · 10 years ago
  51. 90e3147 Support later revisions of the Foundation FVP by Andrew Thoelke · 10 years ago
  52. 5e0f9bd Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · 10 years ago
  53. e73af8a Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · 10 years ago
  54. 9d302ed Merge pull request #150 from sandrine-bailleux/sb/fix-plat-print-gic-regs by danh-arm · 10 years ago
  55. 7eea135 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · 10 years ago
  56. 5e11375 Inline the mmio accessor functions by Andrew Thoelke · 10 years ago
  57. 4f2104f Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  58. 03396c4 Simplify entry point information generation code on FVP by Vikram Kanigiri · 10 years ago
  59. 9edc891 fvp: Fix register name in 'plat_print_gic_regs' macro by Sandrine Bailleux · 10 years ago
  60. 634ec6c Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · 10 years ago
  61. 41cf7bd Merge pull request #145 from athoelke/at/psci-memory-optimization-v2 by danh-arm · 10 years ago
  62. 6c0b45d Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · 10 years ago
  63. f52ec19 Merge pull request #143 from athoelke/at/remove-nsram by danh-arm · 10 years ago
  64. 15f195b Remove NSRAM from FVP memory map by Andrew Thoelke · 10 years ago
  65. e869310 Merge pull request #135 from soby-mathew/sm/remove-reinit-of-timers by danh-arm · 10 years ago
  66. b1e71b2 Remove re-initialisation of system timers after warm boot for FVP by Soby Mathew · 10 years ago
  67. 5d292ab Merge pull request #134 from jcastillo-arm/jc/tf-issues/179 by danh-arm · 10 years ago
  68. 84e9b09 Set correct value for SYS_ID_REV_SHIFT in FVP by Juan Castillo · 10 years ago
  69. 5c633bd Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 10 years ago
  70. 4c5f8dc Merge pull request #125 from sandrine-bailleux/sb/remove-bl2_el_change_mem_ptr by achingupta · 10 years ago
  71. 5c3272a Make system register functions inline assembly by Andrew Thoelke · 10 years ago
  72. 743a611 fvp: Remove unused 'bl2_el_change_mem_ptr' variable by Sandrine Bailleux · 10 years ago
  73. f984ce8 Enable mapping higher physical address by Lin Ma · 10 years ago
  74. 0346267 Allow platform parameter X1 to be passed to BL3-1 by Andrew Thoelke · 10 years ago
  75. 9865ac1 Further renames of platform porting functions by Dan Handley · 10 years ago
  76. dff8e47 Add enable mmu platform porting interfaces by Dan Handley · 10 years ago
  77. 17a387a Rename FVP specific files and functions by Dan Handley · 10 years ago
  78. dec5e0d Move BL porting functions into platform.h by Dan Handley · 10 years ago
  79. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 10 years ago
  80. 7a9a5f2 Remove unused data declarations by Dan Handley · 10 years ago
  81. c6bc071 Remove extern keyword from function declarations by Dan Handley · 10 years ago
  82. f53d0fc Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · 10 years ago
  83. a37255a Make the memory layout more flexible by Sandrine Bailleux · 10 years ago
  84. 4f59d83 Make BL1 RO and RW base addresses configurable by Sandrine Bailleux · 10 years ago
  85. 8957fc7 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · 10 years ago
  86. 8545a87 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 10 years ago
  87. 9253530 Merge pull request #100 from jcastillo-arm:jc/tf-issues/149-v4 by Andrew Thoelke · 10 years ago
  88. 445fe84 Limit BL3-1 read/write access to SRAM by Andrew Thoelke · 10 years ago
  89. 6cf8902 Add support for synchronous FIQ handling in TSP by Achin Gupta · 10 years ago
  90. dcc1816 Introduce platform api to access an ARM GIC by Achin Gupta · 10 years ago
  91. e1333f7 Introduce interrupt registration framework in BL3-1 by Achin Gupta · 10 years ago
  92. 53514b2 fvp: Move TSP from Secure DRAM to Secure SRAM by Sandrine Bailleux · 10 years ago
  93. 2467f70 TSP: Let the platform decide which secure memory to use by Sandrine Bailleux · 10 years ago
  94. 364daf9 Reserve some DDR DRAM for secure use on FVP platforms by Juan Castillo · 10 years ago
  95. dbad1ba Add support for BL3-1 as a reset vector by Vikram Kanigiri · 10 years ago
  96. 6871c5d Rework memory information passing to BL3-x images by Vikram Kanigiri · 10 years ago
  97. 4112bfa Populate BL31 input parameters as per new spec by Vikram Kanigiri · 10 years ago
  98. 29fb905 Rework handover interface between BL stages by Vikram Kanigiri · 10 years ago
  99. a43d431 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 10 years ago
  100. ef27980 Merge pull request #69 from sandrine-bailleux:sb/split-mmu-fcts-per-el by Andrew Thoelke · 10 years ago