1. 85a181c PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · 9 years ago
  2. 6748784 PSCI: Switch to the new PSCI frameworks by Soby Mathew · 9 years ago
  3. 12d0d00 PSCI: Introduce new platform and CM helper APIs by Soby Mathew · 9 years ago
  4. e347e84 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · 9 years ago
  5. bf031bb Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · 9 years ago
  6. 52010cc Rationalize reset handling code by Sandrine Bailleux · 9 years ago
  7. 5717aae Fix handling of spurious interrupts in BL3_1 by Achin Gupta · 9 years ago
  8. 8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 9 years ago
  9. 27bc010 Merge pull request #268 from vikramkanigiri/vk/move_init_cpu_ops by danh-arm · 9 years ago
  10. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  11. dad2504 Enable type-checking of arguments passed to printf() et al. by Sandrine Bailleux · 10 years ago
  12. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  13. f4f1ae7 Demonstrate model for routing IRQs to EL3 by Soby Mathew · 10 years ago
  14. ab8707e Remove coherent memory from the BL memory maps by Soby Mathew · 10 years ago
  15. 8c5fe0b Move bakery algorithm implementation out of coherent memory by Soby Mathew · 10 years ago
  16. d07baec Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 10 years ago
  17. d7fbf13 Fix LENGTH attribute value in linker scripts by Juan Castillo · 10 years ago
  18. ae213ce Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 10 years ago
  19. 14c0526 Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 10 years ago
  20. 4480425 Miscellaneous documentation fixes by Sandrine Bailleux · 10 years ago
  21. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  22. add4035 Add CPU specific power management operations by Soby Mathew · 10 years ago
  23. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  24. d5f1309 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 10 years ago
  25. a1d8044 Merge pull request #189 from achingupta/ag/tf-issues#153 by Dan Handley · 10 years ago
  26. 0c8d4fe Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · 10 years ago
  27. f0e240d Merge pull request #184 from jcastillo-arm/jc/tf-issues/100 by danh-arm · 10 years ago
  28. 6ad2e46 Rationalize console log output by Dan Handley · 10 years ago
  29. 637ebd2 FVP: apply new naming conventions to memory regions by Juan Castillo · 10 years ago
  30. c1efc4c Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · 10 years ago
  31. 319609a Merge pull request #178 from soby-mathew/sm/optmize_el3_context by danh-arm · 10 years ago
  32. faaa2e7 Support asynchronous method for BL3-2 initialization by Vikram Kanigiri · 10 years ago
  33. 53fdceb Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 10 years ago
  34. fdfabec Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 10 years ago
  35. dd2bdee Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · 10 years ago
  36. 6397bf6 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  37. 9fd4127 Merge pull request #170 from achingupta/ag/tf-issues#226 by danh-arm · 10 years ago
  38. d9b1128 Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · 10 years ago
  39. d3280be Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 10 years ago
  40. 8c10690 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 10 years ago
  41. 626ed51 Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  42. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  43. aaa3e72 Add support for printing version at runtime by Juan Castillo · 10 years ago
  44. b79af93 Implement a leaner printf for Trusted Firmware by Soby Mathew · 10 years ago
  45. b51da82 Remove coherent stack usage from the warm boot path by Achin Gupta · 10 years ago
  46. 754a2b7 Remove coherent stack usage from the cold boot path by Achin Gupta · 10 years ago
  47. a1a4417 Merge pull request #162 from jcastillo-arm/jc/tf-issues/194 by danh-arm · 10 years ago
  48. 414cfa1 Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2 by danh-arm · 10 years ago
  49. a1b6db6 fvp: Reuse BL1 and BL2 memory through image overlaying by Sandrine Bailleux · 10 years ago
  50. 0f21c54 Allow FP register context to be optional at build time by Juan Castillo · 10 years ago
  51. dac1235 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · 10 years ago
  52. 4f2104f Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  53. 03396c4 Simplify entry point information generation code on FVP by Vikram Kanigiri · 10 years ago
  54. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  55. 5298f2c Merge pull request #138 from athoelke/at/cpu-context by danh-arm · 10 years ago
  56. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  57. aaba4f2 Move CPU context pointers into cpu_data by Andrew Thoelke · 10 years ago
  58. 5e91007 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  59. dbc64b3 Merge pull request #133 from athoelke/at/crash-reporting-opt by danh-arm · 10 years ago
  60. 30e3b31 Merge pull request #131 from athoelke/at/cm_get_context by danh-arm · 10 years ago
  61. 9c22b32 Make the BL3-1 crash reporting optional by Andrew Thoelke · 10 years ago
  62. 08ab89d Provide cm_get/set_context() for current CPU by Andrew Thoelke · 10 years ago
  63. e4d1338 Include 'platform_def.h' header file in 'crash_reporting.S' by Sandrine Bailleux · 10 years ago
  64. e10af77 Merge pull request #111 'soby-mathew-sm:fix_cookie_to_int_handler' by Dan Handley · 10 years ago
  65. a378108 Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · 10 years ago
  66. b460b8b Pass 'cookie' parameter to interrupt handler in BL3-1 by Soby Mathew · 10 years ago
  67. f05cb4a Pass the args to the BL3-3 entrypoint by Vikram Kanigiri · 10 years ago
  68. 9865ac1 Further renames of platform porting functions by Dan Handley · 10 years ago
  69. dec5e0d Move BL porting functions into platform.h by Dan Handley · 10 years ago
  70. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 10 years ago
  71. f53d0fc Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · 10 years ago
  72. a37255a Make the memory layout more flexible by Sandrine Bailleux · 10 years ago
  73. 65335d4 Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · 10 years ago
  74. 8545a87 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 10 years ago
  75. db0de0e Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · 10 years ago
  76. 239b04f Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · 10 years ago
  77. dce74b8 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 10 years ago
  78. e1333f7 Introduce interrupt registration framework in BL3-1 by Achin Gupta · 10 years ago
  79. c429b5e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 10 years ago
  80. dbad1ba Add support for BL3-1 as a reset vector by Vikram Kanigiri · 10 years ago
  81. 6871c5d Rework memory information passing to BL3-x images by Vikram Kanigiri · 10 years ago
  82. 4112bfa Populate BL31 input parameters as per new spec by Vikram Kanigiri · 10 years ago
  83. 29fb905 Rework handover interface between BL stages by Vikram Kanigiri · 10 years ago
  84. ba9dbd1 Merge pull request #83 from athoelke/at/tf-issues-126 by Andrew Thoelke · 10 years ago
  85. ec786cb Merge pull request #78 from jeenuv:tf-issues-148 by Andrew Thoelke · 10 years ago
  86. 2da8d8b Add build configuration for timer save/restore by Jeenu Viswambharan · 10 years ago
  87. bb5ffdb Set SCR_EL3.RW correctly before exiting bl31_main by Andrew Thoelke · 10 years ago
  88. a43d431 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 10 years ago
  89. 401607c Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · 10 years ago
  90. 18a17e6 Merge pull request #62 from athoelke/set-little-endian-v2 by danh-arm · 10 years ago
  91. c3260f9 Preserve x19-x29 across world switch for exception handling by Soby Mathew · 10 years ago
  92. 7935d0a Access system registers directly in assembler by Andrew Thoelke · 10 years ago
  93. 8cec598 Correct usage of data and instruction barriers by Andrew Thoelke · 10 years ago
  94. 40fd072 Set processor endianness immediately after RESET by Andrew Thoelke · 10 years ago
  95. 625de1d Remove variables from .data section by Dan Handley · 10 years ago
  96. 97043ac Reduce deep nesting of header files by Dan Handley · 10 years ago
  97. fb037bf Always use named structs in header files by Dan Handley · 10 years ago
  98. bee8241 Remove vpath usage in makefiles by Dan Handley · 10 years ago
  99. 35e98e5 Make use of user/system includes more consistent by Dan Handley · 10 years ago
  100. 4ecca33 Move include and source files to logical locations by Dan Handley · 10 years ago