1. d48c0c4 Tegra: memctrl_v2: secure the on-chip TZSRAM memory by Varun Wadekar · 9 years ago
  2. b67a7c7 Tegra186: support for the latest platform port handlers by Varun Wadekar · 9 years ago
  3. b6ea86b Tegra186: implement prepare_system_reset handler by Varun Wadekar · 9 years ago
  4. 348619f Tegra186: implement CPU_OFF handler by Varun Wadekar · 9 years ago
  5. 5d74d68 Tegra186: update SYSCNT_FREQ to 31.25MHz by Varun Wadekar · 9 years ago
  6. b5ef956 Tegra186: relocate bl31.bin to the SYSRAM by Varun Wadekar · 9 years ago
  7. c7ec089 Tegra186: implement prepare_system_off handler by Varun Wadekar · 8 years ago
  8. b47d97b Tegra186: power on/off secondary CPUs by Varun Wadekar · 9 years ago
  9. bb844c1 Tegra186: SiP calls to interact with the MCE driver by Varun Wadekar · 9 years ago
  10. 7808b06 Tegra186: mce: driver for the CPU complex power manager block by Varun Wadekar · 8 years ago
  11. 3cf3183 Tegra186: platform support for Tegra "T186" SoC by Varun Wadekar · 9 years ago
  12. 412dd5c Tegra: memctrl_v2: Memory Controller Driver (v2) by Varun Wadekar · 9 years ago
  13. ea6dec5 Tegra: public interfaces to get the chip's major/minor versions by Varun Wadekar · 8 years ago
  14. 7531120 Move plat/common source file definitions to generic Makefiles by dp-arm · 8 years ago
  15. baac5dd plat/tegra: Enable Cortex-A53 erratum 855873 workaround by Andre Przywara · 8 years ago
  16. 1f38d3c Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs by Varun Wadekar · 8 years ago
  17. bc0a0be Tegra: enable SEPARATE_CODE_AND_RODATA build flag by Varun Wadekar · 8 years ago
  18. 7d72bd9 Tegra210: assert if afflvl0/1 have incorrect state-ids by Harvey Hsieh · 8 years ago
  19. 6b51766 Tegra: SiP: 64-bit address for Video Memory base by Harvey Hsieh · 8 years ago
  20. b5903df Tegra: increase ADDR_SPACE_SIZE to 35 bits by Steven Kao · 8 years ago
  21. 9b514f8 Tegra: init the console only if the platform supports it by Damon Duan · 8 years ago
  22. 8d8d8d0 Tegra210: new TZDRAM base address by Varun Wadekar · 8 years ago
  23. 2f6f720 Tegra210: set core power state during cluster power down by Varun Wadekar · 8 years ago
  24. 8539f45 Tegra: calculate proper power state for affinity levels by Varun Wadekar · 8 years ago
  25. 23cd470 Tegra: fix logic to calculate GICD_ISPENDR register address by Varun Wadekar · 8 years ago
  26. 5b5928e Tegra: uninit and re-init console across System Suspend by Varun Wadekar · 8 years ago
  27. e954ab8 Tegra: support for silicon/simulation platforms by Varun Wadekar · 8 years ago
  28. a7cd095 Tegra: per-soc `get_target_pwr_state` handler by Varun Wadekar · 8 years ago
  29. da3849e Tegra: relocate BL32 image to TZDRAM memory by Varun Wadekar · 8 years ago
  30. 8ab06d2 Tegra: get BL31 arguments from previous bootloader by Varun Wadekar · 8 years ago
  31. 4ce9a18 Tegra: return BL32 entry point info if it is valid by Varun Wadekar · 8 years ago
  32. 08012f4 Tegra: configure TZDRAM fence during early setup by Varun Wadekar · 8 years ago
  33. 207680c Tegra: restore TZRAM settings on "System Resume" by Varun Wadekar · 8 years ago
  34. 018b848 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · 8 years ago
  35. 45eab45 Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1 by Varun Wadekar · 8 years ago
  36. 78e2bd1 Tegra: implement FIQ interrupt handler by Varun Wadekar · 9 years ago
  37. d336030 Tegra: GIC: enable FIQ interrupt handling by Varun Wadekar · 9 years ago
  38. 2693f1d Tegra: implement common handler `plat_get_target_pwr_state()` by Varun Wadekar · 8 years ago
  39. 11bd24b Tegra: include platform_def.h to access UART macros by Varun Wadekar · 8 years ago
  40. 2d05f81 Tegra: allow SiP smc calls from Secure World by Wayne Lin · 8 years ago
  41. 5ea0b02 Tegra: handler for per-soc early setup by Varun Wadekar · 8 years ago
  42. 939dcf2 Tegra: relocate code to BL31_BASE during cold boot by Varun Wadekar · 8 years ago
  43. 1a9c383 Tegra: Disable A57/A53 cache non-temporal hints by Varun Wadekar · 8 years ago
  44. 26c0d9b Tegra: implement pwr_domain_pwr_down_wfi() handler by Varun Wadekar · 8 years ago
  45. 260ae46 Tegra: memmap BL31's TZDRAM carveout by Varun Wadekar · 8 years ago
  46. 49622c8 Tegra: increase BL31 image size to 256KB by Varun Wadekar · 9 years ago
  47. 102e408 Tegra: allow individual SoCs to restore their settings by Varun Wadekar · 9 years ago
  48. 9f1c5dd cpus: denver: disable DCO operations from platform code by Varun Wadekar · 9 years ago
  49. 990c1e0 Tegra: enable PSCI extended state ID processing by Varun Wadekar · 9 years ago
  50. 9f9bafa Tegra: define platform power states by Varun Wadekar · 9 years ago
  51. 06b19d5 Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM by Varun Wadekar · 9 years ago
  52. 25caa16 Tegra: enable runtime console by Varun Wadekar · 9 years ago
  53. 31a4957 Tegra: PM: soc-specific system off handler by Varun Wadekar · 9 years ago
  54. d288ab2 Tegra: handlers for common and SoC-specific SiP calls by Varun Wadekar · 9 years ago
  55. e108421 Tegra: init normal/crash console for platforms by Varun Wadekar · 9 years ago
  56. e0d4158 Tegra: add tzdram_base to plat_params_from_bl2 struct by Varun Wadekar · 9 years ago
  57. 21f1fd9 Tegra: Memory Controller Driver (v1) by Varun Wadekar · 9 years ago
  58. 08cefa9 Tegra: sanity check members of the "from_bl2" struct by Varun Wadekar · 9 years ago
  59. bde81dc Tegra: use ClusterId for calculating core position by Varun Wadekar · 9 years ago
  60. 0cd6138 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · 9 years ago
  61. 0c2a7c3 Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform by Varun Wadekar · 9 years ago
  62. f9b895a Tegra: SoC specific SiP handlers by Varun Wadekar · 9 years ago
  63. 62a6907 Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · 9 years ago
  64. 32f0d3c Replace some memset call by zeromem by Douglas Raillard · 8 years ago
  65. 308d359 Introduce unified API to zero memory by Douglas Raillard · 8 years ago
  66. 3d8256b Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  67. 4749705 Move BL_COHERENT_RAM_BASE/END defines to common_def.h by Masahiro Yamada · 8 years ago
  68. b127109 Migrate platform makefile to new console driver location by Soby Mathew · 8 years ago
  69. bb2162f Include `plat_psci_common.c` from the new location by Soby Mathew · 8 years ago
  70. f3d3b31 Implement plat_get_syscnt_freq2 on platforms by Antonio Nino Diaz · 8 years ago
  71. c073fda Move `plat_get_syscnt_freq()` to arm_common.c by Yatharth Kochar · 8 years ago
  72. 9ff67fa Dump platform-defined regs in crash reporting by Gerald Lejeune · 9 years ago
  73. 3e4b8fd Migrate platform ports to the new xlat_tables library by Soby Mathew · 8 years ago
  74. 1a3986a Merge pull request #508 from soby-mathew/sm/debug_xlat by danh-arm · 9 years ago
  75. d30ac1c Use tf_printf() for debug logs from xlat_tables.c by Soby Mathew · 9 years ago
  76. 9400b40 Disable PL011 UART before configuring it by Juan Castillo · 9 years ago
  77. ca8b7d5 Include psci.h from tegra platform header by Yatharth Kochar · 9 years ago
  78. 71cb26e Tegra: remove support for legacy platform APIs by Varun Wadekar · 9 years ago
  79. 864ab0f Tegra: flowctrl: rename tegra_fc_cpu_idle() to tegra_fc_cpu_powerdn() by Varun Wadekar · 9 years ago
  80. 3b40f99 Tegra: introduce per-soc system reset handler by Varun Wadekar · 9 years ago
  81. e361681 Tegra: Perform cache maintenance on video carveout memory by Vikram Kanigiri · 9 years ago
  82. d49b9c8 Tegra: fix logic to clear videomem regions by Varun Wadekar · 9 years ago
  83. b42192b Tegra210: wait for 512 timer ticks before retention entry by Varun Wadekar · 9 years ago
  84. 9caf7e3 Merge pull request #360 from vwadekar/tegra-platform-def-v2 by danh-arm · 9 years ago
  85. 43ec35e Tegra: fix PLATFORM_{CORE_COUNT|NUM_AFFS} macros by Varun Wadekar · 9 years ago
  86. b25f580 Tegra: memmap the actual memory available for BL31 by Varun Wadekar · 9 years ago
  87. 2ee2c4f Tegra132: set TZDRAM_BASE to 0xF5C00000 by Varun Wadekar · 9 years ago
  88. 0bf1b02 Tegra: retrieve BL32's bootargs from bl32_ep_info by Varun Wadekar · 9 years ago
  89. 42ca2d8 Tegra210: enable WRAP to INCR burst type conversions by Varun Wadekar · 9 years ago
  90. 1f95e28 Tegra: modify 'BUILD_PLAT' to point to soc specific build dirs by Varun Wadekar · 9 years ago
  91. e7d4caa Tegra: Support for Tegra's T132 platforms by Varun Wadekar · 9 years ago
  92. 93eafbc Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · 9 years ago
  93. fb11a62 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · 9 years ago
  94. 8061a97 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · 9 years ago
  95. e5b0664 Tegra210: lock PMC registers holding CPU vector addresses by Varun Wadekar · 9 years ago
  96. 764c57f Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · 9 years ago
  97. 2e7aea3 Tegra: PMC: check if a CPU is already online by Varun Wadekar · 9 years ago
  98. 03cd23a Tegra210: deassert CPU reset signals during power on by Varun Wadekar · 9 years ago
  99. 6a367fd Tegra: Fix the delay loop used during SC7 exit by Varun Wadekar · 9 years ago
  100. c896132 Tegra: introduce delay timer support by Varun Wadekar · 9 years ago