1. 1c73ffb Merge pull request #235 from soby-mathew/sm/inv_cpu_ops by danh-arm · 10 years ago
  2. 0999734 Invalidate the dcache after initializing cpu-ops by Soby Mathew · 10 years ago
  3. 36e2fd0 Prevent optimisation of sysregs accessors calls by Sandrine Bailleux · 10 years ago
  4. 235585b Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 10 years ago
  5. e73f4ef Merge pull request #219 from jcastillo-arm/jc/tf-issues/253 by danh-arm · 10 years ago
  6. eb57fa5 Improvements to ARM GIC driver by Juan Castillo · 10 years ago
  7. 7395a72 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  8. d1d92a2 Merge pull request #215 from jcastillo-arm/jc/juno_mem_6 by danh-arm · 10 years ago
  9. 740134e Juno: Reserve some DDR-DRAM for secure use by Juan Castillo · 10 years ago
  10. d07baec Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 10 years ago
  11. d0ecd97 Create BL stage specific translation tables by Soby Mathew · 10 years ago
  12. ae213ce Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 10 years ago
  13. 14c0526 Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 10 years ago
  14. 4480425 Miscellaneous documentation fixes by Sandrine Bailleux · 10 years ago
  15. 01b916b Juno: Implement initial platform port by Sandrine Bailleux · 10 years ago
  16. d9bdaf2 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  17. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  18. add4035 Add CPU specific power management operations by Soby Mathew · 10 years ago
  19. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  20. aecc084 Rework use of labels in assembly macros. by Soby Mathew · 10 years ago
  21. a4a8eae Miscellaneous PSCI code cleanups by Achin Gupta · 10 years ago
  22. 0a46e2c Add APIs to preserve highest affinity level in OFF state by Achin Gupta · 10 years ago
  23. 776b68a Add PSCI service specific per-CPU data by Achin Gupta · 10 years ago
  24. 04fafce Add macro to flush per-CPU data by Achin Gupta · 10 years ago
  25. d5f1309 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 10 years ago
  26. 5a06bb7 Clarify platform porting interface to TSP by Dan Handley · 10 years ago
  27. da0af78 Move TSP private declarations into separate header by Dan Handley · 10 years ago
  28. 3279f62 Simplify interface to TZC-400 driver by Dan Handley · 10 years ago
  29. 935db69 Move IO storage source to drivers directory by Dan Handley · 10 years ago
  30. 6d16ce0 Remove redundant io_init() function by Dan Handley · 10 years ago
  31. cae3ef9 Remove platform dependency in CCI-400 driver by Dan Handley · 10 years ago
  32. 289c28a Add concept of console output log levels by Dan Handley · 10 years ago
  33. fdfabec Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 10 years ago
  34. dd2bdee Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · 10 years ago
  35. 6397bf6 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  36. 9fd4127 Merge pull request #170 from achingupta/ag/tf-issues#226 by danh-arm · 10 years ago
  37. d9b1128 Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · 10 years ago
  38. d3280be Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 10 years ago
  39. 8c10690 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 10 years ago
  40. 626ed51 Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  41. bc92012 Implement an assert() callable from assembly code by Soby Mathew · 10 years ago
  42. c67b09b Introduce crash console APIs for crash reporting by Soby Mathew · 10 years ago
  43. 462c835 Parametrize baudrate and UART clock during console_init() by Soby Mathew · 10 years ago
  44. fce5f75 Introduce asm console functions in TF by Soby Mathew · 10 years ago
  45. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  46. aaa3e72 Add support for printing version at runtime by Juan Castillo · 10 years ago
  47. b79af93 Implement a leaner printf for Trusted Firmware by Soby Mathew · 10 years ago
  48. b51da82 Remove coherent stack usage from the warm boot path by Achin Gupta · 10 years ago
  49. afff8cb Make enablement of the MMU more flexible by Achin Gupta · 10 years ago
  50. a1a4417 Merge pull request #162 from jcastillo-arm/jc/tf-issues/194 by danh-arm · 10 years ago
  51. ab26147 Merge pull request #164 from sandrine-bailleux/sb/bl30-support-v2 by danh-arm · 10 years ago
  52. 93d81d6 Add support for BL3-0 image by Sandrine Bailleux · 10 years ago
  53. 6a22315 Merge pull request #157 from sandrine-bailleux/sb/tf-issue-109 by danh-arm · 10 years ago
  54. 3fc938b Merge pull request #146 from danh-arm/dh/refactor-fvp-gic by danh-arm · 10 years ago
  55. 0f21c54 Allow FP register context to be optional at build time by Juan Castillo · 10 years ago
  56. 1e8c5c4 Refactor fvp gic code to be a generic driver by Dan Handley · 10 years ago
  57. 6f3b195 Refactor fvp_config into common platform header by Dan Handley · 10 years ago
  58. 73ad257 Calculate TCR bits based on VA and PA by Lin Ma · 10 years ago
  59. 8f55dfb Remove concept of top/bottom image loading by Sandrine Bailleux · 10 years ago
  60. 5e0f9bd Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · 10 years ago
  61. e73af8a Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · 10 years ago
  62. 7eea135 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · 10 years ago
  63. 5e11375 Inline the mmio accessor functions by Andrew Thoelke · 10 years ago
  64. 4f2104f Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  65. 634ec6c Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · 10 years ago
  66. 6c0b45d Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · 10 years ago
  67. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  68. 5298f2c Merge pull request #138 from athoelke/at/cpu-context by danh-arm · 10 years ago
  69. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  70. aaba4f2 Move CPU context pointers into cpu_data by Andrew Thoelke · 10 years ago
  71. 5e91007 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  72. 30e3b31 Merge pull request #131 from athoelke/at/cm_get_context by danh-arm · 10 years ago
  73. 5c633bd Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 10 years ago
  74. 08ab89d Provide cm_get/set_context() for current CPU by Andrew Thoelke · 10 years ago
  75. 5c3272a Make system register functions inline assembly by Andrew Thoelke · 10 years ago
  76. f984ce8 Enable mapping higher physical address by Lin Ma · 10 years ago
  77. 9865ac1 Further renames of platform porting functions by Dan Handley · 10 years ago
  78. 0ad4691 Remove FVP specific comments in platform.h by Dan Handley · 10 years ago
  79. dff8e47 Add enable mmu platform porting interfaces by Dan Handley · 10 years ago
  80. dec5e0d Move BL porting functions into platform.h by Dan Handley · 10 years ago
  81. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 10 years ago
  82. 7a9a5f2 Remove unused data declarations by Dan Handley · 10 years ago
  83. c6bc071 Remove extern keyword from function declarations by Dan Handley · 10 years ago
  84. 8957fc7 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · 10 years ago
  85. 65335d4 Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · 10 years ago
  86. 8545a87 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 10 years ago
  87. db0de0e Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · 10 years ago
  88. 3ea8540 Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · 10 years ago
  89. 399fb08 Use a vector table for TSP entrypoints by Andrew Thoelke · 10 years ago
  90. 239b04f Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · 10 years ago
  91. b44a443 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · 10 years ago
  92. 6cf8902 Add support for synchronous FIQ handling in TSP by Achin Gupta · 10 years ago
  93. fa9c08b Use secure timer to generate S-EL1 interrupts by Achin Gupta · 10 years ago
  94. dce74b8 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 10 years ago
  95. dcc1816 Introduce platform api to access an ARM GIC by Achin Gupta · 10 years ago
  96. e1333f7 Introduce interrupt registration framework in BL3-1 by Achin Gupta · 10 years ago
  97. c429b5e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 10 years ago
  98. dbad1ba Add support for BL3-1 as a reset vector by Vikram Kanigiri · 11 years ago
  99. 6871c5d Rework memory information passing to BL3-x images by Vikram Kanigiri · 10 years ago
  100. 4112bfa Populate BL31 input parameters as per new spec by Vikram Kanigiri · 11 years ago