1. d448639 Add 32 bit version of plat_get_syscnt_freq by Antonio Nino Diaz · 8 years ago
  2. 22b09c1 Remove unused argument in psci_cpu_on_start() by Sandrine Bailleux · 8 years ago
  3. 1ad9f93 Validate psci_cpu_on_start() arguments by Sandrine Bailleux · 8 years ago
  4. 56a6412 pass r0-r6 as part of smc param by Ashutosh Singh · 8 years ago
  5. 6d18969 PSCI: Resolve GCC static analysis false positive by Soby Mathew · 9 years ago
  6. 203cdfe Fix PSCI CPU ON race when setting state to ON_PENDING by Soby Mathew · 9 years ago
  7. 65cd299 Remove direct usage of __attribute__((foo)) by Soren Brinkmann · 9 years ago
  8. 1645d3e Miscellaneous doc fixes for v1.2 by Sandrine Bailleux · 9 years ago
  9. d178637 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 9 years ago
  10. 63b8440 TSP: Allow preemption of synchronous S-EL1 interrupt handling by Soby Mathew · 9 years ago
  11. 0244613 Enable use of FIQs and IRQs as TSP interrupts by Soby Mathew · 9 years ago
  12. 404dba5 Unify interrupt return paths from TSP into the TSPD by Soby Mathew · 9 years ago
  13. 5471841 Remove the IMF_READ_INTERRUPT_ID build option by Soby Mathew · 9 years ago
  14. ca15d9b TLKD: pass results with TLK_RESUME_FID function ID by Varun Wadekar · 9 years ago
  15. 16e05cd PSCI: Update state only if CPU_OFF is not denied by SPD by Soby Mathew · 9 years ago
  16. cb790c5 Send power management events to the Trusted OS (TLK) by Varun Wadekar · 9 years ago
  17. 54dc71e Make generic code work in presence of system caches by Achin Gupta · 9 years ago
  18. 7dc28e9 Merge pull request #390 from vikramkanigiri/at/unify_bakery_locks_v2 by Achin Gupta · 9 years ago
  19. ee7b35c Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · 9 years ago
  20. f1054c9 Pass the target suspend level to SPD suspend hooks by Achin Gupta · 9 years ago
  21. 432b990 Merge pull request #361 from achingupta/for_sm/psci_proto_v5 by Achin Gupta · 9 years ago
  22. 9d070b9 PSCI: Rework generic code to conform to coding guidelines by Soby Mathew · 9 years ago
  23. 617540d PSCI: Fix the return code for invalid entrypoint by Soby Mathew · 9 years ago
  24. fd650ff PSCI: Migrate SPDs and TSP to the new platform and framework API by Soby Mathew · 9 years ago
  25. 6748784 PSCI: Switch to the new PSCI frameworks by Soby Mathew · 9 years ago
  26. 32bc85f PSCI: Implement platform compatibility layer by Soby Mathew · 9 years ago
  27. eb975f5 PSCI: Unify warm reset entry points by Sandrine Bailleux · 9 years ago
  28. 8ee2498 PSCI: Add framework to handle composite power states by Soby Mathew · 9 years ago
  29. 82dcc03 PSCI: Introduce new platform interface to describe topology by Soby Mathew · 9 years ago
  30. 12d0d00 PSCI: Introduce new platform and CM helper APIs by Soby Mathew · 9 years ago
  31. 4067dc3 PSCI: Remove references to affinity based power management by Soby Mathew · 9 years ago
  32. 6590ce2 PSCI: Invoke PM hooks only for the highest level by Soby Mathew · 9 years ago
  33. b48349e PSCI: Create new directory to implement new frameworks by Soby Mathew · 9 years ago
  34. 458c3c1 tlkd: delete 'NEED_BL32' build variable by Varun Wadekar · 9 years ago
  35. 484bb38 Merge pull request #324 from soby-mathew/sm/sys_suspend by danh-arm · 9 years ago
  36. e347e84 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · 9 years ago
  37. c0aff0e PSCI: Add SYSTEM_SUSPEND API support by Soby Mathew · 10 years ago
  38. 9b89613 Fix integer extension in mpidr_set_aff_inst() by Andrew Thoelke · 9 years ago
  39. bf031bb Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · 9 years ago
  40. 52010cc Rationalize reset handling code by Sandrine Bailleux · 9 years ago
  41. 42cae5a PSCI: Set ON_PENDING state early during CPU_ON by Soby Mathew · 9 years ago
  42. 709a3c4 Pass arguments/results between EL3/S-EL1 via CPU registers (x0-x7) by Varun Wadekar · 9 years ago
  43. 8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 9 years ago
  44. 874cd37 Merge pull request #280 from vwadekar/tlkd-fixed-v3 by danh-arm · 9 years ago
  45. 6693962 Open/Close TA sessions, send commands/events to TAs by Varun Wadekar · 9 years ago
  46. f9d2505 Preempt/Resume standard function ID calls by Varun Wadekar · 9 years ago
  47. 6e159e7 Translate secure/non-secure virtual addresses by Varun Wadekar · 9 years ago
  48. 77199df Register NS shared memory for SP's activity logs and TA sessions by Varun Wadekar · 9 years ago
  49. 2203831 Add TLK Dispatcher (tlkd) based on the Test Dispatcher (tspd) by Varun Wadekar · 9 years ago
  50. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  51. ba592e2 Fix violations to the coding style by Sandrine Bailleux · 9 years ago
  52. 8c32bc2 Export maximum affinity using PLATFORM_MAX_AFFLVL macro by Soby Mathew · 9 years ago
  53. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  54. f4f1ae7 Demonstrate model for routing IRQs to EL3 by Soby Mathew · 10 years ago
  55. b234b2c Verify capabilities before handling PSCI calls by Soby Mathew · 10 years ago
  56. 90e8258 Implement PSCI_FEATURES API by Soby Mathew · 10 years ago
  57. 8991eed Rework the PSCI migrate APIs by Soby Mathew · 10 years ago
  58. 22f0897 Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · 10 years ago
  59. 539dced Validate power_state and entrypoint when executing PSCI calls by Soby Mathew · 10 years ago
  60. 31244d7 Save 'power_state' early in PSCI CPU_SUSPEND call by Soby Mathew · 10 years ago
  61. 78879b9 Rework internal API to save non-secure entry point info by Soby Mathew · 10 years ago
  62. 2f5aade PSCI: Check early for invalid CPU state during CPU ON by Soby Mathew · 10 years ago
  63. e146f4c Remove `ns_entrypoint` and `mpidr` from parameters in pm_ops by Soby Mathew · 10 years ago
  64. ab8707e Remove coherent memory from the BL memory maps by Soby Mathew · 10 years ago
  65. 8c5fe0b Move bakery algorithm implementation out of coherent memory by Soby Mathew · 10 years ago
  66. 0999734 Invalidate the dcache after initializing cpu-ops by Soby Mathew · 10 years ago
  67. 264999f Fix CPU_SUSPEND when invoked with affinity level higher than get_max_afflvl() by Soby Mathew · 10 years ago
  68. 235585b Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 10 years ago
  69. aa5da46 Add opteed based on tspd by Jens Wiklander · 10 years ago
  70. add4035 Add CPU specific power management operations by Soby Mathew · 10 years ago
  71. a4a8eae Miscellaneous PSCI code cleanups by Achin Gupta · 10 years ago
  72. 0a46e2c Add APIs to preserve highest affinity level in OFF state by Achin Gupta · 10 years ago
  73. 84c9f10 Rework state management in the PSCI implementation by Achin Gupta · 10 years ago
  74. 776b68a Add PSCI service specific per-CPU data by Achin Gupta · 10 years ago
  75. d5f1309 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 10 years ago
  76. a1d8044 Merge pull request #189 from achingupta/ag/tf-issues#153 by Dan Handley · 10 years ago
  77. 5a06bb7 Clarify platform porting interface to TSP by Dan Handley · 10 years ago
  78. 0c8d4fe Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · 10 years ago
  79. 319609a Merge pull request #178 from soby-mathew/sm/optmize_el3_context by danh-arm · 10 years ago
  80. faaa2e7 Support asynchronous method for BL3-2 initialization by Vikram Kanigiri · 10 years ago
  81. 50e27da Rework the TSPD setup code by Vikram Kanigiri · 10 years ago
  82. fdfabec Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 10 years ago
  83. dd2bdee Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · 10 years ago
  84. d3280be Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 10 years ago
  85. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  86. 539a7b3 Remove the concept of coherent stacks by Achin Gupta · 10 years ago
  87. b51da82 Remove coherent stack usage from the warm boot path by Achin Gupta · 10 years ago
  88. afff8cb Make enablement of the MMU more flexible by Achin Gupta · 10 years ago
  89. 56378aa Remove current CPU mpidr from PSCI common code by Andrew Thoelke · 10 years ago
  90. e73af8a Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · 10 years ago
  91. 7eea135 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · 10 years ago
  92. 4f2104f Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  93. 634ec6c Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · 10 years ago
  94. 41cf7bd Merge pull request #145 from athoelke/at/psci-memory-optimization-v2 by danh-arm · 10 years ago
  95. 47fe640 Merge pull request #144 from athoelke/at/init-context-v2 by danh-arm · 10 years ago
  96. 6c0b45d Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · 10 years ago
  97. 13ac44a Eliminate psci_suspend_context array by Andrew Thoelke · 10 years ago
  98. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  99. 5219862 Merge pull request #140 from athoelke/at/psci_smc_handler by danh-arm · 10 years ago
  100. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago