commit 200e114312a38ffdd91b77eee792d520626a0a13
author Todd Broch <tbroch@chromium.org> Tue Oct 30 15:52:01 2012 -0700
committer Gerrit <chrome-bot@google.com> Tue Oct 30 16:58:07 2012 -0700
tree 173156ecaf9326efa01d7828369dcca862f4d8a0
parent 01660769f975783c115e6aefe23608daec406e96

autotest: rc6 bugfixes for ivybridge systems.

Ivybridge systems are capable of deeper rc6 states (rc6p).  With the
change in https://gerrit.chromium.org/gerrit/#/c/29677/, rc6 depth is
now determined on by the per-chip default in the driver.  This is done
by setting rc6=-1.  CL examines the module to verify the -1 mode
setting.

Additionally for rc6p, PP1 power can reach zero if GFX is idle.  CL
also adjusts minimum power measured to allow this.

BUG=none
TEST=run it

Change-Id: Ic3ff66d299eeaefd37160f54a212c4ebcc253d2f
Reviewed-on: https://gerrit.chromium.org/gerrit/36960
Reviewed-by: Sameer Nanda <snanda@chromium.org>
Commit-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>

client/site_tests/power_x86Settings/power_x86Settings.py

diff --git a/client/site_tests/power_x86Settings/power_x86Settings.py b/client/site_tests/power_x86Settings/power_x86Settings.py
index c50e412..1fe4d38 100755
--- a/client/site_tests/power_x86Settings/power_x86Settings.py
+++ b/client/site_tests/power_x86Settings/power_x86Settings.py
@@ -79,7 +79,7 @@
     }
 
 GFX_CHECKS = {
-    'Non-Atom': {'i915_enable_rc6': 1, 'i915_enable_fbc': 1, 'powersave': 1,
+    'Non-Atom': {'i915_enable_rc6': -1, 'i915_enable_fbc': 1, 'powersave': 1,
         'semaphores': 1, 'lvds_downclock': 1}
     }
 
@@ -87,7 +87,7 @@
 RAPL_CHECKS = {
     'Non-Atom': {'pkg': {'max': 5.0, 'min': 1.0},
                 'pp0': {'max': 1.0, 'min': 0.001},
-                'pp1': {'max': 1.0, 'min': 0.001}}
+                'pp1': {'max': 1.0, 'min': 0.000}}
     }
 
 SUBTESTS = ['dmi', 'mch', 'msr', 'pcie_aspm', 'wifi', 'usb', 'storage',