| commit | 0b6f1bd5440dc5cb24643c59ff86a7fc3c8785c5 | [log] [tgz] |
|---|---|---|
| author | Nguyen Anh Quynh <aquynh@gmail.com> | Fri Nov 29 11:06:46 2013 +0800 |
| committer | Nguyen Anh Quynh <aquynh@gmail.com> | Fri Nov 29 11:06:46 2013 +0800 |
| tree | ba326f15c32efc9faaef97700c8081a8dc82cbd9 | |
| parent | b8394a47d7fbc5856f1fd39c00f5b09a7d146144 [diff] |
x86: fix SHR, SHL, SAR insn when second op is 1 (Intel syntax). reported by Edgar Barbosa