tree ba326f15c32efc9faaef97700c8081a8dc82cbd9
parent b8394a47d7fbc5856f1fd39c00f5b09a7d146144
author Nguyen Anh Quynh <aquynh@gmail.com> 1385694406 +0800
committer Nguyen Anh Quynh <aquynh@gmail.com> 1385694406 +0800

x86: fix SHR, SHL, SAR insn when second op is 1 (Intel syntax). reported by Edgar Barbosa