x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change
diff --git a/bindings/java/TestX86.java b/bindings/java/TestX86.java
index 0aec400..b12cb0b 100644
--- a/bindings/java/TestX86.java
+++ b/bindings/java/TestX86.java
@@ -73,6 +73,12 @@
if (operands.avxCC != 0)
System.out.printf("\tavx_cc: %u\n", operands.avxCC);
+ if (operands.avxSae)
+ System.out.printf("\tavx_sae: TRUE\n");
+
+ if (operands.avxRm != 0)
+ System.out.printf("\tavx_rm: %u\n", operands.avxRm);
+
int count = ins.opCount(X86_OP_IMM);
if (count > 0) {
System.out.printf("\timm_count: %d\n", count);
diff --git a/bindings/java/capstone/X86.java b/bindings/java/capstone/X86.java
index c43fe20..28f66a8 100644
--- a/bindings/java/capstone/X86.java
+++ b/bindings/java/capstone/X86.java
@@ -78,6 +78,8 @@
public int sib_base;
public int sse_cc;
public int avx_cc;
+ public boolean avx_sae;
+ public int avx_rm;
public char op_count;
@@ -92,7 +94,7 @@
@Override
public List getFieldOrder() {
return Arrays.asList("prefix", "opcode", "addr_size",
- "modrm", "sib", "disp", "sib_index", "sib_scale", "sib_base", "sse_cc", "avx_cc", "op_count", "op");
+ "modrm", "sib", "disp", "sib_index", "sib_scale", "sib_base", "sse_cc", "avx_cc", "avx_sae", "avx_rm", "op_count", "op");
}
}
@@ -126,6 +128,8 @@
sibBase = e.sib_base;
sseCC = e.sse_cc;
avxCC = e.avx_cc;
+ avxSae = e.avx_sae;
+ avxRm = e.avx_rm;
op = new Operand[e.op_count];
for (int i=0; i<e.op_count; i++)
op[i] = e.op[i];
diff --git a/bindings/java/capstone/X86_const.java b/bindings/java/capstone/X86_const.java
index aec756f..c2835be 100644
--- a/bindings/java/capstone/X86_const.java
+++ b/bindings/java/capstone/X86_const.java
@@ -310,6 +310,14 @@
public static final int X86_AVX_CC_GT_OQ = 31;
public static final int X86_AVX_CC_TRUE_US = 32;
+ // AVX static rounding mode type
+
+ public static final int X86_AVX_RM_INVALID = 0;
+ public static final int X86_AVX_RM_RN = 1;
+ public static final int X86_AVX_RM_RD = 2;
+ public static final int X86_AVX_RM_RU = 3;
+ public static final int X86_AVX_RM_RZ = 4;
+
// X86 instructions
public static final int X86_INS_INVALID = 0;
diff --git a/bindings/python/capstone/__init__.py b/bindings/python/capstone/__init__.py
index 4e9df45..a63e8ce 100644
--- a/bindings/python/capstone/__init__.py
+++ b/bindings/python/capstone/__init__.py
@@ -473,7 +473,8 @@
elif arch == CS_ARCH_X86:
(self.prefix, self.opcode, self.addr_size, \
self.modrm, self.sib, self.disp, \
- self.sib_index, self.sib_scale, self.sib_base, self.sse_cc, self.avx_cc, self.operands) = x86.get_arch_info(self._detail.arch.x86)
+ self.sib_index, self.sib_scale, self.sib_base, self.sse_cc, \
+ self.avx_cc, self.avx_sae, self.avx_rm, self.operands) = x86.get_arch_info(self._detail.arch.x86)
elif arch == CS_ARCH_MIPS:
self.operands = mips.get_arch_info(self._detail.arch.mips)
elif arch == CS_ARCH_PPC:
diff --git a/bindings/python/capstone/x86.py b/bindings/python/capstone/x86.py
index 4b709d7..eb913fc 100644
--- a/bindings/python/capstone/x86.py
+++ b/bindings/python/capstone/x86.py
@@ -60,6 +60,8 @@
('sib_base', ctypes.c_uint),
('sse_cc', ctypes.c_uint),
('avx_cc', ctypes.c_uint),
+ ('avx_sae', ctypes.c_bool),
+ ('avx_rm', ctypes.c_uint),
('op_count', ctypes.c_uint8),
('operands', X86Op * 8),
)
@@ -67,5 +69,6 @@
def get_arch_info(a):
return (a.prefix[:], a.opcode[:], a.addr_size, \
a.modrm, a.sib, a.disp, a.sib_index, a.sib_scale, \
- a.sib_base, a.sse_cc, a.avx_cc, copy.deepcopy(a.operands[:a.op_count]))
+ a.sib_base, a.sse_cc, a.avx_cc, a.avx_sae, a.avx_rm, \
+ copy.deepcopy(a.operands[:a.op_count]))
diff --git a/bindings/python/capstone/x86_const.py b/bindings/python/capstone/x86_const.py
index 038ecc8..bdc8660 100644
--- a/bindings/python/capstone/x86_const.py
+++ b/bindings/python/capstone/x86_const.py
@@ -307,6 +307,14 @@
X86_AVX_CC_GT_OQ = 31
X86_AVX_CC_TRUE_US = 32
+# AVX static rounding mode type
+
+X86_AVX_RM_INVALID = 0
+X86_AVX_RM_RN = 1
+X86_AVX_RM_RD = 2
+X86_AVX_RM_RU = 3
+X86_AVX_RM_RZ = 4
+
# X86 instructions
X86_INS_INVALID = 0
diff --git a/bindings/python/test_x86.py b/bindings/python/test_x86.py
index b119075..f389fe0 100755
--- a/bindings/python/test_x86.py
+++ b/bindings/python/test_x86.py
@@ -68,6 +68,14 @@
if insn.avx_cc != X86_AVX_CC_INVALID:
print("\tavx_cc: %u" % (insn.avx_cc))
+ # AVX Suppress All Exception
+ if insn.avx_sae:
+ print("\tavx_sae: TRUE")
+
+ # AVX Rounding Mode type
+ if insn.avx_rm != X86_AVX_RM_INVALID:
+ print("\tavx_rm: %u" % (insn.avx_rm))
+
count = insn.op_count(X86_OP_IMM)
if count > 0:
print("\timm_count: %u" % count)