Add ARM64_GRP_INT to AArch64 for SVC instruction
diff --git a/arch/AArch64/AArch64Mapping.c b/arch/AArch64/AArch64Mapping.c
index 1233668..f653517 100644
--- a/arch/AArch64/AArch64Mapping.c
+++ b/arch/AArch64/AArch64Mapping.c
@@ -841,6 +841,7 @@
{ ARM64_GRP_CALL, "call" },
{ ARM64_GRP_RET, "return" },
{ ARM64_GRP_PRIVILEGE, "privilege" },
+ { ARM64_GRP_INT, "int" },
// architecture-specific groups
{ ARM64_GRP_CRYPTO, "crypto" },
diff --git a/arch/AArch64/AArch64MappingInsn.inc b/arch/AArch64/AArch64MappingInsn.inc
index bb6b15a..851429b 100644
--- a/arch/AArch64/AArch64MappingInsn.inc
+++ b/arch/AArch64/AArch64MappingInsn.inc
@@ -11566,7 +11566,7 @@
{
AArch64_SVC, ARM64_INS_SVC,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0, 0 }, { ARM64_REG_LR, 0 }, { ARM64_GRP_INT, 0 }, 0, 0
#endif
},
{
diff --git a/include/capstone/arm64.h b/include/capstone/arm64.h
index 9acff2b..1fd5ad1 100644
--- a/include/capstone/arm64.h
+++ b/include/capstone/arm64.h
@@ -380,7 +380,7 @@
bool update_flags; // does this insn update flags?
bool writeback; // does this insn request writeback? 'True' means 'yes'
- // Number of operands of this instruction,
+ // Number of operands of this instruction,
// or 0 when instruction has no operand.
uint8_t op_count;
@@ -1136,6 +1136,7 @@
ARM64_GRP_JUMP, // = CS_GRP_JUMP
ARM64_GRP_CALL,
ARM64_GRP_RET,
+ ARM64_GRP_INT,
ARM64_GRP_PRIVILEGE = 6, // = CS_GRP_PRIVILEGE
//> Architecture-specific groups