commit 394cdfc11ec6bb69a2604956ca3040351f22f7b9
author Matt Suiche <msuiche@users.noreply.github.com> Tue Sep 05 19:15:13 2017 +0400
committer Nguyen Anh Quynh <aquynh@gmail.com> Tue Sep 05 22:20:57 2017 +0700
tree d2fe75a47c7caa0c574c5e038f275efa6b1a062b
parent 7a274e24fb56e8af961ff5d7e6ff74ca5a168f0a

Resolve some casting issues with Visual Studio.

arch/AArch64/AArch64Disassembler.c

diff --git a/arch/AArch64/AArch64Disassembler.c b/arch/AArch64/AArch64Disassembler.c
index e1654e2..9ec7880 100644
--- a/arch/AArch64/AArch64Disassembler.c
+++ b/arch/AArch64/AArch64Disassembler.c
@@ -1626,7 +1626,7 @@
 {
 	uint32_t Rt = fieldFromInstruction(insn, 0, 5);
 	uint32_t bit = fieldFromInstruction(insn, 31, 1) << 5;
-	int32_t dst = fieldFromInstruction(insn, 5, 14);
+	uint32_t dst = fieldFromInstruction(insn, 5, 14);
 
 	bit |= fieldFromInstruction(insn, 19, 5);
 

arch/AArch64/AArch64InstPrinter.c

diff --git a/arch/AArch64/AArch64InstPrinter.c b/arch/AArch64/AArch64InstPrinter.c
index 114ea1a..1e4fa22 100644
--- a/arch/AArch64/AArch64InstPrinter.c
+++ b/arch/AArch64/AArch64InstPrinter.c
@@ -1194,7 +1194,7 @@
 
 	if (MI->csh->detail) {
 		if (MI->csh->doing_mem) {
-			MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int)val;
+			MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)val;
 		} else {
 #ifndef CAPSTONE_DIET
 			uint8_t access;
@@ -1218,7 +1218,7 @@
 		printInt64Bang(O, val);
 		if (MI->csh->detail) {
 			if (MI->csh->doing_mem) {
-				MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int)val;
+				MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)val;
 			} else {
 #ifndef CAPSTONE_DIET
 				uint8_t access;

arch/ARM/ARMInstPrinter.c

diff --git a/arch/ARM/ARMInstPrinter.c b/arch/ARM/ARMInstPrinter.c
index ad31569..ff60ca0 100644
--- a/arch/ARM/ARMInstPrinter.c
+++ b/arch/ARM/ARMInstPrinter.c
@@ -1272,7 +1272,7 @@
 static void printPostIdxImm8s4Operand(MCInst *MI, unsigned OpNum, SStream *O)
 {
 	MCOperand *MO = MCInst_getOperand(MI, OpNum);
-	unsigned Imm = (unsigned int)MCOperand_getImm(MO);
+	int Imm = (int)MCOperand_getImm(MO);
 
 	if (((Imm & 0xff) << 2) > HEX_THRESHOLD) {
 		SStream_concat(O, "#%s0x%x", ((Imm & 256) ? "" : "-"), ((Imm & 0xff) << 2));
@@ -1281,7 +1281,7 @@
 	}
 
 	if (MI->csh->detail) {
-		int v = (Imm & 256) ? ((Imm & 0xff) << 2) : -((((int)Imm) & 0xff) << 2);
+		int v = (Imm & 256) ? ((Imm & 0xff) << 2) : -((Imm & 0xff) << 2);
 		MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM;
 		MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = v;
 		MI->flat_insn->detail->arm.op_count++;