arm64: update core. this added a lot more details to cs_arm64_op struct
diff --git a/arch/AArch64/AArch64AddressingModes.h b/arch/AArch64/AArch64AddressingModes.h
new file mode 100644
index 0000000..775ca4b
--- /dev/null
+++ b/arch/AArch64/AArch64AddressingModes.h
@@ -0,0 +1,224 @@
+//===- AArch64AddressingModes.h - AArch64 Addressing Modes ------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the AArch64 addressing mode implementation stuff.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64ADDRESSINGMODES_H
+#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64ADDRESSINGMODES_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2014 */
+
+#include "../../MathExtras.h"
+
+/// AArch64_AM - AArch64 Addressing Mode Stuff
+
+//===----------------------------------------------------------------------===//
+// Shifts
+//
+
+typedef enum AArch64_AM_ShiftExtendType {
+ AArch64_AM_InvalidShiftExtend = -1,
+ AArch64_AM_LSL = 0,
+ AArch64_AM_LSR,
+ AArch64_AM_ASR,
+ AArch64_AM_ROR,
+ AArch64_AM_MSL,
+
+ AArch64_AM_UXTB,
+ AArch64_AM_UXTH,
+ AArch64_AM_UXTW,
+ AArch64_AM_UXTX,
+
+ AArch64_AM_SXTB,
+ AArch64_AM_SXTH,
+ AArch64_AM_SXTW,
+ AArch64_AM_SXTX,
+} AArch64_AM_ShiftExtendType;
+
+/// getShiftName - Get the string encoding for the shift type.
+static inline const char *AArch64_AM_getShiftExtendName(AArch64_AM_ShiftExtendType ST)
+{
+ switch (ST) {
+ default: return NULL; // never reach
+ case AArch64_AM_LSL: return "lsl";
+ case AArch64_AM_LSR: return "lsr";
+ case AArch64_AM_ASR: return "asr";
+ case AArch64_AM_ROR: return "ror";
+ case AArch64_AM_MSL: return "msl";
+ case AArch64_AM_UXTB: return "uxtb";
+ case AArch64_AM_UXTH: return "uxth";
+ case AArch64_AM_UXTW: return "uxtw";
+ case AArch64_AM_UXTX: return "uxtx";
+ case AArch64_AM_SXTB: return "sxtb";
+ case AArch64_AM_SXTH: return "sxth";
+ case AArch64_AM_SXTW: return "sxtw";
+ case AArch64_AM_SXTX: return "sxtx";
+ }
+}
+
+/// getShiftType - Extract the shift type.
+static inline AArch64_AM_ShiftExtendType AArch64_AM_getShiftType(unsigned Imm)
+{
+ switch ((Imm >> 6) & 0x7) {
+ default: return AArch64_AM_InvalidShiftExtend;
+ case 0: return AArch64_AM_LSL;
+ case 1: return AArch64_AM_LSR;
+ case 2: return AArch64_AM_ASR;
+ case 3: return AArch64_AM_ROR;
+ case 4: return AArch64_AM_MSL;
+ }
+}
+
+/// getShiftValue - Extract the shift value.
+static inline unsigned AArch64_AM_getShiftValue(unsigned Imm)
+{
+ return Imm & 0x3f;
+}
+
+//===----------------------------------------------------------------------===//
+// Extends
+//
+
+/// getArithShiftValue - get the arithmetic shift value.
+static inline unsigned AArch64_AM_getArithShiftValue(unsigned Imm)
+{
+ return Imm & 0x7;
+}
+
+/// getExtendType - Extract the extend type for operands of arithmetic ops.
+static inline AArch64_AM_ShiftExtendType AArch64_AM_getExtendType(unsigned Imm)
+{
+ // assert((Imm & 0x7) == Imm && "invalid immediate!");
+ switch (Imm) {
+ default: // llvm_unreachable("Compiler bug!");
+ case 0: return AArch64_AM_UXTB;
+ case 1: return AArch64_AM_UXTH;
+ case 2: return AArch64_AM_UXTW;
+ case 3: return AArch64_AM_UXTX;
+ case 4: return AArch64_AM_SXTB;
+ case 5: return AArch64_AM_SXTH;
+ case 6: return AArch64_AM_SXTW;
+ case 7: return AArch64_AM_SXTX;
+ }
+}
+
+static inline AArch64_AM_ShiftExtendType AArch64_AM_getArithExtendType(unsigned Imm)
+{
+ return AArch64_AM_getExtendType((Imm >> 3) & 0x7);
+}
+
+static inline uint64_t ror(uint64_t elt, unsigned size)
+{
+ return ((elt & 1) << (size-1)) | (elt >> 1);
+}
+
+/// decodeLogicalImmediate - Decode a logical immediate value in the form
+/// "N:immr:imms" (where the immr and imms fields are each 6 bits) into the
+/// integer value it represents with regSize bits.
+static inline uint64_t AArch64_AM_decodeLogicalImmediate(uint64_t val, unsigned regSize)
+{
+ // Extract the N, imms, and immr fields.
+ unsigned N = (val >> 12) & 1;
+ unsigned immr = (val >> 6) & 0x3f;
+ unsigned imms = val & 0x3f;
+
+ // assert((regSize == 64 || N == 0) && "undefined logical immediate encoding");
+ int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f));
+ // assert(len >= 0 && "undefined logical immediate encoding");
+ unsigned size = (1 << len);
+ unsigned R = immr & (size - 1);
+ unsigned S = imms & (size - 1);
+ // assert(S != size - 1 && "undefined logical immediate encoding");
+ uint64_t pattern = (1ULL << (S + 1)) - 1;
+ for (unsigned i = 0; i < R; ++i)
+ pattern = ror(pattern, size);
+
+ // Replicate the pattern to fill the regSize.
+ while (size != regSize) {
+ pattern |= (pattern << size);
+ size *= 2;
+ }
+
+ return pattern;
+}
+
+/// isValidDecodeLogicalImmediate - Check to see if the logical immediate value
+/// in the form "N:immr:imms" (where the immr and imms fields are each 6 bits)
+/// is a valid encoding for an integer value with regSize bits.
+static inline bool AArch64_AM_isValidDecodeLogicalImmediate(uint64_t val, unsigned regSize)
+{
+ // Extract the N and imms fields needed for checking.
+ unsigned N = (val >> 12) & 1;
+ unsigned imms = val & 0x3f;
+
+ if (regSize == 32 && N != 0) // undefined logical immediate encoding
+ return false;
+ int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f));
+ if (len < 0) // undefined logical immediate encoding
+ return false;
+ unsigned size = (1 << len);
+ unsigned S = imms & (size - 1);
+ if (S == size - 1) // undefined logical immediate encoding
+ return false;
+
+ return true;
+}
+
+//===----------------------------------------------------------------------===//
+// Floating-point Immediates
+//
+static inline float AArch64_AM_getFPImmFloat(unsigned Imm)
+{
+ // We expect an 8-bit binary encoding of a floating-point number here.
+ union {
+ uint32_t I;
+ float F;
+ } FPUnion;
+
+ uint8_t Sign = (Imm >> 7) & 0x1;
+ uint8_t Exp = (Imm >> 4) & 0x7;
+ uint8_t Mantissa = Imm & 0xf;
+
+ // 8-bit FP iEEEE Float Encoding
+ // abcd efgh aBbbbbbc defgh000 00000000 00000000
+ //
+ // where B = NOT(b);
+
+ FPUnion.I = 0;
+ FPUnion.I |= Sign << 31;
+ FPUnion.I |= ((Exp & 0x4) != 0 ? 0 : 1) << 30;
+ FPUnion.I |= ((Exp & 0x4) != 0 ? 0x1f : 0) << 25;
+ FPUnion.I |= (Exp & 0x3) << 23;
+ FPUnion.I |= Mantissa << 19;
+
+ return FPUnion.F;
+}
+
+//===--------------------------------------------------------------------===//
+// AdvSIMD Modified Immediates
+//===--------------------------------------------------------------------===//
+
+static inline uint64_t AArch64_AM_decodeAdvSIMDModImmType10(uint8_t Imm)
+{
+ uint64_t EncVal = 0;
+ if (Imm & 0x80) EncVal |= 0xff00000000000000ULL;
+ if (Imm & 0x40) EncVal |= 0x00ff000000000000ULL;
+ if (Imm & 0x20) EncVal |= 0x0000ff0000000000ULL;
+ if (Imm & 0x10) EncVal |= 0x000000ff00000000ULL;
+ if (Imm & 0x08) EncVal |= 0x00000000ff000000ULL;
+ if (Imm & 0x04) EncVal |= 0x0000000000ff0000ULL;
+ if (Imm & 0x02) EncVal |= 0x000000000000ff00ULL;
+ if (Imm & 0x01) EncVal |= 0x00000000000000ffULL;
+ return EncVal;
+}
+
+#endif
diff --git a/arch/AArch64/AArch64BaseInfo.c b/arch/AArch64/AArch64BaseInfo.c
index 64e5411..a498c6a 100644
--- a/arch/AArch64/AArch64BaseInfo.c
+++ b/arch/AArch64/AArch64BaseInfo.c
@@ -27,7 +27,7 @@
#include "AArch64BaseInfo.h"
-char *NamedImmMapper_toString(NamedImmMapper *N, uint32_t Value, bool *Valid)
+char *A64NamedImmMapper_toString(A64NamedImmMapper *N, uint32_t Value, bool *Valid)
{
unsigned i;
for (i = 0; i < N->NumPairs; ++i) {
@@ -56,7 +56,7 @@
return res;
}
-uint32_t NamedImmMapper_fromString(NamedImmMapper *N, char *Name, bool *Valid)
+uint32_t A64NamedImmMapper_fromString(A64NamedImmMapper *N, char *Name, bool *Valid)
{
unsigned i;
for (i = 0; i < N->NumPairs; ++i) {
@@ -70,7 +70,7 @@
return (uint32_t)-1;
}
-bool NamedImmMapper_validImm(NamedImmMapper *N, uint32_t Value)
+bool A64NamedImmMapper_validImm(A64NamedImmMapper *N, uint32_t Value)
{
return Value < N->TooBigImm;
}
@@ -97,7 +97,7 @@
return result;
}
-static NamedImmMapper_Mapping SysRegPairs[] = {
+static A64NamedImmMapper_Mapping SysRegPairs[] = {
{"osdtrrx_el1", A64SysReg_OSDTRRX_EL1},
{"osdtrtx_el1", A64SysReg_OSDTRTX_EL1},
{"teecr32_el1", A64SysReg_TEECR32_EL1},
@@ -576,14 +576,19 @@
{"ich_lr15_el2", A64SysReg_ICH_LR15_EL2}
};
+static A64NamedImmMapper_Mapping CycloneSysRegPairs[] = {
+ {"cpm_ioacc_ctl_el3", A64SysReg_CPM_IOACC_CTL_EL3}
+};
+
// result must be a big enough buffer: 128 bytes is more than enough
-void SysRegMapper_toString(SysRegMapper *S, uint32_t Bits, bool *Valid, char *result)
+void A64SysRegMapper_toString(A64SysRegMapper *S, uint32_t Bits, bool *Valid, char *result)
{
int dummy;
uint32_t Op0, Op1, CRn, CRm, Op2;
char *Op1S, *CRnS, *CRmS, *Op2S;
unsigned i;
+ // First search the registers shared by all
for (i = 0; i < ARR_SIZE(SysRegPairs); ++i) {
if (SysRegPairs[i].Value == Bits) {
*Valid = true;
@@ -592,6 +597,20 @@
}
}
+ // Next search for target specific registers
+ // if (FeatureBits & AArch64_ProcCyclone) {
+ if (true) {
+ for (i = 0; i < ARR_SIZE(CycloneSysRegPairs); ++i) {
+ if (CycloneSysRegPairs[i].Value == Bits) {
+ *Valid = true;
+ strcpy(result, CycloneSysRegPairs[i].Name);
+ return;
+ }
+ }
+ }
+
+ // Now try the instruction-specific registers (either read-only or
+ // write-only).
for (i = 0; i < S->NumInstPairs; ++i) {
if (S->InstPairs[i].Value == Bits) {
*Valid = true;
@@ -632,7 +651,7 @@
cs_mem_free(Op2S);
}
-static NamedImmMapper_Mapping TLBIPairs[] = {
+static A64NamedImmMapper_Mapping TLBIPairs[] = {
{"ipas2e1is", A64TLBI_IPAS2E1IS},
{"ipas2le1is", A64TLBI_IPAS2LE1IS},
{"vmalle1is", A64TLBI_VMALLE1IS},
@@ -667,13 +686,13 @@
{"vaale1", A64TLBI_VAALE1}
};
-NamedImmMapper A64TLBI_TLBIMapper = {
+A64NamedImmMapper A64TLBI_TLBIMapper = {
TLBIPairs,
ARR_SIZE(TLBIPairs),
0,
};
-static NamedImmMapper_Mapping ATPairs[] = {
+static A64NamedImmMapper_Mapping ATPairs[] = {
{"s1e1r", A64AT_S1E1R},
{"s1e2r", A64AT_S1E2R},
{"s1e3r", A64AT_S1E3R},
@@ -688,13 +707,13 @@
{"s12e0w", A64AT_S12E0W},
};
-NamedImmMapper A64AT_ATMapper = {
+A64NamedImmMapper A64AT_ATMapper = {
ATPairs,
ARR_SIZE(ATPairs),
0,
};
-static NamedImmMapper_Mapping DBarrierPairs[] = {
+static A64NamedImmMapper_Mapping DBarrierPairs[] = {
{"oshld", A64DB_OSHLD},
{"oshst", A64DB_OSHST},
{"osh", A64DB_OSH},
@@ -709,13 +728,13 @@
{"sy", A64DB_SY}
};
-NamedImmMapper A64DB_DBarrierMapper = {
+A64NamedImmMapper A64DB_DBarrierMapper = {
DBarrierPairs,
ARR_SIZE(DBarrierPairs),
16,
};
-static NamedImmMapper_Mapping DCPairs[] = {
+static A64NamedImmMapper_Mapping DCPairs[] = {
{"zva", A64DC_ZVA},
{"ivac", A64DC_IVAC},
{"isw", A64DC_ISW},
@@ -726,35 +745,35 @@
{"cisw", A64DC_CISW}
};
-NamedImmMapper A64DC_DCMapper = {
+A64NamedImmMapper A64DC_DCMapper = {
DCPairs,
ARR_SIZE(DCPairs),
0,
};
-static NamedImmMapper_Mapping ICPairs[] = {
+static A64NamedImmMapper_Mapping ICPairs[] = {
{"ialluis", A64IC_IALLUIS},
{"iallu", A64IC_IALLU},
{"ivau", A64IC_IVAU}
};
-NamedImmMapper A64IC_ICMapper = {
+A64NamedImmMapper A64IC_ICMapper = {
ICPairs,
ARR_SIZE(ICPairs),
0,
};
-static NamedImmMapper_Mapping ISBPairs[] = {
+static A64NamedImmMapper_Mapping ISBPairs[] = {
{"sy", A64DB_SY},
};
-NamedImmMapper A64ISB_ISBMapper = {
+A64NamedImmMapper A64ISB_ISBMapper = {
ISBPairs,
ARR_SIZE(ISBPairs),
16,
};
-static NamedImmMapper_Mapping PRFMPairs[] = {
+static A64NamedImmMapper_Mapping PRFMPairs[] = {
{"pldl1keep", A64PRFM_PLDL1KEEP},
{"pldl1strm", A64PRFM_PLDL1STRM},
{"pldl2keep", A64PRFM_PLDL2KEEP},
@@ -775,25 +794,25 @@
{"pstl3strm", A64PRFM_PSTL3STRM}
};
-NamedImmMapper A64PRFM_PRFMMapper = {
+A64NamedImmMapper A64PRFM_PRFMMapper = {
PRFMPairs,
ARR_SIZE(PRFMPairs),
32,
};
-static NamedImmMapper_Mapping PStatePairs[] = {
+static A64NamedImmMapper_Mapping PStatePairs[] = {
{"spsel", A64PState_SPSel},
{"daifset", A64PState_DAIFSet},
{"daifclr", A64PState_DAIFClr}
};
-NamedImmMapper A64PState_PStateMapper = {
+A64NamedImmMapper A64PState_PStateMapper = {
PStatePairs,
ARR_SIZE(PStatePairs),
0,
};
-static NamedImmMapper_Mapping MRSPairs[] = {
+static A64NamedImmMapper_Mapping MRSPairs[] = {
{"mdccsr_el0", A64SysReg_MDCCSR_EL0},
{"dbgdtrrx_el0", A64SysReg_DBGDTRRX_EL0},
{"mdrar_el1", A64SysReg_MDRAR_EL1},
@@ -823,16 +842,16 @@
{"id_isar3_el1", A64SysReg_ID_ISAR3_EL1},
{"id_isar4_el1", A64SysReg_ID_ISAR4_EL1},
{"id_isar5_el1", A64SysReg_ID_ISAR5_EL1},
- {"id_aa64pfr0_el1", A64SysReg_ID_AA64PFR0_EL1},
- {"id_aa64pfr1_el1", A64SysReg_ID_AA64PFR1_EL1},
- {"id_aa64dfr0_el1", A64SysReg_ID_AA64DFR0_EL1},
- {"id_aa64dfr1_el1", A64SysReg_ID_AA64DFR1_EL1},
- {"id_aa64afr0_el1", A64SysReg_ID_AA64AFR0_EL1},
- {"id_aa64afr1_el1", A64SysReg_ID_AA64AFR1_EL1},
- {"id_aa64isar0_el1", A64SysReg_ID_AA64ISAR0_EL1},
- {"id_aa64isar1_el1", A64SysReg_ID_AA64ISAR1_EL1},
- {"id_aa64mmfr0_el1", A64SysReg_ID_AA64MMFR0_EL1},
- {"id_aa64mmfr1_el1", A64SysReg_ID_AA64MMFR1_EL1},
+ {"id_aa64pfr0_el1", A64SysReg_ID_A64PFR0_EL1},
+ {"id_aa64pfr1_el1", A64SysReg_ID_A64PFR1_EL1},
+ {"id_aa64dfr0_el1", A64SysReg_ID_A64DFR0_EL1},
+ {"id_aa64dfr1_el1", A64SysReg_ID_A64DFR1_EL1},
+ {"id_aa64afr0_el1", A64SysReg_ID_A64AFR0_EL1},
+ {"id_aa64afr1_el1", A64SysReg_ID_A64AFR1_EL1},
+ {"id_aa64isar0_el1", A64SysReg_ID_A64ISAR0_EL1},
+ {"id_aa64isar1_el1", A64SysReg_ID_A64ISAR1_EL1},
+ {"id_aa64mmfr0_el1", A64SysReg_ID_A64MMFR0_EL1},
+ {"id_aa64mmfr1_el1", A64SysReg_ID_A64MMFR1_EL1},
{"mvfr0_el1", A64SysReg_MVFR0_EL1},
{"mvfr1_el1", A64SysReg_MVFR1_EL1},
{"mvfr2_el1", A64SysReg_MVFR2_EL1},
@@ -892,13 +911,13 @@
{"ich_elsr_el2", A64SysReg_ICH_ELSR_EL2}
};
-SysRegMapper AArch64_MRSMapper = {
+A64SysRegMapper AArch64_MRSMapper = {
NULL,
MRSPairs,
ARR_SIZE(MRSPairs),
};
-static NamedImmMapper_Mapping MSRPairs[] = {
+static A64NamedImmMapper_Mapping MSRPairs[] = {
{"dbgdtrtx_el0", A64SysReg_DBGDTRTX_EL0},
{"oslar_el1", A64SysReg_OSLAR_EL1},
{"pmswinc_el0", A64SysReg_PMSWINC_EL0},
@@ -916,83 +935,10 @@
{"icc_sgi0r_el1", A64SysReg_ICC_SGI0R_EL1}
};
-SysRegMapper AArch64_MSRMapper = {
+A64SysRegMapper AArch64_MSRMapper = {
NULL,
MSRPairs,
ARR_SIZE(MSRPairs),
};
-// Encoding of the immediate for logical (immediate) instructions:
-//
-// | N | imms | immr | size | R | S |
-// |---+--------+--------+------+--------------+--------------|
-// | 1 | ssssss | rrrrrr | 64 | UInt(rrrrrr) | UInt(ssssss) |
-// | 0 | 0sssss | xrrrrr | 32 | UInt(rrrrr) | UInt(sssss) |
-// | 0 | 10ssss | xxrrrr | 16 | UInt(rrrr) | UInt(ssss) |
-// | 0 | 110sss | xxxrrr | 8 | UInt(rrr) | UInt(sss) |
-// | 0 | 1110ss | xxxxrr | 4 | UInt(rr) | UInt(ss) |
-// | 0 | 11110s | xxxxxr | 2 | UInt(r) | UInt(s) |
-// | 0 | 11111x | - | | UNALLOCATED | |
-//
-// Columns 'R', 'S' and 'size' specify a "bitmask immediate" of size bits in
-// which the lower S+1 bits are ones and the remaining bits are zero, then
-// rotated right by R bits, which is then replicated across the datapath.
-//
-// + Values of 'N', 'imms' and 'immr' which do not match the above table are
-// RESERVED.
-// + If all 's' bits in the imms field are set then the instruction is
-// RESERVED.
-// + The 'x' bits in the 'immr' field are IGNORED.
-bool A64Imms_isLogicalImmBits(unsigned RegWidth, uint32_t Bits, uint64_t *Imm)
-{
- uint32_t N = Bits >> 12;
- uint32_t ImmR = (Bits >> 6) & 0x3f;
- uint32_t ImmS = Bits & 0x3f;
- uint64_t Mask, WidthMask;
- unsigned i;
- int Width = 0, Num1s, Rotation;
-
- // N=1 encodes a 64-bit replication and is invalid for the 32-bit
- // instructions.
- if (RegWidth == 32 && N != 0) return false;
-
- if (N == 1)
- Width = 64;
- else if ((ImmS & 0x20) == 0)
- Width = 32;
- else if ((ImmS & 0x10) == 0)
- Width = 16;
- else if ((ImmS & 0x08) == 0)
- Width = 8;
- else if ((ImmS & 0x04) == 0)
- Width = 4;
- else if ((ImmS & 0x02) == 0)
- Width = 2;
- else {
- // ImmS is 0b11111x: UNALLOCATED
- return false;
- }
-
- Num1s = (ImmS & (Width - 1)) + 1;
-
- // All encodings which would map to -1 (signed) are RESERVED.
- if (Num1s == Width)
- return false;
-
- Rotation = (ImmR & (Width - 1));
- Mask = (1ULL << Num1s) - 1;
- WidthMask = Width == 64 ? -1 : (1ULL << Width) - 1;
- if (Rotation != 0 && Rotation != 64)
- Mask = (Mask >> Rotation)
- | ((Mask << (Width - Rotation)) & WidthMask);
-
- *Imm = Mask;
- for (i = 1; i < RegWidth / Width; ++i) {
- Mask <<= Width;
- *Imm |= Mask;
- }
-
- return true;
-}
-
#endif
diff --git a/arch/AArch64/AArch64BaseInfo.h b/arch/AArch64/AArch64BaseInfo.h
index 9dca1b3..1dba3b4 100644
--- a/arch/AArch64/AArch64BaseInfo.h
+++ b/arch/AArch64/AArch64BaseInfo.h
@@ -24,50 +24,58 @@
#include <stdint.h>
#include <string.h>
-/// Instances of this class can perform bidirectional mapping from random
-/// identifier strings to operand encodings. For example "MSR" takes a named
-/// system-register which must be encoded somehow and decoded for printing. This
-/// central location means that the information for those transformations is not
-/// duplicated and remains in sync.
-///
-/// FIXME: currently the algorithm is a completely unoptimised linear
-/// search. Obviously this could be improved, but we would probably want to work
-/// out just how often these instructions are emitted before working on it. It
-/// might even be optimal to just reorder the tables for the common instructions
-/// rather than changing the algorithm.
-typedef struct NamedImmMapper_Mapping {
- char *Name;
- uint32_t Value;
-} NamedImmMapper_Mapping;
+#ifndef __cplusplus
+#if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64)
+#define inline /* inline */
+#endif
+#endif
-typedef struct NamedImmMapper {
- NamedImmMapper_Mapping *Pairs;
- size_t NumPairs;
- uint32_t TooBigImm;
-} NamedImmMapper;
+inline static unsigned getWRegFromXReg(unsigned Reg)
+{
+ switch (Reg) {
+ case ARM64_REG_X0: return ARM64_REG_W0;
+ case ARM64_REG_X1: return ARM64_REG_W1;
+ case ARM64_REG_X2: return ARM64_REG_W2;
+ case ARM64_REG_X3: return ARM64_REG_W3;
+ case ARM64_REG_X4: return ARM64_REG_W4;
+ case ARM64_REG_X5: return ARM64_REG_W5;
+ case ARM64_REG_X6: return ARM64_REG_W6;
+ case ARM64_REG_X7: return ARM64_REG_W7;
+ case ARM64_REG_X8: return ARM64_REG_W8;
+ case ARM64_REG_X9: return ARM64_REG_W9;
+ case ARM64_REG_X10: return ARM64_REG_W10;
+ case ARM64_REG_X11: return ARM64_REG_W11;
+ case ARM64_REG_X12: return ARM64_REG_W12;
+ case ARM64_REG_X13: return ARM64_REG_W13;
+ case ARM64_REG_X14: return ARM64_REG_W14;
+ case ARM64_REG_X15: return ARM64_REG_W15;
+ case ARM64_REG_X16: return ARM64_REG_W16;
+ case ARM64_REG_X17: return ARM64_REG_W17;
+ case ARM64_REG_X18: return ARM64_REG_W18;
+ case ARM64_REG_X19: return ARM64_REG_W19;
+ case ARM64_REG_X20: return ARM64_REG_W20;
+ case ARM64_REG_X21: return ARM64_REG_W21;
+ case ARM64_REG_X22: return ARM64_REG_W22;
+ case ARM64_REG_X23: return ARM64_REG_W23;
+ case ARM64_REG_X24: return ARM64_REG_W24;
+ case ARM64_REG_X25: return ARM64_REG_W25;
+ case ARM64_REG_X26: return ARM64_REG_W26;
+ case ARM64_REG_X27: return ARM64_REG_W27;
+ case ARM64_REG_X28: return ARM64_REG_W28;
+ case ARM64_REG_FP: return ARM64_REG_W29;
+ case ARM64_REG_LR: return ARM64_REG_W30;
+ case ARM64_REG_SP: return ARM64_REG_WSP;
+ case ARM64_REG_XZR: return ARM64_REG_WZR;
+ }
-typedef struct SysRegMapper {
- NamedImmMapper_Mapping *SysRegPairs;
- NamedImmMapper_Mapping *InstPairs;
- size_t NumInstPairs;
-} SysRegMapper;
-
-extern SysRegMapper AArch64_MSRMapper;
-extern SysRegMapper AArch64_MRSMapper;
-
-extern NamedImmMapper A64DB_DBarrierMapper;
-extern NamedImmMapper A64AT_ATMapper;
-extern NamedImmMapper A64DC_DCMapper;
-extern NamedImmMapper A64IC_ICMapper;
-extern NamedImmMapper A64ISB_ISBMapper;
-extern NamedImmMapper A64PRFM_PRFMMapper;
-extern NamedImmMapper A64PState_PStateMapper;
-extern NamedImmMapper A64TLBI_TLBIMapper;
+ // For anything else, return it unchanged.
+ return Reg;
+}
// // Enums corresponding to AArch64 condition codes
// The CondCodes constants map directly to the 4-bit encoding of the
// condition field for predicated instructions.
-typedef enum A64CC_CondCodes { // Meaning (integer) Meaning (floating-point)
+typedef enum A64CC_CondCode { // Meaning (integer) Meaning (floating-point)
A64CC_EQ = 0, // Equal Equal
A64CC_NE, // Not equal Not equal, or unordered
A64CC_HS, // Unsigned higher or same >, ==, or unordered
@@ -84,17 +92,11 @@
A64CC_LE, // Signed less than or equal <, ==, or unordered
A64CC_AL, // Always (unconditional) Always (unconditional)
A64CC_NV, // Always (unconditional) Always (unconditional)
- // Note the NV exists purely to disassemble 0b1111. Execution
- // is "always".
+ // Note the NV exists purely to disassemble 0b1111. Execution is "always".
A64CC_Invalid
-} A64CC_CondCodes;
+} A64CC_CondCode;
-#ifndef __cplusplus
-#if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64)
-#define inline /* inline */
-#endif
-#endif
-inline static char *A64CondCodeToString(A64CC_CondCodes CC)
+inline static char *getCondCodeName(A64CC_CondCode CC)
{
switch (CC) {
default: return NULL; // never reach
@@ -117,6 +119,52 @@
}
}
+inline static A64CC_CondCode getInvertedCondCode(A64CC_CondCode Code)
+{
+ // To reverse a condition it's necessary to only invert the low bit:
+ return (A64CC_CondCode)((unsigned)Code ^ 0x1);
+}
+
+/// Instances of this class can perform bidirectional mapping from random
+/// identifier strings to operand encodings. For example "MSR" takes a named
+/// system-register which must be encoded somehow and decoded for printing. This
+/// central location means that the information for those transformations is not
+/// duplicated and remains in sync.
+///
+/// FIXME: currently the algorithm is a completely unoptimised linear
+/// search. Obviously this could be improved, but we would probably want to work
+/// out just how often these instructions are emitted before working on it. It
+/// might even be optimal to just reorder the tables for the common instructions
+/// rather than changing the algorithm.
+typedef struct A64NamedImmMapper_Mapping {
+ char *Name;
+ uint32_t Value;
+} A64NamedImmMapper_Mapping;
+
+typedef struct A64NamedImmMapper {
+ A64NamedImmMapper_Mapping *Pairs;
+ size_t NumPairs;
+ uint32_t TooBigImm;
+} A64NamedImmMapper;
+
+typedef struct A64SysRegMapper {
+ A64NamedImmMapper_Mapping *SysRegPairs;
+ A64NamedImmMapper_Mapping *InstPairs;
+ size_t NumInstPairs;
+} A64SysRegMapper;
+
+extern A64SysRegMapper AArch64_MSRMapper;
+extern A64SysRegMapper AArch64_MRSMapper;
+
+extern A64NamedImmMapper A64DB_DBarrierMapper;
+extern A64NamedImmMapper A64AT_ATMapper;
+extern A64NamedImmMapper A64DC_DCMapper;
+extern A64NamedImmMapper A64IC_ICMapper;
+extern A64NamedImmMapper A64ISB_ISBMapper;
+extern A64NamedImmMapper A64PRFM_PRFMMapper;
+extern A64NamedImmMapper A64PState_PStateMapper;
+extern A64NamedImmMapper A64TLBI_TLBIMapper;
+
enum {
A64AT_Invalid = -1, // Op0 Op1 CRn CRm Op2
A64AT_S1E1R = 0x43c0, // 01 000 0111 1000 000
@@ -133,7 +181,7 @@
A64AT_S12E0W = 0x63c7 // 01 100 0111 1000 111
};
-enum DBValues {
+enum A64DBValues {
A64DB_Invalid = -1,
A64DB_OSHLD = 0x1,
A64DB_OSHST = 0x2,
@@ -149,7 +197,7 @@
A64DB_SY = 0xf
};
-enum DCValues {
+enum A64DCValues {
A64DC_Invalid = -1, // Op1 CRn CRm Op2
A64DC_ZVA = 0x5ba1, // 01 011 0111 0100 001
A64DC_IVAC = 0x43b1, // 01 000 0111 0110 001
@@ -161,19 +209,19 @@
A64DC_CISW = 0x43f2 // 01 000 0111 1110 010
};
-enum ICValues {
+enum A64ICValues {
A64IC_Invalid = -1, // Op1 CRn CRm Op2
A64IC_IALLUIS = 0x0388, // 000 0111 0001 000
A64IC_IALLU = 0x03a8, // 000 0111 0101 000
A64IC_IVAU = 0x1ba9 // 011 0111 0101 001
};
-enum ISBValues {
+enum A64ISBValues {
A64ISB_Invalid = -1,
A64ISB_SY = 0xf
};
-enum PRFMValues {
+enum A64PRFMValues {
A64PRFM_Invalid = -1,
A64PRFM_PLDL1KEEP = 0x00,
A64PRFM_PLDL1STRM = 0x01,
@@ -195,7 +243,7 @@
A64PRFM_PSTL3STRM = 0x15
};
-enum PStateValues {
+enum A64PStateValues {
A64PState_Invalid = -1,
A64PState_SPSel = 0x05,
A64PState_DAIFSet = 0x1e,
@@ -241,8 +289,7 @@
A64Layout_VL_D
} A64Layout_VectorLayout;
-inline static const char *
-A64VectorLayoutToString(A64Layout_VectorLayout Layout)
+inline static char *A64VectorLayoutToString(A64Layout_VectorLayout Layout)
{
switch (Layout) {
case A64Layout_VL_8B: return ".8b";
@@ -261,7 +308,7 @@
}
}
-enum SysRegROValues {
+enum A64SysRegROValues {
A64SysReg_MDCCSR_EL0 = 0x9808, // 10 011 0000 0001 000
A64SysReg_DBGDTRRX_EL0 = 0x9828, // 10 011 0000 0101 000
A64SysReg_MDRAR_EL1 = 0x8080, // 10 000 0001 0000 000
@@ -291,16 +338,16 @@
A64SysReg_ID_ISAR3_EL1 = 0xc013, // 11 000 0000 0010 011
A64SysReg_ID_ISAR4_EL1 = 0xc014, // 11 000 0000 0010 100
A64SysReg_ID_ISAR5_EL1 = 0xc015, // 11 000 0000 0010 101
- A64SysReg_ID_AA64PFR0_EL1 = 0xc020, // 11 000 0000 0100 000
- A64SysReg_ID_AA64PFR1_EL1 = 0xc021, // 11 000 0000 0100 001
- A64SysReg_ID_AA64DFR0_EL1 = 0xc028, // 11 000 0000 0101 000
- A64SysReg_ID_AA64DFR1_EL1 = 0xc029, // 11 000 0000 0101 001
- A64SysReg_ID_AA64AFR0_EL1 = 0xc02c, // 11 000 0000 0101 100
- A64SysReg_ID_AA64AFR1_EL1 = 0xc02d, // 11 000 0000 0101 101
- A64SysReg_ID_AA64ISAR0_EL1 = 0xc030, // 11 000 0000 0110 000
- A64SysReg_ID_AA64ISAR1_EL1 = 0xc031, // 11 000 0000 0110 001
- A64SysReg_ID_AA64MMFR0_EL1 = 0xc038, // 11 000 0000 0111 000
- A64SysReg_ID_AA64MMFR1_EL1 = 0xc039, // 11 000 0000 0111 001
+ A64SysReg_ID_A64PFR0_EL1 = 0xc020, // 11 000 0000 0100 000
+ A64SysReg_ID_A64PFR1_EL1 = 0xc021, // 11 000 0000 0100 001
+ A64SysReg_ID_A64DFR0_EL1 = 0xc028, // 11 000 0000 0101 000
+ A64SysReg_ID_A64DFR1_EL1 = 0xc029, // 11 000 0000 0101 001
+ A64SysReg_ID_A64AFR0_EL1 = 0xc02c, // 11 000 0000 0101 100
+ A64SysReg_ID_A64AFR1_EL1 = 0xc02d, // 11 000 0000 0101 101
+ A64SysReg_ID_A64ISAR0_EL1 = 0xc030, // 11 000 0000 0110 000
+ A64SysReg_ID_A64ISAR1_EL1 = 0xc031, // 11 000 0000 0110 001
+ A64SysReg_ID_A64MMFR0_EL1 = 0xc038, // 11 000 0000 0111 000
+ A64SysReg_ID_A64MMFR1_EL1 = 0xc039, // 11 000 0000 0111 001
A64SysReg_MVFR0_EL1 = 0xc018, // 11 000 0000 0011 000
A64SysReg_MVFR1_EL1 = 0xc019, // 11 000 0000 0011 001
A64SysReg_MVFR2_EL1 = 0xc01a, // 11 000 0000 0011 010
@@ -360,7 +407,7 @@
A64SysReg_ICH_ELSR_EL2 = 0xe65d // 11 100 1100 1011 101
};
-enum SysRegWOValues {
+enum A64SysRegWOValues {
A64SysReg_DBGDTRTX_EL0 = 0x9828, // 10 011 0000 0101 000
A64SysReg_OSLAR_EL1 = 0x8084, // 10 000 0001 0000 100
A64SysReg_PMSWINC_EL0 = 0xdce4, // 11 011 1001 1100 100
@@ -378,7 +425,7 @@
A64SysReg_ICC_SGI0R_EL1 = 0xc65f // 11 000 1100 1011 111
};
-enum SysRegValues {
+enum A64SysRegValues {
A64SysReg_Invalid = -1, // Op0 Op1 CRn CRm Op2
A64SysReg_OSDTRRX_EL1 = 0x8002, // 10 000 0000 0000 010
A64SysReg_OSDTRTX_EL1 = 0x801a, // 10 000 0000 0011 010
@@ -858,7 +905,12 @@
A64SysReg_ICH_LR15_EL2 = 0xe66f // 11 100 1100 1101 111
};
-enum TLBIValues {
+// Cyclone specific system registers
+enum A64CycloneSysRegValues {
+ A64SysReg_CPM_IOACC_CTL_EL3 = 0xff90
+};
+
+enum A64TLBIValues {
A64TLBI_Invalid = -1, // Op0 Op1 CRn CRm Op2
A64TLBI_IPAS2E1IS = 0x6401, // 01 100 1000 0000 001
A64TLBI_IPAS2LE1IS = 0x6405, // 01 100 1000 0000 101
@@ -896,12 +948,12 @@
bool A64Imms_isLogicalImmBits(unsigned RegWidth, uint32_t Bits, uint64_t *Imm);
-char *NamedImmMapper_toString(NamedImmMapper *N, uint32_t Value, bool *Valid);
+char *A64NamedImmMapper_toString(A64NamedImmMapper *N, uint32_t Value, bool *Valid);
-uint32_t NamedImmMapper_fromString(NamedImmMapper *N, char *Name, bool *Valid);
+uint32_t A64NamedImmMapper_fromString(A64NamedImmMapper *N, char *Name, bool *Valid);
-bool NamedImmMapper_validImm(NamedImmMapper *N, uint32_t Value);
+bool A64NamedImmMapper_validImm(A64NamedImmMapper *N, uint32_t Value);
-void SysRegMapper_toString(SysRegMapper *S, uint32_t Bits, bool *Valid, char *result);
+void A64SysRegMapper_toString(A64SysRegMapper *S, uint32_t Bits, bool *Valid, char *result);
#endif
diff --git a/arch/AArch64/AArch64Disassembler.c b/arch/AArch64/AArch64Disassembler.c
index 8a3f207..5892e13 100644
--- a/arch/AArch64/AArch64Disassembler.c
+++ b/arch/AArch64/AArch64Disassembler.c
@@ -31,204 +31,156 @@
#include "../../MCDisassembler.h"
#include "AArch64BaseInfo.h"
+#include "AArch64AddressingModes.h"
-// Forward-declarations used in the auto-generated files.
-static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder);
-static DecodeStatus DecodeGPR64xspRegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder);
-static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder);
-static DecodeStatus DecodeGPR32wspRegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder);
-
-static DecodeStatus DecodeFPR8RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder);
-static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder);
-static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder);
-static DecodeStatus DecodeFPR64RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder);
-static DecodeStatus DecodeFPR64LoRegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder);
+// Forward declare these because the autogenerated code will reference them.
+// Definitions are further down.
static DecodeStatus DecodeFPR128RegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address,
void *Decoder);
-static DecodeStatus DecodeFPR128LoRegisterClass(MCInst *Inst,
- unsigned RegNo, uint64_t Address,
- void *Decoder);
-
-static DecodeStatus DecodeGPR64noxzrRegisterClass(MCInst *Inst,
+static DecodeStatus DecodeFPR128_loRegisterClass(MCInst *Inst,
unsigned RegNo,
uint64_t Address,
void *Decoder);
-
-static DecodeStatus DecodeDPairRegisterClass(MCInst *Inst, unsigned RegNo,
+static DecodeStatus DecodeFPR64RegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Address,
void *Decoder);
-static DecodeStatus DecodeQPairRegisterClass(MCInst *Inst, unsigned RegNo,
+static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Address,
void *Decoder);
-static DecodeStatus DecodeDTripleRegisterClass(MCInst *Inst,
+static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeFPR8RegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeGPR64spRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address,
void *Decoder);
-static DecodeStatus DecodeQTripleRegisterClass(MCInst *Inst,
+static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeGPR32spRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address,
void *Decoder);
-static DecodeStatus DecodeDQuadRegisterClass(MCInst *Inst, unsigned RegNo,
+static DecodeStatus DecodeQQRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Address,
void *Decoder);
-static DecodeStatus DecodeQQuadRegisterClass(MCInst *Inst, unsigned RegNo,
+static DecodeStatus DecodeQQQRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeQQQQRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeDDRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeDDDRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeDDDDRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Address,
void *Decoder);
-static DecodeStatus DecodeAddrRegExtendOperand(MCInst *Inst,
- unsigned OptionHiS,
+static DecodeStatus DecodeFixedPointScaleImm32(MCInst *Inst, unsigned Imm,
uint64_t Address,
void *Decoder);
-
-static DecodeStatus DecodeBitfield32ImmOperand(MCInst *Inst,
- unsigned Imm6Bits,
+static DecodeStatus DecodeFixedPointScaleImm64(MCInst *Inst, unsigned Imm,
uint64_t Address,
void *Decoder);
-
-static DecodeStatus DecodeCVT32FixedPosOperand(MCInst *Inst,
- unsigned Imm6Bits,
- uint64_t Address,
- void *Decoder);
-
-static DecodeStatus DecodeFPZeroOperand(MCInst *Inst,
- unsigned RmBits,
- uint64_t Address,
- void *Decoder);
-
-static DecodeStatus DecodeShiftRightImm8(MCInst *Inst, unsigned Val,
+static DecodeStatus DecodePCRelLabel19(MCInst *Inst, unsigned Imm,
uint64_t Address, void *Decoder);
-static DecodeStatus DecodeShiftRightImm16(MCInst *Inst, unsigned Val,
- uint64_t Address,
- void *Decoder);
-static DecodeStatus DecodeShiftRightImm32(MCInst *Inst, unsigned Val,
- uint64_t Address,
- void *Decoder);
-static DecodeStatus DecodeShiftRightImm64(MCInst *Inst, unsigned Val,
- uint64_t Address,
- void *Decoder);
-
-static DecodeStatus DecodeShiftLeftImm8(MCInst *Inst, unsigned Val,
+static DecodeStatus DecodeMemExtend(MCInst *Inst, unsigned Imm,
uint64_t Address, void *Decoder);
-static DecodeStatus DecodeShiftLeftImm16(MCInst *Inst, unsigned Val,
+static DecodeStatus DecodeMRSSystemRegister(MCInst *Inst, unsigned Imm,
+ uint64_t Address, void *Decoder);
+static DecodeStatus DecodeMSRSystemRegister(MCInst *Inst, unsigned Imm,
+ uint64_t Address, void *Decoder);
+static DecodeStatus DecodeThreeAddrSRegInstruction(MCInst *Inst,
+ uint32_t insn,
uint64_t Address,
void *Decoder);
-static DecodeStatus DecodeShiftLeftImm32(MCInst *Inst, unsigned Val,
+static DecodeStatus DecodeMoveImmInstruction(MCInst *Inst, uint32_t insn,
uint64_t Address,
void *Decoder);
-static DecodeStatus DecodeShiftLeftImm64(MCInst *Inst, unsigned Val,
+static DecodeStatus DecodeUnsignedLdStInstruction(MCInst *Inst,
+ uint32_t insn,
uint64_t Address,
void *Decoder);
-
-static DecodeStatus DecodeMoveWideImmOperand(MCInst *Inst,
- unsigned FullImm,
- uint64_t Address,
- void *Decoder, int RegWidth);
-
-static DecodeStatus DecodeLogicalImmOperand(MCInst *Inst,
- unsigned Bits,
- uint64_t Address,
- void *Decoder, int RegWidth);
-
-static DecodeStatus DecodeRegExtendOperand(MCInst *Inst,
- unsigned ShiftAmount,
+static DecodeStatus DecodeSignedLdStInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeExclusiveLdStInstruction(MCInst *Inst,
+ uint32_t insn,
uint64_t Address,
void *Decoder);
-
-static DecodeStatus
-DecodeNeonMovImmShiftOperand(MCInst *Inst, unsigned ShiftAmount,
- uint64_t Address, void *Decoder, A64SE_ShiftExtSpecifiers Ext, bool IsHalf);
-
-static DecodeStatus Decode32BitShiftOperand(MCInst *Inst,
- unsigned ShiftAmount,
+static DecodeStatus DecodePairLdStInstruction(MCInst *Inst, uint32_t insn,
uint64_t Address,
void *Decoder);
-static DecodeStatus DecodeBitfieldInstruction(MCInst *Inst, unsigned Insn,
+static DecodeStatus DecodeAddSubERegInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeLogicalImmInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeModImmInstruction(MCInst *Inst, uint32_t insn,
uint64_t Address,
void *Decoder);
+static DecodeStatus DecodeModImmTiedInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeAdrInstruction(MCInst *Inst, uint32_t insn,
+ uint64_t Address, void *Decoder);
+static DecodeStatus DecodeBaseAddSubImm(MCInst *Inst, uint32_t insn,
+ uint64_t Address, void *Decoder);
+static DecodeStatus DecodeUnconditionalBranch(MCInst *Inst, uint32_t insn,
+ uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeSystemPStateInstruction(MCInst *Inst,
+ uint32_t insn,
+ uint64_t Address,
+ void *Decoder);
+static DecodeStatus DecodeTestAndBranch(MCInst *Inst, uint32_t insn,
+ uint64_t Address, void *Decoder);
static DecodeStatus DecodeFMOVLaneInstruction(MCInst *Inst, unsigned Insn,
uint64_t Address,
void *Decoder);
-
-static DecodeStatus DecodeLDSTPairInstruction(MCInst *Inst,
- unsigned Insn,
- uint64_t Address,
+static DecodeStatus DecodeVecShiftR64Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder);
+static DecodeStatus DecodeVecShiftR64ImmNarrow(MCInst *Inst, unsigned Imm,
+ uint64_t Addr,
void *Decoder);
-
-static DecodeStatus DecodeLoadPairExclusiveInstruction(MCInst *Inst,
- uint32_t Val,
- uint64_t Address,
+static DecodeStatus DecodeVecShiftR32Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder);
+static DecodeStatus DecodeVecShiftR32ImmNarrow(MCInst *Inst, unsigned Imm,
+ uint64_t Addr,
void *Decoder);
-
-static DecodeStatus DecodeNamedImmOperand(MCInst *Inst,
- unsigned Val,
- uint64_t Address,
- void *Decoder, NamedImmMapper *N);
-
-static DecodeStatus
-DecodeSysRegOperand(SysRegMapper *InstMapper,
- MCInst *Inst, unsigned Val,
- uint64_t Address, void *Decoder);
-
-static DecodeStatus DecodeMRSOperand(MCInst *Inst,
- unsigned Val,
- uint64_t Address,
+static DecodeStatus DecodeVecShiftR16Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder);
+static DecodeStatus DecodeVecShiftR16ImmNarrow(MCInst *Inst, unsigned Imm,
+ uint64_t Addr,
void *Decoder);
-
-static DecodeStatus DecodeMSROperand(MCInst *Inst,
- unsigned Val,
- uint64_t Address,
- void *Decoder);
-
-static DecodeStatus DecodeSingleIndexedInstruction(MCInst *Inst,
- unsigned Val,
- uint64_t Address,
- void *Decoder);
-
-static DecodeStatus DecodeVLDSTPostInstruction(MCInst *Inst, unsigned Val,
- uint64_t Address,
- void *Decoder);
-
-static DecodeStatus DecodeVLDSTLanePostInstruction(MCInst *Inst, unsigned Insn,
- uint64_t Address,
- void *Decoder);
-
-static DecodeStatus DecodeSHLLInstruction(MCInst *Inst, unsigned Insn,
- uint64_t Address,
- void *Decoder);
-
-static bool Check(DecodeStatus *Out, DecodeStatus In);
-
-#define GET_SUBTARGETINFO_ENUM
-#include "AArch64GenSubtargetInfo.inc"
-
-// Hacky: enable all features for disassembler
-static uint64_t getFeatureBits(int feature)
-{
- // enable all features
- return (uint64_t)-1;
-}
-
-#include "AArch64GenDisassemblerTables.inc"
-
-#define GET_INSTRINFO_ENUM
-#include "AArch64GenInstrInfo.inc"
-
-#define GET_REGINFO_ENUM
-#include "AArch64GenRegisterInfo.inc"
+static DecodeStatus DecodeVecShiftR8Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder);
+static DecodeStatus DecodeVecShiftL64Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder);
+static DecodeStatus DecodeVecShiftL32Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder);
+static DecodeStatus DecodeVecShiftL16Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder);
+static DecodeStatus DecodeVecShiftL8Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder);
static bool Check(DecodeStatus *Out, DecodeStatus In)
{
switch (In) {
+ default: // never reach
+ return true;
case MCDisassembler_Success:
// Out stays the same.
return true;
@@ -238,25 +190,32 @@
case MCDisassembler_Fail:
*Out = In;
return false;
- default:
- return false; // never reach
}
+ // llvm_unreachable("Invalid DecodeStatus!");
}
+// Hacky: enable all features for disassembler
+static uint64_t getFeatureBits(int feature)
+{
+ // enable all features
+ return (uint64_t)-1;
+}
+
+#define GET_SUBTARGETINFO_ENUM
+#include "AArch64GenSubtargetInfo.inc"
+
+#include "AArch64GenDisassemblerTables.inc"
+
+#define GET_INSTRINFO_ENUM
+#include "AArch64GenInstrInfo.inc"
+
+#define GET_REGINFO_ENUM
#define GET_REGINFO_MC_DESC
#include "AArch64GenRegisterInfo.inc"
-void AArch64_init(MCRegisterInfo *MRI)
-{
- MCRegisterInfo_InitMCRegisterInfo(MRI, AArch64RegDesc, 420,
- 0, 0,
- AArch64MCRegisterClasses, 61,
- 0, 0,
- AArch64RegDiffLists,
- 0,
- AArch64SubRegIdxLists, 52,
- 0);
-}
+#define Success MCDisassembler_Success
+#define Fail MCDisassembler_Fail
+#define SoftFail MCDisassembler_SoftFail
static DecodeStatus _getInstruction(cs_struct *ud, MCInst *MI,
const uint8_t *code, size_t code_len,
@@ -284,7 +243,7 @@
(code[1] << 8) | (code[0] << 0);
// Calling the auto-generated decoder function.
- result = decodeInstruction(DecoderTableA6432, MI, insn, Address, MRI, 0);
+ result = decodeInstruction(DecoderTable32, MI, insn, Address, MRI, 0);
if (result != MCDisassembler_Fail) {
*Size = 4;
return result;
@@ -306,494 +265,465 @@
return status == MCDisassembler_Success;
}
-static unsigned getReg(MCRegisterInfo *MRI, unsigned RC, unsigned RegNo)
-{
- MCRegisterClass *rc = MCRegisterInfo_getRegClass(MRI, RC);
- return rc->RegsBegin[RegNo];
-}
-
-static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder)
-{
- uint16_t Register;
-
- if (RegNo > 31)
- return MCDisassembler_Fail;
-
- Register = (uint16_t)getReg(Decoder, AArch64_GPR64RegClassID, RegNo);
- MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeGPR64xspRegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder)
-{
- uint16_t Register;
-
- if (RegNo > 31)
- return MCDisassembler_Fail;
-
- Register = (uint16_t)getReg(Decoder, AArch64_GPR64xspRegClassID, RegNo);
- MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address,
- void *Decoder)
-{
- uint16_t Register;
-
- if (RegNo > 31)
- return MCDisassembler_Fail;
-
- Register = (uint16_t)getReg(Decoder, AArch64_GPR32RegClassID, RegNo);
- MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeGPR32wspRegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder)
-{
- uint16_t Register;
-
- if (RegNo > 31)
- return MCDisassembler_Fail;
-
- Register = (uint16_t)getReg(Decoder, AArch64_GPR32wspRegClassID, RegNo);
- MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeFPR8RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder)
-{
- uint16_t Register;
-
- if (RegNo > 31)
- return MCDisassembler_Fail;
-
- Register = (uint16_t)getReg(Decoder, AArch64_FPR8RegClassID, RegNo);
- MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder)
-{
- uint16_t Register;
-
- if (RegNo > 31)
- return MCDisassembler_Fail;
-
- Register = (uint16_t)getReg(Decoder, AArch64_FPR16RegClassID, RegNo);
- MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
-}
-
-
-static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder)
-{
- uint16_t Register;
-
- if (RegNo > 31)
- return MCDisassembler_Fail;
-
- Register = (uint16_t)getReg(Decoder, AArch64_FPR32RegClassID, RegNo);
- MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeFPR64RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder)
-{
- uint16_t Register;
-
- if (RegNo > 31)
- return MCDisassembler_Fail;
-
- Register = (uint16_t)getReg(Decoder, AArch64_FPR64RegClassID, RegNo);
- MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeFPR64LoRegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder)
-{
- if (RegNo > 15)
- return MCDisassembler_Fail;
-
- return DecodeFPR64RegisterClass(Inst, RegNo, Address, Decoder);
-}
+static const unsigned FPR128DecoderTable[] = {
+ AArch64_Q0, AArch64_Q1, AArch64_Q2, AArch64_Q3, AArch64_Q4,
+ AArch64_Q5, AArch64_Q6, AArch64_Q7, AArch64_Q8, AArch64_Q9,
+ AArch64_Q10, AArch64_Q11, AArch64_Q12, AArch64_Q13, AArch64_Q14,
+ AArch64_Q15, AArch64_Q16, AArch64_Q17, AArch64_Q18, AArch64_Q19,
+ AArch64_Q20, AArch64_Q21, AArch64_Q22, AArch64_Q23, AArch64_Q24,
+ AArch64_Q25, AArch64_Q26, AArch64_Q27, AArch64_Q28, AArch64_Q29,
+ AArch64_Q30, AArch64_Q31
+};
static DecodeStatus DecodeFPR128RegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder)
+ uint64_t Addr,
+ void *Decoder)
{
- uint16_t Register;
-
+ unsigned Register;
if (RegNo > 31)
- return MCDisassembler_Fail;
+ return Fail;
- Register = (uint16_t)getReg(Decoder, AArch64_FPR128RegClassID, RegNo);
+ Register = FPR128DecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
+ return Success;
}
-static DecodeStatus DecodeFPR128LoRegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address, void *Decoder)
+static DecodeStatus DecodeFPR128_loRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
{
if (RegNo > 15)
- return MCDisassembler_Fail;
+ return Fail;
- return DecodeFPR128RegisterClass(Inst, RegNo, Address, Decoder);
+ return DecodeFPR128RegisterClass(Inst, RegNo, Addr, Decoder);
}
-static DecodeStatus DecodeGPR64noxzrRegisterClass(MCInst *Inst,
- unsigned RegNo,
- uint64_t Address,
+static const unsigned FPR64DecoderTable[] = {
+ AArch64_D0, AArch64_D1, AArch64_D2, AArch64_D3, AArch64_D4,
+ AArch64_D5, AArch64_D6, AArch64_D7, AArch64_D8, AArch64_D9,
+ AArch64_D10, AArch64_D11, AArch64_D12, AArch64_D13, AArch64_D14,
+ AArch64_D15, AArch64_D16, AArch64_D17, AArch64_D18, AArch64_D19,
+ AArch64_D20, AArch64_D21, AArch64_D22, AArch64_D23, AArch64_D24,
+ AArch64_D25, AArch64_D26, AArch64_D27, AArch64_D28, AArch64_D29,
+ AArch64_D30, AArch64_D31
+};
+
+static DecodeStatus DecodeFPR64RegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
void *Decoder)
{
- uint16_t Register;
-
- if (RegNo > 30)
- return MCDisassembler_Fail;
-
- Register = (uint16_t)getReg(Decoder, AArch64_GPR64noxzrRegClassID, RegNo);
- MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeRegisterClassByID(MCInst *Inst, unsigned RegNo,
- unsigned RegID,
- void *Decoder)
-{
- uint16_t Register;
+ unsigned Register;
if (RegNo > 31)
- return MCDisassembler_Fail;
+ return Fail;
- Register = (uint16_t)getReg(Decoder, RegID, RegNo);
+ Register = FPR64DecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
- return MCDisassembler_Success;
+ return Success;
}
-static DecodeStatus DecodeDPairRegisterClass(MCInst *Inst, unsigned RegNo,
+static const unsigned FPR32DecoderTable[] = {
+ AArch64_S0, AArch64_S1, AArch64_S2, AArch64_S3, AArch64_S4,
+ AArch64_S5, AArch64_S6, AArch64_S7, AArch64_S8, AArch64_S9,
+ AArch64_S10, AArch64_S11, AArch64_S12, AArch64_S13, AArch64_S14,
+ AArch64_S15, AArch64_S16, AArch64_S17, AArch64_S18, AArch64_S19,
+ AArch64_S20, AArch64_S21, AArch64_S22, AArch64_S23, AArch64_S24,
+ AArch64_S25, AArch64_S26, AArch64_S27, AArch64_S28, AArch64_S29,
+ AArch64_S30, AArch64_S31
+};
+
+static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = FPR32DecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static const unsigned FPR16DecoderTable[] = {
+ AArch64_H0, AArch64_H1, AArch64_H2, AArch64_H3, AArch64_H4,
+ AArch64_H5, AArch64_H6, AArch64_H7, AArch64_H8, AArch64_H9,
+ AArch64_H10, AArch64_H11, AArch64_H12, AArch64_H13, AArch64_H14,
+ AArch64_H15, AArch64_H16, AArch64_H17, AArch64_H18, AArch64_H19,
+ AArch64_H20, AArch64_H21, AArch64_H22, AArch64_H23, AArch64_H24,
+ AArch64_H25, AArch64_H26, AArch64_H27, AArch64_H28, AArch64_H29,
+ AArch64_H30, AArch64_H31
+};
+
+static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = FPR16DecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static const unsigned FPR8DecoderTable[] = {
+ AArch64_B0, AArch64_B1, AArch64_B2, AArch64_B3, AArch64_B4,
+ AArch64_B5, AArch64_B6, AArch64_B7, AArch64_B8, AArch64_B9,
+ AArch64_B10, AArch64_B11, AArch64_B12, AArch64_B13, AArch64_B14,
+ AArch64_B15, AArch64_B16, AArch64_B17, AArch64_B18, AArch64_B19,
+ AArch64_B20, AArch64_B21, AArch64_B22, AArch64_B23, AArch64_B24,
+ AArch64_B25, AArch64_B26, AArch64_B27, AArch64_B28, AArch64_B29,
+ AArch64_B30, AArch64_B31
+};
+
+static DecodeStatus DecodeFPR8RegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = FPR8DecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static const unsigned GPR64DecoderTable[] = {
+ AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4,
+ AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9,
+ AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14,
+ AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19,
+ AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24,
+ AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_FP,
+ AArch64_LR, AArch64_XZR
+};
+
+static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = GPR64DecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static DecodeStatus DecodeGPR64spRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = GPR64DecoderTable[RegNo];
+ if (Register == AArch64_XZR)
+ Register = AArch64_SP;
+
+ MCOperand_CreateReg0(Inst, Register);
+
+ return Success;
+}
+
+static const unsigned GPR32DecoderTable[] = {
+ AArch64_W0, AArch64_W1, AArch64_W2, AArch64_W3, AArch64_W4,
+ AArch64_W5, AArch64_W6, AArch64_W7, AArch64_W8, AArch64_W9,
+ AArch64_W10, AArch64_W11, AArch64_W12, AArch64_W13, AArch64_W14,
+ AArch64_W15, AArch64_W16, AArch64_W17, AArch64_W18, AArch64_W19,
+ AArch64_W20, AArch64_W21, AArch64_W22, AArch64_W23, AArch64_W24,
+ AArch64_W25, AArch64_W26, AArch64_W27, AArch64_W28, AArch64_W29,
+ AArch64_W30, AArch64_WZR
+};
+
+static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = GPR32DecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static DecodeStatus DecodeGPR32spRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = GPR32DecoderTable[RegNo];
+ if (Register == AArch64_WZR)
+ Register = AArch64_WSP;
+
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static const unsigned VectorDecoderTable[] = {
+ AArch64_Q0, AArch64_Q1, AArch64_Q2, AArch64_Q3, AArch64_Q4,
+ AArch64_Q5, AArch64_Q6, AArch64_Q7, AArch64_Q8, AArch64_Q9,
+ AArch64_Q10, AArch64_Q11, AArch64_Q12, AArch64_Q13, AArch64_Q14,
+ AArch64_Q15, AArch64_Q16, AArch64_Q17, AArch64_Q18, AArch64_Q19,
+ AArch64_Q20, AArch64_Q21, AArch64_Q22, AArch64_Q23, AArch64_Q24,
+ AArch64_Q25, AArch64_Q26, AArch64_Q27, AArch64_Q28, AArch64_Q29,
+ AArch64_Q30, AArch64_Q31
+};
+
+static DecodeStatus DecodeVectorRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = VectorDecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static const unsigned QQDecoderTable[] = {
+ AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4,
+ AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8,
+ AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12,
+ AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q15_Q16,
+ AArch64_Q16_Q17, AArch64_Q17_Q18, AArch64_Q18_Q19, AArch64_Q19_Q20,
+ AArch64_Q20_Q21, AArch64_Q21_Q22, AArch64_Q22_Q23, AArch64_Q23_Q24,
+ AArch64_Q24_Q25, AArch64_Q25_Q26, AArch64_Q26_Q27, AArch64_Q27_Q28,
+ AArch64_Q28_Q29, AArch64_Q29_Q30, AArch64_Q30_Q31, AArch64_Q31_Q0
+};
+
+static DecodeStatus DecodeQQRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr, void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = QQDecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static const unsigned QQQDecoderTable[] = {
+ AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4,
+ AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7,
+ AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10,
+ AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13,
+ AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16,
+ AArch64_Q15_Q16_Q17, AArch64_Q16_Q17_Q18, AArch64_Q17_Q18_Q19,
+ AArch64_Q18_Q19_Q20, AArch64_Q19_Q20_Q21, AArch64_Q20_Q21_Q22,
+ AArch64_Q21_Q22_Q23, AArch64_Q22_Q23_Q24, AArch64_Q23_Q24_Q25,
+ AArch64_Q24_Q25_Q26, AArch64_Q25_Q26_Q27, AArch64_Q26_Q27_Q28,
+ AArch64_Q27_Q28_Q29, AArch64_Q28_Q29_Q30, AArch64_Q29_Q30_Q31,
+ AArch64_Q30_Q31_Q0, AArch64_Q31_Q0_Q1
+};
+
+static DecodeStatus DecodeQQQRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr, void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = QQQDecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static const unsigned QQQQDecoderTable[] = {
+ AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5,
+ AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8,
+ AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11,
+ AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14,
+ AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17,
+ AArch64_Q15_Q16_Q17_Q18, AArch64_Q16_Q17_Q18_Q19, AArch64_Q17_Q18_Q19_Q20,
+ AArch64_Q18_Q19_Q20_Q21, AArch64_Q19_Q20_Q21_Q22, AArch64_Q20_Q21_Q22_Q23,
+ AArch64_Q21_Q22_Q23_Q24, AArch64_Q22_Q23_Q24_Q25, AArch64_Q23_Q24_Q25_Q26,
+ AArch64_Q24_Q25_Q26_Q27, AArch64_Q25_Q26_Q27_Q28, AArch64_Q26_Q27_Q28_Q29,
+ AArch64_Q27_Q28_Q29_Q30, AArch64_Q28_Q29_Q30_Q31, AArch64_Q29_Q30_Q31_Q0,
+ AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2
+};
+
+static DecodeStatus DecodeQQQQRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Register;
+ if (RegNo > 31)
+ return Fail;
+
+ Register = QQQQDecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static const unsigned DDDecoderTable[] = {
+ AArch64_D0_D1, AArch64_D1_D2, AArch64_D2_D3, AArch64_D3_D4,
+ AArch64_D4_D5, AArch64_D5_D6, AArch64_D6_D7, AArch64_D7_D8,
+ AArch64_D8_D9, AArch64_D9_D10, AArch64_D10_D11, AArch64_D11_D12,
+ AArch64_D12_D13, AArch64_D13_D14, AArch64_D14_D15, AArch64_D15_D16,
+ AArch64_D16_D17, AArch64_D17_D18, AArch64_D18_D19, AArch64_D19_D20,
+ AArch64_D20_D21, AArch64_D21_D22, AArch64_D22_D23, AArch64_D23_D24,
+ AArch64_D24_D25, AArch64_D25_D26, AArch64_D26_D27, AArch64_D27_D28,
+ AArch64_D28_D29, AArch64_D29_D30, AArch64_D30_D31, AArch64_D31_D0
+};
+
+static DecodeStatus DecodeDDRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr, void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = DDDecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static const unsigned DDDDecoderTable[] = {
+ AArch64_D0_D1_D2, AArch64_D1_D2_D3, AArch64_D2_D3_D4,
+ AArch64_D3_D4_D5, AArch64_D4_D5_D6, AArch64_D5_D6_D7,
+ AArch64_D6_D7_D8, AArch64_D7_D8_D9, AArch64_D8_D9_D10,
+ AArch64_D9_D10_D11, AArch64_D10_D11_D12, AArch64_D11_D12_D13,
+ AArch64_D12_D13_D14, AArch64_D13_D14_D15, AArch64_D14_D15_D16,
+ AArch64_D15_D16_D17, AArch64_D16_D17_D18, AArch64_D17_D18_D19,
+ AArch64_D18_D19_D20, AArch64_D19_D20_D21, AArch64_D20_D21_D22,
+ AArch64_D21_D22_D23, AArch64_D22_D23_D24, AArch64_D23_D24_D25,
+ AArch64_D24_D25_D26, AArch64_D25_D26_D27, AArch64_D26_D27_D28,
+ AArch64_D27_D28_D29, AArch64_D28_D29_D30, AArch64_D29_D30_D31,
+ AArch64_D30_D31_D0, AArch64_D31_D0_D1
+};
+
+static DecodeStatus DecodeDDDRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr, void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = DDDDecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static const unsigned DDDDDecoderTable[] = {
+ AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5,
+ AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8,
+ AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11,
+ AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14,
+ AArch64_D12_D13_D14_D15, AArch64_D13_D14_D15_D16, AArch64_D14_D15_D16_D17,
+ AArch64_D15_D16_D17_D18, AArch64_D16_D17_D18_D19, AArch64_D17_D18_D19_D20,
+ AArch64_D18_D19_D20_D21, AArch64_D19_D20_D21_D22, AArch64_D20_D21_D22_D23,
+ AArch64_D21_D22_D23_D24, AArch64_D22_D23_D24_D25, AArch64_D23_D24_D25_D26,
+ AArch64_D24_D25_D26_D27, AArch64_D25_D26_D27_D28, AArch64_D26_D27_D28_D29,
+ AArch64_D27_D28_D29_D30, AArch64_D28_D29_D30_D31, AArch64_D29_D30_D31_D0,
+ AArch64_D30_D31_D0_D1, AArch64_D31_D0_D1_D2
+};
+
+static DecodeStatus DecodeDDDDRegisterClass(MCInst *Inst, unsigned RegNo,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Register;
+
+ if (RegNo > 31)
+ return Fail;
+
+ Register = DDDDDecoderTable[RegNo];
+ MCOperand_CreateReg0(Inst, Register);
+ return Success;
+}
+
+static DecodeStatus DecodeFixedPointScaleImm32(MCInst *Inst, unsigned Imm,
+ uint64_t Addr,
+ void *Decoder)
+{
+ // scale{5} is asserted as 1 in tblgen.
+ Imm |= 0x20;
+ MCOperand_CreateImm0(Inst, 64 - Imm);
+ return Success;
+}
+
+static DecodeStatus DecodeFixedPointScaleImm64(MCInst *Inst, unsigned Imm,
+ uint64_t Addr,
+ void *Decoder)
+{
+ MCOperand_CreateImm0(Inst, 64 - Imm);
+ return Success;
+}
+
+static DecodeStatus DecodePCRelLabel19(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder)
+{
+ int64_t ImmVal = Imm;
+
+ // Sign-extend 19-bit immediate.
+ if (ImmVal & (1 << (19 - 1)))
+ ImmVal |= ~((1LL << 19) - 1);
+
+ MCOperand_CreateImm0(Inst, ImmVal);
+ return Success;
+}
+
+static DecodeStatus DecodeMemExtend(MCInst *Inst, unsigned Imm,
+ uint64_t Address, void *Decoder)
+{
+ MCOperand_CreateImm0(Inst, (Imm >> 1) & 1);
+ MCOperand_CreateImm0(Inst, Imm & 1);
+ return Success;
+}
+
+static DecodeStatus DecodeMRSSystemRegister(MCInst *Inst, unsigned Imm,
+ uint64_t Address, void *Decoder)
+{
+ bool ValidNamed;
+ char result[128];
+
+ Imm |= 0x8000;
+ MCOperand_CreateImm0(Inst, Imm);
+
+ A64SysRegMapper_toString(&AArch64_MRSMapper, Imm, &ValidNamed, result);
+
+ return ValidNamed ? Success : Fail;
+}
+
+static DecodeStatus DecodeMSRSystemRegister(MCInst *Inst, unsigned Imm,
uint64_t Address,
void *Decoder)
{
- return DecodeRegisterClassByID(Inst, RegNo, AArch64_DPairRegClassID,
- Decoder);
-}
+ bool ValidNamed;
+ char result[128];
-static DecodeStatus DecodeQPairRegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address,
- void *Decoder)
-{
- return DecodeRegisterClassByID(Inst, RegNo, AArch64_QPairRegClassID,
- Decoder);
-}
+ Imm |= 0x8000;
+ MCOperand_CreateImm0(Inst, Imm);
-static DecodeStatus DecodeDTripleRegisterClass(MCInst *Inst,
- unsigned RegNo, uint64_t Address,
- void *Decoder)
-{
- return DecodeRegisterClassByID(Inst, RegNo, AArch64_DTripleRegClassID,
- Decoder);
-}
+ A64SysRegMapper_toString(&AArch64_MSRMapper, Imm, &ValidNamed, result);
-static DecodeStatus DecodeQTripleRegisterClass(MCInst *Inst,
- unsigned RegNo, uint64_t Address,
- void *Decoder)
-{
- return DecodeRegisterClassByID(Inst, RegNo, AArch64_QTripleRegClassID,
- Decoder);
-}
-
-static DecodeStatus DecodeDQuadRegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address,
- void *Decoder)
-{
- return DecodeRegisterClassByID(Inst, RegNo, AArch64_DQuadRegClassID,
- Decoder);
-}
-
-static DecodeStatus DecodeQQuadRegisterClass(MCInst *Inst, unsigned RegNo,
- uint64_t Address,
- void *Decoder)
-{
- return DecodeRegisterClassByID(Inst, RegNo, AArch64_QQuadRegClassID,
- Decoder);
-}
-
-static DecodeStatus DecodeAddrRegExtendOperand(MCInst *Inst,
- unsigned OptionHiS,
- uint64_t Address,
- void *Decoder)
-{
- // Option{1} must be 1. OptionHiS is made up of {Option{2}, Option{1},
- // S}. Hence we want to check bit 1.
- if (!(OptionHiS & 2))
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, OptionHiS);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeBitfield32ImmOperand(MCInst *Inst,
- unsigned Imm6Bits,
- uint64_t Address,
- void *Decoder)
-{
- // In the 32-bit variant, bit 6 must be zero. I.e. the immediate must be
- // between 0 and 31.
- if (Imm6Bits > 31)
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, Imm6Bits);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeCVT32FixedPosOperand(MCInst *Inst,
- unsigned Imm6Bits,
- uint64_t Address,
- void *Decoder)
-{
- // 1 <= Imm <= 32. Encoded as 64 - Imm so: 63 >= Encoded >= 32.
- if (Imm6Bits < 32)
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, Imm6Bits);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeFPZeroOperand(MCInst *Inst,
- unsigned RmBits, uint64_t Address, void *Decoder)
-{
- // Any bits are valid in the instruction (they're architecturally ignored),
- // but a code generator should insert 0.
- MCOperand_CreateImm0(Inst, 0);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeShiftRightImm8(MCInst *Inst,
- unsigned Val, uint64_t Address, void *Decoder)
-{
- MCOperand_CreateImm0(Inst, 8 - Val);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeShiftRightImm16(MCInst *Inst,
- unsigned Val, uint64_t Address, void *Decoder)
-{
- MCOperand_CreateImm0(Inst, 16 - Val);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeShiftRightImm32(MCInst *Inst,
- unsigned Val, uint64_t Address, void *Decoder)
-{
- MCOperand_CreateImm0(Inst, 32 - Val);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeShiftRightImm64(MCInst *Inst,
- unsigned Val, uint64_t Address, void *Decoder)
-{
- MCOperand_CreateImm0(Inst, 64 - Val);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeShiftLeftImm8(MCInst *Inst, unsigned Val,
- uint64_t Address,
- void *Decoder)
-{
- if (Val > 7)
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, Val);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeShiftLeftImm16(MCInst *Inst, unsigned Val,
- uint64_t Address,
- void *Decoder)
-{
- if (Val > 15)
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, Val);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeShiftLeftImm32(MCInst *Inst, unsigned Val,
- uint64_t Address,
- void *Decoder)
-{
- if (Val > 31)
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, Val);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeShiftLeftImm64(MCInst *Inst, unsigned Val,
- uint64_t Address,
- void *Decoder)
-{
- if (Val > 63)
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, Val);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeMoveWideImmOperand(MCInst *Inst,
- unsigned FullImm,
- uint64_t Address,
- void *Decoder, int RegWidth)
-{
- unsigned Imm16 = FullImm & 0xffff;
- unsigned Shift = FullImm >> 16;
-
- if (RegWidth == 32 && Shift > 1) return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, Imm16);
- MCOperand_CreateImm0(Inst, Shift);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeLogicalImmOperand(MCInst *Inst,
- unsigned Bits,
- uint64_t Address,
- void *Decoder, int RegWidth)
-{
- uint64_t Imm;
- if (!A64Imms_isLogicalImmBits(RegWidth, Bits, &Imm))
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, Bits);
- return MCDisassembler_Success;
-}
-
-
-static DecodeStatus DecodeRegExtendOperand(MCInst *Inst,
- unsigned ShiftAmount,
- uint64_t Address,
- void *Decoder)
-{
- // Only values 0-4 are valid for this 3-bit field
- if (ShiftAmount > 4)
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, ShiftAmount);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus Decode32BitShiftOperand(MCInst *Inst,
- unsigned ShiftAmount,
- uint64_t Address,
- void *Decoder)
-{
- // Only values below 32 are valid for a 32-bit register
- if (ShiftAmount > 31)
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, ShiftAmount);
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeBitfieldInstruction(MCInst *Inst, unsigned Insn,
- uint64_t Address,
- void *Decoder)
-{
- unsigned ExtractOp = 0, InsertOp = 0;
- unsigned Rd = fieldFromInstruction(Insn, 0, 5);
- unsigned Rn = fieldFromInstruction(Insn, 5, 5);
- unsigned ImmS = fieldFromInstruction(Insn, 10, 6);
- unsigned ImmR = fieldFromInstruction(Insn, 16, 6);
- unsigned SF = fieldFromInstruction(Insn, 31, 1);
-
- // Undef for 0b11 just in case it occurs. Don't want the compiler to optimise
- // out assertions that it thinks should never be hit.
- enum OpcTypes { SBFM = 0, BFM, UBFM, Undef } Opc;
- Opc = (enum OpcTypes)fieldFromInstruction(Insn, 29, 2);
-
- if (!SF) {
- // ImmR and ImmS must be between 0 and 31 for 32-bit instructions.
- if (ImmR > 31 || ImmS > 31)
- return MCDisassembler_Fail;
- }
-
- if (SF) {
- DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder);
- // BFM MCInsts use Rd as a source too.
- if (Opc == BFM) DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder);
- DecodeGPR64RegisterClass(Inst, Rn, Address, Decoder);
- } else {
- DecodeGPR32RegisterClass(Inst, Rd, Address, Decoder);
- // BFM MCInsts use Rd as a source too.
- if (Opc == BFM) DecodeGPR32RegisterClass(Inst, Rd, Address, Decoder);
- DecodeGPR32RegisterClass(Inst, Rn, Address, Decoder);
- }
-
- // ASR and LSR have more specific patterns so they won't get here:
- //assert(!(ImmS == 31 && !SF && Opc != BFM)
- // && "shift should have used auto decode");
- //assert(!(ImmS == 63 && SF && Opc != BFM)
- // && "shift should have used auto decode");
-
- // Extension instructions similarly:
- if (Opc == SBFM && ImmR == 0) {
- //assert((ImmS != 7 && ImmS != 15) && "extension got here");
- //assert((ImmS != 31 || SF == 0) && "extension got here");
- } else if (Opc == UBFM && ImmR == 0) {
- //assert((SF != 0 || (ImmS != 7 && ImmS != 15)) && "extension got here");
- }
-
- if (Opc == UBFM) {
- // It might be a LSL instruction, which actually takes the shift amount
- // itself as an MCInst operand.
- if (SF && (ImmS + 1) % 64 == ImmR) {
- MCInst_setOpcode(Inst, AArch64_LSLxxi);
- MCOperand_CreateImm0(Inst, 63 - ImmS);
- return MCDisassembler_Success;
- } else if (!SF && (ImmS + 1) % 32 == ImmR) {
- MCInst_setOpcode(Inst, AArch64_LSLwwi);
- MCOperand_CreateImm0(Inst, 31 - ImmS);
- return MCDisassembler_Success;
- }
- }
-
- // Otherwise it's definitely either an extract or an insert depending on which
- // of ImmR or ImmS is larger.
- switch (Opc) {
- default: break; // never reach
- case SBFM:
- ExtractOp = SF ? AArch64_SBFXxxii : AArch64_SBFXwwii;
- InsertOp = SF ? AArch64_SBFIZxxii : AArch64_SBFIZwwii;
- break;
- case BFM:
- ExtractOp = SF ? AArch64_BFXILxxii : AArch64_BFXILwwii;
- InsertOp = SF ? AArch64_BFIxxii : AArch64_BFIwwii;
- break;
- case UBFM:
- ExtractOp = SF ? AArch64_UBFXxxii : AArch64_UBFXwwii;
- InsertOp = SF ? AArch64_UBFIZxxii : AArch64_UBFIZwwii;
- break;
- }
-
- // Otherwise it's a boring insert or extract
- MCOperand_CreateImm0(Inst, ImmR);
- MCOperand_CreateImm0(Inst, ImmS);
-
-
- if (ImmS < ImmR)
- MCInst_setOpcode(Inst, InsertOp);
- else
- MCInst_setOpcode(Inst, ExtractOp);
-
- return MCDisassembler_Success;
+ return ValidNamed ? Success : Fail;
}
static DecodeStatus DecodeFMOVLaneInstruction(MCInst *Inst, unsigned Insn,
@@ -817,823 +747,927 @@
// Add the lane
MCOperand_CreateImm0(Inst, 1);
- return MCDisassembler_Success;
+ return Success;
}
-static DecodeStatus DecodeLDSTPairInstruction(MCInst *Inst,
- unsigned Insn,
- uint64_t Address,
+static DecodeStatus DecodeVecShiftRImm(MCInst *Inst, unsigned Imm,
+ unsigned Add)
+{
+ MCOperand_CreateImm0(Inst, Add - Imm);
+ return Success;
+}
+
+static DecodeStatus DecodeVecShiftLImm(MCInst *Inst, unsigned Imm,
+ unsigned Add)
+{
+ MCOperand_CreateImm0(Inst, (Imm + Add) & (Add - 1));
+ return Success;
+}
+
+static DecodeStatus DecodeVecShiftR64Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder)
+{
+ return DecodeVecShiftRImm(Inst, Imm, 64);
+}
+
+static DecodeStatus DecodeVecShiftR64ImmNarrow(MCInst *Inst, unsigned Imm,
+ uint64_t Addr,
void *Decoder)
{
- DecodeStatus Result = MCDisassembler_Success;
- unsigned Rt = fieldFromInstruction(Insn, 0, 5);
- unsigned Rn = fieldFromInstruction(Insn, 5, 5);
- unsigned Rt2 = fieldFromInstruction(Insn, 10, 5);
- unsigned SImm7 = fieldFromInstruction(Insn, 15, 7);
- unsigned L = fieldFromInstruction(Insn, 22, 1);
- unsigned V = fieldFromInstruction(Insn, 26, 1);
- unsigned Opc = fieldFromInstruction(Insn, 30, 2);
+ return DecodeVecShiftRImm(Inst, Imm | 0x20, 64);
+}
- // Not an official name, but it turns out that bit 23 distinguishes indexed
- // from non-indexed operations.
- unsigned Indexed = fieldFromInstruction(Insn, 23, 1);
+static DecodeStatus DecodeVecShiftR32Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder)
+{
+ return DecodeVecShiftRImm(Inst, Imm, 32);
+}
- if (Indexed && L == 0) {
- // The MCInst for an indexed store has an out operand and 4 ins:
- // Rn_wb, Rt, Rt2, Rn, Imm
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
+static DecodeStatus DecodeVecShiftR32ImmNarrow(MCInst *Inst, unsigned Imm,
+ uint64_t Addr,
+ void *Decoder)
+{
+ return DecodeVecShiftRImm(Inst, Imm | 0x10, 32);
+}
+
+static DecodeStatus DecodeVecShiftR16Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder)
+{
+ return DecodeVecShiftRImm(Inst, Imm, 16);
+}
+
+static DecodeStatus DecodeVecShiftR16ImmNarrow(MCInst *Inst, unsigned Imm,
+ uint64_t Addr,
+ void *Decoder)
+{
+ return DecodeVecShiftRImm(Inst, Imm | 0x8, 16);
+}
+
+static DecodeStatus DecodeVecShiftR8Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder)
+{
+ return DecodeVecShiftRImm(Inst, Imm, 8);
+}
+
+static DecodeStatus DecodeVecShiftL64Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder)
+{
+ return DecodeVecShiftLImm(Inst, Imm, 64);
+}
+
+static DecodeStatus DecodeVecShiftL32Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder)
+{
+ return DecodeVecShiftLImm(Inst, Imm, 32);
+}
+
+static DecodeStatus DecodeVecShiftL16Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder)
+{
+ return DecodeVecShiftLImm(Inst, Imm, 16);
+}
+
+static DecodeStatus DecodeVecShiftL8Imm(MCInst *Inst, unsigned Imm,
+ uint64_t Addr, void *Decoder)
+{
+ return DecodeVecShiftLImm(Inst, Imm, 8);
+}
+
+static DecodeStatus DecodeThreeAddrSRegInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Rd = fieldFromInstruction(insn, 0, 5);
+ unsigned Rn = fieldFromInstruction(insn, 5, 5);
+ unsigned Rm = fieldFromInstruction(insn, 16, 5);
+ unsigned shiftHi = fieldFromInstruction(insn, 22, 2);
+ unsigned shiftLo = fieldFromInstruction(insn, 10, 6);
+ unsigned shift = (shiftHi << 6) | shiftLo;
+
+ switch (MCInst_getOpcode(Inst)) {
+ default:
+ return Fail;
+ case AArch64_ADDWrs:
+ case AArch64_ADDSWrs:
+ case AArch64_SUBWrs:
+ case AArch64_SUBSWrs:
+ // if shift == '11' then ReservedValue()
+ if (shiftHi == 0x3)
+ return Fail;
+ // Deliberate fallthrough
+ case AArch64_ANDWrs:
+ case AArch64_ANDSWrs:
+ case AArch64_BICWrs:
+ case AArch64_BICSWrs:
+ case AArch64_ORRWrs:
+ case AArch64_ORNWrs:
+ case AArch64_EORWrs:
+ case AArch64_EONWrs: {
+ // if sf == '0' and imm6<5> == '1' then ReservedValue()
+ if (shiftLo >> 5 == 1)
+ return Fail;
+ DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR32RegisterClass(Inst, Rn, Addr, Decoder);
+ DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder);
+ break;
+ }
+ case AArch64_ADDXrs:
+ case AArch64_ADDSXrs:
+ case AArch64_SUBXrs:
+ case AArch64_SUBSXrs:
+ // if shift == '11' then ReservedValue()
+ if (shiftHi == 0x3)
+ return Fail;
+ // Deliberate fallthrough
+ case AArch64_ANDXrs:
+ case AArch64_ANDSXrs:
+ case AArch64_BICXrs:
+ case AArch64_BICSXrs:
+ case AArch64_ORRXrs:
+ case AArch64_ORNXrs:
+ case AArch64_EORXrs:
+ case AArch64_EONXrs:
+ DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR64RegisterClass(Inst, Rn, Addr, Decoder);
+ DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder);
+ break;
}
+ MCOperand_CreateImm0(Inst, shift);
+ return Success;
+}
+
+static DecodeStatus DecodeMoveImmInstruction(MCInst *Inst, uint32_t insn,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Rd = fieldFromInstruction(insn, 0, 5);
+ unsigned imm = fieldFromInstruction(insn, 5, 16);
+ unsigned shift = fieldFromInstruction(insn, 21, 2);
+
+ shift <<= 4;
+
+ switch (MCInst_getOpcode(Inst)) {
+ default:
+ return Fail;
+ case AArch64_MOVZWi:
+ case AArch64_MOVNWi:
+ case AArch64_MOVKWi:
+ if (shift & (1U << 5))
+ return Fail;
+ DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder);
+ break;
+ case AArch64_MOVZXi:
+ case AArch64_MOVNXi:
+ case AArch64_MOVKXi:
+ DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
+ break;
+ }
+
+ if (MCInst_getOpcode(Inst) == AArch64_MOVKWi ||
+ MCInst_getOpcode(Inst) == AArch64_MOVKXi)
+ MCInst_addOperand2(Inst, MCInst_getOperand(Inst, 0));
+
+ MCOperand_CreateImm0(Inst, imm);
+ MCOperand_CreateImm0(Inst, shift);
+ return Success;
+}
+
+static DecodeStatus DecodeUnsignedLdStInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Rt = fieldFromInstruction(insn, 0, 5);
+ unsigned Rn = fieldFromInstruction(insn, 5, 5);
+ unsigned offset = fieldFromInstruction(insn, 10, 12);
+
+ switch (MCInst_getOpcode(Inst)) {
+ default:
+ return Fail;
+ case AArch64_PRFMui:
+ // Rt is an immediate in prefetch.
+ MCOperand_CreateImm0(Inst, Rt);
+ break;
+ case AArch64_STRBBui:
+ case AArch64_LDRBBui:
+ case AArch64_LDRSBWui:
+ case AArch64_STRHHui:
+ case AArch64_LDRHHui:
+ case AArch64_LDRSHWui:
+ case AArch64_STRWui:
+ case AArch64_LDRWui:
+ DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDRSBXui:
+ case AArch64_LDRSHXui:
+ case AArch64_LDRSWui:
+ case AArch64_STRXui:
+ case AArch64_LDRXui:
+ DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDRQui:
+ case AArch64_STRQui:
+ DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDRDui:
+ case AArch64_STRDui:
+ DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDRSui:
+ case AArch64_STRSui:
+ DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDRHui:
+ case AArch64_STRHui:
+ DecodeFPR16RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDRBui:
+ case AArch64_STRBui:
+ DecodeFPR8RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ }
+
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
+ //if (!Dis->tryAddingSymbolicOperand(Inst, offset, Addr, Fail, 0, 4))
+ MCOperand_CreateImm0(Inst, offset);
+
+ return Success;
+}
+
+static DecodeStatus DecodeSignedLdStInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Rt = fieldFromInstruction(insn, 0, 5);
+ unsigned Rn = fieldFromInstruction(insn, 5, 5);
+ int64_t offset = fieldFromInstruction(insn, 12, 9);
+
+ // offset is a 9-bit signed immediate, so sign extend it to
+ // fill the unsigned.
+ if (offset & (1 << (9 - 1)))
+ offset |= ~((1LL << 9) - 1);
+
+ // First operand is always the writeback to the address register, if needed.
+ switch (MCInst_getOpcode(Inst)) {
+ default:
+ break;
+ case AArch64_LDRSBWpre:
+ case AArch64_LDRSHWpre:
+ case AArch64_STRBBpre:
+ case AArch64_LDRBBpre:
+ case AArch64_STRHHpre:
+ case AArch64_LDRHHpre:
+ case AArch64_STRWpre:
+ case AArch64_LDRWpre:
+ case AArch64_LDRSBWpost:
+ case AArch64_LDRSHWpost:
+ case AArch64_STRBBpost:
+ case AArch64_LDRBBpost:
+ case AArch64_STRHHpost:
+ case AArch64_LDRHHpost:
+ case AArch64_STRWpost:
+ case AArch64_LDRWpost:
+ case AArch64_LDRSBXpre:
+ case AArch64_LDRSHXpre:
+ case AArch64_STRXpre:
+ case AArch64_LDRSWpre:
+ case AArch64_LDRXpre:
+ case AArch64_LDRSBXpost:
+ case AArch64_LDRSHXpost:
+ case AArch64_STRXpost:
+ case AArch64_LDRSWpost:
+ case AArch64_LDRXpost:
+ case AArch64_LDRQpre:
+ case AArch64_STRQpre:
+ case AArch64_LDRQpost:
+ case AArch64_STRQpost:
+ case AArch64_LDRDpre:
+ case AArch64_STRDpre:
+ case AArch64_LDRDpost:
+ case AArch64_STRDpost:
+ case AArch64_LDRSpre:
+ case AArch64_STRSpre:
+ case AArch64_LDRSpost:
+ case AArch64_STRSpost:
+ case AArch64_LDRHpre:
+ case AArch64_STRHpre:
+ case AArch64_LDRHpost:
+ case AArch64_STRHpost:
+ case AArch64_LDRBpre:
+ case AArch64_STRBpre:
+ case AArch64_LDRBpost:
+ case AArch64_STRBpost:
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
+ break;
+ }
+
+ switch (MCInst_getOpcode(Inst)) {
+ default:
+ return Fail;
+ case AArch64_PRFUMi:
+ // Rt is an immediate in prefetch.
+ MCOperand_CreateImm0(Inst, Rt);
+ break;
+ case AArch64_STURBBi:
+ case AArch64_LDURBBi:
+ case AArch64_LDURSBWi:
+ case AArch64_STURHHi:
+ case AArch64_LDURHHi:
+ case AArch64_LDURSHWi:
+ case AArch64_STURWi:
+ case AArch64_LDURWi:
+ case AArch64_LDTRSBWi:
+ case AArch64_LDTRSHWi:
+ case AArch64_STTRWi:
+ case AArch64_LDTRWi:
+ case AArch64_STTRHi:
+ case AArch64_LDTRHi:
+ case AArch64_LDTRBi:
+ case AArch64_STTRBi:
+ case AArch64_LDRSBWpre:
+ case AArch64_LDRSHWpre:
+ case AArch64_STRBBpre:
+ case AArch64_LDRBBpre:
+ case AArch64_STRHHpre:
+ case AArch64_LDRHHpre:
+ case AArch64_STRWpre:
+ case AArch64_LDRWpre:
+ case AArch64_LDRSBWpost:
+ case AArch64_LDRSHWpost:
+ case AArch64_STRBBpost:
+ case AArch64_LDRBBpost:
+ case AArch64_STRHHpost:
+ case AArch64_LDRHHpost:
+ case AArch64_STRWpost:
+ case AArch64_LDRWpost:
+ DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDURSBXi:
+ case AArch64_LDURSHXi:
+ case AArch64_LDURSWi:
+ case AArch64_STURXi:
+ case AArch64_LDURXi:
+ case AArch64_LDTRSBXi:
+ case AArch64_LDTRSHXi:
+ case AArch64_LDTRSWi:
+ case AArch64_STTRXi:
+ case AArch64_LDTRXi:
+ case AArch64_LDRSBXpre:
+ case AArch64_LDRSHXpre:
+ case AArch64_STRXpre:
+ case AArch64_LDRSWpre:
+ case AArch64_LDRXpre:
+ case AArch64_LDRSBXpost:
+ case AArch64_LDRSHXpost:
+ case AArch64_STRXpost:
+ case AArch64_LDRSWpost:
+ case AArch64_LDRXpost:
+ DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDURQi:
+ case AArch64_STURQi:
+ case AArch64_LDRQpre:
+ case AArch64_STRQpre:
+ case AArch64_LDRQpost:
+ case AArch64_STRQpost:
+ DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDURDi:
+ case AArch64_STURDi:
+ case AArch64_LDRDpre:
+ case AArch64_STRDpre:
+ case AArch64_LDRDpost:
+ case AArch64_STRDpost:
+ DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDURSi:
+ case AArch64_STURSi:
+ case AArch64_LDRSpre:
+ case AArch64_STRSpre:
+ case AArch64_LDRSpost:
+ case AArch64_STRSpost:
+ DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDURHi:
+ case AArch64_STURHi:
+ case AArch64_LDRHpre:
+ case AArch64_STRHpre:
+ case AArch64_LDRHpost:
+ case AArch64_STRHpost:
+ DecodeFPR16RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_LDURBi:
+ case AArch64_STURBi:
+ case AArch64_LDRBpre:
+ case AArch64_STRBpre:
+ case AArch64_LDRBpost:
+ case AArch64_STRBpost:
+ DecodeFPR8RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ }
+
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
+ MCOperand_CreateImm0(Inst, offset);
+
+ bool IsLoad = fieldFromInstruction(insn, 22, 1);
+ bool IsIndexed = fieldFromInstruction(insn, 10, 2) != 0;
+ bool IsFP = fieldFromInstruction(insn, 26, 1);
+
+ // Cannot write back to a transfer register (but xzr != sp).
+ if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn)
+ return SoftFail;
+
+ return Success;
+}
+
+static DecodeStatus DecodeExclusiveLdStInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Rt = fieldFromInstruction(insn, 0, 5);
+ unsigned Rn = fieldFromInstruction(insn, 5, 5);
+ unsigned Rt2 = fieldFromInstruction(insn, 10, 5);
+ unsigned Rs = fieldFromInstruction(insn, 16, 5);
+ unsigned Opcode = MCInst_getOpcode(Inst);
+
+ switch (Opcode) {
+ default:
+ return Fail;
+ case AArch64_STLXRW:
+ case AArch64_STLXRB:
+ case AArch64_STLXRH:
+ case AArch64_STXRW:
+ case AArch64_STXRB:
+ case AArch64_STXRH:
+ DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder);
+ // FALLTHROUGH
+ case AArch64_LDARW:
+ case AArch64_LDARB:
+ case AArch64_LDARH:
+ case AArch64_LDAXRW:
+ case AArch64_LDAXRB:
+ case AArch64_LDAXRH:
+ case AArch64_LDXRW:
+ case AArch64_LDXRB:
+ case AArch64_LDXRH:
+ case AArch64_STLRW:
+ case AArch64_STLRB:
+ case AArch64_STLRH:
+ DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_STLXRX:
+ case AArch64_STXRX:
+ DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder);
+ // FALLTHROUGH
+ case AArch64_LDARX:
+ case AArch64_LDAXRX:
+ case AArch64_LDXRX:
+ case AArch64_STLRX:
+ DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
+ break;
+ case AArch64_STLXPW:
+ case AArch64_STXPW:
+ DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder);
+ // FALLTHROUGH
+ case AArch64_LDAXPW:
+ case AArch64_LDXPW:
+ DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
+ DecodeGPR32RegisterClass(Inst, Rt2, Addr, Decoder);
+ break;
+ case AArch64_STLXPX:
+ case AArch64_STXPX:
+ DecodeGPR32RegisterClass(Inst, Rs, Addr, Decoder);
+ // FALLTHROUGH
+ case AArch64_LDAXPX:
+ case AArch64_LDXPX:
+ DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
+ DecodeGPR64RegisterClass(Inst, Rt2, Addr, Decoder);
+ break;
+ }
+
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
+
// You shouldn't load to the same register twice in an instruction...
- if (L && Rt == Rt2)
- Result = MCDisassembler_SoftFail;
+ if ((Opcode == AArch64_LDAXPW || Opcode == AArch64_LDXPW ||
+ Opcode == AArch64_LDAXPX || Opcode == AArch64_LDXPX) &&
+ Rt == Rt2)
+ return SoftFail;
+
+ return Success;
+}
+
+static DecodeStatus DecodePairLdStInstruction(MCInst *Inst, uint32_t insn,
+ uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Rt = fieldFromInstruction(insn, 0, 5);
+ unsigned Rn = fieldFromInstruction(insn, 5, 5);
+ unsigned Rt2 = fieldFromInstruction(insn, 10, 5);
+ int64_t offset = fieldFromInstruction(insn, 15, 7);
+ bool IsLoad = fieldFromInstruction(insn, 22, 1);
+ unsigned Opcode = MCInst_getOpcode(Inst);
+ bool NeedsDisjointWritebackTransfer = false;
+
+ // offset is a 7-bit signed immediate, so sign extend it to
+ // fill the unsigned.
+ if (offset & (1 << (7 - 1)))
+ offset |= ~((1LL << 7) - 1);
+
+ // First operand is always writeback of base register.
+ switch (Opcode) {
+ default:
+ break;
+ case AArch64_LDPXpost:
+ case AArch64_STPXpost:
+ case AArch64_LDPSWpost:
+ case AArch64_LDPXpre:
+ case AArch64_STPXpre:
+ case AArch64_LDPSWpre:
+ case AArch64_LDPWpost:
+ case AArch64_STPWpost:
+ case AArch64_LDPWpre:
+ case AArch64_STPWpre:
+ case AArch64_LDPQpost:
+ case AArch64_STPQpost:
+ case AArch64_LDPQpre:
+ case AArch64_STPQpre:
+ case AArch64_LDPDpost:
+ case AArch64_STPDpost:
+ case AArch64_LDPDpre:
+ case AArch64_STPDpre:
+ case AArch64_LDPSpost:
+ case AArch64_STPSpost:
+ case AArch64_LDPSpre:
+ case AArch64_STPSpre:
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
+ break;
+ }
+
+ switch (Opcode) {
+ default:
+ return Fail;
+ case AArch64_LDPXpost:
+ case AArch64_STPXpost:
+ case AArch64_LDPSWpost:
+ case AArch64_LDPXpre:
+ case AArch64_STPXpre:
+ case AArch64_LDPSWpre:
+ NeedsDisjointWritebackTransfer = true;
+ // Fallthrough
+ case AArch64_LDNPXi:
+ case AArch64_STNPXi:
+ case AArch64_LDPXi:
+ case AArch64_STPXi:
+ case AArch64_LDPSWi:
+ DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
+ DecodeGPR64RegisterClass(Inst, Rt2, Addr, Decoder);
+ break;
+ case AArch64_LDPWpost:
+ case AArch64_STPWpost:
+ case AArch64_LDPWpre:
+ case AArch64_STPWpre:
+ NeedsDisjointWritebackTransfer = true;
+ // Fallthrough
+ case AArch64_LDNPWi:
+ case AArch64_STNPWi:
+ case AArch64_LDPWi:
+ case AArch64_STPWi:
+ DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
+ DecodeGPR32RegisterClass(Inst, Rt2, Addr, Decoder);
+ break;
+ case AArch64_LDNPQi:
+ case AArch64_STNPQi:
+ case AArch64_LDPQpost:
+ case AArch64_STPQpost:
+ case AArch64_LDPQi:
+ case AArch64_STPQi:
+ case AArch64_LDPQpre:
+ case AArch64_STPQpre:
+ DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder);
+ DecodeFPR128RegisterClass(Inst, Rt2, Addr, Decoder);
+ break;
+ case AArch64_LDNPDi:
+ case AArch64_STNPDi:
+ case AArch64_LDPDpost:
+ case AArch64_STPDpost:
+ case AArch64_LDPDi:
+ case AArch64_STPDi:
+ case AArch64_LDPDpre:
+ case AArch64_STPDpre:
+ DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder);
+ DecodeFPR64RegisterClass(Inst, Rt2, Addr, Decoder);
+ break;
+ case AArch64_LDNPSi:
+ case AArch64_STNPSi:
+ case AArch64_LDPSpost:
+ case AArch64_STPSpost:
+ case AArch64_LDPSi:
+ case AArch64_STPSi:
+ case AArch64_LDPSpre:
+ case AArch64_STPSpre:
+ DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder);
+ DecodeFPR32RegisterClass(Inst, Rt2, Addr, Decoder);
+ break;
+ }
+
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
+ MCOperand_CreateImm0(Inst, offset);
+
+ // You shouldn't load to the same register twice in an instruction...
+ if (IsLoad && Rt == Rt2)
+ return SoftFail;
// ... or do any operation that writes-back to a transfer register. But note
// that "stp xzr, xzr, [sp], #4" is fine because xzr and sp are different.
- if (Indexed && V == 0 && Rn != 31 && (Rt == Rn || Rt2 == Rn))
- Result = MCDisassembler_SoftFail;
+ if (NeedsDisjointWritebackTransfer && Rn != 31 && (Rt == Rn || Rt2 == Rn))
+ return SoftFail;
- // Exactly how we decode the MCInst's registers depends on the Opc and V
- // fields of the instruction. These also obviously determine the size of the
- // operation so we can fill in that information while we're at it.
- if (V) {
- // The instruction operates on the FP/SIMD registers
- switch (Opc) {
- default: return MCDisassembler_Fail;
- case 0:
- DecodeFPR32RegisterClass(Inst, Rt, Address, Decoder);
- DecodeFPR32RegisterClass(Inst, Rt2, Address, Decoder);
- break;
- case 1:
- DecodeFPR64RegisterClass(Inst, Rt, Address, Decoder);
- DecodeFPR64RegisterClass(Inst, Rt2, Address, Decoder);
- break;
- case 2:
- DecodeFPR128RegisterClass(Inst, Rt, Address, Decoder);
- DecodeFPR128RegisterClass(Inst, Rt2, Address, Decoder);
- break;
- }
+ return Success;
+}
+
+static DecodeStatus DecodeAddSubERegInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Rd, Rn, Rm;
+ unsigned extend = fieldFromInstruction(insn, 10, 6);
+ unsigned shift = extend & 0x7;
+
+ if (shift > 4)
+ return Fail;
+
+ Rd = fieldFromInstruction(insn, 0, 5);
+ Rn = fieldFromInstruction(insn, 5, 5);
+ Rm = fieldFromInstruction(insn, 16, 5);
+
+ switch (MCInst_getOpcode(Inst)) {
+ default:
+ return Fail;
+ case AArch64_ADDWrx:
+ case AArch64_SUBWrx:
+ DecodeGPR32spRegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR32spRegisterClass(Inst, Rn, Addr, Decoder);
+ DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder);
+ break;
+ case AArch64_ADDSWrx:
+ case AArch64_SUBSWrx:
+ DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR32spRegisterClass(Inst, Rn, Addr, Decoder);
+ DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder);
+ break;
+ case AArch64_ADDXrx:
+ case AArch64_SUBXrx:
+ DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
+ DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder);
+ break;
+ case AArch64_ADDSXrx:
+ case AArch64_SUBSXrx:
+ DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
+ DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder);
+ break;
+ case AArch64_ADDXrx64:
+ case AArch64_SUBXrx64:
+ DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
+ DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder);
+ break;
+ case AArch64_SUBSXrx64:
+ case AArch64_ADDSXrx64:
+ DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
+ DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder);
+ break;
+ }
+
+ MCOperand_CreateImm0(Inst, extend);
+ return Success;
+}
+
+static DecodeStatus DecodeLogicalImmInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Addr,
+ void *Decoder)
+{
+ unsigned Rd = fieldFromInstruction(insn, 0, 5);
+ unsigned Rn = fieldFromInstruction(insn, 5, 5);
+ unsigned Datasize = fieldFromInstruction(insn, 31, 1);
+ unsigned imm;
+
+ if (Datasize) {
+ if (MCInst_getOpcode(Inst) == AArch64_ANDSXri)
+ DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
+ else
+ DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR64RegisterClass(Inst, Rn, Addr, Decoder);
+ imm = fieldFromInstruction(insn, 10, 13);
+ if (!AArch64_AM_isValidDecodeLogicalImmediate(imm, 64))
+ return Fail;
} else {
- switch (Opc) {
- default: return MCDisassembler_Fail;
- case 0:
- DecodeGPR32RegisterClass(Inst, Rt, Address, Decoder);
- DecodeGPR32RegisterClass(Inst, Rt2, Address, Decoder);
- break;
- case 1:
- //assert(L && "unexpected \"store signed\" attempt");
- DecodeGPR64RegisterClass(Inst, Rt, Address, Decoder);
- DecodeGPR64RegisterClass(Inst, Rt2, Address, Decoder);
- break;
- case 2:
- DecodeGPR64RegisterClass(Inst, Rt, Address, Decoder);
- DecodeGPR64RegisterClass(Inst, Rt2, Address, Decoder);
- break;
- }
+ if (MCInst_getOpcode(Inst) == AArch64_ANDSWri)
+ DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder);
+ else
+ DecodeGPR32spRegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR32RegisterClass(Inst, Rn, Addr, Decoder);
+ imm = fieldFromInstruction(insn, 10, 12);
+ if (!AArch64_AM_isValidDecodeLogicalImmediate(imm, 32))
+ return Fail;
}
- if (Indexed && L == 1) {
- // The MCInst for an indexed load has 3 out operands and an 3 ins:
- // Rt, Rt2, Rn_wb, Rt2, Rn, Imm
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
- }
-
-
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
- MCOperand_CreateImm0(Inst, SImm7);
-
- return Result;
+ MCOperand_CreateImm0(Inst, imm);
+ return Success;
}
-static DecodeStatus DecodeLoadPairExclusiveInstruction(MCInst *Inst,
- uint32_t Val,
- uint64_t Address,
+static DecodeStatus DecodeModImmInstruction(MCInst *Inst, uint32_t insn,
+ uint64_t Addr,
void *Decoder)
{
- unsigned Rt = fieldFromInstruction(Val, 0, 5);
- unsigned Rn = fieldFromInstruction(Val, 5, 5);
- unsigned Rt2 = fieldFromInstruction(Val, 10, 5);
- unsigned MemSize = fieldFromInstruction(Val, 30, 2);
+ unsigned Rd = fieldFromInstruction(insn, 0, 5);
+ unsigned cmode = fieldFromInstruction(insn, 12, 4);
+ unsigned imm = fieldFromInstruction(insn, 16, 3) << 5;
+ imm |= fieldFromInstruction(insn, 5, 5);
- DecodeStatus S = MCDisassembler_Success;
- if (Rt == Rt2) S = MCDisassembler_SoftFail;
+ if (MCInst_getOpcode(Inst) == AArch64_MOVID)
+ DecodeFPR64RegisterClass(Inst, Rd, Addr, Decoder);
+ else
+ DecodeVectorRegisterClass(Inst, Rd, Addr, Decoder);
- switch (MemSize) {
- case 2:
- if (!Check(&S, DecodeGPR32RegisterClass(Inst, Rt, Address, Decoder)))
- return MCDisassembler_Fail;
- if (!Check(&S, DecodeGPR32RegisterClass(Inst, Rt2, Address, Decoder)))
- return MCDisassembler_Fail;
- break;
- case 3:
- if (!Check(&S, DecodeGPR64RegisterClass(Inst, Rt, Address, Decoder)))
- return MCDisassembler_Fail;
- if (!Check(&S, DecodeGPR64RegisterClass(Inst, Rt2, Address, Decoder)))
- return MCDisassembler_Fail;
- break;
+ MCOperand_CreateImm0(Inst, imm);
+
+ switch (MCInst_getOpcode(Inst)) {
default:
- break; // never reach
+ break;
+ case AArch64_MOVIv4i16:
+ case AArch64_MOVIv8i16:
+ case AArch64_MVNIv4i16:
+ case AArch64_MVNIv8i16:
+ case AArch64_MOVIv2i32:
+ case AArch64_MOVIv4i32:
+ case AArch64_MVNIv2i32:
+ case AArch64_MVNIv4i32:
+ MCOperand_CreateImm0(Inst, (cmode & 6) << 2);
+ break;
+ case AArch64_MOVIv2s_msl:
+ case AArch64_MOVIv4s_msl:
+ case AArch64_MVNIv2s_msl:
+ case AArch64_MVNIv4s_msl:
+ MCOperand_CreateImm0(Inst, cmode & 1 ? 0x110 : 0x108);
+ break;
}
- if (!Check(&S, DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder)))
- return MCDisassembler_Fail;
-
- return S;
+ return Success;
}
-static DecodeStatus DecodeNamedImmOperand(MCInst *Inst,
- unsigned Val,
- uint64_t Address,
- void *Decoder, NamedImmMapper *N)
-{
- bool ValidNamed;
-
- NamedImmMapper_toString(N, Val, &ValidNamed);
- if (ValidNamed || NamedImmMapper_validImm(N, Val)) {
- MCOperand_CreateImm0(Inst, Val);
- return MCDisassembler_Success;
- }
-
- return MCDisassembler_Fail;
-}
-
-static DecodeStatus DecodeSysRegOperand(SysRegMapper *Mapper,
- MCInst *Inst,
- unsigned Val,
- uint64_t Address,
+static DecodeStatus DecodeModImmTiedInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Addr,
void *Decoder)
{
- bool ValidNamed;
- char result[128];
- SysRegMapper_toString(Mapper, Val, &ValidNamed, result);
+ unsigned Rd = fieldFromInstruction(insn, 0, 5);
+ unsigned cmode = fieldFromInstruction(insn, 12, 4);
+ unsigned imm = fieldFromInstruction(insn, 16, 3) << 5;
+ imm |= fieldFromInstruction(insn, 5, 5);
- MCOperand_CreateImm0(Inst, Val);
+ // Tied operands added twice.
+ DecodeVectorRegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeVectorRegisterClass(Inst, Rd, Addr, Decoder);
- return ValidNamed ? MCDisassembler_Success : MCDisassembler_Fail;
+ MCOperand_CreateImm0(Inst, imm);
+ MCOperand_CreateImm0(Inst, (cmode & 6) << 2);
+
+ return Success;
}
-static DecodeStatus DecodeMRSOperand(MCInst *Inst,
- unsigned Val,
- uint64_t Address,
- void *Decoder)
+static DecodeStatus DecodeAdrInstruction(MCInst *Inst, uint32_t insn,
+ uint64_t Addr, void *Decoder)
{
- return DecodeSysRegOperand(&AArch64_MRSMapper, Inst, Val, Address, Decoder);
+ unsigned Rd = fieldFromInstruction(insn, 0, 5);
+ int64_t imm = fieldFromInstruction(insn, 5, 19) << 2;
+ imm |= fieldFromInstruction(insn, 29, 2);
+
+ // Sign-extend the 21-bit immediate.
+ if (imm & (1 << (21 - 1)))
+ imm |= ~((1LL << 21) - 1);
+
+ DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
+ //if (!Dis->tryAddingSymbolicOperand(Inst, imm, Addr, Fail, 0, 4))
+ MCOperand_CreateImm0(Inst, imm);
+
+ return Success;
}
-static DecodeStatus DecodeMSROperand(MCInst *Inst,
- unsigned Val,
- uint64_t Address,
- void *Decoder)
+static DecodeStatus DecodeBaseAddSubImm(MCInst *Inst, uint32_t insn,
+ uint64_t Addr, void *Decoder)
{
- return DecodeSysRegOperand(&AArch64_MSRMapper, Inst, Val, Address, Decoder);
-}
+ unsigned Rd = fieldFromInstruction(insn, 0, 5);
+ unsigned Rn = fieldFromInstruction(insn, 5, 5);
+ unsigned Imm = fieldFromInstruction(insn, 10, 14);
+ unsigned S = fieldFromInstruction(insn, 29, 1);
+ unsigned Datasize = fieldFromInstruction(insn, 31, 1);
-static DecodeStatus DecodeSingleIndexedInstruction(MCInst *Inst,
- unsigned Insn,
- uint64_t Address,
- void *Decoder)
-{
- unsigned Rt = fieldFromInstruction(Insn, 0, 5);
- unsigned Rn = fieldFromInstruction(Insn, 5, 5);
- unsigned Imm9 = fieldFromInstruction(Insn, 12, 9);
+ unsigned ShifterVal = (Imm >> 12) & 3;
+ unsigned ImmVal = Imm & 0xFFF;
- unsigned Opc = fieldFromInstruction(Insn, 22, 2);
- unsigned V = fieldFromInstruction(Insn, 26, 1);
- unsigned Size = fieldFromInstruction(Insn, 30, 2);
+ if (ShifterVal != 0 && ShifterVal != 1)
+ return Fail;
- if (Opc == 0 || (V == 1 && Opc == 2)) {
- // It's a store, the MCInst gets: Rn_wb, Rt, Rn, Imm
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
- }
-
- if (V == 0 && (Opc == 2 || Size == 3)) {
- DecodeGPR64RegisterClass(Inst, Rt, Address, Decoder);
- } else if (V == 0) {
- DecodeGPR32RegisterClass(Inst, Rt, Address, Decoder);
- } else if (V == 1 && (Opc & 2)) {
- DecodeFPR128RegisterClass(Inst, Rt, Address, Decoder);
+ if (Datasize) {
+ if (Rd == 31 && !S)
+ DecodeGPR64spRegisterClass(Inst, Rd, Addr, Decoder);
+ else
+ DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder);
} else {
- switch (Size) {
- case 0:
- DecodeFPR8RegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 1:
- DecodeFPR16RegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 2:
- DecodeFPR32RegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 3:
- DecodeFPR64RegisterClass(Inst, Rt, Address, Decoder);
- break;
- }
+ if (Rd == 31 && !S)
+ DecodeGPR32spRegisterClass(Inst, Rd, Addr, Decoder);
+ else
+ DecodeGPR32RegisterClass(Inst, Rd, Addr, Decoder);
+ DecodeGPR32spRegisterClass(Inst, Rn, Addr, Decoder);
}
- if (Opc != 0 && (V != 1 || Opc != 2)) {
- // It's a load, the MCInst gets: Rt, Rn_wb, Rn, Imm
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
- }
+ //if (!Dis->tryAddingSymbolicOperand(Inst, Imm, Addr, Fail, 0, 4))
+ MCOperand_CreateImm0(Inst, ImmVal);
+ MCOperand_CreateImm0(Inst, 12 * ShifterVal);
+ return Success;
+}
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
+static DecodeStatus DecodeUnconditionalBranch(MCInst *Inst, uint32_t insn,
+ uint64_t Addr,
+ void *Decoder)
+{
+ int64_t imm = fieldFromInstruction(insn, 0, 26);
- MCOperand_CreateImm0(Inst, Imm9);
+ // Sign-extend the 26-bit immediate.
+ if (imm & (1 << (26 - 1)))
+ imm |= ~((1LL << 26) - 1);
- // N.b. The official documentation says undpredictable if Rt == Rn, but this
- // takes place at the architectural rather than encoding level:
- //
- // "STR xzr, [sp], #4" is perfectly valid.
- if (V == 0 && Rt == Rn && Rn != 31)
- return MCDisassembler_SoftFail;
+ // if (!Dis->tryAddingSymbolicOperand(Inst, imm << 2, Addr, true, 0, 4))
+ MCOperand_CreateImm0(Inst, imm);
+
+ return Success;
+}
+
+static DecodeStatus DecodeSystemPStateInstruction(MCInst *Inst,
+ uint32_t insn, uint64_t Addr,
+ void *Decoder)
+{
+ uint64_t op1 = fieldFromInstruction(insn, 16, 3);
+ uint64_t op2 = fieldFromInstruction(insn, 5, 3);
+ uint64_t crm = fieldFromInstruction(insn, 8, 4);
+ bool ValidNamed;
+ uint64_t pstate_field = (op1 << 3) | op2;
+
+ MCOperand_CreateImm0(Inst, pstate_field);
+ MCOperand_CreateImm0(Inst, crm);
+
+ A64NamedImmMapper_toString(&A64PState_PStateMapper, pstate_field, &ValidNamed);
+
+ return ValidNamed ? Success : Fail;
+}
+
+static DecodeStatus DecodeTestAndBranch(MCInst *Inst, uint32_t insn,
+ uint64_t Addr, void *Decoder)
+{
+ uint64_t Rt = fieldFromInstruction(insn, 0, 5);
+ uint64_t bit = fieldFromInstruction(insn, 31, 1) << 5;
+ bit |= fieldFromInstruction(insn, 19, 5);
+ int64_t dst = fieldFromInstruction(insn, 5, 14);
+
+ // Sign-extend 14-bit immediate.
+ if (dst & (1 << (14 - 1)))
+ dst |= ~((1LL << 14) - 1);
+
+ if (fieldFromInstruction(insn, 31, 1) == 0)
+ DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
else
- return MCDisassembler_Success;
+ DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
+
+ MCOperand_CreateImm0(Inst, bit);
+ //if (!Dis->tryAddingSymbolicOperand(Inst, dst << 2, Addr, true, 0, 4))
+ MCOperand_CreateImm0(Inst, dst);
+
+ return Success;
}
-static DecodeStatus DecodeNeonMovImmShiftOperand(MCInst *Inst, unsigned ShiftAmount,
- uint64_t Address, void *Decoder, A64SE_ShiftExtSpecifiers Ext, bool IsHalf)
+void AArch64_init(MCRegisterInfo *MRI)
{
- bool IsLSL = false;
- if (Ext == A64SE_LSL)
- IsLSL = true;
- else if (Ext != A64SE_MSL)
- return MCDisassembler_Fail;
+ /*
+ InitMCRegisterInfo(AArch64RegDesc, 420,
+ RA, PC,
+ AArch64MCRegisterClasses, 43,
+ AArch64RegUnitRoots, 66, AArch64RegDiffLists,
+ AArch64RegStrings,
+ AArch64SubRegIdxLists, 53,
+ AArch64SubRegIdxRanges,
+ AArch64RegEncodingTable);
+ */
- // MSL and LSLH accepts encoded shift amount 0 or 1.
- if ((!IsLSL || (IsLSL && IsHalf)) && ShiftAmount != 0 && ShiftAmount != 1)
- return MCDisassembler_Fail;
-
- // LSL accepts encoded shift amount 0, 1, 2 or 3.
- if (IsLSL && ShiftAmount > 3)
- return MCDisassembler_Fail;
-
- MCOperand_CreateImm0(Inst, ShiftAmount);
- return MCDisassembler_Success;
-}
-
-// Decode post-index vector load/store instructions.
-// This is necessary as we need to decode Rm: if Rm == 0b11111, the last
-// operand is an immediate equal the the length of vector list in bytes,
-// or Rm is decoded to a GPR64noxzr register.
-static DecodeStatus DecodeVLDSTPostInstruction(MCInst *Inst, unsigned Insn,
- uint64_t Address,
- void *Decoder)
-{
- unsigned Rt = fieldFromInstruction(Insn, 0, 5);
- unsigned Rn = fieldFromInstruction(Insn, 5, 5);
- unsigned Rm = fieldFromInstruction(Insn, 16, 5);
- unsigned Opcode = fieldFromInstruction(Insn, 12, 4);
- unsigned IsLoad = fieldFromInstruction(Insn, 22, 1);
- // 0 for 64bit vector list, 1 for 128bit vector list
- unsigned Is128BitVec = fieldFromInstruction(Insn, 30, 1);
-
- unsigned NumVecs;
- switch (Opcode) {
- default:
- // llvm_unreachable("Invalid opcode for post-index load/store instructions");
- case 0: // ld4/st4
- case 2: // ld1/st1 with 4 vectors
- NumVecs = 4; break;
- case 4: // ld3/st3
- case 6: // ld1/st1 with 3 vectors
- NumVecs = 3; break;
- case 7: // ld1/st1 with 1 vector
- NumVecs = 1; break;
- case 8: // ld2/st2
- case 10: // ld1/st1 with 2 vectors
- NumVecs = 2; break;
- }
-
- // Decode vector list of 1/2/3/4 vectors for load instructions.
- if (IsLoad) {
- switch (NumVecs) {
- case 1:
- Is128BitVec ? DecodeFPR128RegisterClass(Inst, Rt, Address, Decoder)
- : DecodeFPR64RegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 2:
- Is128BitVec ? DecodeQPairRegisterClass(Inst, Rt, Address, Decoder)
- : DecodeDPairRegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 3:
- Is128BitVec ? DecodeQTripleRegisterClass(Inst, Rt, Address, Decoder)
- : DecodeDTripleRegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 4:
- Is128BitVec ? DecodeQQuadRegisterClass(Inst, Rt, Address, Decoder)
- : DecodeDQuadRegisterClass(Inst, Rt, Address, Decoder);
- break;
- }
- }
-
- // Decode write back register, which is equal to Rn.
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
-
- if (Rm == 31) // If Rm is 0x11111, add the vector list length in byte
- MCOperand_CreateImm0(Inst, NumVecs * (Is128BitVec ? 16 : 8));
- else // Decode Rm
- DecodeGPR64noxzrRegisterClass(Inst, Rm, Address, Decoder);
-
- // Decode vector list of 1/2/3/4 vectors for load instructions.
- if (!IsLoad) {
- switch (NumVecs) {
- case 1:
- Is128BitVec ? DecodeFPR128RegisterClass(Inst, Rt, Address, Decoder)
- : DecodeFPR64RegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 2:
- Is128BitVec ? DecodeQPairRegisterClass(Inst, Rt, Address, Decoder)
- : DecodeDPairRegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 3:
- Is128BitVec ? DecodeQTripleRegisterClass(Inst, Rt, Address, Decoder)
- : DecodeDTripleRegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 4:
- Is128BitVec ? DecodeQQuadRegisterClass(Inst, Rt, Address, Decoder)
- : DecodeDQuadRegisterClass(Inst, Rt, Address, Decoder);
- break;
- }
- }
-
- return MCDisassembler_Success;
-}
-
-// Decode post-index vector load/store lane instructions.
-// This is necessary as we need to decode Rm: if Rm == 0b11111, the last
-// operand is an immediate equal the the length of the changed bytes,
-// or Rm is decoded to a GPR64noxzr register.
-static DecodeStatus DecodeVLDSTLanePostInstruction(MCInst *Inst, unsigned Insn,
- uint64_t Address,
- void *Decoder)
-{
- bool Is64bitVec = false;
- bool IsLoadDup = false;
- bool IsLoad = false;
- // The total number of bytes transferred.
- // TransferBytes = NumVecs * OneLaneBytes
- unsigned TransferBytes = 0;
- unsigned NumVecs = 0;
- unsigned Rt, Rn, Rm, Q, S, lane, NumLanes;
- unsigned Opc = MCInst_getOpcode(Inst);
- switch (Opc) {
- case AArch64_LD1R_WB_8B_fixed: case AArch64_LD1R_WB_8B_register:
- case AArch64_LD1R_WB_4H_fixed: case AArch64_LD1R_WB_4H_register:
- case AArch64_LD1R_WB_2S_fixed: case AArch64_LD1R_WB_2S_register:
- case AArch64_LD1R_WB_1D_fixed: case AArch64_LD1R_WB_1D_register:
- {
- switch (Opc) {
- case AArch64_LD1R_WB_8B_fixed: case AArch64_LD1R_WB_8B_register:
- TransferBytes = 1; break;
- case AArch64_LD1R_WB_4H_fixed: case AArch64_LD1R_WB_4H_register:
- TransferBytes = 2; break;
- case AArch64_LD1R_WB_2S_fixed: case AArch64_LD1R_WB_2S_register:
- TransferBytes = 4; break;
- case AArch64_LD1R_WB_1D_fixed: case AArch64_LD1R_WB_1D_register:
- TransferBytes = 8; break;
- }
- Is64bitVec = true;
- IsLoadDup = true;
- NumVecs = 1;
- break;
- }
-
- case AArch64_LD1R_WB_16B_fixed: case AArch64_LD1R_WB_16B_register:
- case AArch64_LD1R_WB_8H_fixed: case AArch64_LD1R_WB_8H_register:
- case AArch64_LD1R_WB_4S_fixed: case AArch64_LD1R_WB_4S_register:
- case AArch64_LD1R_WB_2D_fixed: case AArch64_LD1R_WB_2D_register:
- {
- switch (Opc) {
- case AArch64_LD1R_WB_16B_fixed: case AArch64_LD1R_WB_16B_register:
- TransferBytes = 1; break;
- case AArch64_LD1R_WB_8H_fixed: case AArch64_LD1R_WB_8H_register:
- TransferBytes = 2; break;
- case AArch64_LD1R_WB_4S_fixed: case AArch64_LD1R_WB_4S_register:
- TransferBytes = 4; break;
- case AArch64_LD1R_WB_2D_fixed: case AArch64_LD1R_WB_2D_register:
- TransferBytes = 8; break;
- }
- IsLoadDup = true;
- NumVecs = 1;
- break;
- }
-
- case AArch64_LD2R_WB_8B_fixed: case AArch64_LD2R_WB_8B_register:
- case AArch64_LD2R_WB_4H_fixed: case AArch64_LD2R_WB_4H_register:
- case AArch64_LD2R_WB_2S_fixed: case AArch64_LD2R_WB_2S_register:
- case AArch64_LD2R_WB_1D_fixed: case AArch64_LD2R_WB_1D_register:
- {
- switch (Opc) {
- case AArch64_LD2R_WB_8B_fixed: case AArch64_LD2R_WB_8B_register:
- TransferBytes = 2; break;
- case AArch64_LD2R_WB_4H_fixed: case AArch64_LD2R_WB_4H_register:
- TransferBytes = 4; break;
- case AArch64_LD2R_WB_2S_fixed: case AArch64_LD2R_WB_2S_register:
- TransferBytes = 8; break;
- case AArch64_LD2R_WB_1D_fixed: case AArch64_LD2R_WB_1D_register:
- TransferBytes = 16; break;
- }
- Is64bitVec = true;
- IsLoadDup = true;
- NumVecs = 2;
- break;
- }
-
- case AArch64_LD2R_WB_16B_fixed: case AArch64_LD2R_WB_16B_register:
- case AArch64_LD2R_WB_8H_fixed: case AArch64_LD2R_WB_8H_register:
- case AArch64_LD2R_WB_4S_fixed: case AArch64_LD2R_WB_4S_register:
- case AArch64_LD2R_WB_2D_fixed: case AArch64_LD2R_WB_2D_register:
- {
- switch (Opc) {
- case AArch64_LD2R_WB_16B_fixed: case AArch64_LD2R_WB_16B_register:
- TransferBytes = 2; break;
- case AArch64_LD2R_WB_8H_fixed: case AArch64_LD2R_WB_8H_register:
- TransferBytes = 4; break;
- case AArch64_LD2R_WB_4S_fixed: case AArch64_LD2R_WB_4S_register:
- TransferBytes = 8; break;
- case AArch64_LD2R_WB_2D_fixed: case AArch64_LD2R_WB_2D_register:
- TransferBytes = 16; break;
- }
- IsLoadDup = true;
- NumVecs = 2;
- break;
- }
-
- case AArch64_LD3R_WB_8B_fixed: case AArch64_LD3R_WB_8B_register:
- case AArch64_LD3R_WB_4H_fixed: case AArch64_LD3R_WB_4H_register:
- case AArch64_LD3R_WB_2S_fixed: case AArch64_LD3R_WB_2S_register:
- case AArch64_LD3R_WB_1D_fixed: case AArch64_LD3R_WB_1D_register:
- {
- switch (Opc) {
- case AArch64_LD3R_WB_8B_fixed: case AArch64_LD3R_WB_8B_register:
- TransferBytes = 3; break;
- case AArch64_LD3R_WB_4H_fixed: case AArch64_LD3R_WB_4H_register:
- TransferBytes = 6; break;
- case AArch64_LD3R_WB_2S_fixed: case AArch64_LD3R_WB_2S_register:
- TransferBytes = 12; break;
- case AArch64_LD3R_WB_1D_fixed: case AArch64_LD3R_WB_1D_register:
- TransferBytes = 24; break;
- }
- Is64bitVec = true;
- IsLoadDup = true;
- NumVecs = 3;
- break;
- }
-
- case AArch64_LD3R_WB_16B_fixed: case AArch64_LD3R_WB_16B_register:
- case AArch64_LD3R_WB_4S_fixed: case AArch64_LD3R_WB_8H_register:
- case AArch64_LD3R_WB_8H_fixed: case AArch64_LD3R_WB_4S_register:
- case AArch64_LD3R_WB_2D_fixed: case AArch64_LD3R_WB_2D_register:
- {
- switch (Opc) {
- case AArch64_LD3R_WB_16B_fixed: case AArch64_LD3R_WB_16B_register:
- TransferBytes = 3; break;
- case AArch64_LD3R_WB_8H_fixed: case AArch64_LD3R_WB_8H_register:
- TransferBytes = 6; break;
- case AArch64_LD3R_WB_4S_fixed: case AArch64_LD3R_WB_4S_register:
- TransferBytes = 12; break;
- case AArch64_LD3R_WB_2D_fixed: case AArch64_LD3R_WB_2D_register:
- TransferBytes = 24; break;
- }
- IsLoadDup = true;
- NumVecs = 3;
- break;
- }
-
- case AArch64_LD4R_WB_8B_fixed: case AArch64_LD4R_WB_8B_register:
- case AArch64_LD4R_WB_4H_fixed: case AArch64_LD4R_WB_4H_register:
- case AArch64_LD4R_WB_2S_fixed: case AArch64_LD4R_WB_2S_register:
- case AArch64_LD4R_WB_1D_fixed: case AArch64_LD4R_WB_1D_register:
- {
- switch (Opc) {
- case AArch64_LD4R_WB_8B_fixed: case AArch64_LD4R_WB_8B_register:
- TransferBytes = 4; break;
- case AArch64_LD4R_WB_4H_fixed: case AArch64_LD4R_WB_4H_register:
- TransferBytes = 8; break;
- case AArch64_LD4R_WB_2S_fixed: case AArch64_LD4R_WB_2S_register:
- TransferBytes = 16; break;
- case AArch64_LD4R_WB_1D_fixed: case AArch64_LD4R_WB_1D_register:
- TransferBytes = 32; break;
- }
- Is64bitVec = true;
- IsLoadDup = true;
- NumVecs = 4;
- break;
- }
-
- case AArch64_LD4R_WB_16B_fixed: case AArch64_LD4R_WB_16B_register:
- case AArch64_LD4R_WB_4S_fixed: case AArch64_LD4R_WB_8H_register:
- case AArch64_LD4R_WB_8H_fixed: case AArch64_LD4R_WB_4S_register:
- case AArch64_LD4R_WB_2D_fixed: case AArch64_LD4R_WB_2D_register:
- {
- switch (Opc) {
- case AArch64_LD4R_WB_16B_fixed: case AArch64_LD4R_WB_16B_register:
- TransferBytes = 4; break;
- case AArch64_LD4R_WB_8H_fixed: case AArch64_LD4R_WB_8H_register:
- TransferBytes = 8; break;
- case AArch64_LD4R_WB_4S_fixed: case AArch64_LD4R_WB_4S_register:
- TransferBytes = 16; break;
- case AArch64_LD4R_WB_2D_fixed: case AArch64_LD4R_WB_2D_register:
- TransferBytes = 32; break;
- }
- IsLoadDup = true;
- NumVecs = 4;
- break;
- }
-
- case AArch64_LD1LN_WB_B_fixed: case AArch64_LD1LN_WB_B_register:
- case AArch64_LD1LN_WB_H_fixed: case AArch64_LD1LN_WB_H_register:
- case AArch64_LD1LN_WB_S_fixed: case AArch64_LD1LN_WB_S_register:
- case AArch64_LD1LN_WB_D_fixed: case AArch64_LD1LN_WB_D_register:
- {
- switch (Opc) {
- case AArch64_LD1LN_WB_B_fixed: case AArch64_LD1LN_WB_B_register:
- TransferBytes = 1; break;
- case AArch64_LD1LN_WB_H_fixed: case AArch64_LD1LN_WB_H_register:
- TransferBytes = 2; break;
- case AArch64_LD1LN_WB_S_fixed: case AArch64_LD1LN_WB_S_register:
- TransferBytes = 4; break;
- case AArch64_LD1LN_WB_D_fixed: case AArch64_LD1LN_WB_D_register:
- TransferBytes = 8; break;
- }
- IsLoad = true;
- NumVecs = 1;
- break;
- }
-
- case AArch64_LD2LN_WB_B_fixed: case AArch64_LD2LN_WB_B_register:
- case AArch64_LD2LN_WB_H_fixed: case AArch64_LD2LN_WB_H_register:
- case AArch64_LD2LN_WB_S_fixed: case AArch64_LD2LN_WB_S_register:
- case AArch64_LD2LN_WB_D_fixed: case AArch64_LD2LN_WB_D_register:
- {
- switch (Opc) {
- case AArch64_LD2LN_WB_B_fixed: case AArch64_LD2LN_WB_B_register:
- TransferBytes = 2; break;
- case AArch64_LD2LN_WB_H_fixed: case AArch64_LD2LN_WB_H_register:
- TransferBytes = 4; break;
- case AArch64_LD2LN_WB_S_fixed: case AArch64_LD2LN_WB_S_register:
- TransferBytes = 8; break;
- case AArch64_LD2LN_WB_D_fixed: case AArch64_LD2LN_WB_D_register:
- TransferBytes = 16; break;
- }
- IsLoad = true;
- NumVecs = 2;
- break;
- }
-
- case AArch64_LD3LN_WB_B_fixed: case AArch64_LD3LN_WB_B_register:
- case AArch64_LD3LN_WB_H_fixed: case AArch64_LD3LN_WB_H_register:
- case AArch64_LD3LN_WB_S_fixed: case AArch64_LD3LN_WB_S_register:
- case AArch64_LD3LN_WB_D_fixed: case AArch64_LD3LN_WB_D_register:
- {
- switch (Opc) {
- case AArch64_LD3LN_WB_B_fixed: case AArch64_LD3LN_WB_B_register:
- TransferBytes = 3; break;
- case AArch64_LD3LN_WB_H_fixed: case AArch64_LD3LN_WB_H_register:
- TransferBytes = 6; break;
- case AArch64_LD3LN_WB_S_fixed: case AArch64_LD3LN_WB_S_register:
- TransferBytes = 12; break;
- case AArch64_LD3LN_WB_D_fixed: case AArch64_LD3LN_WB_D_register:
- TransferBytes = 24; break;
- }
- IsLoad = true;
- NumVecs = 3;
- break;
- }
-
- case AArch64_LD4LN_WB_B_fixed: case AArch64_LD4LN_WB_B_register:
- case AArch64_LD4LN_WB_H_fixed: case AArch64_LD4LN_WB_H_register:
- case AArch64_LD4LN_WB_S_fixed: case AArch64_LD4LN_WB_S_register:
- case AArch64_LD4LN_WB_D_fixed: case AArch64_LD4LN_WB_D_register:
- {
- switch (Opc) {
- case AArch64_LD4LN_WB_B_fixed: case AArch64_LD4LN_WB_B_register:
- TransferBytes = 4; break;
- case AArch64_LD4LN_WB_H_fixed: case AArch64_LD4LN_WB_H_register:
- TransferBytes = 8; break;
- case AArch64_LD4LN_WB_S_fixed: case AArch64_LD4LN_WB_S_register:
- TransferBytes = 16; break;
- case AArch64_LD4LN_WB_D_fixed: case AArch64_LD4LN_WB_D_register:
- TransferBytes = 32; break;
- }
- IsLoad = true;
- NumVecs = 4;
- break;
- }
-
- case AArch64_ST1LN_WB_B_fixed: case AArch64_ST1LN_WB_B_register:
- case AArch64_ST1LN_WB_H_fixed: case AArch64_ST1LN_WB_H_register:
- case AArch64_ST1LN_WB_S_fixed: case AArch64_ST1LN_WB_S_register:
- case AArch64_ST1LN_WB_D_fixed: case AArch64_ST1LN_WB_D_register:
- {
- switch (Opc) {
- case AArch64_ST1LN_WB_B_fixed: case AArch64_ST1LN_WB_B_register:
- TransferBytes = 1; break;
- case AArch64_ST1LN_WB_H_fixed: case AArch64_ST1LN_WB_H_register:
- TransferBytes = 2; break;
- case AArch64_ST1LN_WB_S_fixed: case AArch64_ST1LN_WB_S_register:
- TransferBytes = 4; break;
- case AArch64_ST1LN_WB_D_fixed: case AArch64_ST1LN_WB_D_register:
- TransferBytes = 8; break;
- }
- NumVecs = 1;
- break;
- }
-
- case AArch64_ST2LN_WB_B_fixed: case AArch64_ST2LN_WB_B_register:
- case AArch64_ST2LN_WB_H_fixed: case AArch64_ST2LN_WB_H_register:
- case AArch64_ST2LN_WB_S_fixed: case AArch64_ST2LN_WB_S_register:
- case AArch64_ST2LN_WB_D_fixed: case AArch64_ST2LN_WB_D_register:
- {
- switch (Opc) {
- case AArch64_ST2LN_WB_B_fixed: case AArch64_ST2LN_WB_B_register:
- TransferBytes = 2; break;
- case AArch64_ST2LN_WB_H_fixed: case AArch64_ST2LN_WB_H_register:
- TransferBytes = 4; break;
- case AArch64_ST2LN_WB_S_fixed: case AArch64_ST2LN_WB_S_register:
- TransferBytes = 8; break;
- case AArch64_ST2LN_WB_D_fixed: case AArch64_ST2LN_WB_D_register:
- TransferBytes = 16; break;
- }
- NumVecs = 2;
- break;
- }
-
- case AArch64_ST3LN_WB_B_fixed: case AArch64_ST3LN_WB_B_register:
- case AArch64_ST3LN_WB_H_fixed: case AArch64_ST3LN_WB_H_register:
- case AArch64_ST3LN_WB_S_fixed: case AArch64_ST3LN_WB_S_register:
- case AArch64_ST3LN_WB_D_fixed: case AArch64_ST3LN_WB_D_register:
- {
- switch (Opc) {
- case AArch64_ST3LN_WB_B_fixed: case AArch64_ST3LN_WB_B_register:
- TransferBytes = 3; break;
- case AArch64_ST3LN_WB_H_fixed: case AArch64_ST3LN_WB_H_register:
- TransferBytes = 6; break;
- case AArch64_ST3LN_WB_S_fixed: case AArch64_ST3LN_WB_S_register:
- TransferBytes = 12; break;
- case AArch64_ST3LN_WB_D_fixed: case AArch64_ST3LN_WB_D_register:
- TransferBytes = 24; break;
- }
- NumVecs = 3;
- break;
- }
-
- case AArch64_ST4LN_WB_B_fixed: case AArch64_ST4LN_WB_B_register:
- case AArch64_ST4LN_WB_H_fixed: case AArch64_ST4LN_WB_H_register:
- case AArch64_ST4LN_WB_S_fixed: case AArch64_ST4LN_WB_S_register:
- case AArch64_ST4LN_WB_D_fixed: case AArch64_ST4LN_WB_D_register:
- {
- switch (Opc) {
- case AArch64_ST4LN_WB_B_fixed: case AArch64_ST4LN_WB_B_register:
- TransferBytes = 4; break;
- case AArch64_ST4LN_WB_H_fixed: case AArch64_ST4LN_WB_H_register:
- TransferBytes = 8; break;
- case AArch64_ST4LN_WB_S_fixed: case AArch64_ST4LN_WB_S_register:
- TransferBytes = 16; break;
- case AArch64_ST4LN_WB_D_fixed: case AArch64_ST4LN_WB_D_register:
- TransferBytes = 32; break;
- }
- NumVecs = 4;
- break;
- }
-
- default:
- return MCDisassembler_Fail;
- } // End of switch (Opc)
-
- Rt = fieldFromInstruction(Insn, 0, 5);
- Rn = fieldFromInstruction(Insn, 5, 5);
- Rm = fieldFromInstruction(Insn, 16, 5);
-
- // Decode post-index of load duplicate lane
- if (IsLoadDup) {
- switch (NumVecs) {
- case 1:
- Is64bitVec ? DecodeFPR64RegisterClass(Inst, Rt, Address, Decoder)
- : DecodeFPR128RegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 2:
- Is64bitVec ? DecodeDPairRegisterClass(Inst, Rt, Address, Decoder)
- : DecodeQPairRegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 3:
- Is64bitVec ? DecodeDTripleRegisterClass(Inst, Rt, Address, Decoder)
- : DecodeQTripleRegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 4:
- Is64bitVec ? DecodeDQuadRegisterClass(Inst, Rt, Address, Decoder)
- : DecodeQQuadRegisterClass(Inst, Rt, Address, Decoder);
- }
-
- // Decode write back register, which is equal to Rn.
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
-
- if (Rm == 31) // If Rm is 0x11111, add the number of transferred bytes
- MCOperand_CreateImm0(Inst, TransferBytes);
- else // Decode Rm
- DecodeGPR64noxzrRegisterClass(Inst, Rm, Address, Decoder);
-
- return MCDisassembler_Success;
- }
-
- // Decode post-index of load/store lane
- // Loads have a vector list as output.
- if (IsLoad) {
- switch (NumVecs) {
- case 1:
- DecodeFPR128RegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 2:
- DecodeQPairRegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 3:
- DecodeQTripleRegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 4:
- DecodeQQuadRegisterClass(Inst, Rt, Address, Decoder);
- }
- }
-
- // Decode write back register, which is equal to Rn.
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
- DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
-
- if (Rm == 31) // If Rm is 0x11111, add the number of transferred bytes
- MCOperand_CreateImm0(Inst, TransferBytes);
- else // Decode Rm
- DecodeGPR64noxzrRegisterClass(Inst, Rm, Address, Decoder);
-
- // Decode the source vector list.
- switch (NumVecs) {
- case 1:
- DecodeFPR128RegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 2:
- DecodeQPairRegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 3:
- DecodeQTripleRegisterClass(Inst, Rt, Address, Decoder);
- break;
- case 4:
- DecodeQQuadRegisterClass(Inst, Rt, Address, Decoder);
- }
-
- // Decode lane
- Q = fieldFromInstruction(Insn, 30, 1);
- S = fieldFromInstruction(Insn, 10, 3);
- lane = 0;
- // Calculate the number of lanes by number of vectors and transfered bytes.
- // NumLanes = 16 bytes / bytes of each lane
- NumLanes = 16 / (TransferBytes / NumVecs);
- switch (NumLanes) {
- case 16: // A vector has 16 lanes, each lane is 1 bytes.
- lane = (Q << 3) | S;
- break;
- case 8:
- lane = (Q << 2) | (S >> 1);
- break;
- case 4:
- lane = (Q << 1) | (S >> 2);
- break;
- case 2:
- lane = Q;
- break;
- }
- MCOperand_CreateImm0(Inst, lane);
-
- return MCDisassembler_Success;
-}
-
-static DecodeStatus DecodeSHLLInstruction(MCInst *Inst, unsigned Insn,
- uint64_t Address,
- void *Decoder)
-{
- unsigned Rd = fieldFromInstruction(Insn, 0, 5);
- unsigned Rn = fieldFromInstruction(Insn, 5, 5);
- unsigned size = fieldFromInstruction(Insn, 22, 2);
- unsigned Q = fieldFromInstruction(Insn, 30, 1);
-
- DecodeFPR128RegisterClass(Inst, Rd, Address, Decoder);
-
- if (Q)
- DecodeFPR128RegisterClass(Inst, Rn, Address, Decoder);
- else
- DecodeFPR64RegisterClass(Inst, Rn, Address, Decoder);
-
- switch (size) {
- case 0:
- MCOperand_CreateImm0(Inst, 8);
- break;
- case 1:
- MCOperand_CreateImm0(Inst, 16);
- break;
- case 2:
- MCOperand_CreateImm0(Inst, 32);
- break;
- default :
- return MCDisassembler_Fail;
- }
- return MCDisassembler_Success;
+ MCRegisterInfo_InitMCRegisterInfo(MRI, AArch64RegDesc, 420,
+ 0, 0,
+ AArch64MCRegisterClasses, 43,
+ 0, 0, AArch64RegDiffLists,
+ 0,
+ AArch64SubRegIdxLists, 53,
+ 0);
}
#endif
diff --git a/arch/AArch64/AArch64GenAsmWriter.inc b/arch/AArch64/AArch64GenAsmWriter.inc
index e5bb84f..b503695 100644
--- a/arch/AArch64/AArch64GenAsmWriter.inc
+++ b/arch/AArch64/AArch64GenAsmWriter.inc
@@ -16,7 +16,7 @@
static const uint32_t OpInfo[] = {
0U, // PHI
0U, // INLINEASM
- 0U, // PROLOG_LABEL
+ 0U, // CFI_INSTRUCTION
0U, // EH_LABEL
0U, // GC_LABEL
0U, // KILL
@@ -25,2785 +25,2390 @@
0U, // IMPLICIT_DEF
0U, // SUBREG_TO_REG
0U, // COPY_TO_REGCLASS
- 2780U, // DBG_VALUE
+ 2694U, // DBG_VALUE
0U, // REG_SEQUENCE
0U, // COPY
- 2773U, // BUNDLE
- 2790U, // LIFETIME_START
- 2760U, // LIFETIME_END
+ 2687U, // BUNDLE
+ 2704U, // LIFETIME_START
+ 2674U, // LIFETIME_END
0U, // STACKMAP
0U, // PATCHPOINT
- 6229U, // ABS16b
- 1074796629U, // ABS2d
- 2149587029U, // ABS2s
- 3224377429U, // ABS4h
- 4200533U, // ABS4s
- 1078990933U, // ABS8b
- 2153781333U, // ABS8h
- 3262130261U, // ABSdd
- 40904813U, // ADCSwww
- 40904813U, // ADCSxxx
- 40903414U, // ADCwww
- 40903414U, // ADCxxx
- 1140855066U, // ADDHN2vvv_16b8h
- 2218791194U, // ADDHN2vvv_4s2d
- 3294630170U, // ADDHN2vvv_8h4s
- 2149586505U, // ADDHNvvv_2s2d
- 3224376905U, // ADDHNvvv_4h4s
- 1078990409U, // ADDHNvvv_8b8h
- 5863U, // ADDP_16B
- 2148538087U, // ADDP_2D
- 1075844839U, // ADDP_2S
- 2150635239U, // ADDP_4H
- 3225425639U, // ADDP_4S
- 3226474215U, // ADDP_8B
- 1080039143U, // ADDP_8H
- 1081091815U, // ADDPvv_D_2D
- 40904825U, // ADDSwww_asr
- 40904825U, // ADDSwww_lsl
- 40904825U, // ADDSwww_lsr
- 40904825U, // ADDSwww_sxtb
- 40904825U, // ADDSwww_sxth
- 40904825U, // ADDSwww_sxtw
- 40904825U, // ADDSwww_sxtx
- 40904825U, // ADDSwww_uxtb
- 40904825U, // ADDSwww_uxth
- 40904825U, // ADDSwww_uxtw
- 40904825U, // ADDSwww_uxtx
- 40904825U, // ADDSxxw_sxtb
- 40904825U, // ADDSxxw_sxth
- 40904825U, // ADDSxxw_sxtw
- 40904825U, // ADDSxxw_uxtb
- 40904825U, // ADDSxxw_uxth
- 40904825U, // ADDSxxw_uxtw
- 40904825U, // ADDSxxx_asr
- 40904825U, // ADDSxxx_lsl
- 40904825U, // ADDSxxx_lsr
- 40904825U, // ADDSxxx_sxtx
- 40904825U, // ADDSxxx_uxtx
- 7350616U, // ADDV_1b16b
- 1081092440U, // ADDV_1b8b
- 3228576088U, // ADDV_1h4h
- 2154834264U, // ADDV_1h8h
- 7350616U, // ADDV_1s4s
- 40903475U, // ADDddd
- 4915U, // ADDvvv_16B
- 2148537139U, // ADDvvv_2D
- 1075843891U, // ADDvvv_2S
- 2150634291U, // ADDvvv_4H
- 3225424691U, // ADDvvv_4S
- 3226473267U, // ADDvvv_8B
- 1080038195U, // ADDvvv_8H
- 40904825U, // ADDwwi_lsl0_S
- 108014267U, // ADDwwi_lsl0_cmp
- 40903475U, // ADDwwi_lsl0_s
- 40904825U, // ADDwwi_lsl12_S
- 141568699U, // ADDwwi_lsl12_cmp
- 40903475U, // ADDwwi_lsl12_s
- 40903475U, // ADDwww_asr
- 40903475U, // ADDwww_lsl
- 40903475U, // ADDwww_lsr
- 40903475U, // ADDwww_sxtb
- 40903475U, // ADDwww_sxth
- 40903475U, // ADDwww_sxtw
- 40903475U, // ADDwww_sxtx
- 40903475U, // ADDwww_uxtb
- 40903475U, // ADDwww_uxth
- 40903475U, // ADDwww_uxtw
- 40903475U, // ADDwww_uxtx
- 40904825U, // ADDxxi_lsl0_S
- 108014267U, // ADDxxi_lsl0_cmp
- 40903475U, // ADDxxi_lsl0_s
- 40904825U, // ADDxxi_lsl12_S
- 141568699U, // ADDxxi_lsl12_cmp
- 40903475U, // ADDxxi_lsl12_s
- 40903475U, // ADDxxw_sxtb
- 40903475U, // ADDxxw_sxth
- 40903475U, // ADDxxw_sxtw
- 40903475U, // ADDxxw_uxtb
- 40903475U, // ADDxxw_uxth
- 40903475U, // ADDxxw_uxtw
- 40903475U, // ADDxxx_asr
- 40903475U, // ADDxxx_lsl
- 40903475U, // ADDxxx_lsr
- 40903475U, // ADDxxx_sxtx
- 40903475U, // ADDxxx_uxtx
+ 0U, // LOAD_STACK_GUARD
+ 6182U, // ABSv16i8
+ 553920550U, // ABSv1i64
+ 1074272294U, // ABSv2i32
+ 1611405350U, // ABSv2i64
+ 2148538406U, // ABSv4i16
+ 2685671462U, // ABSv4i32
+ 3222804518U, // ABSv8i16
+ 3759937574U, // ABSv8i8
+ 17049662U, // ADCSWr
+ 17049662U, // ADCSXr
+ 17048298U, // ADCWr
+ 17048298U, // ADCXr
+ 537400863U, // ADDHNv2i64_v2i32
+ 571748634U, // ADDHNv2i64_v4i32
+ 1074796063U, // ADDHNv4i32_v4i16
+ 1108881690U, // ADDHNv4i32_v8i16
+ 1644179738U, // ADDHNv8i16_v16i8
+ 1612453407U, // ADDHNv8i16_v8i8
+ 2147489464U, // ADDPv16i8
+ 2684884664U, // ADDPv2i32
+ 537663160U, // ADDPv2i64
+ 1610884792U, // ADDPv2i64p
+ 3222279864U, // ADDPv4i16
+ 1075058360U, // ADDPv4i32
+ 1612191416U, // ADDPv8i16
+ 3759937208U, // ADDPv8i8
+ 17049674U, // ADDSWri
+ 0U, // ADDSWrr
+ 17049674U, // ADDSWrs
+ 17049674U, // ADDSWrx
+ 17049674U, // ADDSXri
+ 0U, // ADDSXrr
+ 17049674U, // ADDSXrs
+ 17049674U, // ADDSXrx
+ 17049674U, // ADDSXrx64
+ 272671U, // ADDVv16i8v
+ 2147756319U, // ADDVv4i16v
+ 2684627231U, // ADDVv4i32v
+ 3221498143U, // ADDVv8i16v
+ 3758369055U, // ADDVv8i8v
+ 17048359U, // ADDWri
+ 0U, // ADDWrr
+ 17048359U, // ADDWrs
+ 17048359U, // ADDWrx
+ 17048359U, // ADDXri
+ 0U, // ADDXrr
+ 17048359U, // ADDXrs
+ 17048359U, // ADDXrx
+ 17048359U, // ADDXrx64
+ 2147488551U, // ADDv16i8
+ 17048359U, // ADDv1i64
+ 2684883751U, // ADDv2i32
+ 537662247U, // ADDv2i64
+ 3222278951U, // ADDv4i16
+ 1075057447U, // ADDv4i32
+ 1612190503U, // ADDv8i16
+ 3759936295U, // ADDv8i8
0U, // ADJCALLSTACKDOWN
0U, // ADJCALLSTACKUP
- 175122258U, // ADRPxi
- 208676802U, // ADRxi
- 67113850U, // AESD
- 67113908U, // AESE
- 4864U, // AESIMC
- 4872U, // AESMC
- 40904831U, // ANDSwwi
- 40904831U, // ANDSwww_asr
- 40904831U, // ANDSwww_lsl
- 40904831U, // ANDSwww_lsr
- 40904831U, // ANDSwww_ror
- 40904831U, // ANDSxxi
- 40904831U, // ANDSxxx_asr
- 40904831U, // ANDSxxx_lsl
- 40904831U, // ANDSxxx_lsr
- 40904831U, // ANDSxxx_ror
- 4981U, // ANDvvv_16B
- 3226473333U, // ANDvvv_8B
- 40903541U, // ANDwwi
- 40903541U, // ANDwww_asr
- 40903541U, // ANDwww_lsl
- 40903541U, // ANDwww_lsr
- 40903541U, // ANDwww_ror
- 40903541U, // ANDxxi
- 40903541U, // ANDxxx_asr
- 40903541U, // ANDxxx_lsl
- 40903541U, // ANDxxx_lsr
- 40903541U, // ANDxxx_ror
- 40904704U, // ASRVwww
- 40904704U, // ASRVxxx
- 40904704U, // ASRwwi
- 40904704U, // ASRxxi
- 0U, // ATOMIC_CMP_SWAP_I16
- 0U, // ATOMIC_CMP_SWAP_I32
- 0U, // ATOMIC_CMP_SWAP_I64
- 0U, // ATOMIC_CMP_SWAP_I8
- 0U, // ATOMIC_LOAD_ADD_I16
- 0U, // ATOMIC_LOAD_ADD_I32
- 0U, // ATOMIC_LOAD_ADD_I64
- 0U, // ATOMIC_LOAD_ADD_I8
- 0U, // ATOMIC_LOAD_AND_I16
- 0U, // ATOMIC_LOAD_AND_I32
- 0U, // ATOMIC_LOAD_AND_I64
- 0U, // ATOMIC_LOAD_AND_I8
- 0U, // ATOMIC_LOAD_MAX_I16
- 0U, // ATOMIC_LOAD_MAX_I32
- 0U, // ATOMIC_LOAD_MAX_I64
- 0U, // ATOMIC_LOAD_MAX_I8
- 0U, // ATOMIC_LOAD_MIN_I16
- 0U, // ATOMIC_LOAD_MIN_I32
- 0U, // ATOMIC_LOAD_MIN_I64
- 0U, // ATOMIC_LOAD_MIN_I8
- 0U, // ATOMIC_LOAD_NAND_I16
- 0U, // ATOMIC_LOAD_NAND_I32
- 0U, // ATOMIC_LOAD_NAND_I64
- 0U, // ATOMIC_LOAD_NAND_I8
- 0U, // ATOMIC_LOAD_OR_I16
- 0U, // ATOMIC_LOAD_OR_I32
- 0U, // ATOMIC_LOAD_OR_I64
- 0U, // ATOMIC_LOAD_OR_I8
- 0U, // ATOMIC_LOAD_SUB_I16
- 0U, // ATOMIC_LOAD_SUB_I32
- 0U, // ATOMIC_LOAD_SUB_I64
- 0U, // ATOMIC_LOAD_SUB_I8
- 0U, // ATOMIC_LOAD_UMAX_I16
- 0U, // ATOMIC_LOAD_UMAX_I32
- 0U, // ATOMIC_LOAD_UMAX_I64
- 0U, // ATOMIC_LOAD_UMAX_I8
- 0U, // ATOMIC_LOAD_UMIN_I16
- 0U, // ATOMIC_LOAD_UMIN_I32
- 0U, // ATOMIC_LOAD_UMIN_I64
- 0U, // ATOMIC_LOAD_UMIN_I8
- 0U, // ATOMIC_LOAD_XOR_I16
- 0U, // ATOMIC_LOAD_XOR_I32
- 0U, // ATOMIC_LOAD_XOR_I64
- 0U, // ATOMIC_LOAD_XOR_I8
- 0U, // ATOMIC_SWAP_I16
- 0U, // ATOMIC_SWAP_I32
- 0U, // ATOMIC_SWAP_I64
- 0U, // ATOMIC_SWAP_I8
- 14550U, // ATix
- 242230450U, // BFIwwii
- 242230450U, // BFIxxii
- 242230800U, // BFMwwii
- 242230800U, // BFMxxii
- 242230681U, // BFXILwwii
- 242230681U, // BFXILxxii
- 40904819U, // BICSwww_asr
- 40904819U, // BICSwww_lsl
- 40904819U, // BICSwww_lsr
- 40904819U, // BICSwww_ror
- 40904819U, // BICSxxx_asr
- 40904819U, // BICSxxx_lsl
- 40904819U, // BICSxxx_lsr
- 40904819U, // BICSxxx_ror
- 270537467U, // BICvi_lsl_2S
- 1345327867U, // BICvi_lsl_4H
- 272634619U, // BICvi_lsl_4S
- 1348473595U, // BICvi_lsl_8H
- 4859U, // BICvvv_16B
- 3226473211U, // BICvvv_8B
- 40903419U, // BICwww_asr
- 40903419U, // BICwww_lsl
- 40903419U, // BICwww_lsr
- 40903419U, // BICwww_ror
- 40903419U, // BICxxx_asr
- 40903419U, // BICxxx_lsl
- 40903419U, // BICxxx_lsr
- 40903419U, // BICxxx_ror
- 67113932U, // BIFvvv_16B
- 3293582284U, // BIFvvv_8B
- 67115246U, // BITvvv_16B
- 3293583598U, // BITvvv_8B
- 8398822U, // BLRx
- 17676U, // BLimm
- 8398043U, // BRKi
- 8398782U, // BRx
- 67114444U, // BSLvvv_16B
- 3293582796U, // BSLvvv_8B
- 23237U, // Bcc
- 16935U, // Bimm
- 309340826U, // CBNZw
- 309340826U, // CBNZx
- 309340797U, // CBZw
- 309340797U, // CBZx
- 40904290U, // CCMNwi
- 40904290U, // CCMNww
- 40904290U, // CCMNxi
- 40904290U, // CCMNxx
- 40904467U, // CCMPwi
- 40904467U, // CCMPww
- 40904467U, // CCMPxi
- 40904467U, // CCMPxx
- 8399443U, // CLREXi
- 6283U, // CLS16b
- 2149587083U, // CLS2s
- 3224377483U, // CLS4h
- 4200587U, // CLS4s
- 1078990987U, // CLS8b
- 2153781387U, // CLS8h
- 3262130315U, // CLSww
- 3262130315U, // CLSxx
- 6805U, // CLZ16b
- 2149587605U, // CLZ2s
- 3224378005U, // CLZ4h
- 4201109U, // CLZ4s
- 1078991509U, // CLZ8b
- 2153781909U, // CLZ8h
- 3262130837U, // CLZww
- 3262130837U, // CLZxx
- 40904602U, // CMEQddd
- 40904602U, // CMEQddi
- 6042U, // CMEQvvi_16B
- 2148538266U, // CMEQvvi_2D
- 1075845018U, // CMEQvvi_2S
- 2150635418U, // CMEQvvi_4H
- 3225425818U, // CMEQvvi_4S
- 3226474394U, // CMEQvvi_8B
- 1080039322U, // CMEQvvi_8H
- 6042U, // CMEQvvv_16B
- 2148538266U, // CMEQvvv_2D
- 1075845018U, // CMEQvvv_2S
- 2150635418U, // CMEQvvv_4H
- 3225425818U, // CMEQvvv_4S
- 3226474394U, // CMEQvvv_8B
- 1080039322U, // CMEQvvv_8H
- 40903560U, // CMGEddd
- 40903560U, // CMGEddi
- 5000U, // CMGEvvi_16B
- 2148537224U, // CMGEvvi_2D
- 1075843976U, // CMGEvvi_2S
- 2150634376U, // CMGEvvi_4H
- 3225424776U, // CMGEvvi_4S
- 3226473352U, // CMGEvvi_8B
- 1080038280U, // CMGEvvi_8H
- 5000U, // CMGEvvv_16B
- 2148537224U, // CMGEvvv_2D
- 1075843976U, // CMGEvvv_2S
- 2150634376U, // CMGEvvv_4H
- 3225424776U, // CMGEvvv_4S
- 3226473352U, // CMGEvvv_8B
- 1080038280U, // CMGEvvv_8H
- 40904935U, // CMGTddd
- 40904935U, // CMGTddi
- 6375U, // CMGTvvi_16B
- 2148538599U, // CMGTvvi_2D
- 1075845351U, // CMGTvvi_2S
- 2150635751U, // CMGTvvi_4H
- 3225426151U, // CMGTvvi_4S
- 3226474727U, // CMGTvvi_8B
- 1080039655U, // CMGTvvi_8H
- 6375U, // CMGTvvv_16B
- 2148538599U, // CMGTvvv_2D
- 1075845351U, // CMGTvvv_2S
- 2150635751U, // CMGTvvv_4H
- 3225426151U, // CMGTvvv_4S
- 3226474727U, // CMGTvvv_8B
- 1080039655U, // CMGTvvv_8H
- 40903863U, // CMHIddd
- 5303U, // CMHIvvv_16B
- 2148537527U, // CMHIvvv_2D
- 1075844279U, // CMHIvvv_2S
- 2150634679U, // CMHIvvv_4H
- 3225425079U, // CMHIvvv_4S
- 3226473655U, // CMHIvvv_8B
- 1080038583U, // CMHIvvv_8H
- 40904837U, // CMHSddd
- 6277U, // CMHSvvv_16B
- 2148538501U, // CMHSvvv_2D
- 1075845253U, // CMHSvvv_2S
- 2150635653U, // CMHSvvv_4H
- 3225426053U, // CMHSvvv_4S
- 3226474629U, // CMHSvvv_8B
- 1080039557U, // CMHSvvv_8H
- 40903567U, // CMLEddi
- 5007U, // CMLEvvi_16B
- 2148537231U, // CMLEvvi_2D
- 1075843983U, // CMLEvvi_2S
- 2150634383U, // CMLEvvi_4H
- 3225424783U, // CMLEvvi_4S
- 3226473359U, // CMLEvvi_8B
- 1080038287U, // CMLEvvi_8H
- 40904953U, // CMLTddi
- 6393U, // CMLTvvi_16B
- 2148538617U, // CMLTvvi_2D
- 1075845369U, // CMLTvvi_2S
- 2150635769U, // CMLTvvi_4H
- 3225426169U, // CMLTvvi_4S
- 3226474745U, // CMLTvvi_8B
- 1080039673U, // CMLTvvi_8H
- 40904291U, // CMNww_asr
- 40904291U, // CMNww_lsl
- 40904291U, // CMNww_lsr
- 40904291U, // CMNww_sxtb
- 40904291U, // CMNww_sxth
- 40904291U, // CMNww_sxtw
- 40904291U, // CMNww_sxtx
- 40904291U, // CMNww_uxtb
- 40904291U, // CMNww_uxth
- 40904291U, // CMNww_uxtw
- 40904291U, // CMNww_uxtx
- 40904291U, // CMNxw_sxtb
- 40904291U, // CMNxw_sxth
- 40904291U, // CMNxw_sxtw
- 40904291U, // CMNxw_uxtb
- 40904291U, // CMNxw_uxth
- 40904291U, // CMNxw_uxtw
- 40904291U, // CMNxx_asr
- 40904291U, // CMNxx_lsl
- 40904291U, // CMNxx_lsr
- 40904291U, // CMNxx_sxtx
- 40904291U, // CMNxx_uxtx
- 40904468U, // CMPww_asr
- 40904468U, // CMPww_lsl
- 40904468U, // CMPww_lsr
- 40904468U, // CMPww_sxtb
- 40904468U, // CMPww_sxth
- 40904468U, // CMPww_sxtw
- 40904468U, // CMPww_sxtx
- 40904468U, // CMPww_uxtb
- 40904468U, // CMPww_uxth
- 40904468U, // CMPww_uxtw
- 40904468U, // CMPww_uxtx
- 40904468U, // CMPxw_sxtb
- 40904468U, // CMPxw_sxth
- 40904468U, // CMPxw_sxtw
- 40904468U, // CMPxw_uxtb
- 40904468U, // CMPxw_uxth
- 40904468U, // CMPxw_uxtw
- 40904468U, // CMPxx_asr
- 40904468U, // CMPxx_lsl
- 40904468U, // CMPxx_lsr
- 40904468U, // CMPxx_sxtx
- 40904468U, // CMPxx_uxtx
- 40904982U, // CMTSTddd
- 6422U, // CMTSTvvv_16B
- 2148538646U, // CMTSTvvv_2D
- 1075845398U, // CMTSTvvv_2S
- 2150635798U, // CMTSTvvv_4H
- 3225426198U, // CMTSTvvv_4S
- 3226474774U, // CMTSTvvv_8B
- 1080039702U, // CMTSTvvv_8H
- 6399U, // CNT16b
- 1078991103U, // CNT8b
- 40903202U, // CRC32B_www
- 40903210U, // CRC32CB_www
- 40903691U, // CRC32CH_www
- 40905200U, // CRC32CW_www
- 40905290U, // CRC32CX_wwx
- 40903674U, // CRC32H_www
- 40905178U, // CRC32W_www
- 40905259U, // CRC32X_wwx
- 40904027U, // CSELwwwc
- 40904027U, // CSELxxxc
- 40903439U, // CSINCwwwc
- 40903439U, // CSINCxxxc
- 40905132U, // CSINVwwwc
- 40905132U, // CSINVxxxc
- 40903660U, // CSNEGwwwc
- 40903660U, // CSNEGxxxc
- 8396844U, // DCPS1i
- 8397209U, // DCPS2i
- 8397258U, // DCPS3i
- 25335U, // DCix
- 29235U, // DMBi
- 2805U, // DRPS
- 29324U, // DSBi
- 3254785893U, // DUP16b
- 3255834469U, // DUP2d
- 3256883045U, // DUP2s
- 3257931621U, // DUP4h
- 3258980197U, // DUP4s
- 3260028773U, // DUP8b
- 3261077349U, // DUP8h
- 2147489637U, // DUPELT16b
- 3222280037U, // DUPELT2d
- 2103141U, // DUPELT2s
- 1076893541U, // DUPELT4h
- 4200293U, // DUPELT4s
- 2152732517U, // DUPELT8b
- 1080039269U, // DUPELT8h
- 2154833765U, // DUPbv_B
- 3228575589U, // DUPdv_D
- 1081091941U, // DUPhv_H
- 7350117U, // DUPsv_S
- 40904296U, // EONwww_asr
- 40904296U, // EONwww_lsl
- 40904296U, // EONwww_lsr
- 40904296U, // EONwww_ror
- 40904296U, // EONxxx_asr
- 40904296U, // EONxxx_lsl
- 40904296U, // EONxxx_lsr
- 40904296U, // EONxxx_ror
- 6129U, // EORvvv_16B
- 3226474481U, // EORvvv_8B
- 40904689U, // EORwwi
- 40904689U, // EORwww_asr
- 40904689U, // EORwww_lsl
- 40904689U, // EORwww_lsr
- 40904689U, // EORwww_ror
- 40904689U, // EORxxi
- 40904689U, // EORxxx_asr
- 40904689U, // EORxxx_lsl
- 40904689U, // EORxxx_lsr
- 40904689U, // EORxxx_ror
- 2810U, // ERET
- 40904736U, // EXTRwwwi
- 40904736U, // EXTRxxxi
- 6435U, // EXTvvvi_16b
- 3226474787U, // EXTvvvi_8b
+ 553920403U, // ADR
+ 50603811U, // ADRP
+ 33567598U, // AESDrr
+ 33567656U, // AESErr
+ 4852U, // AESIMCrr
+ 4860U, // AESMCrr
+ 17049680U, // ANDSWri
+ 0U, // ANDSWrr
+ 17049680U, // ANDSWrs
+ 17049680U, // ANDSXri
+ 0U, // ANDSXrr
+ 17049680U, // ANDSXrs
+ 17048425U, // ANDWri
+ 0U, // ANDWrr
+ 17048425U, // ANDWrs
+ 17048425U, // ANDXri
+ 0U, // ANDXrr
+ 17048425U, // ANDXrs
+ 2147488617U, // ANDv16i8
+ 3759936361U, // ANDv8i8
+ 17049553U, // ASRVWr
+ 17049553U, // ASRVXr
+ 16935U, // B
+ 67380710U, // BFMWri
+ 67380710U, // BFMXri
+ 0U, // BICSWrr
+ 17049668U, // BICSWrs
+ 0U, // BICSXrr
+ 17049668U, // BICSXrs
+ 0U, // BICWrr
+ 17048303U, // BICWrs
+ 0U, // BICXrr
+ 17048303U, // BICXrs
+ 2147488495U, // BICv16i8
+ 84423407U, // BICv2i32
+ 84947695U, // BICv4i16
+ 85209839U, // BICv4i32
+ 85471983U, // BICv8i16
+ 3759936239U, // BICv8i8
+ 2147488704U, // BIFv16i8
+ 3759936448U, // BIFv8i8
+ 2181052603U, // BITv16i8
+ 3793500347U, // BITv8i8
+ 17641U, // BL
+ 2107319U, // BLR
+ 2107279U, // BR
+ 21688U, // BRK
+ 2181051810U, // BSLv16i8
+ 3793499554U, // BSLv8i8
+ 27247U, // Bcc
+ 100936257U, // CBNZW
+ 100936257U, // CBNZX
+ 100936242U, // CBZW
+ 100936242U, // CBZX
+ 17049144U, // CCMNWi
+ 17049144U, // CCMNWr
+ 17049144U, // CCMNXi
+ 17049144U, // CCMNXr
+ 17049316U, // CCMPWi
+ 17049316U, // CCMPWr
+ 17049316U, // CCMPXi
+ 17049316U, // CCMPXr
+ 2107924U, // CLREX
+ 553920604U, // CLSWr
+ 553920604U, // CLSXr
+ 6236U, // CLSv16i8
+ 1074272348U, // CLSv2i32
+ 2148538460U, // CLSv4i16
+ 2685671516U, // CLSv4i32
+ 3222804572U, // CLSv8i16
+ 3759937628U, // CLSv8i8
+ 553921084U, // CLZWr
+ 553921084U, // CLZXr
+ 6716U, // CLZv16i8
+ 1074272828U, // CLZv2i32
+ 2148538940U, // CLZv4i16
+ 2685671996U, // CLZv4i32
+ 3222805052U, // CLZv8i16
+ 3759938108U, // CLZv8i8
+ 2147489643U, // CMEQv16i8
+ 5995U, // CMEQv16i8rz
+ 17049451U, // CMEQv1i64
+ 553920363U, // CMEQv1i64rz
+ 2684884843U, // CMEQv2i32
+ 1074272107U, // CMEQv2i32rz
+ 537663339U, // CMEQv2i64
+ 1611405163U, // CMEQv2i64rz
+ 3222280043U, // CMEQv4i16
+ 2148538219U, // CMEQv4i16rz
+ 1075058539U, // CMEQv4i32
+ 2685671275U, // CMEQv4i32rz
+ 1612191595U, // CMEQv8i16
+ 3222804331U, // CMEQv8i16rz
+ 3759937387U, // CMEQv8i8
+ 3759937387U, // CMEQv8i8rz
+ 2147488636U, // CMGEv16i8
+ 4988U, // CMGEv16i8rz
+ 17048444U, // CMGEv1i64
+ 553919356U, // CMGEv1i64rz
+ 2684883836U, // CMGEv2i32
+ 1074271100U, // CMGEv2i32rz
+ 537662332U, // CMGEv2i64
+ 1611404156U, // CMGEv2i64rz
+ 3222279036U, // CMGEv4i16
+ 2148537212U, // CMGEv4i16rz
+ 1075057532U, // CMGEv4i32
+ 2685670268U, // CMGEv4i32rz
+ 1612190588U, // CMGEv8i16
+ 3222803324U, // CMGEv8i16rz
+ 3759936380U, // CMGEv8i8
+ 3759936380U, // CMGEv8i8rz
+ 2147489972U, // CMGTv16i8
+ 6324U, // CMGTv16i8rz
+ 17049780U, // CMGTv1i64
+ 553920692U, // CMGTv1i64rz
+ 2684885172U, // CMGTv2i32
+ 1074272436U, // CMGTv2i32rz
+ 537663668U, // CMGTv2i64
+ 1611405492U, // CMGTv2i64rz
+ 3222280372U, // CMGTv4i16
+ 2148538548U, // CMGTv4i16rz
+ 1075058868U, // CMGTv4i32
+ 2685671604U, // CMGTv4i32rz
+ 1612191924U, // CMGTv8i16
+ 3222804660U, // CMGTv8i16rz
+ 3759937716U, // CMGTv8i8
+ 3759937716U, // CMGTv8i8rz
+ 2147488916U, // CMHIv16i8
+ 17048724U, // CMHIv1i64
+ 2684884116U, // CMHIv2i32
+ 537662612U, // CMHIv2i64
+ 3222279316U, // CMHIv4i16
+ 1075057812U, // CMHIv4i32
+ 1612190868U, // CMHIv8i16
+ 3759936660U, // CMHIv8i8
+ 2147489878U, // CMHSv16i8
+ 17049686U, // CMHSv1i64
+ 2684885078U, // CMHSv2i32
+ 537663574U, // CMHSv2i64
+ 3222280278U, // CMHSv4i16
+ 1075058774U, // CMHSv4i32
+ 1612191830U, // CMHSv8i16
+ 3759937622U, // CMHSv8i8
+ 4995U, // CMLEv16i8rz
+ 553919363U, // CMLEv1i64rz
+ 1074271107U, // CMLEv2i32rz
+ 1611404163U, // CMLEv2i64rz
+ 2148537219U, // CMLEv4i16rz
+ 2685670275U, // CMLEv4i32rz
+ 3222803331U, // CMLEv8i16rz
+ 3759936387U, // CMLEv8i8rz
+ 6342U, // CMLTv16i8rz
+ 553920710U, // CMLTv1i64rz
+ 1074272454U, // CMLTv2i32rz
+ 1611405510U, // CMLTv2i64rz
+ 2148538566U, // CMLTv4i16rz
+ 2685671622U, // CMLTv4i32rz
+ 3222804678U, // CMLTv8i16rz
+ 3759937734U, // CMLTv8i8rz
+ 2147490013U, // CMTSTv16i8
+ 17049821U, // CMTSTv1i64
+ 2684885213U, // CMTSTv2i32
+ 537663709U, // CMTSTv2i64
+ 3222280413U, // CMTSTv4i16
+ 1075058909U, // CMTSTv4i32
+ 1612191965U, // CMTSTv8i16
+ 3759937757U, // CMTSTv8i8
+ 6348U, // CNTv16i8
+ 3759937740U, // CNTv8i8
+ 272763U, // CPYi16
+ 537143675U, // CPYi32
+ 1074014587U, // CPYi64
+ 1610885499U, // CPYi8
+ 17048098U, // CRC32Brr
+ 17048106U, // CRC32CBrr
+ 17048575U, // CRC32CHrr
+ 17050039U, // CRC32CWrr
+ 17050123U, // CRC32CXrr
+ 17048558U, // CRC32Hrr
+ 17050017U, // CRC32Wrr
+ 17050092U, // CRC32Xrr
+ 17048888U, // CSELWr
+ 17048888U, // CSELXr
+ 17048323U, // CSINCWr
+ 17048323U, // CSINCXr
+ 17049971U, // CSINVWr
+ 17049971U, // CSINVXr
+ 17048544U, // CSNEGWr
+ 17048544U, // CSNEGXr
+ 20524U, // DCPS1
+ 20889U, // DCPS2
+ 20938U, // DCPS3
+ 29235U, // DMB
+ 2719U, // DRPS
+ 29324U, // DSB
+ 553654070U, // DUPv16i8gpr
+ 1610618678U, // DUPv16i8lane
+ 554178358U, // DUPv2i32gpr
+ 537401142U, // DUPv2i32lane
+ 554440502U, // DUPv2i64gpr
+ 1074534198U, // DUPv2i64lane
+ 554702646U, // DUPv4i16gpr
+ 1054518U, // DUPv4i16lane
+ 554964790U, // DUPv4i32gpr
+ 538187574U, // DUPv4i32lane
+ 555226934U, // DUPv8i16gpr
+ 1578806U, // DUPv8i16lane
+ 555489078U, // DUPv8i8gpr
+ 1612453686U, // DUPv8i8lane
+ 0U, // EONWrr
+ 17049150U, // EONWrs
+ 0U, // EONXrr
+ 17049150U, // EONXrs
+ 17049538U, // EORWri
+ 0U, // EORWrr
+ 17049538U, // EORWrs
+ 17049538U, // EORXri
+ 0U, // EORXrr
+ 17049538U, // EORXrs
+ 2147489730U, // EORv16i8
+ 3759937474U, // EORv8i8
+ 2724U, // ERET
+ 17049585U, // EXTRWrri
+ 17049585U, // EXTRXrri
+ 2147490026U, // EXTv16i8
+ 3759937770U, // EXTv8i8
0U, // F128CSEL
- 40903456U, // FABDddd
- 40903456U, // FABDsss
- 2148537120U, // FABDvvv_2D
- 1075843872U, // FABDvvv_2S
- 3225424672U, // FABDvvv_4S
- 1074796628U, // FABS2d
- 2149587028U, // FABS2s
- 4200532U, // FABS4s
- 3262130260U, // FABSdd
- 3262130260U, // FABSss
- 40903552U, // FACGEddd
- 40903552U, // FACGEsss
- 2148537216U, // FACGEvvv_2D
- 1075843968U, // FACGEvvv_2S
- 3225424768U, // FACGEvvv_4S
- 40904927U, // FACGTddd
- 40904927U, // FACGTsss
- 2148538591U, // FACGTvvv_2D
- 1075845343U, // FACGTvvv_2S
- 3225426143U, // FACGTvvv_4S
- 2148538086U, // FADDP_2D
- 1075844838U, // FADDP_2S
- 3225425638U, // FADDP_4S
- 1081091814U, // FADDPvv_D_2D
- 2154833638U, // FADDPvv_S_2S
- 40903474U, // FADDddd
- 40903474U, // FADDsss
- 2148537138U, // FADDvvv_2D
- 1075843890U, // FADDvvv_2S
- 3225424690U, // FADDvvv_4S
- 40903589U, // FCCMPEdd
- 40903589U, // FCCMPEss
- 40904466U, // FCCMPdd
- 40904466U, // FCCMPss
- 40904601U, // FCMEQZddi
- 40904601U, // FCMEQZssi
- 40904601U, // FCMEQddd
- 40904601U, // FCMEQsss
- 2148538265U, // FCMEQvvi_2D
- 1075845017U, // FCMEQvvi_2S
- 3225425817U, // FCMEQvvi_4S
- 2148538265U, // FCMEQvvv_2D
- 1075845017U, // FCMEQvvv_2S
- 3225425817U, // FCMEQvvv_4S
- 40903559U, // FCMGEZddi
- 40903559U, // FCMGEZssi
- 40903559U, // FCMGEddd
- 40903559U, // FCMGEsss
- 2148537223U, // FCMGEvvi_2D
- 1075843975U, // FCMGEvvi_2S
- 3225424775U, // FCMGEvvi_4S
- 2148537223U, // FCMGEvvv_2D
- 1075843975U, // FCMGEvvv_2S
- 3225424775U, // FCMGEvvv_4S
- 40904934U, // FCMGTZddi
- 40904934U, // FCMGTZssi
- 40904934U, // FCMGTddd
- 40904934U, // FCMGTsss
- 2148538598U, // FCMGTvvi_2D
- 1075845350U, // FCMGTvvi_2S
- 3225426150U, // FCMGTvvi_4S
- 2148538598U, // FCMGTvvv_2D
- 1075845350U, // FCMGTvvv_2S
- 3225426150U, // FCMGTvvv_4S
- 40903566U, // FCMLEZddi
- 40903566U, // FCMLEZssi
- 2148537230U, // FCMLEvvi_2D
- 1075843982U, // FCMLEvvi_2S
- 3225424782U, // FCMLEvvi_4S
- 40904952U, // FCMLTZddi
- 40904952U, // FCMLTZssi
- 2148538616U, // FCMLTvvi_2D
- 1075845368U, // FCMLTvvi_2S
- 3225426168U, // FCMLTvvi_4S
- 3262129945U, // FCMPdd_quiet
- 3262129069U, // FCMPdd_sig
- 342894361U, // FCMPdi_quiet
- 342893485U, // FCMPdi_sig
- 342894361U, // FCMPsi_quiet
- 342893485U, // FCMPsi_sig
- 3262129945U, // FCMPss_quiet
- 3262129069U, // FCMPss_sig
- 40904026U, // FCSELdddc
- 40904026U, // FCSELsssc
- 1074796620U, // FCVTAS_2d
- 2149587020U, // FCVTAS_2s
- 4200524U, // FCVTAS_4s
- 3262130252U, // FCVTASdd
- 3262130252U, // FCVTASss
- 3262130252U, // FCVTASwd
- 3262130252U, // FCVTASws
- 3262130252U, // FCVTASxd
- 3262130252U, // FCVTASxs
- 1074796840U, // FCVTAU_2d
- 2149587240U, // FCVTAU_2s
- 4200744U, // FCVTAU_4s
- 3262130472U, // FCVTAUdd
- 3262130472U, // FCVTAUss
- 3262130472U, // FCVTAUwd
- 3262130472U, // FCVTAUws
- 3262130472U, // FCVTAUxd
- 3262130472U, // FCVTAUxs
- 2148537838U, // FCVTL2s2d
- 3225425390U, // FCVTL4h4s
- 1052936U, // FCVTL4s2d
- 2151682312U, // FCVTL8h4s
- 1074796694U, // FCVTMS_2d
- 2149587094U, // FCVTMS_2s
- 4200598U, // FCVTMS_4s
- 3262130326U, // FCVTMSdd
- 3262130326U, // FCVTMSss
- 3262130326U, // FCVTMSwd
- 3262130326U, // FCVTMSws
- 3262130326U, // FCVTMSxd
- 3262130326U, // FCVTMSxs
- 1074796856U, // FCVTMU_2d
- 2149587256U, // FCVTMU_2s
- 4200760U, // FCVTMU_4s
- 3262130488U, // FCVTMUdd
- 3262130488U, // FCVTMUss
- 3262130488U, // FCVTMUwd
- 3262130488U, // FCVTMUws
- 3262130488U, // FCVTMUxd
- 3262130488U, // FCVTMUxs
- 1075844764U, // FCVTN2d2s
- 1145049422U, // FCVTN2d4s
- 3151516U, // FCVTN4s4h
- 73404750U, // FCVTN4s8h
- 1074796707U, // FCVTNS_2d
- 2149587107U, // FCVTNS_2s
- 4200611U, // FCVTNS_4s
- 3262130339U, // FCVTNSdd
- 3262130339U, // FCVTNSss
- 3262130339U, // FCVTNSwd
- 3262130339U, // FCVTNSws
- 3262130339U, // FCVTNSxd
- 3262130339U, // FCVTNSxs
- 1074796864U, // FCVTNU_2d
- 2149587264U, // FCVTNU_2s
- 4200768U, // FCVTNU_4s
- 3262130496U, // FCVTNUdd
- 3262130496U, // FCVTNUss
- 3262130496U, // FCVTNUwd
- 3262130496U, // FCVTNUws
- 3262130496U, // FCVTNUxd
- 3262130496U, // FCVTNUxs
- 1074796723U, // FCVTPS_2d
- 2149587123U, // FCVTPS_2s
- 4200627U, // FCVTPS_4s
- 3262130355U, // FCVTPSdd
- 3262130355U, // FCVTPSss
- 3262130355U, // FCVTPSwd
- 3262130355U, // FCVTPSws
- 3262130355U, // FCVTPSxd
- 3262130355U, // FCVTPSxs
- 1074796872U, // FCVTPU_2d
- 2149587272U, // FCVTPU_2s
- 4200776U, // FCVTPU_4s
- 3262130504U, // FCVTPUdd
- 3262130504U, // FCVTPUss
- 3262130504U, // FCVTPUwd
- 3262130504U, // FCVTPUws
- 3262130504U, // FCVTPUxd
- 3262130504U, // FCVTPUxs
- 3262129879U, // FCVTXN
- 1075844823U, // FCVTXN2d2s
- 1145049476U, // FCVTXN2d4s
- 1074796750U, // FCVTZS_2d
- 2149587150U, // FCVTZS_2s
- 4200654U, // FCVTZS_4s
- 40904910U, // FCVTZS_Nddi
- 40904910U, // FCVTZS_Nssi
- 3262130382U, // FCVTZSdd
- 3262130382U, // FCVTZSss
- 3262130382U, // FCVTZSwd
- 40904910U, // FCVTZSwdi
- 3262130382U, // FCVTZSws
- 40904910U, // FCVTZSwsi
- 3262130382U, // FCVTZSxd
- 40904910U, // FCVTZSxdi
- 3262130382U, // FCVTZSxs
- 40904910U, // FCVTZSxsi
- 1074796880U, // FCVTZU_2d
- 2149587280U, // FCVTZU_2s
- 4200784U, // FCVTZU_4s
- 40905040U, // FCVTZU_Nddi
- 40905040U, // FCVTZU_Nssi
- 3262130512U, // FCVTZUdd
- 3262130512U, // FCVTZUss
- 3262130512U, // FCVTZUwd
- 40905040U, // FCVTZUwdi
- 3262130512U, // FCVTZUws
- 40905040U, // FCVTZUwsi
- 3262130512U, // FCVTZUxd
- 40905040U, // FCVTZUxdi
- 3262130512U, // FCVTZUxs
- 40905040U, // FCVTZUxsi
- 3262130461U, // FCVTdh
- 3262130461U, // FCVTds
- 3262130461U, // FCVThd
- 3262130461U, // FCVThs
- 3262130461U, // FCVTsd
- 3262130461U, // FCVTsh
- 40905059U, // FDIVddd
- 40905059U, // FDIVsss
- 2148538723U, // FDIVvvv_2D
- 1075845475U, // FDIVvvv_2S
- 3225426275U, // FDIVvvv_4S
- 40903510U, // FMADDdddd
- 40903510U, // FMADDssss
- 1081091880U, // FMAXNMPvv_D_2D
- 2154833704U, // FMAXNMPvv_S_2S
- 2148538152U, // FMAXNMPvvv_2D
- 1075844904U, // FMAXNMPvvv_2S
- 3225425704U, // FMAXNMPvvv_4S
- 7350670U, // FMAXNMV_1s4s
- 40904233U, // FMAXNMddd
- 40904233U, // FMAXNMsss
- 2148537897U, // FMAXNMvvv_2D
- 1075844649U, // FMAXNMvvv_2S
- 3225425449U, // FMAXNMvvv_4S
- 1081091953U, // FMAXPvv_D_2D
- 2154833777U, // FMAXPvv_S_2S
- 2148538225U, // FMAXPvvv_2D
- 1075844977U, // FMAXPvvv_2S
- 3225425777U, // FMAXPvvv_4S
- 7350725U, // FMAXV_1s4s
- 40905267U, // FMAXddd
- 40905267U, // FMAXsss
- 2148538931U, // FMAXvvv_2D
- 1075845683U, // FMAXvvv_2S
- 3225426483U, // FMAXvvv_4S
- 1081091871U, // FMINNMPvv_D_2D
- 2154833695U, // FMINNMPvv_S_2S
- 2148538143U, // FMINNMPvvv_2D
- 1075844895U, // FMINNMPvvv_2S
- 3225425695U, // FMINNMPvvv_4S
- 7350661U, // FMINNMV_1s4s
- 40904225U, // FMINNMddd
- 40904225U, // FMINNMsss
- 2148537889U, // FMINNMvvv_2D
- 1075844641U, // FMINNMvvv_2S
- 3225425441U, // FMINNMvvv_4S
- 1081091895U, // FMINPvv_D_2D
- 2154833719U, // FMINPvv_S_2S
- 2148538167U, // FMINPvvv_2D
- 1075844919U, // FMINPvvv_2S
- 3225425719U, // FMINPvvv_4S
- 7350679U, // FMINV_1s4s
- 40904272U, // FMINddd
- 40904272U, // FMINsss
- 2148537936U, // FMINvvv_2D
- 1075844688U, // FMINvvv_2S
- 3225425488U, // FMINvvv_4S
- 242229754U, // FMLAddv_2D
- 242229754U, // FMLAssv_4S
- 2215645690U, // FMLAvve_2d2d
- 1142952442U, // FMLAvve_2s4s
- 3292533242U, // FMLAvve_4s4s
- 2215645690U, // FMLAvvv_2D
- 1142952442U, // FMLAvvv_2S
- 3292533242U, // FMLAvvv_4S
- 242231440U, // FMLSddv_2D
- 242231440U, // FMLSssv_4S
- 2215647376U, // FMLSvve_2d2d
- 1142954128U, // FMLSvve_2s4s
- 3292534928U, // FMLSvve_4s4s
- 2215647376U, // FMLSvvv_2D
- 1142954128U, // FMLSvvv_2S
- 3292534928U, // FMLSvvv_4S
- 3262130611U, // FMOVdd
- 376449459U, // FMOVdi
- 3262130611U, // FMOVdx
- 376449459U, // FMOVsi
- 3262130611U, // FMOVss
- 3262130611U, // FMOVsw
- 370153907U, // FMOVvi_2D
- 371202483U, // FMOVvi_2S
- 373299635U, // FMOVvi_4S
- 412096947U, // FMOVvx
- 3262130611U, // FMOVws
- 3262130611U, // FMOVxd
- 3228576179U, // FMOVxv
- 40903373U, // FMSUBdddd
- 40903373U, // FMSUBssss
- 40905318U, // FMULXddd
- 40905318U, // FMULXddv_2D
- 40905318U, // FMULXsss
- 40905318U, // FMULXssv_4S
- 2148538982U, // FMULXve_2d2d
- 1075845734U, // FMULXve_2s4s
- 3225426534U, // FMULXve_4s4s
- 2148538982U, // FMULXvvv_2D
- 1075845734U, // FMULXvvv_2S
- 3225426534U, // FMULXvvv_4S
- 40904181U, // FMULddd
- 40904181U, // FMULddv_2D
- 40904181U, // FMULsss
- 40904181U, // FMULssv_4S
- 2148537845U, // FMULve_2d2d
- 1075844597U, // FMULve_2s4s
- 3225425397U, // FMULve_4s4s
- 2148537845U, // FMULvvv_2D
- 1075844597U, // FMULvvv_2S
- 3225425397U, // FMULvvv_4S
- 1074795487U, // FNEG2d
- 2149585887U, // FNEG2s
- 4199391U, // FNEG4s
- 3262129119U, // FNEGdd
- 3262129119U, // FNEGss
- 40903517U, // FNMADDdddd
- 40903517U, // FNMADDssss
- 40903380U, // FNMSUBdddd
- 40903380U, // FNMSUBssss
- 40904187U, // FNMULddd
- 40904187U, // FNMULsss
- 1074795413U, // FRECPE_2d
- 2149585813U, // FRECPE_2s
- 4199317U, // FRECPE_4s
- 3262129045U, // FRECPEdd
- 3262129045U, // FRECPEss
- 40904875U, // FRECPSddd
- 40904875U, // FRECPSsss
- 2148538539U, // FRECPSvvv_2D
- 1075845291U, // FRECPSvvv_2S
- 3225426091U, // FRECPSvvv_4S
- 3262130797U, // FRECPXdd
- 3262130797U, // FRECPXss
- 1074795034U, // FRINTA_2d
- 2149585434U, // FRINTA_2s
- 4198938U, // FRINTA_4s
- 3262128666U, // FRINTAdd
- 3262128666U, // FRINTAss
- 1074795725U, // FRINTI_2d
- 2149586125U, // FRINTI_2s
- 4199629U, // FRINTI_4s
- 3262129357U, // FRINTIdd
- 3262129357U, // FRINTIss
- 1074796081U, // FRINTM_2d
- 2149586481U, // FRINTM_2s
- 4199985U, // FRINTM_4s
- 3262129713U, // FRINTMdd
- 3262129713U, // FRINTMss
- 1074796180U, // FRINTN_2d
- 2149586580U, // FRINTN_2s
- 4200084U, // FRINTN_4s
- 3262129812U, // FRINTNdd
- 3262129812U, // FRINTNss
- 1074796376U, // FRINTP_2d
- 2149586776U, // FRINTP_2s
- 4200280U, // FRINTP_4s
- 3262130008U, // FRINTPdd
- 3262130008U, // FRINTPss
- 1074797173U, // FRINTX_2d
- 2149587573U, // FRINTX_2s
- 4201077U, // FRINTX_4s
- 3262130805U, // FRINTXdd
- 3262130805U, // FRINTXss
- 1074797222U, // FRINTZ_2d
- 2149587622U, // FRINTZ_2s
- 4201126U, // FRINTZ_4s
- 3262130854U, // FRINTZdd
- 3262130854U, // FRINTZss
- 1074795450U, // FRSQRTE_2d
- 2149585850U, // FRSQRTE_2s
- 4199354U, // FRSQRTE_4s
- 3262129082U, // FRSQRTEdd
- 3262129082U, // FRSQRTEss
- 40904896U, // FRSQRTSddd
- 40904896U, // FRSQRTSsss
- 2148538560U, // FRSQRTSvvv_2D
- 1075845312U, // FRSQRTSvvv_2S
- 3225426112U, // FRSQRTSvvv_4S
- 1074796815U, // FSQRT_2d
- 2149587215U, // FSQRT_2s
- 4200719U, // FSQRT_4s
- 3262130447U, // FSQRTdd
- 3262130447U, // FSQRTss
- 40903353U, // FSUBddd
- 40903353U, // FSUBsss
- 2148537017U, // FSUBvvv_2D
- 1075843769U, // FSUBvvv_2S
- 3225424569U, // FSUBvvv_4S
- 8399108U, // HINTi
- 8399091U, // HLTi
- 8397590U, // HVCi
- 8422140U, // ICi
- 3262153468U, // ICix
- 2225084574U, // INSELb
- 2593134750U, // INSELd
- 1152391326U, // INSELh
- 79698078U, // INSELs
- 3466598558U, // INSbw
- 3666876574U, // INSdx
- 3467647134U, // INShw
- 3468695710U, // INSsw
- 37521U, // ISBi
- 13672469U, // LD1LN_B
- 13676565U, // LD1LN_D
- 13680661U, // LD1LN_H
- 13684757U, // LD1LN_S
- 14721045U, // LD1LN_WB_B_fixed
- 14721045U, // LD1LN_WB_B_register
- 14725141U, // LD1LN_WB_D_fixed
- 14725141U, // LD1LN_WB_D_register
- 14729237U, // LD1LN_WB_H_fixed
- 14729237U, // LD1LN_WB_H_register
- 14733333U, // LD1LN_WB_S_fixed
- 14733333U, // LD1LN_WB_S_register
- 15787936U, // LD1R_16B
- 15792032U, // LD1R_1D
- 15796128U, // LD1R_2D
- 15800224U, // LD1R_2S
- 15804320U, // LD1R_4H
- 15808416U, // LD1R_4S
- 15812512U, // LD1R_8B
- 15816608U, // LD1R_8H
- 16836512U, // LD1R_WB_16B_fixed
- 16836512U, // LD1R_WB_16B_register
- 16840608U, // LD1R_WB_1D_fixed
- 16840608U, // LD1R_WB_1D_register
- 16844704U, // LD1R_WB_2D_fixed
- 16844704U, // LD1R_WB_2D_register
- 16848800U, // LD1R_WB_2S_fixed
- 16848800U, // LD1R_WB_2S_register
- 16852896U, // LD1R_WB_4H_fixed
- 16852896U, // LD1R_WB_4H_register
- 16856992U, // LD1R_WB_4S_fixed
- 16856992U, // LD1R_WB_4S_register
- 16861088U, // LD1R_WB_8B_fixed
- 16861088U, // LD1R_WB_8B_register
- 16865184U, // LD1R_WB_8H_fixed
- 16865184U, // LD1R_WB_8H_register
- 16834581U, // LD1WB_16B_fixed
- 16834581U, // LD1WB_16B_register
- 16838677U, // LD1WB_1D_fixed
- 16838677U, // LD1WB_1D_register
- 16842773U, // LD1WB_2D_fixed
- 16842773U, // LD1WB_2D_register
- 16846869U, // LD1WB_2S_fixed
- 16846869U, // LD1WB_2S_register
- 16850965U, // LD1WB_4H_fixed
- 16850965U, // LD1WB_4H_register
- 16855061U, // LD1WB_4S_fixed
- 16855061U, // LD1WB_4S_register
- 16859157U, // LD1WB_8B_fixed
- 16859157U, // LD1WB_8B_register
- 16863253U, // LD1WB_8H_fixed
- 16863253U, // LD1WB_8H_register
- 15786005U, // LD1_16B
- 15790101U, // LD1_1D
- 15794197U, // LD1_2D
- 15798293U, // LD1_2S
- 15802389U, // LD1_4H
- 15806485U, // LD1_4S
- 15810581U, // LD1_8B
- 15814677U, // LD1_8H
- 16867349U, // LD1x2WB_16B_fixed
- 16867349U, // LD1x2WB_16B_register
- 16871445U, // LD1x2WB_1D_fixed
- 16871445U, // LD1x2WB_1D_register
- 16875541U, // LD1x2WB_2D_fixed
- 16875541U, // LD1x2WB_2D_register
- 16879637U, // LD1x2WB_2S_fixed
- 16879637U, // LD1x2WB_2S_register
- 16883733U, // LD1x2WB_4H_fixed
- 16883733U, // LD1x2WB_4H_register
- 16887829U, // LD1x2WB_4S_fixed
- 16887829U, // LD1x2WB_4S_register
- 16891925U, // LD1x2WB_8B_fixed
- 16891925U, // LD1x2WB_8B_register
- 16896021U, // LD1x2WB_8H_fixed
- 16896021U, // LD1x2WB_8H_register
- 15818773U, // LD1x2_16B
- 15822869U, // LD1x2_1D
- 15826965U, // LD1x2_2D
- 15831061U, // LD1x2_2S
- 15835157U, // LD1x2_4H
- 15839253U, // LD1x2_4S
- 15843349U, // LD1x2_8B
- 15847445U, // LD1x2_8H
- 16900117U, // LD1x3WB_16B_fixed
- 16900117U, // LD1x3WB_16B_register
- 16904213U, // LD1x3WB_1D_fixed
- 16904213U, // LD1x3WB_1D_register
- 16908309U, // LD1x3WB_2D_fixed
- 16908309U, // LD1x3WB_2D_register
- 16912405U, // LD1x3WB_2S_fixed
- 16912405U, // LD1x3WB_2S_register
- 16916501U, // LD1x3WB_4H_fixed
- 16916501U, // LD1x3WB_4H_register
- 16920597U, // LD1x3WB_4S_fixed
- 16920597U, // LD1x3WB_4S_register
- 16924693U, // LD1x3WB_8B_fixed
- 16924693U, // LD1x3WB_8B_register
- 16928789U, // LD1x3WB_8H_fixed
- 16928789U, // LD1x3WB_8H_register
- 15851541U, // LD1x3_16B
- 15855637U, // LD1x3_1D
- 15859733U, // LD1x3_2D
- 15863829U, // LD1x3_2S
- 15867925U, // LD1x3_4H
- 15872021U, // LD1x3_4S
- 15876117U, // LD1x3_8B
- 15880213U, // LD1x3_8H
- 16932885U, // LD1x4WB_16B_fixed
- 16932885U, // LD1x4WB_16B_register
- 16936981U, // LD1x4WB_1D_fixed
- 16936981U, // LD1x4WB_1D_register
- 16941077U, // LD1x4WB_2D_fixed
- 16941077U, // LD1x4WB_2D_register
- 16945173U, // LD1x4WB_2S_fixed
- 16945173U, // LD1x4WB_2S_register
- 16949269U, // LD1x4WB_4H_fixed
- 16949269U, // LD1x4WB_4H_register
- 16953365U, // LD1x4WB_4S_fixed
- 16953365U, // LD1x4WB_4S_register
- 16957461U, // LD1x4WB_8B_fixed
- 16957461U, // LD1x4WB_8B_register
- 16961557U, // LD1x4WB_8H_fixed
- 16961557U, // LD1x4WB_8H_register
- 15884309U, // LD1x4_16B
- 15888405U, // LD1x4_1D
- 15892501U, // LD1x4_2D
- 15896597U, // LD1x4_2S
- 15900693U, // LD1x4_4H
- 15904789U, // LD1x4_4S
- 15908885U, // LD1x4_8B
- 15912981U, // LD1x4_8H
- 13819987U, // LD2LN_B
- 13824083U, // LD2LN_D
- 13828179U, // LD2LN_H
- 13832275U, // LD2LN_S
- 14868563U, // LD2LN_WB_B_fixed
- 14868563U, // LD2LN_WB_B_register
- 14872659U, // LD2LN_WB_D_fixed
- 14872659U, // LD2LN_WB_D_register
- 14876755U, // LD2LN_WB_H_fixed
- 14876755U, // LD2LN_WB_H_register
- 14880851U, // LD2LN_WB_S_fixed
- 14880851U, // LD2LN_WB_S_register
- 15820710U, // LD2R_16B
- 15824806U, // LD2R_1D
- 15828902U, // LD2R_2D
- 15832998U, // LD2R_2S
- 15837094U, // LD2R_4H
- 15841190U, // LD2R_4S
- 15845286U, // LD2R_8B
- 15849382U, // LD2R_8H
- 16869286U, // LD2R_WB_16B_fixed
- 16869286U, // LD2R_WB_16B_register
- 16873382U, // LD2R_WB_1D_fixed
- 16873382U, // LD2R_WB_1D_register
- 16877478U, // LD2R_WB_2D_fixed
- 16877478U, // LD2R_WB_2D_register
- 16881574U, // LD2R_WB_2S_fixed
- 16881574U, // LD2R_WB_2S_register
- 16885670U, // LD2R_WB_4H_fixed
- 16885670U, // LD2R_WB_4H_register
- 16889766U, // LD2R_WB_4S_fixed
- 16889766U, // LD2R_WB_4S_register
- 16893862U, // LD2R_WB_8B_fixed
- 16893862U, // LD2R_WB_8B_register
- 16897958U, // LD2R_WB_8H_fixed
- 16897958U, // LD2R_WB_8H_register
- 16867411U, // LD2WB_16B_fixed
- 16867411U, // LD2WB_16B_register
- 16875603U, // LD2WB_2D_fixed
- 16875603U, // LD2WB_2D_register
- 16879699U, // LD2WB_2S_fixed
- 16879699U, // LD2WB_2S_register
- 16883795U, // LD2WB_4H_fixed
- 16883795U, // LD2WB_4H_register
- 16887891U, // LD2WB_4S_fixed
- 16887891U, // LD2WB_4S_register
- 16891987U, // LD2WB_8B_fixed
- 16891987U, // LD2WB_8B_register
- 16896083U, // LD2WB_8H_fixed
- 16896083U, // LD2WB_8H_register
- 15818835U, // LD2_16B
- 15827027U, // LD2_2D
- 15831123U, // LD2_2S
- 15835219U, // LD2_4H
- 15839315U, // LD2_4S
- 15843411U, // LD2_8B
- 15847507U, // LD2_8H
- 13836741U, // LD3LN_B
- 13840837U, // LD3LN_D
- 13844933U, // LD3LN_H
- 13849029U, // LD3LN_S
- 14885317U, // LD3LN_WB_B_fixed
- 14885317U, // LD3LN_WB_B_register
- 14889413U, // LD3LN_WB_D_fixed
- 14889413U, // LD3LN_WB_D_register
- 14893509U, // LD3LN_WB_H_fixed
- 14893509U, // LD3LN_WB_H_register
- 14897605U, // LD3LN_WB_S_fixed
- 14897605U, // LD3LN_WB_S_register
- 15853484U, // LD3R_16B
- 15857580U, // LD3R_1D
- 15861676U, // LD3R_2D
- 15865772U, // LD3R_2S
- 15869868U, // LD3R_4H
- 15873964U, // LD3R_4S
- 15878060U, // LD3R_8B
- 15882156U, // LD3R_8H
- 16902060U, // LD3R_WB_16B_fixed
- 16902060U, // LD3R_WB_16B_register
- 16906156U, // LD3R_WB_1D_fixed
- 16906156U, // LD3R_WB_1D_register
- 16910252U, // LD3R_WB_2D_fixed
- 16910252U, // LD3R_WB_2D_register
- 16914348U, // LD3R_WB_2S_fixed
- 16914348U, // LD3R_WB_2S_register
- 16918444U, // LD3R_WB_4H_fixed
- 16918444U, // LD3R_WB_4H_register
- 16922540U, // LD3R_WB_4S_fixed
- 16922540U, // LD3R_WB_4S_register
- 16926636U, // LD3R_WB_8B_fixed
- 16926636U, // LD3R_WB_8B_register
- 16930732U, // LD3R_WB_8H_fixed
- 16930732U, // LD3R_WB_8H_register
- 16900549U, // LD3WB_16B_fixed
- 16900549U, // LD3WB_16B_register
- 16908741U, // LD3WB_2D_fixed
- 16908741U, // LD3WB_2D_register
- 16912837U, // LD3WB_2S_fixed
- 16912837U, // LD3WB_2S_register
- 16916933U, // LD3WB_4H_fixed
- 16916933U, // LD3WB_4H_register
- 16921029U, // LD3WB_4S_fixed
- 16921029U, // LD3WB_4S_register
- 16925125U, // LD3WB_8B_fixed
- 16925125U, // LD3WB_8B_register
- 16929221U, // LD3WB_8H_fixed
- 16929221U, // LD3WB_8H_register
- 15851973U, // LD3_16B
- 15860165U, // LD3_2D
- 15864261U, // LD3_2S
- 15868357U, // LD3_4H
- 15872453U, // LD3_4S
- 15876549U, // LD3_8B
- 15880645U, // LD3_8H
- 13853149U, // LD4LN_B
- 13857245U, // LD4LN_D
- 13861341U, // LD4LN_H
- 13865437U, // LD4LN_S
- 14901725U, // LD4LN_WB_B_fixed
- 14901725U, // LD4LN_WB_B_register
- 14905821U, // LD4LN_WB_D_fixed
- 14905821U, // LD4LN_WB_D_register
- 14909917U, // LD4LN_WB_H_fixed
- 14909917U, // LD4LN_WB_H_register
- 14914013U, // LD4LN_WB_S_fixed
- 14914013U, // LD4LN_WB_S_register
- 15886258U, // LD4R_16B
- 15890354U, // LD4R_1D
- 15894450U, // LD4R_2D
- 15898546U, // LD4R_2S
- 15902642U, // LD4R_4H
- 15906738U, // LD4R_4S
- 15910834U, // LD4R_8B
- 15914930U, // LD4R_8H
- 16934834U, // LD4R_WB_16B_fixed
- 16934834U, // LD4R_WB_16B_register
- 16938930U, // LD4R_WB_1D_fixed
- 16938930U, // LD4R_WB_1D_register
- 16943026U, // LD4R_WB_2D_fixed
- 16943026U, // LD4R_WB_2D_register
- 16947122U, // LD4R_WB_2S_fixed
- 16947122U, // LD4R_WB_2S_register
- 16951218U, // LD4R_WB_4H_fixed
- 16951218U, // LD4R_WB_4H_register
- 16955314U, // LD4R_WB_4S_fixed
- 16955314U, // LD4R_WB_4S_register
- 16959410U, // LD4R_WB_8B_fixed
- 16959410U, // LD4R_WB_8B_register
- 16963506U, // LD4R_WB_8H_fixed
- 16963506U, // LD4R_WB_8H_register
- 16933341U, // LD4WB_16B_fixed
- 16933341U, // LD4WB_16B_register
- 16941533U, // LD4WB_2D_fixed
- 16941533U, // LD4WB_2D_register
- 16945629U, // LD4WB_2S_fixed
- 16945629U, // LD4WB_2S_register
- 16949725U, // LD4WB_4H_fixed
- 16949725U, // LD4WB_4H_register
- 16953821U, // LD4WB_4S_fixed
- 16953821U, // LD4WB_4S_register
- 16957917U, // LD4WB_8B_fixed
- 16957917U, // LD4WB_8B_register
- 16962013U, // LD4WB_8H_fixed
- 16962013U, // LD4WB_8H_register
- 15884765U, // LD4_16B
- 15892957U, // LD4_2D
- 15897053U, // LD4_2S
- 15901149U, // LD4_4H
- 15905245U, // LD4_4S
- 15909341U, // LD4_8B
- 15913437U, // LD4_8H
- 51388984U, // LDAR_byte
- 51390392U, // LDAR_dword
- 51389493U, // LDAR_hword
- 51390392U, // LDAR_word
- 1114646378U, // LDAXP_dword
- 1114646378U, // LDAXP_word
- 51389038U, // LDAXR_byte
- 51390514U, // LDAXR_dword
- 51389547U, // LDAXR_hword
- 51390514U, // LDAXR_word
- 1114647047U, // LDPSWx
- 1114647047U, // LDPSWx_PostInd
- 1114647047U, // LDPSWx_PreInd
- 51389078U, // LDRSBw
- 2400199318U, // LDRSBw_PostInd
- 252715670U, // LDRSBw_PreInd
- 51389093U, // LDRSBw_U
- 51389078U, // LDRSBw_Wm_RegOffset
- 51389078U, // LDRSBw_Xm_RegOffset
- 51389078U, // LDRSBx
- 2400199318U, // LDRSBx_PostInd
- 252715670U, // LDRSBx_PreInd
- 51389093U, // LDRSBx_U
- 51389078U, // LDRSBx_Wm_RegOffset
- 51389078U, // LDRSBx_Xm_RegOffset
- 51389577U, // LDRSHw
- 2400199817U, // LDRSHw_PostInd
- 252716169U, // LDRSHw_PreInd
- 51389592U, // LDRSHw_U
- 51389577U, // LDRSHw_Wm_RegOffset
- 51389577U, // LDRSHw_Xm_RegOffset
- 51389577U, // LDRSHx
- 2400199817U, // LDRSHx_PostInd
- 252716169U, // LDRSHx_PreInd
- 51389592U, // LDRSHx_U
- 51389577U, // LDRSHx_Wm_RegOffset
- 51389577U, // LDRSHx_Xm_RegOffset
- 51390990U, // LDRSWx
- 2400201230U, // LDRSWx_PostInd
- 252717582U, // LDRSWx_PreInd
- 51390990U, // LDRSWx_Wm_RegOffset
- 51390990U, // LDRSWx_Xm_RegOffset
- 309340686U, // LDRSWx_lit
- 309340103U, // LDRd_lit
- 309340103U, // LDRq_lit
- 309340103U, // LDRs_lit
- 309340103U, // LDRw_lit
- 309340103U, // LDRx_lit
- 51389085U, // LDTRSBw
- 51389085U, // LDTRSBx
- 51389584U, // LDTRSHw
- 51389584U, // LDTRSHx
- 51390997U, // LDTRSWx
- 51391005U, // LDURSWx
- 1114646406U, // LDXP_dword
- 1114646406U, // LDXP_word
- 51389046U, // LDXR_byte
- 51390521U, // LDXR_dword
- 51389555U, // LDXR_hword
- 51390521U, // LDXR_word
- 51389500U, // LS16_LDR
- 51389533U, // LS16_LDUR
- 2400199740U, // LS16_PostInd_LDR
- 2400429136U, // LS16_PostInd_STR
- 252716092U, // LS16_PreInd_LDR
- 252945488U, // LS16_PreInd_STR
- 51389520U, // LS16_STR
- 51389540U, // LS16_STUR
- 51389513U, // LS16_UnPriv_LDR
- 51389526U, // LS16_UnPriv_STR
- 51389500U, // LS16_Wm_RegOffset_LDR
- 51389520U, // LS16_Wm_RegOffset_STR
- 51389500U, // LS16_Xm_RegOffset_LDR
- 51389520U, // LS16_Xm_RegOffset_STR
- 51390407U, // LS32_LDR
- 51390502U, // LS32_LDUR
- 2400200647U, // LS32_PostInd_LDR
- 2400430101U, // LS32_PostInd_STR
- 252716999U, // LS32_PreInd_LDR
- 252946453U, // LS32_PreInd_STR
- 51390485U, // LS32_STR
- 51390508U, // LS32_STUR
- 51390479U, // LS32_UnPriv_LDR
- 51390490U, // LS32_UnPriv_STR
- 51390407U, // LS32_Wm_RegOffset_LDR
- 51390485U, // LS32_Wm_RegOffset_STR
- 51390407U, // LS32_Xm_RegOffset_LDR
- 51390485U, // LS32_Xm_RegOffset_STR
- 51390407U, // LS64_LDR
- 51390502U, // LS64_LDUR
- 2400200647U, // LS64_PostInd_LDR
- 2400430101U, // LS64_PostInd_STR
- 252716999U, // LS64_PreInd_LDR
- 252946453U, // LS64_PreInd_STR
- 51390485U, // LS64_STR
- 51390508U, // LS64_STUR
- 51390479U, // LS64_UnPriv_LDR
- 51390490U, // LS64_UnPriv_STR
- 51390407U, // LS64_Wm_RegOffset_LDR
- 51390485U, // LS64_Wm_RegOffset_STR
- 51390407U, // LS64_Xm_RegOffset_LDR
- 51390485U, // LS64_Xm_RegOffset_STR
- 51388991U, // LS8_LDR
- 51389024U, // LS8_LDUR
- 2400199231U, // LS8_PostInd_LDR
- 2400428627U, // LS8_PostInd_STR
- 252715583U, // LS8_PreInd_LDR
- 252944979U, // LS8_PreInd_STR
- 51389011U, // LS8_STR
- 51389031U, // LS8_STUR
- 51389004U, // LS8_UnPriv_LDR
- 51389017U, // LS8_UnPriv_STR
- 51388991U, // LS8_Wm_RegOffset_LDR
- 51389011U, // LS8_Wm_RegOffset_STR
- 51388991U, // LS8_Xm_RegOffset_LDR
- 51389011U, // LS8_Xm_RegOffset_STR
- 51390407U, // LSFP128_LDR
- 51390502U, // LSFP128_LDUR
- 2400200647U, // LSFP128_PostInd_LDR
- 2400430101U, // LSFP128_PostInd_STR
- 252716999U, // LSFP128_PreInd_LDR
- 252946453U, // LSFP128_PreInd_STR
- 51390485U, // LSFP128_STR
- 51390508U, // LSFP128_STUR
- 51390407U, // LSFP128_Wm_RegOffset_LDR
- 51390485U, // LSFP128_Wm_RegOffset_STR
- 51390407U, // LSFP128_Xm_RegOffset_LDR
- 51390485U, // LSFP128_Xm_RegOffset_STR
- 51390407U, // LSFP16_LDR
- 51390502U, // LSFP16_LDUR
- 2400200647U, // LSFP16_PostInd_LDR
- 2400430101U, // LSFP16_PostInd_STR
- 252716999U, // LSFP16_PreInd_LDR
- 252946453U, // LSFP16_PreInd_STR
- 51390485U, // LSFP16_STR
- 51390508U, // LSFP16_STUR
- 51390407U, // LSFP16_Wm_RegOffset_LDR
- 51390485U, // LSFP16_Wm_RegOffset_STR
- 51390407U, // LSFP16_Xm_RegOffset_LDR
- 51390485U, // LSFP16_Xm_RegOffset_STR
- 51390407U, // LSFP32_LDR
- 51390502U, // LSFP32_LDUR
- 2400200647U, // LSFP32_PostInd_LDR
- 2400430101U, // LSFP32_PostInd_STR
- 252716999U, // LSFP32_PreInd_LDR
- 252946453U, // LSFP32_PreInd_STR
- 51390485U, // LSFP32_STR
- 51390508U, // LSFP32_STUR
- 51390407U, // LSFP32_Wm_RegOffset_LDR
- 51390485U, // LSFP32_Wm_RegOffset_STR
- 51390407U, // LSFP32_Xm_RegOffset_LDR
- 51390485U, // LSFP32_Xm_RegOffset_STR
- 51390407U, // LSFP64_LDR
- 51390502U, // LSFP64_LDUR
- 2400200647U, // LSFP64_PostInd_LDR
- 2400430101U, // LSFP64_PostInd_STR
- 252716999U, // LSFP64_PreInd_LDR
- 252946453U, // LSFP64_PreInd_STR
- 51390485U, // LSFP64_STR
- 51390508U, // LSFP64_STUR
- 51390407U, // LSFP64_Wm_RegOffset_LDR
- 51390485U, // LSFP64_Wm_RegOffset_STR
- 51390407U, // LSFP64_Xm_RegOffset_LDR
- 51390485U, // LSFP64_Xm_RegOffset_STR
- 51390407U, // LSFP8_LDR
- 51390502U, // LSFP8_LDUR
- 2400200647U, // LSFP8_PostInd_LDR
- 2400430101U, // LSFP8_PostInd_STR
- 252716999U, // LSFP8_PreInd_LDR
- 252946453U, // LSFP8_PreInd_STR
- 51390485U, // LSFP8_STR
- 51390508U, // LSFP8_STUR
- 51390407U, // LSFP8_Wm_RegOffset_LDR
- 51390485U, // LSFP8_Wm_RegOffset_STR
- 51390407U, // LSFP8_Xm_RegOffset_LDR
- 51390485U, // LSFP8_Xm_RegOffset_STR
- 1114646253U, // LSFPPair128_LDR
- 1114646321U, // LSFPPair128_NonTemp_LDR
- 1114646348U, // LSFPPair128_NonTemp_STR
- 1114646253U, // LSFPPair128_PostInd_LDR
- 1316202336U, // LSFPPair128_PostInd_STR
- 1114646253U, // LSFPPair128_PreInd_LDR
- 1316202336U, // LSFPPair128_PreInd_STR
- 1114646368U, // LSFPPair128_STR
- 1114646253U, // LSFPPair32_LDR
- 1114646321U, // LSFPPair32_NonTemp_LDR
- 1114646348U, // LSFPPair32_NonTemp_STR
- 1114646253U, // LSFPPair32_PostInd_LDR
- 1316202336U, // LSFPPair32_PostInd_STR
- 1114646253U, // LSFPPair32_PreInd_LDR
- 1316202336U, // LSFPPair32_PreInd_STR
- 1114646368U, // LSFPPair32_STR
- 1114646253U, // LSFPPair64_LDR
- 1114646321U, // LSFPPair64_NonTemp_LDR
- 1114646348U, // LSFPPair64_NonTemp_STR
- 1114646253U, // LSFPPair64_PostInd_LDR
- 1316202336U, // LSFPPair64_PostInd_STR
- 1114646253U, // LSFPPair64_PreInd_LDR
- 1316202336U, // LSFPPair64_PreInd_STR
- 1114646368U, // LSFPPair64_STR
- 40904149U, // LSLVwww
- 40904149U, // LSLVxxx
- 40904149U, // LSLwwi
- 40904149U, // LSLxxi
- 1114646253U, // LSPair32_LDR
- 1114646321U, // LSPair32_NonTemp_LDR
- 1114646348U, // LSPair32_NonTemp_STR
- 1114646253U, // LSPair32_PostInd_LDR
- 1316202336U, // LSPair32_PostInd_STR
- 1114646253U, // LSPair32_PreInd_LDR
- 1316202336U, // LSPair32_PreInd_STR
- 1114646368U, // LSPair32_STR
- 1114646253U, // LSPair64_LDR
- 1114646321U, // LSPair64_NonTemp_LDR
- 1114646348U, // LSPair64_NonTemp_STR
- 1114646253U, // LSPair64_PostInd_LDR
- 1316202336U, // LSPair64_PostInd_STR
- 1114646253U, // LSPair64_PreInd_LDR
- 1316202336U, // LSPair64_PreInd_STR
- 1114646368U, // LSPair64_STR
- 40904709U, // LSRVwww
- 40904709U, // LSRVxxx
- 40904709U, // LSRwwi
- 40904709U, // LSRxxi
- 40903511U, // MADDwwww
- 40903511U, // MADDxxxx
- 1142952443U, // MLAvve_2s4s
- 2217742843U, // MLAvve_4h8h
- 3292533243U, // MLAvve_4s4s
- 1147146747U, // MLAvve_8h8h
- 67113467U, // MLAvvv_16B
- 1142952443U, // MLAvvv_2S
- 2217742843U, // MLAvvv_4H
- 3292533243U, // MLAvvv_4S
- 3293581819U, // MLAvvv_8B
- 1147146747U, // MLAvvv_8H
- 1142954129U, // MLSvve_2s4s
- 2217744529U, // MLSvve_4h8h
- 3292534929U, // MLSvve_4s4s
- 1147148433U, // MLSvve_8h8h
- 67115153U, // MLSvvv_16B
- 1142954129U, // MLSvvv_2S
- 2217744529U, // MLSvvv_4H
- 3292534929U, // MLSvvv_4S
- 3293583505U, // MLSvvv_8B
- 1147148433U, // MLSvvv_8H
- 477113012U, // MOVIdi
- 3724547285U, // MOVIvi_16B
- 470817460U, // MOVIvi_2D
- 3729790165U, // MOVIvi_8B
- 3726644437U, // MOVIvi_lsl_2S
- 506467541U, // MOVIvi_lsl_4H
- 3728741589U, // MOVIvi_lsl_4S
- 509613269U, // MOVIvi_lsl_8H
- 1579160789U, // MOVIvi_msl_2S
- 1581257941U, // MOVIvi_msl_4S
- 544220384U, // MOVKwii
- 544220384U, // MOVKxii
- 577775313U, // MOVNwii
- 577775313U, // MOVNxii
- 577776302U, // MOVZwii
- 577776302U, // MOVZxii
- 611330235U, // MRSxi
- 243722U, // MSRii
- 247818U, // MSRix
- 40903374U, // MSUBwwww
- 40903374U, // MSUBxxxx
- 1075844598U, // MULve_2s4s
- 2150634998U, // MULve_4h8h
- 3225425398U, // MULve_4s4s
- 1080038902U, // MULve_8h8h
- 5622U, // MULvvv_16B
- 1075844598U, // MULvvv_2S
- 2150634998U, // MULvvv_4H
- 3225425398U, // MULvvv_4S
- 3226473974U, // MULvvv_8B
- 1080038902U, // MULvvv_8H
- 3726644418U, // MVNIvi_lsl_2S
- 506467522U, // MVNIvi_lsl_4H
- 3728741570U, // MVNIvi_lsl_4S
- 509613250U, // MVNIvi_lsl_8H
- 1579160770U, // MVNIvi_msl_2S
- 1581257922U, // MVNIvi_msl_4S
- 40904396U, // MVNww_asr
- 40904396U, // MVNww_lsl
- 40904396U, // MVNww_lsr
- 40904396U, // MVNww_ror
- 40904396U, // MVNxx_asr
- 40904396U, // MVNxx_lsl
- 40904396U, // MVNxx_lsr
- 40904396U, // MVNxx_ror
- 5088U, // NEG16b
- 1074795488U, // NEG2d
- 2149585888U, // NEG2s
- 3224376288U, // NEG4h
- 4199392U, // NEG4s
- 1078989792U, // NEG8b
- 2153780192U, // NEG8h
- 3262129120U, // NEGdd
- 6410U, // NOT16b
- 1078991114U, // NOT8b
- 5775U, // ORNvvv_16B
- 3226474127U, // ORNvvv_8B
- 40904335U, // ORNwww_asr
- 40904335U, // ORNwww_lsl
- 40904335U, // ORNwww_lsr
- 40904335U, // ORNwww_ror
- 40904335U, // ORNxxx_asr
- 40904335U, // ORNxxx_lsl
- 40904335U, // ORNxxx_lsr
- 40904335U, // ORNxxx_ror
- 270538747U, // ORRvi_lsl_2S
- 1345329147U, // ORRvi_lsl_4H
- 272635899U, // ORRvi_lsl_4S
- 1348474875U, // ORRvi_lsl_8H
- 6139U, // ORRvvv_16B
- 3226474491U, // ORRvvv_8B
- 40904699U, // ORRwwi
- 40904699U, // ORRwww_asr
- 40904699U, // ORRwww_lsl
- 40904699U, // ORRwww_lsr
- 40904699U, // ORRwww_ror
- 40904699U, // ORRxxi
- 40904699U, // ORRxxx_asr
- 40904699U, // ORRxxx_lsl
- 40904699U, // ORRxxx_lsr
- 40904699U, // ORRxxx_ror
- 656412886U, // PMULL2vvv_1q2d
- 6295766U, // PMULL2vvv_8h16b
- 689968567U, // PMULLvvv_1q1d
- 3227522487U, // PMULLvvv_8h8b
- 5634U, // PMULvvv_16B
- 3226473986U, // PMULvvv_8B
- 51631643U, // PRFM
- 51631643U, // PRFM_Wm_RegOffset
- 51631643U, // PRFM_Xm_RegOffset
- 309581339U, // PRFM_lit
- 51631673U, // PRFUM
- 1140855152U, // QRSHRUNvvi_16B
- 2149586618U, // QRSHRUNvvi_2S
- 3224377018U, // QRSHRUNvvi_4H
- 2218791280U, // QRSHRUNvvi_4S
- 1078990522U, // QRSHRUNvvi_8B
- 3294630256U, // QRSHRUNvvi_8H
- 1140855142U, // QSHRUNvvi_16B
- 2149586609U, // QSHRUNvvi_2S
- 3224377009U, // QSHRUNvvi_4H
- 2218791270U, // QSHRUNvvi_4S
- 1078990513U, // QSHRUNvvi_8B
- 3294630246U, // QSHRUNvvi_8H
- 1140855065U, // RADDHN2vvv_16b8h
- 2218791193U, // RADDHN2vvv_4s2d
- 3294630169U, // RADDHN2vvv_8h4s
- 2149586504U, // RADDHNvvv_2s2d
- 3224376904U, // RADDHNvvv_4h4s
- 1078990408U, // RADDHNvvv_8b8h
- 6381U, // RBIT16b
- 1078991085U, // RBIT8b
- 3262130413U, // RBITww
- 3262130413U, // RBITxx
- 0U, // RET
- 8399066U, // RETx
- 4583U, // REV16_16b
- 1078989287U, // REV16_8b
- 3262128615U, // REV16ww
- 3262128615U, // REV16xx
- 4172U, // REV32_16b
- 3224375372U, // REV32_4h
- 1078988876U, // REV32_8b
- 2153779276U, // REV32_8h
- 3262128204U, // REV32xx
- 4566U, // REV64_16b
- 2149585366U, // REV64_2s
- 3224375766U, // REV64_4h
- 4198870U, // REV64_4s
- 1078989270U, // REV64_8b
- 2153779670U, // REV64_8h
- 3262130526U, // REVww
- 3262130526U, // REVxx
- 40904694U, // RORVwww
- 40904694U, // RORVxxx
- 1140855094U, // RSHRNvvi_16B
- 2149586559U, // RSHRNvvi_2S
- 3224376959U, // RSHRNvvi_4H
- 2218791222U, // RSHRNvvi_4S
- 1078990463U, // RSHRNvvi_8B
- 3294630198U, // RSHRNvvi_8H
- 1140855056U, // RSUBHN2vvv_16b8h
- 2218791184U, // RSUBHN2vvv_4s2d
- 3294630160U, // RSUBHN2vvv_8h4s
- 2149586496U, // RSUBHNvvv_2s2d
- 3224376896U, // RSUBHNvvv_4h4s
- 1078990400U, // RSUBHNvvv_8b8h
- 3289387106U, // SABAL2vvv_2d2s
- 1145049186U, // SABAL2vvv_4s4h
- 73404514U, // SABAL2vvv_8h8b
- 1141904614U, // SABALvvv_2d2s
- 2218792166U, // SABALvvv_4s4h
- 3294631142U, // SABALvvv_8h8b
- 67113454U, // SABAvvv_16B
- 1142952430U, // SABAvvv_2S
- 2217742830U, // SABAvvv_4H
- 3292533230U, // SABAvvv_4S
- 3293581806U, // SABAvvv_8B
- 1147146734U, // SABAvvv_8H
- 3222278300U, // SABDL2vvv_2d2s
- 1077940380U, // SABDL2vvv_4s4h
- 6295708U, // SABDL2vvv_8h8b
- 1074795822U, // SABDLvvv_2d2s
- 2151683374U, // SABDLvvv_4s4h
- 3227522350U, // SABDLvvv_8h8b
- 4902U, // SABDvvv_16B
- 1075843878U, // SABDvvv_2S
- 2150634278U, // SABDvvv_4H
- 3225424678U, // SABDvvv_4S
- 3226473254U, // SABDvvv_8B
- 1080038182U, // SABDvvv_8H
- 73406194U, // SADALP16b8h
- 2234521330U, // SADALP2s1d
- 3290437362U, // SADALP4h2s
- 68163314U, // SADALP4s2d
- 1144002290U, // SADALP8b4h
- 2218792690U, // SADALP8h4s
- 3222278316U, // SADDL2vvv_2d4s
- 1077940396U, // SADDL2vvv_4s8h
- 6295724U, // SADDL2vvv_8h16b
- 6297346U, // SADDLP16b8h
- 2167412482U, // SADDLP2s1d
- 3223328514U, // SADDLP4h2s
- 1054466U, // SADDLP4s2d
- 1076893442U, // SADDLP8b4h
- 2151683842U, // SADDLP8h4s
- 7350645U, // SADDLV_1d4s
- 7350645U, // SADDLV_1h16b
- 1081092469U, // SADDLV_1h8b
- 3228576117U, // SADDLV_1s4h
- 2154834293U, // SADDLV_1s8h
- 1074795852U, // SADDLvvv_2d2s
- 2151683404U, // SADDLvvv_4s4h
- 3227522380U, // SADDLvvv_8h8b
- 2148536757U, // SADDW2vvv_2d4s
- 3225424309U, // SADDW2vvv_4s8h
- 1080037813U, // SADDW2vvv_8h16b
- 2148538873U, // SADDWvvv_2d2s
- 3225426425U, // SADDWvvv_4s4h
- 1080039929U, // SADDWvvv_8h8b
- 40904807U, // SBCSwww
- 40904807U, // SBCSxxx
- 40903409U, // SBCwww
- 40903409U, // SBCxxx
- 40905351U, // SBFIZwwii
- 40905351U, // SBFIZxxii
- 40904207U, // SBFMwwii
- 40904207U, // SBFMxxii
- 40905306U, // SBFXwwii
- 40905306U, // SBFXxxii
- 1074795473U, // SCVTF_2d
- 2149585873U, // SCVTF_2s
- 4199377U, // SCVTF_4s
- 40903633U, // SCVTF_Nddi
- 40903633U, // SCVTF_Nssi
- 3262129105U, // SCVTFdd
- 3262129105U, // SCVTFdw
- 40903633U, // SCVTFdwi
- 3262129105U, // SCVTFdx
- 40903633U, // SCVTFdxi
- 3262129105U, // SCVTFss
- 3262129105U, // SCVTFsw
- 40903633U, // SCVTFswi
- 3262129105U, // SCVTFsx
- 40903633U, // SCVTFsxi
- 40905065U, // SDIVwww
- 40905065U, // SDIVxxx
- 242229994U, // SHA1C
- 3262129139U, // SHA1H
- 242230792U, // SHA1M
- 242231007U, // SHA1P
- 3292532737U, // SHA1SU0
- 71307320U, // SHA1SU1
- 242230274U, // SHA256H
- 242229336U, // SHA256H2
- 71307274U, // SHA256SU0
- 3292532801U, // SHA256SU1
- 4936U, // SHADDvvv_16B
- 1075843912U, // SHADDvvv_2S
- 2150634312U, // SHADDvvv_4H
- 3225424712U, // SHADDvvv_4S
- 3226473288U, // SHADDvvv_8B
- 1080038216U, // SHADDvvv_8H
- 6295741U, // SHLL16b8h
- 1074795937U, // SHLL2s2d
- 2151683489U, // SHLL4h4s
- 3222278333U, // SHLL4s2d
- 3227522465U, // SHLL8b8h
- 1077940413U, // SHLL8h4s
- 40904035U, // SHLddi
- 5475U, // SHLvvi_16B
- 2148537699U, // SHLvvi_2D
- 1075844451U, // SHLvvi_2S
- 2150634851U, // SHLvvi_4H
- 3225425251U, // SHLvvi_4S
- 3226473827U, // SHLvvi_8B
- 1080038755U, // SHLvvi_8H
- 1140855076U, // SHRNvvi_16B
- 2149586543U, // SHRNvvi_2S
- 3224376943U, // SHRNvvi_4H
- 2218791204U, // SHRNvvi_4S
- 1078990447U, // SHRNvvi_8B
- 3294630180U, // SHRNvvi_8H
- 4799U, // SHSUBvvv_16B
- 1075843775U, // SHSUBvvv_2S
- 2150634175U, // SHSUBvvv_4H
- 3225424575U, // SHSUBvvv_4S
- 3226473151U, // SHSUBvvv_8B
- 1080038079U, // SHSUBvvv_8H
- 242230461U, // SLI
- 67114173U, // SLIvvi_16B
- 2215646397U, // SLIvvi_2D
- 1142953149U, // SLIvvi_2S
- 2217743549U, // SLIvvi_4H
- 3292533949U, // SLIvvi_4S
- 3293582525U, // SLIvvi_8B
- 1147147453U, // SLIvvi_8H
- 40903996U, // SMADDLxwwx
- 6008U, // SMAXPvvv_16B
- 1075844984U, // SMAXPvvv_2S
- 2150635384U, // SMAXPvvv_4H
- 3225425784U, // SMAXPvvv_4S
- 3226474360U, // SMAXPvvv_8B
- 1080039288U, // SMAXPvvv_8H
- 7350732U, // SMAXV_1b16b
- 1081092556U, // SMAXV_1b8b
- 3228576204U, // SMAXV_1h4h
- 2154834380U, // SMAXV_1h8h
- 7350732U, // SMAXV_1s4s
- 6713U, // SMAXvvv_16B
- 1075845689U, // SMAXvvv_2S
- 2150636089U, // SMAXvvv_4H
- 3225426489U, // SMAXvvv_4S
- 3226475065U, // SMAXvvv_8B
- 1080039993U, // SMAXvvv_8H
- 8397578U, // SMCi
- 5950U, // SMINPvvv_16B
- 1075844926U, // SMINPvvv_2S
- 2150635326U, // SMINPvvv_4H
- 3225425726U, // SMINPvvv_4S
- 3226474302U, // SMINPvvv_8B
- 1080039230U, // SMINPvvv_8H
- 7350686U, // SMINV_1b16b
- 1081092510U, // SMINV_1b8b
- 3228576158U, // SMINV_1h4h
- 2154834334U, // SMINV_1h8h
- 7350686U, // SMINV_1s4s
- 5718U, // SMINvvv_16B
- 1075844694U, // SMINvvv_2S
- 2150635094U, // SMINvvv_4H
- 3225425494U, // SMINvvv_4S
- 3226474070U, // SMINvvv_8B
- 1080038998U, // SMINvvv_8H
- 3289387132U, // SMLAL2vvv_2d4s
- 1145049212U, // SMLAL2vvv_4s8h
- 73404540U, // SMLAL2vvv_8h16b
- 1141904637U, // SMLALvve_2d2s
- 3289387132U, // SMLALvve_2d4s
- 2218792189U, // SMLALvve_4s4h
- 1145049212U, // SMLALvve_4s8h
- 1141904637U, // SMLALvvv_2d2s
- 2218792189U, // SMLALvvv_4s4h
- 3294631165U, // SMLALvvv_8h8b
- 3289387256U, // SMLSL2vvv_2d4s
- 1145049336U, // SMLSL2vvv_4s8h
- 73404664U, // SMLSL2vvv_8h16b
- 1141904858U, // SMLSLvve_2d2s
- 3289387256U, // SMLSLvve_2d4s
- 2218792410U, // SMLSLvve_4s4h
- 1145049336U, // SMLSLvve_4s8h
- 1141904858U, // SMLSLvvv_2d2s
- 2218792410U, // SMLSLvvv_4s4h
- 3294631386U, // SMLSLvvv_8h8b
- 2154834361U, // SMOVwb
- 1081092537U, // SMOVwh
- 2154834361U, // SMOVxb
- 1081092537U, // SMOVxh
- 7350713U, // SMOVxs
- 40903952U, // SMSUBLxwwx
- 40903719U, // SMULHxxx
- 3222278366U, // SMULL2vvv_2d4s
- 1077940446U, // SMULL2vvv_4s8h
- 6295774U, // SMULL2vvv_8h16b
- 1074795966U, // SMULLve_2d2s
- 3222278366U, // SMULLve_2d4s
- 2151683518U, // SMULLve_4s4h
- 1077940446U, // SMULLve_4s8h
- 1074795966U, // SMULLvvv_2d2s
- 2151683518U, // SMULLvvv_4s4h
- 3227522494U, // SMULLvvv_8h8b
- 6234U, // SQABS16b
- 1074796634U, // SQABS2d
- 2149587034U, // SQABS2s
- 3224377434U, // SQABS4h
- 4200538U, // SQABS4s
- 1078990938U, // SQABS8b
- 2153781338U, // SQABS8h
- 3262130266U, // SQABSbb
- 3262130266U, // SQABSdd
- 3262130266U, // SQABShh
- 3262130266U, // SQABSss
- 40903526U, // SQADDbbb
- 40903526U, // SQADDddd
- 40903526U, // SQADDhhh
- 40903526U, // SQADDsss
- 4966U, // SQADDvvv_16B
- 2148537190U, // SQADDvvv_2D
- 1075843942U, // SQADDvvv_2S
- 2150634342U, // SQADDvvv_4H
- 3225424742U, // SQADDvvv_4S
- 3226473318U, // SQADDvvv_8B
- 1080038246U, // SQADDvvv_8H
- 3289387122U, // SQDMLAL2vvv_2d4s
- 1145049202U, // SQDMLAL2vvv_4s8h
- 242230516U, // SQDMLALdss
- 242230516U, // SQDMLALdsv_2S
- 242230516U, // SQDMLALdsv_4S
- 242230516U, // SQDMLALshh
- 242230516U, // SQDMLALshv_4H
- 242230516U, // SQDMLALshv_8H
- 1141904628U, // SQDMLALvve_2d2s
- 3289387122U, // SQDMLALvve_2d4s
- 2218792180U, // SQDMLALvve_4s4h
- 1145049202U, // SQDMLALvve_4s8h
- 1141904628U, // SQDMLALvvv_2d2s
- 2218792180U, // SQDMLALvvv_4s4h
- 3289387246U, // SQDMLSL2vvv_2d4s
- 1145049326U, // SQDMLSL2vvv_4s8h
- 242230737U, // SQDMLSLdss
- 242230737U, // SQDMLSLdsv_2S
- 242230737U, // SQDMLSLdsv_4S
- 242230737U, // SQDMLSLshh
- 242230737U, // SQDMLSLshv_4H
- 242230737U, // SQDMLSLshv_8H
- 1141904849U, // SQDMLSLvve_2d2s
- 3289387246U, // SQDMLSLvve_2d4s
- 2218792401U, // SQDMLSLvve_4s4h
- 1145049326U, // SQDMLSLvve_4s8h
- 1141904849U, // SQDMLSLvvv_2d2s
- 2218792401U, // SQDMLSLvvv_4s4h
- 40903700U, // SQDMULHhhh
- 40903700U, // SQDMULHhhv_4H
- 40903700U, // SQDMULHhhv_8H
- 40903700U, // SQDMULHsss
- 40903700U, // SQDMULHssv_2S
- 40903700U, // SQDMULHssv_4S
- 1075844116U, // SQDMULHve_2s4s
- 2150634516U, // SQDMULHve_4h8h
- 3225424916U, // SQDMULHve_4s4s
- 1080038420U, // SQDMULHve_8h8h
- 1075844116U, // SQDMULHvvv_2S
- 2150634516U, // SQDMULHvvv_4H
- 3225424916U, // SQDMULHvvv_4S
- 1080038420U, // SQDMULHvvv_8H
- 3222278348U, // SQDMULL2vvv_2d4s
- 1077940428U, // SQDMULL2vvv_4s8h
- 40904110U, // SQDMULLdss
- 40904110U, // SQDMULLdsv_2S
- 40904110U, // SQDMULLdsv_4S
- 40904110U, // SQDMULLshh
- 40904110U, // SQDMULLshv_4H
- 40904110U, // SQDMULLshv_8H
- 1074795950U, // SQDMULLve_2d2s
- 3222278348U, // SQDMULLve_2d4s
- 2151683502U, // SQDMULLve_4s4h
- 1077940428U, // SQDMULLve_4s8h
- 1074795950U, // SQDMULLvvv_2d2s
- 2151683502U, // SQDMULLvvv_4s4h
- 5093U, // SQNEG16b
- 1074795493U, // SQNEG2d
- 2149585893U, // SQNEG2s
- 3224376293U, // SQNEG4h
- 4199397U, // SQNEG4s
- 1078989797U, // SQNEG8b
- 2153780197U, // SQNEG8h
- 3262129125U, // SQNEGbb
- 3262129125U, // SQNEGdd
- 3262129125U, // SQNEGhh
- 3262129125U, // SQNEGss
- 40903709U, // SQRDMULHhhh
- 40903709U, // SQRDMULHhhv_4H
- 40903709U, // SQRDMULHhhv_8H
- 40903709U, // SQRDMULHsss
- 40903709U, // SQRDMULHssv_2S
- 40903709U, // SQRDMULHssv_4S
- 1075844125U, // SQRDMULHve_2s4s
- 2150634525U, // SQRDMULHve_4h8h
- 3225424925U, // SQRDMULHve_4s4s
- 1080038429U, // SQRDMULHve_8h8h
- 1075844125U, // SQRDMULHvvv_2S
- 2150634525U, // SQRDMULHvvv_4H
- 3225424925U, // SQRDMULHvvv_4S
- 1080038429U, // SQRDMULHvvv_8H
- 40904047U, // SQRSHLbbb
- 40904047U, // SQRSHLddd
- 40904047U, // SQRSHLhhh
- 40904047U, // SQRSHLsss
- 5487U, // SQRSHLvvv_16B
- 2148537711U, // SQRSHLvvv_2D
- 1075844463U, // SQRSHLvvv_2S
- 2150634863U, // SQRSHLvvv_4H
- 3225425263U, // SQRSHLvvv_4S
- 3226473839U, // SQRSHLvvv_8B
- 1080038767U, // SQRSHLvvv_8H
- 40904317U, // SQRSHRNbhi
- 40904317U, // SQRSHRNhsi
- 40904317U, // SQRSHRNsdi
- 1140855092U, // SQRSHRNvvi_16B
- 2149586557U, // SQRSHRNvvi_2S
- 3224376957U, // SQRSHRNvvi_4H
- 2218791220U, // SQRSHRNvvi_4S
- 1078990461U, // SQRSHRNvvi_8B
- 3294630196U, // SQRSHRNvvi_8H
- 40904378U, // SQRSHRUNbhi
- 40904378U, // SQRSHRUNhsi
- 40904378U, // SQRSHRUNsdi
- 40905008U, // SQSHLUbbi
- 40905008U, // SQSHLUddi
- 40905008U, // SQSHLUhhi
- 40905008U, // SQSHLUssi
- 6448U, // SQSHLUvvi_16B
- 2148538672U, // SQSHLUvvi_2D
- 1075845424U, // SQSHLUvvi_2S
- 2150635824U, // SQSHLUvvi_4H
- 3225426224U, // SQSHLUvvi_4S
- 3226474800U, // SQSHLUvvi_8B
- 1080039728U, // SQSHLUvvi_8H
- 40904033U, // SQSHLbbb
- 40904033U, // SQSHLbbi
- 40904033U, // SQSHLddd
- 40904033U, // SQSHLddi
- 40904033U, // SQSHLhhh
- 40904033U, // SQSHLhhi
- 40904033U, // SQSHLssi
- 40904033U, // SQSHLsss
- 5473U, // SQSHLvvi_16B
- 2148537697U, // SQSHLvvi_2D
- 1075844449U, // SQSHLvvi_2S
- 2150634849U, // SQSHLvvi_4H
- 3225425249U, // SQSHLvvi_4S
- 3226473825U, // SQSHLvvi_8B
- 1080038753U, // SQSHLvvi_8H
- 5473U, // SQSHLvvv_16B
- 2148537697U, // SQSHLvvv_2D
- 1075844449U, // SQSHLvvv_2S
- 2150634849U, // SQSHLvvv_4H
- 3225425249U, // SQSHLvvv_4S
- 3226473825U, // SQSHLvvv_8B
- 1080038753U, // SQSHLvvv_8H
- 40904301U, // SQSHRNbhi
- 40904301U, // SQSHRNhsi
- 40904301U, // SQSHRNsdi
- 1140855074U, // SQSHRNvvi_16B
- 2149586541U, // SQSHRNvvi_2S
- 3224376941U, // SQSHRNvvi_4H
- 2218791202U, // SQSHRNvvi_4S
- 1078990445U, // SQSHRNvvi_8B
- 3294630178U, // SQSHRNvvi_8H
- 40904369U, // SQSHRUNbhi
- 40904369U, // SQSHRUNhsi
- 40904369U, // SQSHRUNsdi
- 40903388U, // SQSUBbbb
- 40903388U, // SQSUBddd
- 40903388U, // SQSUBhhh
- 40903388U, // SQSUBsss
- 4828U, // SQSUBvvv_16B
- 2148537052U, // SQSUBvvv_2D
- 1075843804U, // SQSUBvvv_2S
- 2150634204U, // SQSUBvvv_4H
- 3225424604U, // SQSUBvvv_4S
- 3226473180U, // SQSUBvvv_8B
- 1080038108U, // SQSUBvvv_8H
- 1075844771U, // SQXTN2d2s
- 1145049430U, // SQXTN2d4s
- 3151523U, // SQXTN4s4h
- 73404758U, // SQXTN4s8h
- 2214596950U, // SQXTN8h16b
- 2152732323U, // SQXTN8h8b
- 3262129827U, // SQXTNbh
- 3262129827U, // SQXTNhs
- 3262129827U, // SQXTNsd
- 1075844804U, // SQXTUN2d2s
- 1145049467U, // SQXTUN2d4s
- 3151556U, // SQXTUN4s4h
- 73404795U, // SQXTUN4s8h
- 2214596987U, // SQXTUN8h16b
- 2152732356U, // SQXTUN8h8b
- 3262129860U, // SQXTUNbh
- 3262129860U, // SQXTUNhs
- 3262129860U, // SQXTUNsd
- 4920U, // SRHADDvvv_16B
- 1075843896U, // SRHADDvvv_2S
- 2150634296U, // SRHADDvvv_4H
- 3225424696U, // SRHADDvvv_4S
- 3226473272U, // SRHADDvvv_8B
- 1080038200U, // SRHADDvvv_8H
- 242230472U, // SRI
- 67114184U, // SRIvvi_16B
- 2215646408U, // SRIvvi_2D
- 1142953160U, // SRIvvi_2S
- 2217743560U, // SRIvvi_4H
- 3292533960U, // SRIvvi_4S
- 3293582536U, // SRIvvi_8B
- 1147147464U, // SRIvvi_8H
- 40904063U, // SRSHLddd
- 5503U, // SRSHLvvv_16B
- 2148537727U, // SRSHLvvv_2D
- 1075844479U, // SRSHLvvv_2S
- 2150634879U, // SRSHLvvv_4H
- 3225425279U, // SRSHLvvv_4S
- 3226473855U, // SRSHLvvv_8B
- 1080038783U, // SRSHLvvv_8H
- 40904652U, // SRSHRddi
- 6092U, // SRSHRvvi_16B
- 2148538316U, // SRSHRvvi_2D
- 1075845068U, // SRSHRvvi_2S
- 2150635468U, // SRSHRvvi_4H
- 3225425868U, // SRSHRvvi_4S
- 3226474444U, // SRSHRvvi_8B
- 1080039372U, // SRSHRvvi_8H
- 242229760U, // SRSRA
- 67113472U, // SRSRAvvi_16B
- 2215645696U, // SRSRAvvi_2D
- 1142952448U, // SRSRAvvi_2S
- 2217742848U, // SRSRAvvi_4H
- 3292533248U, // SRSRAvvi_4S
- 3293581824U, // SRSRAvvi_8B
- 1147146752U, // SRSRAvvi_8H
- 6295740U, // SSHLLvvi_16B
- 1074795936U, // SSHLLvvi_2S
- 2151683488U, // SSHLLvvi_4H
- 3222278332U, // SSHLLvvi_4S
- 3227522464U, // SSHLLvvi_8B
- 1077940412U, // SSHLLvvi_8H
- 40904077U, // SSHLddd
- 5517U, // SSHLvvv_16B
- 2148537741U, // SSHLvvv_2D
- 1075844493U, // SSHLvvv_2S
- 2150634893U, // SSHLvvv_4H
- 3225425293U, // SSHLvvv_4S
- 3226473869U, // SSHLvvv_8B
- 1080038797U, // SSHLvvv_8H
- 40904666U, // SSHRddi
- 6106U, // SSHRvvi_16B
- 2148538330U, // SSHRvvi_2D
- 1075845082U, // SSHRvvi_2S
- 2150635482U, // SSHRvvi_4H
- 3225425882U, // SSHRvvi_4S
- 3226474458U, // SSHRvvi_8B
- 1080039386U, // SSHRvvi_8H
- 242229774U, // SSRA
- 67113486U, // SSRAvvi_16B
- 2215645710U, // SSRAvvi_2D
- 1142952462U, // SSRAvvi_2S
- 2217742862U, // SSRAvvi_4H
- 3292533262U, // SSRAvvi_4S
- 3293581838U, // SSRAvvi_8B
- 1147146766U, // SSRAvvi_8H
- 3222278284U, // SSUBL2vvv_2d4s
- 1077940364U, // SSUBL2vvv_4s8h
- 6295692U, // SSUBL2vvv_8h16b
- 1074795808U, // SSUBLvvv_2d2s
- 2151683360U, // SSUBLvvv_4s4h
- 3227522336U, // SSUBLvvv_8h8b
- 2148536741U, // SSUBW2vvv_2d4s
- 3225424293U, // SSUBW2vvv_4s8h
- 1080037797U, // SSUBW2vvv_8h16b
- 2148538850U, // SSUBWvvv_2d2s
- 3225426402U, // SSUBWvvv_4s4h
- 1080039906U, // SSUBWvvv_8h8b
- 254003U, // ST1LN_B
- 258099U, // ST1LN_D
- 262195U, // ST1LN_H
- 266291U, // ST1LN_S
- 270387U, // ST1LN_WB_B_fixed
- 270387U, // ST1LN_WB_B_register
- 274483U, // ST1LN_WB_D_fixed
- 274483U, // ST1LN_WB_D_register
- 278579U, // ST1LN_WB_H_fixed
- 278579U, // ST1LN_WB_H_register
- 282675U, // ST1LN_WB_S_fixed
- 282675U, // ST1LN_WB_S_register
- 286771U, // ST1WB_16B_fixed
- 286771U, // ST1WB_16B_register
- 290867U, // ST1WB_1D_fixed
- 290867U, // ST1WB_1D_register
- 294963U, // ST1WB_2D_fixed
- 294963U, // ST1WB_2D_register
- 299059U, // ST1WB_2S_fixed
- 299059U, // ST1WB_2S_register
- 303155U, // ST1WB_4H_fixed
- 303155U, // ST1WB_4H_register
- 307251U, // ST1WB_4S_fixed
- 307251U, // ST1WB_4S_register
- 311347U, // ST1WB_8B_fixed
- 311347U, // ST1WB_8B_register
- 315443U, // ST1WB_8H_fixed
- 315443U, // ST1WB_8H_register
- 319539U, // ST1_16B
- 323635U, // ST1_1D
- 327731U, // ST1_2D
- 331827U, // ST1_2S
- 335923U, // ST1_4H
- 340019U, // ST1_4S
- 344115U, // ST1_8B
- 348211U, // ST1_8H
- 352307U, // ST1x2WB_16B_fixed
- 352307U, // ST1x2WB_16B_register
- 356403U, // ST1x2WB_1D_fixed
- 356403U, // ST1x2WB_1D_register
- 360499U, // ST1x2WB_2D_fixed
- 360499U, // ST1x2WB_2D_register
- 364595U, // ST1x2WB_2S_fixed
- 364595U, // ST1x2WB_2S_register
- 368691U, // ST1x2WB_4H_fixed
- 368691U, // ST1x2WB_4H_register
- 372787U, // ST1x2WB_4S_fixed
- 372787U, // ST1x2WB_4S_register
- 376883U, // ST1x2WB_8B_fixed
- 376883U, // ST1x2WB_8B_register
- 380979U, // ST1x2WB_8H_fixed
- 380979U, // ST1x2WB_8H_register
- 385075U, // ST1x2_16B
- 389171U, // ST1x2_1D
- 393267U, // ST1x2_2D
- 397363U, // ST1x2_2S
- 401459U, // ST1x2_4H
- 405555U, // ST1x2_4S
- 409651U, // ST1x2_8B
- 413747U, // ST1x2_8H
- 417843U, // ST1x3WB_16B_fixed
- 417843U, // ST1x3WB_16B_register
- 421939U, // ST1x3WB_1D_fixed
- 421939U, // ST1x3WB_1D_register
- 426035U, // ST1x3WB_2D_fixed
- 426035U, // ST1x3WB_2D_register
- 430131U, // ST1x3WB_2S_fixed
- 430131U, // ST1x3WB_2S_register
- 434227U, // ST1x3WB_4H_fixed
- 434227U, // ST1x3WB_4H_register
- 438323U, // ST1x3WB_4S_fixed
- 438323U, // ST1x3WB_4S_register
- 442419U, // ST1x3WB_8B_fixed
- 442419U, // ST1x3WB_8B_register
- 446515U, // ST1x3WB_8H_fixed
- 446515U, // ST1x3WB_8H_register
- 450611U, // ST1x3_16B
- 454707U, // ST1x3_1D
- 458803U, // ST1x3_2D
- 462899U, // ST1x3_2S
- 466995U, // ST1x3_4H
- 471091U, // ST1x3_4S
- 475187U, // ST1x3_8B
- 479283U, // ST1x3_8H
- 483379U, // ST1x4WB_16B_fixed
- 483379U, // ST1x4WB_16B_register
- 487475U, // ST1x4WB_1D_fixed
- 487475U, // ST1x4WB_1D_register
- 491571U, // ST1x4WB_2D_fixed
- 491571U, // ST1x4WB_2D_register
- 495667U, // ST1x4WB_2S_fixed
- 495667U, // ST1x4WB_2S_register
- 499763U, // ST1x4WB_4H_fixed
- 499763U, // ST1x4WB_4H_register
- 503859U, // ST1x4WB_4S_fixed
- 503859U, // ST1x4WB_4S_register
- 507955U, // ST1x4WB_8B_fixed
- 507955U, // ST1x4WB_8B_register
- 512051U, // ST1x4WB_8H_fixed
- 512051U, // ST1x4WB_8H_register
- 516147U, // ST1x4_16B
- 520243U, // ST1x4_1D
- 524339U, // ST1x4_2D
- 528435U, // ST1x4_2S
- 532531U, // ST1x4_4H
- 536627U, // ST1x4_4S
- 540723U, // ST1x4_8B
- 544819U, // ST1x4_8H
- 549280U, // ST2LN_B
- 553376U, // ST2LN_D
- 557472U, // ST2LN_H
- 561568U, // ST2LN_S
- 565664U, // ST2LN_WB_B_fixed
- 565664U, // ST2LN_WB_B_register
- 569760U, // ST2LN_WB_D_fixed
- 569760U, // ST2LN_WB_D_register
- 573856U, // ST2LN_WB_H_fixed
- 573856U, // ST2LN_WB_H_register
- 577952U, // ST2LN_WB_S_fixed
- 577952U, // ST2LN_WB_S_register
- 352672U, // ST2WB_16B_fixed
- 352672U, // ST2WB_16B_register
- 360864U, // ST2WB_2D_fixed
- 360864U, // ST2WB_2D_register
- 364960U, // ST2WB_2S_fixed
- 364960U, // ST2WB_2S_register
- 369056U, // ST2WB_4H_fixed
- 369056U, // ST2WB_4H_register
- 373152U, // ST2WB_4S_fixed
- 373152U, // ST2WB_4S_register
- 377248U, // ST2WB_8B_fixed
- 377248U, // ST2WB_8B_register
- 381344U, // ST2WB_8H_fixed
- 381344U, // ST2WB_8H_register
- 385440U, // ST2_16B
- 393632U, // ST2_2D
- 397728U, // ST2_2S
- 401824U, // ST2_4H
- 405920U, // ST2_4S
- 410016U, // ST2_8B
- 414112U, // ST2_8H
- 582097U, // ST3LN_B
- 586193U, // ST3LN_D
- 590289U, // ST3LN_H
- 594385U, // ST3LN_S
- 598481U, // ST3LN_WB_B_fixed
- 598481U, // ST3LN_WB_B_register
- 602577U, // ST3LN_WB_D_fixed
- 602577U, // ST3LN_WB_D_register
- 606673U, // ST3LN_WB_H_fixed
- 606673U, // ST3LN_WB_H_register
- 610769U, // ST3LN_WB_S_fixed
- 610769U, // ST3LN_WB_S_register
- 418257U, // ST3WB_16B_fixed
- 418257U, // ST3WB_16B_register
- 426449U, // ST3WB_2D_fixed
- 426449U, // ST3WB_2D_register
- 430545U, // ST3WB_2S_fixed
- 430545U, // ST3WB_2S_register
- 434641U, // ST3WB_4H_fixed
- 434641U, // ST3WB_4H_register
- 438737U, // ST3WB_4S_fixed
- 438737U, // ST3WB_4S_register
- 442833U, // ST3WB_8B_fixed
- 442833U, // ST3WB_8B_register
- 446929U, // ST3WB_8H_fixed
- 446929U, // ST3WB_8H_register
- 451025U, // ST3_16B
- 459217U, // ST3_2D
- 463313U, // ST3_2S
- 467409U, // ST3_4H
- 471505U, // ST3_4S
- 475601U, // ST3_8B
- 479697U, // ST3_8H
- 614882U, // ST4LN_B
- 618978U, // ST4LN_D
- 623074U, // ST4LN_H
- 627170U, // ST4LN_S
- 631266U, // ST4LN_WB_B_fixed
- 631266U, // ST4LN_WB_B_register
- 635362U, // ST4LN_WB_D_fixed
- 635362U, // ST4LN_WB_D_register
- 639458U, // ST4LN_WB_H_fixed
- 639458U, // ST4LN_WB_H_register
- 643554U, // ST4LN_WB_S_fixed
- 643554U, // ST4LN_WB_S_register
- 483810U, // ST4WB_16B_fixed
- 483810U, // ST4WB_16B_register
- 492002U, // ST4WB_2D_fixed
- 492002U, // ST4WB_2D_register
- 496098U, // ST4WB_2S_fixed
- 496098U, // ST4WB_2S_register
- 500194U, // ST4WB_4H_fixed
- 500194U, // ST4WB_4H_register
- 504290U, // ST4WB_4S_fixed
- 504290U, // ST4WB_4S_register
- 508386U, // ST4WB_8B_fixed
- 508386U, // ST4WB_8B_register
- 512482U, // ST4WB_8H_fixed
- 512482U, // ST4WB_8H_register
- 516578U, // ST4_16B
- 524770U, // ST4_2D
- 528866U, // ST4_2S
- 532962U, // ST4_4H
- 537058U, // ST4_4S
- 541154U, // ST4_8B
- 545250U, // ST4_8H
- 51388997U, // STLR_byte
- 51390443U, // STLR_dword
- 51389506U, // STLR_hword
- 51390443U, // STLR_word
- 40904588U, // STLXP_dword
- 40904588U, // STLXP_word
- 1114645117U, // STLXR_byte
- 1114646591U, // STLXR_dword
- 1114645626U, // STLXR_hword
- 1114646591U, // STLXR_word
- 40904595U, // STXP_dword
- 40904595U, // STXP_word
- 1114645125U, // STXR_byte
- 1114646598U, // STXR_dword
- 1114645634U, // STXR_hword
- 1114646598U, // STXR_word
- 1140855057U, // SUBHN2vvv_16b8h
- 2218791185U, // SUBHN2vvv_4s2d
- 3294630161U, // SUBHN2vvv_8h4s
- 2149586497U, // SUBHNvvv_2s2d
- 3224376897U, // SUBHNvvv_4h4s
- 1078990401U, // SUBHNvvv_8b8h
- 40904801U, // SUBSwww_asr
- 40904801U, // SUBSwww_lsl
- 40904801U, // SUBSwww_lsr
- 40904801U, // SUBSwww_sxtb
- 40904801U, // SUBSwww_sxth
- 40904801U, // SUBSwww_sxtw
- 40904801U, // SUBSwww_sxtx
- 40904801U, // SUBSwww_uxtb
- 40904801U, // SUBSwww_uxth
- 40904801U, // SUBSwww_uxtw
- 40904801U, // SUBSwww_uxtx
- 40904801U, // SUBSxxw_sxtb
- 40904801U, // SUBSxxw_sxth
- 40904801U, // SUBSxxw_sxtw
- 40904801U, // SUBSxxw_uxtb
- 40904801U, // SUBSxxw_uxth
- 40904801U, // SUBSxxw_uxtw
- 40904801U, // SUBSxxx_asr
- 40904801U, // SUBSxxx_lsl
- 40904801U, // SUBSxxx_lsr
- 40904801U, // SUBSxxx_sxtx
- 40904801U, // SUBSxxx_uxtx
- 40903354U, // SUBddd
- 4794U, // SUBvvv_16B
- 2148537018U, // SUBvvv_2D
- 1075843770U, // SUBvvv_2S
- 2150634170U, // SUBvvv_4H
- 3225424570U, // SUBvvv_4S
- 3226473146U, // SUBvvv_8B
- 1080038074U, // SUBvvv_8H
- 40904801U, // SUBwwi_lsl0_S
- 108014272U, // SUBwwi_lsl0_cmp
- 40903354U, // SUBwwi_lsl0_s
- 40904801U, // SUBwwi_lsl12_S
- 141568704U, // SUBwwi_lsl12_cmp
- 40903354U, // SUBwwi_lsl12_s
- 40903354U, // SUBwww_asr
- 40903354U, // SUBwww_lsl
- 40903354U, // SUBwww_lsr
- 40903354U, // SUBwww_sxtb
- 40903354U, // SUBwww_sxth
- 40903354U, // SUBwww_sxtw
- 40903354U, // SUBwww_sxtx
- 40903354U, // SUBwww_uxtb
- 40903354U, // SUBwww_uxth
- 40903354U, // SUBwww_uxtw
- 40903354U, // SUBwww_uxtx
- 40904801U, // SUBxxi_lsl0_S
- 108014272U, // SUBxxi_lsl0_cmp
- 40903354U, // SUBxxi_lsl0_s
- 40904801U, // SUBxxi_lsl12_S
- 141568704U, // SUBxxi_lsl12_cmp
- 40903354U, // SUBxxi_lsl12_s
- 40903354U, // SUBxxw_sxtb
- 40903354U, // SUBxxw_sxth
- 40903354U, // SUBxxw_sxtw
- 40903354U, // SUBxxw_uxtb
- 40903354U, // SUBxxw_uxth
- 40903354U, // SUBxxw_uxtw
- 40903354U, // SUBxxx_asr
- 40903354U, // SUBxxx_lsl
- 40903354U, // SUBxxx_lsr
- 40903354U, // SUBxxx_sxtx
- 40903354U, // SUBxxx_uxtx
- 67113837U, // SUQADD16b
- 1141904237U, // SUQADD2d
- 2216694637U, // SUQADD2s
- 3291485037U, // SUQADD4h
- 71308141U, // SUQADD4s
- 1146098541U, // SUQADD8b
- 2220888941U, // SUQADD8h
- 3463455597U, // SUQADDbb
- 3463455597U, // SUQADDdd
- 3463455597U, // SUQADDhh
- 3463455597U, // SUQADDss
- 8397595U, // SVCi
- 3262128813U, // SXTBww
- 3262128813U, // SXTBxw
- 3262129312U, // SXTHww
- 3262129312U, // SXTHxw
- 3262130725U, // SXTWxw
- 40904168U, // SYSLxicci
- 711993545U, // SYSiccix
- 0U, // TAIL_BRx
- 0U, // TAIL_Bimm
- 738202891U, // TBL1_16b
- 1817187595U, // TBL1_8b
- 771757323U, // TBL2_16b
- 1850742027U, // TBL2_8b
- 805311755U, // TBL3_16b
- 1884296459U, // TBL3_8b
- 838866187U, // TBL4_16b
- 1917850891U, // TBL4_8b
- 40905376U, // TBNZwii
- 40905376U, // TBNZxii
- 872421957U, // TBX1_16b
- 1951406661U, // TBX1_8b
- 905976389U, // TBX2_16b
- 1984961093U, // TBX2_8b
- 939530821U, // TBX3_16b
- 2018515525U, // TBX3_8b
- 973085253U, // TBX4_16b
- 2052069957U, // TBX4_8b
- 40905346U, // TBZwii
- 40905346U, // TBZxii
- 0U, // TC_RETURNdi
- 0U, // TC_RETURNxi
- 9036972U, // TLBIi
- 3262768300U, // TLBIix
- 0U, // TLSDESCCALL
- 0U, // TLSDESC_BLRx
- 4122U, // TRN1vvv_16b
- 2148536346U, // TRN1vvv_2d
- 1075843098U, // TRN1vvv_2s
- 2150633498U, // TRN1vvv_4h
- 3225423898U, // TRN1vvv_4s
- 3226472474U, // TRN1vvv_8b
- 1080037402U, // TRN1vvv_8h
- 4424U, // TRN2vvv_16b
- 2148536648U, // TRN2vvv_2d
- 1075843400U, // TRN2vvv_2s
- 2150633800U, // TRN2vvv_4h
- 3225424200U, // TRN2vvv_4s
- 3226472776U, // TRN2vvv_8b
- 1080037704U, // TRN2vvv_8h
- 40904984U, // TSTww_asr
- 40904984U, // TSTww_lsl
- 40904984U, // TSTww_lsr
- 40904984U, // TSTww_ror
- 40904984U, // TSTxx_asr
- 40904984U, // TSTxx_lsl
- 40904984U, // TSTxx_lsr
- 40904984U, // TSTxx_ror
- 3289387114U, // UABAL2vvv_2d2s
- 1145049194U, // UABAL2vvv_4s4h
- 73404522U, // UABAL2vvv_8h8b
- 1141904621U, // UABALvvv_2d2s
- 2218792173U, // UABALvvv_4s4h
- 3294631149U, // UABALvvv_8h8b
- 67113460U, // UABAvvv_16B
- 1142952436U, // UABAvvv_2S
- 2217742836U, // UABAvvv_4H
- 3292533236U, // UABAvvv_4S
- 3293581812U, // UABAvvv_8B
- 1147146740U, // UABAvvv_8H
- 3222278308U, // UABDL2vvv_2d2s
- 1077940388U, // UABDL2vvv_4s4h
- 6295716U, // UABDL2vvv_8h8b
- 1074795829U, // UABDLvvv_2d2s
- 2151683381U, // UABDLvvv_4s4h
- 3227522357U, // UABDLvvv_8h8b
- 4908U, // UABDvvv_16B
- 1075843884U, // UABDvvv_2S
- 2150634284U, // UABDvvv_4H
- 3225424684U, // UABDvvv_4S
- 3226473260U, // UABDvvv_8B
- 1080038188U, // UABDvvv_8H
- 73406202U, // UADALP16b8h
- 2234521338U, // UADALP2s1d
- 3290437370U, // UADALP4h2s
- 68163322U, // UADALP4s2d
- 1144002298U, // UADALP8b4h
- 2218792698U, // UADALP8h4s
- 3222278324U, // UADDL2vvv_2d4s
- 1077940404U, // UADDL2vvv_4s8h
- 6295732U, // UADDL2vvv_8h16b
- 6297354U, // UADDLP16b8h
- 2167412490U, // UADDLP2s1d
- 3223328522U, // UADDLP4h2s
- 1054474U, // UADDLP4s2d
- 1076893450U, // UADDLP8b4h
- 2151683850U, // UADDLP8h4s
- 7350653U, // UADDLV_1d4s
- 7350653U, // UADDLV_1h16b
- 1081092477U, // UADDLV_1h8b
- 3228576125U, // UADDLV_1s4h
- 2154834301U, // UADDLV_1s8h
- 1074795859U, // UADDLvvv_2d2s
- 2151683411U, // UADDLvvv_4s4h
- 3227522387U, // UADDLvvv_8h8b
- 2148536765U, // UADDW2vvv_2d4s
- 3225424317U, // UADDW2vvv_4s8h
- 1080037821U, // UADDW2vvv_8h16b
- 2148538880U, // UADDWvvv_2d2s
- 3225426432U, // UADDWvvv_4s4h
- 1080039936U, // UADDWvvv_8h8b
- 40905358U, // UBFIZwwii
- 40905358U, // UBFIZxxii
- 40904213U, // UBFMwwii
- 40904213U, // UBFMxxii
- 40905312U, // UBFXwwii
- 40905312U, // UBFXxxii
- 1074795480U, // UCVTF_2d
- 2149585880U, // UCVTF_2s
- 4199384U, // UCVTF_4s
- 40903640U, // UCVTF_Nddi
- 40903640U, // UCVTF_Nssi
- 3262129112U, // UCVTFdd
- 3262129112U, // UCVTFdw
- 40903640U, // UCVTFdwi
- 3262129112U, // UCVTFdx
- 40903640U, // UCVTFdxi
- 3262129112U, // UCVTFss
- 3262129112U, // UCVTFsw
- 40903640U, // UCVTFswi
- 3262129112U, // UCVTFsx
- 40903640U, // UCVTFsxi
- 40905071U, // UDIVwww
- 40905071U, // UDIVxxx
- 4943U, // UHADDvvv_16B
- 1075843919U, // UHADDvvv_2S
- 2150634319U, // UHADDvvv_4H
- 3225424719U, // UHADDvvv_4S
- 3226473295U, // UHADDvvv_8B
- 1080038223U, // UHADDvvv_8H
- 4806U, // UHSUBvvv_16B
- 1075843782U, // UHSUBvvv_2S
- 2150634182U, // UHSUBvvv_4H
- 3225424582U, // UHSUBvvv_4S
- 3226473158U, // UHSUBvvv_8B
- 1080038086U, // UHSUBvvv_8H
- 40904004U, // UMADDLxwwx
- 6015U, // UMAXPvvv_16B
- 1075844991U, // UMAXPvvv_2S
- 2150635391U, // UMAXPvvv_4H
- 3225425791U, // UMAXPvvv_4S
- 3226474367U, // UMAXPvvv_8B
- 1080039295U, // UMAXPvvv_8H
- 7350739U, // UMAXV_1b16b
- 1081092563U, // UMAXV_1b8b
- 3228576211U, // UMAXV_1h4h
- 2154834387U, // UMAXV_1h8h
- 7350739U, // UMAXV_1s4s
- 6719U, // UMAXvvv_16B
- 1075845695U, // UMAXvvv_2S
- 2150636095U, // UMAXvvv_4H
- 3225426495U, // UMAXvvv_4S
- 3226475071U, // UMAXvvv_8B
- 1080039999U, // UMAXvvv_8H
- 5957U, // UMINPvvv_16B
- 1075844933U, // UMINPvvv_2S
- 2150635333U, // UMINPvvv_4H
- 3225425733U, // UMINPvvv_4S
- 3226474309U, // UMINPvvv_8B
- 1080039237U, // UMINPvvv_8H
- 7350693U, // UMINV_1b16b
- 1081092517U, // UMINV_1b8b
- 3228576165U, // UMINV_1h4h
- 2154834341U, // UMINV_1h8h
- 7350693U, // UMINV_1s4s
- 5724U, // UMINvvv_16B
- 1075844700U, // UMINvvv_2S
- 2150635100U, // UMINvvv_4H
- 3225425500U, // UMINvvv_4S
- 3226474076U, // UMINvvv_8B
- 1080039004U, // UMINvvv_8H
- 3289387140U, // UMLAL2vvv_2d4s
- 1145049220U, // UMLAL2vvv_4s8h
- 73404548U, // UMLAL2vvv_8h16b
- 1141904644U, // UMLALvve_2d2s
- 3289387140U, // UMLALvve_2d4s
- 2218792196U, // UMLALvve_4s4h
- 1145049220U, // UMLALvve_4s8h
- 1141904644U, // UMLALvvv_2d2s
- 2218792196U, // UMLALvvv_4s4h
- 3294631172U, // UMLALvvv_8h8b
- 3289387264U, // UMLSL2vvv_2d4s
- 1145049344U, // UMLSL2vvv_4s8h
- 73404672U, // UMLSL2vvv_8h16b
- 1141904865U, // UMLSLvve_2d2s
- 3289387264U, // UMLSLvve_2d4s
- 2218792417U, // UMLSLvve_4s4h
- 1145049344U, // UMLSLvve_4s8h
- 1141904865U, // UMLSLvvv_2d2s
- 2218792417U, // UMLSLvvv_4s4h
- 3294631393U, // UMLSLvvv_8h8b
- 2154834367U, // UMOVwb
- 1081092543U, // UMOVwh
- 7350719U, // UMOVws
- 3228576191U, // UMOVxd
- 40903960U, // UMSUBLxwwx
- 40903726U, // UMULHxxx
- 3222278374U, // UMULL2vvv_2d4s
- 1077940454U, // UMULL2vvv_4s8h
- 6295782U, // UMULL2vvv_8h16b
- 1074795973U, // UMULLve_2d2s
- 3222278374U, // UMULLve_2d4s
- 2151683525U, // UMULLve_4s4h
- 1077940454U, // UMULLve_4s8h
- 1074795973U, // UMULLvvv_2d2s
- 2151683525U, // UMULLvvv_4s4h
- 3227522501U, // UMULLvvv_8h8b
- 40903534U, // UQADDbbb
- 40903534U, // UQADDddd
- 40903534U, // UQADDhhh
- 40903534U, // UQADDsss
- 4974U, // UQADDvvv_16B
- 2148537198U, // UQADDvvv_2D
- 1075843950U, // UQADDvvv_2S
- 2150634350U, // UQADDvvv_4H
- 3225424750U, // UQADDvvv_4S
- 3226473326U, // UQADDvvv_8B
- 1080038254U, // UQADDvvv_8H
- 40904055U, // UQRSHLbbb
- 40904055U, // UQRSHLddd
- 40904055U, // UQRSHLhhh
- 40904055U, // UQRSHLsss
- 5495U, // UQRSHLvvv_16B
- 2148537719U, // UQRSHLvvv_2D
- 1075844471U, // UQRSHLvvv_2S
- 2150634871U, // UQRSHLvvv_4H
- 3225425271U, // UQRSHLvvv_4S
- 3226473847U, // UQRSHLvvv_8B
- 1080038775U, // UQRSHLvvv_8H
- 40904326U, // UQRSHRNbhi
- 40904326U, // UQRSHRNhsi
- 40904326U, // UQRSHRNsdi
- 1140855102U, // UQRSHRNvvi_16B
- 2149586566U, // UQRSHRNvvi_2S
- 3224376966U, // UQRSHRNvvi_4H
- 2218791230U, // UQRSHRNvvi_4S
- 1078990470U, // UQRSHRNvvi_8B
- 3294630206U, // UQRSHRNvvi_8H
- 40904040U, // UQSHLbbb
- 40904040U, // UQSHLbbi
- 40904040U, // UQSHLddd
- 40904040U, // UQSHLddi
- 40904040U, // UQSHLhhh
- 40904040U, // UQSHLhhi
- 40904040U, // UQSHLssi
- 40904040U, // UQSHLsss
- 5480U, // UQSHLvvi_16B
- 2148537704U, // UQSHLvvi_2D
- 1075844456U, // UQSHLvvi_2S
- 2150634856U, // UQSHLvvi_4H
- 3225425256U, // UQSHLvvi_4S
- 3226473832U, // UQSHLvvi_8B
- 1080038760U, // UQSHLvvi_8H
- 5480U, // UQSHLvvv_16B
- 2148537704U, // UQSHLvvv_2D
- 1075844456U, // UQSHLvvv_2S
- 2150634856U, // UQSHLvvv_4H
- 3225425256U, // UQSHLvvv_4S
- 3226473832U, // UQSHLvvv_8B
- 1080038760U, // UQSHLvvv_8H
- 40904309U, // UQSHRNbhi
- 40904309U, // UQSHRNhsi
- 40904309U, // UQSHRNsdi
- 1140855083U, // UQSHRNvvi_16B
- 2149586549U, // UQSHRNvvi_2S
- 3224376949U, // UQSHRNvvi_4H
- 2218791211U, // UQSHRNvvi_4S
- 1078990453U, // UQSHRNvvi_8B
- 3294630187U, // UQSHRNvvi_8H
- 40903395U, // UQSUBbbb
- 40903395U, // UQSUBddd
- 40903395U, // UQSUBhhh
- 40903395U, // UQSUBsss
- 4835U, // UQSUBvvv_16B
- 2148537059U, // UQSUBvvv_2D
- 1075843811U, // UQSUBvvv_2S
- 2150634211U, // UQSUBvvv_4H
- 3225424611U, // UQSUBvvv_4S
- 3226473187U, // UQSUBvvv_8B
- 1080038115U, // UQSUBvvv_8H
- 1075844778U, // UQXTN2d2s
- 1145049438U, // UQXTN2d4s
- 3151530U, // UQXTN4s4h
- 73404766U, // UQXTN4s8h
- 2214596958U, // UQXTN8h16b
- 2152732330U, // UQXTN8h8b
- 3262129834U, // UQXTNbh
- 3262129834U, // UQXTNhs
- 3262129834U, // UQXTNsd
- 2149585821U, // URECPE2s
- 4199325U, // URECPE4s
- 4928U, // URHADDvvv_16B
- 1075843904U, // URHADDvvv_2S
- 2150634304U, // URHADDvvv_4H
- 3225424704U, // URHADDvvv_4S
- 3226473280U, // URHADDvvv_8B
- 1080038208U, // URHADDvvv_8H
- 40904070U, // URSHLddd
- 5510U, // URSHLvvv_16B
- 2148537734U, // URSHLvvv_2D
- 1075844486U, // URSHLvvv_2S
- 2150634886U, // URSHLvvv_4H
- 3225425286U, // URSHLvvv_4S
- 3226473862U, // URSHLvvv_8B
- 1080038790U, // URSHLvvv_8H
- 40904659U, // URSHRddi
- 6099U, // URSHRvvi_16B
- 2148538323U, // URSHRvvi_2D
- 1075845075U, // URSHRvvi_2S
- 2150635475U, // URSHRvvi_4H
- 3225425875U, // URSHRvvi_4S
- 3226474451U, // URSHRvvi_8B
- 1080039379U, // URSHRvvi_8H
- 2149585859U, // URSQRTE2s
- 4199363U, // URSQRTE4s
- 242229767U, // URSRA
- 67113479U, // URSRAvvi_16B
- 2215645703U, // URSRAvvi_2D
- 1142952455U, // URSRAvvi_2S
- 2217742855U, // URSRAvvi_4H
- 3292533255U, // URSRAvvi_4S
- 3293581831U, // URSRAvvi_8B
- 1147146759U, // URSRAvvi_8H
- 6295748U, // USHLLvvi_16B
- 1074795943U, // USHLLvvi_2S
- 2151683495U, // USHLLvvi_4H
- 3222278340U, // USHLLvvi_4S
- 3227522471U, // USHLLvvi_8B
- 1077940420U, // USHLLvvi_8H
- 40904083U, // USHLddd
- 5523U, // USHLvvv_16B
- 2148537747U, // USHLvvv_2D
- 1075844499U, // USHLvvv_2S
- 2150634899U, // USHLvvv_4H
- 3225425299U, // USHLvvv_4S
- 3226473875U, // USHLvvv_8B
- 1080038803U, // USHLvvv_8H
- 40904672U, // USHRddi
- 6112U, // USHRvvi_16B
- 2148538336U, // USHRvvi_2D
- 1075845088U, // USHRvvi_2S
- 2150635488U, // USHRvvi_4H
- 3225425888U, // USHRvvi_4S
- 3226474464U, // USHRvvi_8B
- 1080039392U, // USHRvvi_8H
- 67113829U, // USQADD16b
- 1141904229U, // USQADD2d
- 2216694629U, // USQADD2s
- 3291485029U, // USQADD4h
- 71308133U, // USQADD4s
- 1146098533U, // USQADD8b
- 2220888933U, // USQADD8h
- 3463455589U, // USQADDbb
- 3463455589U, // USQADDdd
- 3463455589U, // USQADDhh
- 3463455589U, // USQADDss
- 242229780U, // USRA
- 67113492U, // USRAvvi_16B
- 2215645716U, // USRAvvi_2D
- 1142952468U, // USRAvvi_2S
- 2217742868U, // USRAvvi_4H
- 3292533268U, // USRAvvi_4S
- 3293581844U, // USRAvvi_8B
- 1147146772U, // USRAvvi_8H
- 3222278292U, // USUBL2vvv_2d4s
- 1077940372U, // USUBL2vvv_4s8h
- 6295700U, // USUBL2vvv_8h16b
- 1074795815U, // USUBLvvv_2d2s
- 2151683367U, // USUBLvvv_4s4h
- 3227522343U, // USUBLvvv_8h8b
- 2148536749U, // USUBW2vvv_2d4s
- 3225424301U, // USUBW2vvv_4s8h
- 1080037805U, // USUBW2vvv_8h16b
- 2148538857U, // USUBWvvv_2d2s
- 3225426409U, // USUBWvvv_4s4h
- 1080039913U, // USUBWvvv_8h8b
- 3262128819U, // UXTBww
- 3262128819U, // UXTBxw
- 3262129318U, // UXTHww
- 3262129318U, // UXTHxw
- 4134U, // UZP1vvv_16b
- 2148536358U, // UZP1vvv_2d
- 1075843110U, // UZP1vvv_2s
- 2150633510U, // UZP1vvv_4h
- 3225423910U, // UZP1vvv_4s
- 3226472486U, // UZP1vvv_8b
- 1080037414U, // UZP1vvv_8h
- 4499U, // UZP2vvv_16b
- 2148536723U, // UZP2vvv_2d
- 1075843475U, // UZP2vvv_2s
- 2150633875U, // UZP2vvv_4h
- 3225424275U, // UZP2vvv_4s
- 3226472851U, // UZP2vvv_8b
- 1080037779U, // UZP2vvv_8h
- 2148538574U, // VCVTf2xs_2D
- 1075845326U, // VCVTf2xs_2S
- 3225426126U, // VCVTf2xs_4S
- 2148538704U, // VCVTf2xu_2D
- 1075845456U, // VCVTf2xu_2S
- 3225426256U, // VCVTf2xu_4S
- 2148537297U, // VCVTxs2f_2D
- 1075844049U, // VCVTxs2f_2S
- 3225424849U, // VCVTxs2f_4S
- 2148537304U, // VCVTxu2f_2D
- 1075844056U, // VCVTxu2f_2S
- 3225424856U, // VCVTxu2f_4S
- 1075844773U, // XTN2d2s
- 1145049432U, // XTN2d4s
- 3151525U, // XTN4s4h
- 73404760U, // XTN4s8h
- 2214596952U, // XTN8h16b
- 2152732325U, // XTN8h8b
- 4128U, // ZIP1vvv_16b
- 2148536352U, // ZIP1vvv_2d
- 1075843104U, // ZIP1vvv_2s
- 2150633504U, // ZIP1vvv_4h
- 3225423904U, // ZIP1vvv_4s
- 3226472480U, // ZIP1vvv_8b
- 1080037408U, // ZIP1vvv_8h
- 4493U, // ZIP2vvv_16b
- 2148536717U, // ZIP2vvv_2d
- 1075843469U, // ZIP2vvv_2s
- 2150633869U, // ZIP2vvv_4h
- 3225424269U, // ZIP2vvv_4s
- 3226472845U, // ZIP2vvv_8b
- 1080037773U, // ZIP2vvv_8h
+ 17048340U, // FABD32
+ 17048340U, // FABD64
+ 2684883732U, // FABDv2f32
+ 537662228U, // FABDv2f64
+ 1075057428U, // FABDv4f32
+ 553920549U, // FABSDr
+ 553920549U, // FABSSr
+ 1074272293U, // FABSv2f32
+ 1611405349U, // FABSv2f64
+ 2685671461U, // FABSv4f32
+ 17048436U, // FACGE32
+ 17048436U, // FACGE64
+ 2684883828U, // FACGEv2f32
+ 537662324U, // FACGEv2f64
+ 1075057524U, // FACGEv4f32
+ 17049772U, // FACGT32
+ 17049772U, // FACGT64
+ 2684885164U, // FACGTv2f32
+ 537663660U, // FACGTv2f64
+ 1075058860U, // FACGTv4f32
+ 17048358U, // FADDDrr
+ 2684884663U, // FADDPv2f32
+ 537663159U, // FADDPv2f64
+ 1074013879U, // FADDPv2i32p
+ 1610884791U, // FADDPv2i64p
+ 1075058359U, // FADDPv4f32
+ 17048358U, // FADDSrr
+ 2684883750U, // FADDv2f32
+ 537662246U, // FADDv2f64
+ 1075057446U, // FADDv4f32
+ 17049315U, // FCCMPDrr
+ 17048473U, // FCCMPEDrr
+ 17048473U, // FCCMPESrr
+ 17049315U, // FCCMPSrr
+ 17049450U, // FCMEQ32
+ 17049450U, // FCMEQ64
+ 2164533098U, // FCMEQv1i32rz
+ 2164533098U, // FCMEQv1i64rz
+ 2684884842U, // FCMEQv2f32
+ 537663338U, // FCMEQv2f64
+ 2684884842U, // FCMEQv2i32rz
+ 3222017898U, // FCMEQv2i64rz
+ 1075058538U, // FCMEQv4f32
+ 3759413098U, // FCMEQv4i32rz
+ 17048443U, // FCMGE32
+ 17048443U, // FCMGE64
+ 2164532091U, // FCMGEv1i32rz
+ 2164532091U, // FCMGEv1i64rz
+ 2684883835U, // FCMGEv2f32
+ 537662331U, // FCMGEv2f64
+ 2684883835U, // FCMGEv2i32rz
+ 3222016891U, // FCMGEv2i64rz
+ 1075057531U, // FCMGEv4f32
+ 3759412091U, // FCMGEv4i32rz
+ 17049779U, // FCMGT32
+ 17049779U, // FCMGT64
+ 2164533427U, // FCMGTv1i32rz
+ 2164533427U, // FCMGTv1i64rz
+ 2684885171U, // FCMGTv2f32
+ 537663667U, // FCMGTv2f64
+ 2684885171U, // FCMGTv2i32rz
+ 3222018227U, // FCMGTv2i64rz
+ 1075058867U, // FCMGTv4f32
+ 3759413427U, // FCMGTv4i32rz
+ 2164532098U, // FCMLEv1i32rz
+ 2164532098U, // FCMLEv1i64rz
+ 2684883842U, // FCMLEv2i32rz
+ 3222016898U, // FCMLEv2i64rz
+ 3759412098U, // FCMLEv4i32rz
+ 2164533445U, // FCMLTv1i32rz
+ 2164533445U, // FCMLTv1i64rz
+ 2684885189U, // FCMLTv2i32rz
+ 3222018245U, // FCMLTv2i64rz
+ 3759413445U, // FCMLTv4i32rz
+ 2369258U, // FCMPDri
+ 553920234U, // FCMPDrr
+ 2368417U, // FCMPEDri
+ 553919393U, // FCMPEDrr
+ 2368417U, // FCMPESri
+ 553919393U, // FCMPESrr
+ 2369258U, // FCMPSri
+ 553920234U, // FCMPSrr
+ 17048887U, // FCSELDrrr
+ 17048887U, // FCSELSrrr
+ 553920541U, // FCVTASUWDr
+ 553920541U, // FCVTASUWSr
+ 553920541U, // FCVTASUXDr
+ 553920541U, // FCVTASUXSr
+ 553920541U, // FCVTASv1i32
+ 553920541U, // FCVTASv1i64
+ 1074272285U, // FCVTASv2f32
+ 1611405341U, // FCVTASv2f64
+ 2685671453U, // FCVTASv4f32
+ 553920751U, // FCVTAUUWDr
+ 553920751U, // FCVTAUUWSr
+ 553920751U, // FCVTAUUXDr
+ 553920751U, // FCVTAUUXSr
+ 553920751U, // FCVTAUv1i32
+ 553920751U, // FCVTAUv1i64
+ 1074272495U, // FCVTAUv2f32
+ 1611405551U, // FCVTAUv2f64
+ 2685671663U, // FCVTAUv4f32
+ 553920740U, // FCVTDHr
+ 553920740U, // FCVTDSr
+ 553920740U, // FCVTHDr
+ 553920740U, // FCVTHSr
+ 1074533828U, // FCVTLv2i32
+ 2148799940U, // FCVTLv4i16
+ 2685145352U, // FCVTLv4i32
+ 3222540552U, // FCVTLv8i16
+ 553920615U, // FCVTMSUWDr
+ 553920615U, // FCVTMSUWSr
+ 553920615U, // FCVTMSUXDr
+ 553920615U, // FCVTMSUXSr
+ 553920615U, // FCVTMSv1i32
+ 553920615U, // FCVTMSv1i64
+ 1074272359U, // FCVTMSv2f32
+ 1611405415U, // FCVTMSv2f64
+ 2685671527U, // FCVTMSv4f32
+ 553920767U, // FCVTMUUWDr
+ 553920767U, // FCVTMUUWSr
+ 553920767U, // FCVTMUUXDr
+ 553920767U, // FCVTMUUXSr
+ 553920767U, // FCVTMUv1i32
+ 553920767U, // FCVTMUv1i64
+ 1074272511U, // FCVTMUv2f32
+ 1611405567U, // FCVTMUv2f64
+ 2685671679U, // FCVTMUv4f32
+ 553920628U, // FCVTNSUWDr
+ 553920628U, // FCVTNSUWSr
+ 553920628U, // FCVTNSUXDr
+ 553920628U, // FCVTNSUXSr
+ 553920628U, // FCVTNSv1i32
+ 553920628U, // FCVTNSv1i64
+ 1074272372U, // FCVTNSv2f32
+ 1611405428U, // FCVTNSv2f64
+ 2685671540U, // FCVTNSv4f32
+ 553920775U, // FCVTNUUWDr
+ 553920775U, // FCVTNUUWSr
+ 553920775U, // FCVTNUUXDr
+ 553920775U, // FCVTNUUXSr
+ 553920775U, // FCVTNUv1i32
+ 553920775U, // FCVTNUv1i64
+ 1074272519U, // FCVTNUv2f32
+ 1611405575U, // FCVTNUv2f64
+ 2685671687U, // FCVTNUv4f32
+ 1611142770U, // FCVTNv2i32
+ 2685408882U, // FCVTNv4i16
+ 1645490510U, // FCVTNv4i32
+ 2719494478U, // FCVTNv8i16
+ 553920644U, // FCVTPSUWDr
+ 553920644U, // FCVTPSUWSr
+ 553920644U, // FCVTPSUXDr
+ 553920644U, // FCVTPSUXSr
+ 553920644U, // FCVTPSv1i32
+ 553920644U, // FCVTPSv1i64
+ 1074272388U, // FCVTPSv2f32
+ 1611405444U, // FCVTPSv2f64
+ 2685671556U, // FCVTPSv4f32
+ 553920783U, // FCVTPUUWDr
+ 553920783U, // FCVTPUUWSr
+ 553920783U, // FCVTPUUXDr
+ 553920783U, // FCVTPUUXSr
+ 553920783U, // FCVTPUv1i32
+ 553920783U, // FCVTPUv1i64
+ 1074272527U, // FCVTPUv2f32
+ 1611405583U, // FCVTPUv2f64
+ 2685671695U, // FCVTPUv4f32
+ 553920740U, // FCVTSDr
+ 553920740U, // FCVTSHr
+ 553920168U, // FCVTXNv1i64
+ 1611142824U, // FCVTXNv2f32
+ 1645490564U, // FCVTXNv4f32
+ 17049759U, // FCVTZSSWDri
+ 17049759U, // FCVTZSSWSri
+ 17049759U, // FCVTZSSXDri
+ 17049759U, // FCVTZSSXSri
+ 553920671U, // FCVTZSUWDr
+ 553920671U, // FCVTZSUWSr
+ 553920671U, // FCVTZSUXDr
+ 553920671U, // FCVTZSUXSr
+ 17049759U, // FCVTZS_IntSWDri
+ 17049759U, // FCVTZS_IntSWSri
+ 17049759U, // FCVTZS_IntSXDri
+ 17049759U, // FCVTZS_IntSXSri
+ 553920671U, // FCVTZS_IntUWDr
+ 553920671U, // FCVTZS_IntUWSr
+ 553920671U, // FCVTZS_IntUXDr
+ 553920671U, // FCVTZS_IntUXSr
+ 1074272415U, // FCVTZS_Intv2f32
+ 1611405471U, // FCVTZS_Intv2f64
+ 2685671583U, // FCVTZS_Intv4f32
+ 17049759U, // FCVTZSd
+ 17049759U, // FCVTZSs
+ 553920671U, // FCVTZSv1i32
+ 553920671U, // FCVTZSv1i64
+ 1074272415U, // FCVTZSv2f32
+ 1611405471U, // FCVTZSv2f64
+ 2684885151U, // FCVTZSv2i32_shift
+ 537663647U, // FCVTZSv2i64_shift
+ 2685671583U, // FCVTZSv4f32
+ 1075058847U, // FCVTZSv4i32_shift
+ 17049879U, // FCVTZUSWDri
+ 17049879U, // FCVTZUSWSri
+ 17049879U, // FCVTZUSXDri
+ 17049879U, // FCVTZUSXSri
+ 553920791U, // FCVTZUUWDr
+ 553920791U, // FCVTZUUWSr
+ 553920791U, // FCVTZUUXDr
+ 553920791U, // FCVTZUUXSr
+ 17049879U, // FCVTZU_IntSWDri
+ 17049879U, // FCVTZU_IntSWSri
+ 17049879U, // FCVTZU_IntSXDri
+ 17049879U, // FCVTZU_IntSXSri
+ 553920791U, // FCVTZU_IntUWDr
+ 553920791U, // FCVTZU_IntUWSr
+ 553920791U, // FCVTZU_IntUXDr
+ 553920791U, // FCVTZU_IntUXSr
+ 1074272535U, // FCVTZU_Intv2f32
+ 1611405591U, // FCVTZU_Intv2f64
+ 2685671703U, // FCVTZU_Intv4f32
+ 17049879U, // FCVTZUd
+ 17049879U, // FCVTZUs
+ 553920791U, // FCVTZUv1i32
+ 553920791U, // FCVTZUv1i64
+ 1074272535U, // FCVTZUv2f32
+ 1611405591U, // FCVTZUv2f64
+ 2684885271U, // FCVTZUv2i32_shift
+ 537663767U, // FCVTZUv2i64_shift
+ 2685671703U, // FCVTZUv4f32
+ 1075058967U, // FCVTZUv4i32_shift
+ 17049898U, // FDIVDrr
+ 17049898U, // FDIVSrr
+ 2684885290U, // FDIVv2f32
+ 537663786U, // FDIVv2f64
+ 1075058986U, // FDIVv4f32
+ 17048394U, // FMADDDrrr
+ 17048394U, // FMADDSrrr
+ 17050100U, // FMAXDrr
+ 17049087U, // FMAXNMDrr
+ 2684884729U, // FMAXNMPv2f32
+ 537663225U, // FMAXNMPv2f64
+ 1074013945U, // FMAXNMPv2i32p
+ 1610884857U, // FMAXNMPv2i64p
+ 1075058425U, // FMAXNMPv4f32
+ 17049087U, // FMAXNMSrr
+ 2684627285U, // FMAXNMVv4i32v
+ 2684884479U, // FMAXNMv2f32
+ 537662975U, // FMAXNMv2f64
+ 1075058175U, // FMAXNMv4f32
+ 2684884802U, // FMAXPv2f32
+ 537663298U, // FMAXPv2f64
+ 1074014018U, // FMAXPv2i32p
+ 1610884930U, // FMAXPv2i64p
+ 1075058498U, // FMAXPv4f32
+ 17050100U, // FMAXSrr
+ 2684627340U, // FMAXVv4i32v
+ 2684885492U, // FMAXv2f32
+ 537663988U, // FMAXv2f64
+ 1075059188U, // FMAXv4f32
+ 17049126U, // FMINDrr
+ 17049079U, // FMINNMDrr
+ 2684884720U, // FMINNMPv2f32
+ 537663216U, // FMINNMPv2f64
+ 1074013936U, // FMINNMPv2i32p
+ 1610884848U, // FMINNMPv2i64p
+ 1075058416U, // FMINNMPv4f32
+ 17049079U, // FMINNMSrr
+ 2684627276U, // FMINNMVv4i32v
+ 2684884471U, // FMINNMv2f32
+ 537662967U, // FMINNMv2f64
+ 1075058167U, // FMINNMv4f32
+ 2684884744U, // FMINPv2f32
+ 537663240U, // FMINPv2f64
+ 1074013960U, // FMINPv2i32p
+ 1610884872U, // FMINPv2i64p
+ 1075058440U, // FMINPv4f32
+ 17049126U, // FMINSrr
+ 2684627294U, // FMINVv4i32v
+ 2684884518U, // FMINv2f32
+ 537663014U, // FMINv2f64
+ 1075058214U, // FMINv4f32
+ 67404282U, // FMLAv1i32_indexed
+ 67404282U, // FMLAv1i64_indexed
+ 2718446074U, // FMLAv2f32
+ 571224570U, // FMLAv2f64
+ 2718446074U, // FMLAv2i32_indexed
+ 571224570U, // FMLAv2i64_indexed
+ 1108619770U, // FMLAv4f32
+ 1108619770U, // FMLAv4i32_indexed
+ 67405921U, // FMLSv1i32_indexed
+ 67405921U, // FMLSv1i64_indexed
+ 2718447713U, // FMLSv2f32
+ 571226209U, // FMLSv2f64
+ 2718447713U, // FMLSv2i32_indexed
+ 571226209U, // FMLSv2i64_indexed
+ 1108621409U, // FMLSv4f32
+ 1108621409U, // FMLSv4i32_indexed
+ 1074014586U, // FMOVDXHighr
+ 553920890U, // FMOVDXr
+ 117713274U, // FMOVDi
+ 553920890U, // FMOVDr
+ 553920890U, // FMOVSWr
+ 117713274U, // FMOVSi
+ 553920890U, // FMOVSr
+ 553920890U, // FMOVWSr
+ 556276090U, // FMOVXDHighr
+ 553920890U, // FMOVXDr
+ 117971322U, // FMOVv2f32_ns
+ 118233466U, // FMOVv2f64_ns
+ 118757754U, // FMOVv4f32_ns
+ 17048257U, // FMSUBDrrr
+ 17048257U, // FMSUBSrrr
+ 17049035U, // FMULDrr
+ 17049035U, // FMULSrr
+ 17050139U, // FMULX32
+ 17050139U, // FMULX64
+ 17050139U, // FMULXv1i32_indexed
+ 17050139U, // FMULXv1i64_indexed
+ 2684885531U, // FMULXv2f32
+ 537664027U, // FMULXv2f64
+ 2684885531U, // FMULXv2i32_indexed
+ 537664027U, // FMULXv2i64_indexed
+ 1075059227U, // FMULXv4f32
+ 1075059227U, // FMULXv4i32_indexed
+ 17049035U, // FMULv1i32_indexed
+ 17049035U, // FMULv1i64_indexed
+ 2684884427U, // FMULv2f32
+ 537662923U, // FMULv2f64
+ 2684884427U, // FMULv2i32_indexed
+ 537662923U, // FMULv2i64_indexed
+ 1075058123U, // FMULv4f32
+ 1075058123U, // FMULv4i32_indexed
+ 553919443U, // FNEGDr
+ 553919443U, // FNEGSr
+ 1074271187U, // FNEGv2f32
+ 1611404243U, // FNEGv2f64
+ 2685670355U, // FNEGv4f32
+ 17048401U, // FNMADDDrrr
+ 17048401U, // FNMADDSrrr
+ 17048264U, // FNMSUBDrrr
+ 17048264U, // FNMSUBSrrr
+ 17049041U, // FNMULDrr
+ 17049041U, // FNMULSrr
+ 553919369U, // FRECPEv1i32
+ 553919369U, // FRECPEv1i64
+ 1074271113U, // FRECPEv2f32
+ 1611404169U, // FRECPEv2f64
+ 2685670281U, // FRECPEv4f32
+ 17049724U, // FRECPS32
+ 17049724U, // FRECPS64
+ 2684885116U, // FRECPSv2f32
+ 537663612U, // FRECPSv2f64
+ 1075058812U, // FRECPSv4f32
+ 553921058U, // FRECPXv1i32
+ 553921058U, // FRECPXv1i64
+ 553919002U, // FRINTADr
+ 553919002U, // FRINTASr
+ 1074270746U, // FRINTAv2f32
+ 1611403802U, // FRINTAv2f64
+ 2685669914U, // FRINTAv4f32
+ 553919658U, // FRINTIDr
+ 553919658U, // FRINTISr
+ 1074271402U, // FRINTIv2f32
+ 1611404458U, // FRINTIv2f64
+ 2685670570U, // FRINTIv4f32
+ 553920007U, // FRINTMDr
+ 553920007U, // FRINTMSr
+ 1074271751U, // FRINTMv2f32
+ 1611404807U, // FRINTMv2f64
+ 2685670919U, // FRINTMv4f32
+ 553920106U, // FRINTNDr
+ 553920106U, // FRINTNSr
+ 1074271850U, // FRINTNv2f32
+ 1611404906U, // FRINTNv2f64
+ 2685671018U, // FRINTNv4f32
+ 553920297U, // FRINTPDr
+ 553920297U, // FRINTPSr
+ 1074272041U, // FRINTPv2f32
+ 1611405097U, // FRINTPv2f64
+ 2685671209U, // FRINTPv4f32
+ 553921066U, // FRINTXDr
+ 553921066U, // FRINTXSr
+ 1074272810U, // FRINTXv2f32
+ 1611405866U, // FRINTXv2f64
+ 2685671978U, // FRINTXv4f32
+ 553921101U, // FRINTZDr
+ 553921101U, // FRINTZSr
+ 1074272845U, // FRINTZv2f32
+ 1611405901U, // FRINTZv2f64
+ 2685672013U, // FRINTZv4f32
+ 553919406U, // FRSQRTEv1i32
+ 553919406U, // FRSQRTEv1i64
+ 1074271150U, // FRSQRTEv2f32
+ 1611404206U, // FRSQRTEv2f64
+ 2685670318U, // FRSQRTEv4f32
+ 17049745U, // FRSQRTS32
+ 17049745U, // FRSQRTS64
+ 2684885137U, // FRSQRTSv2f32
+ 537663633U, // FRSQRTSv2f64
+ 1075058833U, // FRSQRTSv4f32
+ 553920726U, // FSQRTDr
+ 553920726U, // FSQRTSr
+ 1074272470U, // FSQRTv2f32
+ 1611405526U, // FSQRTv2f64
+ 2685671638U, // FSQRTv4f32
+ 17048237U, // FSUBDrr
+ 17048237U, // FSUBSrr
+ 2684883629U, // FSUBv2f32
+ 537662125U, // FSUBv2f64
+ 1075057325U, // FSUBv4f32
+ 23145U, // HINT
+ 22720U, // HLT
+ 21258U, // HVC
+ 137115759U, // INSvi16gpr
+ 153892975U, // INSvi16lane
+ 137377903U, // INSvi32gpr
+ 691026031U, // INSvi32lane
+ 136853615U, // INSvi64gpr
+ 1227372655U, // INSvi64lane
+ 137640047U, // INSvi8gpr
+ 1765029999U, // INSvi8lane
+ 29329U, // ISB
+ 36885U, // LD1Fourv16b
+ 3710997U, // LD1Fourv16b_POST
+ 45077U, // LD1Fourv1d
+ 3981333U, // LD1Fourv1d_POST
+ 53269U, // LD1Fourv2d
+ 3727381U, // LD1Fourv2d_POST
+ 61461U, // LD1Fourv2s
+ 3997717U, // LD1Fourv2s_POST
+ 69653U, // LD1Fourv4h
+ 4005909U, // LD1Fourv4h_POST
+ 77845U, // LD1Fourv4s
+ 3751957U, // LD1Fourv4s_POST
+ 86037U, // LD1Fourv8b
+ 4022293U, // LD1Fourv8b_POST
+ 94229U, // LD1Fourv8h
+ 3768341U, // LD1Fourv8h_POST
+ 36885U, // LD1Onev16b
+ 4235285U, // LD1Onev16b_POST
+ 45077U, // LD1Onev1d
+ 4505621U, // LD1Onev1d_POST
+ 53269U, // LD1Onev2d
+ 4251669U, // LD1Onev2d_POST
+ 61461U, // LD1Onev2s
+ 4522005U, // LD1Onev2s_POST
+ 69653U, // LD1Onev4h
+ 4530197U, // LD1Onev4h_POST
+ 77845U, // LD1Onev4s
+ 4276245U, // LD1Onev4s_POST
+ 86037U, // LD1Onev8b
+ 4546581U, // LD1Onev8b_POST
+ 94229U, // LD1Onev8h
+ 4292629U, // LD1Onev8h_POST
+ 38769U, // LD1Rv16b
+ 4761457U, // LD1Rv16b_POST
+ 46961U, // LD1Rv1d
+ 4507505U, // LD1Rv1d_POST
+ 55153U, // LD1Rv2d
+ 4515697U, // LD1Rv2d_POST
+ 63345U, // LD1Rv2s
+ 5048177U, // LD1Rv2s_POST
+ 71537U, // LD1Rv4h
+ 5318513U, // LD1Rv4h_POST
+ 79729U, // LD1Rv4s
+ 5064561U, // LD1Rv4s_POST
+ 87921U, // LD1Rv8b
+ 4810609U, // LD1Rv8b_POST
+ 96113U, // LD1Rv8h
+ 5343089U, // LD1Rv8h_POST
+ 36885U, // LD1Threev16b
+ 5546005U, // LD1Threev16b_POST
+ 45077U, // LD1Threev1d
+ 5816341U, // LD1Threev1d_POST
+ 53269U, // LD1Threev2d
+ 5562389U, // LD1Threev2d_POST
+ 61461U, // LD1Threev2s
+ 5832725U, // LD1Threev2s_POST
+ 69653U, // LD1Threev4h
+ 5840917U, // LD1Threev4h_POST
+ 77845U, // LD1Threev4s
+ 5586965U, // LD1Threev4s_POST
+ 86037U, // LD1Threev8b
+ 5857301U, // LD1Threev8b_POST
+ 94229U, // LD1Threev8h
+ 5603349U, // LD1Threev8h_POST
+ 36885U, // LD1Twov16b
+ 3973141U, // LD1Twov16b_POST
+ 45077U, // LD1Twov1d
+ 4243477U, // LD1Twov1d_POST
+ 53269U, // LD1Twov2d
+ 3989525U, // LD1Twov2d_POST
+ 61461U, // LD1Twov2s
+ 4259861U, // LD1Twov2s_POST
+ 69653U, // LD1Twov4h
+ 4268053U, // LD1Twov4h_POST
+ 77845U, // LD1Twov4s
+ 4014101U, // LD1Twov4s_POST
+ 86037U, // LD1Twov8b
+ 4284437U, // LD1Twov8b_POST
+ 94229U, // LD1Twov8h
+ 4030485U, // LD1Twov8h_POST
+ 6131733U, // LD1i16
+ 6397973U, // LD1i16_POST
+ 6139925U, // LD1i32
+ 6668309U, // LD1i32_POST
+ 6148117U, // LD1i64
+ 6938645U, // LD1i64_POST
+ 6156309U, // LD1i8
+ 7208981U, // LD1i8_POST
+ 38775U, // LD2Rv16b
+ 5285751U, // LD2Rv16b_POST
+ 46967U, // LD2Rv1d
+ 4245367U, // LD2Rv1d_POST
+ 55159U, // LD2Rv2d
+ 4253559U, // LD2Rv2d_POST
+ 63351U, // LD2Rv2s
+ 4523895U, // LD2Rv2s_POST
+ 71543U, // LD2Rv4h
+ 5056375U, // LD2Rv4h_POST
+ 79735U, // LD2Rv4s
+ 4540279U, // LD2Rv4s_POST
+ 87927U, // LD2Rv8b
+ 5334903U, // LD2Rv8b_POST
+ 96119U, // LD2Rv8h
+ 5080951U, // LD2Rv8h_POST
+ 36947U, // LD2Twov16b
+ 3973203U, // LD2Twov16b_POST
+ 53331U, // LD2Twov2d
+ 3989587U, // LD2Twov2d_POST
+ 61523U, // LD2Twov2s
+ 4259923U, // LD2Twov2s_POST
+ 69715U, // LD2Twov4h
+ 4268115U, // LD2Twov4h_POST
+ 77907U, // LD2Twov4s
+ 4014163U, // LD2Twov4s_POST
+ 86099U, // LD2Twov8b
+ 4284499U, // LD2Twov8b_POST
+ 94291U, // LD2Twov8h
+ 4030547U, // LD2Twov8h_POST
+ 6131795U, // LD2i16
+ 6660179U, // LD2i16_POST
+ 6139987U, // LD2i32
+ 6930515U, // LD2i32_POST
+ 6148179U, // LD2i64
+ 7462995U, // LD2i64_POST
+ 6156371U, // LD2i8
+ 6422611U, // LD2i8_POST
+ 38781U, // LD3Rv16b
+ 7645053U, // LD3Rv16b_POST
+ 46973U, // LD3Rv1d
+ 5818237U, // LD3Rv1d_POST
+ 55165U, // LD3Rv2d
+ 5826429U, // LD3Rv2d_POST
+ 63357U, // LD3Rv2s
+ 7931773U, // LD3Rv2s_POST
+ 71549U, // LD3Rv4h
+ 8202109U, // LD3Rv4h_POST
+ 79741U, // LD3Rv4s
+ 7948157U, // LD3Rv4s_POST
+ 87933U, // LD3Rv8b
+ 7694205U, // LD3Rv8b_POST
+ 96125U, // LD3Rv8h
+ 8226685U, // LD3Rv8h_POST
+ 37317U, // LD3Threev16b
+ 5546437U, // LD3Threev16b_POST
+ 53701U, // LD3Threev2d
+ 5562821U, // LD3Threev2d_POST
+ 61893U, // LD3Threev2s
+ 5833157U, // LD3Threev2s_POST
+ 70085U, // LD3Threev4h
+ 5841349U, // LD3Threev4h_POST
+ 78277U, // LD3Threev4s
+ 5587397U, // LD3Threev4s_POST
+ 86469U, // LD3Threev8b
+ 5857733U, // LD3Threev8b_POST
+ 94661U, // LD3Threev8h
+ 5603781U, // LD3Threev8h_POST
+ 6132165U, // LD3i16
+ 8495557U, // LD3i16_POST
+ 6140357U, // LD3i32
+ 8765893U, // LD3i32_POST
+ 6148549U, // LD3i64
+ 9036229U, // LD3i64_POST
+ 6156741U, // LD3i8
+ 9306565U, // LD3i8_POST
+ 37341U, // LD4Fourv16b
+ 3711453U, // LD4Fourv16b_POST
+ 53725U, // LD4Fourv2d
+ 3727837U, // LD4Fourv2d_POST
+ 61917U, // LD4Fourv2s
+ 3998173U, // LD4Fourv2s_POST
+ 70109U, // LD4Fourv4h
+ 4006365U, // LD4Fourv4h_POST
+ 78301U, // LD4Fourv4s
+ 3752413U, // LD4Fourv4s_POST
+ 86493U, // LD4Fourv8b
+ 4022749U, // LD4Fourv8b_POST
+ 94685U, // LD4Fourv8h
+ 3768797U, // LD4Fourv8h_POST
+ 38787U, // LD4Rv16b
+ 5023619U, // LD4Rv16b_POST
+ 46979U, // LD4Rv1d
+ 3983235U, // LD4Rv1d_POST
+ 55171U, // LD4Rv2d
+ 3991427U, // LD4Rv2d_POST
+ 63363U, // LD4Rv2s
+ 4261763U, // LD4Rv2s_POST
+ 71555U, // LD4Rv4h
+ 4532099U, // LD4Rv4h_POST
+ 79747U, // LD4Rv4s
+ 4278147U, // LD4Rv4s_POST
+ 87939U, // LD4Rv8b
+ 5072771U, // LD4Rv8b_POST
+ 96131U, // LD4Rv8h
+ 4556675U, // LD4Rv8h_POST
+ 6132189U, // LD4i16
+ 6922717U, // LD4i16_POST
+ 6140381U, // LD4i32
+ 7455197U, // LD4i32_POST
+ 6148573U, // LD4i64
+ 9560541U, // LD4i64_POST
+ 6156765U, // LD4i8
+ 6685149U, // LD4i8_POST
+ 26485304U, // LDARB
+ 26485801U, // LDARH
+ 26486665U, // LDARW
+ 26486665U, // LDARX
+ 553920315U, // LDAXPW
+ 553920315U, // LDAXPX
+ 26485358U, // LDAXRB
+ 26485855U, // LDAXRH
+ 26486787U, // LDAXRW
+ 26486787U, // LDAXRX
+ 553920258U, // LDNPDi
+ 553920258U, // LDNPQi
+ 553920258U, // LDNPSi
+ 553920258U, // LDNPWi
+ 553920258U, // LDNPXi
+ 553920190U, // LDPDi
+ 604276414U, // LDPDpost
+ 604276414U, // LDPDpre
+ 553920190U, // LDPQi
+ 604276414U, // LDPQpost
+ 604276414U, // LDPQpre
+ 553920974U, // LDPSWi
+ 604277198U, // LDPSWpost
+ 604277198U, // LDPSWpre
+ 553920190U, // LDPSi
+ 604276414U, // LDPSpost
+ 604276414U, // LDPSpre
+ 553920190U, // LDPWi
+ 604276414U, // LDPWpost
+ 604276414U, // LDPWpre
+ 553920190U, // LDPXi
+ 604276414U, // LDPXpost
+ 604276414U, // LDPXpre
+ 1150583359U, // LDRBBpost
+ 76841535U, // LDRBBpre
+ 26485311U, // LDRBBroW
+ 26485311U, // LDRBBroX
+ 26485311U, // LDRBBui
+ 1150584728U, // LDRBpost
+ 76842904U, // LDRBpre
+ 26486680U, // LDRBroW
+ 26486680U, // LDRBroX
+ 26486680U, // LDRBui
+ 100935576U, // LDRDl
+ 1150584728U, // LDRDpost
+ 76842904U, // LDRDpre
+ 26486680U, // LDRDroW
+ 26486680U, // LDRDroX
+ 26486680U, // LDRDui
+ 1150583856U, // LDRHHpost
+ 76842032U, // LDRHHpre
+ 26485808U, // LDRHHroW
+ 26485808U, // LDRHHroX
+ 26485808U, // LDRHHui
+ 1150584728U, // LDRHpost
+ 76842904U, // LDRHpre
+ 26486680U, // LDRHroW
+ 26486680U, // LDRHroX
+ 26486680U, // LDRHui
+ 100935576U, // LDRQl
+ 1150584728U, // LDRQpost
+ 76842904U, // LDRQpre
+ 26486680U, // LDRQroW
+ 26486680U, // LDRQroX
+ 26486680U, // LDRQui
+ 1150583446U, // LDRSBWpost
+ 76841622U, // LDRSBWpre
+ 26485398U, // LDRSBWroW
+ 26485398U, // LDRSBWroX
+ 26485398U, // LDRSBWui
+ 1150583446U, // LDRSBXpost
+ 76841622U, // LDRSBXpre
+ 26485398U, // LDRSBXroW
+ 26485398U, // LDRSBXroX
+ 26485398U, // LDRSBXui
+ 1150583933U, // LDRSHWpost
+ 76842109U, // LDRSHWpre
+ 26485885U, // LDRSHWroW
+ 26485885U, // LDRSHWroX
+ 26485885U, // LDRSHWui
+ 1150583933U, // LDRSHXpost
+ 76842109U, // LDRSHXpre
+ 26485885U, // LDRSHXroW
+ 26485885U, // LDRSHXroX
+ 26485885U, // LDRSHXui
+ 100936149U, // LDRSWl
+ 1150585301U, // LDRSWpost
+ 76843477U, // LDRSWpre
+ 26487253U, // LDRSWroW
+ 26487253U, // LDRSWroX
+ 26487253U, // LDRSWui
+ 100935576U, // LDRSl
+ 1150584728U, // LDRSpost
+ 76842904U, // LDRSpre
+ 26486680U, // LDRSroW
+ 26486680U, // LDRSroX
+ 26486680U, // LDRSui
+ 100935576U, // LDRWl
+ 1150584728U, // LDRWpost
+ 76842904U, // LDRWpre
+ 26486680U, // LDRWroW
+ 26486680U, // LDRWroX
+ 26486680U, // LDRWui
+ 100935576U, // LDRXl
+ 1150584728U, // LDRXpost
+ 76842904U, // LDRXpre
+ 26486680U, // LDRXroW
+ 26486680U, // LDRXroX
+ 26486680U, // LDRXui
+ 26485324U, // LDTRBi
+ 26485821U, // LDTRHi
+ 26485405U, // LDTRSBWi
+ 26485405U, // LDTRSBXi
+ 26485892U, // LDTRSHWi
+ 26485892U, // LDTRSHXi
+ 26487260U, // LDTRSWi
+ 26486752U, // LDTRWi
+ 26486752U, // LDTRXi
+ 26485344U, // LDURBBi
+ 26486775U, // LDURBi
+ 26486775U, // LDURDi
+ 26485841U, // LDURHHi
+ 26486775U, // LDURHi
+ 26486775U, // LDURQi
+ 26485413U, // LDURSBWi
+ 26485413U, // LDURSBXi
+ 26485900U, // LDURSHWi
+ 26485900U, // LDURSHXi
+ 26487268U, // LDURSWi
+ 26486775U, // LDURSi
+ 26486775U, // LDURWi
+ 26486775U, // LDURXi
+ 553920343U, // LDXPW
+ 553920343U, // LDXPX
+ 26485366U, // LDXRB
+ 26485863U, // LDXRH
+ 26486794U, // LDXRW
+ 26486794U, // LDXRX
+ 0U, // LOADgot
+ 17049003U, // LSLVWr
+ 17049003U, // LSLVXr
+ 17049558U, // LSRVWr
+ 17049558U, // LSRVXr
+ 17048395U, // MADDWrrr
+ 17048395U, // MADDXrrr
+ 2181050875U, // MLAv16i8
+ 2718446075U, // MLAv2i32
+ 2718446075U, // MLAv2i32_indexed
+ 3255841275U, // MLAv4i16
+ 3255841275U, // MLAv4i16_indexed
+ 1108619771U, // MLAv4i32
+ 1108619771U, // MLAv4i32_indexed
+ 1645752827U, // MLAv8i16
+ 1645752827U, // MLAv8i16_indexed
+ 3793498619U, // MLAv8i8
+ 2181052514U, // MLSv16i8
+ 2718447714U, // MLSv2i32
+ 2718447714U, // MLSv2i32_indexed
+ 3255842914U, // MLSv4i16
+ 3255842914U, // MLSv4i16_indexed
+ 1108621410U, // MLSv4i32
+ 1108621410U, // MLSv4i32_indexed
+ 1645754466U, // MLSv8i16
+ 1645754466U, // MLSv8i16_indexed
+ 3793500258U, // MLSv8i8
+ 168043698U, // MOVID
+ 721425586U, // MOVIv16b_ns
+ 168563890U, // MOVIv2d_ns
+ 1795691698U, // MOVIv2i32
+ 1795691698U, // MOVIv2s_msl
+ 1796215986U, // MOVIv4i16
+ 1796478130U, // MOVIv4i32
+ 1796478130U, // MOVIv4s_msl
+ 723260594U, // MOVIv8b_ns
+ 1796740274U, // MOVIv8i16
+ 84157629U, // MOVKWi
+ 84157629U, // MOVKXi
+ 1795434146U, // MOVNWi
+ 1795434146U, // MOVNXi
+ 1795435093U, // MOVZWi
+ 1795435093U, // MOVZXi
+ 0U, // MOVaddr
+ 0U, // MOVaddrBA
+ 0U, // MOVaddrCP
+ 0U, // MOVaddrEXT
+ 0U, // MOVaddrJT
+ 0U, // MOVaddrTLS
+ 0U, // MOVi32imm
+ 0U, // MOVi64imm
+ 201599116U, // MRS
+ 137179U, // MSR
+ 141275U, // MSRpstate
+ 17048258U, // MSUBWrrr
+ 17048258U, // MSUBXrrr
+ 2147489228U, // MULv16i8
+ 2684884428U, // MULv2i32
+ 2684884428U, // MULv2i32_indexed
+ 3222279628U, // MULv4i16
+ 3222279628U, // MULv4i16_indexed
+ 1075058124U, // MULv4i32
+ 1075058124U, // MULv4i32_indexed
+ 1612191180U, // MULv8i16
+ 1612191180U, // MULv8i16_indexed
+ 3759936972U, // MULv8i8
+ 1795691679U, // MVNIv2i32
+ 1795691679U, // MVNIv2s_msl
+ 1796215967U, // MVNIv4i16
+ 1796478111U, // MVNIv4i32
+ 1796478111U, // MVNIv4s_msl
+ 1796740255U, // MVNIv8i16
+ 5076U, // NEGv16i8
+ 553919444U, // NEGv1i64
+ 1074271188U, // NEGv2i32
+ 1611404244U, // NEGv2i64
+ 2148537300U, // NEGv4i16
+ 2685670356U, // NEGv4i32
+ 3222803412U, // NEGv8i16
+ 3759936468U, // NEGv8i8
+ 6353U, // NOTv16i8
+ 3759937745U, // NOTv8i8
+ 0U, // ORNWrr
+ 17049189U, // ORNWrs
+ 0U, // ORNXrr
+ 17049189U, // ORNXrs
+ 2147489381U, // ORNv16i8
+ 3759937125U, // ORNv8i8
+ 17049548U, // ORRWri
+ 0U, // ORRWrr
+ 17049548U, // ORRWrs
+ 17049548U, // ORRXri
+ 0U, // ORRXrr
+ 17049548U, // ORRXrs
+ 2147489740U, // ORRv16i8
+ 84424652U, // ORRv2i32
+ 84948940U, // ORRv4i16
+ 85211084U, // ORRv4i32
+ 85473228U, // ORRv8i16
+ 3759937484U, // ORRv8i8
+ 2149060822U, // PMULLv16i8
+ 228070797U, // PMULLv1i64
+ 244846806U, // PMULLv2i64
+ 3759674765U, // PMULLv8i8
+ 2147489240U, // PMULv16i8
+ 3759936984U, // PMULv8i8
+ 101070321U, // PRFMl
+ 26621425U, // PRFMroW
+ 26621425U, // PRFMroX
+ 26621425U, // PRFMui
+ 26621455U, // PRFUMi
+ 537400862U, // RADDHNv2i64_v2i32
+ 571748633U, // RADDHNv2i64_v4i32
+ 1074796062U, // RADDHNv4i32_v4i16
+ 1108881689U, // RADDHNv4i32_v8i16
+ 1644179737U, // RADDHNv8i16_v16i8
+ 1612453406U, // RADDHNv8i16_v8i8
+ 553920698U, // RBITWr
+ 553920698U, // RBITXr
+ 6330U, // RBITv16i8
+ 3759937722U, // RBITv8i8
+ 2107559U, // RET
+ 0U, // RET_ReallyLR
+ 553918951U, // REV16Wr
+ 553918951U, // REV16Xr
+ 4583U, // REV16v16i8
+ 3759935975U, // REV16v8i8
+ 553918540U, // REV32Xr
+ 4172U, // REV32v16i8
+ 2148536396U, // REV32v4i16
+ 3222802508U, // REV32v8i16
+ 3759935564U, // REV32v8i8
+ 4566U, // REV64v16i8
+ 1074270678U, // REV64v2i32
+ 2148536790U, // REV64v4i16
+ 2685669846U, // REV64v4i32
+ 3222802902U, // REV64v8i16
+ 3759935958U, // REV64v8i8
+ 553920805U, // REVWr
+ 553920805U, // REVXr
+ 17049543U, // RORVWr
+ 17049543U, // RORVXr
+ 1644179766U, // RSHRNv16i8_shift
+ 537400917U, // RSHRNv2i32_shift
+ 1074796117U, // RSHRNv4i16_shift
+ 571748662U, // RSHRNv4i32_shift
+ 1108881718U, // RSHRNv8i16_shift
+ 1612453461U, // RSHRNv8i8_shift
+ 537400854U, // RSUBHNv2i64_v2i32
+ 571748624U, // RSUBHNv2i64_v4i32
+ 1074796054U, // RSUBHNv4i32_v4i16
+ 1108881680U, // RSUBHNv4i32_v8i16
+ 1644179728U, // RSUBHNv8i16_v16i8
+ 1612453398U, // RSUBHNv8i16_v8i8
+ 2182623330U, // SABALv16i8_v8i16
+ 2718708931U, // SABALv2i32_v2i64
+ 3256104131U, // SABALv4i16_v4i32
+ 1108095074U, // SABALv4i32_v2i64
+ 1645490274U, // SABALv8i16_v4i32
+ 3793237187U, // SABALv8i8_v8i16
+ 2181050862U, // SABAv16i8
+ 2718446062U, // SABAv2i32
+ 3255841262U, // SABAv4i16
+ 1108619758U, // SABAv4i32
+ 1645752814U, // SABAv8i16
+ 3793498606U, // SABAv8i8
+ 2149060764U, // SABDLv16i8_v8i16
+ 2685146379U, // SABDLv2i32_v2i64
+ 3222541579U, // SABDLv4i16_v4i32
+ 1074532508U, // SABDLv4i32_v2i64
+ 1611927708U, // SABDLv8i16_v4i32
+ 3759674635U, // SABDLv8i8_v8i16
+ 2147488538U, // SABDv16i8
+ 2684883738U, // SABDv2i32
+ 3222278938U, // SABDv4i16
+ 1075057434U, // SABDv4i32
+ 1612190490U, // SABDv8i16
+ 3759936282U, // SABDv8i8
+ 35141315U, // SADALPv16i8_v8i16
+ 1117533891U, // SADALPv2i32_v1i64
+ 2181576387U, // SADALPv4i16_v2i32
+ 2718709443U, // SADALPv4i32_v2i64
+ 3256104643U, // SADALPv8i16_v4i32
+ 3792713411U, // SADALPv8i8_v4i16
+ 1578707U, // SADDLPv16i8_v8i16
+ 1083971283U, // SADDLPv2i32_v1i64
+ 2148013779U, // SADDLPv4i16_v2i32
+ 2685146835U, // SADDLPv4i32_v2i64
+ 3222542035U, // SADDLPv8i16_v4i32
+ 3759150803U, // SADDLPv8i8_v4i16
+ 272700U, // SADDLVv16i8v
+ 2147756348U, // SADDLVv4i16v
+ 2684627260U, // SADDLVv4i32v
+ 3221498172U, // SADDLVv8i16v
+ 3758369084U, // SADDLVv8i8v
+ 2149060780U, // SADDLv16i8_v8i16
+ 2685146409U, // SADDLv2i32_v2i64
+ 3222541609U, // SADDLv4i16_v4i32
+ 1074532524U, // SADDLv4i32_v2i64
+ 1611927724U, // SADDLv8i16_v4i32
+ 3759674665U, // SADDLv8i8_v8i16
+ 1612190133U, // SADDWv16i8_v8i16
+ 537663936U, // SADDWv2i32_v2i64
+ 1075059136U, // SADDWv4i16_v4i32
+ 537661877U, // SADDWv4i32_v2i64
+ 1075057077U, // SADDWv8i16_v4i32
+ 1612192192U, // SADDWv8i8_v8i16
+ 17049656U, // SBCSWr
+ 17049656U, // SBCSXr
+ 17048293U, // SBCWr
+ 17048293U, // SBCXr
+ 17049061U, // SBFMWri
+ 17049061U, // SBFMXri
+ 17048517U, // SCVTFSWDri
+ 17048517U, // SCVTFSWSri
+ 17048517U, // SCVTFSXDri
+ 17048517U, // SCVTFSXSri
+ 553919429U, // SCVTFUWDri
+ 553919429U, // SCVTFUWSri
+ 553919429U, // SCVTFUXDri
+ 553919429U, // SCVTFUXSri
+ 17048517U, // SCVTFd
+ 17048517U, // SCVTFs
+ 553919429U, // SCVTFv1i32
+ 553919429U, // SCVTFv1i64
+ 1074271173U, // SCVTFv2f32
+ 1611404229U, // SCVTFv2f64
+ 2684883909U, // SCVTFv2i32_shift
+ 537662405U, // SCVTFv2i64_shift
+ 2685670341U, // SCVTFv4f32
+ 1075057605U, // SCVTFv4i32_shift
+ 17049904U, // SDIVWr
+ 17049904U, // SDIVXr
+ 17049904U, // SDIV_IntWr
+ 17049904U, // SDIV_IntXr
+ 67404510U, // SHA1Crrr
+ 553919463U, // SHA1Hrr
+ 67405278U, // SHA1Mrrr
+ 67405488U, // SHA1Prrr
+ 1108619265U, // SHA1SU0rrr
+ 2719232056U, // SHA1SU1rr
+ 67403864U, // SHA256H2rrr
+ 67404790U, // SHA256Hrrr
+ 2719232010U, // SHA256SU0rr
+ 1108619329U, // SHA256SU1rrr
+ 2147488572U, // SHADDv16i8
+ 2684883772U, // SHADDv2i32
+ 3222278972U, // SHADDv4i16
+ 1075057468U, // SHADDv4i32
+ 1612190524U, // SHADDv8i16
+ 3759936316U, // SHADDv8i8
+ 2149060797U, // SHLLv16i8
+ 2685146487U, // SHLLv2i32
+ 3222541687U, // SHLLv4i16
+ 3758887101U, // SHLLv4i32
+ 1315005U, // SHLLv8i16
+ 538449271U, // SHLLv8i8
+ 17048896U, // SHLd
+ 2147489088U, // SHLv16i8_shift
+ 2684884288U, // SHLv2i32_shift
+ 537662784U, // SHLv2i64_shift
+ 3222279488U, // SHLv4i16_shift
+ 1075057984U, // SHLv4i32_shift
+ 1612191040U, // SHLv8i16_shift
+ 3759936832U, // SHLv8i8_shift
+ 1644179748U, // SHRNv16i8_shift
+ 537400901U, // SHRNv2i32_shift
+ 1074796101U, // SHRNv4i16_shift
+ 571748644U, // SHRNv4i32_shift
+ 1108881700U, // SHRNv8i16_shift
+ 1612453445U, // SHRNv8i8_shift
+ 2147488435U, // SHSUBv16i8
+ 2684883635U, // SHSUBv2i32
+ 3222278835U, // SHSUBv4i16
+ 1075057331U, // SHSUBv4i32
+ 1612190387U, // SHSUBv8i16
+ 3759936179U, // SHSUBv8i8
+ 67404954U, // SLId
+ 2181051546U, // SLIv16i8_shift
+ 2718446746U, // SLIv2i32_shift
+ 571225242U, // SLIv2i64_shift
+ 3255841946U, // SLIv4i16_shift
+ 1108620442U, // SLIv4i32_shift
+ 1645753498U, // SLIv8i16_shift
+ 3793499290U, // SLIv8i8_shift
+ 17048857U, // SMADDLrrr
+ 2147489609U, // SMAXPv16i8
+ 2684884809U, // SMAXPv2i32
+ 3222280009U, // SMAXPv4i16
+ 1075058505U, // SMAXPv4i32
+ 1612191561U, // SMAXPv8i16
+ 3759937353U, // SMAXPv8i8
+ 272787U, // SMAXVv16i8v
+ 2147756435U, // SMAXVv4i16v
+ 2684627347U, // SMAXVv4i32v
+ 3221498259U, // SMAXVv8i16v
+ 3758369171U, // SMAXVv8i8v
+ 2147490298U, // SMAXv16i8
+ 2684885498U, // SMAXv2i32
+ 3222280698U, // SMAXv4i16
+ 1075059194U, // SMAXv4i32
+ 1612192250U, // SMAXv8i16
+ 3759938042U, // SMAXv8i8
+ 21246U, // SMC
+ 2147489551U, // SMINPv16i8
+ 2684884751U, // SMINPv2i32
+ 3222279951U, // SMINPv4i16
+ 1075058447U, // SMINPv4i32
+ 1612191503U, // SMINPv8i16
+ 3759937295U, // SMINPv8i8
+ 272741U, // SMINVv16i8v
+ 2147756389U, // SMINVv4i16v
+ 2684627301U, // SMINVv4i32v
+ 3221498213U, // SMINVv8i16v
+ 3758369125U, // SMINVv8i8v
+ 2147489324U, // SMINv16i8
+ 2684884524U, // SMINv2i32
+ 3222279724U, // SMINv4i16
+ 1075058220U, // SMINv4i32
+ 1612191276U, // SMINv8i16
+ 3759937068U, // SMINv8i8
+ 2182623356U, // SMLALv16i8_v8i16
+ 2718708954U, // SMLALv2i32_indexed
+ 2718708954U, // SMLALv2i32_v2i64
+ 3256104154U, // SMLALv4i16_indexed
+ 3256104154U, // SMLALv4i16_v4i32
+ 1108095100U, // SMLALv4i32_indexed
+ 1108095100U, // SMLALv4i32_v2i64
+ 1645490300U, // SMLALv8i16_indexed
+ 1645490300U, // SMLALv8i16_v4i32
+ 3793237210U, // SMLALv8i8_v8i16
+ 2182623480U, // SMLSLv16i8_v8i16
+ 2718709168U, // SMLSLv2i32_indexed
+ 2718709168U, // SMLSLv2i32_v2i64
+ 3256104368U, // SMLSLv4i16_indexed
+ 3256104368U, // SMLSLv4i16_v4i32
+ 1108095224U, // SMLSLv4i32_indexed
+ 1108095224U, // SMLSLv4i32_v2i64
+ 1645490424U, // SMLSLv8i16_indexed
+ 1645490424U, // SMLSLv8i16_v4i32
+ 3793237424U, // SMLSLv8i8_v8i16
+ 272768U, // SMOVvi16to32
+ 272768U, // SMOVvi16to64
+ 537143680U, // SMOVvi32to64
+ 1610885504U, // SMOVvi8to32
+ 1610885504U, // SMOVvi8to64
+ 17048813U, // SMSUBLrrr
+ 17048603U, // SMULHrr
+ 2149060830U, // SMULLv16i8_v8i16
+ 2685146516U, // SMULLv2i32_indexed
+ 2685146516U, // SMULLv2i32_v2i64
+ 3222541716U, // SMULLv4i16_indexed
+ 3222541716U, // SMULLv4i16_v4i32
+ 1074532574U, // SMULLv4i32_indexed
+ 1074532574U, // SMULLv4i32_v2i64
+ 1611927774U, // SMULLv8i16_indexed
+ 1611927774U, // SMULLv8i16_v4i32
+ 3759674772U, // SMULLv8i8_v8i16
+ 6187U, // SQABSv16i8
+ 553920555U, // SQABSv1i16
+ 553920555U, // SQABSv1i32
+ 553920555U, // SQABSv1i64
+ 553920555U, // SQABSv1i8
+ 1074272299U, // SQABSv2i32
+ 1611405355U, // SQABSv2i64
+ 2148538411U, // SQABSv4i16
+ 2685671467U, // SQABSv4i32
+ 3222804523U, // SQABSv8i16
+ 3759937579U, // SQABSv8i8
+ 2147488602U, // SQADDv16i8
+ 17048410U, // SQADDv1i16
+ 17048410U, // SQADDv1i32
+ 17048410U, // SQADDv1i64
+ 17048410U, // SQADDv1i8
+ 2684883802U, // SQADDv2i32
+ 537662298U, // SQADDv2i64
+ 3222279002U, // SQADDv4i16
+ 1075057498U, // SQADDv4i32
+ 1612190554U, // SQADDv8i16
+ 3759936346U, // SQADDv8i8
+ 67405009U, // SQDMLALi16
+ 67405009U, // SQDMLALi32
+ 67405009U, // SQDMLALv1i32_indexed
+ 67405009U, // SQDMLALv1i64_indexed
+ 2718708945U, // SQDMLALv2i32_indexed
+ 2718708945U, // SQDMLALv2i32_v2i64
+ 3256104145U, // SQDMLALv4i16_indexed
+ 3256104145U, // SQDMLALv4i16_v4i32
+ 1108095090U, // SQDMLALv4i32_indexed
+ 1108095090U, // SQDMLALv4i32_v2i64
+ 1645490290U, // SQDMLALv8i16_indexed
+ 1645490290U, // SQDMLALv8i16_v4i32
+ 67405223U, // SQDMLSLi16
+ 67405223U, // SQDMLSLi32
+ 67405223U, // SQDMLSLv1i32_indexed
+ 67405223U, // SQDMLSLv1i64_indexed
+ 2718709159U, // SQDMLSLv2i32_indexed
+ 2718709159U, // SQDMLSLv2i32_v2i64
+ 3256104359U, // SQDMLSLv4i16_indexed
+ 3256104359U, // SQDMLSLv4i16_v4i32
+ 1108095214U, // SQDMLSLv4i32_indexed
+ 1108095214U, // SQDMLSLv4i32_v2i64
+ 1645490414U, // SQDMLSLv8i16_indexed
+ 1645490414U, // SQDMLSLv8i16_v4i32
+ 17048584U, // SQDMULHv1i16
+ 17048584U, // SQDMULHv1i16_indexed
+ 17048584U, // SQDMULHv1i32
+ 17048584U, // SQDMULHv1i32_indexed
+ 2684883976U, // SQDMULHv2i32
+ 2684883976U, // SQDMULHv2i32_indexed
+ 3222279176U, // SQDMULHv4i16
+ 3222279176U, // SQDMULHv4i16_indexed
+ 1075057672U, // SQDMULHv4i32
+ 1075057672U, // SQDMULHv4i32_indexed
+ 1612190728U, // SQDMULHv8i16
+ 1612190728U, // SQDMULHv8i16_indexed
+ 17048964U, // SQDMULLi16
+ 17048964U, // SQDMULLi32
+ 17048964U, // SQDMULLv1i32_indexed
+ 17048964U, // SQDMULLv1i64_indexed
+ 2685146500U, // SQDMULLv2i32_indexed
+ 2685146500U, // SQDMULLv2i32_v2i64
+ 3222541700U, // SQDMULLv4i16_indexed
+ 3222541700U, // SQDMULLv4i16_v4i32
+ 1074532556U, // SQDMULLv4i32_indexed
+ 1074532556U, // SQDMULLv4i32_v2i64
+ 1611927756U, // SQDMULLv8i16_indexed
+ 1611927756U, // SQDMULLv8i16_v4i32
+ 5081U, // SQNEGv16i8
+ 553919449U, // SQNEGv1i16
+ 553919449U, // SQNEGv1i32
+ 553919449U, // SQNEGv1i64
+ 553919449U, // SQNEGv1i8
+ 1074271193U, // SQNEGv2i32
+ 1611404249U, // SQNEGv2i64
+ 2148537305U, // SQNEGv4i16
+ 2685670361U, // SQNEGv4i32
+ 3222803417U, // SQNEGv8i16
+ 3759936473U, // SQNEGv8i8
+ 17048593U, // SQRDMULHv1i16
+ 17048593U, // SQRDMULHv1i16_indexed
+ 17048593U, // SQRDMULHv1i32
+ 17048593U, // SQRDMULHv1i32_indexed
+ 2684883985U, // SQRDMULHv2i32
+ 2684883985U, // SQRDMULHv2i32_indexed
+ 3222279185U, // SQRDMULHv4i16
+ 3222279185U, // SQRDMULHv4i16_indexed
+ 1075057681U, // SQRDMULHv4i32
+ 1075057681U, // SQRDMULHv4i32_indexed
+ 1612190737U, // SQRDMULHv8i16
+ 1612190737U, // SQRDMULHv8i16_indexed
+ 2147489100U, // SQRSHLv16i8
+ 17048908U, // SQRSHLv1i16
+ 17048908U, // SQRSHLv1i32
+ 17048908U, // SQRSHLv1i64
+ 17048908U, // SQRSHLv1i8
+ 2684884300U, // SQRSHLv2i32
+ 537662796U, // SQRSHLv2i64
+ 3222279500U, // SQRSHLv4i16
+ 1075057996U, // SQRSHLv4i32
+ 1612191052U, // SQRSHLv8i16
+ 3759936844U, // SQRSHLv8i8
+ 17049171U, // SQRSHRNb
+ 17049171U, // SQRSHRNh
+ 17049171U, // SQRSHRNs
+ 1644179764U, // SQRSHRNv16i8_shift
+ 537400915U, // SQRSHRNv2i32_shift
+ 1074796115U, // SQRSHRNv4i16_shift
+ 571748660U, // SQRSHRNv4i32_shift
+ 1108881716U, // SQRSHRNv8i16_shift
+ 1612453459U, // SQRSHRNv8i8_shift
+ 17049232U, // SQRSHRUNb
+ 17049232U, // SQRSHRUNh
+ 17049232U, // SQRSHRUNs
+ 1644179824U, // SQRSHRUNv16i8_shift
+ 537400976U, // SQRSHRUNv2i32_shift
+ 1074796176U, // SQRSHRUNv4i16_shift
+ 571748720U, // SQRSHRUNv4i32_shift
+ 1108881776U, // SQRSHRUNv8i16_shift
+ 1612453520U, // SQRSHRUNv8i8_shift
+ 17049847U, // SQSHLUb
+ 17049847U, // SQSHLUd
+ 17049847U, // SQSHLUh
+ 17049847U, // SQSHLUs
+ 2147490039U, // SQSHLUv16i8_shift
+ 2684885239U, // SQSHLUv2i32_shift
+ 537663735U, // SQSHLUv2i64_shift
+ 3222280439U, // SQSHLUv4i16_shift
+ 1075058935U, // SQSHLUv4i32_shift
+ 1612191991U, // SQSHLUv8i16_shift
+ 3759937783U, // SQSHLUv8i8_shift
+ 17048894U, // SQSHLb
+ 17048894U, // SQSHLd
+ 17048894U, // SQSHLh
+ 17048894U, // SQSHLs
+ 2147489086U, // SQSHLv16i8
+ 2147489086U, // SQSHLv16i8_shift
+ 17048894U, // SQSHLv1i16
+ 17048894U, // SQSHLv1i32
+ 17048894U, // SQSHLv1i64
+ 17048894U, // SQSHLv1i8
+ 2684884286U, // SQSHLv2i32
+ 2684884286U, // SQSHLv2i32_shift
+ 537662782U, // SQSHLv2i64
+ 537662782U, // SQSHLv2i64_shift
+ 3222279486U, // SQSHLv4i16
+ 3222279486U, // SQSHLv4i16_shift
+ 1075057982U, // SQSHLv4i32
+ 1075057982U, // SQSHLv4i32_shift
+ 1612191038U, // SQSHLv8i16
+ 1612191038U, // SQSHLv8i16_shift
+ 3759936830U, // SQSHLv8i8
+ 3759936830U, // SQSHLv8i8_shift
+ 17049155U, // SQSHRNb
+ 17049155U, // SQSHRNh
+ 17049155U, // SQSHRNs
+ 1644179746U, // SQSHRNv16i8_shift
+ 537400899U, // SQSHRNv2i32_shift
+ 1074796099U, // SQSHRNv4i16_shift
+ 571748642U, // SQSHRNv4i32_shift
+ 1108881698U, // SQSHRNv8i16_shift
+ 1612453443U, // SQSHRNv8i8_shift
+ 17049223U, // SQSHRUNb
+ 17049223U, // SQSHRUNh
+ 17049223U, // SQSHRUNs
+ 1644179814U, // SQSHRUNv16i8_shift
+ 537400967U, // SQSHRUNv2i32_shift
+ 1074796167U, // SQSHRUNv4i16_shift
+ 571748710U, // SQSHRUNv4i32_shift
+ 1108881766U, // SQSHRUNv8i16_shift
+ 1612453511U, // SQSHRUNv8i8_shift
+ 2147488464U, // SQSUBv16i8
+ 17048272U, // SQSUBv1i16
+ 17048272U, // SQSUBv1i32
+ 17048272U, // SQSUBv1i64
+ 17048272U, // SQSUBv1i8
+ 2684883664U, // SQSUBv2i32
+ 537662160U, // SQSUBv2i64
+ 3222278864U, // SQSUBv4i16
+ 1075057360U, // SQSUBv4i32
+ 1612190416U, // SQSUBv8i16
+ 3759936208U, // SQSUBv8i8
+ 3254792534U, // SQXTNv16i8
+ 553920121U, // SQXTNv1i16
+ 553920121U, // SQXTNv1i32
+ 553920121U, // SQXTNv1i8
+ 1611142777U, // SQXTNv2i32
+ 2685408889U, // SQXTNv4i16
+ 1645490518U, // SQXTNv4i32
+ 2719494486U, // SQXTNv8i16
+ 3223066233U, // SQXTNv8i8
+ 3254792571U, // SQXTUNv16i8
+ 553920154U, // SQXTUNv1i16
+ 553920154U, // SQXTUNv1i32
+ 553920154U, // SQXTUNv1i8
+ 1611142810U, // SQXTUNv2i32
+ 2685408922U, // SQXTUNv4i16
+ 1645490555U, // SQXTUNv4i32
+ 2719494523U, // SQXTUNv8i16
+ 3223066266U, // SQXTUNv8i8
+ 2147488556U, // SRHADDv16i8
+ 2684883756U, // SRHADDv2i32
+ 3222278956U, // SRHADDv4i16
+ 1075057452U, // SRHADDv4i32
+ 1612190508U, // SRHADDv8i16
+ 3759936300U, // SRHADDv8i8
+ 67404965U, // SRId
+ 2181051557U, // SRIv16i8_shift
+ 2718446757U, // SRIv2i32_shift
+ 571225253U, // SRIv2i64_shift
+ 3255841957U, // SRIv4i16_shift
+ 1108620453U, // SRIv4i32_shift
+ 1645753509U, // SRIv8i16_shift
+ 3793499301U, // SRIv8i8_shift
+ 2147489116U, // SRSHLv16i8
+ 17048924U, // SRSHLv1i64
+ 2684884316U, // SRSHLv2i32
+ 537662812U, // SRSHLv2i64
+ 3222279516U, // SRSHLv4i16
+ 1075058012U, // SRSHLv4i32
+ 1612191068U, // SRSHLv8i16
+ 3759936860U, // SRSHLv8i8
+ 17049501U, // SRSHRd
+ 2147489693U, // SRSHRv16i8_shift
+ 2684884893U, // SRSHRv2i32_shift
+ 537663389U, // SRSHRv2i64_shift
+ 3222280093U, // SRSHRv4i16_shift
+ 1075058589U, // SRSHRv4i32_shift
+ 1612191645U, // SRSHRv8i16_shift
+ 3759937437U, // SRSHRv8i8_shift
+ 67404288U, // SRSRAd
+ 2181050880U, // SRSRAv16i8_shift
+ 2718446080U, // SRSRAv2i32_shift
+ 571224576U, // SRSRAv2i64_shift
+ 3255841280U, // SRSRAv4i16_shift
+ 1108619776U, // SRSRAv4i32_shift
+ 1645752832U, // SRSRAv8i16_shift
+ 3793498624U, // SRSRAv8i8_shift
+ 2149060796U, // SSHLLv16i8_shift
+ 2685146486U, // SSHLLv2i32_shift
+ 3222541686U, // SSHLLv4i16_shift
+ 1074532540U, // SSHLLv4i32_shift
+ 1611927740U, // SSHLLv8i16_shift
+ 3759674742U, // SSHLLv8i8_shift
+ 2147489130U, // SSHLv16i8
+ 17048938U, // SSHLv1i64
+ 2684884330U, // SSHLv2i32
+ 537662826U, // SSHLv2i64
+ 3222279530U, // SSHLv4i16
+ 1075058026U, // SSHLv4i32
+ 1612191082U, // SSHLv8i16
+ 3759936874U, // SSHLv8i8
+ 17049515U, // SSHRd
+ 2147489707U, // SSHRv16i8_shift
+ 2684884907U, // SSHRv2i32_shift
+ 537663403U, // SSHRv2i64_shift
+ 3222280107U, // SSHRv4i16_shift
+ 1075058603U, // SSHRv4i32_shift
+ 1612191659U, // SSHRv8i16_shift
+ 3759937451U, // SSHRv8i8_shift
+ 67404302U, // SSRAd
+ 2181050894U, // SSRAv16i8_shift
+ 2718446094U, // SSRAv2i32_shift
+ 571224590U, // SSRAv2i64_shift
+ 3255841294U, // SSRAv4i16_shift
+ 1108619790U, // SSRAv4i32_shift
+ 1645752846U, // SSRAv8i16_shift
+ 3793498638U, // SSRAv8i8_shift
+ 2149060748U, // SSUBLv16i8_v8i16
+ 2685146365U, // SSUBLv2i32_v2i64
+ 3222541565U, // SSUBLv4i16_v4i32
+ 1074532492U, // SSUBLv4i32_v2i64
+ 1611927692U, // SSUBLv8i16_v4i32
+ 3759674621U, // SSUBLv8i8_v8i16
+ 1612190117U, // SSUBWv16i8_v8i16
+ 537663913U, // SSUBWv2i32_v2i64
+ 1075059113U, // SSUBWv4i16_v4i32
+ 537661861U, // SSUBWv4i32_v2i64
+ 1075057061U, // SSUBWv8i16_v4i32
+ 1612192169U, // SSUBWv8i8_v8i16
+ 36915U, // ST1Fourv16b
+ 3711027U, // ST1Fourv16b_POST
+ 45107U, // ST1Fourv1d
+ 3981363U, // ST1Fourv1d_POST
+ 53299U, // ST1Fourv2d
+ 3727411U, // ST1Fourv2d_POST
+ 61491U, // ST1Fourv2s
+ 3997747U, // ST1Fourv2s_POST
+ 69683U, // ST1Fourv4h
+ 4005939U, // ST1Fourv4h_POST
+ 77875U, // ST1Fourv4s
+ 3751987U, // ST1Fourv4s_POST
+ 86067U, // ST1Fourv8b
+ 4022323U, // ST1Fourv8b_POST
+ 94259U, // ST1Fourv8h
+ 3768371U, // ST1Fourv8h_POST
+ 36915U, // ST1Onev16b
+ 4235315U, // ST1Onev16b_POST
+ 45107U, // ST1Onev1d
+ 4505651U, // ST1Onev1d_POST
+ 53299U, // ST1Onev2d
+ 4251699U, // ST1Onev2d_POST
+ 61491U, // ST1Onev2s
+ 4522035U, // ST1Onev2s_POST
+ 69683U, // ST1Onev4h
+ 4530227U, // ST1Onev4h_POST
+ 77875U, // ST1Onev4s
+ 4276275U, // ST1Onev4s_POST
+ 86067U, // ST1Onev8b
+ 4546611U, // ST1Onev8b_POST
+ 94259U, // ST1Onev8h
+ 4292659U, // ST1Onev8h_POST
+ 36915U, // ST1Threev16b
+ 5546035U, // ST1Threev16b_POST
+ 45107U, // ST1Threev1d
+ 5816371U, // ST1Threev1d_POST
+ 53299U, // ST1Threev2d
+ 5562419U, // ST1Threev2d_POST
+ 61491U, // ST1Threev2s
+ 5832755U, // ST1Threev2s_POST
+ 69683U, // ST1Threev4h
+ 5840947U, // ST1Threev4h_POST
+ 77875U, // ST1Threev4s
+ 5586995U, // ST1Threev4s_POST
+ 86067U, // ST1Threev8b
+ 5857331U, // ST1Threev8b_POST
+ 94259U, // ST1Threev8h
+ 5603379U, // ST1Threev8h_POST
+ 36915U, // ST1Twov16b
+ 3973171U, // ST1Twov16b_POST
+ 45107U, // ST1Twov1d
+ 4243507U, // ST1Twov1d_POST
+ 53299U, // ST1Twov2d
+ 3989555U, // ST1Twov2d_POST
+ 61491U, // ST1Twov2s
+ 4259891U, // ST1Twov2s_POST
+ 69683U, // ST1Twov4h
+ 4268083U, // ST1Twov4h_POST
+ 77875U, // ST1Twov4s
+ 4014131U, // ST1Twov4s_POST
+ 86067U, // ST1Twov8b
+ 4284467U, // ST1Twov8b_POST
+ 94259U, // ST1Twov8h
+ 4030515U, // ST1Twov8h_POST
+ 147507U, // ST1i16
+ 262246451U, // ST1i16_POST
+ 151603U, // ST1i32
+ 279031859U, // ST1i32_POST
+ 155699U, // ST1i64
+ 295817267U, // ST1i64_POST
+ 159795U, // ST1i8
+ 312602675U, // ST1i8_POST
+ 37280U, // ST2Twov16b
+ 3973536U, // ST2Twov16b_POST
+ 53664U, // ST2Twov2d
+ 3989920U, // ST2Twov2d_POST
+ 61856U, // ST2Twov2s
+ 4260256U, // ST2Twov2s_POST
+ 70048U, // ST2Twov4h
+ 4268448U, // ST2Twov4h_POST
+ 78240U, // ST2Twov4s
+ 4014496U, // ST2Twov4s_POST
+ 86432U, // ST2Twov8b
+ 4284832U, // ST2Twov8b_POST
+ 94624U, // ST2Twov8h
+ 4030880U, // ST2Twov8h_POST
+ 147872U, // ST2i16
+ 279024032U, // ST2i16_POST
+ 151968U, // ST2i32
+ 295809440U, // ST2i32_POST
+ 156064U, // ST2i64
+ 329372064U, // ST2i64_POST
+ 160160U, // ST2i8
+ 262271392U, // ST2i8_POST
+ 37329U, // ST3Threev16b
+ 5546449U, // ST3Threev16b_POST
+ 53713U, // ST3Threev2d
+ 5562833U, // ST3Threev2d_POST
+ 61905U, // ST3Threev2s
+ 5833169U, // ST3Threev2s_POST
+ 70097U, // ST3Threev4h
+ 5841361U, // ST3Threev4h_POST
+ 78289U, // ST3Threev4s
+ 5587409U, // ST3Threev4s_POST
+ 86481U, // ST3Threev8b
+ 5857745U, // ST3Threev8b_POST
+ 94673U, // ST3Threev8h
+ 5603793U, // ST3Threev8h_POST
+ 147921U, // ST3i16
+ 346132945U, // ST3i16_POST
+ 152017U, // ST3i32
+ 362918353U, // ST3i32_POST
+ 156113U, // ST3i64
+ 379703761U, // ST3i64_POST
+ 160209U, // ST3i8
+ 396489169U, // ST3i8_POST
+ 37346U, // ST4Fourv16b
+ 3711458U, // ST4Fourv16b_POST
+ 53730U, // ST4Fourv2d
+ 3727842U, // ST4Fourv2d_POST
+ 61922U, // ST4Fourv2s
+ 3998178U, // ST4Fourv2s_POST
+ 70114U, // ST4Fourv4h
+ 4006370U, // ST4Fourv4h_POST
+ 78306U, // ST4Fourv4s
+ 3752418U, // ST4Fourv4s_POST
+ 86498U, // ST4Fourv8b
+ 4022754U, // ST4Fourv8b_POST
+ 94690U, // ST4Fourv8h
+ 3768802U, // ST4Fourv8h_POST
+ 147938U, // ST4i16
+ 295801314U, // ST4i16_POST
+ 152034U, // ST4i32
+ 329363938U, // ST4i32_POST
+ 156130U, // ST4i64
+ 413258210U, // ST4i64_POST
+ 160226U, // ST4i8
+ 279048674U, // ST4i8_POST
+ 26485317U, // STLRB
+ 26485814U, // STLRH
+ 26486716U, // STLRW
+ 26486716U, // STLRX
+ 17049437U, // STLXPW
+ 17049437U, // STLXPX
+ 553919101U, // STLXRB
+ 553919598U, // STLXRH
+ 553920528U, // STLXRW
+ 553920528U, // STLXRX
+ 553920285U, // STNPDi
+ 553920285U, // STNPQi
+ 553920285U, // STNPSi
+ 553920285U, // STNPWi
+ 553920285U, // STNPXi
+ 553920305U, // STPDi
+ 604276529U, // STPDpost
+ 604276529U, // STPDpre
+ 553920305U, // STPQi
+ 604276529U, // STPQpost
+ 604276529U, // STPQpre
+ 553920305U, // STPSi
+ 604276529U, // STPSpost
+ 604276529U, // STPSpre
+ 553920305U, // STPWi
+ 604276529U, // STPWpost
+ 604276529U, // STPWpre
+ 553920305U, // STPXi
+ 604276529U, // STPXpost
+ 604276529U, // STPXpre
+ 1150583379U, // STRBBpost
+ 76841555U, // STRBBpre
+ 26485331U, // STRBBroW
+ 26485331U, // STRBBroX
+ 26485331U, // STRBBui
+ 1150584806U, // STRBpost
+ 76842982U, // STRBpre
+ 26486758U, // STRBroW
+ 26486758U, // STRBroX
+ 26486758U, // STRBui
+ 1150584806U, // STRDpost
+ 76842982U, // STRDpre
+ 26486758U, // STRDroW
+ 26486758U, // STRDroX
+ 26486758U, // STRDui
+ 1150583876U, // STRHHpost
+ 76842052U, // STRHHpre
+ 26485828U, // STRHHroW
+ 26485828U, // STRHHroX
+ 26485828U, // STRHHui
+ 1150584806U, // STRHpost
+ 76842982U, // STRHpre
+ 26486758U, // STRHroW
+ 26486758U, // STRHroX
+ 26486758U, // STRHui
+ 1150584806U, // STRQpost
+ 76842982U, // STRQpre
+ 26486758U, // STRQroW
+ 26486758U, // STRQroX
+ 26486758U, // STRQui
+ 1150584806U, // STRSpost
+ 76842982U, // STRSpre
+ 26486758U, // STRSroW
+ 26486758U, // STRSroX
+ 26486758U, // STRSui
+ 1150584806U, // STRWpost
+ 76842982U, // STRWpre
+ 26486758U, // STRWroW
+ 26486758U, // STRWroX
+ 26486758U, // STRWui
+ 1150584806U, // STRXpost
+ 76842982U, // STRXpre
+ 26486758U, // STRXroW
+ 26486758U, // STRXroX
+ 26486758U, // STRXui
+ 26485337U, // STTRBi
+ 26485834U, // STTRHi
+ 26486763U, // STTRWi
+ 26486763U, // STTRXi
+ 26485351U, // STURBBi
+ 26486781U, // STURBi
+ 26486781U, // STURDi
+ 26485848U, // STURHHi
+ 26486781U, // STURHi
+ 26486781U, // STURQi
+ 26486781U, // STURSi
+ 26486781U, // STURWi
+ 26486781U, // STURXi
+ 17049444U, // STXPW
+ 17049444U, // STXPX
+ 553919109U, // STXRB
+ 553919606U, // STXRH
+ 553920535U, // STXRW
+ 553920535U, // STXRX
+ 537400855U, // SUBHNv2i64_v2i32
+ 571748625U, // SUBHNv2i64_v4i32
+ 1074796055U, // SUBHNv4i32_v4i16
+ 1108881681U, // SUBHNv4i32_v8i16
+ 1644179729U, // SUBHNv8i16_v16i8
+ 1612453399U, // SUBHNv8i16_v8i8
+ 17049650U, // SUBSWri
+ 0U, // SUBSWrr
+ 17049650U, // SUBSWrs
+ 17049650U, // SUBSWrx
+ 17049650U, // SUBSXri
+ 0U, // SUBSXrr
+ 17049650U, // SUBSXrs
+ 17049650U, // SUBSXrx
+ 17049650U, // SUBSXrx64
+ 17048238U, // SUBWri
+ 0U, // SUBWrr
+ 17048238U, // SUBWrs
+ 17048238U, // SUBWrx
+ 17048238U, // SUBXri
+ 0U, // SUBXrr
+ 17048238U, // SUBXrs
+ 17048238U, // SUBXrx
+ 17048238U, // SUBXrx64
+ 2147488430U, // SUBv16i8
+ 17048238U, // SUBv1i64
+ 2684883630U, // SUBv2i32
+ 537662126U, // SUBv2i64
+ 3222278830U, // SUBv4i16
+ 1075057326U, // SUBv4i32
+ 1612190382U, // SUBv8i16
+ 3759936174U, // SUBv8i8
+ 33567585U, // SUQADDv16i8
+ 604275553U, // SUQADDv1i16
+ 604275553U, // SUQADDv1i32
+ 604275553U, // SUQADDv1i64
+ 604275553U, // SUQADDv1i8
+ 1107833697U, // SUQADDv2i32
+ 1644966753U, // SUQADDv2i64
+ 2182099809U, // SUQADDv4i16
+ 2719232865U, // SUQADDv4i32
+ 3256365921U, // SUQADDv8i16
+ 3793498977U, // SUQADDv8i8
+ 21263U, // SVC
+ 17049022U, // SYSLxt
+ 419702938U, // SYSxt
+ 436212968U, // TBLv16i8Four
+ 436212968U, // TBLv16i8One
+ 436212968U, // TBLv16i8Three
+ 436212968U, // TBLv16i8Two
+ 4196144360U, // TBLv8i8Four
+ 4196144360U, // TBLv8i8One
+ 4196144360U, // TBLv8i8Three
+ 4196144360U, // TBLv8i8Two
+ 17050183U, // TBNZW
+ 17050183U, // TBNZX
+ 452999686U, // TBXv16i8Four
+ 452999686U, // TBXv16i8One
+ 452999686U, // TBXv16i8Three
+ 452999686U, // TBXv16i8Two
+ 4212931078U, // TBXv8i8Four
+ 4212931078U, // TBXv8i8One
+ 4212931078U, // TBXv8i8Three
+ 4212931078U, // TBXv8i8Two
+ 17050167U, // TBZW
+ 17050167U, // TBZX
+ 0U, // TCRETURNdi
+ 0U, // TCRETURNri
+ 2107995U, // TLSDESCCALL
+ 0U, // TLSDESC_BLR
+ 2147487770U, // TRN1v16i8
+ 2684882970U, // TRN1v2i32
+ 537661466U, // TRN1v2i64
+ 3222278170U, // TRN1v4i16
+ 1075056666U, // TRN1v4i32
+ 1612189722U, // TRN1v8i16
+ 3759935514U, // TRN1v8i8
+ 2147488072U, // TRN2v16i8
+ 2684883272U, // TRN2v2i32
+ 537661768U, // TRN2v2i64
+ 3222278472U, // TRN2v4i16
+ 1075056968U, // TRN2v4i32
+ 1612190024U, // TRN2v8i16
+ 3759935816U, // TRN2v8i8
+ 2182623338U, // UABALv16i8_v8i16
+ 2718708938U, // UABALv2i32_v2i64
+ 3256104138U, // UABALv4i16_v4i32
+ 1108095082U, // UABALv4i32_v2i64
+ 1645490282U, // UABALv8i16_v4i32
+ 3793237194U, // UABALv8i8_v8i16
+ 2181050868U, // UABAv16i8
+ 2718446068U, // UABAv2i32
+ 3255841268U, // UABAv4i16
+ 1108619764U, // UABAv4i32
+ 1645752820U, // UABAv8i16
+ 3793498612U, // UABAv8i8
+ 2149060772U, // UABDLv16i8_v8i16
+ 2685146386U, // UABDLv2i32_v2i64
+ 3222541586U, // UABDLv4i16_v4i32
+ 1074532516U, // UABDLv4i32_v2i64
+ 1611927716U, // UABDLv8i16_v4i32
+ 3759674642U, // UABDLv8i8_v8i16
+ 2147488544U, // UABDv16i8
+ 2684883744U, // UABDv2i32
+ 3222278944U, // UABDv4i16
+ 1075057440U, // UABDv4i32
+ 1612190496U, // UABDv8i16
+ 3759936288U, // UABDv8i8
+ 35141323U, // UADALPv16i8_v8i16
+ 1117533899U, // UADALPv2i32_v1i64
+ 2181576395U, // UADALPv4i16_v2i32
+ 2718709451U, // UADALPv4i32_v2i64
+ 3256104651U, // UADALPv8i16_v4i32
+ 3792713419U, // UADALPv8i8_v4i16
+ 1578715U, // UADDLPv16i8_v8i16
+ 1083971291U, // UADDLPv2i32_v1i64
+ 2148013787U, // UADDLPv4i16_v2i32
+ 2685146843U, // UADDLPv4i32_v2i64
+ 3222542043U, // UADDLPv8i16_v4i32
+ 3759150811U, // UADDLPv8i8_v4i16
+ 272708U, // UADDLVv16i8v
+ 2147756356U, // UADDLVv4i16v
+ 2684627268U, // UADDLVv4i32v
+ 3221498180U, // UADDLVv8i16v
+ 3758369092U, // UADDLVv8i8v
+ 2149060788U, // UADDLv16i8_v8i16
+ 2685146416U, // UADDLv2i32_v2i64
+ 3222541616U, // UADDLv4i16_v4i32
+ 1074532532U, // UADDLv4i32_v2i64
+ 1611927732U, // UADDLv8i16_v4i32
+ 3759674672U, // UADDLv8i8_v8i16
+ 1612190141U, // UADDWv16i8_v8i16
+ 537663943U, // UADDWv2i32_v2i64
+ 1075059143U, // UADDWv4i16_v4i32
+ 537661885U, // UADDWv4i32_v2i64
+ 1075057085U, // UADDWv8i16_v4i32
+ 1612192199U, // UADDWv8i8_v8i16
+ 17049067U, // UBFMWri
+ 17049067U, // UBFMXri
+ 17048524U, // UCVTFSWDri
+ 17048524U, // UCVTFSWSri
+ 17048524U, // UCVTFSXDri
+ 17048524U, // UCVTFSXSri
+ 553919436U, // UCVTFUWDri
+ 553919436U, // UCVTFUWSri
+ 553919436U, // UCVTFUXDri
+ 553919436U, // UCVTFUXSri
+ 17048524U, // UCVTFd
+ 17048524U, // UCVTFs
+ 553919436U, // UCVTFv1i32
+ 553919436U, // UCVTFv1i64
+ 1074271180U, // UCVTFv2f32
+ 1611404236U, // UCVTFv2f64
+ 2684883916U, // UCVTFv2i32_shift
+ 537662412U, // UCVTFv2i64_shift
+ 2685670348U, // UCVTFv4f32
+ 1075057612U, // UCVTFv4i32_shift
+ 17049910U, // UDIVWr
+ 17049910U, // UDIVXr
+ 17049910U, // UDIV_IntWr
+ 17049910U, // UDIV_IntXr
+ 2147488579U, // UHADDv16i8
+ 2684883779U, // UHADDv2i32
+ 3222278979U, // UHADDv4i16
+ 1075057475U, // UHADDv4i32
+ 1612190531U, // UHADDv8i16
+ 3759936323U, // UHADDv8i8
+ 2147488442U, // UHSUBv16i8
+ 2684883642U, // UHSUBv2i32
+ 3222278842U, // UHSUBv4i16
+ 1075057338U, // UHSUBv4i32
+ 1612190394U, // UHSUBv8i16
+ 3759936186U, // UHSUBv8i8
+ 17048865U, // UMADDLrrr
+ 2147489616U, // UMAXPv16i8
+ 2684884816U, // UMAXPv2i32
+ 3222280016U, // UMAXPv4i16
+ 1075058512U, // UMAXPv4i32
+ 1612191568U, // UMAXPv8i16
+ 3759937360U, // UMAXPv8i8
+ 272794U, // UMAXVv16i8v
+ 2147756442U, // UMAXVv4i16v
+ 2684627354U, // UMAXVv4i32v
+ 3221498266U, // UMAXVv8i16v
+ 3758369178U, // UMAXVv8i8v
+ 2147490304U, // UMAXv16i8
+ 2684885504U, // UMAXv2i32
+ 3222280704U, // UMAXv4i16
+ 1075059200U, // UMAXv4i32
+ 1612192256U, // UMAXv8i16
+ 3759938048U, // UMAXv8i8
+ 2147489558U, // UMINPv16i8
+ 2684884758U, // UMINPv2i32
+ 3222279958U, // UMINPv4i16
+ 1075058454U, // UMINPv4i32
+ 1612191510U, // UMINPv8i16
+ 3759937302U, // UMINPv8i8
+ 272748U, // UMINVv16i8v
+ 2147756396U, // UMINVv4i16v
+ 2684627308U, // UMINVv4i32v
+ 3221498220U, // UMINVv8i16v
+ 3758369132U, // UMINVv8i8v
+ 2147489330U, // UMINv16i8
+ 2684884530U, // UMINv2i32
+ 3222279730U, // UMINv4i16
+ 1075058226U, // UMINv4i32
+ 1612191282U, // UMINv8i16
+ 3759937074U, // UMINv8i8
+ 2182623364U, // UMLALv16i8_v8i16
+ 2718708961U, // UMLALv2i32_indexed
+ 2718708961U, // UMLALv2i32_v2i64
+ 3256104161U, // UMLALv4i16_indexed
+ 3256104161U, // UMLALv4i16_v4i32
+ 1108095108U, // UMLALv4i32_indexed
+ 1108095108U, // UMLALv4i32_v2i64
+ 1645490308U, // UMLALv8i16_indexed
+ 1645490308U, // UMLALv8i16_v4i32
+ 3793237217U, // UMLALv8i8_v8i16
+ 2182623488U, // UMLSLv16i8_v8i16
+ 2718709175U, // UMLSLv2i32_indexed
+ 2718709175U, // UMLSLv2i32_v2i64
+ 3256104375U, // UMLSLv4i16_indexed
+ 3256104375U, // UMLSLv4i16_v4i32
+ 1108095232U, // UMLSLv4i32_indexed
+ 1108095232U, // UMLSLv4i32_v2i64
+ 1645490432U, // UMLSLv8i16_indexed
+ 1645490432U, // UMLSLv8i16_v4i32
+ 3793237431U, // UMLSLv8i8_v8i16
+ 272774U, // UMOVvi16
+ 537143686U, // UMOVvi32
+ 1074014598U, // UMOVvi64
+ 1610885510U, // UMOVvi8
+ 17048821U, // UMSUBLrrr
+ 17048610U, // UMULHrr
+ 2149060838U, // UMULLv16i8_v8i16
+ 2685146523U, // UMULLv2i32_indexed
+ 2685146523U, // UMULLv2i32_v2i64
+ 3222541723U, // UMULLv4i16_indexed
+ 3222541723U, // UMULLv4i16_v4i32
+ 1074532582U, // UMULLv4i32_indexed
+ 1074532582U, // UMULLv4i32_v2i64
+ 1611927782U, // UMULLv8i16_indexed
+ 1611927782U, // UMULLv8i16_v4i32
+ 3759674779U, // UMULLv8i8_v8i16
+ 2147488610U, // UQADDv16i8
+ 17048418U, // UQADDv1i16
+ 17048418U, // UQADDv1i32
+ 17048418U, // UQADDv1i64
+ 17048418U, // UQADDv1i8
+ 2684883810U, // UQADDv2i32
+ 537662306U, // UQADDv2i64
+ 3222279010U, // UQADDv4i16
+ 1075057506U, // UQADDv4i32
+ 1612190562U, // UQADDv8i16
+ 3759936354U, // UQADDv8i8
+ 2147489108U, // UQRSHLv16i8
+ 17048916U, // UQRSHLv1i16
+ 17048916U, // UQRSHLv1i32
+ 17048916U, // UQRSHLv1i64
+ 17048916U, // UQRSHLv1i8
+ 2684884308U, // UQRSHLv2i32
+ 537662804U, // UQRSHLv2i64
+ 3222279508U, // UQRSHLv4i16
+ 1075058004U, // UQRSHLv4i32
+ 1612191060U, // UQRSHLv8i16
+ 3759936852U, // UQRSHLv8i8
+ 17049180U, // UQRSHRNb
+ 17049180U, // UQRSHRNh
+ 17049180U, // UQRSHRNs
+ 1644179774U, // UQRSHRNv16i8_shift
+ 537400924U, // UQRSHRNv2i32_shift
+ 1074796124U, // UQRSHRNv4i16_shift
+ 571748670U, // UQRSHRNv4i32_shift
+ 1108881726U, // UQRSHRNv8i16_shift
+ 1612453468U, // UQRSHRNv8i8_shift
+ 17048901U, // UQSHLb
+ 17048901U, // UQSHLd
+ 17048901U, // UQSHLh
+ 17048901U, // UQSHLs
+ 2147489093U, // UQSHLv16i8
+ 2147489093U, // UQSHLv16i8_shift
+ 17048901U, // UQSHLv1i16
+ 17048901U, // UQSHLv1i32
+ 17048901U, // UQSHLv1i64
+ 17048901U, // UQSHLv1i8
+ 2684884293U, // UQSHLv2i32
+ 2684884293U, // UQSHLv2i32_shift
+ 537662789U, // UQSHLv2i64
+ 537662789U, // UQSHLv2i64_shift
+ 3222279493U, // UQSHLv4i16
+ 3222279493U, // UQSHLv4i16_shift
+ 1075057989U, // UQSHLv4i32
+ 1075057989U, // UQSHLv4i32_shift
+ 1612191045U, // UQSHLv8i16
+ 1612191045U, // UQSHLv8i16_shift
+ 3759936837U, // UQSHLv8i8
+ 3759936837U, // UQSHLv8i8_shift
+ 17049163U, // UQSHRNb
+ 17049163U, // UQSHRNh
+ 17049163U, // UQSHRNs
+ 1644179755U, // UQSHRNv16i8_shift
+ 537400907U, // UQSHRNv2i32_shift
+ 1074796107U, // UQSHRNv4i16_shift
+ 571748651U, // UQSHRNv4i32_shift
+ 1108881707U, // UQSHRNv8i16_shift
+ 1612453451U, // UQSHRNv8i8_shift
+ 2147488471U, // UQSUBv16i8
+ 17048279U, // UQSUBv1i16
+ 17048279U, // UQSUBv1i32
+ 17048279U, // UQSUBv1i64
+ 17048279U, // UQSUBv1i8
+ 2684883671U, // UQSUBv2i32
+ 537662167U, // UQSUBv2i64
+ 3222278871U, // UQSUBv4i16
+ 1075057367U, // UQSUBv4i32
+ 1612190423U, // UQSUBv8i16
+ 3759936215U, // UQSUBv8i8
+ 3254792542U, // UQXTNv16i8
+ 553920128U, // UQXTNv1i16
+ 553920128U, // UQXTNv1i32
+ 553920128U, // UQXTNv1i8
+ 1611142784U, // UQXTNv2i32
+ 2685408896U, // UQXTNv4i16
+ 1645490526U, // UQXTNv4i32
+ 2719494494U, // UQXTNv8i16
+ 3223066240U, // UQXTNv8i8
+ 1074271121U, // URECPEv2i32
+ 2685670289U, // URECPEv4i32
+ 2147488564U, // URHADDv16i8
+ 2684883764U, // URHADDv2i32
+ 3222278964U, // URHADDv4i16
+ 1075057460U, // URHADDv4i32
+ 1612190516U, // URHADDv8i16
+ 3759936308U, // URHADDv8i8
+ 2147489123U, // URSHLv16i8
+ 17048931U, // URSHLv1i64
+ 2684884323U, // URSHLv2i32
+ 537662819U, // URSHLv2i64
+ 3222279523U, // URSHLv4i16
+ 1075058019U, // URSHLv4i32
+ 1612191075U, // URSHLv8i16
+ 3759936867U, // URSHLv8i8
+ 17049508U, // URSHRd
+ 2147489700U, // URSHRv16i8_shift
+ 2684884900U, // URSHRv2i32_shift
+ 537663396U, // URSHRv2i64_shift
+ 3222280100U, // URSHRv4i16_shift
+ 1075058596U, // URSHRv4i32_shift
+ 1612191652U, // URSHRv8i16_shift
+ 3759937444U, // URSHRv8i8_shift
+ 1074271159U, // URSQRTEv2i32
+ 2685670327U, // URSQRTEv4i32
+ 67404295U, // URSRAd
+ 2181050887U, // URSRAv16i8_shift
+ 2718446087U, // URSRAv2i32_shift
+ 571224583U, // URSRAv2i64_shift
+ 3255841287U, // URSRAv4i16_shift
+ 1108619783U, // URSRAv4i32_shift
+ 1645752839U, // URSRAv8i16_shift
+ 3793498631U, // URSRAv8i8_shift
+ 2149060804U, // USHLLv16i8_shift
+ 2685146493U, // USHLLv2i32_shift
+ 3222541693U, // USHLLv4i16_shift
+ 1074532548U, // USHLLv4i32_shift
+ 1611927748U, // USHLLv8i16_shift
+ 3759674749U, // USHLLv8i8_shift
+ 2147489136U, // USHLv16i8
+ 17048944U, // USHLv1i64
+ 2684884336U, // USHLv2i32
+ 537662832U, // USHLv2i64
+ 3222279536U, // USHLv4i16
+ 1075058032U, // USHLv4i32
+ 1612191088U, // USHLv8i16
+ 3759936880U, // USHLv8i8
+ 17049521U, // USHRd
+ 2147489713U, // USHRv16i8_shift
+ 2684884913U, // USHRv2i32_shift
+ 537663409U, // USHRv2i64_shift
+ 3222280113U, // USHRv4i16_shift
+ 1075058609U, // USHRv4i32_shift
+ 1612191665U, // USHRv8i16_shift
+ 3759937457U, // USHRv8i8_shift
+ 33567577U, // USQADDv16i8
+ 604275545U, // USQADDv1i16
+ 604275545U, // USQADDv1i32
+ 604275545U, // USQADDv1i64
+ 604275545U, // USQADDv1i8
+ 1107833689U, // USQADDv2i32
+ 1644966745U, // USQADDv2i64
+ 2182099801U, // USQADDv4i16
+ 2719232857U, // USQADDv4i32
+ 3256365913U, // USQADDv8i16
+ 3793498969U, // USQADDv8i8
+ 67404308U, // USRAd
+ 2181050900U, // USRAv16i8_shift
+ 2718446100U, // USRAv2i32_shift
+ 571224596U, // USRAv2i64_shift
+ 3255841300U, // USRAv4i16_shift
+ 1108619796U, // USRAv4i32_shift
+ 1645752852U, // USRAv8i16_shift
+ 3793498644U, // USRAv8i8_shift
+ 2149060756U, // USUBLv16i8_v8i16
+ 2685146372U, // USUBLv2i32_v2i64
+ 3222541572U, // USUBLv4i16_v4i32
+ 1074532500U, // USUBLv4i32_v2i64
+ 1611927700U, // USUBLv8i16_v4i32
+ 3759674628U, // USUBLv8i8_v8i16
+ 1612190125U, // USUBWv16i8_v8i16
+ 537663920U, // USUBWv2i32_v2i64
+ 1075059120U, // USUBWv4i16_v4i32
+ 537661869U, // USUBWv4i32_v2i64
+ 1075057069U, // USUBWv8i16_v4i32
+ 1612192176U, // USUBWv8i8_v8i16
+ 2147487782U, // UZP1v16i8
+ 2684882982U, // UZP1v2i32
+ 537661478U, // UZP1v2i64
+ 3222278182U, // UZP1v4i16
+ 1075056678U, // UZP1v4i32
+ 1612189734U, // UZP1v8i16
+ 3759935526U, // UZP1v8i8
+ 2147488147U, // UZP2v16i8
+ 2684883347U, // UZP2v2i32
+ 537661843U, // UZP2v2i64
+ 3222278547U, // UZP2v4i16
+ 1075057043U, // UZP2v4i32
+ 1612190099U, // UZP2v8i16
+ 3759935891U, // UZP2v8i8
+ 3254792536U, // XTNv16i8
+ 1611142779U, // XTNv2i32
+ 2685408891U, // XTNv4i16
+ 1645490520U, // XTNv4i32
+ 2719494488U, // XTNv8i16
+ 3223066235U, // XTNv8i8
+ 2147487776U, // ZIP1v16i8
+ 2684882976U, // ZIP1v2i32
+ 537661472U, // ZIP1v2i64
+ 3222278176U, // ZIP1v4i16
+ 1075056672U, // ZIP1v4i32
+ 1612189728U, // ZIP1v8i16
+ 3759935520U, // ZIP1v8i8
+ 2147488141U, // ZIP2v16i8
+ 2684883341U, // ZIP2v2i32
+ 537661837U, // ZIP2v2i64
+ 3222278541U, // ZIP2v4i16
+ 1075057037U, // ZIP2v4i32
+ 1612190093U, // ZIP2v8i16
+ 3759935885U, // ZIP2v8i8
0U
};
static const uint32_t OpInfo2[] = {
0U, // PHI
0U, // INLINEASM
- 0U, // PROLOG_LABEL
+ 0U, // CFI_INSTRUCTION
0U, // EH_LABEL
0U, // GC_LABEL
0U, // KILL
@@ -2820,2770 +2425,2375 @@
0U, // LIFETIME_END
0U, // STACKMAP
0U, // PATCHPOINT
- 0U, // ABS16b
- 0U, // ABS2d
- 0U, // ABS2s
- 0U, // ABS4h
- 1U, // ABS4s
- 1U, // ABS8b
- 1U, // ABS8h
- 1U, // ABSdd
- 2U, // ADCSwww
- 2U, // ADCSxxx
- 2U, // ADCwww
- 2U, // ADCxxx
- 522U, // ADDHN2vvv_16b8h
- 1034U, // ADDHN2vvv_4s2d
- 1546U, // ADDHN2vvv_8h4s
- 1042U, // ADDHNvvv_2s2d
- 1554U, // ADDHNvvv_4h4s
- 530U, // ADDHNvvv_8b8h
- 2067U, // ADDP_16B
- 1042U, // ADDP_2D
- 2579U, // ADDP_2S
- 3091U, // ADDP_4H
- 1554U, // ADDP_4S
- 3603U, // ADDP_8B
- 530U, // ADDP_8H
- 0U, // ADDPvv_D_2D
- 4098U, // ADDSwww_asr
- 20482U, // ADDSwww_lsl
- 36866U, // ADDSwww_lsr
- 53250U, // ADDSwww_sxtb
- 69634U, // ADDSwww_sxth
- 86018U, // ADDSwww_sxtw
- 102402U, // ADDSwww_sxtx
- 118786U, // ADDSwww_uxtb
- 135170U, // ADDSwww_uxth
- 151554U, // ADDSwww_uxtw
- 167938U, // ADDSwww_uxtx
- 53250U, // ADDSxxw_sxtb
- 69634U, // ADDSxxw_sxth
- 86018U, // ADDSxxw_sxtw
- 118786U, // ADDSxxw_uxtb
- 135170U, // ADDSxxw_uxth
- 151554U, // ADDSxxw_uxtw
- 4098U, // ADDSxxx_asr
- 20482U, // ADDSxxx_lsl
- 36866U, // ADDSxxx_lsr
- 102402U, // ADDSxxx_sxtx
- 167938U, // ADDSxxx_uxtx
- 0U, // ADDV_1b16b
- 1U, // ADDV_1b8b
- 0U, // ADDV_1h4h
- 1U, // ADDV_1h8h
- 1U, // ADDV_1s4s
- 2U, // ADDddd
- 2067U, // ADDvvv_16B
- 1042U, // ADDvvv_2D
- 2579U, // ADDvvv_2S
- 3091U, // ADDvvv_4H
- 1554U, // ADDvvv_4S
- 3603U, // ADDvvv_8B
- 530U, // ADDvvv_8H
- 26U, // ADDwwi_lsl0_S
- 0U, // ADDwwi_lsl0_cmp
- 26U, // ADDwwi_lsl0_s
- 34U, // ADDwwi_lsl12_S
- 0U, // ADDwwi_lsl12_cmp
- 34U, // ADDwwi_lsl12_s
- 4098U, // ADDwww_asr
- 20482U, // ADDwww_lsl
- 36866U, // ADDwww_lsr
- 53250U, // ADDwww_sxtb
- 69634U, // ADDwww_sxth
- 86018U, // ADDwww_sxtw
- 102402U, // ADDwww_sxtx
- 118786U, // ADDwww_uxtb
- 135170U, // ADDwww_uxth
- 151554U, // ADDwww_uxtw
- 167938U, // ADDwww_uxtx
- 26U, // ADDxxi_lsl0_S
- 0U, // ADDxxi_lsl0_cmp
- 26U, // ADDxxi_lsl0_s
- 34U, // ADDxxi_lsl12_S
- 0U, // ADDxxi_lsl12_cmp
- 34U, // ADDxxi_lsl12_s
- 53250U, // ADDxxw_sxtb
- 69634U, // ADDxxw_sxth
- 86018U, // ADDxxw_sxtw
- 118786U, // ADDxxw_uxtb
- 135170U, // ADDxxw_uxth
- 151554U, // ADDxxw_uxtw
- 4098U, // ADDxxx_asr
- 20482U, // ADDxxx_lsl
- 36866U, // ADDxxx_lsr
- 102402U, // ADDxxx_sxtx
- 167938U, // ADDxxx_uxtx
+ 0U, // LOAD_STACK_GUARD
+ 0U, // ABSv16i8
+ 0U, // ABSv1i64
+ 0U, // ABSv2i32
+ 0U, // ABSv2i64
+ 0U, // ABSv4i16
+ 0U, // ABSv4i32
+ 0U, // ABSv8i16
+ 0U, // ABSv8i8
+ 1U, // ADCSWr
+ 1U, // ADCSXr
+ 1U, // ADCWr
+ 1U, // ADCXr
+ 265U, // ADDHNv2i64_v2i32
+ 273U, // ADDHNv2i64_v4i32
+ 521U, // ADDHNv4i32_v4i16
+ 529U, // ADDHNv4i32_v8i16
+ 785U, // ADDHNv8i16_v16i8
+ 777U, // ADDHNv8i16_v8i8
+ 1033U, // ADDPv16i8
+ 1289U, // ADDPv2i32
+ 265U, // ADDPv2i64
+ 0U, // ADDPv2i64p
+ 1545U, // ADDPv4i16
+ 521U, // ADDPv4i32
+ 777U, // ADDPv8i16
+ 1801U, // ADDPv8i8
+ 25U, // ADDSWri
+ 0U, // ADDSWrr
+ 33U, // ADDSWrs
+ 41U, // ADDSWrx
+ 25U, // ADDSXri
+ 0U, // ADDSXrr
+ 33U, // ADDSXrs
+ 41U, // ADDSXrx
+ 2049U, // ADDSXrx64
+ 0U, // ADDVv16i8v
+ 0U, // ADDVv4i16v
+ 0U, // ADDVv4i32v
+ 0U, // ADDVv8i16v
+ 0U, // ADDVv8i8v
+ 25U, // ADDWri
+ 0U, // ADDWrr
+ 33U, // ADDWrs
+ 41U, // ADDWrx
+ 25U, // ADDXri
+ 0U, // ADDXrr
+ 33U, // ADDXrs
+ 41U, // ADDXrx
+ 2049U, // ADDXrx64
+ 1033U, // ADDv16i8
+ 1U, // ADDv1i64
+ 1289U, // ADDv2i32
+ 265U, // ADDv2i64
+ 1545U, // ADDv4i16
+ 521U, // ADDv4i32
+ 777U, // ADDv8i16
+ 1801U, // ADDv8i8
0U, // ADJCALLSTACKDOWN
0U, // ADJCALLSTACKUP
- 0U, // ADRPxi
- 0U, // ADRxi
- 0U, // AESD
- 0U, // AESE
- 0U, // AESIMC
- 0U, // AESMC
- 42U, // ANDSwwi
- 4098U, // ANDSwww_asr
- 20482U, // ANDSwww_lsl
- 36866U, // ANDSwww_lsr
- 184322U, // ANDSwww_ror
- 50U, // ANDSxxi
- 4098U, // ANDSxxx_asr
- 20482U, // ANDSxxx_lsl
- 36866U, // ANDSxxx_lsr
- 184322U, // ANDSxxx_ror
- 2067U, // ANDvvv_16B
- 3603U, // ANDvvv_8B
- 42U, // ANDwwi
- 4098U, // ANDwww_asr
- 20482U, // ANDwww_lsl
- 36866U, // ANDwww_lsr
- 184322U, // ANDwww_ror
- 50U, // ANDxxi
- 4098U, // ANDxxx_asr
- 20482U, // ANDxxx_lsl
- 36866U, // ANDxxx_lsr
- 184322U, // ANDxxx_ror
- 2U, // ASRVwww
- 2U, // ASRVxxx
- 2U, // ASRwwi
- 2U, // ASRxxi
- 0U, // ATOMIC_CMP_SWAP_I16
- 0U, // ATOMIC_CMP_SWAP_I32
- 0U, // ATOMIC_CMP_SWAP_I64
- 0U, // ATOMIC_CMP_SWAP_I8
- 0U, // ATOMIC_LOAD_ADD_I16
- 0U, // ATOMIC_LOAD_ADD_I32
- 0U, // ATOMIC_LOAD_ADD_I64
- 0U, // ATOMIC_LOAD_ADD_I8
- 0U, // ATOMIC_LOAD_AND_I16
- 0U, // ATOMIC_LOAD_AND_I32
- 0U, // ATOMIC_LOAD_AND_I64
- 0U, // ATOMIC_LOAD_AND_I8
- 0U, // ATOMIC_LOAD_MAX_I16
- 0U, // ATOMIC_LOAD_MAX_I32
- 0U, // ATOMIC_LOAD_MAX_I64
- 0U, // ATOMIC_LOAD_MAX_I8
- 0U, // ATOMIC_LOAD_MIN_I16
- 0U, // ATOMIC_LOAD_MIN_I32
- 0U, // ATOMIC_LOAD_MIN_I64
- 0U, // ATOMIC_LOAD_MIN_I8
- 0U, // ATOMIC_LOAD_NAND_I16
- 0U, // ATOMIC_LOAD_NAND_I32
- 0U, // ATOMIC_LOAD_NAND_I64
- 0U, // ATOMIC_LOAD_NAND_I8
- 0U, // ATOMIC_LOAD_OR_I16
- 0U, // ATOMIC_LOAD_OR_I32
- 0U, // ATOMIC_LOAD_OR_I64
- 0U, // ATOMIC_LOAD_OR_I8
- 0U, // ATOMIC_LOAD_SUB_I16
- 0U, // ATOMIC_LOAD_SUB_I32
- 0U, // ATOMIC_LOAD_SUB_I64
- 0U, // ATOMIC_LOAD_SUB_I8
- 0U, // ATOMIC_LOAD_UMAX_I16
- 0U, // ATOMIC_LOAD_UMAX_I32
- 0U, // ATOMIC_LOAD_UMAX_I64
- 0U, // ATOMIC_LOAD_UMAX_I8
- 0U, // ATOMIC_LOAD_UMIN_I16
- 0U, // ATOMIC_LOAD_UMIN_I32
- 0U, // ATOMIC_LOAD_UMIN_I64
- 0U, // ATOMIC_LOAD_UMIN_I8
- 0U, // ATOMIC_LOAD_XOR_I16
- 0U, // ATOMIC_LOAD_XOR_I32
- 0U, // ATOMIC_LOAD_XOR_I64
- 0U, // ATOMIC_LOAD_XOR_I8
- 0U, // ATOMIC_SWAP_I16
- 0U, // ATOMIC_SWAP_I32
- 0U, // ATOMIC_SWAP_I64
- 0U, // ATOMIC_SWAP_I8
- 0U, // ATix
- 58U, // BFIwwii
- 66U, // BFIxxii
- 200778U, // BFMwwii
- 200778U, // BFMxxii
- 217162U, // BFXILwwii
- 217162U, // BFXILxxii
- 4098U, // BICSwww_asr
- 20482U, // BICSwww_lsl
- 36866U, // BICSwww_lsr
- 184322U, // BICSwww_ror
- 4098U, // BICSxxx_asr
- 20482U, // BICSxxx_lsl
- 36866U, // BICSxxx_lsr
- 184322U, // BICSxxx_ror
- 4U, // BICvi_lsl_2S
- 4U, // BICvi_lsl_4H
- 4U, // BICvi_lsl_4S
- 4U, // BICvi_lsl_8H
- 2067U, // BICvvv_16B
- 3603U, // BICvvv_8B
- 4098U, // BICwww_asr
- 20482U, // BICwww_lsl
- 36866U, // BICwww_lsr
- 184322U, // BICwww_ror
- 4098U, // BICxxx_asr
- 20482U, // BICxxx_lsl
- 36866U, // BICxxx_lsr
- 184322U, // BICxxx_ror
- 2059U, // BIFvvv_16B
- 3595U, // BIFvvv_8B
- 2059U, // BITvvv_16B
- 3595U, // BITvvv_8B
- 0U, // BLRx
- 0U, // BLimm
- 0U, // BRKi
- 0U, // BRx
- 2059U, // BSLvvv_16B
- 3595U, // BSLvvv_8B
+ 0U, // ADR
+ 0U, // ADRP
+ 0U, // AESDrr
+ 0U, // AESErr
+ 0U, // AESIMCrr
+ 0U, // AESMCrr
+ 49U, // ANDSWri
+ 0U, // ANDSWrr
+ 33U, // ANDSWrs
+ 57U, // ANDSXri
+ 0U, // ANDSXrr
+ 33U, // ANDSXrs
+ 49U, // ANDWri
+ 0U, // ANDWrr
+ 33U, // ANDWrs
+ 57U, // ANDXri
+ 0U, // ANDXrr
+ 33U, // ANDXrs
+ 1033U, // ANDv16i8
+ 1801U, // ANDv8i8
+ 1U, // ASRVWr
+ 1U, // ASRVXr
+ 0U, // B
+ 2369U, // BFMWri
+ 2369U, // BFMXri
+ 0U, // BICSWrr
+ 33U, // BICSWrs
+ 0U, // BICSXrr
+ 33U, // BICSXrs
+ 0U, // BICWrr
+ 33U, // BICWrs
+ 0U, // BICXrr
+ 33U, // BICXrs
+ 1033U, // BICv16i8
+ 0U, // BICv2i32
+ 0U, // BICv4i16
+ 0U, // BICv4i32
+ 0U, // BICv8i16
+ 1801U, // BICv8i8
+ 1033U, // BIFv16i8
+ 1801U, // BIFv8i8
+ 1041U, // BITv16i8
+ 1809U, // BITv8i8
+ 0U, // BL
+ 0U, // BLR
+ 0U, // BR
+ 0U, // BRK
+ 1041U, // BSLv16i8
+ 1809U, // BSLv8i8
0U, // Bcc
- 0U, // Bimm
- 0U, // CBNZw
- 0U, // CBNZx
- 0U, // CBZw
- 0U, // CBZx
- 233474U, // CCMNwi
- 233474U, // CCMNww
- 233474U, // CCMNxi
- 233474U, // CCMNxx
- 233474U, // CCMPwi
- 233474U, // CCMPww
- 233474U, // CCMPxi
- 233474U, // CCMPxx
- 0U, // CLREXi
- 0U, // CLS16b
- 0U, // CLS2s
- 0U, // CLS4h
- 1U, // CLS4s
- 1U, // CLS8b
- 1U, // CLS8h
- 1U, // CLSww
- 1U, // CLSxx
- 0U, // CLZ16b
- 0U, // CLZ2s
- 0U, // CLZ4h
- 1U, // CLZ4s
- 1U, // CLZ8b
- 1U, // CLZ8h
- 1U, // CLZww
- 1U, // CLZxx
- 2U, // CMEQddd
- 82U, // CMEQddi
- 83U, // CMEQvvi_16B
- 82U, // CMEQvvi_2D
- 83U, // CMEQvvi_2S
- 83U, // CMEQvvi_4H
- 82U, // CMEQvvi_4S
- 83U, // CMEQvvi_8B
- 82U, // CMEQvvi_8H
- 2067U, // CMEQvvv_16B
- 1042U, // CMEQvvv_2D
- 2579U, // CMEQvvv_2S
- 3091U, // CMEQvvv_4H
- 1554U, // CMEQvvv_4S
- 3603U, // CMEQvvv_8B
- 530U, // CMEQvvv_8H
- 2U, // CMGEddd
- 82U, // CMGEddi
- 83U, // CMGEvvi_16B
- 82U, // CMGEvvi_2D
- 83U, // CMGEvvi_2S
- 83U, // CMGEvvi_4H
- 82U, // CMGEvvi_4S
- 83U, // CMGEvvi_8B
- 82U, // CMGEvvi_8H
- 2067U, // CMGEvvv_16B
- 1042U, // CMGEvvv_2D
- 2579U, // CMGEvvv_2S
- 3091U, // CMGEvvv_4H
- 1554U, // CMGEvvv_4S
- 3603U, // CMGEvvv_8B
- 530U, // CMGEvvv_8H
- 2U, // CMGTddd
- 82U, // CMGTddi
- 83U, // CMGTvvi_16B
- 82U, // CMGTvvi_2D
- 83U, // CMGTvvi_2S
- 83U, // CMGTvvi_4H
- 82U, // CMGTvvi_4S
- 83U, // CMGTvvi_8B
- 82U, // CMGTvvi_8H
- 2067U, // CMGTvvv_16B
- 1042U, // CMGTvvv_2D
- 2579U, // CMGTvvv_2S
- 3091U, // CMGTvvv_4H
- 1554U, // CMGTvvv_4S
- 3603U, // CMGTvvv_8B
- 530U, // CMGTvvv_8H
- 2U, // CMHIddd
- 2067U, // CMHIvvv_16B
- 1042U, // CMHIvvv_2D
- 2579U, // CMHIvvv_2S
- 3091U, // CMHIvvv_4H
- 1554U, // CMHIvvv_4S
- 3603U, // CMHIvvv_8B
- 530U, // CMHIvvv_8H
- 2U, // CMHSddd
- 2067U, // CMHSvvv_16B
- 1042U, // CMHSvvv_2D
- 2579U, // CMHSvvv_2S
- 3091U, // CMHSvvv_4H
- 1554U, // CMHSvvv_4S
- 3603U, // CMHSvvv_8B
- 530U, // CMHSvvv_8H
- 82U, // CMLEddi
- 83U, // CMLEvvi_16B
- 82U, // CMLEvvi_2D
- 83U, // CMLEvvi_2S
- 83U, // CMLEvvi_4H
- 82U, // CMLEvvi_4S
- 83U, // CMLEvvi_8B
- 82U, // CMLEvvi_8H
- 82U, // CMLTddi
- 83U, // CMLTvvi_16B
- 82U, // CMLTvvi_2D
- 83U, // CMLTvvi_2S
- 83U, // CMLTvvi_4H
- 82U, // CMLTvvi_4S
- 83U, // CMLTvvi_8B
- 82U, // CMLTvvi_8H
- 90U, // CMNww_asr
- 98U, // CMNww_lsl
- 106U, // CMNww_lsr
- 114U, // CMNww_sxtb
- 122U, // CMNww_sxth
- 130U, // CMNww_sxtw
- 138U, // CMNww_sxtx
- 146U, // CMNww_uxtb
- 154U, // CMNww_uxth
- 162U, // CMNww_uxtw
- 170U, // CMNww_uxtx
- 114U, // CMNxw_sxtb
- 122U, // CMNxw_sxth
- 130U, // CMNxw_sxtw
- 146U, // CMNxw_uxtb
- 154U, // CMNxw_uxth
- 162U, // CMNxw_uxtw
- 90U, // CMNxx_asr
- 98U, // CMNxx_lsl
- 106U, // CMNxx_lsr
- 138U, // CMNxx_sxtx
- 170U, // CMNxx_uxtx
- 90U, // CMPww_asr
- 98U, // CMPww_lsl
- 106U, // CMPww_lsr
- 114U, // CMPww_sxtb
- 122U, // CMPww_sxth
- 130U, // CMPww_sxtw
- 138U, // CMPww_sxtx
- 146U, // CMPww_uxtb
- 154U, // CMPww_uxth
- 162U, // CMPww_uxtw
- 170U, // CMPww_uxtx
- 114U, // CMPxw_sxtb
- 122U, // CMPxw_sxth
- 130U, // CMPxw_sxtw
- 146U, // CMPxw_uxtb
- 154U, // CMPxw_uxth
- 162U, // CMPxw_uxtw
- 90U, // CMPxx_asr
- 98U, // CMPxx_lsl
- 106U, // CMPxx_lsr
- 138U, // CMPxx_sxtx
- 170U, // CMPxx_uxtx
- 2U, // CMTSTddd
- 2067U, // CMTSTvvv_16B
- 1042U, // CMTSTvvv_2D
- 2579U, // CMTSTvvv_2S
- 3091U, // CMTSTvvv_4H
- 1554U, // CMTSTvvv_4S
- 3603U, // CMTSTvvv_8B
- 530U, // CMTSTvvv_8H
- 0U, // CNT16b
- 1U, // CNT8b
- 2U, // CRC32B_www
- 2U, // CRC32CB_www
- 2U, // CRC32CH_www
- 2U, // CRC32CW_www
- 2U, // CRC32CX_wwx
- 2U, // CRC32H_www
- 2U, // CRC32W_www
- 2U, // CRC32X_wwx
- 233474U, // CSELwwwc
- 233474U, // CSELxxxc
- 233474U, // CSINCwwwc
- 233474U, // CSINCxxxc
- 233474U, // CSINVwwwc
- 233474U, // CSINVxxxc
- 233474U, // CSNEGwwwc
- 233474U, // CSNEGxxxc
- 0U, // DCPS1i
- 0U, // DCPS2i
- 0U, // DCPS3i
- 0U, // DCix
- 0U, // DMBi
+ 0U, // CBNZW
+ 0U, // CBNZX
+ 0U, // CBZW
+ 0U, // CBZX
+ 10497U, // CCMNWi
+ 10497U, // CCMNWr
+ 10497U, // CCMNXi
+ 10497U, // CCMNXr
+ 10497U, // CCMPWi
+ 10497U, // CCMPWr
+ 10497U, // CCMPXi
+ 10497U, // CCMPXr
+ 0U, // CLREX
+ 0U, // CLSWr
+ 0U, // CLSXr
+ 0U, // CLSv16i8
+ 0U, // CLSv2i32
+ 0U, // CLSv4i16
+ 0U, // CLSv4i32
+ 0U, // CLSv8i16
+ 0U, // CLSv8i8
+ 0U, // CLZWr
+ 0U, // CLZXr
+ 0U, // CLZv16i8
+ 0U, // CLZv2i32
+ 0U, // CLZv4i16
+ 0U, // CLZv4i32
+ 0U, // CLZv8i16
+ 0U, // CLZv8i8
+ 1033U, // CMEQv16i8
+ 2U, // CMEQv16i8rz
+ 1U, // CMEQv1i64
+ 2U, // CMEQv1i64rz
+ 1289U, // CMEQv2i32
+ 2U, // CMEQv2i32rz
+ 265U, // CMEQv2i64
+ 2U, // CMEQv2i64rz
+ 1545U, // CMEQv4i16
+ 2U, // CMEQv4i16rz
+ 521U, // CMEQv4i32
+ 2U, // CMEQv4i32rz
+ 777U, // CMEQv8i16
+ 2U, // CMEQv8i16rz
+ 1801U, // CMEQv8i8
+ 2U, // CMEQv8i8rz
+ 1033U, // CMGEv16i8
+ 2U, // CMGEv16i8rz
+ 1U, // CMGEv1i64
+ 2U, // CMGEv1i64rz
+ 1289U, // CMGEv2i32
+ 2U, // CMGEv2i32rz
+ 265U, // CMGEv2i64
+ 2U, // CMGEv2i64rz
+ 1545U, // CMGEv4i16
+ 2U, // CMGEv4i16rz
+ 521U, // CMGEv4i32
+ 2U, // CMGEv4i32rz
+ 777U, // CMGEv8i16
+ 2U, // CMGEv8i16rz
+ 1801U, // CMGEv8i8
+ 2U, // CMGEv8i8rz
+ 1033U, // CMGTv16i8
+ 2U, // CMGTv16i8rz
+ 1U, // CMGTv1i64
+ 2U, // CMGTv1i64rz
+ 1289U, // CMGTv2i32
+ 2U, // CMGTv2i32rz
+ 265U, // CMGTv2i64
+ 2U, // CMGTv2i64rz
+ 1545U, // CMGTv4i16
+ 2U, // CMGTv4i16rz
+ 521U, // CMGTv4i32
+ 2U, // CMGTv4i32rz
+ 777U, // CMGTv8i16
+ 2U, // CMGTv8i16rz
+ 1801U, // CMGTv8i8
+ 2U, // CMGTv8i8rz
+ 1033U, // CMHIv16i8
+ 1U, // CMHIv1i64
+ 1289U, // CMHIv2i32
+ 265U, // CMHIv2i64
+ 1545U, // CMHIv4i16
+ 521U, // CMHIv4i32
+ 777U, // CMHIv8i16
+ 1801U, // CMHIv8i8
+ 1033U, // CMHSv16i8
+ 1U, // CMHSv1i64
+ 1289U, // CMHSv2i32
+ 265U, // CMHSv2i64
+ 1545U, // CMHSv4i16
+ 521U, // CMHSv4i32
+ 777U, // CMHSv8i16
+ 1801U, // CMHSv8i8
+ 2U, // CMLEv16i8rz
+ 2U, // CMLEv1i64rz
+ 2U, // CMLEv2i32rz
+ 2U, // CMLEv2i64rz
+ 2U, // CMLEv4i16rz
+ 2U, // CMLEv4i32rz
+ 2U, // CMLEv8i16rz
+ 2U, // CMLEv8i8rz
+ 2U, // CMLTv16i8rz
+ 2U, // CMLTv1i64rz
+ 2U, // CMLTv2i32rz
+ 2U, // CMLTv2i64rz
+ 2U, // CMLTv4i16rz
+ 2U, // CMLTv4i32rz
+ 2U, // CMLTv8i16rz
+ 2U, // CMLTv8i8rz
+ 1033U, // CMTSTv16i8
+ 1U, // CMTSTv1i64
+ 1289U, // CMTSTv2i32
+ 265U, // CMTSTv2i64
+ 1545U, // CMTSTv4i16
+ 521U, // CMTSTv4i32
+ 777U, // CMTSTv8i16
+ 1801U, // CMTSTv8i8
+ 0U, // CNTv16i8
+ 0U, // CNTv8i8
+ 75U, // CPYi16
+ 75U, // CPYi32
+ 75U, // CPYi64
+ 75U, // CPYi8
+ 1U, // CRC32Brr
+ 1U, // CRC32CBrr
+ 1U, // CRC32CHrr
+ 1U, // CRC32CWrr
+ 1U, // CRC32CXrr
+ 1U, // CRC32Hrr
+ 1U, // CRC32Wrr
+ 1U, // CRC32Xrr
+ 10497U, // CSELWr
+ 10497U, // CSELXr
+ 10497U, // CSINCWr
+ 10497U, // CSINCXr
+ 10497U, // CSINVWr
+ 10497U, // CSINVXr
+ 10497U, // CSNEGWr
+ 10497U, // CSNEGXr
+ 0U, // DCPS1
+ 0U, // DCPS2
+ 0U, // DCPS3
+ 0U, // DMB
0U, // DRPS
- 0U, // DSBi
- 1U, // DUP16b
- 1U, // DUP2d
- 1U, // DUP2s
- 1U, // DUP4h
- 1U, // DUP4s
- 1U, // DUP8b
- 1U, // DUP8h
- 180U, // DUPELT16b
- 180U, // DUPELT2d
- 181U, // DUPELT2s
- 181U, // DUPELT4h
- 181U, // DUPELT4s
- 180U, // DUPELT8b
- 181U, // DUPELT8h
- 180U, // DUPbv_B
- 180U, // DUPdv_D
- 181U, // DUPhv_H
- 181U, // DUPsv_S
- 4098U, // EONwww_asr
- 20482U, // EONwww_lsl
- 36866U, // EONwww_lsr
- 184322U, // EONwww_ror
- 4098U, // EONxxx_asr
- 20482U, // EONxxx_lsl
- 36866U, // EONxxx_lsr
- 184322U, // EONxxx_ror
- 2067U, // EORvvv_16B
- 3603U, // EORvvv_8B
- 42U, // EORwwi
- 4098U, // EORwww_asr
- 20482U, // EORwww_lsl
- 36866U, // EORwww_lsr
- 184322U, // EORwww_ror
- 50U, // EORxxi
- 4098U, // EORxxx_asr
- 20482U, // EORxxx_lsl
- 36866U, // EORxxx_lsr
- 184322U, // EORxxx_ror
+ 0U, // DSB
+ 0U, // DUPv16i8gpr
+ 75U, // DUPv16i8lane
+ 0U, // DUPv2i32gpr
+ 75U, // DUPv2i32lane
+ 0U, // DUPv2i64gpr
+ 75U, // DUPv2i64lane
+ 0U, // DUPv4i16gpr
+ 75U, // DUPv4i16lane
+ 0U, // DUPv4i32gpr
+ 75U, // DUPv4i32lane
+ 0U, // DUPv8i16gpr
+ 75U, // DUPv8i16lane
+ 0U, // DUPv8i8gpr
+ 75U, // DUPv8i8lane
+ 0U, // EONWrr
+ 33U, // EONWrs
+ 0U, // EONXrr
+ 33U, // EONXrs
+ 49U, // EORWri
+ 0U, // EORWrr
+ 33U, // EORWrs
+ 57U, // EORXri
+ 0U, // EORXrr
+ 33U, // EORXrs
+ 1033U, // EORv16i8
+ 1801U, // EORv8i8
0U, // ERET
- 249858U, // EXTRwwwi
- 249858U, // EXTRxxxi
- 4627U, // EXTvvvi_16b
- 5139U, // EXTvvvi_8b
+ 18689U, // EXTRWrri
+ 18689U, // EXTRXrri
+ 2569U, // EXTv16i8
+ 2825U, // EXTv8i8
0U, // F128CSEL
- 2U, // FABDddd
- 2U, // FABDsss
- 1042U, // FABDvvv_2D
- 2579U, // FABDvvv_2S
- 1554U, // FABDvvv_4S
- 0U, // FABS2d
- 0U, // FABS2s
- 1U, // FABS4s
- 1U, // FABSdd
- 1U, // FABSss
- 2U, // FACGEddd
- 2U, // FACGEsss
- 1042U, // FACGEvvv_2D
- 2579U, // FACGEvvv_2S
- 1554U, // FACGEvvv_4S
- 2U, // FACGTddd
- 2U, // FACGTsss
- 1042U, // FACGTvvv_2D
- 2579U, // FACGTvvv_2S
- 1554U, // FACGTvvv_4S
- 1042U, // FADDP_2D
- 2579U, // FADDP_2S
- 1554U, // FADDP_4S
- 0U, // FADDPvv_D_2D
- 0U, // FADDPvv_S_2S
- 2U, // FADDddd
- 2U, // FADDsss
- 1042U, // FADDvvv_2D
- 2579U, // FADDvvv_2S
- 1554U, // FADDvvv_4S
- 233474U, // FCCMPEdd
- 233474U, // FCCMPEss
- 233474U, // FCCMPdd
- 233474U, // FCCMPss
- 186U, // FCMEQZddi
- 186U, // FCMEQZssi
- 2U, // FCMEQddd
- 2U, // FCMEQsss
- 186U, // FCMEQvvi_2D
- 187U, // FCMEQvvi_2S
- 186U, // FCMEQvvi_4S
- 1042U, // FCMEQvvv_2D
- 2579U, // FCMEQvvv_2S
- 1554U, // FCMEQvvv_4S
- 186U, // FCMGEZddi
- 186U, // FCMGEZssi
- 2U, // FCMGEddd
- 2U, // FCMGEsss
- 186U, // FCMGEvvi_2D
- 187U, // FCMGEvvi_2S
- 186U, // FCMGEvvi_4S
- 1042U, // FCMGEvvv_2D
- 2579U, // FCMGEvvv_2S
- 1554U, // FCMGEvvv_4S
- 186U, // FCMGTZddi
- 186U, // FCMGTZssi
- 2U, // FCMGTddd
- 2U, // FCMGTsss
- 186U, // FCMGTvvi_2D
- 187U, // FCMGTvvi_2S
- 186U, // FCMGTvvi_4S
- 1042U, // FCMGTvvv_2D
- 2579U, // FCMGTvvv_2S
- 1554U, // FCMGTvvv_4S
- 186U, // FCMLEZddi
- 186U, // FCMLEZssi
- 186U, // FCMLEvvi_2D
- 187U, // FCMLEvvi_2S
- 186U, // FCMLEvvi_4S
- 186U, // FCMLTZddi
- 186U, // FCMLTZssi
- 186U, // FCMLTvvi_2D
- 187U, // FCMLTvvi_2S
- 186U, // FCMLTvvi_4S
- 1U, // FCMPdd_quiet
- 1U, // FCMPdd_sig
- 0U, // FCMPdi_quiet
- 0U, // FCMPdi_sig
- 0U, // FCMPsi_quiet
- 0U, // FCMPsi_sig
- 1U, // FCMPss_quiet
- 1U, // FCMPss_sig
- 233474U, // FCSELdddc
- 233474U, // FCSELsssc
- 0U, // FCVTAS_2d
- 0U, // FCVTAS_2s
- 1U, // FCVTAS_4s
- 1U, // FCVTASdd
- 1U, // FCVTASss
- 1U, // FCVTASwd
- 1U, // FCVTASws
- 1U, // FCVTASxd
- 1U, // FCVTASxs
- 0U, // FCVTAU_2d
- 0U, // FCVTAU_2s
- 1U, // FCVTAU_4s
- 1U, // FCVTAUdd
- 1U, // FCVTAUss
- 1U, // FCVTAUwd
- 1U, // FCVTAUws
- 1U, // FCVTAUxd
- 1U, // FCVTAUxs
- 0U, // FCVTL2s2d
- 0U, // FCVTL4h4s
- 1U, // FCVTL4s2d
- 1U, // FCVTL8h4s
- 0U, // FCVTMS_2d
- 0U, // FCVTMS_2s
- 1U, // FCVTMS_4s
- 1U, // FCVTMSdd
- 1U, // FCVTMSss
- 1U, // FCVTMSwd
- 1U, // FCVTMSws
- 1U, // FCVTMSxd
- 1U, // FCVTMSxs
- 0U, // FCVTMU_2d
- 0U, // FCVTMU_2s
- 1U, // FCVTMU_4s
- 1U, // FCVTMUdd
- 1U, // FCVTMUss
- 1U, // FCVTMUwd
- 1U, // FCVTMUws
- 1U, // FCVTMUxd
- 1U, // FCVTMUxs
- 0U, // FCVTN2d2s
- 0U, // FCVTN2d4s
- 1U, // FCVTN4s4h
- 1U, // FCVTN4s8h
- 0U, // FCVTNS_2d
- 0U, // FCVTNS_2s
- 1U, // FCVTNS_4s
- 1U, // FCVTNSdd
- 1U, // FCVTNSss
- 1U, // FCVTNSwd
- 1U, // FCVTNSws
- 1U, // FCVTNSxd
- 1U, // FCVTNSxs
- 0U, // FCVTNU_2d
- 0U, // FCVTNU_2s
- 1U, // FCVTNU_4s
- 1U, // FCVTNUdd
- 1U, // FCVTNUss
- 1U, // FCVTNUwd
- 1U, // FCVTNUws
- 1U, // FCVTNUxd
- 1U, // FCVTNUxs
- 0U, // FCVTPS_2d
- 0U, // FCVTPS_2s
- 1U, // FCVTPS_4s
- 1U, // FCVTPSdd
- 1U, // FCVTPSss
- 1U, // FCVTPSwd
- 1U, // FCVTPSws
- 1U, // FCVTPSxd
- 1U, // FCVTPSxs
- 0U, // FCVTPU_2d
- 0U, // FCVTPU_2s
- 1U, // FCVTPU_4s
- 1U, // FCVTPUdd
- 1U, // FCVTPUss
- 1U, // FCVTPUwd
- 1U, // FCVTPUws
- 1U, // FCVTPUxd
- 1U, // FCVTPUxs
- 1U, // FCVTXN
- 0U, // FCVTXN2d2s
- 0U, // FCVTXN2d4s
- 0U, // FCVTZS_2d
- 0U, // FCVTZS_2s
- 1U, // FCVTZS_4s
- 2U, // FCVTZS_Nddi
- 2U, // FCVTZS_Nssi
- 1U, // FCVTZSdd
- 1U, // FCVTZSss
- 1U, // FCVTZSwd
- 194U, // FCVTZSwdi
- 1U, // FCVTZSws
- 194U, // FCVTZSwsi
- 1U, // FCVTZSxd
- 194U, // FCVTZSxdi
- 1U, // FCVTZSxs
- 194U, // FCVTZSxsi
- 0U, // FCVTZU_2d
- 0U, // FCVTZU_2s
- 1U, // FCVTZU_4s
- 2U, // FCVTZU_Nddi
- 2U, // FCVTZU_Nssi
- 1U, // FCVTZUdd
- 1U, // FCVTZUss
- 1U, // FCVTZUwd
- 194U, // FCVTZUwdi
- 1U, // FCVTZUws
- 194U, // FCVTZUwsi
- 1U, // FCVTZUxd
- 194U, // FCVTZUxdi
- 1U, // FCVTZUxs
- 194U, // FCVTZUxsi
- 1U, // FCVTdh
- 1U, // FCVTds
- 1U, // FCVThd
- 1U, // FCVThs
- 1U, // FCVTsd
- 1U, // FCVTsh
- 2U, // FDIVddd
- 2U, // FDIVsss
- 1042U, // FDIVvvv_2D
- 2579U, // FDIVvvv_2S
- 1554U, // FDIVvvv_4S
- 249858U, // FMADDdddd
- 249858U, // FMADDssss
- 0U, // FMAXNMPvv_D_2D
- 0U, // FMAXNMPvv_S_2S
- 1042U, // FMAXNMPvvv_2D
- 2579U, // FMAXNMPvvv_2S
- 1554U, // FMAXNMPvvv_4S
- 1U, // FMAXNMV_1s4s
- 2U, // FMAXNMddd
- 2U, // FMAXNMsss
- 1042U, // FMAXNMvvv_2D
- 2579U, // FMAXNMvvv_2S
- 1554U, // FMAXNMvvv_4S
- 0U, // FMAXPvv_D_2D
- 0U, // FMAXPvv_S_2S
- 1042U, // FMAXPvvv_2D
- 2579U, // FMAXPvvv_2S
- 1554U, // FMAXPvvv_4S
- 1U, // FMAXV_1s4s
- 2U, // FMAXddd
- 2U, // FMAXsss
- 1042U, // FMAXvvv_2D
- 2579U, // FMAXvvv_2S
- 1554U, // FMAXvvv_4S
- 0U, // FMINNMPvv_D_2D
- 0U, // FMINNMPvv_S_2S
- 1042U, // FMINNMPvvv_2D
- 2579U, // FMINNMPvvv_2S
- 1554U, // FMINNMPvvv_4S
- 1U, // FMINNMV_1s4s
- 2U, // FMINNMddd
- 2U, // FMINNMsss
- 1042U, // FMINNMvvv_2D
- 2579U, // FMINNMvvv_2S
- 1554U, // FMINNMvvv_4S
- 0U, // FMINPvv_D_2D
- 0U, // FMINPvv_S_2S
- 1042U, // FMINPvvv_2D
- 2579U, // FMINPvvv_2S
- 1554U, // FMINPvvv_4S
- 1U, // FMINV_1s4s
- 2U, // FMINddd
- 2U, // FMINsss
- 1042U, // FMINvvv_2D
- 2579U, // FMINvvv_2S
- 1554U, // FMINvvv_4S
- 267786U, // FMLAddv_2D
- 268298U, // FMLAssv_4S
- 267786U, // FMLAvve_2d2d
- 268299U, // FMLAvve_2s4s
- 268298U, // FMLAvve_4s4s
- 1034U, // FMLAvvv_2D
- 2571U, // FMLAvvv_2S
- 1546U, // FMLAvvv_4S
- 267786U, // FMLSddv_2D
- 268298U, // FMLSssv_4S
- 267786U, // FMLSvve_2d2d
- 268299U, // FMLSvve_2s4s
- 268298U, // FMLSvve_4s4s
- 1034U, // FMLSvvv_2D
- 2571U, // FMLSvvv_2S
- 1546U, // FMLSvvv_4S
- 1U, // FMOVdd
- 0U, // FMOVdi
- 1U, // FMOVdx
- 0U, // FMOVsi
- 1U, // FMOVss
- 1U, // FMOVsw
- 0U, // FMOVvi_2D
- 0U, // FMOVvi_2S
- 0U, // FMOVvi_4S
- 0U, // FMOVvx
- 1U, // FMOVws
- 1U, // FMOVxd
- 204U, // FMOVxv
- 249858U, // FMSUBdddd
- 249858U, // FMSUBssss
- 2U, // FMULXddd
- 284178U, // FMULXddv_2D
- 2U, // FMULXsss
- 284690U, // FMULXssv_4S
- 284178U, // FMULXve_2d2d
- 284691U, // FMULXve_2s4s
- 284690U, // FMULXve_4s4s
- 1042U, // FMULXvvv_2D
- 2579U, // FMULXvvv_2S
- 1554U, // FMULXvvv_4S
- 2U, // FMULddd
- 284178U, // FMULddv_2D
- 2U, // FMULsss
- 284690U, // FMULssv_4S
- 284178U, // FMULve_2d2d
- 284691U, // FMULve_2s4s
- 284690U, // FMULve_4s4s
- 1042U, // FMULvvv_2D
- 2579U, // FMULvvv_2S
- 1554U, // FMULvvv_4S
- 0U, // FNEG2d
- 0U, // FNEG2s
- 1U, // FNEG4s
- 1U, // FNEGdd
- 1U, // FNEGss
- 249858U, // FNMADDdddd
- 249858U, // FNMADDssss
- 249858U, // FNMSUBdddd
- 249858U, // FNMSUBssss
- 2U, // FNMULddd
- 2U, // FNMULsss
- 0U, // FRECPE_2d
- 0U, // FRECPE_2s
- 1U, // FRECPE_4s
- 1U, // FRECPEdd
- 1U, // FRECPEss
- 2U, // FRECPSddd
- 2U, // FRECPSsss
- 1042U, // FRECPSvvv_2D
- 2579U, // FRECPSvvv_2S
- 1554U, // FRECPSvvv_4S
- 1U, // FRECPXdd
- 1U, // FRECPXss
- 0U, // FRINTA_2d
- 0U, // FRINTA_2s
- 1U, // FRINTA_4s
- 1U, // FRINTAdd
- 1U, // FRINTAss
- 0U, // FRINTI_2d
- 0U, // FRINTI_2s
- 1U, // FRINTI_4s
- 1U, // FRINTIdd
- 1U, // FRINTIss
- 0U, // FRINTM_2d
- 0U, // FRINTM_2s
- 1U, // FRINTM_4s
- 1U, // FRINTMdd
- 1U, // FRINTMss
- 0U, // FRINTN_2d
- 0U, // FRINTN_2s
- 1U, // FRINTN_4s
- 1U, // FRINTNdd
- 1U, // FRINTNss
- 0U, // FRINTP_2d
- 0U, // FRINTP_2s
- 1U, // FRINTP_4s
- 1U, // FRINTPdd
- 1U, // FRINTPss
- 0U, // FRINTX_2d
- 0U, // FRINTX_2s
- 1U, // FRINTX_4s
- 1U, // FRINTXdd
- 1U, // FRINTXss
- 0U, // FRINTZ_2d
- 0U, // FRINTZ_2s
- 1U, // FRINTZ_4s
- 1U, // FRINTZdd
- 1U, // FRINTZss
- 0U, // FRSQRTE_2d
- 0U, // FRSQRTE_2s
- 1U, // FRSQRTE_4s
- 1U, // FRSQRTEdd
- 1U, // FRSQRTEss
- 2U, // FRSQRTSddd
- 2U, // FRSQRTSsss
- 1042U, // FRSQRTSvvv_2D
- 2579U, // FRSQRTSvvv_2S
- 1554U, // FRSQRTSvvv_4S
- 0U, // FSQRT_2d
- 0U, // FSQRT_2s
- 1U, // FSQRT_4s
- 1U, // FSQRTdd
- 1U, // FSQRTss
- 2U, // FSUBddd
- 2U, // FSUBsss
- 1042U, // FSUBvvv_2D
- 2579U, // FSUBvvv_2S
- 1554U, // FSUBvvv_4S
- 0U, // HINTi
- 0U, // HLTi
- 0U, // HVCi
- 0U, // ICi
- 1U, // ICix
- 212U, // INSELb
- 5U, // INSELd
- 213U, // INSELh
- 213U, // INSELs
- 1U, // INSbw
- 5U, // INSdx
- 1U, // INShw
- 1U, // INSsw
- 0U, // ISBi
- 0U, // LD1LN_B
- 0U, // LD1LN_D
- 0U, // LD1LN_H
- 0U, // LD1LN_S
- 0U, // LD1LN_WB_B_fixed
- 0U, // LD1LN_WB_B_register
- 0U, // LD1LN_WB_D_fixed
- 0U, // LD1LN_WB_D_register
- 0U, // LD1LN_WB_H_fixed
- 0U, // LD1LN_WB_H_register
- 0U, // LD1LN_WB_S_fixed
- 0U, // LD1LN_WB_S_register
- 0U, // LD1R_16B
- 0U, // LD1R_1D
- 0U, // LD1R_2D
- 0U, // LD1R_2S
- 0U, // LD1R_4H
- 0U, // LD1R_4S
- 0U, // LD1R_8B
- 0U, // LD1R_8H
- 0U, // LD1R_WB_16B_fixed
- 0U, // LD1R_WB_16B_register
- 0U, // LD1R_WB_1D_fixed
- 0U, // LD1R_WB_1D_register
- 0U, // LD1R_WB_2D_fixed
- 0U, // LD1R_WB_2D_register
- 0U, // LD1R_WB_2S_fixed
- 0U, // LD1R_WB_2S_register
- 0U, // LD1R_WB_4H_fixed
- 0U, // LD1R_WB_4H_register
- 0U, // LD1R_WB_4S_fixed
- 0U, // LD1R_WB_4S_register
- 0U, // LD1R_WB_8B_fixed
- 0U, // LD1R_WB_8B_register
- 0U, // LD1R_WB_8H_fixed
- 0U, // LD1R_WB_8H_register
- 0U, // LD1WB_16B_fixed
- 0U, // LD1WB_16B_register
- 0U, // LD1WB_1D_fixed
- 0U, // LD1WB_1D_register
- 0U, // LD1WB_2D_fixed
- 0U, // LD1WB_2D_register
- 0U, // LD1WB_2S_fixed
- 0U, // LD1WB_2S_register
- 0U, // LD1WB_4H_fixed
- 0U, // LD1WB_4H_register
- 0U, // LD1WB_4S_fixed
- 0U, // LD1WB_4S_register
- 0U, // LD1WB_8B_fixed
- 0U, // LD1WB_8B_register
- 0U, // LD1WB_8H_fixed
- 0U, // LD1WB_8H_register
- 0U, // LD1_16B
- 0U, // LD1_1D
- 0U, // LD1_2D
- 0U, // LD1_2S
- 0U, // LD1_4H
- 0U, // LD1_4S
- 0U, // LD1_8B
- 0U, // LD1_8H
- 0U, // LD1x2WB_16B_fixed
- 0U, // LD1x2WB_16B_register
- 0U, // LD1x2WB_1D_fixed
- 0U, // LD1x2WB_1D_register
- 0U, // LD1x2WB_2D_fixed
- 0U, // LD1x2WB_2D_register
- 0U, // LD1x2WB_2S_fixed
- 0U, // LD1x2WB_2S_register
- 0U, // LD1x2WB_4H_fixed
- 0U, // LD1x2WB_4H_register
- 0U, // LD1x2WB_4S_fixed
- 0U, // LD1x2WB_4S_register
- 0U, // LD1x2WB_8B_fixed
- 0U, // LD1x2WB_8B_register
- 0U, // LD1x2WB_8H_fixed
- 0U, // LD1x2WB_8H_register
- 0U, // LD1x2_16B
- 0U, // LD1x2_1D
- 0U, // LD1x2_2D
- 0U, // LD1x2_2S
- 0U, // LD1x2_4H
- 0U, // LD1x2_4S
- 0U, // LD1x2_8B
- 0U, // LD1x2_8H
- 0U, // LD1x3WB_16B_fixed
- 0U, // LD1x3WB_16B_register
- 0U, // LD1x3WB_1D_fixed
- 0U, // LD1x3WB_1D_register
- 0U, // LD1x3WB_2D_fixed
- 0U, // LD1x3WB_2D_register
- 0U, // LD1x3WB_2S_fixed
- 0U, // LD1x3WB_2S_register
- 0U, // LD1x3WB_4H_fixed
- 0U, // LD1x3WB_4H_register
- 0U, // LD1x3WB_4S_fixed
- 0U, // LD1x3WB_4S_register
- 0U, // LD1x3WB_8B_fixed
- 0U, // LD1x3WB_8B_register
- 0U, // LD1x3WB_8H_fixed
- 0U, // LD1x3WB_8H_register
- 0U, // LD1x3_16B
- 0U, // LD1x3_1D
- 0U, // LD1x3_2D
- 0U, // LD1x3_2S
- 0U, // LD1x3_4H
- 0U, // LD1x3_4S
- 0U, // LD1x3_8B
- 0U, // LD1x3_8H
- 0U, // LD1x4WB_16B_fixed
- 0U, // LD1x4WB_16B_register
- 0U, // LD1x4WB_1D_fixed
- 0U, // LD1x4WB_1D_register
- 0U, // LD1x4WB_2D_fixed
- 0U, // LD1x4WB_2D_register
- 0U, // LD1x4WB_2S_fixed
- 0U, // LD1x4WB_2S_register
- 0U, // LD1x4WB_4H_fixed
- 0U, // LD1x4WB_4H_register
- 0U, // LD1x4WB_4S_fixed
- 0U, // LD1x4WB_4S_register
- 0U, // LD1x4WB_8B_fixed
- 0U, // LD1x4WB_8B_register
- 0U, // LD1x4WB_8H_fixed
- 0U, // LD1x4WB_8H_register
- 0U, // LD1x4_16B
- 0U, // LD1x4_1D
- 0U, // LD1x4_2D
- 0U, // LD1x4_2S
- 0U, // LD1x4_4H
- 0U, // LD1x4_4S
- 0U, // LD1x4_8B
- 0U, // LD1x4_8H
- 0U, // LD2LN_B
- 0U, // LD2LN_D
- 0U, // LD2LN_H
- 0U, // LD2LN_S
- 0U, // LD2LN_WB_B_fixed
- 0U, // LD2LN_WB_B_register
- 0U, // LD2LN_WB_D_fixed
- 0U, // LD2LN_WB_D_register
- 0U, // LD2LN_WB_H_fixed
- 0U, // LD2LN_WB_H_register
- 0U, // LD2LN_WB_S_fixed
- 0U, // LD2LN_WB_S_register
- 0U, // LD2R_16B
- 0U, // LD2R_1D
- 0U, // LD2R_2D
- 0U, // LD2R_2S
- 0U, // LD2R_4H
- 0U, // LD2R_4S
- 0U, // LD2R_8B
- 0U, // LD2R_8H
- 0U, // LD2R_WB_16B_fixed
- 0U, // LD2R_WB_16B_register
- 0U, // LD2R_WB_1D_fixed
- 0U, // LD2R_WB_1D_register
- 0U, // LD2R_WB_2D_fixed
- 0U, // LD2R_WB_2D_register
- 0U, // LD2R_WB_2S_fixed
- 0U, // LD2R_WB_2S_register
- 0U, // LD2R_WB_4H_fixed
- 0U, // LD2R_WB_4H_register
- 0U, // LD2R_WB_4S_fixed
- 0U, // LD2R_WB_4S_register
- 0U, // LD2R_WB_8B_fixed
- 0U, // LD2R_WB_8B_register
- 0U, // LD2R_WB_8H_fixed
- 0U, // LD2R_WB_8H_register
- 0U, // LD2WB_16B_fixed
- 0U, // LD2WB_16B_register
- 0U, // LD2WB_2D_fixed
- 0U, // LD2WB_2D_register
- 0U, // LD2WB_2S_fixed
- 0U, // LD2WB_2S_register
- 0U, // LD2WB_4H_fixed
- 0U, // LD2WB_4H_register
- 0U, // LD2WB_4S_fixed
- 0U, // LD2WB_4S_register
- 0U, // LD2WB_8B_fixed
- 0U, // LD2WB_8B_register
- 0U, // LD2WB_8H_fixed
- 0U, // LD2WB_8H_register
- 0U, // LD2_16B
- 0U, // LD2_2D
- 0U, // LD2_2S
- 0U, // LD2_4H
- 0U, // LD2_4S
- 0U, // LD2_8B
- 0U, // LD2_8H
- 0U, // LD3LN_B
- 0U, // LD3LN_D
- 0U, // LD3LN_H
- 0U, // LD3LN_S
- 0U, // LD3LN_WB_B_fixed
- 0U, // LD3LN_WB_B_register
- 0U, // LD3LN_WB_D_fixed
- 0U, // LD3LN_WB_D_register
- 0U, // LD3LN_WB_H_fixed
- 0U, // LD3LN_WB_H_register
- 0U, // LD3LN_WB_S_fixed
- 0U, // LD3LN_WB_S_register
- 0U, // LD3R_16B
- 0U, // LD3R_1D
- 0U, // LD3R_2D
- 0U, // LD3R_2S
- 0U, // LD3R_4H
- 0U, // LD3R_4S
- 0U, // LD3R_8B
- 0U, // LD3R_8H
- 0U, // LD3R_WB_16B_fixed
- 0U, // LD3R_WB_16B_register
- 0U, // LD3R_WB_1D_fixed
- 0U, // LD3R_WB_1D_register
- 0U, // LD3R_WB_2D_fixed
- 0U, // LD3R_WB_2D_register
- 0U, // LD3R_WB_2S_fixed
- 0U, // LD3R_WB_2S_register
- 0U, // LD3R_WB_4H_fixed
- 0U, // LD3R_WB_4H_register
- 0U, // LD3R_WB_4S_fixed
- 0U, // LD3R_WB_4S_register
- 0U, // LD3R_WB_8B_fixed
- 0U, // LD3R_WB_8B_register
- 0U, // LD3R_WB_8H_fixed
- 0U, // LD3R_WB_8H_register
- 0U, // LD3WB_16B_fixed
- 0U, // LD3WB_16B_register
- 0U, // LD3WB_2D_fixed
- 0U, // LD3WB_2D_register
- 0U, // LD3WB_2S_fixed
- 0U, // LD3WB_2S_register
- 0U, // LD3WB_4H_fixed
- 0U, // LD3WB_4H_register
- 0U, // LD3WB_4S_fixed
- 0U, // LD3WB_4S_register
- 0U, // LD3WB_8B_fixed
- 0U, // LD3WB_8B_register
- 0U, // LD3WB_8H_fixed
- 0U, // LD3WB_8H_register
- 0U, // LD3_16B
- 0U, // LD3_2D
- 0U, // LD3_2S
- 0U, // LD3_4H
- 0U, // LD3_4S
- 0U, // LD3_8B
- 0U, // LD3_8H
- 0U, // LD4LN_B
- 0U, // LD4LN_D
- 0U, // LD4LN_H
- 0U, // LD4LN_S
- 0U, // LD4LN_WB_B_fixed
- 0U, // LD4LN_WB_B_register
- 0U, // LD4LN_WB_D_fixed
- 0U, // LD4LN_WB_D_register
- 0U, // LD4LN_WB_H_fixed
- 0U, // LD4LN_WB_H_register
- 0U, // LD4LN_WB_S_fixed
- 0U, // LD4LN_WB_S_register
- 0U, // LD4R_16B
- 0U, // LD4R_1D
- 0U, // LD4R_2D
- 0U, // LD4R_2S
- 0U, // LD4R_4H
- 0U, // LD4R_4S
- 0U, // LD4R_8B
- 0U, // LD4R_8H
- 0U, // LD4R_WB_16B_fixed
- 0U, // LD4R_WB_16B_register
- 0U, // LD4R_WB_1D_fixed
- 0U, // LD4R_WB_1D_register
- 0U, // LD4R_WB_2D_fixed
- 0U, // LD4R_WB_2D_register
- 0U, // LD4R_WB_2S_fixed
- 0U, // LD4R_WB_2S_register
- 0U, // LD4R_WB_4H_fixed
- 0U, // LD4R_WB_4H_register
- 0U, // LD4R_WB_4S_fixed
- 0U, // LD4R_WB_4S_register
- 0U, // LD4R_WB_8B_fixed
- 0U, // LD4R_WB_8B_register
- 0U, // LD4R_WB_8H_fixed
- 0U, // LD4R_WB_8H_register
- 0U, // LD4WB_16B_fixed
- 0U, // LD4WB_16B_register
- 0U, // LD4WB_2D_fixed
- 0U, // LD4WB_2D_register
- 0U, // LD4WB_2S_fixed
- 0U, // LD4WB_2S_register
- 0U, // LD4WB_4H_fixed
- 0U, // LD4WB_4H_register
- 0U, // LD4WB_4S_fixed
- 0U, // LD4WB_4S_register
- 0U, // LD4WB_8B_fixed
- 0U, // LD4WB_8B_register
- 0U, // LD4WB_8H_fixed
- 0U, // LD4WB_8H_register
- 0U, // LD4_16B
- 0U, // LD4_2D
- 0U, // LD4_2S
- 0U, // LD4_4H
- 0U, // LD4_4S
- 0U, // LD4_8B
- 0U, // LD4_8H
- 6U, // LDAR_byte
- 6U, // LDAR_dword
- 6U, // LDAR_hword
- 6U, // LDAR_word
- 6662U, // LDAXP_dword
- 6662U, // LDAXP_word
- 6U, // LDAXR_byte
- 6U, // LDAXR_dword
- 6U, // LDAXR_hword
- 6U, // LDAXR_word
- 299014U, // LDPSWx
- 318542U, // LDPSWx_PostInd
- 1364046U, // LDPSWx_PreInd
- 218U, // LDRSBw
- 6U, // LDRSBw_PostInd
- 226U, // LDRSBw_PreInd
- 234U, // LDRSBw_U
- 331778U, // LDRSBw_Wm_RegOffset
- 348162U, // LDRSBw_Xm_RegOffset
- 218U, // LDRSBx
- 6U, // LDRSBx_PostInd
- 226U, // LDRSBx_PreInd
- 234U, // LDRSBx_U
- 331778U, // LDRSBx_Wm_RegOffset
- 348162U, // LDRSBx_Xm_RegOffset
- 242U, // LDRSHw
- 6U, // LDRSHw_PostInd
- 226U, // LDRSHw_PreInd
- 234U, // LDRSHw_U
- 364546U, // LDRSHw_Wm_RegOffset
- 380930U, // LDRSHw_Xm_RegOffset
- 242U, // LDRSHx
- 6U, // LDRSHx_PostInd
- 226U, // LDRSHx_PreInd
- 234U, // LDRSHx_U
- 364546U, // LDRSHx_Wm_RegOffset
- 380930U, // LDRSHx_Xm_RegOffset
- 250U, // LDRSWx
- 6U, // LDRSWx_PostInd
- 226U, // LDRSWx_PreInd
- 397314U, // LDRSWx_Wm_RegOffset
- 413698U, // LDRSWx_Xm_RegOffset
- 0U, // LDRSWx_lit
- 0U, // LDRd_lit
- 0U, // LDRq_lit
- 0U, // LDRs_lit
- 0U, // LDRw_lit
- 0U, // LDRx_lit
- 234U, // LDTRSBw
- 234U, // LDTRSBx
- 234U, // LDTRSHw
- 234U, // LDTRSHx
- 234U, // LDTRSWx
- 234U, // LDURSWx
- 6662U, // LDXP_dword
- 6662U, // LDXP_word
- 6U, // LDXR_byte
- 6U, // LDXR_dword
- 6U, // LDXR_hword
- 6U, // LDXR_word
- 242U, // LS16_LDR
- 234U, // LS16_LDUR
- 6U, // LS16_PostInd_LDR
- 6U, // LS16_PostInd_STR
- 226U, // LS16_PreInd_LDR
- 226U, // LS16_PreInd_STR
- 242U, // LS16_STR
- 234U, // LS16_STUR
- 234U, // LS16_UnPriv_LDR
- 234U, // LS16_UnPriv_STR
- 364546U, // LS16_Wm_RegOffset_LDR
- 364546U, // LS16_Wm_RegOffset_STR
- 380930U, // LS16_Xm_RegOffset_LDR
- 380930U, // LS16_Xm_RegOffset_STR
- 250U, // LS32_LDR
- 234U, // LS32_LDUR
- 6U, // LS32_PostInd_LDR
- 6U, // LS32_PostInd_STR
- 226U, // LS32_PreInd_LDR
- 226U, // LS32_PreInd_STR
- 250U, // LS32_STR
- 234U, // LS32_STUR
- 234U, // LS32_UnPriv_LDR
- 234U, // LS32_UnPriv_STR
- 397314U, // LS32_Wm_RegOffset_LDR
- 397314U, // LS32_Wm_RegOffset_STR
- 413698U, // LS32_Xm_RegOffset_LDR
- 413698U, // LS32_Xm_RegOffset_STR
- 258U, // LS64_LDR
- 234U, // LS64_LDUR
- 6U, // LS64_PostInd_LDR
- 6U, // LS64_PostInd_STR
- 226U, // LS64_PreInd_LDR
- 226U, // LS64_PreInd_STR
- 258U, // LS64_STR
- 234U, // LS64_STUR
- 234U, // LS64_UnPriv_LDR
- 234U, // LS64_UnPriv_STR
- 430082U, // LS64_Wm_RegOffset_LDR
- 430082U, // LS64_Wm_RegOffset_STR
- 446466U, // LS64_Xm_RegOffset_LDR
- 446466U, // LS64_Xm_RegOffset_STR
- 218U, // LS8_LDR
- 234U, // LS8_LDUR
- 6U, // LS8_PostInd_LDR
- 6U, // LS8_PostInd_STR
- 226U, // LS8_PreInd_LDR
- 226U, // LS8_PreInd_STR
- 218U, // LS8_STR
- 234U, // LS8_STUR
- 234U, // LS8_UnPriv_LDR
- 234U, // LS8_UnPriv_STR
- 331778U, // LS8_Wm_RegOffset_LDR
- 331778U, // LS8_Wm_RegOffset_STR
- 348162U, // LS8_Xm_RegOffset_LDR
- 348162U, // LS8_Xm_RegOffset_STR
- 266U, // LSFP128_LDR
- 234U, // LSFP128_LDUR
- 6U, // LSFP128_PostInd_LDR
- 6U, // LSFP128_PostInd_STR
- 226U, // LSFP128_PreInd_LDR
- 226U, // LSFP128_PreInd_STR
- 266U, // LSFP128_STR
- 234U, // LSFP128_STUR
- 462850U, // LSFP128_Wm_RegOffset_LDR
- 462850U, // LSFP128_Wm_RegOffset_STR
- 479234U, // LSFP128_Xm_RegOffset_LDR
- 479234U, // LSFP128_Xm_RegOffset_STR
- 242U, // LSFP16_LDR
- 234U, // LSFP16_LDUR
- 6U, // LSFP16_PostInd_LDR
- 6U, // LSFP16_PostInd_STR
- 226U, // LSFP16_PreInd_LDR
- 226U, // LSFP16_PreInd_STR
- 242U, // LSFP16_STR
- 234U, // LSFP16_STUR
- 364546U, // LSFP16_Wm_RegOffset_LDR
- 364546U, // LSFP16_Wm_RegOffset_STR
- 380930U, // LSFP16_Xm_RegOffset_LDR
- 380930U, // LSFP16_Xm_RegOffset_STR
- 250U, // LSFP32_LDR
- 234U, // LSFP32_LDUR
- 6U, // LSFP32_PostInd_LDR
- 6U, // LSFP32_PostInd_STR
- 226U, // LSFP32_PreInd_LDR
- 226U, // LSFP32_PreInd_STR
- 250U, // LSFP32_STR
- 234U, // LSFP32_STUR
- 397314U, // LSFP32_Wm_RegOffset_LDR
- 397314U, // LSFP32_Wm_RegOffset_STR
- 413698U, // LSFP32_Xm_RegOffset_LDR
- 413698U, // LSFP32_Xm_RegOffset_STR
- 258U, // LSFP64_LDR
- 234U, // LSFP64_LDUR
- 6U, // LSFP64_PostInd_LDR
- 6U, // LSFP64_PostInd_STR
- 226U, // LSFP64_PreInd_LDR
- 226U, // LSFP64_PreInd_STR
- 258U, // LSFP64_STR
- 234U, // LSFP64_STUR
- 430082U, // LSFP64_Wm_RegOffset_LDR
- 430082U, // LSFP64_Wm_RegOffset_STR
- 446466U, // LSFP64_Xm_RegOffset_LDR
- 446466U, // LSFP64_Xm_RegOffset_STR
- 218U, // LSFP8_LDR
- 234U, // LSFP8_LDUR
- 6U, // LSFP8_PostInd_LDR
- 6U, // LSFP8_PostInd_STR
- 226U, // LSFP8_PreInd_LDR
- 226U, // LSFP8_PreInd_STR
- 218U, // LSFP8_STR
- 234U, // LSFP8_STUR
- 331778U, // LSFP8_Wm_RegOffset_LDR
- 331778U, // LSFP8_Wm_RegOffset_STR
- 348162U, // LSFP8_Xm_RegOffset_LDR
- 348162U, // LSFP8_Xm_RegOffset_STR
- 495622U, // LSFPPair128_LDR
- 495622U, // LSFPPair128_NonTemp_LDR
- 495622U, // LSFPPair128_NonTemp_STR
- 515150U, // LSFPPair128_PostInd_LDR
- 515150U, // LSFPPair128_PostInd_STR
- 1560654U, // LSFPPair128_PreInd_LDR
- 1560654U, // LSFPPair128_PreInd_STR
- 495622U, // LSFPPair128_STR
- 299014U, // LSFPPair32_LDR
- 299014U, // LSFPPair32_NonTemp_LDR
- 299014U, // LSFPPair32_NonTemp_STR
- 318542U, // LSFPPair32_PostInd_LDR
- 318542U, // LSFPPair32_PostInd_STR
- 1364046U, // LSFPPair32_PreInd_LDR
- 1364046U, // LSFPPair32_PreInd_STR
- 299014U, // LSFPPair32_STR
- 528390U, // LSFPPair64_LDR
- 528390U, // LSFPPair64_NonTemp_LDR
- 528390U, // LSFPPair64_NonTemp_STR
- 547918U, // LSFPPair64_PostInd_LDR
- 547918U, // LSFPPair64_PostInd_STR
- 1593422U, // LSFPPair64_PreInd_LDR
- 1593422U, // LSFPPair64_PreInd_STR
- 528390U, // LSFPPair64_STR
- 2U, // LSLVwww
- 2U, // LSLVxxx
- 2U, // LSLwwi
- 2U, // LSLxxi
- 299014U, // LSPair32_LDR
- 299014U, // LSPair32_NonTemp_LDR
- 299014U, // LSPair32_NonTemp_STR
- 318542U, // LSPair32_PostInd_LDR
- 318542U, // LSPair32_PostInd_STR
- 1364046U, // LSPair32_PreInd_LDR
- 1364046U, // LSPair32_PreInd_STR
- 299014U, // LSPair32_STR
- 528390U, // LSPair64_LDR
- 528390U, // LSPair64_NonTemp_LDR
- 528390U, // LSPair64_NonTemp_STR
- 547918U, // LSPair64_PostInd_LDR
- 547918U, // LSPair64_PostInd_STR
- 1593422U, // LSPair64_PreInd_LDR
- 1593422U, // LSPair64_PreInd_STR
- 528390U, // LSPair64_STR
- 2U, // LSRVwww
- 2U, // LSRVxxx
- 2U, // LSRwwi
- 2U, // LSRxxi
- 249858U, // MADDwwww
- 249858U, // MADDxxxx
- 268299U, // MLAvve_2s4s
- 269835U, // MLAvve_4h8h
- 268298U, // MLAvve_4s4s
- 269834U, // MLAvve_8h8h
- 2059U, // MLAvvv_16B
- 2571U, // MLAvvv_2S
- 3083U, // MLAvvv_4H
- 1546U, // MLAvvv_4S
- 3595U, // MLAvvv_8B
- 522U, // MLAvvv_8H
- 268299U, // MLSvve_2s4s
- 269835U, // MLSvve_4h8h
- 268298U, // MLSvve_4s4s
- 269834U, // MLSvve_8h8h
- 2059U, // MLSvvv_16B
- 2571U, // MLSvvv_2S
- 3083U, // MLSvvv_4H
- 1546U, // MLSvvv_4S
- 3595U, // MLSvvv_8B
- 522U, // MLSvvv_8H
- 0U, // MOVIdi
- 1U, // MOVIvi_16B
- 0U, // MOVIvi_2D
- 1U, // MOVIvi_8B
- 6U, // MOVIvi_lsl_2S
- 7U, // MOVIvi_lsl_4H
- 6U, // MOVIvi_lsl_4S
- 7U, // MOVIvi_lsl_8H
- 7U, // MOVIvi_msl_2S
- 7U, // MOVIvi_msl_4S
- 0U, // MOVKwii
- 0U, // MOVKxii
- 0U, // MOVNwii
- 0U, // MOVNxii
- 0U, // MOVZwii
- 0U, // MOVZxii
- 0U, // MRSxi
- 0U, // MSRii
- 0U, // MSRix
- 249858U, // MSUBwwww
- 249858U, // MSUBxxxx
- 284691U, // MULve_2s4s
- 286227U, // MULve_4h8h
- 284690U, // MULve_4s4s
- 286226U, // MULve_8h8h
- 2067U, // MULvvv_16B
- 2579U, // MULvvv_2S
- 3091U, // MULvvv_4H
- 1554U, // MULvvv_4S
- 3603U, // MULvvv_8B
- 530U, // MULvvv_8H
- 6U, // MVNIvi_lsl_2S
- 7U, // MVNIvi_lsl_4H
- 6U, // MVNIvi_lsl_4S
- 7U, // MVNIvi_lsl_8H
- 7U, // MVNIvi_msl_2S
- 7U, // MVNIvi_msl_4S
- 90U, // MVNww_asr
- 98U, // MVNww_lsl
- 106U, // MVNww_lsr
- 274U, // MVNww_ror
- 90U, // MVNxx_asr
- 98U, // MVNxx_lsl
- 106U, // MVNxx_lsr
- 274U, // MVNxx_ror
- 0U, // NEG16b
- 0U, // NEG2d
- 0U, // NEG2s
- 0U, // NEG4h
- 1U, // NEG4s
- 1U, // NEG8b
- 1U, // NEG8h
- 1U, // NEGdd
- 0U, // NOT16b
- 1U, // NOT8b
- 2067U, // ORNvvv_16B
- 3603U, // ORNvvv_8B
- 4098U, // ORNwww_asr
- 20482U, // ORNwww_lsl
- 36866U, // ORNwww_lsr
- 184322U, // ORNwww_ror
- 4098U, // ORNxxx_asr
- 20482U, // ORNxxx_lsl
- 36866U, // ORNxxx_lsr
- 184322U, // ORNxxx_ror
- 4U, // ORRvi_lsl_2S
- 4U, // ORRvi_lsl_4H
- 4U, // ORRvi_lsl_4S
- 4U, // ORRvi_lsl_8H
- 2067U, // ORRvvv_16B
- 3603U, // ORRvvv_8B
- 42U, // ORRwwi
- 4098U, // ORRwww_asr
- 20482U, // ORRwww_lsl
- 36866U, // ORRwww_lsr
- 184322U, // ORRwww_ror
- 50U, // ORRxxi
- 4098U, // ORRxxx_asr
- 20482U, // ORRxxx_lsl
- 36866U, // ORRxxx_lsr
- 184322U, // ORRxxx_ror
- 0U, // PMULL2vvv_1q2d
- 2067U, // PMULL2vvv_8h16b
- 0U, // PMULLvvv_1q1d
- 3603U, // PMULLvvv_8h8b
- 2067U, // PMULvvv_16B
- 3603U, // PMULvvv_8B
- 258U, // PRFM
- 430082U, // PRFM_Wm_RegOffset
- 446466U, // PRFM_Xm_RegOffset
- 0U, // PRFM_lit
- 234U, // PRFUM
- 74U, // QRSHRUNvvi_16B
- 2U, // QRSHRUNvvi_2S
- 2U, // QRSHRUNvvi_4H
- 74U, // QRSHRUNvvi_4S
- 2U, // QRSHRUNvvi_8B
- 74U, // QRSHRUNvvi_8H
- 74U, // QSHRUNvvi_16B
- 2U, // QSHRUNvvi_2S
- 2U, // QSHRUNvvi_4H
- 74U, // QSHRUNvvi_4S
- 2U, // QSHRUNvvi_8B
- 74U, // QSHRUNvvi_8H
- 522U, // RADDHN2vvv_16b8h
- 1034U, // RADDHN2vvv_4s2d
- 1546U, // RADDHN2vvv_8h4s
- 1042U, // RADDHNvvv_2s2d
- 1554U, // RADDHNvvv_4h4s
- 530U, // RADDHNvvv_8b8h
- 0U, // RBIT16b
- 1U, // RBIT8b
- 1U, // RBITww
- 1U, // RBITxx
+ 1U, // FABD32
+ 1U, // FABD64
+ 1289U, // FABDv2f32
+ 265U, // FABDv2f64
+ 521U, // FABDv4f32
+ 0U, // FABSDr
+ 0U, // FABSSr
+ 0U, // FABSv2f32
+ 0U, // FABSv2f64
+ 0U, // FABSv4f32
+ 1U, // FACGE32
+ 1U, // FACGE64
+ 1289U, // FACGEv2f32
+ 265U, // FACGEv2f64
+ 521U, // FACGEv4f32
+ 1U, // FACGT32
+ 1U, // FACGT64
+ 1289U, // FACGTv2f32
+ 265U, // FACGTv2f64
+ 521U, // FACGTv4f32
+ 1U, // FADDDrr
+ 1289U, // FADDPv2f32
+ 265U, // FADDPv2f64
+ 0U, // FADDPv2i32p
+ 0U, // FADDPv2i64p
+ 521U, // FADDPv4f32
+ 1U, // FADDSrr
+ 1289U, // FADDv2f32
+ 265U, // FADDv2f64
+ 521U, // FADDv4f32
+ 10497U, // FCCMPDrr
+ 10497U, // FCCMPEDrr
+ 10497U, // FCCMPESrr
+ 10497U, // FCCMPSrr
+ 1U, // FCMEQ32
+ 1U, // FCMEQ64
+ 3U, // FCMEQv1i32rz
+ 3U, // FCMEQv1i64rz
+ 1289U, // FCMEQv2f32
+ 265U, // FCMEQv2f64
+ 3U, // FCMEQv2i32rz
+ 3U, // FCMEQv2i64rz
+ 521U, // FCMEQv4f32
+ 3U, // FCMEQv4i32rz
+ 1U, // FCMGE32
+ 1U, // FCMGE64
+ 3U, // FCMGEv1i32rz
+ 3U, // FCMGEv1i64rz
+ 1289U, // FCMGEv2f32
+ 265U, // FCMGEv2f64
+ 3U, // FCMGEv2i32rz
+ 3U, // FCMGEv2i64rz
+ 521U, // FCMGEv4f32
+ 3U, // FCMGEv4i32rz
+ 1U, // FCMGT32
+ 1U, // FCMGT64
+ 3U, // FCMGTv1i32rz
+ 3U, // FCMGTv1i64rz
+ 1289U, // FCMGTv2f32
+ 265U, // FCMGTv2f64
+ 3U, // FCMGTv2i32rz
+ 3U, // FCMGTv2i64rz
+ 521U, // FCMGTv4f32
+ 3U, // FCMGTv4i32rz
+ 3U, // FCMLEv1i32rz
+ 3U, // FCMLEv1i64rz
+ 3U, // FCMLEv2i32rz
+ 3U, // FCMLEv2i64rz
+ 3U, // FCMLEv4i32rz
+ 3U, // FCMLTv1i32rz
+ 3U, // FCMLTv1i64rz
+ 3U, // FCMLTv2i32rz
+ 3U, // FCMLTv2i64rz
+ 3U, // FCMLTv4i32rz
+ 0U, // FCMPDri
+ 0U, // FCMPDrr
+ 0U, // FCMPEDri
+ 0U, // FCMPEDrr
+ 0U, // FCMPESri
+ 0U, // FCMPESrr
+ 0U, // FCMPSri
+ 0U, // FCMPSrr
+ 10497U, // FCSELDrrr
+ 10497U, // FCSELSrrr
+ 0U, // FCVTASUWDr
+ 0U, // FCVTASUWSr
+ 0U, // FCVTASUXDr
+ 0U, // FCVTASUXSr
+ 0U, // FCVTASv1i32
+ 0U, // FCVTASv1i64
+ 0U, // FCVTASv2f32
+ 0U, // FCVTASv2f64
+ 0U, // FCVTASv4f32
+ 0U, // FCVTAUUWDr
+ 0U, // FCVTAUUWSr
+ 0U, // FCVTAUUXDr
+ 0U, // FCVTAUUXSr
+ 0U, // FCVTAUv1i32
+ 0U, // FCVTAUv1i64
+ 0U, // FCVTAUv2f32
+ 0U, // FCVTAUv2f64
+ 0U, // FCVTAUv4f32
+ 0U, // FCVTDHr
+ 0U, // FCVTDSr
+ 0U, // FCVTHDr
+ 0U, // FCVTHSr
+ 0U, // FCVTLv2i32
+ 0U, // FCVTLv4i16
+ 0U, // FCVTLv4i32
+ 0U, // FCVTLv8i16
+ 0U, // FCVTMSUWDr
+ 0U, // FCVTMSUWSr
+ 0U, // FCVTMSUXDr
+ 0U, // FCVTMSUXSr
+ 0U, // FCVTMSv1i32
+ 0U, // FCVTMSv1i64
+ 0U, // FCVTMSv2f32
+ 0U, // FCVTMSv2f64
+ 0U, // FCVTMSv4f32
+ 0U, // FCVTMUUWDr
+ 0U, // FCVTMUUWSr
+ 0U, // FCVTMUUXDr
+ 0U, // FCVTMUUXSr
+ 0U, // FCVTMUv1i32
+ 0U, // FCVTMUv1i64
+ 0U, // FCVTMUv2f32
+ 0U, // FCVTMUv2f64
+ 0U, // FCVTMUv4f32
+ 0U, // FCVTNSUWDr
+ 0U, // FCVTNSUWSr
+ 0U, // FCVTNSUXDr
+ 0U, // FCVTNSUXSr
+ 0U, // FCVTNSv1i32
+ 0U, // FCVTNSv1i64
+ 0U, // FCVTNSv2f32
+ 0U, // FCVTNSv2f64
+ 0U, // FCVTNSv4f32
+ 0U, // FCVTNUUWDr
+ 0U, // FCVTNUUWSr
+ 0U, // FCVTNUUXDr
+ 0U, // FCVTNUUXSr
+ 0U, // FCVTNUv1i32
+ 0U, // FCVTNUv1i64
+ 0U, // FCVTNUv2f32
+ 0U, // FCVTNUv2f64
+ 0U, // FCVTNUv4f32
+ 0U, // FCVTNv2i32
+ 0U, // FCVTNv4i16
+ 0U, // FCVTNv4i32
+ 0U, // FCVTNv8i16
+ 0U, // FCVTPSUWDr
+ 0U, // FCVTPSUWSr
+ 0U, // FCVTPSUXDr
+ 0U, // FCVTPSUXSr
+ 0U, // FCVTPSv1i32
+ 0U, // FCVTPSv1i64
+ 0U, // FCVTPSv2f32
+ 0U, // FCVTPSv2f64
+ 0U, // FCVTPSv4f32
+ 0U, // FCVTPUUWDr
+ 0U, // FCVTPUUWSr
+ 0U, // FCVTPUUXDr
+ 0U, // FCVTPUUXSr
+ 0U, // FCVTPUv1i32
+ 0U, // FCVTPUv1i64
+ 0U, // FCVTPUv2f32
+ 0U, // FCVTPUv2f64
+ 0U, // FCVTPUv4f32
+ 0U, // FCVTSDr
+ 0U, // FCVTSHr
+ 0U, // FCVTXNv1i64
+ 0U, // FCVTXNv2f32
+ 0U, // FCVTXNv4f32
+ 1U, // FCVTZSSWDri
+ 1U, // FCVTZSSWSri
+ 1U, // FCVTZSSXDri
+ 1U, // FCVTZSSXSri
+ 0U, // FCVTZSUWDr
+ 0U, // FCVTZSUWSr
+ 0U, // FCVTZSUXDr
+ 0U, // FCVTZSUXSr
+ 1U, // FCVTZS_IntSWDri
+ 1U, // FCVTZS_IntSWSri
+ 1U, // FCVTZS_IntSXDri
+ 1U, // FCVTZS_IntSXSri
+ 0U, // FCVTZS_IntUWDr
+ 0U, // FCVTZS_IntUWSr
+ 0U, // FCVTZS_IntUXDr
+ 0U, // FCVTZS_IntUXSr
+ 0U, // FCVTZS_Intv2f32
+ 0U, // FCVTZS_Intv2f64
+ 0U, // FCVTZS_Intv4f32
+ 1U, // FCVTZSd
+ 1U, // FCVTZSs
+ 0U, // FCVTZSv1i32
+ 0U, // FCVTZSv1i64
+ 0U, // FCVTZSv2f32
+ 0U, // FCVTZSv2f64
+ 1U, // FCVTZSv2i32_shift
+ 1U, // FCVTZSv2i64_shift
+ 0U, // FCVTZSv4f32
+ 1U, // FCVTZSv4i32_shift
+ 1U, // FCVTZUSWDri
+ 1U, // FCVTZUSWSri
+ 1U, // FCVTZUSXDri
+ 1U, // FCVTZUSXSri
+ 0U, // FCVTZUUWDr
+ 0U, // FCVTZUUWSr
+ 0U, // FCVTZUUXDr
+ 0U, // FCVTZUUXSr
+ 1U, // FCVTZU_IntSWDri
+ 1U, // FCVTZU_IntSWSri
+ 1U, // FCVTZU_IntSXDri
+ 1U, // FCVTZU_IntSXSri
+ 0U, // FCVTZU_IntUWDr
+ 0U, // FCVTZU_IntUWSr
+ 0U, // FCVTZU_IntUXDr
+ 0U, // FCVTZU_IntUXSr
+ 0U, // FCVTZU_Intv2f32
+ 0U, // FCVTZU_Intv2f64
+ 0U, // FCVTZU_Intv4f32
+ 1U, // FCVTZUd
+ 1U, // FCVTZUs
+ 0U, // FCVTZUv1i32
+ 0U, // FCVTZUv1i64
+ 0U, // FCVTZUv2f32
+ 0U, // FCVTZUv2f64
+ 1U, // FCVTZUv2i32_shift
+ 1U, // FCVTZUv2i64_shift
+ 0U, // FCVTZUv4f32
+ 1U, // FCVTZUv4i32_shift
+ 1U, // FDIVDrr
+ 1U, // FDIVSrr
+ 1289U, // FDIVv2f32
+ 265U, // FDIVv2f64
+ 521U, // FDIVv4f32
+ 18689U, // FMADDDrrr
+ 18689U, // FMADDSrrr
+ 1U, // FMAXDrr
+ 1U, // FMAXNMDrr
+ 1289U, // FMAXNMPv2f32
+ 265U, // FMAXNMPv2f64
+ 0U, // FMAXNMPv2i32p
+ 0U, // FMAXNMPv2i64p
+ 521U, // FMAXNMPv4f32
+ 1U, // FMAXNMSrr
+ 0U, // FMAXNMVv4i32v
+ 1289U, // FMAXNMv2f32
+ 265U, // FMAXNMv2f64
+ 521U, // FMAXNMv4f32
+ 1289U, // FMAXPv2f32
+ 265U, // FMAXPv2f64
+ 0U, // FMAXPv2i32p
+ 0U, // FMAXPv2i64p
+ 521U, // FMAXPv4f32
+ 1U, // FMAXSrr
+ 0U, // FMAXVv4i32v
+ 1289U, // FMAXv2f32
+ 265U, // FMAXv2f64
+ 521U, // FMAXv4f32
+ 1U, // FMINDrr
+ 1U, // FMINNMDrr
+ 1289U, // FMINNMPv2f32
+ 265U, // FMINNMPv2f64
+ 0U, // FMINNMPv2i32p
+ 0U, // FMINNMPv2i64p
+ 521U, // FMINNMPv4f32
+ 1U, // FMINNMSrr
+ 0U, // FMINNMVv4i32v
+ 1289U, // FMINNMv2f32
+ 265U, // FMINNMv2f64
+ 521U, // FMINNMv4f32
+ 1289U, // FMINPv2f32
+ 265U, // FMINPv2f64
+ 0U, // FMINPv2i32p
+ 0U, // FMINPv2i64p
+ 521U, // FMINPv4f32
+ 1U, // FMINSrr
+ 0U, // FMINVv4i32v
+ 1289U, // FMINv2f32
+ 265U, // FMINv2f64
+ 521U, // FMINv4f32
+ 27665U, // FMLAv1i32_indexed
+ 27921U, // FMLAv1i64_indexed
+ 1297U, // FMLAv2f32
+ 273U, // FMLAv2f64
+ 27665U, // FMLAv2i32_indexed
+ 27921U, // FMLAv2i64_indexed
+ 529U, // FMLAv4f32
+ 27665U, // FMLAv4i32_indexed
+ 27665U, // FMLSv1i32_indexed
+ 27921U, // FMLSv1i64_indexed
+ 1297U, // FMLSv2f32
+ 273U, // FMLSv2f64
+ 27665U, // FMLSv2i32_indexed
+ 27921U, // FMLSv2i64_indexed
+ 529U, // FMLSv4f32
+ 27665U, // FMLSv4i32_indexed
+ 75U, // FMOVDXHighr
+ 0U, // FMOVDXr
+ 0U, // FMOVDi
+ 0U, // FMOVDr
+ 0U, // FMOVSWr
+ 0U, // FMOVSi
+ 0U, // FMOVSr
+ 0U, // FMOVWSr
+ 0U, // FMOVXDHighr
+ 0U, // FMOVXDr
+ 0U, // FMOVv2f32_ns
+ 0U, // FMOVv2f64_ns
+ 0U, // FMOVv4f32_ns
+ 18689U, // FMSUBDrrr
+ 18689U, // FMSUBSrrr
+ 1U, // FMULDrr
+ 1U, // FMULSrr
+ 1U, // FMULX32
+ 1U, // FMULX64
+ 35849U, // FMULXv1i32_indexed
+ 36105U, // FMULXv1i64_indexed
+ 1289U, // FMULXv2f32
+ 265U, // FMULXv2f64
+ 35849U, // FMULXv2i32_indexed
+ 36105U, // FMULXv2i64_indexed
+ 521U, // FMULXv4f32
+ 35849U, // FMULXv4i32_indexed
+ 35849U, // FMULv1i32_indexed
+ 36105U, // FMULv1i64_indexed
+ 1289U, // FMULv2f32
+ 265U, // FMULv2f64
+ 35849U, // FMULv2i32_indexed
+ 36105U, // FMULv2i64_indexed
+ 521U, // FMULv4f32
+ 35849U, // FMULv4i32_indexed
+ 0U, // FNEGDr
+ 0U, // FNEGSr
+ 0U, // FNEGv2f32
+ 0U, // FNEGv2f64
+ 0U, // FNEGv4f32
+ 18689U, // FNMADDDrrr
+ 18689U, // FNMADDSrrr
+ 18689U, // FNMSUBDrrr
+ 18689U, // FNMSUBSrrr
+ 1U, // FNMULDrr
+ 1U, // FNMULSrr
+ 0U, // FRECPEv1i32
+ 0U, // FRECPEv1i64
+ 0U, // FRECPEv2f32
+ 0U, // FRECPEv2f64
+ 0U, // FRECPEv4f32
+ 1U, // FRECPS32
+ 1U, // FRECPS64
+ 1289U, // FRECPSv2f32
+ 265U, // FRECPSv2f64
+ 521U, // FRECPSv4f32
+ 0U, // FRECPXv1i32
+ 0U, // FRECPXv1i64
+ 0U, // FRINTADr
+ 0U, // FRINTASr
+ 0U, // FRINTAv2f32
+ 0U, // FRINTAv2f64
+ 0U, // FRINTAv4f32
+ 0U, // FRINTIDr
+ 0U, // FRINTISr
+ 0U, // FRINTIv2f32
+ 0U, // FRINTIv2f64
+ 0U, // FRINTIv4f32
+ 0U, // FRINTMDr
+ 0U, // FRINTMSr
+ 0U, // FRINTMv2f32
+ 0U, // FRINTMv2f64
+ 0U, // FRINTMv4f32
+ 0U, // FRINTNDr
+ 0U, // FRINTNSr
+ 0U, // FRINTNv2f32
+ 0U, // FRINTNv2f64
+ 0U, // FRINTNv4f32
+ 0U, // FRINTPDr
+ 0U, // FRINTPSr
+ 0U, // FRINTPv2f32
+ 0U, // FRINTPv2f64
+ 0U, // FRINTPv4f32
+ 0U, // FRINTXDr
+ 0U, // FRINTXSr
+ 0U, // FRINTXv2f32
+ 0U, // FRINTXv2f64
+ 0U, // FRINTXv4f32
+ 0U, // FRINTZDr
+ 0U, // FRINTZSr
+ 0U, // FRINTZv2f32
+ 0U, // FRINTZv2f64
+ 0U, // FRINTZv4f32
+ 0U, // FRSQRTEv1i32
+ 0U, // FRSQRTEv1i64
+ 0U, // FRSQRTEv2f32
+ 0U, // FRSQRTEv2f64
+ 0U, // FRSQRTEv4f32
+ 1U, // FRSQRTS32
+ 1U, // FRSQRTS64
+ 1289U, // FRSQRTSv2f32
+ 265U, // FRSQRTSv2f64
+ 521U, // FRSQRTSv4f32
+ 0U, // FSQRTDr
+ 0U, // FSQRTSr
+ 0U, // FSQRTv2f32
+ 0U, // FSQRTv2f64
+ 0U, // FSQRTv4f32
+ 1U, // FSUBDrr
+ 1U, // FSUBSrr
+ 1289U, // FSUBv2f32
+ 265U, // FSUBv2f64
+ 521U, // FSUBv4f32
+ 0U, // HINT
+ 0U, // HLT
+ 0U, // HVC
+ 0U, // INSvi16gpr
+ 83U, // INSvi16lane
+ 0U, // INSvi32gpr
+ 83U, // INSvi32lane
+ 0U, // INSvi64gpr
+ 83U, // INSvi64lane
+ 0U, // INSvi8gpr
+ 83U, // INSvi8lane
+ 0U, // ISB
+ 0U, // LD1Fourv16b
+ 0U, // LD1Fourv16b_POST
+ 0U, // LD1Fourv1d
+ 0U, // LD1Fourv1d_POST
+ 0U, // LD1Fourv2d
+ 0U, // LD1Fourv2d_POST
+ 0U, // LD1Fourv2s
+ 0U, // LD1Fourv2s_POST
+ 0U, // LD1Fourv4h
+ 0U, // LD1Fourv4h_POST
+ 0U, // LD1Fourv4s
+ 0U, // LD1Fourv4s_POST
+ 0U, // LD1Fourv8b
+ 0U, // LD1Fourv8b_POST
+ 0U, // LD1Fourv8h
+ 0U, // LD1Fourv8h_POST
+ 0U, // LD1Onev16b
+ 0U, // LD1Onev16b_POST
+ 0U, // LD1Onev1d
+ 0U, // LD1Onev1d_POST
+ 0U, // LD1Onev2d
+ 0U, // LD1Onev2d_POST
+ 0U, // LD1Onev2s
+ 0U, // LD1Onev2s_POST
+ 0U, // LD1Onev4h
+ 0U, // LD1Onev4h_POST
+ 0U, // LD1Onev4s
+ 0U, // LD1Onev4s_POST
+ 0U, // LD1Onev8b
+ 0U, // LD1Onev8b_POST
+ 0U, // LD1Onev8h
+ 0U, // LD1Onev8h_POST
+ 0U, // LD1Rv16b
+ 0U, // LD1Rv16b_POST
+ 0U, // LD1Rv1d
+ 0U, // LD1Rv1d_POST
+ 0U, // LD1Rv2d
+ 0U, // LD1Rv2d_POST
+ 0U, // LD1Rv2s
+ 0U, // LD1Rv2s_POST
+ 0U, // LD1Rv4h
+ 0U, // LD1Rv4h_POST
+ 0U, // LD1Rv4s
+ 0U, // LD1Rv4s_POST
+ 0U, // LD1Rv8b
+ 0U, // LD1Rv8b_POST
+ 0U, // LD1Rv8h
+ 0U, // LD1Rv8h_POST
+ 0U, // LD1Threev16b
+ 0U, // LD1Threev16b_POST
+ 0U, // LD1Threev1d
+ 0U, // LD1Threev1d_POST
+ 0U, // LD1Threev2d
+ 0U, // LD1Threev2d_POST
+ 0U, // LD1Threev2s
+ 0U, // LD1Threev2s_POST
+ 0U, // LD1Threev4h
+ 0U, // LD1Threev4h_POST
+ 0U, // LD1Threev4s
+ 0U, // LD1Threev4s_POST
+ 0U, // LD1Threev8b
+ 0U, // LD1Threev8b_POST
+ 0U, // LD1Threev8h
+ 0U, // LD1Threev8h_POST
+ 0U, // LD1Twov16b
+ 0U, // LD1Twov16b_POST
+ 0U, // LD1Twov1d
+ 0U, // LD1Twov1d_POST
+ 0U, // LD1Twov2d
+ 0U, // LD1Twov2d_POST
+ 0U, // LD1Twov2s
+ 0U, // LD1Twov2s_POST
+ 0U, // LD1Twov4h
+ 0U, // LD1Twov4h_POST
+ 0U, // LD1Twov4s
+ 0U, // LD1Twov4s_POST
+ 0U, // LD1Twov8b
+ 0U, // LD1Twov8b_POST
+ 0U, // LD1Twov8h
+ 0U, // LD1Twov8h_POST
+ 0U, // LD1i16
+ 0U, // LD1i16_POST
+ 0U, // LD1i32
+ 0U, // LD1i32_POST
+ 0U, // LD1i64
+ 0U, // LD1i64_POST
+ 0U, // LD1i8
+ 0U, // LD1i8_POST
+ 0U, // LD2Rv16b
+ 0U, // LD2Rv16b_POST
+ 0U, // LD2Rv1d
+ 0U, // LD2Rv1d_POST
+ 0U, // LD2Rv2d
+ 0U, // LD2Rv2d_POST
+ 0U, // LD2Rv2s
+ 0U, // LD2Rv2s_POST
+ 0U, // LD2Rv4h
+ 0U, // LD2Rv4h_POST
+ 0U, // LD2Rv4s
+ 0U, // LD2Rv4s_POST
+ 0U, // LD2Rv8b
+ 0U, // LD2Rv8b_POST
+ 0U, // LD2Rv8h
+ 0U, // LD2Rv8h_POST
+ 0U, // LD2Twov16b
+ 0U, // LD2Twov16b_POST
+ 0U, // LD2Twov2d
+ 0U, // LD2Twov2d_POST
+ 0U, // LD2Twov2s
+ 0U, // LD2Twov2s_POST
+ 0U, // LD2Twov4h
+ 0U, // LD2Twov4h_POST
+ 0U, // LD2Twov4s
+ 0U, // LD2Twov4s_POST
+ 0U, // LD2Twov8b
+ 0U, // LD2Twov8b_POST
+ 0U, // LD2Twov8h
+ 0U, // LD2Twov8h_POST
+ 0U, // LD2i16
+ 0U, // LD2i16_POST
+ 0U, // LD2i32
+ 0U, // LD2i32_POST
+ 0U, // LD2i64
+ 0U, // LD2i64_POST
+ 0U, // LD2i8
+ 0U, // LD2i8_POST
+ 0U, // LD3Rv16b
+ 0U, // LD3Rv16b_POST
+ 0U, // LD3Rv1d
+ 0U, // LD3Rv1d_POST
+ 0U, // LD3Rv2d
+ 0U, // LD3Rv2d_POST
+ 0U, // LD3Rv2s
+ 0U, // LD3Rv2s_POST
+ 0U, // LD3Rv4h
+ 0U, // LD3Rv4h_POST
+ 0U, // LD3Rv4s
+ 0U, // LD3Rv4s_POST
+ 0U, // LD3Rv8b
+ 0U, // LD3Rv8b_POST
+ 0U, // LD3Rv8h
+ 0U, // LD3Rv8h_POST
+ 0U, // LD3Threev16b
+ 0U, // LD3Threev16b_POST
+ 0U, // LD3Threev2d
+ 0U, // LD3Threev2d_POST
+ 0U, // LD3Threev2s
+ 0U, // LD3Threev2s_POST
+ 0U, // LD3Threev4h
+ 0U, // LD3Threev4h_POST
+ 0U, // LD3Threev4s
+ 0U, // LD3Threev4s_POST
+ 0U, // LD3Threev8b
+ 0U, // LD3Threev8b_POST
+ 0U, // LD3Threev8h
+ 0U, // LD3Threev8h_POST
+ 0U, // LD3i16
+ 0U, // LD3i16_POST
+ 0U, // LD3i32
+ 0U, // LD3i32_POST
+ 0U, // LD3i64
+ 0U, // LD3i64_POST
+ 0U, // LD3i8
+ 0U, // LD3i8_POST
+ 0U, // LD4Fourv16b
+ 0U, // LD4Fourv16b_POST
+ 0U, // LD4Fourv2d
+ 0U, // LD4Fourv2d_POST
+ 0U, // LD4Fourv2s
+ 0U, // LD4Fourv2s_POST
+ 0U, // LD4Fourv4h
+ 0U, // LD4Fourv4h_POST
+ 0U, // LD4Fourv4s
+ 0U, // LD4Fourv4s_POST
+ 0U, // LD4Fourv8b
+ 0U, // LD4Fourv8b_POST
+ 0U, // LD4Fourv8h
+ 0U, // LD4Fourv8h_POST
+ 0U, // LD4Rv16b
+ 0U, // LD4Rv16b_POST
+ 0U, // LD4Rv1d
+ 0U, // LD4Rv1d_POST
+ 0U, // LD4Rv2d
+ 0U, // LD4Rv2d_POST
+ 0U, // LD4Rv2s
+ 0U, // LD4Rv2s_POST
+ 0U, // LD4Rv4h
+ 0U, // LD4Rv4h_POST
+ 0U, // LD4Rv4s
+ 0U, // LD4Rv4s_POST
+ 0U, // LD4Rv8b
+ 0U, // LD4Rv8b_POST
+ 0U, // LD4Rv8h
+ 0U, // LD4Rv8h_POST
+ 0U, // LD4i16
+ 0U, // LD4i16_POST
+ 0U, // LD4i32
+ 0U, // LD4i32_POST
+ 0U, // LD4i64
+ 0U, // LD4i64_POST
+ 0U, // LD4i8
+ 0U, // LD4i8_POST
+ 4U, // LDARB
+ 4U, // LDARH
+ 4U, // LDARW
+ 4U, // LDARX
+ 3588U, // LDAXPW
+ 3588U, // LDAXPX
+ 4U, // LDAXRB
+ 4U, // LDAXRH
+ 4U, // LDAXRW
+ 4U, // LDAXRX
+ 43268U, // LDNPDi
+ 51460U, // LDNPQi
+ 59652U, // LDNPSi
+ 59652U, // LDNPWi
+ 43268U, // LDNPXi
+ 43268U, // LDPDi
+ 69444U, // LDPDpost
+ 330052U, // LDPDpre
+ 51460U, // LDPQi
+ 77636U, // LDPQpost
+ 338244U, // LDPQpre
+ 59652U, // LDPSWi
+ 85828U, // LDPSWpost
+ 346436U, // LDPSWpre
+ 59652U, // LDPSi
+ 85828U, // LDPSpost
+ 346436U, // LDPSpre
+ 59652U, // LDPWi
+ 85828U, // LDPWpost
+ 346436U, // LDPWpre
+ 43268U, // LDPXi
+ 69444U, // LDPXpost
+ 330052U, // LDPXpre
+ 4U, // LDRBBpost
+ 4161U, // LDRBBpre
+ 92417U, // LDRBBroW
+ 100609U, // LDRBBroX
+ 89U, // LDRBBui
+ 4U, // LDRBpost
+ 4161U, // LDRBpre
+ 92417U, // LDRBroW
+ 100609U, // LDRBroX
+ 89U, // LDRBui
+ 0U, // LDRDl
+ 4U, // LDRDpost
+ 4161U, // LDRDpre
+ 108801U, // LDRDroW
+ 116993U, // LDRDroX
+ 97U, // LDRDui
+ 4U, // LDRHHpost
+ 4161U, // LDRHHpre
+ 125185U, // LDRHHroW
+ 133377U, // LDRHHroX
+ 105U, // LDRHHui
+ 4U, // LDRHpost
+ 4161U, // LDRHpre
+ 125185U, // LDRHroW
+ 133377U, // LDRHroX
+ 105U, // LDRHui
+ 0U, // LDRQl
+ 4U, // LDRQpost
+ 4161U, // LDRQpre
+ 141569U, // LDRQroW
+ 149761U, // LDRQroX
+ 113U, // LDRQui
+ 4U, // LDRSBWpost
+ 4161U, // LDRSBWpre
+ 92417U, // LDRSBWroW
+ 100609U, // LDRSBWroX
+ 89U, // LDRSBWui
+ 4U, // LDRSBXpost
+ 4161U, // LDRSBXpre
+ 92417U, // LDRSBXroW
+ 100609U, // LDRSBXroX
+ 89U, // LDRSBXui
+ 4U, // LDRSHWpost
+ 4161U, // LDRSHWpre
+ 125185U, // LDRSHWroW
+ 133377U, // LDRSHWroX
+ 105U, // LDRSHWui
+ 4U, // LDRSHXpost
+ 4161U, // LDRSHXpre
+ 125185U, // LDRSHXroW
+ 133377U, // LDRSHXroX
+ 105U, // LDRSHXui
+ 0U, // LDRSWl
+ 4U, // LDRSWpost
+ 4161U, // LDRSWpre
+ 157953U, // LDRSWroW
+ 166145U, // LDRSWroX
+ 121U, // LDRSWui
+ 0U, // LDRSl
+ 4U, // LDRSpost
+ 4161U, // LDRSpre
+ 157953U, // LDRSroW
+ 166145U, // LDRSroX
+ 121U, // LDRSui
+ 0U, // LDRWl
+ 4U, // LDRWpost
+ 4161U, // LDRWpre
+ 157953U, // LDRWroW
+ 166145U, // LDRWroX
+ 121U, // LDRWui
+ 0U, // LDRXl
+ 4U, // LDRXpost
+ 4161U, // LDRXpre
+ 108801U, // LDRXroW
+ 116993U, // LDRXroX
+ 97U, // LDRXui
+ 3585U, // LDTRBi
+ 3585U, // LDTRHi
+ 3585U, // LDTRSBWi
+ 3585U, // LDTRSBXi
+ 3585U, // LDTRSHWi
+ 3585U, // LDTRSHXi
+ 3585U, // LDTRSWi
+ 3585U, // LDTRWi
+ 3585U, // LDTRXi
+ 3585U, // LDURBBi
+ 3585U, // LDURBi
+ 3585U, // LDURDi
+ 3585U, // LDURHHi
+ 3585U, // LDURHi
+ 3585U, // LDURQi
+ 3585U, // LDURSBWi
+ 3585U, // LDURSBXi
+ 3585U, // LDURSHWi
+ 3585U, // LDURSHXi
+ 3585U, // LDURSWi
+ 3585U, // LDURSi
+ 3585U, // LDURWi
+ 3585U, // LDURXi
+ 3588U, // LDXPW
+ 3588U, // LDXPX
+ 4U, // LDXRB
+ 4U, // LDXRH
+ 4U, // LDXRW
+ 4U, // LDXRX
+ 0U, // LOADgot
+ 1U, // LSLVWr
+ 1U, // LSLVXr
+ 1U, // LSRVWr
+ 1U, // LSRVXr
+ 18689U, // MADDWrrr
+ 18689U, // MADDXrrr
+ 1041U, // MLAv16i8
+ 1297U, // MLAv2i32
+ 27665U, // MLAv2i32_indexed
+ 1553U, // MLAv4i16
+ 28945U, // MLAv4i16_indexed
+ 529U, // MLAv4i32
+ 27665U, // MLAv4i32_indexed
+ 785U, // MLAv8i16
+ 28945U, // MLAv8i16_indexed
+ 1809U, // MLAv8i8
+ 1041U, // MLSv16i8
+ 1297U, // MLSv2i32
+ 27665U, // MLSv2i32_indexed
+ 1553U, // MLSv4i16
+ 28945U, // MLSv4i16_indexed
+ 529U, // MLSv4i32
+ 27665U, // MLSv4i32_indexed
+ 785U, // MLSv8i16
+ 28945U, // MLSv8i16_indexed
+ 1809U, // MLSv8i8
+ 0U, // MOVID
+ 0U, // MOVIv16b_ns
+ 0U, // MOVIv2d_ns
+ 4U, // MOVIv2i32
+ 4U, // MOVIv2s_msl
+ 4U, // MOVIv4i16
+ 4U, // MOVIv4i32
+ 4U, // MOVIv4s_msl
+ 0U, // MOVIv8b_ns
+ 4U, // MOVIv8i16
+ 0U, // MOVKWi
+ 0U, // MOVKXi
+ 4U, // MOVNWi
+ 4U, // MOVNXi
+ 4U, // MOVZWi
+ 4U, // MOVZXi
+ 0U, // MOVaddr
+ 0U, // MOVaddrBA
+ 0U, // MOVaddrCP
+ 0U, // MOVaddrEXT
+ 0U, // MOVaddrJT
+ 0U, // MOVaddrTLS
+ 0U, // MOVi32imm
+ 0U, // MOVi64imm
+ 0U, // MRS
+ 0U, // MSR
+ 0U, // MSRpstate
+ 18689U, // MSUBWrrr
+ 18689U, // MSUBXrrr
+ 1033U, // MULv16i8
+ 1289U, // MULv2i32
+ 35849U, // MULv2i32_indexed
+ 1545U, // MULv4i16
+ 37129U, // MULv4i16_indexed
+ 521U, // MULv4i32
+ 35849U, // MULv4i32_indexed
+ 777U, // MULv8i16
+ 37129U, // MULv8i16_indexed
+ 1801U, // MULv8i8
+ 4U, // MVNIv2i32
+ 4U, // MVNIv2s_msl
+ 4U, // MVNIv4i16
+ 4U, // MVNIv4i32
+ 4U, // MVNIv4s_msl
+ 4U, // MVNIv8i16
+ 0U, // NEGv16i8
+ 0U, // NEGv1i64
+ 0U, // NEGv2i32
+ 0U, // NEGv2i64
+ 0U, // NEGv4i16
+ 0U, // NEGv4i32
+ 0U, // NEGv8i16
+ 0U, // NEGv8i8
+ 0U, // NOTv16i8
+ 0U, // NOTv8i8
+ 0U, // ORNWrr
+ 33U, // ORNWrs
+ 0U, // ORNXrr
+ 33U, // ORNXrs
+ 1033U, // ORNv16i8
+ 1801U, // ORNv8i8
+ 49U, // ORRWri
+ 0U, // ORRWrr
+ 33U, // ORRWrs
+ 57U, // ORRXri
+ 0U, // ORRXrr
+ 33U, // ORRXrs
+ 1033U, // ORRv16i8
+ 0U, // ORRv2i32
+ 0U, // ORRv4i16
+ 0U, // ORRv4i32
+ 0U, // ORRv8i16
+ 1801U, // ORRv8i8
+ 1033U, // PMULLv16i8
+ 0U, // PMULLv1i64
+ 0U, // PMULLv2i64
+ 1801U, // PMULLv8i8
+ 1033U, // PMULv16i8
+ 1801U, // PMULv8i8
+ 0U, // PRFMl
+ 108801U, // PRFMroW
+ 116993U, // PRFMroX
+ 97U, // PRFMui
+ 3585U, // PRFUMi
+ 265U, // RADDHNv2i64_v2i32
+ 273U, // RADDHNv2i64_v4i32
+ 521U, // RADDHNv4i32_v4i16
+ 529U, // RADDHNv4i32_v8i16
+ 785U, // RADDHNv8i16_v16i8
+ 777U, // RADDHNv8i16_v8i8
+ 0U, // RBITWr
+ 0U, // RBITXr
+ 0U, // RBITv16i8
+ 0U, // RBITv8i8
0U, // RET
- 0U, // RETx
- 0U, // REV16_16b
- 1U, // REV16_8b
- 1U, // REV16ww
- 1U, // REV16xx
- 0U, // REV32_16b
- 0U, // REV32_4h
- 1U, // REV32_8b
- 1U, // REV32_8h
- 1U, // REV32xx
- 0U, // REV64_16b
- 0U, // REV64_2s
- 0U, // REV64_4h
- 1U, // REV64_4s
- 1U, // REV64_8b
- 1U, // REV64_8h
- 1U, // REVww
- 1U, // REVxx
- 2U, // RORVwww
- 2U, // RORVxxx
- 74U, // RSHRNvvi_16B
- 2U, // RSHRNvvi_2S
- 2U, // RSHRNvvi_4H
- 74U, // RSHRNvvi_4S
- 2U, // RSHRNvvi_8B
- 74U, // RSHRNvvi_8H
- 522U, // RSUBHN2vvv_16b8h
- 1034U, // RSUBHN2vvv_4s2d
- 1546U, // RSUBHN2vvv_8h4s
- 1042U, // RSUBHNvvv_2s2d
- 1554U, // RSUBHNvvv_4h4s
- 530U, // RSUBHNvvv_8b8h
- 1546U, // SABAL2vvv_2d2s
- 522U, // SABAL2vvv_4s4h
- 2059U, // SABAL2vvv_8h8b
- 2571U, // SABALvvv_2d2s
- 3083U, // SABALvvv_4s4h
- 3595U, // SABALvvv_8h8b
- 2059U, // SABAvvv_16B
- 2571U, // SABAvvv_2S
- 3083U, // SABAvvv_4H
- 1546U, // SABAvvv_4S
- 3595U, // SABAvvv_8B
- 522U, // SABAvvv_8H
- 1554U, // SABDL2vvv_2d2s
- 530U, // SABDL2vvv_4s4h
- 2067U, // SABDL2vvv_8h8b
- 2579U, // SABDLvvv_2d2s
- 3091U, // SABDLvvv_4s4h
- 3603U, // SABDLvvv_8h8b
- 2067U, // SABDvvv_16B
- 2579U, // SABDvvv_2S
- 3091U, // SABDvvv_4H
- 1554U, // SABDvvv_4S
- 3603U, // SABDvvv_8B
- 530U, // SABDvvv_8H
- 0U, // SADALP16b8h
- 0U, // SADALP2s1d
- 0U, // SADALP4h2s
- 1U, // SADALP4s2d
- 1U, // SADALP8b4h
- 1U, // SADALP8h4s
- 1554U, // SADDL2vvv_2d4s
- 530U, // SADDL2vvv_4s8h
- 2067U, // SADDL2vvv_8h16b
- 0U, // SADDLP16b8h
- 0U, // SADDLP2s1d
- 0U, // SADDLP4h2s
- 1U, // SADDLP4s2d
- 1U, // SADDLP8b4h
- 1U, // SADDLP8h4s
- 1U, // SADDLV_1d4s
- 0U, // SADDLV_1h16b
- 1U, // SADDLV_1h8b
- 0U, // SADDLV_1s4h
- 1U, // SADDLV_1s8h
- 2579U, // SADDLvvv_2d2s
- 3091U, // SADDLvvv_4s4h
- 3603U, // SADDLvvv_8h8b
- 1554U, // SADDW2vvv_2d4s
- 530U, // SADDW2vvv_4s8h
- 2066U, // SADDW2vvv_8h16b
- 2578U, // SADDWvvv_2d2s
- 3090U, // SADDWvvv_4s4h
- 3602U, // SADDWvvv_8h8b
- 2U, // SBCSwww
- 2U, // SBCSxxx
- 2U, // SBCwww
- 2U, // SBCxxx
- 282U, // SBFIZwwii
- 290U, // SBFIZxxii
- 249858U, // SBFMwwii
- 249858U, // SBFMxxii
- 561154U, // SBFXwwii
- 561154U, // SBFXxxii
- 0U, // SCVTF_2d
- 0U, // SCVTF_2s
- 1U, // SCVTF_4s
- 2U, // SCVTF_Nddi
- 2U, // SCVTF_Nssi
- 1U, // SCVTFdd
- 1U, // SCVTFdw
- 194U, // SCVTFdwi
- 1U, // SCVTFdx
- 194U, // SCVTFdxi
- 1U, // SCVTFss
- 1U, // SCVTFsw
- 194U, // SCVTFswi
- 1U, // SCVTFsx
- 194U, // SCVTFsxi
- 2U, // SDIVwww
- 2U, // SDIVxxx
- 1546U, // SHA1C
- 1U, // SHA1H
- 1546U, // SHA1M
- 1546U, // SHA1P
- 1546U, // SHA1SU0
- 1U, // SHA1SU1
- 1546U, // SHA256H
- 1546U, // SHA256H2
- 1U, // SHA256SU0
- 1546U, // SHA256SU1
- 2067U, // SHADDvvv_16B
- 2579U, // SHADDvvv_2S
- 3091U, // SHADDvvv_4H
- 1554U, // SHADDvvv_4S
- 3603U, // SHADDvvv_8B
- 530U, // SHADDvvv_8H
- 3U, // SHLL16b8h
- 3U, // SHLL2s2d
- 3U, // SHLL4h4s
- 2U, // SHLL4s2d
- 3U, // SHLL8b8h
- 2U, // SHLL8h4s
- 2U, // SHLddi
- 3U, // SHLvvi_16B
- 2U, // SHLvvi_2D
- 3U, // SHLvvi_2S
- 3U, // SHLvvi_4H
- 2U, // SHLvvi_4S
- 3U, // SHLvvi_8B
- 2U, // SHLvvi_8H
- 74U, // SHRNvvi_16B
- 2U, // SHRNvvi_2S
- 2U, // SHRNvvi_4H
- 74U, // SHRNvvi_4S
- 2U, // SHRNvvi_8B
- 74U, // SHRNvvi_8H
- 2067U, // SHSUBvvv_16B
- 2579U, // SHSUBvvv_2S
- 3091U, // SHSUBvvv_4H
- 1554U, // SHSUBvvv_4S
- 3603U, // SHSUBvvv_8B
- 530U, // SHSUBvvv_8H
- 74U, // SLI
- 75U, // SLIvvi_16B
- 74U, // SLIvvi_2D
- 75U, // SLIvvi_2S
- 75U, // SLIvvi_4H
- 74U, // SLIvvi_4S
- 75U, // SLIvvi_8B
- 74U, // SLIvvi_8H
- 249858U, // SMADDLxwwx
- 2067U, // SMAXPvvv_16B
- 2579U, // SMAXPvvv_2S
- 3091U, // SMAXPvvv_4H
- 1554U, // SMAXPvvv_4S
- 3603U, // SMAXPvvv_8B
- 530U, // SMAXPvvv_8H
- 0U, // SMAXV_1b16b
- 1U, // SMAXV_1b8b
- 0U, // SMAXV_1h4h
- 1U, // SMAXV_1h8h
- 1U, // SMAXV_1s4s
- 2067U, // SMAXvvv_16B
- 2579U, // SMAXvvv_2S
- 3091U, // SMAXvvv_4H
- 1554U, // SMAXvvv_4S
- 3603U, // SMAXvvv_8B
- 530U, // SMAXvvv_8H
- 0U, // SMCi
- 2067U, // SMINPvvv_16B
- 2579U, // SMINPvvv_2S
- 3091U, // SMINPvvv_4H
- 1554U, // SMINPvvv_4S
- 3603U, // SMINPvvv_8B
- 530U, // SMINPvvv_8H
- 0U, // SMINV_1b16b
- 1U, // SMINV_1b8b
- 0U, // SMINV_1h4h
- 1U, // SMINV_1h8h
- 1U, // SMINV_1s4s
- 2067U, // SMINvvv_16B
- 2579U, // SMINvvv_2S
- 3091U, // SMINvvv_4H
- 1554U, // SMINvvv_4S
- 3603U, // SMINvvv_8B
- 530U, // SMINvvv_8H
- 1546U, // SMLAL2vvv_2d4s
- 522U, // SMLAL2vvv_4s8h
- 2059U, // SMLAL2vvv_8h16b
- 268299U, // SMLALvve_2d2s
- 268298U, // SMLALvve_2d4s
- 269835U, // SMLALvve_4s4h
- 269834U, // SMLALvve_4s8h
- 2571U, // SMLALvvv_2d2s
- 3083U, // SMLALvvv_4s4h
- 3595U, // SMLALvvv_8h8b
- 1546U, // SMLSL2vvv_2d4s
- 522U, // SMLSL2vvv_4s8h
- 2059U, // SMLSL2vvv_8h16b
- 268299U, // SMLSLvve_2d2s
- 268298U, // SMLSLvve_2d4s
- 269835U, // SMLSLvve_4s4h
- 269834U, // SMLSLvve_4s8h
- 2571U, // SMLSLvvv_2d2s
- 3083U, // SMLSLvvv_4s4h
- 3595U, // SMLSLvvv_8h8b
- 180U, // SMOVwb
- 181U, // SMOVwh
- 180U, // SMOVxb
- 181U, // SMOVxh
- 181U, // SMOVxs
- 249858U, // SMSUBLxwwx
- 2U, // SMULHxxx
- 1554U, // SMULL2vvv_2d4s
- 530U, // SMULL2vvv_4s8h
- 2067U, // SMULL2vvv_8h16b
- 284691U, // SMULLve_2d2s
- 284690U, // SMULLve_2d4s
- 286227U, // SMULLve_4s4h
- 286226U, // SMULLve_4s8h
- 2579U, // SMULLvvv_2d2s
- 3091U, // SMULLvvv_4s4h
- 3603U, // SMULLvvv_8h8b
- 0U, // SQABS16b
- 0U, // SQABS2d
- 0U, // SQABS2s
- 0U, // SQABS4h
- 1U, // SQABS4s
- 1U, // SQABS8b
- 1U, // SQABS8h
- 1U, // SQABSbb
- 1U, // SQABSdd
- 1U, // SQABShh
- 1U, // SQABSss
- 2U, // SQADDbbb
- 2U, // SQADDddd
- 2U, // SQADDhhh
- 2U, // SQADDsss
- 2067U, // SQADDvvv_16B
- 1042U, // SQADDvvv_2D
- 2579U, // SQADDvvv_2S
- 3091U, // SQADDvvv_4H
- 1554U, // SQADDvvv_4S
- 3603U, // SQADDvvv_8B
- 530U, // SQADDvvv_8H
- 1546U, // SQDMLAL2vvv_2d4s
- 522U, // SQDMLAL2vvv_4s8h
- 74U, // SQDMLALdss
- 268298U, // SQDMLALdsv_2S
- 268298U, // SQDMLALdsv_4S
- 74U, // SQDMLALshh
- 269834U, // SQDMLALshv_4H
- 269834U, // SQDMLALshv_8H
- 268299U, // SQDMLALvve_2d2s
- 268298U, // SQDMLALvve_2d4s
- 269835U, // SQDMLALvve_4s4h
- 269834U, // SQDMLALvve_4s8h
- 2571U, // SQDMLALvvv_2d2s
- 3083U, // SQDMLALvvv_4s4h
- 1546U, // SQDMLSL2vvv_2d4s
- 522U, // SQDMLSL2vvv_4s8h
- 74U, // SQDMLSLdss
- 268298U, // SQDMLSLdsv_2S
- 268298U, // SQDMLSLdsv_4S
- 74U, // SQDMLSLshh
- 269834U, // SQDMLSLshv_4H
- 269834U, // SQDMLSLshv_8H
- 268299U, // SQDMLSLvve_2d2s
- 268298U, // SQDMLSLvve_2d4s
- 269835U, // SQDMLSLvve_4s4h
- 269834U, // SQDMLSLvve_4s8h
- 2571U, // SQDMLSLvvv_2d2s
- 3083U, // SQDMLSLvvv_4s4h
- 2U, // SQDMULHhhh
- 286226U, // SQDMULHhhv_4H
- 286226U, // SQDMULHhhv_8H
- 2U, // SQDMULHsss
- 284690U, // SQDMULHssv_2S
- 284690U, // SQDMULHssv_4S
- 284691U, // SQDMULHve_2s4s
- 286227U, // SQDMULHve_4h8h
- 284690U, // SQDMULHve_4s4s
- 286226U, // SQDMULHve_8h8h
- 2579U, // SQDMULHvvv_2S
- 3091U, // SQDMULHvvv_4H
- 1554U, // SQDMULHvvv_4S
- 530U, // SQDMULHvvv_8H
- 1554U, // SQDMULL2vvv_2d4s
- 530U, // SQDMULL2vvv_4s8h
- 2U, // SQDMULLdss
- 284690U, // SQDMULLdsv_2S
- 284690U, // SQDMULLdsv_4S
- 2U, // SQDMULLshh
- 286226U, // SQDMULLshv_4H
- 286226U, // SQDMULLshv_8H
- 284691U, // SQDMULLve_2d2s
- 284690U, // SQDMULLve_2d4s
- 286227U, // SQDMULLve_4s4h
- 286226U, // SQDMULLve_4s8h
- 2579U, // SQDMULLvvv_2d2s
- 3091U, // SQDMULLvvv_4s4h
- 0U, // SQNEG16b
- 0U, // SQNEG2d
- 0U, // SQNEG2s
- 0U, // SQNEG4h
- 1U, // SQNEG4s
- 1U, // SQNEG8b
- 1U, // SQNEG8h
- 1U, // SQNEGbb
- 1U, // SQNEGdd
- 1U, // SQNEGhh
- 1U, // SQNEGss
- 2U, // SQRDMULHhhh
- 286226U, // SQRDMULHhhv_4H
- 286226U, // SQRDMULHhhv_8H
- 2U, // SQRDMULHsss
- 284690U, // SQRDMULHssv_2S
- 284690U, // SQRDMULHssv_4S
- 284691U, // SQRDMULHve_2s4s
- 286227U, // SQRDMULHve_4h8h
- 284690U, // SQRDMULHve_4s4s
- 286226U, // SQRDMULHve_8h8h
- 2579U, // SQRDMULHvvv_2S
- 3091U, // SQRDMULHvvv_4H
- 1554U, // SQRDMULHvvv_4S
- 530U, // SQRDMULHvvv_8H
- 2U, // SQRSHLbbb
- 2U, // SQRSHLddd
- 2U, // SQRSHLhhh
- 2U, // SQRSHLsss
- 2067U, // SQRSHLvvv_16B
- 1042U, // SQRSHLvvv_2D
- 2579U, // SQRSHLvvv_2S
- 3091U, // SQRSHLvvv_4H
- 1554U, // SQRSHLvvv_4S
- 3603U, // SQRSHLvvv_8B
- 530U, // SQRSHLvvv_8H
- 2U, // SQRSHRNbhi
- 2U, // SQRSHRNhsi
- 2U, // SQRSHRNsdi
- 74U, // SQRSHRNvvi_16B
- 2U, // SQRSHRNvvi_2S
- 2U, // SQRSHRNvvi_4H
- 74U, // SQRSHRNvvi_4S
- 2U, // SQRSHRNvvi_8B
- 74U, // SQRSHRNvvi_8H
- 2U, // SQRSHRUNbhi
- 2U, // SQRSHRUNhsi
- 2U, // SQRSHRUNsdi
- 2U, // SQSHLUbbi
- 2U, // SQSHLUddi
- 2U, // SQSHLUhhi
- 2U, // SQSHLUssi
- 3U, // SQSHLUvvi_16B
- 2U, // SQSHLUvvi_2D
- 3U, // SQSHLUvvi_2S
- 3U, // SQSHLUvvi_4H
- 2U, // SQSHLUvvi_4S
- 3U, // SQSHLUvvi_8B
- 2U, // SQSHLUvvi_8H
- 2U, // SQSHLbbb
- 2U, // SQSHLbbi
- 2U, // SQSHLddd
- 2U, // SQSHLddi
- 2U, // SQSHLhhh
- 2U, // SQSHLhhi
- 2U, // SQSHLssi
- 2U, // SQSHLsss
- 3U, // SQSHLvvi_16B
- 2U, // SQSHLvvi_2D
- 3U, // SQSHLvvi_2S
- 3U, // SQSHLvvi_4H
- 2U, // SQSHLvvi_4S
- 3U, // SQSHLvvi_8B
- 2U, // SQSHLvvi_8H
- 2067U, // SQSHLvvv_16B
- 1042U, // SQSHLvvv_2D
- 2579U, // SQSHLvvv_2S
- 3091U, // SQSHLvvv_4H
- 1554U, // SQSHLvvv_4S
- 3603U, // SQSHLvvv_8B
- 530U, // SQSHLvvv_8H
- 2U, // SQSHRNbhi
- 2U, // SQSHRNhsi
- 2U, // SQSHRNsdi
- 74U, // SQSHRNvvi_16B
- 2U, // SQSHRNvvi_2S
- 2U, // SQSHRNvvi_4H
- 74U, // SQSHRNvvi_4S
- 2U, // SQSHRNvvi_8B
- 74U, // SQSHRNvvi_8H
- 2U, // SQSHRUNbhi
- 2U, // SQSHRUNhsi
- 2U, // SQSHRUNsdi
- 2U, // SQSUBbbb
- 2U, // SQSUBddd
- 2U, // SQSUBhhh
- 2U, // SQSUBsss
- 2067U, // SQSUBvvv_16B
- 1042U, // SQSUBvvv_2D
- 2579U, // SQSUBvvv_2S
- 3091U, // SQSUBvvv_4H
- 1554U, // SQSUBvvv_4S
- 3603U, // SQSUBvvv_8B
- 530U, // SQSUBvvv_8H
- 0U, // SQXTN2d2s
- 0U, // SQXTN2d4s
- 1U, // SQXTN4s4h
- 1U, // SQXTN4s8h
- 1U, // SQXTN8h16b
- 1U, // SQXTN8h8b
- 1U, // SQXTNbh
- 1U, // SQXTNhs
- 1U, // SQXTNsd
- 0U, // SQXTUN2d2s
- 0U, // SQXTUN2d4s
- 1U, // SQXTUN4s4h
- 1U, // SQXTUN4s8h
- 1U, // SQXTUN8h16b
- 1U, // SQXTUN8h8b
- 1U, // SQXTUNbh
- 1U, // SQXTUNhs
- 1U, // SQXTUNsd
- 2067U, // SRHADDvvv_16B
- 2579U, // SRHADDvvv_2S
- 3091U, // SRHADDvvv_4H
- 1554U, // SRHADDvvv_4S
- 3603U, // SRHADDvvv_8B
- 530U, // SRHADDvvv_8H
- 74U, // SRI
- 75U, // SRIvvi_16B
- 74U, // SRIvvi_2D
- 75U, // SRIvvi_2S
- 75U, // SRIvvi_4H
- 74U, // SRIvvi_4S
- 75U, // SRIvvi_8B
- 74U, // SRIvvi_8H
- 2U, // SRSHLddd
- 2067U, // SRSHLvvv_16B
- 1042U, // SRSHLvvv_2D
- 2579U, // SRSHLvvv_2S
- 3091U, // SRSHLvvv_4H
- 1554U, // SRSHLvvv_4S
- 3603U, // SRSHLvvv_8B
- 530U, // SRSHLvvv_8H
- 2U, // SRSHRddi
- 3U, // SRSHRvvi_16B
- 2U, // SRSHRvvi_2D
- 3U, // SRSHRvvi_2S
- 3U, // SRSHRvvi_4H
- 2U, // SRSHRvvi_4S
- 3U, // SRSHRvvi_8B
- 2U, // SRSHRvvi_8H
- 74U, // SRSRA
- 75U, // SRSRAvvi_16B
- 74U, // SRSRAvvi_2D
- 75U, // SRSRAvvi_2S
- 75U, // SRSRAvvi_4H
- 74U, // SRSRAvvi_4S
- 75U, // SRSRAvvi_8B
- 74U, // SRSRAvvi_8H
- 3U, // SSHLLvvi_16B
- 3U, // SSHLLvvi_2S
- 3U, // SSHLLvvi_4H
- 2U, // SSHLLvvi_4S
- 3U, // SSHLLvvi_8B
- 2U, // SSHLLvvi_8H
- 2U, // SSHLddd
- 2067U, // SSHLvvv_16B
- 1042U, // SSHLvvv_2D
- 2579U, // SSHLvvv_2S
- 3091U, // SSHLvvv_4H
- 1554U, // SSHLvvv_4S
- 3603U, // SSHLvvv_8B
- 530U, // SSHLvvv_8H
- 2U, // SSHRddi
- 3U, // SSHRvvi_16B
- 2U, // SSHRvvi_2D
- 3U, // SSHRvvi_2S
- 3U, // SSHRvvi_4H
- 2U, // SSHRvvi_4S
- 3U, // SSHRvvi_8B
- 2U, // SSHRvvi_8H
- 74U, // SSRA
- 75U, // SSRAvvi_16B
- 74U, // SSRAvvi_2D
- 75U, // SSRAvvi_2S
- 75U, // SSRAvvi_4H
- 74U, // SSRAvvi_4S
- 75U, // SSRAvvi_8B
- 74U, // SSRAvvi_8H
- 1554U, // SSUBL2vvv_2d4s
- 530U, // SSUBL2vvv_4s8h
- 2067U, // SSUBL2vvv_8h16b
- 2579U, // SSUBLvvv_2d2s
- 3091U, // SSUBLvvv_4s4h
- 3603U, // SSUBLvvv_8h8b
- 1554U, // SSUBW2vvv_2d4s
- 530U, // SSUBW2vvv_4s8h
- 2066U, // SSUBW2vvv_8h16b
- 2578U, // SSUBWvvv_2d2s
- 3090U, // SSUBWvvv_4s4h
- 3602U, // SSUBWvvv_8h8b
- 0U, // ST1LN_B
- 0U, // ST1LN_D
- 0U, // ST1LN_H
- 0U, // ST1LN_S
- 0U, // ST1LN_WB_B_fixed
- 0U, // ST1LN_WB_B_register
- 0U, // ST1LN_WB_D_fixed
- 0U, // ST1LN_WB_D_register
- 0U, // ST1LN_WB_H_fixed
- 0U, // ST1LN_WB_H_register
- 0U, // ST1LN_WB_S_fixed
- 0U, // ST1LN_WB_S_register
- 0U, // ST1WB_16B_fixed
- 0U, // ST1WB_16B_register
- 0U, // ST1WB_1D_fixed
- 0U, // ST1WB_1D_register
- 0U, // ST1WB_2D_fixed
- 0U, // ST1WB_2D_register
- 0U, // ST1WB_2S_fixed
- 0U, // ST1WB_2S_register
- 0U, // ST1WB_4H_fixed
- 0U, // ST1WB_4H_register
- 0U, // ST1WB_4S_fixed
- 0U, // ST1WB_4S_register
- 0U, // ST1WB_8B_fixed
- 0U, // ST1WB_8B_register
- 0U, // ST1WB_8H_fixed
- 0U, // ST1WB_8H_register
- 0U, // ST1_16B
- 0U, // ST1_1D
- 0U, // ST1_2D
- 0U, // ST1_2S
- 0U, // ST1_4H
- 0U, // ST1_4S
- 0U, // ST1_8B
- 0U, // ST1_8H
- 0U, // ST1x2WB_16B_fixed
- 0U, // ST1x2WB_16B_register
- 0U, // ST1x2WB_1D_fixed
- 0U, // ST1x2WB_1D_register
- 0U, // ST1x2WB_2D_fixed
- 0U, // ST1x2WB_2D_register
- 0U, // ST1x2WB_2S_fixed
- 0U, // ST1x2WB_2S_register
- 0U, // ST1x2WB_4H_fixed
- 0U, // ST1x2WB_4H_register
- 0U, // ST1x2WB_4S_fixed
- 0U, // ST1x2WB_4S_register
- 0U, // ST1x2WB_8B_fixed
- 0U, // ST1x2WB_8B_register
- 0U, // ST1x2WB_8H_fixed
- 0U, // ST1x2WB_8H_register
- 0U, // ST1x2_16B
- 0U, // ST1x2_1D
- 0U, // ST1x2_2D
- 0U, // ST1x2_2S
- 0U, // ST1x2_4H
- 0U, // ST1x2_4S
- 0U, // ST1x2_8B
- 0U, // ST1x2_8H
- 0U, // ST1x3WB_16B_fixed
- 0U, // ST1x3WB_16B_register
- 0U, // ST1x3WB_1D_fixed
- 0U, // ST1x3WB_1D_register
- 0U, // ST1x3WB_2D_fixed
- 0U, // ST1x3WB_2D_register
- 0U, // ST1x3WB_2S_fixed
- 0U, // ST1x3WB_2S_register
- 0U, // ST1x3WB_4H_fixed
- 0U, // ST1x3WB_4H_register
- 0U, // ST1x3WB_4S_fixed
- 0U, // ST1x3WB_4S_register
- 0U, // ST1x3WB_8B_fixed
- 0U, // ST1x3WB_8B_register
- 0U, // ST1x3WB_8H_fixed
- 0U, // ST1x3WB_8H_register
- 0U, // ST1x3_16B
- 0U, // ST1x3_1D
- 0U, // ST1x3_2D
- 0U, // ST1x3_2S
- 0U, // ST1x3_4H
- 0U, // ST1x3_4S
- 0U, // ST1x3_8B
- 0U, // ST1x3_8H
- 0U, // ST1x4WB_16B_fixed
- 0U, // ST1x4WB_16B_register
- 0U, // ST1x4WB_1D_fixed
- 0U, // ST1x4WB_1D_register
- 0U, // ST1x4WB_2D_fixed
- 0U, // ST1x4WB_2D_register
- 0U, // ST1x4WB_2S_fixed
- 0U, // ST1x4WB_2S_register
- 0U, // ST1x4WB_4H_fixed
- 0U, // ST1x4WB_4H_register
- 0U, // ST1x4WB_4S_fixed
- 0U, // ST1x4WB_4S_register
- 0U, // ST1x4WB_8B_fixed
- 0U, // ST1x4WB_8B_register
- 0U, // ST1x4WB_8H_fixed
- 0U, // ST1x4WB_8H_register
- 0U, // ST1x4_16B
- 0U, // ST1x4_1D
- 0U, // ST1x4_2D
- 0U, // ST1x4_2S
- 0U, // ST1x4_4H
- 0U, // ST1x4_4S
- 0U, // ST1x4_8B
- 0U, // ST1x4_8H
- 0U, // ST2LN_B
- 0U, // ST2LN_D
- 0U, // ST2LN_H
- 0U, // ST2LN_S
- 0U, // ST2LN_WB_B_fixed
- 0U, // ST2LN_WB_B_register
- 0U, // ST2LN_WB_D_fixed
- 0U, // ST2LN_WB_D_register
- 0U, // ST2LN_WB_H_fixed
- 0U, // ST2LN_WB_H_register
- 0U, // ST2LN_WB_S_fixed
- 0U, // ST2LN_WB_S_register
- 0U, // ST2WB_16B_fixed
- 0U, // ST2WB_16B_register
- 0U, // ST2WB_2D_fixed
- 0U, // ST2WB_2D_register
- 0U, // ST2WB_2S_fixed
- 0U, // ST2WB_2S_register
- 0U, // ST2WB_4H_fixed
- 0U, // ST2WB_4H_register
- 0U, // ST2WB_4S_fixed
- 0U, // ST2WB_4S_register
- 0U, // ST2WB_8B_fixed
- 0U, // ST2WB_8B_register
- 0U, // ST2WB_8H_fixed
- 0U, // ST2WB_8H_register
- 0U, // ST2_16B
- 0U, // ST2_2D
- 0U, // ST2_2S
- 0U, // ST2_4H
- 0U, // ST2_4S
- 0U, // ST2_8B
- 0U, // ST2_8H
- 0U, // ST3LN_B
- 0U, // ST3LN_D
- 0U, // ST3LN_H
- 0U, // ST3LN_S
- 0U, // ST3LN_WB_B_fixed
- 0U, // ST3LN_WB_B_register
- 0U, // ST3LN_WB_D_fixed
- 0U, // ST3LN_WB_D_register
- 0U, // ST3LN_WB_H_fixed
- 0U, // ST3LN_WB_H_register
- 0U, // ST3LN_WB_S_fixed
- 0U, // ST3LN_WB_S_register
- 0U, // ST3WB_16B_fixed
- 0U, // ST3WB_16B_register
- 0U, // ST3WB_2D_fixed
- 0U, // ST3WB_2D_register
- 0U, // ST3WB_2S_fixed
- 0U, // ST3WB_2S_register
- 0U, // ST3WB_4H_fixed
- 0U, // ST3WB_4H_register
- 0U, // ST3WB_4S_fixed
- 0U, // ST3WB_4S_register
- 0U, // ST3WB_8B_fixed
- 0U, // ST3WB_8B_register
- 0U, // ST3WB_8H_fixed
- 0U, // ST3WB_8H_register
- 0U, // ST3_16B
- 0U, // ST3_2D
- 0U, // ST3_2S
- 0U, // ST3_4H
- 0U, // ST3_4S
- 0U, // ST3_8B
- 0U, // ST3_8H
- 0U, // ST4LN_B
- 0U, // ST4LN_D
- 0U, // ST4LN_H
- 0U, // ST4LN_S
- 0U, // ST4LN_WB_B_fixed
- 0U, // ST4LN_WB_B_register
- 0U, // ST4LN_WB_D_fixed
- 0U, // ST4LN_WB_D_register
- 0U, // ST4LN_WB_H_fixed
- 0U, // ST4LN_WB_H_register
- 0U, // ST4LN_WB_S_fixed
- 0U, // ST4LN_WB_S_register
- 0U, // ST4WB_16B_fixed
- 0U, // ST4WB_16B_register
- 0U, // ST4WB_2D_fixed
- 0U, // ST4WB_2D_register
- 0U, // ST4WB_2S_fixed
- 0U, // ST4WB_2S_register
- 0U, // ST4WB_4H_fixed
- 0U, // ST4WB_4H_register
- 0U, // ST4WB_4S_fixed
- 0U, // ST4WB_4S_register
- 0U, // ST4WB_8B_fixed
- 0U, // ST4WB_8B_register
- 0U, // ST4WB_8H_fixed
- 0U, // ST4WB_8H_register
- 0U, // ST4_16B
- 0U, // ST4_2D
- 0U, // ST4_2S
- 0U, // ST4_4H
- 0U, // ST4_4S
- 0U, // ST4_8B
- 0U, // ST4_8H
- 6U, // STLR_byte
- 6U, // STLR_dword
- 6U, // STLR_hword
- 6U, // STLR_word
- 8194U, // STLXP_dword
- 8194U, // STLXP_word
- 6662U, // STLXR_byte
- 6662U, // STLXR_dword
- 6662U, // STLXR_hword
- 6662U, // STLXR_word
- 8194U, // STXP_dword
- 8194U, // STXP_word
- 6662U, // STXR_byte
- 6662U, // STXR_dword
- 6662U, // STXR_hword
- 6662U, // STXR_word
- 522U, // SUBHN2vvv_16b8h
- 1034U, // SUBHN2vvv_4s2d
- 1546U, // SUBHN2vvv_8h4s
- 1042U, // SUBHNvvv_2s2d
- 1554U, // SUBHNvvv_4h4s
- 530U, // SUBHNvvv_8b8h
- 4098U, // SUBSwww_asr
- 20482U, // SUBSwww_lsl
- 36866U, // SUBSwww_lsr
- 53250U, // SUBSwww_sxtb
- 69634U, // SUBSwww_sxth
- 86018U, // SUBSwww_sxtw
- 102402U, // SUBSwww_sxtx
- 118786U, // SUBSwww_uxtb
- 135170U, // SUBSwww_uxth
- 151554U, // SUBSwww_uxtw
- 167938U, // SUBSwww_uxtx
- 53250U, // SUBSxxw_sxtb
- 69634U, // SUBSxxw_sxth
- 86018U, // SUBSxxw_sxtw
- 118786U, // SUBSxxw_uxtb
- 135170U, // SUBSxxw_uxth
- 151554U, // SUBSxxw_uxtw
- 4098U, // SUBSxxx_asr
- 20482U, // SUBSxxx_lsl
- 36866U, // SUBSxxx_lsr
- 102402U, // SUBSxxx_sxtx
- 167938U, // SUBSxxx_uxtx
- 2U, // SUBddd
- 2067U, // SUBvvv_16B
- 1042U, // SUBvvv_2D
- 2579U, // SUBvvv_2S
- 3091U, // SUBvvv_4H
- 1554U, // SUBvvv_4S
- 3603U, // SUBvvv_8B
- 530U, // SUBvvv_8H
- 26U, // SUBwwi_lsl0_S
- 0U, // SUBwwi_lsl0_cmp
- 26U, // SUBwwi_lsl0_s
- 34U, // SUBwwi_lsl12_S
- 0U, // SUBwwi_lsl12_cmp
- 34U, // SUBwwi_lsl12_s
- 4098U, // SUBwww_asr
- 20482U, // SUBwww_lsl
- 36866U, // SUBwww_lsr
- 53250U, // SUBwww_sxtb
- 69634U, // SUBwww_sxth
- 86018U, // SUBwww_sxtw
- 102402U, // SUBwww_sxtx
- 118786U, // SUBwww_uxtb
- 135170U, // SUBwww_uxth
- 151554U, // SUBwww_uxtw
- 167938U, // SUBwww_uxtx
- 26U, // SUBxxi_lsl0_S
- 0U, // SUBxxi_lsl0_cmp
- 26U, // SUBxxi_lsl0_s
- 34U, // SUBxxi_lsl12_S
- 0U, // SUBxxi_lsl12_cmp
- 34U, // SUBxxi_lsl12_s
- 53250U, // SUBxxw_sxtb
- 69634U, // SUBxxw_sxth
- 86018U, // SUBxxw_sxtw
- 118786U, // SUBxxw_uxtb
- 135170U, // SUBxxw_uxth
- 151554U, // SUBxxw_uxtw
- 4098U, // SUBxxx_asr
- 20482U, // SUBxxx_lsl
- 36866U, // SUBxxx_lsr
- 102402U, // SUBxxx_sxtx
- 167938U, // SUBxxx_uxtx
- 0U, // SUQADD16b
- 0U, // SUQADD2d
- 0U, // SUQADD2s
- 0U, // SUQADD4h
- 1U, // SUQADD4s
- 1U, // SUQADD8b
- 1U, // SUQADD8h
- 1U, // SUQADDbb
- 1U, // SUQADDdd
- 1U, // SUQADDhh
- 1U, // SUQADDss
- 0U, // SVCi
- 1U, // SXTBww
- 1U, // SXTBxw
- 1U, // SXTHww
- 1U, // SXTHxw
- 1U, // SXTWxw
- 298U, // SYSLxicci
- 0U, // SYSiccix
- 0U, // TAIL_BRx
- 0U, // TAIL_Bimm
- 0U, // TBL1_16b
- 1U, // TBL1_8b
- 0U, // TBL2_16b
- 1U, // TBL2_8b
- 0U, // TBL3_16b
- 1U, // TBL3_8b
- 0U, // TBL4_16b
- 1U, // TBL4_8b
- 306U, // TBNZwii
- 306U, // TBNZxii
- 0U, // TBX1_16b
- 1U, // TBX1_8b
- 0U, // TBX2_16b
- 1U, // TBX2_8b
- 0U, // TBX3_16b
- 1U, // TBX3_8b
- 0U, // TBX4_16b
- 1U, // TBX4_8b
- 306U, // TBZwii
- 306U, // TBZxii
- 0U, // TC_RETURNdi
- 0U, // TC_RETURNxi
- 0U, // TLBIi
- 1U, // TLBIix
+ 0U, // RET_ReallyLR
+ 0U, // REV16Wr
+ 0U, // REV16Xr
+ 0U, // REV16v16i8
+ 0U, // REV16v8i8
+ 0U, // REV32Xr
+ 0U, // REV32v16i8
+ 0U, // REV32v4i16
+ 0U, // REV32v8i16
+ 0U, // REV32v8i8
+ 0U, // REV64v16i8
+ 0U, // REV64v2i32
+ 0U, // REV64v4i16
+ 0U, // REV64v4i32
+ 0U, // REV64v8i16
+ 0U, // REV64v8i8
+ 0U, // REVWr
+ 0U, // REVXr
+ 1U, // RORVWr
+ 1U, // RORVXr
+ 65U, // RSHRNv16i8_shift
+ 1U, // RSHRNv2i32_shift
+ 1U, // RSHRNv4i16_shift
+ 65U, // RSHRNv4i32_shift
+ 65U, // RSHRNv8i16_shift
+ 1U, // RSHRNv8i8_shift
+ 265U, // RSUBHNv2i64_v2i32
+ 273U, // RSUBHNv2i64_v4i32
+ 521U, // RSUBHNv4i32_v4i16
+ 529U, // RSUBHNv4i32_v8i16
+ 785U, // RSUBHNv8i16_v16i8
+ 777U, // RSUBHNv8i16_v8i8
+ 1041U, // SABALv16i8_v8i16
+ 1297U, // SABALv2i32_v2i64
+ 1553U, // SABALv4i16_v4i32
+ 529U, // SABALv4i32_v2i64
+ 785U, // SABALv8i16_v4i32
+ 1809U, // SABALv8i8_v8i16
+ 1041U, // SABAv16i8
+ 1297U, // SABAv2i32
+ 1553U, // SABAv4i16
+ 529U, // SABAv4i32
+ 785U, // SABAv8i16
+ 1809U, // SABAv8i8
+ 1033U, // SABDLv16i8_v8i16
+ 1289U, // SABDLv2i32_v2i64
+ 1545U, // SABDLv4i16_v4i32
+ 521U, // SABDLv4i32_v2i64
+ 777U, // SABDLv8i16_v4i32
+ 1801U, // SABDLv8i8_v8i16
+ 1033U, // SABDv16i8
+ 1289U, // SABDv2i32
+ 1545U, // SABDv4i16
+ 521U, // SABDv4i32
+ 777U, // SABDv8i16
+ 1801U, // SABDv8i8
+ 0U, // SADALPv16i8_v8i16
+ 0U, // SADALPv2i32_v1i64
+ 0U, // SADALPv4i16_v2i32
+ 0U, // SADALPv4i32_v2i64
+ 0U, // SADALPv8i16_v4i32
+ 0U, // SADALPv8i8_v4i16
+ 0U, // SADDLPv16i8_v8i16
+ 0U, // SADDLPv2i32_v1i64
+ 0U, // SADDLPv4i16_v2i32
+ 0U, // SADDLPv4i32_v2i64
+ 0U, // SADDLPv8i16_v4i32
+ 0U, // SADDLPv8i8_v4i16
+ 0U, // SADDLVv16i8v
+ 0U, // SADDLVv4i16v
+ 0U, // SADDLVv4i32v
+ 0U, // SADDLVv8i16v
+ 0U, // SADDLVv8i8v
+ 1033U, // SADDLv16i8_v8i16
+ 1289U, // SADDLv2i32_v2i64
+ 1545U, // SADDLv4i16_v4i32
+ 521U, // SADDLv4i32_v2i64
+ 777U, // SADDLv8i16_v4i32
+ 1801U, // SADDLv8i8_v8i16
+ 1033U, // SADDWv16i8_v8i16
+ 1289U, // SADDWv2i32_v2i64
+ 1545U, // SADDWv4i16_v4i32
+ 521U, // SADDWv4i32_v2i64
+ 777U, // SADDWv8i16_v4i32
+ 1801U, // SADDWv8i8_v8i16
+ 1U, // SBCSWr
+ 1U, // SBCSXr
+ 1U, // SBCWr
+ 1U, // SBCXr
+ 18689U, // SBFMWri
+ 18689U, // SBFMXri
+ 1U, // SCVTFSWDri
+ 1U, // SCVTFSWSri
+ 1U, // SCVTFSXDri
+ 1U, // SCVTFSXSri
+ 0U, // SCVTFUWDri
+ 0U, // SCVTFUWSri
+ 0U, // SCVTFUXDri
+ 0U, // SCVTFUXSri
+ 1U, // SCVTFd
+ 1U, // SCVTFs
+ 0U, // SCVTFv1i32
+ 0U, // SCVTFv1i64
+ 0U, // SCVTFv2f32
+ 0U, // SCVTFv2f64
+ 1U, // SCVTFv2i32_shift
+ 1U, // SCVTFv2i64_shift
+ 0U, // SCVTFv4f32
+ 1U, // SCVTFv4i32_shift
+ 1U, // SDIVWr
+ 1U, // SDIVXr
+ 1U, // SDIV_IntWr
+ 1U, // SDIV_IntXr
+ 529U, // SHA1Crrr
+ 0U, // SHA1Hrr
+ 529U, // SHA1Mrrr
+ 529U, // SHA1Prrr
+ 529U, // SHA1SU0rrr
+ 0U, // SHA1SU1rr
+ 529U, // SHA256H2rrr
+ 529U, // SHA256Hrrr
+ 0U, // SHA256SU0rr
+ 529U, // SHA256SU1rrr
+ 1033U, // SHADDv16i8
+ 1289U, // SHADDv2i32
+ 1545U, // SHADDv4i16
+ 521U, // SHADDv4i32
+ 777U, // SHADDv8i16
+ 1801U, // SHADDv8i8
+ 4U, // SHLLv16i8
+ 4U, // SHLLv2i32
+ 4U, // SHLLv4i16
+ 4U, // SHLLv4i32
+ 5U, // SHLLv8i16
+ 5U, // SHLLv8i8
+ 1U, // SHLd
+ 1U, // SHLv16i8_shift
+ 1U, // SHLv2i32_shift
+ 1U, // SHLv2i64_shift
+ 1U, // SHLv4i16_shift
+ 1U, // SHLv4i32_shift
+ 1U, // SHLv8i16_shift
+ 1U, // SHLv8i8_shift
+ 65U, // SHRNv16i8_shift
+ 1U, // SHRNv2i32_shift
+ 1U, // SHRNv4i16_shift
+ 65U, // SHRNv4i32_shift
+ 65U, // SHRNv8i16_shift
+ 1U, // SHRNv8i8_shift
+ 1033U, // SHSUBv16i8
+ 1289U, // SHSUBv2i32
+ 1545U, // SHSUBv4i16
+ 521U, // SHSUBv4i32
+ 777U, // SHSUBv8i16
+ 1801U, // SHSUBv8i8
+ 65U, // SLId
+ 65U, // SLIv16i8_shift
+ 65U, // SLIv2i32_shift
+ 65U, // SLIv2i64_shift
+ 65U, // SLIv4i16_shift
+ 65U, // SLIv4i32_shift
+ 65U, // SLIv8i16_shift
+ 65U, // SLIv8i8_shift
+ 18689U, // SMADDLrrr
+ 1033U, // SMAXPv16i8
+ 1289U, // SMAXPv2i32
+ 1545U, // SMAXPv4i16
+ 521U, // SMAXPv4i32
+ 777U, // SMAXPv8i16
+ 1801U, // SMAXPv8i8
+ 0U, // SMAXVv16i8v
+ 0U, // SMAXVv4i16v
+ 0U, // SMAXVv4i32v
+ 0U, // SMAXVv8i16v
+ 0U, // SMAXVv8i8v
+ 1033U, // SMAXv16i8
+ 1289U, // SMAXv2i32
+ 1545U, // SMAXv4i16
+ 521U, // SMAXv4i32
+ 777U, // SMAXv8i16
+ 1801U, // SMAXv8i8
+ 0U, // SMC
+ 1033U, // SMINPv16i8
+ 1289U, // SMINPv2i32
+ 1545U, // SMINPv4i16
+ 521U, // SMINPv4i32
+ 777U, // SMINPv8i16
+ 1801U, // SMINPv8i8
+ 0U, // SMINVv16i8v
+ 0U, // SMINVv4i16v
+ 0U, // SMINVv4i32v
+ 0U, // SMINVv8i16v
+ 0U, // SMINVv8i8v
+ 1033U, // SMINv16i8
+ 1289U, // SMINv2i32
+ 1545U, // SMINv4i16
+ 521U, // SMINv4i32
+ 777U, // SMINv8i16
+ 1801U, // SMINv8i8
+ 1041U, // SMLALv16i8_v8i16
+ 27665U, // SMLALv2i32_indexed
+ 1297U, // SMLALv2i32_v2i64
+ 28945U, // SMLALv4i16_indexed
+ 1553U, // SMLALv4i16_v4i32
+ 27665U, // SMLALv4i32_indexed
+ 529U, // SMLALv4i32_v2i64
+ 28945U, // SMLALv8i16_indexed
+ 785U, // SMLALv8i16_v4i32
+ 1809U, // SMLALv8i8_v8i16
+ 1041U, // SMLSLv16i8_v8i16
+ 27665U, // SMLSLv2i32_indexed
+ 1297U, // SMLSLv2i32_v2i64
+ 28945U, // SMLSLv4i16_indexed
+ 1553U, // SMLSLv4i16_v4i32
+ 27665U, // SMLSLv4i32_indexed
+ 529U, // SMLSLv4i32_v2i64
+ 28945U, // SMLSLv8i16_indexed
+ 785U, // SMLSLv8i16_v4i32
+ 1809U, // SMLSLv8i8_v8i16
+ 75U, // SMOVvi16to32
+ 75U, // SMOVvi16to64
+ 75U, // SMOVvi32to64
+ 75U, // SMOVvi8to32
+ 75U, // SMOVvi8to64
+ 18689U, // SMSUBLrrr
+ 1U, // SMULHrr
+ 1033U, // SMULLv16i8_v8i16
+ 35849U, // SMULLv2i32_indexed
+ 1289U, // SMULLv2i32_v2i64
+ 37129U, // SMULLv4i16_indexed
+ 1545U, // SMULLv4i16_v4i32
+ 35849U, // SMULLv4i32_indexed
+ 521U, // SMULLv4i32_v2i64
+ 37129U, // SMULLv8i16_indexed
+ 777U, // SMULLv8i16_v4i32
+ 1801U, // SMULLv8i8_v8i16
+ 0U, // SQABSv16i8
+ 0U, // SQABSv1i16
+ 0U, // SQABSv1i32
+ 0U, // SQABSv1i64
+ 0U, // SQABSv1i8
+ 0U, // SQABSv2i32
+ 0U, // SQABSv2i64
+ 0U, // SQABSv4i16
+ 0U, // SQABSv4i32
+ 0U, // SQABSv8i16
+ 0U, // SQABSv8i8
+ 1033U, // SQADDv16i8
+ 1U, // SQADDv1i16
+ 1U, // SQADDv1i32
+ 1U, // SQADDv1i64
+ 1U, // SQADDv1i8
+ 1289U, // SQADDv2i32
+ 265U, // SQADDv2i64
+ 1545U, // SQADDv4i16
+ 521U, // SQADDv4i32
+ 777U, // SQADDv8i16
+ 1801U, // SQADDv8i8
+ 65U, // SQDMLALi16
+ 65U, // SQDMLALi32
+ 28945U, // SQDMLALv1i32_indexed
+ 27665U, // SQDMLALv1i64_indexed
+ 27665U, // SQDMLALv2i32_indexed
+ 1297U, // SQDMLALv2i32_v2i64
+ 28945U, // SQDMLALv4i16_indexed
+ 1553U, // SQDMLALv4i16_v4i32
+ 27665U, // SQDMLALv4i32_indexed
+ 529U, // SQDMLALv4i32_v2i64
+ 28945U, // SQDMLALv8i16_indexed
+ 785U, // SQDMLALv8i16_v4i32
+ 65U, // SQDMLSLi16
+ 65U, // SQDMLSLi32
+ 28945U, // SQDMLSLv1i32_indexed
+ 27665U, // SQDMLSLv1i64_indexed
+ 27665U, // SQDMLSLv2i32_indexed
+ 1297U, // SQDMLSLv2i32_v2i64
+ 28945U, // SQDMLSLv4i16_indexed
+ 1553U, // SQDMLSLv4i16_v4i32
+ 27665U, // SQDMLSLv4i32_indexed
+ 529U, // SQDMLSLv4i32_v2i64
+ 28945U, // SQDMLSLv8i16_indexed
+ 785U, // SQDMLSLv8i16_v4i32
+ 1U, // SQDMULHv1i16
+ 37129U, // SQDMULHv1i16_indexed
+ 1U, // SQDMULHv1i32
+ 35849U, // SQDMULHv1i32_indexed
+ 1289U, // SQDMULHv2i32
+ 35849U, // SQDMULHv2i32_indexed
+ 1545U, // SQDMULHv4i16
+ 37129U, // SQDMULHv4i16_indexed
+ 521U, // SQDMULHv4i32
+ 35849U, // SQDMULHv4i32_indexed
+ 777U, // SQDMULHv8i16
+ 37129U, // SQDMULHv8i16_indexed
+ 1U, // SQDMULLi16
+ 1U, // SQDMULLi32
+ 37129U, // SQDMULLv1i32_indexed
+ 35849U, // SQDMULLv1i64_indexed
+ 35849U, // SQDMULLv2i32_indexed
+ 1289U, // SQDMULLv2i32_v2i64
+ 37129U, // SQDMULLv4i16_indexed
+ 1545U, // SQDMULLv4i16_v4i32
+ 35849U, // SQDMULLv4i32_indexed
+ 521U, // SQDMULLv4i32_v2i64
+ 37129U, // SQDMULLv8i16_indexed
+ 777U, // SQDMULLv8i16_v4i32
+ 0U, // SQNEGv16i8
+ 0U, // SQNEGv1i16
+ 0U, // SQNEGv1i32
+ 0U, // SQNEGv1i64
+ 0U, // SQNEGv1i8
+ 0U, // SQNEGv2i32
+ 0U, // SQNEGv2i64
+ 0U, // SQNEGv4i16
+ 0U, // SQNEGv4i32
+ 0U, // SQNEGv8i16
+ 0U, // SQNEGv8i8
+ 1U, // SQRDMULHv1i16
+ 37129U, // SQRDMULHv1i16_indexed
+ 1U, // SQRDMULHv1i32
+ 35849U, // SQRDMULHv1i32_indexed
+ 1289U, // SQRDMULHv2i32
+ 35849U, // SQRDMULHv2i32_indexed
+ 1545U, // SQRDMULHv4i16
+ 37129U, // SQRDMULHv4i16_indexed
+ 521U, // SQRDMULHv4i32
+ 35849U, // SQRDMULHv4i32_indexed
+ 777U, // SQRDMULHv8i16
+ 37129U, // SQRDMULHv8i16_indexed
+ 1033U, // SQRSHLv16i8
+ 1U, // SQRSHLv1i16
+ 1U, // SQRSHLv1i32
+ 1U, // SQRSHLv1i64
+ 1U, // SQRSHLv1i8
+ 1289U, // SQRSHLv2i32
+ 265U, // SQRSHLv2i64
+ 1545U, // SQRSHLv4i16
+ 521U, // SQRSHLv4i32
+ 777U, // SQRSHLv8i16
+ 1801U, // SQRSHLv8i8
+ 1U, // SQRSHRNb
+ 1U, // SQRSHRNh
+ 1U, // SQRSHRNs
+ 65U, // SQRSHRNv16i8_shift
+ 1U, // SQRSHRNv2i32_shift
+ 1U, // SQRSHRNv4i16_shift
+ 65U, // SQRSHRNv4i32_shift
+ 65U, // SQRSHRNv8i16_shift
+ 1U, // SQRSHRNv8i8_shift
+ 1U, // SQRSHRUNb
+ 1U, // SQRSHRUNh
+ 1U, // SQRSHRUNs
+ 65U, // SQRSHRUNv16i8_shift
+ 1U, // SQRSHRUNv2i32_shift
+ 1U, // SQRSHRUNv4i16_shift
+ 65U, // SQRSHRUNv4i32_shift
+ 65U, // SQRSHRUNv8i16_shift
+ 1U, // SQRSHRUNv8i8_shift
+ 1U, // SQSHLUb
+ 1U, // SQSHLUd
+ 1U, // SQSHLUh
+ 1U, // SQSHLUs
+ 1U, // SQSHLUv16i8_shift
+ 1U, // SQSHLUv2i32_shift
+ 1U, // SQSHLUv2i64_shift
+ 1U, // SQSHLUv4i16_shift
+ 1U, // SQSHLUv4i32_shift
+ 1U, // SQSHLUv8i16_shift
+ 1U, // SQSHLUv8i8_shift
+ 1U, // SQSHLb
+ 1U, // SQSHLd
+ 1U, // SQSHLh
+ 1U, // SQSHLs
+ 1033U, // SQSHLv16i8
+ 1U, // SQSHLv16i8_shift
+ 1U, // SQSHLv1i16
+ 1U, // SQSHLv1i32
+ 1U, // SQSHLv1i64
+ 1U, // SQSHLv1i8
+ 1289U, // SQSHLv2i32
+ 1U, // SQSHLv2i32_shift
+ 265U, // SQSHLv2i64
+ 1U, // SQSHLv2i64_shift
+ 1545U, // SQSHLv4i16
+ 1U, // SQSHLv4i16_shift
+ 521U, // SQSHLv4i32
+ 1U, // SQSHLv4i32_shift
+ 777U, // SQSHLv8i16
+ 1U, // SQSHLv8i16_shift
+ 1801U, // SQSHLv8i8
+ 1U, // SQSHLv8i8_shift
+ 1U, // SQSHRNb
+ 1U, // SQSHRNh
+ 1U, // SQSHRNs
+ 65U, // SQSHRNv16i8_shift
+ 1U, // SQSHRNv2i32_shift
+ 1U, // SQSHRNv4i16_shift
+ 65U, // SQSHRNv4i32_shift
+ 65U, // SQSHRNv8i16_shift
+ 1U, // SQSHRNv8i8_shift
+ 1U, // SQSHRUNb
+ 1U, // SQSHRUNh
+ 1U, // SQSHRUNs
+ 65U, // SQSHRUNv16i8_shift
+ 1U, // SQSHRUNv2i32_shift
+ 1U, // SQSHRUNv4i16_shift
+ 65U, // SQSHRUNv4i32_shift
+ 65U, // SQSHRUNv8i16_shift
+ 1U, // SQSHRUNv8i8_shift
+ 1033U, // SQSUBv16i8
+ 1U, // SQSUBv1i16
+ 1U, // SQSUBv1i32
+ 1U, // SQSUBv1i64
+ 1U, // SQSUBv1i8
+ 1289U, // SQSUBv2i32
+ 265U, // SQSUBv2i64
+ 1545U, // SQSUBv4i16
+ 521U, // SQSUBv4i32
+ 777U, // SQSUBv8i16
+ 1801U, // SQSUBv8i8
+ 0U, // SQXTNv16i8
+ 0U, // SQXTNv1i16
+ 0U, // SQXTNv1i32
+ 0U, // SQXTNv1i8
+ 0U, // SQXTNv2i32
+ 0U, // SQXTNv4i16
+ 0U, // SQXTNv4i32
+ 0U, // SQXTNv8i16
+ 0U, // SQXTNv8i8
+ 0U, // SQXTUNv16i8
+ 0U, // SQXTUNv1i16
+ 0U, // SQXTUNv1i32
+ 0U, // SQXTUNv1i8
+ 0U, // SQXTUNv2i32
+ 0U, // SQXTUNv4i16
+ 0U, // SQXTUNv4i32
+ 0U, // SQXTUNv8i16
+ 0U, // SQXTUNv8i8
+ 1033U, // SRHADDv16i8
+ 1289U, // SRHADDv2i32
+ 1545U, // SRHADDv4i16
+ 521U, // SRHADDv4i32
+ 777U, // SRHADDv8i16
+ 1801U, // SRHADDv8i8
+ 65U, // SRId
+ 65U, // SRIv16i8_shift
+ 65U, // SRIv2i32_shift
+ 65U, // SRIv2i64_shift
+ 65U, // SRIv4i16_shift
+ 65U, // SRIv4i32_shift
+ 65U, // SRIv8i16_shift
+ 65U, // SRIv8i8_shift
+ 1033U, // SRSHLv16i8
+ 1U, // SRSHLv1i64
+ 1289U, // SRSHLv2i32
+ 265U, // SRSHLv2i64
+ 1545U, // SRSHLv4i16
+ 521U, // SRSHLv4i32
+ 777U, // SRSHLv8i16
+ 1801U, // SRSHLv8i8
+ 1U, // SRSHRd
+ 1U, // SRSHRv16i8_shift
+ 1U, // SRSHRv2i32_shift
+ 1U, // SRSHRv2i64_shift
+ 1U, // SRSHRv4i16_shift
+ 1U, // SRSHRv4i32_shift
+ 1U, // SRSHRv8i16_shift
+ 1U, // SRSHRv8i8_shift
+ 65U, // SRSRAd
+ 65U, // SRSRAv16i8_shift
+ 65U, // SRSRAv2i32_shift
+ 65U, // SRSRAv2i64_shift
+ 65U, // SRSRAv4i16_shift
+ 65U, // SRSRAv4i32_shift
+ 65U, // SRSRAv8i16_shift
+ 65U, // SRSRAv8i8_shift
+ 1U, // SSHLLv16i8_shift
+ 1U, // SSHLLv2i32_shift
+ 1U, // SSHLLv4i16_shift
+ 1U, // SSHLLv4i32_shift
+ 1U, // SSHLLv8i16_shift
+ 1U, // SSHLLv8i8_shift
+ 1033U, // SSHLv16i8
+ 1U, // SSHLv1i64
+ 1289U, // SSHLv2i32
+ 265U, // SSHLv2i64
+ 1545U, // SSHLv4i16
+ 521U, // SSHLv4i32
+ 777U, // SSHLv8i16
+ 1801U, // SSHLv8i8
+ 1U, // SSHRd
+ 1U, // SSHRv16i8_shift
+ 1U, // SSHRv2i32_shift
+ 1U, // SSHRv2i64_shift
+ 1U, // SSHRv4i16_shift
+ 1U, // SSHRv4i32_shift
+ 1U, // SSHRv8i16_shift
+ 1U, // SSHRv8i8_shift
+ 65U, // SSRAd
+ 65U, // SSRAv16i8_shift
+ 65U, // SSRAv2i32_shift
+ 65U, // SSRAv2i64_shift
+ 65U, // SSRAv4i16_shift
+ 65U, // SSRAv4i32_shift
+ 65U, // SSRAv8i16_shift
+ 65U, // SSRAv8i8_shift
+ 1033U, // SSUBLv16i8_v8i16
+ 1289U, // SSUBLv2i32_v2i64
+ 1545U, // SSUBLv4i16_v4i32
+ 521U, // SSUBLv4i32_v2i64
+ 777U, // SSUBLv8i16_v4i32
+ 1801U, // SSUBLv8i8_v8i16
+ 1033U, // SSUBWv16i8_v8i16
+ 1289U, // SSUBWv2i32_v2i64
+ 1545U, // SSUBWv4i16_v4i32
+ 521U, // SSUBWv4i32_v2i64
+ 777U, // SSUBWv8i16_v4i32
+ 1801U, // SSUBWv8i8_v8i16
+ 0U, // ST1Fourv16b
+ 0U, // ST1Fourv16b_POST
+ 0U, // ST1Fourv1d
+ 0U, // ST1Fourv1d_POST
+ 0U, // ST1Fourv2d
+ 0U, // ST1Fourv2d_POST
+ 0U, // ST1Fourv2s
+ 0U, // ST1Fourv2s_POST
+ 0U, // ST1Fourv4h
+ 0U, // ST1Fourv4h_POST
+ 0U, // ST1Fourv4s
+ 0U, // ST1Fourv4s_POST
+ 0U, // ST1Fourv8b
+ 0U, // ST1Fourv8b_POST
+ 0U, // ST1Fourv8h
+ 0U, // ST1Fourv8h_POST
+ 0U, // ST1Onev16b
+ 0U, // ST1Onev16b_POST
+ 0U, // ST1Onev1d
+ 0U, // ST1Onev1d_POST
+ 0U, // ST1Onev2d
+ 0U, // ST1Onev2d_POST
+ 0U, // ST1Onev2s
+ 0U, // ST1Onev2s_POST
+ 0U, // ST1Onev4h
+ 0U, // ST1Onev4h_POST
+ 0U, // ST1Onev4s
+ 0U, // ST1Onev4s_POST
+ 0U, // ST1Onev8b
+ 0U, // ST1Onev8b_POST
+ 0U, // ST1Onev8h
+ 0U, // ST1Onev8h_POST
+ 0U, // ST1Threev16b
+ 0U, // ST1Threev16b_POST
+ 0U, // ST1Threev1d
+ 0U, // ST1Threev1d_POST
+ 0U, // ST1Threev2d
+ 0U, // ST1Threev2d_POST
+ 0U, // ST1Threev2s
+ 0U, // ST1Threev2s_POST
+ 0U, // ST1Threev4h
+ 0U, // ST1Threev4h_POST
+ 0U, // ST1Threev4s
+ 0U, // ST1Threev4s_POST
+ 0U, // ST1Threev8b
+ 0U, // ST1Threev8b_POST
+ 0U, // ST1Threev8h
+ 0U, // ST1Threev8h_POST
+ 0U, // ST1Twov16b
+ 0U, // ST1Twov16b_POST
+ 0U, // ST1Twov1d
+ 0U, // ST1Twov1d_POST
+ 0U, // ST1Twov2d
+ 0U, // ST1Twov2d_POST
+ 0U, // ST1Twov2s
+ 0U, // ST1Twov2s_POST
+ 0U, // ST1Twov4h
+ 0U, // ST1Twov4h_POST
+ 0U, // ST1Twov4s
+ 0U, // ST1Twov4s_POST
+ 0U, // ST1Twov8b
+ 0U, // ST1Twov8b_POST
+ 0U, // ST1Twov8h
+ 0U, // ST1Twov8h_POST
+ 0U, // ST1i16
+ 0U, // ST1i16_POST
+ 0U, // ST1i32
+ 0U, // ST1i32_POST
+ 0U, // ST1i64
+ 0U, // ST1i64_POST
+ 0U, // ST1i8
+ 0U, // ST1i8_POST
+ 0U, // ST2Twov16b
+ 0U, // ST2Twov16b_POST
+ 0U, // ST2Twov2d
+ 0U, // ST2Twov2d_POST
+ 0U, // ST2Twov2s
+ 0U, // ST2Twov2s_POST
+ 0U, // ST2Twov4h
+ 0U, // ST2Twov4h_POST
+ 0U, // ST2Twov4s
+ 0U, // ST2Twov4s_POST
+ 0U, // ST2Twov8b
+ 0U, // ST2Twov8b_POST
+ 0U, // ST2Twov8h
+ 0U, // ST2Twov8h_POST
+ 0U, // ST2i16
+ 0U, // ST2i16_POST
+ 0U, // ST2i32
+ 0U, // ST2i32_POST
+ 0U, // ST2i64
+ 0U, // ST2i64_POST
+ 0U, // ST2i8
+ 0U, // ST2i8_POST
+ 0U, // ST3Threev16b
+ 0U, // ST3Threev16b_POST
+ 0U, // ST3Threev2d
+ 0U, // ST3Threev2d_POST
+ 0U, // ST3Threev2s
+ 0U, // ST3Threev2s_POST
+ 0U, // ST3Threev4h
+ 0U, // ST3Threev4h_POST
+ 0U, // ST3Threev4s
+ 0U, // ST3Threev4s_POST
+ 0U, // ST3Threev8b
+ 0U, // ST3Threev8b_POST
+ 0U, // ST3Threev8h
+ 0U, // ST3Threev8h_POST
+ 0U, // ST3i16
+ 0U, // ST3i16_POST
+ 0U, // ST3i32
+ 0U, // ST3i32_POST
+ 0U, // ST3i64
+ 0U, // ST3i64_POST
+ 0U, // ST3i8
+ 0U, // ST3i8_POST
+ 0U, // ST4Fourv16b
+ 0U, // ST4Fourv16b_POST
+ 0U, // ST4Fourv2d
+ 0U, // ST4Fourv2d_POST
+ 0U, // ST4Fourv2s
+ 0U, // ST4Fourv2s_POST
+ 0U, // ST4Fourv4h
+ 0U, // ST4Fourv4h_POST
+ 0U, // ST4Fourv4s
+ 0U, // ST4Fourv4s_POST
+ 0U, // ST4Fourv8b
+ 0U, // ST4Fourv8b_POST
+ 0U, // ST4Fourv8h
+ 0U, // ST4Fourv8h_POST
+ 0U, // ST4i16
+ 0U, // ST4i16_POST
+ 0U, // ST4i32
+ 0U, // ST4i32_POST
+ 0U, // ST4i64
+ 0U, // ST4i64_POST
+ 0U, // ST4i8
+ 0U, // ST4i8_POST
+ 4U, // STLRB
+ 4U, // STLRH
+ 4U, // STLRW
+ 4U, // STLRX
+ 4609U, // STLXPW
+ 4609U, // STLXPX
+ 3588U, // STLXRB
+ 3588U, // STLXRH
+ 3588U, // STLXRW
+ 3588U, // STLXRX
+ 43268U, // STNPDi
+ 51460U, // STNPQi
+ 59652U, // STNPSi
+ 59652U, // STNPWi
+ 43268U, // STNPXi
+ 43268U, // STPDi
+ 69444U, // STPDpost
+ 330052U, // STPDpre
+ 51460U, // STPQi
+ 77636U, // STPQpost
+ 338244U, // STPQpre
+ 59652U, // STPSi
+ 85828U, // STPSpost
+ 346436U, // STPSpre
+ 59652U, // STPWi
+ 85828U, // STPWpost
+ 346436U, // STPWpre
+ 43268U, // STPXi
+ 69444U, // STPXpost
+ 330052U, // STPXpre
+ 4U, // STRBBpost
+ 4161U, // STRBBpre
+ 92417U, // STRBBroW
+ 100609U, // STRBBroX
+ 89U, // STRBBui
+ 4U, // STRBpost
+ 4161U, // STRBpre
+ 92417U, // STRBroW
+ 100609U, // STRBroX
+ 89U, // STRBui
+ 4U, // STRDpost
+ 4161U, // STRDpre
+ 108801U, // STRDroW
+ 116993U, // STRDroX
+ 97U, // STRDui
+ 4U, // STRHHpost
+ 4161U, // STRHHpre
+ 125185U, // STRHHroW
+ 133377U, // STRHHroX
+ 105U, // STRHHui
+ 4U, // STRHpost
+ 4161U, // STRHpre
+ 125185U, // STRHroW
+ 133377U, // STRHroX
+ 105U, // STRHui
+ 4U, // STRQpost
+ 4161U, // STRQpre
+ 141569U, // STRQroW
+ 149761U, // STRQroX
+ 113U, // STRQui
+ 4U, // STRSpost
+ 4161U, // STRSpre
+ 157953U, // STRSroW
+ 166145U, // STRSroX
+ 121U, // STRSui
+ 4U, // STRWpost
+ 4161U, // STRWpre
+ 157953U, // STRWroW
+ 166145U, // STRWroX
+ 121U, // STRWui
+ 4U, // STRXpost
+ 4161U, // STRXpre
+ 108801U, // STRXroW
+ 116993U, // STRXroX
+ 97U, // STRXui
+ 3585U, // STTRBi
+ 3585U, // STTRHi
+ 3585U, // STTRWi
+ 3585U, // STTRXi
+ 3585U, // STURBBi
+ 3585U, // STURBi
+ 3585U, // STURDi
+ 3585U, // STURHHi
+ 3585U, // STURHi
+ 3585U, // STURQi
+ 3585U, // STURSi
+ 3585U, // STURWi
+ 3585U, // STURXi
+ 4609U, // STXPW
+ 4609U, // STXPX
+ 3588U, // STXRB
+ 3588U, // STXRH
+ 3588U, // STXRW
+ 3588U, // STXRX
+ 265U, // SUBHNv2i64_v2i32
+ 273U, // SUBHNv2i64_v4i32
+ 521U, // SUBHNv4i32_v4i16
+ 529U, // SUBHNv4i32_v8i16
+ 785U, // SUBHNv8i16_v16i8
+ 777U, // SUBHNv8i16_v8i8
+ 25U, // SUBSWri
+ 0U, // SUBSWrr
+ 33U, // SUBSWrs
+ 41U, // SUBSWrx
+ 25U, // SUBSXri
+ 0U, // SUBSXrr
+ 33U, // SUBSXrs
+ 41U, // SUBSXrx
+ 2049U, // SUBSXrx64
+ 25U, // SUBWri
+ 0U, // SUBWrr
+ 33U, // SUBWrs
+ 41U, // SUBWrx
+ 25U, // SUBXri
+ 0U, // SUBXrr
+ 33U, // SUBXrs
+ 41U, // SUBXrx
+ 2049U, // SUBXrx64
+ 1033U, // SUBv16i8
+ 1U, // SUBv1i64
+ 1289U, // SUBv2i32
+ 265U, // SUBv2i64
+ 1545U, // SUBv4i16
+ 521U, // SUBv4i32
+ 777U, // SUBv8i16
+ 1801U, // SUBv8i8
+ 0U, // SUQADDv16i8
+ 0U, // SUQADDv1i16
+ 0U, // SUQADDv1i32
+ 0U, // SUQADDv1i64
+ 0U, // SUQADDv1i8
+ 0U, // SUQADDv2i32
+ 0U, // SUQADDv2i64
+ 0U, // SUQADDv4i16
+ 0U, // SUQADDv4i32
+ 0U, // SUQADDv8i16
+ 0U, // SUQADDv8i8
+ 0U, // SVC
+ 129U, // SYSLxt
+ 0U, // SYSxt
+ 0U, // TBLv16i8Four
+ 0U, // TBLv16i8One
+ 0U, // TBLv16i8Three
+ 0U, // TBLv16i8Two
+ 0U, // TBLv8i8Four
+ 0U, // TBLv8i8One
+ 0U, // TBLv8i8Three
+ 0U, // TBLv8i8Two
+ 137U, // TBNZW
+ 137U, // TBNZX
+ 0U, // TBXv16i8Four
+ 0U, // TBXv16i8One
+ 0U, // TBXv16i8Three
+ 0U, // TBXv16i8Two
+ 0U, // TBXv8i8Four
+ 0U, // TBXv8i8One
+ 0U, // TBXv8i8Three
+ 0U, // TBXv8i8Two
+ 137U, // TBZW
+ 137U, // TBZX
+ 0U, // TCRETURNdi
+ 0U, // TCRETURNri
0U, // TLSDESCCALL
- 0U, // TLSDESC_BLRx
- 2067U, // TRN1vvv_16b
- 1042U, // TRN1vvv_2d
- 2579U, // TRN1vvv_2s
- 3091U, // TRN1vvv_4h
- 1554U, // TRN1vvv_4s
- 3603U, // TRN1vvv_8b
- 530U, // TRN1vvv_8h
- 2067U, // TRN2vvv_16b
- 1042U, // TRN2vvv_2d
- 2579U, // TRN2vvv_2s
- 3091U, // TRN2vvv_4h
- 1554U, // TRN2vvv_4s
- 3603U, // TRN2vvv_8b
- 530U, // TRN2vvv_8h
- 90U, // TSTww_asr
- 98U, // TSTww_lsl
- 106U, // TSTww_lsr
- 274U, // TSTww_ror
- 90U, // TSTxx_asr
- 98U, // TSTxx_lsl
- 106U, // TSTxx_lsr
- 274U, // TSTxx_ror
- 1546U, // UABAL2vvv_2d2s
- 522U, // UABAL2vvv_4s4h
- 2059U, // UABAL2vvv_8h8b
- 2571U, // UABALvvv_2d2s
- 3083U, // UABALvvv_4s4h
- 3595U, // UABALvvv_8h8b
- 2059U, // UABAvvv_16B
- 2571U, // UABAvvv_2S
- 3083U, // UABAvvv_4H
- 1546U, // UABAvvv_4S
- 3595U, // UABAvvv_8B
- 522U, // UABAvvv_8H
- 1554U, // UABDL2vvv_2d2s
- 530U, // UABDL2vvv_4s4h
- 2067U, // UABDL2vvv_8h8b
- 2579U, // UABDLvvv_2d2s
- 3091U, // UABDLvvv_4s4h
- 3603U, // UABDLvvv_8h8b
- 2067U, // UABDvvv_16B
- 2579U, // UABDvvv_2S
- 3091U, // UABDvvv_4H
- 1554U, // UABDvvv_4S
- 3603U, // UABDvvv_8B
- 530U, // UABDvvv_8H
- 0U, // UADALP16b8h
- 0U, // UADALP2s1d
- 0U, // UADALP4h2s
- 1U, // UADALP4s2d
- 1U, // UADALP8b4h
- 1U, // UADALP8h4s
- 1554U, // UADDL2vvv_2d4s
- 530U, // UADDL2vvv_4s8h
- 2067U, // UADDL2vvv_8h16b
- 0U, // UADDLP16b8h
- 0U, // UADDLP2s1d
- 0U, // UADDLP4h2s
- 1U, // UADDLP4s2d
- 1U, // UADDLP8b4h
- 1U, // UADDLP8h4s
- 1U, // UADDLV_1d4s
- 0U, // UADDLV_1h16b
- 1U, // UADDLV_1h8b
- 0U, // UADDLV_1s4h
- 1U, // UADDLV_1s8h
- 2579U, // UADDLvvv_2d2s
- 3091U, // UADDLvvv_4s4h
- 3603U, // UADDLvvv_8h8b
- 1554U, // UADDW2vvv_2d4s
- 530U, // UADDW2vvv_4s8h
- 2066U, // UADDW2vvv_8h16b
- 2578U, // UADDWvvv_2d2s
- 3090U, // UADDWvvv_4s4h
- 3602U, // UADDWvvv_8h8b
- 282U, // UBFIZwwii
- 290U, // UBFIZxxii
- 249858U, // UBFMwwii
- 249858U, // UBFMxxii
- 561154U, // UBFXwwii
- 561154U, // UBFXxxii
- 0U, // UCVTF_2d
- 0U, // UCVTF_2s
- 1U, // UCVTF_4s
- 2U, // UCVTF_Nddi
- 2U, // UCVTF_Nssi
- 1U, // UCVTFdd
- 1U, // UCVTFdw
- 194U, // UCVTFdwi
- 1U, // UCVTFdx
- 194U, // UCVTFdxi
- 1U, // UCVTFss
- 1U, // UCVTFsw
- 194U, // UCVTFswi
- 1U, // UCVTFsx
- 194U, // UCVTFsxi
- 2U, // UDIVwww
- 2U, // UDIVxxx
- 2067U, // UHADDvvv_16B
- 2579U, // UHADDvvv_2S
- 3091U, // UHADDvvv_4H
- 1554U, // UHADDvvv_4S
- 3603U, // UHADDvvv_8B
- 530U, // UHADDvvv_8H
- 2067U, // UHSUBvvv_16B
- 2579U, // UHSUBvvv_2S
- 3091U, // UHSUBvvv_4H
- 1554U, // UHSUBvvv_4S
- 3603U, // UHSUBvvv_8B
- 530U, // UHSUBvvv_8H
- 249858U, // UMADDLxwwx
- 2067U, // UMAXPvvv_16B
- 2579U, // UMAXPvvv_2S
- 3091U, // UMAXPvvv_4H
- 1554U, // UMAXPvvv_4S
- 3603U, // UMAXPvvv_8B
- 530U, // UMAXPvvv_8H
- 0U, // UMAXV_1b16b
- 1U, // UMAXV_1b8b
- 0U, // UMAXV_1h4h
- 1U, // UMAXV_1h8h
- 1U, // UMAXV_1s4s
- 2067U, // UMAXvvv_16B
- 2579U, // UMAXvvv_2S
- 3091U, // UMAXvvv_4H
- 1554U, // UMAXvvv_4S
- 3603U, // UMAXvvv_8B
- 530U, // UMAXvvv_8H
- 2067U, // UMINPvvv_16B
- 2579U, // UMINPvvv_2S
- 3091U, // UMINPvvv_4H
- 1554U, // UMINPvvv_4S
- 3603U, // UMINPvvv_8B
- 530U, // UMINPvvv_8H
- 0U, // UMINV_1b16b
- 1U, // UMINV_1b8b
- 0U, // UMINV_1h4h
- 1U, // UMINV_1h8h
- 1U, // UMINV_1s4s
- 2067U, // UMINvvv_16B
- 2579U, // UMINvvv_2S
- 3091U, // UMINvvv_4H
- 1554U, // UMINvvv_4S
- 3603U, // UMINvvv_8B
- 530U, // UMINvvv_8H
- 1546U, // UMLAL2vvv_2d4s
- 522U, // UMLAL2vvv_4s8h
- 2059U, // UMLAL2vvv_8h16b
- 268299U, // UMLALvve_2d2s
- 268298U, // UMLALvve_2d4s
- 269835U, // UMLALvve_4s4h
- 269834U, // UMLALvve_4s8h
- 2571U, // UMLALvvv_2d2s
- 3083U, // UMLALvvv_4s4h
- 3595U, // UMLALvvv_8h8b
- 1546U, // UMLSL2vvv_2d4s
- 522U, // UMLSL2vvv_4s8h
- 2059U, // UMLSL2vvv_8h16b
- 268299U, // UMLSLvve_2d2s
- 268298U, // UMLSLvve_2d4s
- 269835U, // UMLSLvve_4s4h
- 269834U, // UMLSLvve_4s8h
- 2571U, // UMLSLvvv_2d2s
- 3083U, // UMLSLvvv_4s4h
- 3595U, // UMLSLvvv_8h8b
- 180U, // UMOVwb
- 181U, // UMOVwh
- 181U, // UMOVws
- 180U, // UMOVxd
- 249858U, // UMSUBLxwwx
- 2U, // UMULHxxx
- 1554U, // UMULL2vvv_2d4s
- 530U, // UMULL2vvv_4s8h
- 2067U, // UMULL2vvv_8h16b
- 284691U, // UMULLve_2d2s
- 284690U, // UMULLve_2d4s
- 286227U, // UMULLve_4s4h
- 286226U, // UMULLve_4s8h
- 2579U, // UMULLvvv_2d2s
- 3091U, // UMULLvvv_4s4h
- 3603U, // UMULLvvv_8h8b
- 2U, // UQADDbbb
- 2U, // UQADDddd
- 2U, // UQADDhhh
- 2U, // UQADDsss
- 2067U, // UQADDvvv_16B
- 1042U, // UQADDvvv_2D
- 2579U, // UQADDvvv_2S
- 3091U, // UQADDvvv_4H
- 1554U, // UQADDvvv_4S
- 3603U, // UQADDvvv_8B
- 530U, // UQADDvvv_8H
- 2U, // UQRSHLbbb
- 2U, // UQRSHLddd
- 2U, // UQRSHLhhh
- 2U, // UQRSHLsss
- 2067U, // UQRSHLvvv_16B
- 1042U, // UQRSHLvvv_2D
- 2579U, // UQRSHLvvv_2S
- 3091U, // UQRSHLvvv_4H
- 1554U, // UQRSHLvvv_4S
- 3603U, // UQRSHLvvv_8B
- 530U, // UQRSHLvvv_8H
- 2U, // UQRSHRNbhi
- 2U, // UQRSHRNhsi
- 2U, // UQRSHRNsdi
- 74U, // UQRSHRNvvi_16B
- 2U, // UQRSHRNvvi_2S
- 2U, // UQRSHRNvvi_4H
- 74U, // UQRSHRNvvi_4S
- 2U, // UQRSHRNvvi_8B
- 74U, // UQRSHRNvvi_8H
- 2U, // UQSHLbbb
- 2U, // UQSHLbbi
- 2U, // UQSHLddd
- 2U, // UQSHLddi
- 2U, // UQSHLhhh
- 2U, // UQSHLhhi
- 2U, // UQSHLssi
- 2U, // UQSHLsss
- 3U, // UQSHLvvi_16B
- 2U, // UQSHLvvi_2D
- 3U, // UQSHLvvi_2S
- 3U, // UQSHLvvi_4H
- 2U, // UQSHLvvi_4S
- 3U, // UQSHLvvi_8B
- 2U, // UQSHLvvi_8H
- 2067U, // UQSHLvvv_16B
- 1042U, // UQSHLvvv_2D
- 2579U, // UQSHLvvv_2S
- 3091U, // UQSHLvvv_4H
- 1554U, // UQSHLvvv_4S
- 3603U, // UQSHLvvv_8B
- 530U, // UQSHLvvv_8H
- 2U, // UQSHRNbhi
- 2U, // UQSHRNhsi
- 2U, // UQSHRNsdi
- 74U, // UQSHRNvvi_16B
- 2U, // UQSHRNvvi_2S
- 2U, // UQSHRNvvi_4H
- 74U, // UQSHRNvvi_4S
- 2U, // UQSHRNvvi_8B
- 74U, // UQSHRNvvi_8H
- 2U, // UQSUBbbb
- 2U, // UQSUBddd
- 2U, // UQSUBhhh
- 2U, // UQSUBsss
- 2067U, // UQSUBvvv_16B
- 1042U, // UQSUBvvv_2D
- 2579U, // UQSUBvvv_2S
- 3091U, // UQSUBvvv_4H
- 1554U, // UQSUBvvv_4S
- 3603U, // UQSUBvvv_8B
- 530U, // UQSUBvvv_8H
- 0U, // UQXTN2d2s
- 0U, // UQXTN2d4s
- 1U, // UQXTN4s4h
- 1U, // UQXTN4s8h
- 1U, // UQXTN8h16b
- 1U, // UQXTN8h8b
- 1U, // UQXTNbh
- 1U, // UQXTNhs
- 1U, // UQXTNsd
- 0U, // URECPE2s
- 1U, // URECPE4s
- 2067U, // URHADDvvv_16B
- 2579U, // URHADDvvv_2S
- 3091U, // URHADDvvv_4H
- 1554U, // URHADDvvv_4S
- 3603U, // URHADDvvv_8B
- 530U, // URHADDvvv_8H
- 2U, // URSHLddd
- 2067U, // URSHLvvv_16B
- 1042U, // URSHLvvv_2D
- 2579U, // URSHLvvv_2S
- 3091U, // URSHLvvv_4H
- 1554U, // URSHLvvv_4S
- 3603U, // URSHLvvv_8B
- 530U, // URSHLvvv_8H
- 2U, // URSHRddi
- 3U, // URSHRvvi_16B
- 2U, // URSHRvvi_2D
- 3U, // URSHRvvi_2S
- 3U, // URSHRvvi_4H
- 2U, // URSHRvvi_4S
- 3U, // URSHRvvi_8B
- 2U, // URSHRvvi_8H
- 0U, // URSQRTE2s
- 1U, // URSQRTE4s
- 74U, // URSRA
- 75U, // URSRAvvi_16B
- 74U, // URSRAvvi_2D
- 75U, // URSRAvvi_2S
- 75U, // URSRAvvi_4H
- 74U, // URSRAvvi_4S
- 75U, // URSRAvvi_8B
- 74U, // URSRAvvi_8H
- 3U, // USHLLvvi_16B
- 3U, // USHLLvvi_2S
- 3U, // USHLLvvi_4H
- 2U, // USHLLvvi_4S
- 3U, // USHLLvvi_8B
- 2U, // USHLLvvi_8H
- 2U, // USHLddd
- 2067U, // USHLvvv_16B
- 1042U, // USHLvvv_2D
- 2579U, // USHLvvv_2S
- 3091U, // USHLvvv_4H
- 1554U, // USHLvvv_4S
- 3603U, // USHLvvv_8B
- 530U, // USHLvvv_8H
- 2U, // USHRddi
- 3U, // USHRvvi_16B
- 2U, // USHRvvi_2D
- 3U, // USHRvvi_2S
- 3U, // USHRvvi_4H
- 2U, // USHRvvi_4S
- 3U, // USHRvvi_8B
- 2U, // USHRvvi_8H
- 0U, // USQADD16b
- 0U, // USQADD2d
- 0U, // USQADD2s
- 0U, // USQADD4h
- 1U, // USQADD4s
- 1U, // USQADD8b
- 1U, // USQADD8h
- 1U, // USQADDbb
- 1U, // USQADDdd
- 1U, // USQADDhh
- 1U, // USQADDss
- 74U, // USRA
- 75U, // USRAvvi_16B
- 74U, // USRAvvi_2D
- 75U, // USRAvvi_2S
- 75U, // USRAvvi_4H
- 74U, // USRAvvi_4S
- 75U, // USRAvvi_8B
- 74U, // USRAvvi_8H
- 1554U, // USUBL2vvv_2d4s
- 530U, // USUBL2vvv_4s8h
- 2067U, // USUBL2vvv_8h16b
- 2579U, // USUBLvvv_2d2s
- 3091U, // USUBLvvv_4s4h
- 3603U, // USUBLvvv_8h8b
- 1554U, // USUBW2vvv_2d4s
- 530U, // USUBW2vvv_4s8h
- 2066U, // USUBW2vvv_8h16b
- 2578U, // USUBWvvv_2d2s
- 3090U, // USUBWvvv_4s4h
- 3602U, // USUBWvvv_8h8b
- 1U, // UXTBww
- 1U, // UXTBxw
- 1U, // UXTHww
- 1U, // UXTHxw
- 2067U, // UZP1vvv_16b
- 1042U, // UZP1vvv_2d
- 2579U, // UZP1vvv_2s
- 3091U, // UZP1vvv_4h
- 1554U, // UZP1vvv_4s
- 3603U, // UZP1vvv_8b
- 530U, // UZP1vvv_8h
- 2067U, // UZP2vvv_16b
- 1042U, // UZP2vvv_2d
- 2579U, // UZP2vvv_2s
- 3091U, // UZP2vvv_4h
- 1554U, // UZP2vvv_4s
- 3603U, // UZP2vvv_8b
- 530U, // UZP2vvv_8h
- 2U, // VCVTf2xs_2D
- 3U, // VCVTf2xs_2S
- 2U, // VCVTf2xs_4S
- 2U, // VCVTf2xu_2D
- 3U, // VCVTf2xu_2S
- 2U, // VCVTf2xu_4S
- 2U, // VCVTxs2f_2D
- 3U, // VCVTxs2f_2S
- 2U, // VCVTxs2f_4S
- 2U, // VCVTxu2f_2D
- 3U, // VCVTxu2f_2S
- 2U, // VCVTxu2f_4S
- 0U, // XTN2d2s
- 0U, // XTN2d4s
- 1U, // XTN4s4h
- 1U, // XTN4s8h
- 1U, // XTN8h16b
- 1U, // XTN8h8b
- 2067U, // ZIP1vvv_16b
- 1042U, // ZIP1vvv_2d
- 2579U, // ZIP1vvv_2s
- 3091U, // ZIP1vvv_4h
- 1554U, // ZIP1vvv_4s
- 3603U, // ZIP1vvv_8b
- 530U, // ZIP1vvv_8h
- 2067U, // ZIP2vvv_16b
- 1042U, // ZIP2vvv_2d
- 2579U, // ZIP2vvv_2s
- 3091U, // ZIP2vvv_4h
- 1554U, // ZIP2vvv_4s
- 3603U, // ZIP2vvv_8b
- 530U, // ZIP2vvv_8h
+ 0U, // TLSDESC_BLR
+ 1033U, // TRN1v16i8
+ 1289U, // TRN1v2i32
+ 265U, // TRN1v2i64
+ 1545U, // TRN1v4i16
+ 521U, // TRN1v4i32
+ 777U, // TRN1v8i16
+ 1801U, // TRN1v8i8
+ 1033U, // TRN2v16i8
+ 1289U, // TRN2v2i32
+ 265U, // TRN2v2i64
+ 1545U, // TRN2v4i16
+ 521U, // TRN2v4i32
+ 777U, // TRN2v8i16
+ 1801U, // TRN2v8i8
+ 1041U, // UABALv16i8_v8i16
+ 1297U, // UABALv2i32_v2i64
+ 1553U, // UABALv4i16_v4i32
+ 529U, // UABALv4i32_v2i64
+ 785U, // UABALv8i16_v4i32
+ 1809U, // UABALv8i8_v8i16
+ 1041U, // UABAv16i8
+ 1297U, // UABAv2i32
+ 1553U, // UABAv4i16
+ 529U, // UABAv4i32
+ 785U, // UABAv8i16
+ 1809U, // UABAv8i8
+ 1033U, // UABDLv16i8_v8i16
+ 1289U, // UABDLv2i32_v2i64
+ 1545U, // UABDLv4i16_v4i32
+ 521U, // UABDLv4i32_v2i64
+ 777U, // UABDLv8i16_v4i32
+ 1801U, // UABDLv8i8_v8i16
+ 1033U, // UABDv16i8
+ 1289U, // UABDv2i32
+ 1545U, // UABDv4i16
+ 521U, // UABDv4i32
+ 777U, // UABDv8i16
+ 1801U, // UABDv8i8
+ 0U, // UADALPv16i8_v8i16
+ 0U, // UADALPv2i32_v1i64
+ 0U, // UADALPv4i16_v2i32
+ 0U, // UADALPv4i32_v2i64
+ 0U, // UADALPv8i16_v4i32
+ 0U, // UADALPv8i8_v4i16
+ 0U, // UADDLPv16i8_v8i16
+ 0U, // UADDLPv2i32_v1i64
+ 0U, // UADDLPv4i16_v2i32
+ 0U, // UADDLPv4i32_v2i64
+ 0U, // UADDLPv8i16_v4i32
+ 0U, // UADDLPv8i8_v4i16
+ 0U, // UADDLVv16i8v
+ 0U, // UADDLVv4i16v
+ 0U, // UADDLVv4i32v
+ 0U, // UADDLVv8i16v
+ 0U, // UADDLVv8i8v
+ 1033U, // UADDLv16i8_v8i16
+ 1289U, // UADDLv2i32_v2i64
+ 1545U, // UADDLv4i16_v4i32
+ 521U, // UADDLv4i32_v2i64
+ 777U, // UADDLv8i16_v4i32
+ 1801U, // UADDLv8i8_v8i16
+ 1033U, // UADDWv16i8_v8i16
+ 1289U, // UADDWv2i32_v2i64
+ 1545U, // UADDWv4i16_v4i32
+ 521U, // UADDWv4i32_v2i64
+ 777U, // UADDWv8i16_v4i32
+ 1801U, // UADDWv8i8_v8i16
+ 18689U, // UBFMWri
+ 18689U, // UBFMXri
+ 1U, // UCVTFSWDri
+ 1U, // UCVTFSWSri
+ 1U, // UCVTFSXDri
+ 1U, // UCVTFSXSri
+ 0U, // UCVTFUWDri
+ 0U, // UCVTFUWSri
+ 0U, // UCVTFUXDri
+ 0U, // UCVTFUXSri
+ 1U, // UCVTFd
+ 1U, // UCVTFs
+ 0U, // UCVTFv1i32
+ 0U, // UCVTFv1i64
+ 0U, // UCVTFv2f32
+ 0U, // UCVTFv2f64
+ 1U, // UCVTFv2i32_shift
+ 1U, // UCVTFv2i64_shift
+ 0U, // UCVTFv4f32
+ 1U, // UCVTFv4i32_shift
+ 1U, // UDIVWr
+ 1U, // UDIVXr
+ 1U, // UDIV_IntWr
+ 1U, // UDIV_IntXr
+ 1033U, // UHADDv16i8
+ 1289U, // UHADDv2i32
+ 1545U, // UHADDv4i16
+ 521U, // UHADDv4i32
+ 777U, // UHADDv8i16
+ 1801U, // UHADDv8i8
+ 1033U, // UHSUBv16i8
+ 1289U, // UHSUBv2i32
+ 1545U, // UHSUBv4i16
+ 521U, // UHSUBv4i32
+ 777U, // UHSUBv8i16
+ 1801U, // UHSUBv8i8
+ 18689U, // UMADDLrrr
+ 1033U, // UMAXPv16i8
+ 1289U, // UMAXPv2i32
+ 1545U, // UMAXPv4i16
+ 521U, // UMAXPv4i32
+ 777U, // UMAXPv8i16
+ 1801U, // UMAXPv8i8
+ 0U, // UMAXVv16i8v
+ 0U, // UMAXVv4i16v
+ 0U, // UMAXVv4i32v
+ 0U, // UMAXVv8i16v
+ 0U, // UMAXVv8i8v
+ 1033U, // UMAXv16i8
+ 1289U, // UMAXv2i32
+ 1545U, // UMAXv4i16
+ 521U, // UMAXv4i32
+ 777U, // UMAXv8i16
+ 1801U, // UMAXv8i8
+ 1033U, // UMINPv16i8
+ 1289U, // UMINPv2i32
+ 1545U, // UMINPv4i16
+ 521U, // UMINPv4i32
+ 777U, // UMINPv8i16
+ 1801U, // UMINPv8i8
+ 0U, // UMINVv16i8v
+ 0U, // UMINVv4i16v
+ 0U, // UMINVv4i32v
+ 0U, // UMINVv8i16v
+ 0U, // UMINVv8i8v
+ 1033U, // UMINv16i8
+ 1289U, // UMINv2i32
+ 1545U, // UMINv4i16
+ 521U, // UMINv4i32
+ 777U, // UMINv8i16
+ 1801U, // UMINv8i8
+ 1041U, // UMLALv16i8_v8i16
+ 27665U, // UMLALv2i32_indexed
+ 1297U, // UMLALv2i32_v2i64
+ 28945U, // UMLALv4i16_indexed
+ 1553U, // UMLALv4i16_v4i32
+ 27665U, // UMLALv4i32_indexed
+ 529U, // UMLALv4i32_v2i64
+ 28945U, // UMLALv8i16_indexed
+ 785U, // UMLALv8i16_v4i32
+ 1809U, // UMLALv8i8_v8i16
+ 1041U, // UMLSLv16i8_v8i16
+ 27665U, // UMLSLv2i32_indexed
+ 1297U, // UMLSLv2i32_v2i64
+ 28945U, // UMLSLv4i16_indexed
+ 1553U, // UMLSLv4i16_v4i32
+ 27665U, // UMLSLv4i32_indexed
+ 529U, // UMLSLv4i32_v2i64
+ 28945U, // UMLSLv8i16_indexed
+ 785U, // UMLSLv8i16_v4i32
+ 1809U, // UMLSLv8i8_v8i16
+ 75U, // UMOVvi16
+ 75U, // UMOVvi32
+ 75U, // UMOVvi64
+ 75U, // UMOVvi8
+ 18689U, // UMSUBLrrr
+ 1U, // UMULHrr
+ 1033U, // UMULLv16i8_v8i16
+ 35849U, // UMULLv2i32_indexed
+ 1289U, // UMULLv2i32_v2i64
+ 37129U, // UMULLv4i16_indexed
+ 1545U, // UMULLv4i16_v4i32
+ 35849U, // UMULLv4i32_indexed
+ 521U, // UMULLv4i32_v2i64
+ 37129U, // UMULLv8i16_indexed
+ 777U, // UMULLv8i16_v4i32
+ 1801U, // UMULLv8i8_v8i16
+ 1033U, // UQADDv16i8
+ 1U, // UQADDv1i16
+ 1U, // UQADDv1i32
+ 1U, // UQADDv1i64
+ 1U, // UQADDv1i8
+ 1289U, // UQADDv2i32
+ 265U, // UQADDv2i64
+ 1545U, // UQADDv4i16
+ 521U, // UQADDv4i32
+ 777U, // UQADDv8i16
+ 1801U, // UQADDv8i8
+ 1033U, // UQRSHLv16i8
+ 1U, // UQRSHLv1i16
+ 1U, // UQRSHLv1i32
+ 1U, // UQRSHLv1i64
+ 1U, // UQRSHLv1i8
+ 1289U, // UQRSHLv2i32
+ 265U, // UQRSHLv2i64
+ 1545U, // UQRSHLv4i16
+ 521U, // UQRSHLv4i32
+ 777U, // UQRSHLv8i16
+ 1801U, // UQRSHLv8i8
+ 1U, // UQRSHRNb
+ 1U, // UQRSHRNh
+ 1U, // UQRSHRNs
+ 65U, // UQRSHRNv16i8_shift
+ 1U, // UQRSHRNv2i32_shift
+ 1U, // UQRSHRNv4i16_shift
+ 65U, // UQRSHRNv4i32_shift
+ 65U, // UQRSHRNv8i16_shift
+ 1U, // UQRSHRNv8i8_shift
+ 1U, // UQSHLb
+ 1U, // UQSHLd
+ 1U, // UQSHLh
+ 1U, // UQSHLs
+ 1033U, // UQSHLv16i8
+ 1U, // UQSHLv16i8_shift
+ 1U, // UQSHLv1i16
+ 1U, // UQSHLv1i32
+ 1U, // UQSHLv1i64
+ 1U, // UQSHLv1i8
+ 1289U, // UQSHLv2i32
+ 1U, // UQSHLv2i32_shift
+ 265U, // UQSHLv2i64
+ 1U, // UQSHLv2i64_shift
+ 1545U, // UQSHLv4i16
+ 1U, // UQSHLv4i16_shift
+ 521U, // UQSHLv4i32
+ 1U, // UQSHLv4i32_shift
+ 777U, // UQSHLv8i16
+ 1U, // UQSHLv8i16_shift
+ 1801U, // UQSHLv8i8
+ 1U, // UQSHLv8i8_shift
+ 1U, // UQSHRNb
+ 1U, // UQSHRNh
+ 1U, // UQSHRNs
+ 65U, // UQSHRNv16i8_shift
+ 1U, // UQSHRNv2i32_shift
+ 1U, // UQSHRNv4i16_shift
+ 65U, // UQSHRNv4i32_shift
+ 65U, // UQSHRNv8i16_shift
+ 1U, // UQSHRNv8i8_shift
+ 1033U, // UQSUBv16i8
+ 1U, // UQSUBv1i16
+ 1U, // UQSUBv1i32
+ 1U, // UQSUBv1i64
+ 1U, // UQSUBv1i8
+ 1289U, // UQSUBv2i32
+ 265U, // UQSUBv2i64
+ 1545U, // UQSUBv4i16
+ 521U, // UQSUBv4i32
+ 777U, // UQSUBv8i16
+ 1801U, // UQSUBv8i8
+ 0U, // UQXTNv16i8
+ 0U, // UQXTNv1i16
+ 0U, // UQXTNv1i32
+ 0U, // UQXTNv1i8
+ 0U, // UQXTNv2i32
+ 0U, // UQXTNv4i16
+ 0U, // UQXTNv4i32
+ 0U, // UQXTNv8i16
+ 0U, // UQXTNv8i8
+ 0U, // URECPEv2i32
+ 0U, // URECPEv4i32
+ 1033U, // URHADDv16i8
+ 1289U, // URHADDv2i32
+ 1545U, // URHADDv4i16
+ 521U, // URHADDv4i32
+ 777U, // URHADDv8i16
+ 1801U, // URHADDv8i8
+ 1033U, // URSHLv16i8
+ 1U, // URSHLv1i64
+ 1289U, // URSHLv2i32
+ 265U, // URSHLv2i64
+ 1545U, // URSHLv4i16
+ 521U, // URSHLv4i32
+ 777U, // URSHLv8i16
+ 1801U, // URSHLv8i8
+ 1U, // URSHRd
+ 1U, // URSHRv16i8_shift
+ 1U, // URSHRv2i32_shift
+ 1U, // URSHRv2i64_shift
+ 1U, // URSHRv4i16_shift
+ 1U, // URSHRv4i32_shift
+ 1U, // URSHRv8i16_shift
+ 1U, // URSHRv8i8_shift
+ 0U, // URSQRTEv2i32
+ 0U, // URSQRTEv4i32
+ 65U, // URSRAd
+ 65U, // URSRAv16i8_shift
+ 65U, // URSRAv2i32_shift
+ 65U, // URSRAv2i64_shift
+ 65U, // URSRAv4i16_shift
+ 65U, // URSRAv4i32_shift
+ 65U, // URSRAv8i16_shift
+ 65U, // URSRAv8i8_shift
+ 1U, // USHLLv16i8_shift
+ 1U, // USHLLv2i32_shift
+ 1U, // USHLLv4i16_shift
+ 1U, // USHLLv4i32_shift
+ 1U, // USHLLv8i16_shift
+ 1U, // USHLLv8i8_shift
+ 1033U, // USHLv16i8
+ 1U, // USHLv1i64
+ 1289U, // USHLv2i32
+ 265U, // USHLv2i64
+ 1545U, // USHLv4i16
+ 521U, // USHLv4i32
+ 777U, // USHLv8i16
+ 1801U, // USHLv8i8
+ 1U, // USHRd
+ 1U, // USHRv16i8_shift
+ 1U, // USHRv2i32_shift
+ 1U, // USHRv2i64_shift
+ 1U, // USHRv4i16_shift
+ 1U, // USHRv4i32_shift
+ 1U, // USHRv8i16_shift
+ 1U, // USHRv8i8_shift
+ 0U, // USQADDv16i8
+ 0U, // USQADDv1i16
+ 0U, // USQADDv1i32
+ 0U, // USQADDv1i64
+ 0U, // USQADDv1i8
+ 0U, // USQADDv2i32
+ 0U, // USQADDv2i64
+ 0U, // USQADDv4i16
+ 0U, // USQADDv4i32
+ 0U, // USQADDv8i16
+ 0U, // USQADDv8i8
+ 65U, // USRAd
+ 65U, // USRAv16i8_shift
+ 65U, // USRAv2i32_shift
+ 65U, // USRAv2i64_shift
+ 65U, // USRAv4i16_shift
+ 65U, // USRAv4i32_shift
+ 65U, // USRAv8i16_shift
+ 65U, // USRAv8i8_shift
+ 1033U, // USUBLv16i8_v8i16
+ 1289U, // USUBLv2i32_v2i64
+ 1545U, // USUBLv4i16_v4i32
+ 521U, // USUBLv4i32_v2i64
+ 777U, // USUBLv8i16_v4i32
+ 1801U, // USUBLv8i8_v8i16
+ 1033U, // USUBWv16i8_v8i16
+ 1289U, // USUBWv2i32_v2i64
+ 1545U, // USUBWv4i16_v4i32
+ 521U, // USUBWv4i32_v2i64
+ 777U, // USUBWv8i16_v4i32
+ 1801U, // USUBWv8i8_v8i16
+ 1033U, // UZP1v16i8
+ 1289U, // UZP1v2i32
+ 265U, // UZP1v2i64
+ 1545U, // UZP1v4i16
+ 521U, // UZP1v4i32
+ 777U, // UZP1v8i16
+ 1801U, // UZP1v8i8
+ 1033U, // UZP2v16i8
+ 1289U, // UZP2v2i32
+ 265U, // UZP2v2i64
+ 1545U, // UZP2v4i16
+ 521U, // UZP2v4i32
+ 777U, // UZP2v8i16
+ 1801U, // UZP2v8i8
+ 0U, // XTNv16i8
+ 0U, // XTNv2i32
+ 0U, // XTNv4i16
+ 0U, // XTNv4i32
+ 0U, // XTNv8i16
+ 0U, // XTNv8i8
+ 1033U, // ZIP1v16i8
+ 1289U, // ZIP1v2i32
+ 265U, // ZIP1v2i64
+ 1545U, // ZIP1v4i16
+ 521U, // ZIP1v4i32
+ 777U, // ZIP1v8i16
+ 1801U, // ZIP1v8i8
+ 1033U, // ZIP2v16i8
+ 1289U, // ZIP2v2i32
+ 265U, // ZIP2v2i64
+ 1545U, // ZIP2v4i16
+ 521U, // ZIP2v4i32
+ 777U, // ZIP2v8i16
+ 1801U, // ZIP2v8i8
0U
};
@@ -5680,320 +4890,304 @@
/* 661 */ 'l', 'd', 'r', 's', 'b', 9, 0,
/* 668 */ 'l', 'd', 't', 'r', 's', 'b', 9, 0,
/* 676 */ 'l', 'd', 'u', 'r', 's', 'b', 9, 0,
- /* 684 */ 's', 'x', 't', 'b', 9, 0,
- /* 690 */ 'u', 'x', 't', 'b', 9, 0,
- /* 696 */ 'f', 's', 'u', 'b', 9, 0,
- /* 702 */ 's', 'h', 's', 'u', 'b', 9, 0,
- /* 709 */ 'u', 'h', 's', 'u', 'b', 9, 0,
- /* 716 */ 'f', 'm', 's', 'u', 'b', 9, 0,
- /* 723 */ 'f', 'n', 'm', 's', 'u', 'b', 9, 0,
- /* 731 */ 's', 'q', 's', 'u', 'b', 9, 0,
- /* 738 */ 'u', 'q', 's', 'u', 'b', 9, 0,
- /* 745 */ 's', 'h', 'a', '1', 'c', 9, 0,
- /* 752 */ 's', 'b', 'c', 9, 0,
- /* 757 */ 'a', 'd', 'c', 9, 0,
- /* 762 */ 'b', 'i', 'c', 9, 0,
- /* 767 */ 'a', 'e', 's', 'i', 'm', 'c', 9, 0,
- /* 775 */ 'a', 'e', 's', 'm', 'c', 9, 0,
- /* 782 */ 'c', 's', 'i', 'n', 'c', 9, 0,
- /* 789 */ 'h', 'v', 'c', 9, 0,
- /* 794 */ 's', 'v', 'c', 9, 0,
- /* 799 */ 'f', 'a', 'b', 'd', 9, 0,
- /* 805 */ 's', 'a', 'b', 'd', 9, 0,
- /* 811 */ 'u', 'a', 'b', 'd', 9, 0,
- /* 817 */ 'f', 'a', 'd', 'd', 9, 0,
- /* 823 */ 's', 'r', 'h', 'a', 'd', 'd', 9, 0,
- /* 831 */ 'u', 'r', 'h', 'a', 'd', 'd', 9, 0,
- /* 839 */ 's', 'h', 'a', 'd', 'd', 9, 0,
- /* 846 */ 'u', 'h', 'a', 'd', 'd', 9, 0,
- /* 853 */ 'f', 'm', 'a', 'd', 'd', 9, 0,
- /* 860 */ 'f', 'n', 'm', 'a', 'd', 'd', 9, 0,
- /* 868 */ 'u', 's', 'q', 'a', 'd', 'd', 9, 0,
- /* 876 */ 's', 'u', 'q', 'a', 'd', 'd', 9, 0,
- /* 884 */ 'a', 'n', 'd', 9, 0,
- /* 889 */ 'a', 'e', 's', 'd', 9, 0,
- /* 895 */ 'f', 'a', 'c', 'g', 'e', 9, 0,
- /* 902 */ 'f', 'c', 'm', 'g', 'e', 9, 0,
- /* 909 */ 'f', 'c', 'm', 'l', 'e', 9, 0,
- /* 916 */ 'f', 'r', 'e', 'c', 'p', 'e', 9, 0,
- /* 924 */ 'u', 'r', 'e', 'c', 'p', 'e', 9, 0,
- /* 932 */ 'f', 'c', 'c', 'm', 'p', 'e', 9, 0,
- /* 940 */ 'f', 'c', 'm', 'p', 'e', 9, 0,
- /* 947 */ 'a', 'e', 's', 'e', 9, 0,
- /* 953 */ 'f', 'r', 's', 'q', 'r', 't', 'e', 9, 0,
- /* 962 */ 'u', 'r', 's', 'q', 'r', 't', 'e', 9, 0,
- /* 971 */ 'b', 'i', 'f', 9, 0,
- /* 976 */ 's', 'c', 'v', 't', 'f', 9, 0,
- /* 983 */ 'u', 'c', 'v', 't', 'f', 9, 0,
- /* 990 */ 'f', 'n', 'e', 'g', 9, 0,
- /* 996 */ 's', 'q', 'n', 'e', 'g', 9, 0,
- /* 1003 */ 'c', 's', 'n', 'e', 'g', 9, 0,
- /* 1010 */ 's', 'h', 'a', '1', 'h', 9, 0,
- /* 1017 */ 'c', 'r', 'c', '3', '2', 'h', 9, 0,
- /* 1025 */ 's', 'h', 'a', '2', '5', '6', 'h', 9, 0,
- /* 1034 */ 'c', 'r', 'c', '3', '2', 'c', 'h', 9, 0,
- /* 1043 */ 's', 'q', 'd', 'm', 'u', 'l', 'h', 9, 0,
- /* 1052 */ 's', 'q', 'r', 'd', 'm', 'u', 'l', 'h', 9, 0,
- /* 1062 */ 's', 'm', 'u', 'l', 'h', 9, 0,
- /* 1069 */ 'u', 'm', 'u', 'l', 'h', 9, 0,
- /* 1076 */ 'l', 'd', 'a', 'r', 'h', 9, 0,
- /* 1083 */ 'l', 'd', 'r', 'h', 9, 0,
- /* 1089 */ 's', 't', 'l', 'r', 'h', 9, 0,
- /* 1096 */ 'l', 'd', 't', 'r', 'h', 9, 0,
- /* 1103 */ 's', 't', 'r', 'h', 9, 0,
- /* 1109 */ 's', 't', 't', 'r', 'h', 9, 0,
- /* 1116 */ 'l', 'd', 'u', 'r', 'h', 9, 0,
- /* 1123 */ 's', 't', 'u', 'r', 'h', 9, 0,
- /* 1130 */ 'l', 'd', 'a', 'x', 'r', 'h', 9, 0,
- /* 1138 */ 'l', 'd', 'x', 'r', 'h', 9, 0,
- /* 1145 */ 's', 't', 'l', 'x', 'r', 'h', 9, 0,
- /* 1153 */ 's', 't', 'x', 'r', 'h', 9, 0,
- /* 1160 */ 'l', 'd', 'r', 's', 'h', 9, 0,
- /* 1167 */ 'l', 'd', 't', 'r', 's', 'h', 9, 0,
- /* 1175 */ 'l', 'd', 'u', 'r', 's', 'h', 9, 0,
- /* 1183 */ 's', 'x', 't', 'h', 9, 0,
- /* 1189 */ 'u', 'x', 't', 'h', 9, 0,
- /* 1195 */ 't', 'l', 'b', 'i', 9, 0,
- /* 1201 */ 'b', 'f', 'i', 9, 0,
- /* 1206 */ 'c', 'm', 'h', 'i', 9, 0,
- /* 1212 */ 's', 'l', 'i', 9, 0,
- /* 1217 */ 'm', 'v', 'n', 'i', 9, 0,
- /* 1223 */ 's', 'r', 'i', 9, 0,
- /* 1228 */ 'f', 'r', 'i', 'n', 't', 'i', 9, 0,
- /* 1236 */ 'm', 'o', 'v', 'i', 9, 0,
- /* 1242 */ 'b', 'r', 'k', 9, 0,
- /* 1247 */ 'm', 'o', 'v', 'k', 9, 0,
- /* 1253 */ 's', 'a', 'b', 'a', 'l', 9, 0,
- /* 1260 */ 'u', 'a', 'b', 'a', 'l', 9, 0,
- /* 1267 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', 9, 0,
- /* 1276 */ 's', 'm', 'l', 'a', 'l', 9, 0,
- /* 1283 */ 'u', 'm', 'l', 'a', 'l', 9, 0,
- /* 1290 */ 't', 'b', 'l', 9, 0,
- /* 1295 */ 's', 'm', 's', 'u', 'b', 'l', 9, 0,
- /* 1303 */ 'u', 'm', 's', 'u', 'b', 'l', 9, 0,
- /* 1311 */ 's', 's', 'u', 'b', 'l', 9, 0,
- /* 1318 */ 'u', 's', 'u', 'b', 'l', 9, 0,
- /* 1325 */ 's', 'a', 'b', 'd', 'l', 9, 0,
- /* 1332 */ 'u', 'a', 'b', 'd', 'l', 9, 0,
- /* 1339 */ 's', 'm', 'a', 'd', 'd', 'l', 9, 0,
- /* 1347 */ 'u', 'm', 'a', 'd', 'd', 'l', 9, 0,
- /* 1355 */ 's', 'a', 'd', 'd', 'l', 9, 0,
- /* 1362 */ 'u', 'a', 'd', 'd', 'l', 9, 0,
- /* 1369 */ 'f', 'c', 's', 'e', 'l', 9, 0,
- /* 1376 */ 's', 'q', 's', 'h', 'l', 9, 0,
- /* 1383 */ 'u', 'q', 's', 'h', 'l', 9, 0,
- /* 1390 */ 's', 'q', 'r', 's', 'h', 'l', 9, 0,
- /* 1398 */ 'u', 'q', 'r', 's', 'h', 'l', 9, 0,
- /* 1406 */ 's', 'r', 's', 'h', 'l', 9, 0,
- /* 1413 */ 'u', 'r', 's', 'h', 'l', 9, 0,
- /* 1420 */ 's', 's', 'h', 'l', 9, 0,
- /* 1426 */ 'u', 's', 'h', 'l', 9, 0,
- /* 1432 */ 'b', 'f', 'x', 'i', 'l', 9, 0,
- /* 1439 */ 's', 's', 'h', 'l', 'l', 9, 0,
- /* 1446 */ 'u', 's', 'h', 'l', 'l', 9, 0,
- /* 1453 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', 9, 0,
- /* 1462 */ 'p', 'm', 'u', 'l', 'l', 9, 0,
- /* 1469 */ 's', 'm', 'u', 'l', 'l', 9, 0,
- /* 1476 */ 'u', 'm', 'u', 'l', 'l', 9, 0,
- /* 1483 */ 'b', 's', 'l', 9, 0,
- /* 1488 */ 's', 'q', 'd', 'm', 'l', 's', 'l', 9, 0,
- /* 1497 */ 's', 'm', 'l', 's', 'l', 9, 0,
- /* 1504 */ 'u', 'm', 'l', 's', 'l', 9, 0,
- /* 1511 */ 's', 'y', 's', 'l', 9, 0,
- /* 1517 */ 'f', 'c', 'v', 't', 'l', 9, 0,
- /* 1524 */ 'f', 'm', 'u', 'l', 9, 0,
- /* 1530 */ 'f', 'n', 'm', 'u', 'l', 9, 0,
- /* 1537 */ 'p', 'm', 'u', 'l', 9, 0,
- /* 1543 */ 's', 'h', 'a', '1', 'm', 9, 0,
- /* 1550 */ 's', 'b', 'f', 'm', 9, 0,
- /* 1556 */ 'u', 'b', 'f', 'm', 9, 0,
- /* 1562 */ 'p', 'r', 'f', 'm', 9, 0,
- /* 1568 */ 'f', 'm', 'i', 'n', 'n', 'm', 9, 0,
- /* 1576 */ 'f', 'm', 'a', 'x', 'n', 'm', 9, 0,
- /* 1584 */ 'f', 'r', 'i', 'n', 't', 'm', 9, 0,
- /* 1592 */ 'p', 'r', 'f', 'u', 'm', 9, 0,
- /* 1599 */ 'r', 's', 'u', 'b', 'h', 'n', 9, 0,
- /* 1607 */ 'r', 'a', 'd', 'd', 'h', 'n', 9, 0,
- /* 1615 */ 'f', 'm', 'i', 'n', 9, 0,
- /* 1621 */ 's', 'm', 'i', 'n', 9, 0,
- /* 1627 */ 'u', 'm', 'i', 'n', 9, 0,
- /* 1633 */ 'c', 'c', 'm', 'n', 9, 0,
- /* 1639 */ 'e', 'o', 'n', 9, 0,
- /* 1644 */ 's', 'q', 's', 'h', 'r', 'n', 9, 0,
- /* 1652 */ 'u', 'q', 's', 'h', 'r', 'n', 9, 0,
- /* 1660 */ 's', 'q', 'r', 's', 'h', 'r', 'n', 9, 0,
- /* 1669 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', 9, 0,
- /* 1678 */ 'o', 'r', 'n', 9, 0,
- /* 1683 */ 'f', 'r', 'i', 'n', 't', 'n', 9, 0,
- /* 1691 */ 'f', 'c', 'v', 't', 'n', 9, 0,
- /* 1698 */ 's', 'q', 'x', 't', 'n', 9, 0,
- /* 1705 */ 'u', 'q', 'x', 't', 'n', 9, 0,
- /* 1712 */ 's', 'q', 's', 'h', 'r', 'u', 'n', 9, 0,
- /* 1721 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', 9, 0,
- /* 1731 */ 's', 'q', 'x', 't', 'u', 'n', 9, 0,
- /* 1739 */ 'm', 'v', 'n', 9, 0,
- /* 1744 */ 'm', 'o', 'v', 'n', 9, 0,
- /* 1750 */ 'f', 'c', 'v', 't', 'x', 'n', 9, 0,
- /* 1758 */ 's', 'h', 'a', '1', 'p', 9, 0,
- /* 1765 */ 'f', 'a', 'd', 'd', 'p', 9, 0,
- /* 1772 */ 'l', 'd', 'p', 9, 0,
- /* 1777 */ 's', 'a', 'd', 'a', 'l', 'p', 9, 0,
- /* 1785 */ 'u', 'a', 'd', 'a', 'l', 'p', 9, 0,
- /* 1793 */ 's', 'a', 'd', 'd', 'l', 'p', 9, 0,
- /* 1801 */ 'u', 'a', 'd', 'd', 'l', 'p', 9, 0,
- /* 1809 */ 'f', 'c', 'c', 'm', 'p', 9, 0,
- /* 1816 */ 'f', 'c', 'm', 'p', 9, 0,
- /* 1822 */ 'f', 'm', 'i', 'n', 'n', 'm', 'p', 9, 0,
- /* 1831 */ 'f', 'm', 'a', 'x', 'n', 'm', 'p', 9, 0,
- /* 1840 */ 'l', 'd', 'n', 'p', 9, 0,
- /* 1846 */ 'f', 'm', 'i', 'n', 'p', 9, 0,
- /* 1853 */ 's', 'm', 'i', 'n', 'p', 9, 0,
- /* 1860 */ 'u', 'm', 'i', 'n', 'p', 9, 0,
- /* 1867 */ 's', 't', 'n', 'p', 9, 0,
- /* 1873 */ 'a', 'd', 'r', 'p', 9, 0,
- /* 1879 */ 'f', 'r', 'i', 'n', 't', 'p', 9, 0,
- /* 1887 */ 's', 't', 'p', 9, 0,
- /* 1892 */ 'd', 'u', 'p', 9, 0,
- /* 1897 */ 'l', 'd', 'a', 'x', 'p', 9, 0,
- /* 1904 */ 'f', 'm', 'a', 'x', 'p', 9, 0,
- /* 1911 */ 's', 'm', 'a', 'x', 'p', 9, 0,
- /* 1918 */ 'u', 'm', 'a', 'x', 'p', 9, 0,
- /* 1925 */ 'l', 'd', 'x', 'p', 9, 0,
- /* 1931 */ 's', 't', 'l', 'x', 'p', 9, 0,
- /* 1938 */ 's', 't', 'x', 'p', 9, 0,
- /* 1944 */ 'f', 'c', 'm', 'e', 'q', 9, 0,
- /* 1951 */ 'l', 'd', '1', 'r', 9, 0,
- /* 1957 */ 'l', 'd', '2', 'r', 9, 0,
- /* 1963 */ 'l', 'd', '3', 'r', 9, 0,
- /* 1969 */ 'l', 'd', '4', 'r', 9, 0,
- /* 1975 */ 'l', 'd', 'a', 'r', 9, 0,
- /* 1981 */ 'b', 'r', 9, 0,
- /* 1985 */ 'a', 'd', 'r', 9, 0,
- /* 1990 */ 'l', 'd', 'r', 9, 0,
- /* 1995 */ 's', 'r', 's', 'h', 'r', 9, 0,
- /* 2002 */ 'u', 'r', 's', 'h', 'r', 9, 0,
- /* 2009 */ 's', 's', 'h', 'r', 9, 0,
- /* 2015 */ 'u', 's', 'h', 'r', 9, 0,
- /* 2021 */ 'b', 'l', 'r', 9, 0,
- /* 2026 */ 's', 't', 'l', 'r', 9, 0,
- /* 2032 */ 'e', 'o', 'r', 9, 0,
- /* 2037 */ 'r', 'o', 'r', 9, 0,
- /* 2042 */ 'o', 'r', 'r', 9, 0,
- /* 2047 */ 'a', 's', 'r', 9, 0,
- /* 2052 */ 'l', 's', 'r', 9, 0,
- /* 2057 */ 'm', 's', 'r', 9, 0,
- /* 2062 */ 'l', 'd', 't', 'r', 9, 0,
- /* 2068 */ 's', 't', 'r', 9, 0,
- /* 2073 */ 's', 't', 't', 'r', 9, 0,
- /* 2079 */ 'e', 'x', 't', 'r', 9, 0,
- /* 2085 */ 'l', 'd', 'u', 'r', 9, 0,
- /* 2091 */ 's', 't', 'u', 'r', 9, 0,
- /* 2097 */ 'l', 'd', 'a', 'x', 'r', 9, 0,
- /* 2104 */ 'l', 'd', 'x', 'r', 9, 0,
- /* 2110 */ 's', 't', 'l', 'x', 'r', 9, 0,
- /* 2117 */ 's', 't', 'x', 'r', 9, 0,
- /* 2123 */ 'f', 'c', 'v', 't', 'a', 's', 9, 0,
- /* 2131 */ 'f', 'a', 'b', 's', 9, 0,
- /* 2137 */ 's', 'q', 'a', 'b', 's', 9, 0,
- /* 2144 */ 's', 'u', 'b', 's', 9, 0,
- /* 2150 */ 's', 'b', 'c', 's', 9, 0,
- /* 2156 */ 'a', 'd', 'c', 's', 9, 0,
- /* 2162 */ 'b', 'i', 'c', 's', 9, 0,
- /* 2168 */ 'a', 'd', 'd', 's', 9, 0,
- /* 2174 */ 'a', 'n', 'd', 's', 9, 0,
- /* 2180 */ 'c', 'm', 'h', 's', 9, 0,
- /* 2186 */ 'c', 'l', 's', 9, 0,
- /* 2191 */ 'f', 'm', 'l', 's', 9, 0,
- /* 2197 */ 'f', 'c', 'v', 't', 'm', 's', 9, 0,
- /* 2205 */ 'i', 'n', 's', 9, 0,
- /* 2210 */ 'f', 'c', 'v', 't', 'n', 's', 9, 0,
- /* 2218 */ 'f', 'r', 'e', 'c', 'p', 's', 9, 0,
- /* 2226 */ 'f', 'c', 'v', 't', 'p', 's', 9, 0,
- /* 2234 */ 'm', 'r', 's', 9, 0,
- /* 2239 */ 'f', 'r', 's', 'q', 'r', 't', 's', 9, 0,
- /* 2248 */ 's', 'y', 's', 9, 0,
- /* 2253 */ 'f', 'c', 'v', 't', 'z', 's', 9, 0,
- /* 2261 */ 'a', 't', 9, 0,
- /* 2265 */ 'r', 'e', 't', 9, 0,
- /* 2270 */ 'f', 'a', 'c', 'g', 't', 9, 0,
- /* 2277 */ 'f', 'c', 'm', 'g', 't', 9, 0,
- /* 2284 */ 'r', 'b', 'i', 't', 9, 0,
- /* 2290 */ 'h', 'l', 't', 9, 0,
- /* 2295 */ 'f', 'c', 'm', 'l', 't', 9, 0,
- /* 2302 */ 'c', 'n', 't', 9, 0,
- /* 2307 */ 'h', 'i', 'n', 't', 9, 0,
- /* 2313 */ 'n', 'o', 't', 9, 0,
- /* 2318 */ 'f', 's', 'q', 'r', 't', 9, 0,
- /* 2325 */ 'c', 'm', 't', 's', 't', 9, 0,
- /* 2332 */ 'f', 'c', 'v', 't', 9, 0,
- /* 2338 */ 'e', 'x', 't', 9, 0,
- /* 2343 */ 'f', 'c', 'v', 't', 'a', 'u', 9, 0,
- /* 2351 */ 's', 'q', 's', 'h', 'l', 'u', 9, 0,
- /* 2359 */ 'f', 'c', 'v', 't', 'm', 'u', 9, 0,
- /* 2367 */ 'f', 'c', 'v', 't', 'n', 'u', 9, 0,
- /* 2375 */ 'f', 'c', 'v', 't', 'p', 'u', 9, 0,
- /* 2383 */ 'f', 'c', 'v', 't', 'z', 'u', 9, 0,
- /* 2391 */ 'a', 'd', 'd', 'v', 9, 0,
- /* 2397 */ 'r', 'e', 'v', 9, 0,
- /* 2402 */ 'f', 'd', 'i', 'v', 9, 0,
- /* 2408 */ 's', 'd', 'i', 'v', 9, 0,
- /* 2414 */ 'u', 'd', 'i', 'v', 9, 0,
- /* 2420 */ 's', 'a', 'd', 'd', 'l', 'v', 9, 0,
- /* 2428 */ 'u', 'a', 'd', 'd', 'l', 'v', 9, 0,
- /* 2436 */ 'f', 'm', 'i', 'n', 'n', 'm', 'v', 9, 0,
- /* 2445 */ 'f', 'm', 'a', 'x', 'n', 'm', 'v', 9, 0,
- /* 2454 */ 'f', 'm', 'i', 'n', 'v', 9, 0,
- /* 2461 */ 's', 'm', 'i', 'n', 'v', 9, 0,
- /* 2468 */ 'u', 'm', 'i', 'n', 'v', 9, 0,
- /* 2475 */ 'c', 's', 'i', 'n', 'v', 9, 0,
- /* 2482 */ 'f', 'm', 'o', 'v', 9, 0,
- /* 2488 */ 's', 'm', 'o', 'v', 9, 0,
- /* 2494 */ 'u', 'm', 'o', 'v', 9, 0,
- /* 2500 */ 'f', 'm', 'a', 'x', 'v', 9, 0,
- /* 2507 */ 's', 'm', 'a', 'x', 'v', 9, 0,
- /* 2514 */ 'u', 'm', 'a', 'x', 'v', 9, 0,
- /* 2521 */ 'c', 'r', 'c', '3', '2', 'w', 9, 0,
- /* 2529 */ 's', 's', 'u', 'b', 'w', 9, 0,
- /* 2536 */ 'u', 's', 'u', 'b', 'w', 9, 0,
- /* 2543 */ 'c', 'r', 'c', '3', '2', 'c', 'w', 9, 0,
- /* 2552 */ 's', 'a', 'd', 'd', 'w', 9, 0,
- /* 2559 */ 'u', 'a', 'd', 'd', 'w', 9, 0,
- /* 2566 */ 'l', 'd', 'p', 's', 'w', 9, 0,
- /* 2573 */ 'l', 'd', 'r', 's', 'w', 9, 0,
- /* 2580 */ 'l', 'd', 't', 'r', 's', 'w', 9, 0,
- /* 2588 */ 'l', 'd', 'u', 'r', 's', 'w', 9, 0,
- /* 2596 */ 's', 'x', 't', 'w', 9, 0,
- /* 2602 */ 'c', 'r', 'c', '3', '2', 'x', 9, 0,
- /* 2610 */ 'f', 'm', 'a', 'x', 9, 0,
- /* 2616 */ 's', 'm', 'a', 'x', 9, 0,
- /* 2622 */ 'u', 'm', 'a', 'x', 9, 0,
- /* 2628 */ 't', 'b', 'x', 9, 0,
- /* 2633 */ 'c', 'r', 'c', '3', '2', 'c', 'x', 9, 0,
- /* 2642 */ 'c', 'l', 'r', 'e', 'x', 9, 0,
- /* 2649 */ 's', 'b', 'f', 'x', 9, 0,
- /* 2655 */ 'u', 'b', 'f', 'x', 9, 0,
- /* 2661 */ 'f', 'm', 'u', 'l', 'x', 9, 0,
- /* 2668 */ 'f', 'r', 'e', 'c', 'p', 'x', 9, 0,
- /* 2676 */ 'f', 'r', 'i', 'n', 't', 'x', 9, 0,
- /* 2684 */ 'c', 'b', 'z', 9, 0,
- /* 2689 */ 't', 'b', 'z', 9, 0,
- /* 2694 */ 's', 'b', 'f', 'i', 'z', 9, 0,
- /* 2701 */ 'u', 'b', 'f', 'i', 'z', 9, 0,
- /* 2708 */ 'c', 'l', 'z', 9, 0,
- /* 2713 */ 'c', 'b', 'n', 'z', 9, 0,
- /* 2719 */ 't', 'b', 'n', 'z', 9, 0,
- /* 2725 */ 'f', 'r', 'i', 'n', 't', 'z', 9, 0,
- /* 2733 */ 'm', 'o', 'v', 'z', 9, 0,
- /* 2739 */ 'm', 'o', 'v', 'i', 9, 32, 0,
- /* 2746 */ 'c', 'm', 'n', 32, 0,
- /* 2751 */ 'c', 'm', 'p', 32, 0,
- /* 2756 */ 'b', '.', 0,
- /* 2759 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0,
- /* 2772 */ 'B', 'U', 'N', 'D', 'L', 'E', 0,
- /* 2779 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0,
- /* 2789 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0,
- /* 2804 */ 'd', 'r', 'p', 's', 0,
- /* 2809 */ 'e', 'r', 'e', 't', 0,
+ /* 684 */ 'f', 's', 'u', 'b', 9, 0,
+ /* 690 */ 's', 'h', 's', 'u', 'b', 9, 0,
+ /* 697 */ 'u', 'h', 's', 'u', 'b', 9, 0,
+ /* 704 */ 'f', 'm', 's', 'u', 'b', 9, 0,
+ /* 711 */ 'f', 'n', 'm', 's', 'u', 'b', 9, 0,
+ /* 719 */ 's', 'q', 's', 'u', 'b', 9, 0,
+ /* 726 */ 'u', 'q', 's', 'u', 'b', 9, 0,
+ /* 733 */ 's', 'h', 'a', '1', 'c', 9, 0,
+ /* 740 */ 's', 'b', 'c', 9, 0,
+ /* 745 */ 'a', 'd', 'c', 9, 0,
+ /* 750 */ 'b', 'i', 'c', 9, 0,
+ /* 755 */ 'a', 'e', 's', 'i', 'm', 'c', 9, 0,
+ /* 763 */ 'a', 'e', 's', 'm', 'c', 9, 0,
+ /* 770 */ 'c', 's', 'i', 'n', 'c', 9, 0,
+ /* 777 */ 'h', 'v', 'c', 9, 0,
+ /* 782 */ 's', 'v', 'c', 9, 0,
+ /* 787 */ 'f', 'a', 'b', 'd', 9, 0,
+ /* 793 */ 's', 'a', 'b', 'd', 9, 0,
+ /* 799 */ 'u', 'a', 'b', 'd', 9, 0,
+ /* 805 */ 'f', 'a', 'd', 'd', 9, 0,
+ /* 811 */ 's', 'r', 'h', 'a', 'd', 'd', 9, 0,
+ /* 819 */ 'u', 'r', 'h', 'a', 'd', 'd', 9, 0,
+ /* 827 */ 's', 'h', 'a', 'd', 'd', 9, 0,
+ /* 834 */ 'u', 'h', 'a', 'd', 'd', 9, 0,
+ /* 841 */ 'f', 'm', 'a', 'd', 'd', 9, 0,
+ /* 848 */ 'f', 'n', 'm', 'a', 'd', 'd', 9, 0,
+ /* 856 */ 'u', 's', 'q', 'a', 'd', 'd', 9, 0,
+ /* 864 */ 's', 'u', 'q', 'a', 'd', 'd', 9, 0,
+ /* 872 */ 'a', 'n', 'd', 9, 0,
+ /* 877 */ 'a', 'e', 's', 'd', 9, 0,
+ /* 883 */ 'f', 'a', 'c', 'g', 'e', 9, 0,
+ /* 890 */ 'f', 'c', 'm', 'g', 'e', 9, 0,
+ /* 897 */ 'f', 'c', 'm', 'l', 'e', 9, 0,
+ /* 904 */ 'f', 'r', 'e', 'c', 'p', 'e', 9, 0,
+ /* 912 */ 'u', 'r', 'e', 'c', 'p', 'e', 9, 0,
+ /* 920 */ 'f', 'c', 'c', 'm', 'p', 'e', 9, 0,
+ /* 928 */ 'f', 'c', 'm', 'p', 'e', 9, 0,
+ /* 935 */ 'a', 'e', 's', 'e', 9, 0,
+ /* 941 */ 'f', 'r', 's', 'q', 'r', 't', 'e', 9, 0,
+ /* 950 */ 'u', 'r', 's', 'q', 'r', 't', 'e', 9, 0,
+ /* 959 */ 'b', 'i', 'f', 9, 0,
+ /* 964 */ 's', 'c', 'v', 't', 'f', 9, 0,
+ /* 971 */ 'u', 'c', 'v', 't', 'f', 9, 0,
+ /* 978 */ 'f', 'n', 'e', 'g', 9, 0,
+ /* 984 */ 's', 'q', 'n', 'e', 'g', 9, 0,
+ /* 991 */ 'c', 's', 'n', 'e', 'g', 9, 0,
+ /* 998 */ 's', 'h', 'a', '1', 'h', 9, 0,
+ /* 1005 */ 'c', 'r', 'c', '3', '2', 'h', 9, 0,
+ /* 1013 */ 's', 'h', 'a', '2', '5', '6', 'h', 9, 0,
+ /* 1022 */ 'c', 'r', 'c', '3', '2', 'c', 'h', 9, 0,
+ /* 1031 */ 's', 'q', 'd', 'm', 'u', 'l', 'h', 9, 0,
+ /* 1040 */ 's', 'q', 'r', 'd', 'm', 'u', 'l', 'h', 9, 0,
+ /* 1050 */ 's', 'm', 'u', 'l', 'h', 9, 0,
+ /* 1057 */ 'u', 'm', 'u', 'l', 'h', 9, 0,
+ /* 1064 */ 'l', 'd', 'a', 'r', 'h', 9, 0,
+ /* 1071 */ 'l', 'd', 'r', 'h', 9, 0,
+ /* 1077 */ 's', 't', 'l', 'r', 'h', 9, 0,
+ /* 1084 */ 'l', 'd', 't', 'r', 'h', 9, 0,
+ /* 1091 */ 's', 't', 'r', 'h', 9, 0,
+ /* 1097 */ 's', 't', 't', 'r', 'h', 9, 0,
+ /* 1104 */ 'l', 'd', 'u', 'r', 'h', 9, 0,
+ /* 1111 */ 's', 't', 'u', 'r', 'h', 9, 0,
+ /* 1118 */ 'l', 'd', 'a', 'x', 'r', 'h', 9, 0,
+ /* 1126 */ 'l', 'd', 'x', 'r', 'h', 9, 0,
+ /* 1133 */ 's', 't', 'l', 'x', 'r', 'h', 9, 0,
+ /* 1141 */ 's', 't', 'x', 'r', 'h', 9, 0,
+ /* 1148 */ 'l', 'd', 'r', 's', 'h', 9, 0,
+ /* 1155 */ 'l', 'd', 't', 'r', 's', 'h', 9, 0,
+ /* 1163 */ 'l', 'd', 'u', 'r', 's', 'h', 9, 0,
+ /* 1171 */ 'c', 'm', 'h', 'i', 9, 0,
+ /* 1177 */ 's', 'l', 'i', 9, 0,
+ /* 1182 */ 'm', 'v', 'n', 'i', 9, 0,
+ /* 1188 */ 's', 'r', 'i', 9, 0,
+ /* 1193 */ 'f', 'r', 'i', 'n', 't', 'i', 9, 0,
+ /* 1201 */ 'm', 'o', 'v', 'i', 9, 0,
+ /* 1207 */ 'b', 'r', 'k', 9, 0,
+ /* 1212 */ 'm', 'o', 'v', 'k', 9, 0,
+ /* 1218 */ 's', 'a', 'b', 'a', 'l', 9, 0,
+ /* 1225 */ 'u', 'a', 'b', 'a', 'l', 9, 0,
+ /* 1232 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', 9, 0,
+ /* 1241 */ 's', 'm', 'l', 'a', 'l', 9, 0,
+ /* 1248 */ 'u', 'm', 'l', 'a', 'l', 9, 0,
+ /* 1255 */ 't', 'b', 'l', 9, 0,
+ /* 1260 */ 's', 'm', 's', 'u', 'b', 'l', 9, 0,
+ /* 1268 */ 'u', 'm', 's', 'u', 'b', 'l', 9, 0,
+ /* 1276 */ 's', 's', 'u', 'b', 'l', 9, 0,
+ /* 1283 */ 'u', 's', 'u', 'b', 'l', 9, 0,
+ /* 1290 */ 's', 'a', 'b', 'd', 'l', 9, 0,
+ /* 1297 */ 'u', 'a', 'b', 'd', 'l', 9, 0,
+ /* 1304 */ 's', 'm', 'a', 'd', 'd', 'l', 9, 0,
+ /* 1312 */ 'u', 'm', 'a', 'd', 'd', 'l', 9, 0,
+ /* 1320 */ 's', 'a', 'd', 'd', 'l', 9, 0,
+ /* 1327 */ 'u', 'a', 'd', 'd', 'l', 9, 0,
+ /* 1334 */ 'f', 'c', 's', 'e', 'l', 9, 0,
+ /* 1341 */ 's', 'q', 's', 'h', 'l', 9, 0,
+ /* 1348 */ 'u', 'q', 's', 'h', 'l', 9, 0,
+ /* 1355 */ 's', 'q', 'r', 's', 'h', 'l', 9, 0,
+ /* 1363 */ 'u', 'q', 'r', 's', 'h', 'l', 9, 0,
+ /* 1371 */ 's', 'r', 's', 'h', 'l', 9, 0,
+ /* 1378 */ 'u', 'r', 's', 'h', 'l', 9, 0,
+ /* 1385 */ 's', 's', 'h', 'l', 9, 0,
+ /* 1391 */ 'u', 's', 'h', 'l', 9, 0,
+ /* 1397 */ 's', 's', 'h', 'l', 'l', 9, 0,
+ /* 1404 */ 'u', 's', 'h', 'l', 'l', 9, 0,
+ /* 1411 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', 9, 0,
+ /* 1420 */ 'p', 'm', 'u', 'l', 'l', 9, 0,
+ /* 1427 */ 's', 'm', 'u', 'l', 'l', 9, 0,
+ /* 1434 */ 'u', 'm', 'u', 'l', 'l', 9, 0,
+ /* 1441 */ 'b', 's', 'l', 9, 0,
+ /* 1446 */ 's', 'q', 'd', 'm', 'l', 's', 'l', 9, 0,
+ /* 1455 */ 's', 'm', 'l', 's', 'l', 9, 0,
+ /* 1462 */ 'u', 'm', 'l', 's', 'l', 9, 0,
+ /* 1469 */ 's', 'y', 's', 'l', 9, 0,
+ /* 1475 */ 'f', 'c', 'v', 't', 'l', 9, 0,
+ /* 1482 */ 'f', 'm', 'u', 'l', 9, 0,
+ /* 1488 */ 'f', 'n', 'm', 'u', 'l', 9, 0,
+ /* 1495 */ 'p', 'm', 'u', 'l', 9, 0,
+ /* 1501 */ 's', 'h', 'a', '1', 'm', 9, 0,
+ /* 1508 */ 's', 'b', 'f', 'm', 9, 0,
+ /* 1514 */ 'u', 'b', 'f', 'm', 9, 0,
+ /* 1520 */ 'p', 'r', 'f', 'm', 9, 0,
+ /* 1526 */ 'f', 'm', 'i', 'n', 'n', 'm', 9, 0,
+ /* 1534 */ 'f', 'm', 'a', 'x', 'n', 'm', 9, 0,
+ /* 1542 */ 'f', 'r', 'i', 'n', 't', 'm', 9, 0,
+ /* 1550 */ 'p', 'r', 'f', 'u', 'm', 9, 0,
+ /* 1557 */ 'r', 's', 'u', 'b', 'h', 'n', 9, 0,
+ /* 1565 */ 'r', 'a', 'd', 'd', 'h', 'n', 9, 0,
+ /* 1573 */ 'f', 'm', 'i', 'n', 9, 0,
+ /* 1579 */ 's', 'm', 'i', 'n', 9, 0,
+ /* 1585 */ 'u', 'm', 'i', 'n', 9, 0,
+ /* 1591 */ 'c', 'c', 'm', 'n', 9, 0,
+ /* 1597 */ 'e', 'o', 'n', 9, 0,
+ /* 1602 */ 's', 'q', 's', 'h', 'r', 'n', 9, 0,
+ /* 1610 */ 'u', 'q', 's', 'h', 'r', 'n', 9, 0,
+ /* 1618 */ 's', 'q', 'r', 's', 'h', 'r', 'n', 9, 0,
+ /* 1627 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', 9, 0,
+ /* 1636 */ 'o', 'r', 'n', 9, 0,
+ /* 1641 */ 'f', 'r', 'i', 'n', 't', 'n', 9, 0,
+ /* 1649 */ 'f', 'c', 'v', 't', 'n', 9, 0,
+ /* 1656 */ 's', 'q', 'x', 't', 'n', 9, 0,
+ /* 1663 */ 'u', 'q', 'x', 't', 'n', 9, 0,
+ /* 1670 */ 's', 'q', 's', 'h', 'r', 'u', 'n', 9, 0,
+ /* 1679 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', 9, 0,
+ /* 1689 */ 's', 'q', 'x', 't', 'u', 'n', 9, 0,
+ /* 1697 */ 'm', 'o', 'v', 'n', 9, 0,
+ /* 1703 */ 'f', 'c', 'v', 't', 'x', 'n', 9, 0,
+ /* 1711 */ 's', 'h', 'a', '1', 'p', 9, 0,
+ /* 1718 */ 'f', 'a', 'd', 'd', 'p', 9, 0,
+ /* 1725 */ 'l', 'd', 'p', 9, 0,
+ /* 1730 */ 's', 'a', 'd', 'a', 'l', 'p', 9, 0,
+ /* 1738 */ 'u', 'a', 'd', 'a', 'l', 'p', 9, 0,
+ /* 1746 */ 's', 'a', 'd', 'd', 'l', 'p', 9, 0,
+ /* 1754 */ 'u', 'a', 'd', 'd', 'l', 'p', 9, 0,
+ /* 1762 */ 'f', 'c', 'c', 'm', 'p', 9, 0,
+ /* 1769 */ 'f', 'c', 'm', 'p', 9, 0,
+ /* 1775 */ 'f', 'm', 'i', 'n', 'n', 'm', 'p', 9, 0,
+ /* 1784 */ 'f', 'm', 'a', 'x', 'n', 'm', 'p', 9, 0,
+ /* 1793 */ 'l', 'd', 'n', 'p', 9, 0,
+ /* 1799 */ 'f', 'm', 'i', 'n', 'p', 9, 0,
+ /* 1806 */ 's', 'm', 'i', 'n', 'p', 9, 0,
+ /* 1813 */ 'u', 'm', 'i', 'n', 'p', 9, 0,
+ /* 1820 */ 's', 't', 'n', 'p', 9, 0,
+ /* 1826 */ 'a', 'd', 'r', 'p', 9, 0,
+ /* 1832 */ 'f', 'r', 'i', 'n', 't', 'p', 9, 0,
+ /* 1840 */ 's', 't', 'p', 9, 0,
+ /* 1845 */ 'd', 'u', 'p', 9, 0,
+ /* 1850 */ 'l', 'd', 'a', 'x', 'p', 9, 0,
+ /* 1857 */ 'f', 'm', 'a', 'x', 'p', 9, 0,
+ /* 1864 */ 's', 'm', 'a', 'x', 'p', 9, 0,
+ /* 1871 */ 'u', 'm', 'a', 'x', 'p', 9, 0,
+ /* 1878 */ 'l', 'd', 'x', 'p', 9, 0,
+ /* 1884 */ 's', 't', 'l', 'x', 'p', 9, 0,
+ /* 1891 */ 's', 't', 'x', 'p', 9, 0,
+ /* 1897 */ 'f', 'c', 'm', 'e', 'q', 9, 0,
+ /* 1904 */ 'l', 'd', '1', 'r', 9, 0,
+ /* 1910 */ 'l', 'd', '2', 'r', 9, 0,
+ /* 1916 */ 'l', 'd', '3', 'r', 9, 0,
+ /* 1922 */ 'l', 'd', '4', 'r', 9, 0,
+ /* 1928 */ 'l', 'd', 'a', 'r', 9, 0,
+ /* 1934 */ 'b', 'r', 9, 0,
+ /* 1938 */ 'a', 'd', 'r', 9, 0,
+ /* 1943 */ 'l', 'd', 'r', 9, 0,
+ /* 1948 */ 's', 'r', 's', 'h', 'r', 9, 0,
+ /* 1955 */ 'u', 'r', 's', 'h', 'r', 9, 0,
+ /* 1962 */ 's', 's', 'h', 'r', 9, 0,
+ /* 1968 */ 'u', 's', 'h', 'r', 9, 0,
+ /* 1974 */ 'b', 'l', 'r', 9, 0,
+ /* 1979 */ 's', 't', 'l', 'r', 9, 0,
+ /* 1985 */ 'e', 'o', 'r', 9, 0,
+ /* 1990 */ 'r', 'o', 'r', 9, 0,
+ /* 1995 */ 'o', 'r', 'r', 9, 0,
+ /* 2000 */ 'a', 's', 'r', 9, 0,
+ /* 2005 */ 'l', 's', 'r', 9, 0,
+ /* 2010 */ 'm', 's', 'r', 9, 0,
+ /* 2015 */ 'l', 'd', 't', 'r', 9, 0,
+ /* 2021 */ 's', 't', 'r', 9, 0,
+ /* 2026 */ 's', 't', 't', 'r', 9, 0,
+ /* 2032 */ 'e', 'x', 't', 'r', 9, 0,
+ /* 2038 */ 'l', 'd', 'u', 'r', 9, 0,
+ /* 2044 */ 's', 't', 'u', 'r', 9, 0,
+ /* 2050 */ 'l', 'd', 'a', 'x', 'r', 9, 0,
+ /* 2057 */ 'l', 'd', 'x', 'r', 9, 0,
+ /* 2063 */ 's', 't', 'l', 'x', 'r', 9, 0,
+ /* 2070 */ 's', 't', 'x', 'r', 9, 0,
+ /* 2076 */ 'f', 'c', 'v', 't', 'a', 's', 9, 0,
+ /* 2084 */ 'f', 'a', 'b', 's', 9, 0,
+ /* 2090 */ 's', 'q', 'a', 'b', 's', 9, 0,
+ /* 2097 */ 's', 'u', 'b', 's', 9, 0,
+ /* 2103 */ 's', 'b', 'c', 's', 9, 0,
+ /* 2109 */ 'a', 'd', 'c', 's', 9, 0,
+ /* 2115 */ 'b', 'i', 'c', 's', 9, 0,
+ /* 2121 */ 'a', 'd', 'd', 's', 9, 0,
+ /* 2127 */ 'a', 'n', 'd', 's', 9, 0,
+ /* 2133 */ 'c', 'm', 'h', 's', 9, 0,
+ /* 2139 */ 'c', 'l', 's', 9, 0,
+ /* 2144 */ 'f', 'm', 'l', 's', 9, 0,
+ /* 2150 */ 'f', 'c', 'v', 't', 'm', 's', 9, 0,
+ /* 2158 */ 'i', 'n', 's', 9, 0,
+ /* 2163 */ 'f', 'c', 'v', 't', 'n', 's', 9, 0,
+ /* 2171 */ 'f', 'r', 'e', 'c', 'p', 's', 9, 0,
+ /* 2179 */ 'f', 'c', 'v', 't', 'p', 's', 9, 0,
+ /* 2187 */ 'm', 'r', 's', 9, 0,
+ /* 2192 */ 'f', 'r', 's', 'q', 'r', 't', 's', 9, 0,
+ /* 2201 */ 's', 'y', 's', 9, 0,
+ /* 2206 */ 'f', 'c', 'v', 't', 'z', 's', 9, 0,
+ /* 2214 */ 'r', 'e', 't', 9, 0,
+ /* 2219 */ 'f', 'a', 'c', 'g', 't', 9, 0,
+ /* 2226 */ 'f', 'c', 'm', 'g', 't', 9, 0,
+ /* 2233 */ 'r', 'b', 'i', 't', 9, 0,
+ /* 2239 */ 'h', 'l', 't', 9, 0,
+ /* 2244 */ 'f', 'c', 'm', 'l', 't', 9, 0,
+ /* 2251 */ 'c', 'n', 't', 9, 0,
+ /* 2256 */ 'n', 'o', 't', 9, 0,
+ /* 2261 */ 'f', 's', 'q', 'r', 't', 9, 0,
+ /* 2268 */ 'c', 'm', 't', 's', 't', 9, 0,
+ /* 2275 */ 'f', 'c', 'v', 't', 9, 0,
+ /* 2281 */ 'e', 'x', 't', 9, 0,
+ /* 2286 */ 'f', 'c', 'v', 't', 'a', 'u', 9, 0,
+ /* 2294 */ 's', 'q', 's', 'h', 'l', 'u', 9, 0,
+ /* 2302 */ 'f', 'c', 'v', 't', 'm', 'u', 9, 0,
+ /* 2310 */ 'f', 'c', 'v', 't', 'n', 'u', 9, 0,
+ /* 2318 */ 'f', 'c', 'v', 't', 'p', 'u', 9, 0,
+ /* 2326 */ 'f', 'c', 'v', 't', 'z', 'u', 9, 0,
+ /* 2334 */ 'a', 'd', 'd', 'v', 9, 0,
+ /* 2340 */ 'r', 'e', 'v', 9, 0,
+ /* 2345 */ 'f', 'd', 'i', 'v', 9, 0,
+ /* 2351 */ 's', 'd', 'i', 'v', 9, 0,
+ /* 2357 */ 'u', 'd', 'i', 'v', 9, 0,
+ /* 2363 */ 's', 'a', 'd', 'd', 'l', 'v', 9, 0,
+ /* 2371 */ 'u', 'a', 'd', 'd', 'l', 'v', 9, 0,
+ /* 2379 */ 'f', 'm', 'i', 'n', 'n', 'm', 'v', 9, 0,
+ /* 2388 */ 'f', 'm', 'a', 'x', 'n', 'm', 'v', 9, 0,
+ /* 2397 */ 'f', 'm', 'i', 'n', 'v', 9, 0,
+ /* 2404 */ 's', 'm', 'i', 'n', 'v', 9, 0,
+ /* 2411 */ 'u', 'm', 'i', 'n', 'v', 9, 0,
+ /* 2418 */ 'c', 's', 'i', 'n', 'v', 9, 0,
+ /* 2425 */ 'f', 'm', 'o', 'v', 9, 0,
+ /* 2431 */ 's', 'm', 'o', 'v', 9, 0,
+ /* 2437 */ 'u', 'm', 'o', 'v', 9, 0,
+ /* 2443 */ 'f', 'm', 'a', 'x', 'v', 9, 0,
+ /* 2450 */ 's', 'm', 'a', 'x', 'v', 9, 0,
+ /* 2457 */ 'u', 'm', 'a', 'x', 'v', 9, 0,
+ /* 2464 */ 'c', 'r', 'c', '3', '2', 'w', 9, 0,
+ /* 2472 */ 's', 's', 'u', 'b', 'w', 9, 0,
+ /* 2479 */ 'u', 's', 'u', 'b', 'w', 9, 0,
+ /* 2486 */ 'c', 'r', 'c', '3', '2', 'c', 'w', 9, 0,
+ /* 2495 */ 's', 'a', 'd', 'd', 'w', 9, 0,
+ /* 2502 */ 'u', 'a', 'd', 'd', 'w', 9, 0,
+ /* 2509 */ 'l', 'd', 'p', 's', 'w', 9, 0,
+ /* 2516 */ 'l', 'd', 'r', 's', 'w', 9, 0,
+ /* 2523 */ 'l', 'd', 't', 'r', 's', 'w', 9, 0,
+ /* 2531 */ 'l', 'd', 'u', 'r', 's', 'w', 9, 0,
+ /* 2539 */ 'c', 'r', 'c', '3', '2', 'x', 9, 0,
+ /* 2547 */ 'f', 'm', 'a', 'x', 9, 0,
+ /* 2553 */ 's', 'm', 'a', 'x', 9, 0,
+ /* 2559 */ 'u', 'm', 'a', 'x', 9, 0,
+ /* 2565 */ 't', 'b', 'x', 9, 0,
+ /* 2570 */ 'c', 'r', 'c', '3', '2', 'c', 'x', 9, 0,
+ /* 2579 */ 'c', 'l', 'r', 'e', 'x', 9, 0,
+ /* 2586 */ 'f', 'm', 'u', 'l', 'x', 9, 0,
+ /* 2593 */ 'f', 'r', 'e', 'c', 'p', 'x', 9, 0,
+ /* 2601 */ 'f', 'r', 'i', 'n', 't', 'x', 9, 0,
+ /* 2609 */ 'c', 'b', 'z', 9, 0,
+ /* 2614 */ 't', 'b', 'z', 9, 0,
+ /* 2619 */ 'c', 'l', 'z', 9, 0,
+ /* 2624 */ 'c', 'b', 'n', 'z', 9, 0,
+ /* 2630 */ 't', 'b', 'n', 'z', 9, 0,
+ /* 2636 */ 'f', 'r', 'i', 'n', 't', 'z', 9, 0,
+ /* 2644 */ 'm', 'o', 'v', 'z', 9, 0,
+ /* 2650 */ '.', 't', 'l', 's', 'd', 'e', 's', 'c', 'c', 'a', 'l', 'l', 32, 0,
+ /* 2664 */ 'h', 'i', 'n', 't', 32, 0,
+ /* 2670 */ 'b', '.', 0,
+ /* 2673 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0,
+ /* 2686 */ 'B', 'U', 'N', 'D', 'L', 'E', 0,
+ /* 2693 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0,
+ /* 2703 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0,
+ /* 2718 */ 'd', 'r', 'p', 's', 0,
+ /* 2723 */ 'e', 'r', 'e', 't', 0,
};
#endif
@@ -6007,2285 +5201,1193 @@
#endif
- // Fragment 0 encoded into 8 bits for 159 unique commands.
- //printf("Frag-0: %"PRIu64"\n", (Bits >> 12) & 255);
- switch ((Bits >> 12) & 255) {
+ // Fragment 0 encoded into 6 bits for 40 unique commands.
+ //printf("Frag-0: %"PRIu64"\n", (Bits >> 12) & 63);
+ switch ((Bits >> 12) & 63) {
default: // unreachable.
case 0:
// DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, DRPS, ERET
return;
break;
case 1:
- // ABS16b, ABS2d, ABS2s, ABS4h, ABS4s, ABS8b, ABS8h, ADDHN2vvv_16b8h, ADD...
- printVPRRegister(MI, 0, O);
+ // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A...
+ printVRegOperand(MI, 0, O);
break;
case 2:
- // ABSdd, ADCSwww, ADCSxxx, ADCwww, ADCxxx, ADDPvv_D_2D, ADDSwww_asr, ADD...
+ // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDPv2i64p, ADDSWri, ADDSWrs, ...
printOperand(MI, 0, O);
break;
case 3:
- // ATix
- printNamedImmOperand(MI, 0, O, &A64AT_ATMapper);
- SStream_concat0(O, ", ");
- printOperand(MI, 1, O);
- return;
+ // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ...
+ printVRegOperand(MI, 1, O);
break;
case 4:
- // BLimm, Bimm
- printLabelOperand(MI, 0, O, 26, 4);
+ // B, BL
+ printAlignedLabel(MI, 0, O);
return;
break;
case 5:
- // Bcc
- printCondCodeOperand(MI, 0, O);
- SStream_concat0(O, " ");
- printLabelOperand(MI, 1, O, 19, 4);
+ // BRK, DCPS1, DCPS2, DCPS3, HINT, HLT, HVC, SMC, SVC
+ printHexImm(MI, 0, O);
return;
break;
case 6:
- // DCix
- printNamedImmOperand(MI, 0, O, &A64DC_DCMapper);
+ // Bcc
+ printCondCode(MI, 0, O);
+ SStream_concat0(O, "\t");
+ printAlignedLabel(MI, 1, O);
+ return;
+ break;
+ case 7:
+ // DMB, DSB, ISB
+ printBarrierOption(MI, 0, O);
+ return;
+ break;
+ case 8:
+ // FMLAv1i32_indexed, FMLAv1i64_indexed, FMLSv1i32_indexed, FMLSv1i64_ind...
+ printOperand(MI, 1, O);
+ break;
+ case 9:
+ // LD1Fourv16b, LD1Onev16b, LD1Rv16b, LD1Threev16b, LD1Twov16b, LD2Rv16b,...
+ printTypedVectorList(MI, 0, O, 16, 'b', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 1, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 10:
+ // LD1Fourv16b_POST, LD1Onev16b_POST, LD1Rv16b_POST, LD1Threev16b_POST, L...
+ printTypedVectorList(MI, 1, O, 16, 'b', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 11:
+ // LD1Fourv1d, LD1Onev1d, LD1Rv1d, LD1Threev1d, LD1Twov1d, LD2Rv1d, LD3Rv...
+ printTypedVectorList(MI, 0, O, 1, 'd', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 1, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 12:
+ // LD1Fourv1d_POST, LD1Onev1d_POST, LD1Rv1d_POST, LD1Threev1d_POST, LD1Tw...
+ printTypedVectorList(MI, 1, O, 1, 'd', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 13:
+ // LD1Fourv2d, LD1Onev2d, LD1Rv2d, LD1Threev2d, LD1Twov2d, LD2Rv2d, LD2Tw...
+ printTypedVectorList(MI, 0, O, 2, 'd', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 1, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 14:
+ // LD1Fourv2d_POST, LD1Onev2d_POST, LD1Rv2d_POST, LD1Threev2d_POST, LD1Tw...
+ printTypedVectorList(MI, 1, O, 2, 'd', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 15:
+ // LD1Fourv2s, LD1Onev2s, LD1Rv2s, LD1Threev2s, LD1Twov2s, LD2Rv2s, LD2Tw...
+ printTypedVectorList(MI, 0, O, 2, 's', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 1, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 16:
+ // LD1Fourv2s_POST, LD1Onev2s_POST, LD1Rv2s_POST, LD1Threev2s_POST, LD1Tw...
+ printTypedVectorList(MI, 1, O, 2, 's', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 17:
+ // LD1Fourv4h, LD1Onev4h, LD1Rv4h, LD1Threev4h, LD1Twov4h, LD2Rv4h, LD2Tw...
+ printTypedVectorList(MI, 0, O, 4, 'h', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 1, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 18:
+ // LD1Fourv4h_POST, LD1Onev4h_POST, LD1Rv4h_POST, LD1Threev4h_POST, LD1Tw...
+ printTypedVectorList(MI, 1, O, 4, 'h', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 19:
+ // LD1Fourv4s, LD1Onev4s, LD1Rv4s, LD1Threev4s, LD1Twov4s, LD2Rv4s, LD2Tw...
+ printTypedVectorList(MI, 0, O, 4, 's', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 1, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 20:
+ // LD1Fourv4s_POST, LD1Onev4s_POST, LD1Rv4s_POST, LD1Threev4s_POST, LD1Tw...
+ printTypedVectorList(MI, 1, O, 4, 's', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 21:
+ // LD1Fourv8b, LD1Onev8b, LD1Rv8b, LD1Threev8b, LD1Twov8b, LD2Rv8b, LD2Tw...
+ printTypedVectorList(MI, 0, O, 8, 'b', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 1, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 22:
+ // LD1Fourv8b_POST, LD1Onev8b_POST, LD1Rv8b_POST, LD1Threev8b_POST, LD1Tw...
+ printTypedVectorList(MI, 1, O, 8, 'b', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 23:
+ // LD1Fourv8h, LD1Onev8h, LD1Rv8h, LD1Threev8h, LD1Twov8h, LD2Rv8h, LD2Tw...
+ printTypedVectorList(MI, 0, O, 8, 'h', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 1, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 24:
+ // LD1Fourv8h_POST, LD1Onev8h_POST, LD1Rv8h_POST, LD1Threev8h_POST, LD1Tw...
+ printTypedVectorList(MI, 1, O, 8, 'h', MRI);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 25:
+ // LD1i16, LD2i16, LD3i16, LD4i16, ST1i16_POST, ST2i16_POST, ST3i16_POST,...
+ printTypedVectorList(MI, 1, O, 0, 'h', MRI);
+ printVectorIndex(MI, 2, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 3, O);
+ break;
+ case 26:
+ // LD1i16_POST, LD2i16_POST, LD3i16_POST, LD4i16_POST
+ printTypedVectorList(MI, 2, O, 0, 'h', MRI);
+ printVectorIndex(MI, 3, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 4, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 27:
+ // LD1i32, LD2i32, LD3i32, LD4i32, ST1i32_POST, ST2i32_POST, ST3i32_POST,...
+ printTypedVectorList(MI, 1, O, 0, 's', MRI);
+ printVectorIndex(MI, 2, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 3, O);
+ break;
+ case 28:
+ // LD1i32_POST, LD2i32_POST, LD3i32_POST, LD4i32_POST
+ printTypedVectorList(MI, 2, O, 0, 's', MRI);
+ printVectorIndex(MI, 3, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 4, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 29:
+ // LD1i64, LD2i64, LD3i64, LD4i64, ST1i64_POST, ST2i64_POST, ST3i64_POST,...
+ printTypedVectorList(MI, 1, O, 0, 'd', MRI);
+ printVectorIndex(MI, 2, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 3, O);
+ break;
+ case 30:
+ // LD1i64_POST, LD2i64_POST, LD3i64_POST, LD4i64_POST
+ printTypedVectorList(MI, 2, O, 0, 'd', MRI);
+ printVectorIndex(MI, 3, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 4, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 31:
+ // LD1i8, LD2i8, LD3i8, LD4i8, ST1i8_POST, ST2i8_POST, ST3i8_POST, ST4i8_...
+ printTypedVectorList(MI, 1, O, 0, 'b', MRI);
+ printVectorIndex(MI, 2, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 3, O);
+ break;
+ case 32:
+ // LD1i8_POST, LD2i8_POST, LD3i8_POST, LD4i8_POST
+ printTypedVectorList(MI, 2, O, 0, 'b', MRI);
+ printVectorIndex(MI, 3, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 4, O);
+ SStream_concat0(O, "], ");
+ set_mem_access(MI, false);
+ break;
+ case 33:
+ // MSR
+ printMSRSystemRegister(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
return;
break;
- case 7:
- // DMBi, DSBi
- printNamedImmOperand(MI, 0, O, &A64DB_DBarrierMapper);
+ case 34:
+ // MSRpstate
+ printSystemPStateField(MI, 0, O);
+ SStream_concat0(O, ", ");
+ printOperand(MI, 1, O);
return;
break;
+ case 35:
+ // PRFMl, PRFMroW, PRFMroX, PRFMui, PRFUMi
+ printPrefetchOp(MI, 0, O);
+ break;
+ case 36:
+ // ST1i16, ST2i16, ST3i16, ST4i16
+ printTypedVectorList(MI, 0, O, 0, 'h', MRI);
+ printVectorIndex(MI, 1, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 37:
+ // ST1i32, ST2i32, ST3i32, ST4i32
+ printTypedVectorList(MI, 0, O, 0, 's', MRI);
+ printVectorIndex(MI, 1, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 38:
+ // ST1i64, ST2i64, ST3i64, ST4i64
+ printTypedVectorList(MI, 0, O, 0, 'd', MRI);
+ printVectorIndex(MI, 1, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 39:
+ // ST1i8, ST2i8, ST3i8, ST4i8
+ printTypedVectorList(MI, 0, O, 0, 'b', MRI);
+ printVectorIndex(MI, 1, O);
+ SStream_concat0(O, ", [");
+ set_mem_access(MI, true);
+ printOperand(MI, 2, O);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ }
+
+
+ // Fragment 1 encoded into 6 bits for 41 unique commands.
+ //printf("Frag-1: %"PRIu64"\n", (Bits >> 18) & 63);
+ switch ((Bits >> 18) & 63) {
+ default: // unreachable.
+ case 0:
+ // ABSv16i8, ADDHNv8i16_v16i8, ADDPv16i8, ADDv16i8, AESDrr, AESErr, AESIM...
+ SStream_concat0(O, ".16b, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
+ break;
+ case 1:
+ // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDPv2i64p, ADDSWri, ADDSWrs, ...
+ SStream_concat0(O, ", ");
+ break;
+ case 2:
+ // ABSv2i32, ADDHNv2i64_v2i32, ADDPv2i32, ADDv2i32, BICv2i32, CLSv2i32, C...
+ SStream_concat0(O, ".2s, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
+ break;
+ case 3:
+ // ABSv2i64, ADDPv2i64, ADDv2i64, CMEQv2i64, CMEQv2i64rz, CMGEv2i64, CMGE...
+ SStream_concat0(O, ".2d, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
+ break;
+ case 4:
+ // ABSv4i16, ADDHNv4i32_v4i16, ADDPv4i16, ADDv4i16, BICv4i16, CLSv4i16, C...
+ SStream_concat0(O, ".4h, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
+ break;
+ case 5:
+ // ABSv4i32, ADDHNv2i64_v4i32, ADDPv4i32, ADDv4i32, BICv4i32, CLSv4i32, C...
+ SStream_concat0(O, ".4s, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
+ break;
+ case 6:
+ // ABSv8i16, ADDHNv4i32_v8i16, ADDPv8i16, ADDv8i16, BICv8i16, CLSv8i16, C...
+ SStream_concat0(O, ".8h, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
+ break;
+ case 7:
+ // ABSv8i8, ADDHNv8i16_v8i8, ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8...
+ SStream_concat0(O, ".8b, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
+ break;
case 8:
- // ICi, ICix
- printNamedImmOperand(MI, 0, O, &A64IC_ICMapper);
+ // BLR, BR, CLREX, RET, TLSDESCCALL
+ return;
break;
case 9:
- // ISBi
- printNamedImmOperand(MI, 0, O, &A64ISB_ISBMapper);
+ // FCMPDri, FCMPEDri, FCMPESri, FCMPSri
+ SStream_concat0(O, ", #0.0");
+ arm64_op_addFP(MI, 0.0);
return;
break;
case 10:
- // LD1LN_B, LD1LN_WB_B_fixed, LD1LN_WB_B_register
- printVectorList(MI, 0, O, A64Layout_VL_B, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
+ // FMOVXDHighr, INSvi64gpr, INSvi64lane
+ SStream_concat0(O, ".d");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_D);
+ printVectorIndex(MI, 2, O);
+ SStream_concat0(O, ", ");
break;
case 11:
- // LD1LN_D, LD1LN_WB_D_fixed, LD1LN_WB_D_register
- printVectorList(MI, 0, O, A64Layout_VL_D, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
+ // INSvi16gpr, INSvi16lane
+ SStream_concat0(O, ".h");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_H);
+ printVectorIndex(MI, 2, O);
+ SStream_concat0(O, ", ");
break;
case 12:
- // LD1LN_H, LD1LN_WB_H_fixed, LD1LN_WB_H_register
- printVectorList(MI, 0, O, A64Layout_VL_H, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
+ // INSvi32gpr, INSvi32lane
+ SStream_concat0(O, ".s");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_S);
+ printVectorIndex(MI, 2, O);
+ SStream_concat0(O, ", ");
break;
case 13:
- // LD1LN_S, LD1LN_WB_S_fixed, LD1LN_WB_S_register
- printVectorList(MI, 0, O, A64Layout_VL_S, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
+ // INSvi8gpr, INSvi8lane
+ SStream_concat0(O, ".b");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_B);
+ printVectorIndex(MI, 2, O);
+ SStream_concat0(O, ", ");
break;
case 14:
- // LD1R_16B, LD1R_WB_16B_fixed, LD1R_WB_16B_register, LD1WB_16B_fixed, LD...
- printVectorList(MI, 0, O, A64Layout_VL_16B, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1Fourv16b_POST, LD1Fourv2d_POST, LD1Fourv4s_POST, LD1Fourv8h_POST, L...
+ printPostIncOperand2(MI, 3, O, 64);
+ return;
break;
case 15:
- // LD1R_1D, LD1R_WB_1D_fixed, LD1R_WB_1D_register, LD1WB_1D_fixed, LD1WB_...
- printVectorList(MI, 0, O, A64Layout_VL_1D, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1Fourv1d_POST, LD1Fourv2s_POST, LD1Fourv4h_POST, LD1Fourv8b_POST, LD...
+ printPostIncOperand2(MI, 3, O, 32);
+ return;
break;
case 16:
- // LD1R_2D, LD1R_WB_2D_fixed, LD1R_WB_2D_register, LD1WB_2D_fixed, LD1WB_...
- printVectorList(MI, 0, O, A64Layout_VL_2D, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1Onev16b_POST, LD1Onev2d_POST, LD1Onev4s_POST, LD1Onev8h_POST, LD1Tw...
+ printPostIncOperand2(MI, 3, O, 16);
+ return;
break;
case 17:
- // LD1R_2S, LD1R_WB_2S_fixed, LD1R_WB_2S_register, LD1WB_2S_fixed, LD1WB_...
- printVectorList(MI, 0, O, A64Layout_VL_2S, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1Onev1d_POST, LD1Onev2s_POST, LD1Onev4h_POST, LD1Onev8b_POST, LD1Rv1...
+ printPostIncOperand2(MI, 3, O, 8);
+ return;
break;
case 18:
- // LD1R_4H, LD1R_WB_4H_fixed, LD1R_WB_4H_register, LD1WB_4H_fixed, LD1WB_...
- printVectorList(MI, 0, O, A64Layout_VL_4H, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1Rv16b_POST, LD1Rv8b_POST
+ printPostIncOperand2(MI, 3, O, 1);
+ return;
break;
case 19:
- // LD1R_4S, LD1R_WB_4S_fixed, LD1R_WB_4S_register, LD1WB_4S_fixed, LD1WB_...
- printVectorList(MI, 0, O, A64Layout_VL_4S, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1Rv2s_POST, LD1Rv4s_POST, LD2Rv4h_POST, LD2Rv8h_POST, LD4Rv16b_POST,...
+ printPostIncOperand2(MI, 3, O, 4);
+ return;
break;
case 20:
- // LD1R_8B, LD1R_WB_8B_fixed, LD1R_WB_8B_register, LD1WB_8B_fixed, LD1WB_...
- printVectorList(MI, 0, O, A64Layout_VL_8B, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1Rv4h_POST, LD1Rv8h_POST, LD2Rv16b_POST, LD2Rv8b_POST
+ printPostIncOperand2(MI, 3, O, 2);
+ return;
break;
case 21:
- // LD1R_8H, LD1R_WB_8H_fixed, LD1R_WB_8H_register, LD1WB_8H_fixed, LD1WB_...
- printVectorList(MI, 0, O, A64Layout_VL_8H, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1Threev16b_POST, LD1Threev2d_POST, LD1Threev4s_POST, LD1Threev8h_POS...
+ printPostIncOperand2(MI, 3, O, 48);
+ return;
break;
case 22:
- // LD1x2WB_16B_fixed, LD1x2WB_16B_register, LD1x2_16B, LD2R_16B, LD2R_WB_...
- printVectorList(MI, 0, O, A64Layout_VL_16B, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1Threev1d_POST, LD1Threev2s_POST, LD1Threev4h_POST, LD1Threev8b_POST...
+ printPostIncOperand2(MI, 3, O, 24);
+ return;
break;
case 23:
- // LD1x2WB_1D_fixed, LD1x2WB_1D_register, LD1x2_1D, LD2R_1D, LD2R_WB_1D_f...
- printVectorList(MI, 0, O, A64Layout_VL_1D, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1i16, LD1i32, LD1i64, LD1i8, LD2i16, LD2i32, LD2i64, LD2i8, LD3i16, ...
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
break;
case 24:
- // LD1x2WB_2D_fixed, LD1x2WB_2D_register, LD1x2_2D, LD2R_2D, LD2R_WB_2D_f...
- printVectorList(MI, 0, O, A64Layout_VL_2D, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1i16_POST, LD2i8_POST
+ printPostIncOperand2(MI, 5, O, 2);
+ return;
break;
case 25:
- // LD1x2WB_2S_fixed, LD1x2WB_2S_register, LD1x2_2S, LD2R_2S, LD2R_WB_2S_f...
- printVectorList(MI, 0, O, A64Layout_VL_2S, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1i32_POST, LD2i16_POST, LD4i8_POST
+ printPostIncOperand2(MI, 5, O, 4);
+ return;
break;
case 26:
- // LD1x2WB_4H_fixed, LD1x2WB_4H_register, LD1x2_4H, LD2R_4H, LD2R_WB_4H_f...
- printVectorList(MI, 0, O, A64Layout_VL_4H, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1i64_POST, LD2i32_POST, LD4i16_POST
+ printPostIncOperand2(MI, 5, O, 8);
+ return;
break;
case 27:
- // LD1x2WB_4S_fixed, LD1x2WB_4S_register, LD1x2_4S, LD2R_4S, LD2R_WB_4S_f...
- printVectorList(MI, 0, O, A64Layout_VL_4S, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD1i8_POST
+ printPostIncOperand2(MI, 5, O, 1);
+ return;
break;
case 28:
- // LD1x2WB_8B_fixed, LD1x2WB_8B_register, LD1x2_8B, LD2R_8B, LD2R_WB_8B_f...
- printVectorList(MI, 0, O, A64Layout_VL_8B, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD2i64_POST, LD4i32_POST
+ printPostIncOperand2(MI, 5, O, 16);
+ return;
break;
case 29:
- // LD1x2WB_8H_fixed, LD1x2WB_8H_register, LD1x2_8H, LD2R_8H, LD2R_WB_8H_f...
- printVectorList(MI, 0, O, A64Layout_VL_8H, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD3Rv16b_POST, LD3Rv8b_POST
+ printPostIncOperand2(MI, 3, O, 3);
+ return;
break;
case 30:
- // LD1x3WB_16B_fixed, LD1x3WB_16B_register, LD1x3_16B, LD3R_16B, LD3R_WB_...
- printVectorList(MI, 0, O, A64Layout_VL_16B, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD3Rv2s_POST, LD3Rv4s_POST
+ printPostIncOperand2(MI, 3, O, 12);
+ return;
break;
case 31:
- // LD1x3WB_1D_fixed, LD1x3WB_1D_register, LD1x3_1D, LD3R_1D, LD3R_WB_1D_f...
- printVectorList(MI, 0, O, A64Layout_VL_1D, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD3Rv4h_POST, LD3Rv8h_POST
+ printPostIncOperand2(MI, 3, O, 6);
+ return;
break;
case 32:
- // LD1x3WB_2D_fixed, LD1x3WB_2D_register, LD1x3_2D, LD3R_2D, LD3R_WB_2D_f...
- printVectorList(MI, 0, O, A64Layout_VL_2D, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD3i16_POST
+ printPostIncOperand2(MI, 5, O, 6);
+ return;
break;
case 33:
- // LD1x3WB_2S_fixed, LD1x3WB_2S_register, LD1x3_2S, LD3R_2S, LD3R_WB_2S_f...
- printVectorList(MI, 0, O, A64Layout_VL_2S, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD3i32_POST
+ printPostIncOperand2(MI, 5, O, 12);
+ return;
break;
case 34:
- // LD1x3WB_4H_fixed, LD1x3WB_4H_register, LD1x3_4H, LD3R_4H, LD3R_WB_4H_f...
- printVectorList(MI, 0, O, A64Layout_VL_4H, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD3i64_POST
+ printPostIncOperand2(MI, 5, O, 24);
+ return;
break;
case 35:
- // LD1x3WB_4S_fixed, LD1x3WB_4S_register, LD1x3_4S, LD3R_4S, LD3R_WB_4S_f...
- printVectorList(MI, 0, O, A64Layout_VL_4S, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD3i8_POST
+ printPostIncOperand2(MI, 5, O, 3);
+ return;
break;
case 36:
- // LD1x3WB_8B_fixed, LD1x3WB_8B_register, LD1x3_8B, LD3R_8B, LD3R_WB_8B_f...
- printVectorList(MI, 0, O, A64Layout_VL_8B, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // LD4i64_POST
+ printPostIncOperand2(MI, 5, O, 32);
+ return;
break;
case 37:
- // LD1x3WB_8H_fixed, LD1x3WB_8H_register, LD1x3_8H, LD3R_8H, LD3R_WB_8H_f...
- printVectorList(MI, 0, O, A64Layout_VL_8H, 3, MRI);
+ // LDARB, LDARH, LDARW, LDARX, LDAXRB, LDAXRH, LDAXRW, LDAXRX, LDRBBpost,...
SStream_concat0(O, ", [");
set_mem_access(MI, true);
break;
case 38:
- // LD1x4WB_16B_fixed, LD1x4WB_16B_register, LD1x4_16B, LD4R_16B, LD4R_WB_...
- printVectorList(MI, 0, O, A64Layout_VL_16B, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // PMULLv1i64, PMULLv2i64
+ SStream_concat0(O, ".1q, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1Q);
+ printVRegOperand(MI, 1, O);
break;
case 39:
- // LD1x4WB_1D_fixed, LD1x4WB_1D_register, LD1x4_1D, LD4R_1D, LD4R_WB_1D_f...
- printVectorList(MI, 0, O, A64Layout_VL_1D, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
+ // SADALPv2i32_v1i64, SADDLPv2i32_v1i64, UADALPv2i32_v1i64, UADDLPv2i32_v...
+ SStream_concat0(O, ".1d, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D);
break;
case 40:
- // LD1x4WB_2D_fixed, LD1x4WB_2D_register, LD1x4_2D, LD4R_2D, LD4R_WB_2D_f...
- printVectorList(MI, 0, O, A64Layout_VL_2D, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- break;
- case 41:
- // LD1x4WB_2S_fixed, LD1x4WB_2S_register, LD1x4_2S, LD4R_2S, LD4R_WB_2S_f...
- printVectorList(MI, 0, O, A64Layout_VL_2S, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- break;
- case 42:
- // LD1x4WB_4H_fixed, LD1x4WB_4H_register, LD1x4_4H, LD4R_4H, LD4R_WB_4H_f...
- printVectorList(MI, 0, O, A64Layout_VL_4H, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- break;
- case 43:
- // LD1x4WB_4S_fixed, LD1x4WB_4S_register, LD1x4_4S, LD4R_4S, LD4R_WB_4S_f...
- printVectorList(MI, 0, O, A64Layout_VL_4S, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- break;
- case 44:
- // LD1x4WB_8B_fixed, LD1x4WB_8B_register, LD1x4_8B, LD4R_8B, LD4R_WB_8B_f...
- printVectorList(MI, 0, O, A64Layout_VL_8B, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- break;
- case 45:
- // LD1x4WB_8H_fixed, LD1x4WB_8H_register, LD1x4_8H, LD4R_8H, LD4R_WB_8H_f...
- printVectorList(MI, 0, O, A64Layout_VL_8H, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- break;
- case 46:
- // LD2LN_B, LD2LN_WB_B_fixed, LD2LN_WB_B_register
- printVectorList(MI, 0, O, A64Layout_VL_B, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 47:
- // LD2LN_D, LD2LN_WB_D_fixed, LD2LN_WB_D_register
- printVectorList(MI, 0, O, A64Layout_VL_D, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 48:
- // LD2LN_H, LD2LN_WB_H_fixed, LD2LN_WB_H_register
- printVectorList(MI, 0, O, A64Layout_VL_H, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 49:
- // LD2LN_S, LD2LN_WB_S_fixed, LD2LN_WB_S_register
- printVectorList(MI, 0, O, A64Layout_VL_S, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 50:
- // LD3LN_B, LD3LN_WB_B_fixed, LD3LN_WB_B_register
- printVectorList(MI, 0, O, A64Layout_VL_B, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 51:
- // LD3LN_D, LD3LN_WB_D_fixed, LD3LN_WB_D_register
- printVectorList(MI, 0, O, A64Layout_VL_D, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 52:
- // LD3LN_H, LD3LN_WB_H_fixed, LD3LN_WB_H_register
- printVectorList(MI, 0, O, A64Layout_VL_H, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 53:
- // LD3LN_S, LD3LN_WB_S_fixed, LD3LN_WB_S_register
- printVectorList(MI, 0, O, A64Layout_VL_S, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 54:
- // LD4LN_B, LD4LN_WB_B_fixed, LD4LN_WB_B_register
- printVectorList(MI, 0, O, A64Layout_VL_B, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 55:
- // LD4LN_D, LD4LN_WB_D_fixed, LD4LN_WB_D_register
- printVectorList(MI, 0, O, A64Layout_VL_D, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 56:
- // LD4LN_H, LD4LN_WB_H_fixed, LD4LN_WB_H_register
- printVectorList(MI, 0, O, A64Layout_VL_H, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 57:
- // LD4LN_S, LD4LN_WB_S_fixed, LD4LN_WB_S_register
- printVectorList(MI, 0, O, A64Layout_VL_S, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- break;
- case 58:
- // LS16_PostInd_STR, LS16_PreInd_STR, LS32_PostInd_STR, LS32_PreInd_STR, ...
- printOperand(MI, 1, O);
- break;
- case 59:
- // MSRii
- printNamedImmOperand(MI, 0, O, &A64PState_PStateMapper);
- SStream_concat0(O, ", ");
- printOperand(MI, 1, O);
- return;
- break;
- case 60:
- // MSRix
- printMSROperand(MI, 0, O);
- SStream_concat0(O, ", ");
- printOperand(MI, 1, O);
- return;
- break;
- case 61:
- // PRFM, PRFM_Wm_RegOffset, PRFM_Xm_RegOffset, PRFM_lit, PRFUM
- printNamedImmOperand(MI, 0, O, &A64PRFM_PRFMMapper);
- break;
- case 62:
- // ST1LN_B
- printVectorList(MI, 1, O, A64Layout_VL_B, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 63:
- // ST1LN_D
- printVectorList(MI, 1, O, A64Layout_VL_D, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 64:
- // ST1LN_H
- printVectorList(MI, 1, O, A64Layout_VL_H, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 65:
- // ST1LN_S
- printVectorList(MI, 1, O, A64Layout_VL_S, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 66:
- // ST1LN_WB_B_fixed, ST1LN_WB_B_register
- printVectorList(MI, 3, O, A64Layout_VL_B, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
+ // ST1i16_POST, ST1i32_POST, ST1i64_POST, ST1i8_POST, ST2i16_POST, ST2i32...
SStream_concat0(O, "], ");
set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 67:
- // ST1LN_WB_D_fixed, ST1LN_WB_D_register
- printVectorList(MI, 3, O, A64Layout_VL_D, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 68:
- // ST1LN_WB_H_fixed, ST1LN_WB_H_register
- printVectorList(MI, 3, O, A64Layout_VL_H, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 69:
- // ST1LN_WB_S_fixed, ST1LN_WB_S_register
- printVectorList(MI, 3, O, A64Layout_VL_S, 1, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 70:
- // ST1WB_16B_fixed, ST1WB_16B_register
- printVectorList(MI, 3, O, A64Layout_VL_16B, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 71:
- // ST1WB_1D_fixed, ST1WB_1D_register
- printVectorList(MI, 3, O, A64Layout_VL_1D, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 72:
- // ST1WB_2D_fixed, ST1WB_2D_register
- printVectorList(MI, 3, O, A64Layout_VL_2D, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 73:
- // ST1WB_2S_fixed, ST1WB_2S_register
- printVectorList(MI, 3, O, A64Layout_VL_2S, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 74:
- // ST1WB_4H_fixed, ST1WB_4H_register
- printVectorList(MI, 3, O, A64Layout_VL_4H, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 75:
- // ST1WB_4S_fixed, ST1WB_4S_register
- printVectorList(MI, 3, O, A64Layout_VL_4S, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 76:
- // ST1WB_8B_fixed, ST1WB_8B_register
- printVectorList(MI, 3, O, A64Layout_VL_8B, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 77:
- // ST1WB_8H_fixed, ST1WB_8H_register
- printVectorList(MI, 3, O, A64Layout_VL_8H, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 78:
- // ST1_16B
- printVectorList(MI, 1, O, A64Layout_VL_16B, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 79:
- // ST1_1D
- printVectorList(MI, 1, O, A64Layout_VL_1D, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 80:
- // ST1_2D
- printVectorList(MI, 1, O, A64Layout_VL_2D, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 81:
- // ST1_2S
- printVectorList(MI, 1, O, A64Layout_VL_2S, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 82:
- // ST1_4H
- printVectorList(MI, 1, O, A64Layout_VL_4H, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 83:
- // ST1_4S
- printVectorList(MI, 1, O, A64Layout_VL_4S, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 84:
- // ST1_8B
- printVectorList(MI, 1, O, A64Layout_VL_8B, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 85:
- // ST1_8H
- printVectorList(MI, 1, O, A64Layout_VL_8H, 1, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 86:
- // ST1x2WB_16B_fixed, ST1x2WB_16B_register, ST2WB_16B_fixed, ST2WB_16B_re...
- printVectorList(MI, 3, O, A64Layout_VL_16B, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 87:
- // ST1x2WB_1D_fixed, ST1x2WB_1D_register
- printVectorList(MI, 3, O, A64Layout_VL_1D, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 88:
- // ST1x2WB_2D_fixed, ST1x2WB_2D_register, ST2WB_2D_fixed, ST2WB_2D_regist...
- printVectorList(MI, 3, O, A64Layout_VL_2D, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 89:
- // ST1x2WB_2S_fixed, ST1x2WB_2S_register, ST2WB_2S_fixed, ST2WB_2S_regist...
- printVectorList(MI, 3, O, A64Layout_VL_2S, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 90:
- // ST1x2WB_4H_fixed, ST1x2WB_4H_register, ST2WB_4H_fixed, ST2WB_4H_regist...
- printVectorList(MI, 3, O, A64Layout_VL_4H, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 91:
- // ST1x2WB_4S_fixed, ST1x2WB_4S_register, ST2WB_4S_fixed, ST2WB_4S_regist...
- printVectorList(MI, 3, O, A64Layout_VL_4S, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 92:
- // ST1x2WB_8B_fixed, ST1x2WB_8B_register, ST2WB_8B_fixed, ST2WB_8B_regist...
- printVectorList(MI, 3, O, A64Layout_VL_8B, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 93:
- // ST1x2WB_8H_fixed, ST1x2WB_8H_register, ST2WB_8H_fixed, ST2WB_8H_regist...
- printVectorList(MI, 3, O, A64Layout_VL_8H, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 94:
- // ST1x2_16B, ST2_16B
- printVectorList(MI, 1, O, A64Layout_VL_16B, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 95:
- // ST1x2_1D
- printVectorList(MI, 1, O, A64Layout_VL_1D, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 96:
- // ST1x2_2D, ST2_2D
- printVectorList(MI, 1, O, A64Layout_VL_2D, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 97:
- // ST1x2_2S, ST2_2S
- printVectorList(MI, 1, O, A64Layout_VL_2S, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 98:
- // ST1x2_4H, ST2_4H
- printVectorList(MI, 1, O, A64Layout_VL_4H, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 99:
- // ST1x2_4S, ST2_4S
- printVectorList(MI, 1, O, A64Layout_VL_4S, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 100:
- // ST1x2_8B, ST2_8B
- printVectorList(MI, 1, O, A64Layout_VL_8B, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 101:
- // ST1x2_8H, ST2_8H
- printVectorList(MI, 1, O, A64Layout_VL_8H, 2, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 102:
- // ST1x3WB_16B_fixed, ST1x3WB_16B_register, ST3WB_16B_fixed, ST3WB_16B_re...
- printVectorList(MI, 3, O, A64Layout_VL_16B, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 103:
- // ST1x3WB_1D_fixed, ST1x3WB_1D_register
- printVectorList(MI, 3, O, A64Layout_VL_1D, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 104:
- // ST1x3WB_2D_fixed, ST1x3WB_2D_register, ST3WB_2D_fixed, ST3WB_2D_regist...
- printVectorList(MI, 3, O, A64Layout_VL_2D, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 105:
- // ST1x3WB_2S_fixed, ST1x3WB_2S_register, ST3WB_2S_fixed, ST3WB_2S_regist...
- printVectorList(MI, 3, O, A64Layout_VL_2S, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 106:
- // ST1x3WB_4H_fixed, ST1x3WB_4H_register, ST3WB_4H_fixed, ST3WB_4H_regist...
- printVectorList(MI, 3, O, A64Layout_VL_4H, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 107:
- // ST1x3WB_4S_fixed, ST1x3WB_4S_register, ST3WB_4S_fixed, ST3WB_4S_regist...
- printVectorList(MI, 3, O, A64Layout_VL_4S, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 108:
- // ST1x3WB_8B_fixed, ST1x3WB_8B_register, ST3WB_8B_fixed, ST3WB_8B_regist...
- printVectorList(MI, 3, O, A64Layout_VL_8B, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 109:
- // ST1x3WB_8H_fixed, ST1x3WB_8H_register, ST3WB_8H_fixed, ST3WB_8H_regist...
- printVectorList(MI, 3, O, A64Layout_VL_8H, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 110:
- // ST1x3_16B, ST3_16B
- printVectorList(MI, 1, O, A64Layout_VL_16B, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 111:
- // ST1x3_1D
- printVectorList(MI, 1, O, A64Layout_VL_1D, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 112:
- // ST1x3_2D, ST3_2D
- printVectorList(MI, 1, O, A64Layout_VL_2D, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 113:
- // ST1x3_2S, ST3_2S
- printVectorList(MI, 1, O, A64Layout_VL_2S, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 114:
- // ST1x3_4H, ST3_4H
- printVectorList(MI, 1, O, A64Layout_VL_4H, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 115:
- // ST1x3_4S, ST3_4S
- printVectorList(MI, 1, O, A64Layout_VL_4S, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 116:
- // ST1x3_8B, ST3_8B
- printVectorList(MI, 1, O, A64Layout_VL_8B, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 117:
- // ST1x3_8H, ST3_8H
- printVectorList(MI, 1, O, A64Layout_VL_8H, 3, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 118:
- // ST1x4WB_16B_fixed, ST1x4WB_16B_register, ST4WB_16B_fixed, ST4WB_16B_re...
- printVectorList(MI, 3, O, A64Layout_VL_16B, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 119:
- // ST1x4WB_1D_fixed, ST1x4WB_1D_register
- printVectorList(MI, 3, O, A64Layout_VL_1D, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 120:
- // ST1x4WB_2D_fixed, ST1x4WB_2D_register, ST4WB_2D_fixed, ST4WB_2D_regist...
- printVectorList(MI, 3, O, A64Layout_VL_2D, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 121:
- // ST1x4WB_2S_fixed, ST1x4WB_2S_register, ST4WB_2S_fixed, ST4WB_2S_regist...
- printVectorList(MI, 3, O, A64Layout_VL_2S, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 122:
- // ST1x4WB_4H_fixed, ST1x4WB_4H_register, ST4WB_4H_fixed, ST4WB_4H_regist...
- printVectorList(MI, 3, O, A64Layout_VL_4H, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 123:
- // ST1x4WB_4S_fixed, ST1x4WB_4S_register, ST4WB_4S_fixed, ST4WB_4S_regist...
- printVectorList(MI, 3, O, A64Layout_VL_4S, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 124:
- // ST1x4WB_8B_fixed, ST1x4WB_8B_register, ST4WB_8B_fixed, ST4WB_8B_regist...
- printVectorList(MI, 3, O, A64Layout_VL_8B, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 125:
- // ST1x4WB_8H_fixed, ST1x4WB_8H_register, ST4WB_8H_fixed, ST4WB_8H_regist...
- printVectorList(MI, 3, O, A64Layout_VL_8H, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 126:
- // ST1x4_16B, ST4_16B
- printVectorList(MI, 1, O, A64Layout_VL_16B, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 127:
- // ST1x4_1D
- printVectorList(MI, 1, O, A64Layout_VL_1D, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 128:
- // ST1x4_2D, ST4_2D
- printVectorList(MI, 1, O, A64Layout_VL_2D, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 129:
- // ST1x4_2S, ST4_2S
- printVectorList(MI, 1, O, A64Layout_VL_2S, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 130:
- // ST1x4_4H, ST4_4H
- printVectorList(MI, 1, O, A64Layout_VL_4H, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 131:
- // ST1x4_4S, ST4_4S
- printVectorList(MI, 1, O, A64Layout_VL_4S, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 132:
- // ST1x4_8B, ST4_8B
- printVectorList(MI, 1, O, A64Layout_VL_8B, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 133:
- // ST1x4_8H, ST4_8H
- printVectorList(MI, 1, O, A64Layout_VL_8H, 4, MRI);
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 134:
- // ST2LN_B
- printVectorList(MI, 1, O, A64Layout_VL_B, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 135:
- // ST2LN_D
- printVectorList(MI, 1, O, A64Layout_VL_D, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 136:
- // ST2LN_H
- printVectorList(MI, 1, O, A64Layout_VL_H, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 137:
- // ST2LN_S
- printVectorList(MI, 1, O, A64Layout_VL_S, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 138:
- // ST2LN_WB_B_fixed, ST2LN_WB_B_register
- printVectorList(MI, 3, O, A64Layout_VL_B, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 139:
- // ST2LN_WB_D_fixed, ST2LN_WB_D_register
- printVectorList(MI, 3, O, A64Layout_VL_D, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 140:
- // ST2LN_WB_H_fixed, ST2LN_WB_H_register
- printVectorList(MI, 3, O, A64Layout_VL_H, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 141:
- // ST2LN_WB_S_fixed, ST2LN_WB_S_register
- printVectorList(MI, 3, O, A64Layout_VL_S, 2, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 142:
- // ST3LN_B
- printVectorList(MI, 1, O, A64Layout_VL_B, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 143:
- // ST3LN_D
- printVectorList(MI, 1, O, A64Layout_VL_D, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 144:
- // ST3LN_H
- printVectorList(MI, 1, O, A64Layout_VL_H, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 145:
- // ST3LN_S
- printVectorList(MI, 1, O, A64Layout_VL_S, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 146:
- // ST3LN_WB_B_fixed, ST3LN_WB_B_register
- printVectorList(MI, 3, O, A64Layout_VL_B, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 147:
- // ST3LN_WB_D_fixed, ST3LN_WB_D_register
- printVectorList(MI, 3, O, A64Layout_VL_D, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 148:
- // ST3LN_WB_H_fixed, ST3LN_WB_H_register
- printVectorList(MI, 3, O, A64Layout_VL_H, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 149:
- // ST3LN_WB_S_fixed, ST3LN_WB_S_register
- printVectorList(MI, 3, O, A64Layout_VL_S, 3, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 150:
- // ST4LN_B
- printVectorList(MI, 1, O, A64Layout_VL_B, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 151:
- // ST4LN_D
- printVectorList(MI, 1, O, A64Layout_VL_D, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 152:
- // ST4LN_H
- printVectorList(MI, 1, O, A64Layout_VL_H, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 153:
- // ST4LN_S
- printVectorList(MI, 1, O, A64Layout_VL_S, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 2, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 0, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 154:
- // ST4LN_WB_B_fixed, ST4LN_WB_B_register
- printVectorList(MI, 3, O, A64Layout_VL_B, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 155:
- // ST4LN_WB_D_fixed, ST4LN_WB_D_register
- printVectorList(MI, 3, O, A64Layout_VL_D, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 156:
- // ST4LN_WB_H_fixed, ST4LN_WB_H_register
- printVectorList(MI, 3, O, A64Layout_VL_H, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 157:
- // ST4LN_WB_S_fixed, ST4LN_WB_S_register
- printVectorList(MI, 3, O, A64Layout_VL_S, 4, MRI);
- SStream_concat0(O, "[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 2, O);
- return;
- break;
- case 158:
- // TLBIi, TLBIix
- printNamedImmOperand(MI, 0, O, &A64TLBI_TLBIMapper);
break;
}
- // Fragment 1 encoded into 5 bits for 20 unique commands.
- //printf("Frag-1: %"PRIu64"\n", (Bits >> 20) & 31);
- switch ((Bits >> 20) & 31) {
+ // Fragment 2 encoded into 5 bits for 28 unique commands.
+ //printf("Frag-2: %"PRIu64"\n", (Bits >> 24) & 31);
+ switch ((Bits >> 24) & 31) {
default: // unreachable.
case 0:
- // ABS16b, ADDHN2vvv_16b8h, ADDP_16B, ADDvvv_16B, AESD, AESE, AESIMC, AES...
- SStream_concat0(O, ".16b, ");
+ // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A...
+ printVRegOperand(MI, 1, O);
break;
case 1:
- // ABS2d, ADDP_2D, ADDvvv_2D, CMEQvvi_2D, CMEQvvv_2D, CMGEvvi_2D, CMGEvvv...
- SStream_concat0(O, ".2d, ");
- break;
- case 2:
- // ABS2s, ADDHNvvv_2s2d, ADDP_2S, ADDvvv_2S, BICvi_lsl_2S, CLS2s, CLZ2s, ...
- SStream_concat0(O, ".2s, ");
- break;
- case 3:
- // ABS4h, ADDHNvvv_4h4s, ADDP_4H, ADDvvv_4H, BICvi_lsl_4H, CLS4h, CLZ4h, ...
- SStream_concat0(O, ".4h, ");
- break;
- case 4:
- // ABS4s, ADDHN2vvv_4s2d, ADDP_4S, ADDvvv_4S, BICvi_lsl_4S, CLS4s, CLZ4s,...
- SStream_concat0(O, ".4s, ");
- break;
- case 5:
- // ABS8b, ADDHNvvv_8b8h, ADDP_8B, ADDvvv_8B, ANDvvv_8B, BICvvv_8B, BIFvvv...
- SStream_concat0(O, ".8b, ");
- break;
- case 6:
- // ABS8h, ADDHN2vvv_8h4s, ADDP_8H, ADDvvv_8H, BICvi_lsl_8H, CLS8h, CLZ8h,...
- SStream_concat0(O, ".8h, ");
- break;
- case 7:
- // ABSdd, ADCSwww, ADCSxxx, ADCwww, ADCxxx, ADDPvv_D_2D, ADDSwww_asr, ADD...
- SStream_concat0(O, ", ");
- break;
- case 8:
- // BLRx, BRKi, BRx, CLREXi, DCPS1i, DCPS2i, DCPS3i, HINTi, HLTi, HVCi, IC...
- return;
- break;
- case 9:
- // FMOVvx, INSELd, INSdx
- SStream_concat0(O, ".d[");
- set_mem_access(MI, true);
- break;
- case 10:
- // INSELb, INSbw
- SStream_concat0(O, ".b[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 3, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- break;
- case 11:
- // INSELh, INShw
- SStream_concat0(O, ".h[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 3, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- break;
- case 12:
- // INSELs, INSsw
- SStream_concat0(O, ".s[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 3, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- break;
- case 13:
- // LD1LN_B, LD1LN_D, LD1LN_H, LD1LN_S, LD2LN_B, LD2LN_D, LD2LN_H, LD2LN_S...
- printUImmBareOperand(MI, 3, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 1, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 14:
- // LD1LN_WB_B_fixed, LD1LN_WB_B_register, LD1LN_WB_D_fixed, LD1LN_WB_D_re...
- printUImmBareOperand(MI, 5, O);
- set_mem_access(MI, false);
- SStream_concat0(O, "], [");
- set_mem_access(MI, true);
- printOperand(MI, 2, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 3, O);
- return;
- break;
- case 15:
- // LD1R_16B, LD1R_1D, LD1R_2D, LD1R_2S, LD1R_4H, LD1R_4S, LD1R_8B, LD1R_8...
- printOperand(MI, 1, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 16:
- // LD1R_WB_16B_fixed, LD1R_WB_16B_register, LD1R_WB_1D_fixed, LD1R_WB_1D_...
- printOperand(MI, 2, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 3, O);
- return;
- break;
- case 17:
- // LDAR_byte, LDAR_dword, LDAR_hword, LDAR_word, LDAXR_byte, LDAXR_dword,...
- SStream_concat0(O, ", [");
- set_mem_access(MI, true);
- break;
- case 18:
- // PMULL2vvv_1q2d, PMULLvvv_1q1d
- SStream_concat0(O, ".1q, ");
- printVPRRegister(MI, 1, O);
- break;
- case 19:
- // SADALP2s1d, SADDLP2s1d, UADALP2s1d, UADDLP2s1d
- SStream_concat0(O, ".1d, ");
- break;
- }
-
-
- // Fragment 2 encoded into 5 bits for 30 unique commands.
- //printf("Frag-2: %"PRIu64"\n", (Bits >> 25) & 31);
- switch ((Bits >> 25) & 31) {
- default: // unreachable.
- case 0:
- // ABS16b, ABS2d, ABS2s, ABS4h, ABS4s, ABS8b, ABS8h, ADDHNvvv_2s2d, ADDHN...
- printVPRRegister(MI, 1, O);
- break;
- case 1:
- // ABSdd, ADCSwww, ADCSxxx, ADCwww, ADCxxx, ADDSwww_asr, ADDSwww_lsl, ADD...
+ // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDSWri, ADDSWrs, ADDSWrx, ADD...
printOperand(MI, 1, O);
break;
case 2:
- // ADDHN2vvv_16b8h, ADDHN2vvv_4s2d, ADDHN2vvv_8h4s, AESD, AESE, BIFvvv_16...
- printVPRRegister(MI, 2, O);
+ // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ...
+ printVRegOperand(MI, 2, O);
break;
case 3:
- // ADDwwi_lsl0_cmp, ADDxxi_lsl0_cmp, SUBwwi_lsl0_cmp, SUBxxi_lsl0_cmp
- printAddSubImmLSL0Operand(MI, 1, O);
+ // ADRP
+ printAdrpLabel(MI, 1, O);
return;
break;
case 4:
- // ADDwwi_lsl12_cmp, ADDxxi_lsl12_cmp, SUBwwi_lsl12_cmp, SUBxxi_lsl12_cmp
- printAddSubImmLSL12Operand(MI, 1, O);
- return;
+ // BFMWri, BFMXri, FMLAv1i32_indexed, FMLAv1i64_indexed, FMLSv1i32_indexe...
+ printOperand(MI, 2, O);
break;
case 5:
- // ADRPxi
- printLabelOperand(MI, 1, O, 21, 4096);
+ // BICv2i32, BICv4i16, BICv4i32, BICv8i16, MOVKWi, MOVKXi, ORRv2i32, ORRv...
+ printHexImm(MI, 2, O);
+ printShifter(MI, 3, O);
return;
break;
case 6:
- // ADRxi
- printLabelOperand(MI, 1, O, 21, 1);
+ // CBNZW, CBNZX, CBZW, CBZX, LDRDl, LDRQl, LDRSWl, LDRSl, LDRWl, LDRXl, P...
+ printAlignedLabel(MI, 1, O);
return;
break;
case 7:
- // BFIwwii, BFIxxii, BFMwwii, BFMxxii, BFXILwwii, BFXILxxii, FMLAddv_2D, ...
- printOperand(MI, 2, O);
- break;
- case 8:
- // BICvi_lsl_2S, BICvi_lsl_4H, BICvi_lsl_4S, BICvi_lsl_8H, ORRvi_lsl_2S, ...
- printUImmHexOperand(MI, 2, O);
- break;
- case 9:
- // CBNZw, CBNZx, CBZw, CBZx, LDRSWx_lit, LDRd_lit, LDRq_lit, LDRs_lit, LD...
- printLabelOperand(MI, 1, O, 19, 4);
- return;
- break;
- case 10:
- // FCMPdi_quiet, FCMPdi_sig, FCMPsi_quiet, FCMPsi_sig
- printFPZeroOperand(MI, 1, O);
- return;
- break;
- case 11:
- // FMOVdi, FMOVsi, FMOVvi_2D, FMOVvi_2S, FMOVvi_4S
+ // FMOVDi, FMOVSi, FMOVv2f32_ns, FMOVv2f64_ns, FMOVv4f32_ns
printFPImmOperand(MI, 1, O);
return;
break;
+ case 8:
+ // INSvi16gpr, INSvi32gpr, INSvi64gpr, INSvi8gpr
+ printOperand(MI, 3, O);
+ return;
+ break;
+ case 9:
+ // INSvi16lane, INSvi32lane, INSvi64lane, INSvi8lane
+ printVRegOperand(MI, 3, O);
+ break;
+ case 10:
+ // MOVID, MOVIv2d_ns
+ printSIMDType10Operand(MI, 1, O);
+ return;
+ break;
+ case 11:
+ // MOVIv16b_ns, MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl...
+ printHexImm(MI, 1, O);
+ break;
case 12:
- // FMOVvx
- printBareImmOperand(MI, 2, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- printOperand(MI, 1, O);
+ // MRS
+ printMRSSystemRegister(MI, 1, O);
return;
break;
case 13:
- // INSELd, INSdx
- printUImmBareOperand(MI, 3, O);
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
+ // PMULLv1i64
+ SStream_concat0(O, ".1d, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D);
+ printVRegOperand(MI, 2, O);
+ SStream_concat0(O, ".1d");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D);
+ return;
break;
case 14:
- // MOVIdi, MOVIvi_2D
- printNeonUImm64MaskOperand(MI, 1, O);
+ // PMULLv2i64
+ SStream_concat0(O, ".2d, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
+ printVRegOperand(MI, 2, O);
+ SStream_concat0(O, ".2d");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
return;
break;
case 15:
- // MOVIvi_16B, MOVIvi_8B, MOVIvi_lsl_2S, MOVIvi_lsl_4H, MOVIvi_lsl_4S, MO...
- printUImmHexOperand(MI, 1, O);
+ // ST1i16_POST, ST2i8_POST
+ printPostIncOperand2(MI, 4, O, 2);
+ return;
break;
case 16:
- // MOVKwii, MOVKxii
- printMoveWideImmOperand(MI, 2, O);
+ // ST1i32_POST, ST2i16_POST, ST4i8_POST
+ printPostIncOperand2(MI, 4, O, 4);
return;
break;
case 17:
- // MOVNwii, MOVNxii, MOVZwii, MOVZxii
- printMoveWideImmOperand(MI, 1, O);
+ // ST1i64_POST, ST2i32_POST, ST4i16_POST
+ printPostIncOperand2(MI, 4, O, 8);
return;
break;
case 18:
- // MRSxi
- printMRSOperand(MI, 1, O);
+ // ST1i8_POST
+ printPostIncOperand2(MI, 4, O, 1);
return;
break;
case 19:
- // PMULL2vvv_1q2d
- SStream_concat0(O, ".2d, ");
- printVPRRegister(MI, 2, O);
- SStream_concat0(O, ".2d");
+ // ST2i64_POST, ST4i32_POST
+ printPostIncOperand2(MI, 4, O, 16);
return;
break;
case 20:
- // PMULLvvv_1q1d
- SStream_concat0(O, ".1d, ");
- printVPRRegister(MI, 2, O);
- SStream_concat0(O, ".1d");
+ // ST3i16_POST
+ printPostIncOperand2(MI, 4, O, 6);
return;
break;
case 21:
- // SYSiccix
- printCRxOperand(MI, 1, O);
+ // ST3i32_POST
+ printPostIncOperand2(MI, 4, O, 12);
+ return;
+ break;
+ case 22:
+ // ST3i64_POST
+ printPostIncOperand2(MI, 4, O, 24);
+ return;
+ break;
+ case 23:
+ // ST3i8_POST
+ printPostIncOperand2(MI, 4, O, 3);
+ return;
+ break;
+ case 24:
+ // ST4i64_POST
+ printPostIncOperand2(MI, 4, O, 32);
+ return;
+ break;
+ case 25:
+ // SYSxt
+ printSysCROperand(MI, 1, O);
SStream_concat0(O, ", ");
- printCRxOperand(MI, 2, O);
+ printSysCROperand(MI, 2, O);
SStream_concat0(O, ", ");
printOperand(MI, 3, O);
SStream_concat0(O, ", ");
printOperand(MI, 4, O);
return;
break;
- case 22:
- // TBL1_16b, TBL1_8b
- printVectorList(MI, 1, O, A64Layout_VL_16B, 1, MRI);
- SStream_concat0(O, ", ");
- printVPRRegister(MI, 2, O);
- break;
- case 23:
- // TBL2_16b, TBL2_8b
- printVectorList(MI, 1, O, A64Layout_VL_16B, 2, MRI);
- SStream_concat0(O, ", ");
- printVPRRegister(MI, 2, O);
- break;
- case 24:
- // TBL3_16b, TBL3_8b
- printVectorList(MI, 1, O, A64Layout_VL_16B, 3, MRI);
- SStream_concat0(O, ", ");
- printVPRRegister(MI, 2, O);
- break;
- case 25:
- // TBL4_16b, TBL4_8b
- printVectorList(MI, 1, O, A64Layout_VL_16B, 4, MRI);
- SStream_concat0(O, ", ");
- printVPRRegister(MI, 2, O);
- break;
case 26:
- // TBX1_16b, TBX1_8b
- printVectorList(MI, 2, O, A64Layout_VL_16B, 1, MRI);
+ // TBLv16i8Four, TBLv16i8One, TBLv16i8Three, TBLv16i8Two, TBLv8i8Four, TB...
+ printTypedVectorList(MI, 1, O, 16, 'b', MRI);
SStream_concat0(O, ", ");
- printVPRRegister(MI, 3, O);
+ printVRegOperand(MI, 2, O);
break;
case 27:
- // TBX2_16b, TBX2_8b
- printVectorList(MI, 2, O, A64Layout_VL_16B, 2, MRI);
+ // TBXv16i8Four, TBXv16i8One, TBXv16i8Three, TBXv16i8Two, TBXv8i8Four, TB...
+ printTypedVectorList(MI, 2, O, 16, 'b', MRI);
SStream_concat0(O, ", ");
- printVPRRegister(MI, 3, O);
- break;
- case 28:
- // TBX3_16b, TBX3_8b
- printVectorList(MI, 2, O, A64Layout_VL_16B, 3, MRI);
- SStream_concat0(O, ", ");
- printVPRRegister(MI, 3, O);
- break;
- case 29:
- // TBX4_16b, TBX4_8b
- printVectorList(MI, 2, O, A64Layout_VL_16B, 4, MRI);
- SStream_concat0(O, ", ");
- printVPRRegister(MI, 3, O);
+ printVRegOperand(MI, 3, O);
break;
}
- // Fragment 3 encoded into 5 bits for 30 unique commands.
- //printf("Frag-3: %"PRIu64"\n", (Bits >> 30) & 31);
- switch ((Bits >> 30) & 31) {
+ // Fragment 3 encoded into 6 bits for 42 unique commands.
+ //printf("Frag-3: %"PRIu64"\n", (Bits >> 29) & 63);
+ switch ((Bits >> 29) & 63) {
default: // unreachable.
case 0:
- // ABS16b, ADDV_1b16b, AESD, AESE, AESIMC, AESMC, CLS16b, CLZ16b, CNT16b,...
+ // ABSv16i8, ADDVv16i8v, AESDrr, AESErr, AESIMCrr, AESMCrr, CLSv16i8, CLZ...
SStream_concat0(O, ".16b");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
return;
break;
case 1:
- // ABS2d, ADDPvv_D_2D, FABS2d, FADDPvv_D_2D, FCVTAS_2d, FCVTAU_2d, FCVTMS...
- SStream_concat0(O, ".2d");
+ // ABSv1i64, ADR, CLSWr, CLSXr, CLZWr, CLZXr, DUPv16i8gpr, DUPv2i32gpr, D...
return;
break;
case 2:
- // ABS2s, CLS2s, CLZ2s, FABS2s, FADDPvv_S_2S, FCVTAS_2s, FCVTAU_2s, FCVTL...
+ // ABSv2i32, CLSv2i32, CLZv2i32, FABSv2f32, FADDPv2i32p, FCVTASv2f32, FCV...
SStream_concat0(O, ".2s");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
return;
break;
case 3:
- // ABS4h, ADDV_1h4h, CLS4h, CLZ4h, FCVTL4h4s, NEG4h, REV32_4h, REV64_4h, ...
- SStream_concat0(O, ".4h");
+ // ABSv2i64, ADDPv2i64p, FABSv2f64, FADDPv2i64p, FCVTASv2f64, FCVTAUv2f64...
+ SStream_concat0(O, ".2d");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
return;
break;
case 4:
- // ABS4s, ADDV_1s4s, CLS4s, CLZ4s, FABS4s, FCVTAS_4s, FCVTAU_4s, FCVTL4s2...
- SStream_concat0(O, ".4s");
+ // ABSv4i16, ADDVv4i16v, CLSv4i16, CLZv4i16, FCVTLv4i16, NEGv4i16, REV32v...
+ SStream_concat0(O, ".4h");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
return;
break;
case 5:
- // ABS8b, ADDV_1b8b, CLS8b, CLZ8b, CNT8b, NEG8b, NOT8b, RBIT8b, REV16_8b,...
- SStream_concat0(O, ".8b");
+ // ABSv4i32, ADDVv4i32v, CLSv4i32, CLZv4i32, FABSv4f32, FCVTASv4f32, FCVT...
+ SStream_concat0(O, ".4s");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
return;
break;
case 6:
- // ABS8h, ADDV_1h8h, CLS8h, CLZ8h, FCVTL8h4s, NEG8h, REV32_8h, REV64_8h, ...
+ // ABSv8i16, ADDVv8i16v, CLSv8i16, CLZv8i16, FCVTLv8i16, NEGv8i16, REV32v...
SStream_concat0(O, ".8h");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
return;
break;
case 7:
- // ABSdd, CLSww, CLSxx, CLZww, CLZxx, DUP16b, DUP2d, DUP2s, DUP4h, DUP4s,...
+ // ABSv8i8, ADDVv8i8v, CLSv8i8, CLZv8i8, CNTv8i8, NEGv8i8, NOTv8i8, RBITv...
+ SStream_concat0(O, ".8b");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
return;
break;
case 8:
- // ADCSwww, ADCSxxx, ADCwww, ADCxxx, ADDSwww_asr, ADDSwww_lsl, ADDSwww_ls...
+ // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDSWri, ADDSWrs, ADDSWrx, ADDSXri, ADDS...
SStream_concat0(O, ", ");
break;
case 9:
- // ADDHN2vvv_16b8h, ADDHNvvv_8b8h, ADDP_8H, ADDvvv_8H, CMEQvvi_8H, CMEQvv...
- SStream_concat0(O, ".8h, ");
+ // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM...
+ SStream_concat0(O, ".2d, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
break;
case 10:
- // ADDHN2vvv_4s2d, ADDHNvvv_2s2d, ADDP_2D, ADDvvv_2D, CMEQvvi_2D, CMEQvvv...
- SStream_concat0(O, ".2d, ");
+ // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM...
+ SStream_concat0(O, ".4s, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
break;
case 11:
- // ADDHN2vvv_8h4s, ADDHNvvv_4h4s, ADDP_4S, ADDvvv_4S, CMEQvvi_4S, CMEQvvv...
- SStream_concat0(O, ".4s, ");
+ // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, CMEQv8i16, CMG...
+ SStream_concat0(O, ".8h, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
break;
case 12:
- // ADDP_16B, ADDvvv_16B, ANDvvv_16B, BICvvv_16B, BIFvvv_16B, BITvvv_16B, ...
+ // ADDPv16i8, ADDv16i8, ANDv16i8, BICv16i8, BIFv16i8, BITv16i8, BSLv16i8,...
SStream_concat0(O, ".16b, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
break;
case 13:
- // ADDP_2S, ADDvvv_2S, CMEQvvi_2S, CMEQvvv_2S, CMGEvvi_2S, CMGEvvv_2S, CM...
+ // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv...
SStream_concat0(O, ".2s, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
break;
case 14:
- // ADDP_4H, ADDvvv_4H, CMEQvvi_4H, CMEQvvv_4H, CMGEvvi_4H, CMGEvvv_4H, CM...
+ // ADDPv4i16, ADDv4i16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMHIv4i16, CMHSv...
SStream_concat0(O, ".4h, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
break;
case 15:
- // ADDP_8B, ADDvvv_8B, ANDvvv_8B, BICvvv_8B, BIFvvv_8B, BITvvv_8B, BSLvvv...
+ // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8...
SStream_concat0(O, ".8b, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
break;
case 16:
- // BICvi_lsl_2S, BICvi_lsl_4S, ORRvi_lsl_2S, ORRvi_lsl_4S
- printNeonMovImmShiftOperand(MI, 3, O, A64SE_LSL, false);
+ // CMEQv16i8rz, CMGEv16i8rz, CMGTv16i8rz, CMLEv16i8rz, CMLTv16i8rz
+ SStream_concat0(O, ".16b, #0");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
+ arm64_op_addFP(MI, 0.0);
return;
break;
case 17:
- // BICvi_lsl_4H, BICvi_lsl_8H, ORRvi_lsl_4H, ORRvi_lsl_8H
- printNeonMovImmShiftOperand(MI, 3, O, A64SE_LSL, true);
+ // CMEQv1i64rz, CMGEv1i64rz, CMGTv1i64rz, CMLEv1i64rz, CMLTv1i64rz
+ SStream_concat0(O, ", #0");
+ arm64_op_addImm(MI, 0);
return;
break;
case 18:
- // DUPELT16b, DUPELT8b, DUPbv_B, INSELb, SMOVwb, SMOVxb, UMOVwb
- SStream_concat0(O, ".b[");
- set_mem_access(MI, true);
+ // CMEQv2i32rz, CMGEv2i32rz, CMGTv2i32rz, CMLEv2i32rz, CMLTv2i32rz
+ SStream_concat0(O, ".2s, #0");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
+ arm64_op_addImm(MI, 0);
+ return;
break;
case 19:
- // DUPELT2d, DUPdv_D, FMOVxv, UMOVxd
- SStream_concat0(O, ".d[");
- set_mem_access(MI, true);
+ // CMEQv2i64rz, CMGEv2i64rz, CMGTv2i64rz, CMLEv2i64rz, CMLTv2i64rz
+ SStream_concat0(O, ".2d, #0");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
+ arm64_op_addImm(MI, 0);
+ return;
break;
case 20:
- // DUPELT2s, DUPELT4s, DUPsv_S, INSELs, SMOVxs, UMOVws
- SStream_concat0(O, ".s[");
- set_mem_access(MI, true);
+ // CMEQv4i16rz, CMGEv4i16rz, CMGTv4i16rz, CMLEv4i16rz, CMLTv4i16rz
+ SStream_concat0(O, ".4h, #0");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
+ arm64_op_addImm(MI, 0);
+ return;
break;
case 21:
- // DUPELT4h, DUPELT8h, DUPhv_H, INSELh, SMOVwh, SMOVxh, UMOVwh
- SStream_concat0(O, ".h[");
- set_mem_access(MI, true);
+ // CMEQv4i32rz, CMGEv4i32rz, CMGTv4i32rz, CMLEv4i32rz, CMLTv4i32rz
+ SStream_concat0(O, ".4s, #0");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
+ arm64_op_addImm(MI, 0);
+ return;
break;
case 22:
- // INSELd
- printVPRRegister(MI, 2, O);
- SStream_concat0(O, ".d[");
- set_mem_access(MI, true);
- printUImmBareOperand(MI, 4, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
+ // CMEQv8i16rz, CMGEv8i16rz, CMGTv8i16rz, CMLEv8i16rz, CMLTv8i16rz
+ SStream_concat0(O, ".8h, #0");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
+ arm64_op_addImm(MI, 0);
return;
break;
case 23:
- // INSdx
- printOperand(MI, 2, O);
+ // CMEQv8i8rz, CMGEv8i8rz, CMGTv8i8rz, CMLEv8i8rz, CMLTv8i8rz
+ SStream_concat0(O, ".8b, #0");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
+ arm64_op_addImm(MI, 0);
return;
break;
case 24:
- // LDAR_byte, LDAR_dword, LDAR_hword, LDAR_word, LDAXR_byte, LDAXR_dword,...
+ // CPYi16, DUPv4i16lane, DUPv8i16lane, INSvi16lane, SMOVvi16to32, SMOVvi1...
+ SStream_concat0(O, ".h");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_H);
+ break;
+ case 25:
+ // CPYi32, DUPv2i32lane, DUPv4i32lane, INSvi32lane, SMOVvi32to64, UMOVvi3...
+ SStream_concat0(O, ".s");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_S);
+ break;
+ case 26:
+ // CPYi64, DUPv2i64lane, FMOVDXHighr, INSvi64lane, UMOVvi64
+ SStream_concat0(O, ".d");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_D);
+ break;
+ case 27:
+ // CPYi8, DUPv16i8lane, DUPv8i8lane, INSvi8lane, SMOVvi8to32, SMOVvi8to64...
+ SStream_concat0(O, ".b");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_B);
+ break;
+ case 28:
+ // FCMEQv1i32rz, FCMEQv1i64rz, FCMGEv1i32rz, FCMGEv1i64rz, FCMGTv1i32rz, ...
+ SStream_concat0(O, ", #0.0");
+ arm64_op_addFP(MI, 0.0);
+ return;
+ break;
+ case 29:
+ // FCMEQv2i32rz, FCMGEv2i32rz, FCMGTv2i32rz, FCMLEv2i32rz, FCMLTv2i32rz
+ SStream_concat0(O, ".2s, #0.0");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
+ arm64_op_addFP(MI, 0.0);
+ return;
+ break;
+ case 30:
+ // FCMEQv2i64rz, FCMGEv2i64rz, FCMGTv2i64rz, FCMLEv2i64rz, FCMLTv2i64rz
+ SStream_concat0(O, ".2d, #0.0");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
+ arm64_op_addFP(MI, 0.0);
+ return;
+ break;
+ case 31:
+ // FCMEQv4i32rz, FCMGEv4i32rz, FCMGTv4i32rz, FCMLEv4i32rz, FCMLTv4i32rz
+ SStream_concat0(O, ".4s, #0.0");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
+ arm64_op_addFP(MI, 0.0);
+ return;
+ break;
+ case 32:
+ // LDARB, LDARH, LDARW, LDARX, LDAXRB, LDAXRH, LDAXRW, LDAXRX, LDXRB, LDX...
SStream_concat0(O, "]");
set_mem_access(MI, false);
return;
break;
- case 25:
- // LDAXP_dword, LDAXP_word, LDPSWx, LDPSWx_PostInd, LDPSWx_PreInd, LDXP_d...
+ case 33:
+ // LDAXPW, LDAXPX, LDNPDi, LDNPQi, LDNPSi, LDNPWi, LDNPXi, LDPDi, LDPDpos...
SStream_concat0(O, ", [");
set_mem_access(MI, true);
break;
- case 26:
- // LDRSBw_PostInd, LDRSBx_PostInd, LDRSHw_PostInd, LDRSHx_PostInd, LDRSWx...
+ case 34:
+ // LDRBBpost, LDRBpost, LDRDpost, LDRHHpost, LDRHpost, LDRQpost, LDRSBWpo...
SStream_concat0(O, "], ");
set_mem_access(MI, false);
- printOffsetSImm9Operand(MI, 3, O);
+ printOperand(MI, 3, O);
return;
break;
- case 27:
- // MOVIvi_lsl_2S, MOVIvi_lsl_4S, MVNIvi_lsl_2S, MVNIvi_lsl_4S
- printNeonMovImmShiftOperand(MI, 2, O, A64SE_LSL, false);
+ case 35:
+ // MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl, MOVIv8i16, ...
+ printShifter(MI, 2, O);
return;
break;
- case 28:
- // MOVIvi_lsl_4H, MOVIvi_lsl_8H, MVNIvi_lsl_4H, MVNIvi_lsl_8H
- printNeonMovImmShiftOperand(MI, 2, O, A64SE_LSL, true);
+ case 36:
+ // SHLLv16i8
+ SStream_concat0(O, ".16b, #8");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
+ arm64_op_addImm(MI, 8);
return;
break;
- case 29:
- // MOVIvi_msl_2S, MOVIvi_msl_4S, MVNIvi_msl_2S, MVNIvi_msl_4S
- printNeonMovImmShiftOperand(MI, 2, O, A64SE_MSL, false);
+ case 37:
+ // SHLLv2i32
+ SStream_concat0(O, ".2s, #32");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
+ arm64_op_addImm(MI, 32);
+ return;
+ break;
+ case 38:
+ // SHLLv4i16
+ SStream_concat0(O, ".4h, #16");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
+ arm64_op_addImm(MI, 16);
+ return;
+ break;
+ case 39:
+ // SHLLv4i32
+ SStream_concat0(O, ".4s, #32");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
+ arm64_op_addImm(MI, 32);
+ return;
+ break;
+ case 40:
+ // SHLLv8i16
+ SStream_concat0(O, ".8h, #16");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
+ arm64_op_addImm(MI, 16);
+ return;
+ break;
+ case 41:
+ // SHLLv8i8
+ SStream_concat0(O, ".8b, #8");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
+ arm64_op_addImm(MI, 8);
return;
break;
}
- // Fragment 4 encoded into 6 bits for 39 unique commands.
- //printf("Frag-4: %"PRIu64"\n", (Bits >> 35) & 63);
- switch ((Bits >> 35) & 63) {
+ // Fragment 4 encoded into 5 bits for 18 unique commands.
+ //printf("Frag-4: %"PRIu64"\n", (Bits >> 35) & 31);
+ switch ((Bits >> 35) & 31) {
default: // unreachable.
case 0:
- // ADCSwww, ADCSxxx, ADCwww, ADCxxx, ADDSwww_asr, ADDSwww_lsl, ADDSwww_ls...
+ // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDSXrx64, ADDXrx64, ADDv1i64, ASRVWr, A...
printOperand(MI, 2, O);
break;
case 1:
- // ADDHN2vvv_16b8h, ADDHN2vvv_4s2d, ADDHN2vvv_8h4s, BIFvvv_16B, BIFvvv_8B...
- printVPRRegister(MI, 3, O);
+ // ADDHNv2i64_v2i32, ADDHNv4i32_v4i16, ADDHNv8i16_v8i8, ADDPv16i8, ADDPv2...
+ printVRegOperand(MI, 2, O);
break;
case 2:
- // ADDHNvvv_2s2d, ADDHNvvv_4h4s, ADDHNvvv_8b8h, ADDP_16B, ADDP_2D, ADDP_2...
- printVPRRegister(MI, 2, O);
+ // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, BITv16i8, BITv8i...
+ printVRegOperand(MI, 3, O);
break;
case 3:
- // ADDwwi_lsl0_S, ADDwwi_lsl0_s, ADDxxi_lsl0_S, ADDxxi_lsl0_s, SUBwwi_lsl...
- printAddSubImmLSL0Operand(MI, 2, O);
+ // ADDSWri, ADDSXri, ADDWri, ADDXri, SUBSWri, SUBSXri, SUBWri, SUBXri
+ printAddSubImm(MI, 2, O);
return;
break;
case 4:
- // ADDwwi_lsl12_S, ADDwwi_lsl12_s, ADDxxi_lsl12_S, ADDxxi_lsl12_s, SUBwwi...
- printAddSubImmLSL12Operand(MI, 2, O);
+ // ADDSWrs, ADDSXrs, ADDWrs, ADDXrs, ANDSWrs, ANDSXrs, ANDWrs, ANDXrs, BI...
+ printShiftedRegister(MI, 2, O);
return;
break;
case 5:
- // ANDSwwi, ANDwwi, EORwwi, ORRwwi
- printLogicalImmOperand(MI, 2, O, 32);
+ // ADDSWrx, ADDSXrx, ADDWrx, ADDXrx, SUBSWrx, SUBSXrx, SUBWrx, SUBXrx
+ printExtendedRegister(MI, 2, O);
return;
break;
case 6:
- // ANDSxxi, ANDxxi, EORxxi, ORRxxi
- printLogicalImmOperand(MI, 2, O, 64);
+ // ANDSWri, ANDWri, EORWri, ORRWri
+ printLogicalImm32(MI, 2, O);
return;
break;
case 7:
- // BFIwwii
- printBFILSBOperand(MI, 3, O, 32);
- SStream_concat0(O, ", ");
- printBFIWidthOperand(MI, 4, O);
+ // ANDSXri, ANDXri, EORXri, ORRXri
+ printLogicalImm64(MI, 2, O);
return;
break;
case 8:
- // BFIxxii
- printBFILSBOperand(MI, 3, O, 64);
- SStream_concat0(O, ", ");
- printBFIWidthOperand(MI, 4, O);
- return;
- break;
- case 9:
- // BFMwwii, BFMxxii, BFXILwwii, BFXILxxii, LDPSWx_PostInd, LDPSWx_PreInd,...
+ // BFMWri, BFMXri, LDPDpost, LDPDpre, LDPQpost, LDPQpre, LDPSWpost, LDPSW...
printOperand(MI, 3, O);
break;
+ case 9:
+ // CPYi16, CPYi32, CPYi64, CPYi8, DUPv16i8lane, DUPv2i32lane, DUPv2i64lan...
+ printVectorIndex(MI, 2, O);
+ return;
+ break;
case 10:
- // CMEQddi, CMEQvvi_16B, CMEQvvi_2D, CMEQvvi_2S, CMEQvvi_4H, CMEQvvi_4S, ...
- printNeonUImm0Operand(MI, 2, O);
+ // INSvi16lane, INSvi32lane, INSvi64lane, INSvi8lane
+ printVectorIndex(MI, 4, O);
return;
break;
case 11:
- // CMNww_asr, CMNxx_asr, CMPww_asr, CMPxx_asr, MVNww_asr, MVNxx_asr, TSTw...
- printShiftOperand(MI, 2, O, A64SE_ASR);
+ // LDRBBui, LDRBui, LDRSBWui, LDRSBXui, STRBBui, STRBui
+ printUImm12Offset2(MI, 2, O, 1);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
return;
break;
case 12:
- // CMNww_lsl, CMNxx_lsl, CMPww_lsl, CMPxx_lsl, MVNww_lsl, MVNxx_lsl, TSTw...
- printShiftOperand(MI, 2, O, A64SE_LSL);
+ // LDRDui, LDRXui, PRFMui, STRDui, STRXui
+ printUImm12Offset2(MI, 2, O, 8);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
return;
break;
case 13:
- // CMNww_lsr, CMNxx_lsr, CMPww_lsr, CMPxx_lsr, MVNww_lsr, MVNxx_lsr, TSTw...
- printShiftOperand(MI, 2, O, A64SE_LSR);
+ // LDRHHui, LDRHui, LDRSHWui, LDRSHXui, STRHHui, STRHui
+ printUImm12Offset2(MI, 2, O, 2);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
return;
break;
case 14:
- // CMNww_sxtb, CMNxw_sxtb, CMPww_sxtb, CMPxw_sxtb
- printRegExtendOperand(MI, 2, O, A64SE_SXTB);
+ // LDRQui, STRQui
+ printUImm12Offset2(MI, 2, O, 16);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
return;
break;
case 15:
- // CMNww_sxth, CMNxw_sxth, CMPww_sxth, CMPxw_sxth
- printRegExtendOperand(MI, 2, O, A64SE_SXTH);
+ // LDRSWui, LDRSui, LDRWui, STRSui, STRWui
+ printUImm12Offset2(MI, 2, O, 4);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
return;
break;
case 16:
- // CMNww_sxtw, CMNxw_sxtw, CMPww_sxtw, CMPxw_sxtw
- printRegExtendOperand(MI, 2, O, A64SE_SXTW);
+ // SYSLxt
+ printSysCROperand(MI, 2, O);
+ SStream_concat0(O, ", ");
+ printSysCROperand(MI, 3, O);
+ SStream_concat0(O, ", ");
+ printOperand(MI, 4, O);
return;
break;
case 17:
- // CMNww_sxtx, CMNxx_sxtx, CMPww_sxtx, CMPxx_sxtx
- printRegExtendOperand(MI, 2, O, A64SE_SXTX);
+ // TBNZW, TBNZX, TBZW, TBZX
+ printAlignedLabel(MI, 2, O);
return;
break;
- case 18:
- // CMNww_uxtb, CMNxw_uxtb, CMPww_uxtb, CMPxw_uxtb
- printRegExtendOperand(MI, 2, O, A64SE_UXTB);
+ }
+
+
+ // Fragment 5 encoded into 5 bits for 19 unique commands.
+ //printf("Frag-5: %"PRIu64"\n", (Bits >> 40) & 31);
+ switch ((Bits >> 40) & 31) {
+ default: // unreachable.
+ case 0:
+ // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDv1i64, ASRVWr, ASRVXr, CMEQv1i64, CMG...
return;
break;
- case 19:
- // CMNww_uxth, CMNxw_uxth, CMPww_uxth, CMPxw_uxth
- printRegExtendOperand(MI, 2, O, A64SE_UXTH);
+ case 1:
+ // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM...
+ SStream_concat0(O, ".2d");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
return;
break;
- case 20:
- // CMNww_uxtw, CMNxw_uxtw, CMPww_uxtw, CMPxw_uxtw
- printRegExtendOperand(MI, 2, O, A64SE_UXTW);
+ case 2:
+ // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM...
+ SStream_concat0(O, ".4s");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
return;
break;
- case 21:
- // CMNww_uxtx, CMNxx_uxtx, CMPww_uxtx, CMPxx_uxtx
- printRegExtendOperand(MI, 2, O, A64SE_UXTX);
+ case 3:
+ // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, CMEQv8i16, CMG...
+ SStream_concat0(O, ".8h");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
return;
break;
- case 22:
- // DUPELT16b, DUPELT2d, DUPELT2s, DUPELT4h, DUPELT4s, DUPELT8b, DUPELT8h,...
- printUImmBareOperand(MI, 2, O);
+ case 4:
+ // ADDPv16i8, ADDv16i8, ANDv16i8, BICv16i8, BIFv16i8, BITv16i8, BSLv16i8,...
+ SStream_concat0(O, ".16b");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
+ return;
+ break;
+ case 5:
+ // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv...
+ SStream_concat0(O, ".2s");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
+ return;
+ break;
+ case 6:
+ // ADDPv4i16, ADDv4i16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMHIv4i16, CMHSv...
+ SStream_concat0(O, ".4h");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
+ return;
+ break;
+ case 7:
+ // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8...
+ SStream_concat0(O, ".8b");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
+ return;
+ break;
+ case 8:
+ // ADDSXrx64, ADDXrx64, SUBSXrx64, SUBXrx64
+ printArithExtend(MI, 3, O);
+ return;
+ break;
+ case 9:
+ // BFMWri, BFMXri, CCMNWi, CCMNWr, CCMNXi, CCMNXr, CCMPWi, CCMPWr, CCMPXi...
+ SStream_concat0(O, ", ");
+ break;
+ case 10:
+ // EXTv16i8
+ SStream_concat0(O, ".16b, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
+ printOperand(MI, 3, O);
+ return;
+ break;
+ case 11:
+ // EXTv8i8
+ SStream_concat0(O, ".8b, ");
+ arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
+ printOperand(MI, 3, O);
+ return;
+ break;
+ case 12:
+ // FMLAv1i32_indexed, FMLAv2i32_indexed, FMLAv4i32_indexed, FMLSv1i32_ind...
+ SStream_concat0(O, ".s");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_S);
+ break;
+ case 13:
+ // FMLAv1i64_indexed, FMLAv2i64_indexed, FMLSv1i64_indexed, FMLSv2i64_ind...
+ SStream_concat0(O, ".d");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_D);
+ break;
+ case 14:
+ // LDAXPW, LDAXPX, LDTRBi, LDTRHi, LDTRSBWi, LDTRSBXi, LDTRSHWi, LDTRSHXi...
SStream_concat0(O, "]");
set_mem_access(MI, false);
return;
break;
- case 23:
- // FCMEQZddi, FCMEQZssi, FCMEQvvi_2D, FCMEQvvi_2S, FCMEQvvi_4S, FCMGEZddi...
- printFPZeroOperand(MI, 2, O);
- return;
- break;
- case 24:
- // FCVTZSwdi, FCVTZSwsi, FCVTZSxdi, FCVTZSxsi, FCVTZUwdi, FCVTZUwsi, FCVT...
- printCVTFixedPosOperand(MI, 2, O);
- return;
- break;
- case 25:
- // FMOVxv
- printBareImmOperand(MI, 2, O);
- SStream_concat0(O, "]");
+ case 15:
+ // LDPDpost, LDPQpost, LDPSWpost, LDPSpost, LDPWpost, LDPXpost, STPDpost,...
+ SStream_concat0(O, "], ");
set_mem_access(MI, false);
- return;
break;
- case 26:
- // INSELb, INSELh, INSELs
- printUImmBareOperand(MI, 4, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 27:
- // LDRSBw, LDRSBx, LS8_LDR, LS8_STR, LSFP8_LDR, LSFP8_STR
- printOffsetUImm12Operand(MI, 2, O, 1);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 28:
- // LDRSBw_PreInd, LDRSBx_PreInd, LDRSHw_PreInd, LDRSHx_PreInd, LDRSWx_Pre...
- printOffsetSImm9Operand(MI, 3, O);
+ case 16:
+ // LDRBBpre, LDRBpre, LDRDpre, LDRHHpre, LDRHpre, LDRQpre, LDRSBWpre, LDR...
SStream_concat0(O, "]!");
set_mem_access(MI, false);
return;
break;
- case 29:
- // LDRSBw_U, LDRSBx_U, LDRSHw_U, LDRSHx_U, LDTRSBw, LDTRSBx, LDTRSHw, LDT...
- printOffsetSImm9Operand(MI, 2, O);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
+ case 17:
+ // MLAv4i16_indexed, MLAv8i16_indexed, MLSv4i16_indexed, MLSv8i16_indexed...
+ SStream_concat0(O, ".h");
+ arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_H);
break;
- case 30:
- // LDRSHw, LDRSHx, LS16_LDR, LS16_STR, LSFP16_LDR, LSFP16_STR
- printOffsetUImm12Operand(MI, 2, O, 2);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 31:
- // LDRSWx, LS32_LDR, LS32_STR, LSFP32_LDR, LSFP32_STR
- printOffsetUImm12Operand(MI, 2, O, 4);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 32:
- // LS64_LDR, LS64_STR, LSFP64_LDR, LSFP64_STR, PRFM
- printOffsetUImm12Operand(MI, 2, O, 8);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 33:
- // LSFP128_LDR, LSFP128_STR
- printOffsetUImm12Operand(MI, 2, O, 16);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 34:
- // MVNww_ror, MVNxx_ror, TSTww_ror, TSTxx_ror
- printShiftOperand(MI, 2, O, A64SE_ROR);
- return;
- break;
- case 35:
- // SBFIZwwii, UBFIZwwii
- printBFILSBOperand(MI, 2, O, 32);
- SStream_concat0(O, ", ");
- printBFIWidthOperand(MI, 3, O);
- return;
- break;
- case 36:
- // SBFIZxxii, UBFIZxxii
- printBFILSBOperand(MI, 2, O, 64);
- SStream_concat0(O, ", ");
- printBFIWidthOperand(MI, 3, O);
- return;
- break;
- case 37:
- // SYSLxicci
- printCRxOperand(MI, 2, O);
- SStream_concat0(O, ", ");
- printCRxOperand(MI, 3, O);
- SStream_concat0(O, ", ");
- printOperand(MI, 4, O);
- return;
- break;
- case 38:
- // TBNZwii, TBNZxii, TBZwii, TBZxii
- printLabelOperand(MI, 2, O, 14, 4);
- return;
- break;
- }
-
-
- // Fragment 5 encoded into 5 bits for 17 unique commands.
- //printf("Frag-5: %"PRIu64"\n", (Bits >> 41) & 31);
- switch ((Bits >> 41) & 31) {
- default: // unreachable.
- case 0:
- // ADCSwww, ADCSxxx, ADCwww, ADCxxx, ADDddd, ASRVwww, ASRVxxx, ASRwwi, AS...
- return;
- break;
- case 1:
- // ADDHN2vvv_16b8h, ADDHNvvv_8b8h, ADDP_8H, ADDvvv_8H, CMEQvvv_8H, CMGEvv...
- SStream_concat0(O, ".8h");
- return;
- break;
- case 2:
- // ADDHN2vvv_4s2d, ADDHNvvv_2s2d, ADDP_2D, ADDvvv_2D, CMEQvvv_2D, CMGEvvv...
- SStream_concat0(O, ".2d");
- return;
- break;
- case 3:
- // ADDHN2vvv_8h4s, ADDHNvvv_4h4s, ADDP_4S, ADDvvv_4S, CMEQvvv_4S, CMGEvvv...
- SStream_concat0(O, ".4s");
- return;
- break;
- case 4:
- // ADDP_16B, ADDvvv_16B, ANDvvv_16B, BICvvv_16B, BIFvvv_16B, BITvvv_16B, ...
- SStream_concat0(O, ".16b");
- return;
- break;
- case 5:
- // ADDP_2S, ADDvvv_2S, CMEQvvv_2S, CMGEvvv_2S, CMGTvvv_2S, CMHIvvv_2S, CM...
- SStream_concat0(O, ".2s");
- return;
- break;
- case 6:
- // ADDP_4H, ADDvvv_4H, CMEQvvv_4H, CMGEvvv_4H, CMGTvvv_4H, CMHIvvv_4H, CM...
- SStream_concat0(O, ".4h");
- return;
- break;
- case 7:
- // ADDP_8B, ADDvvv_8B, ANDvvv_8B, BICvvv_8B, BIFvvv_8B, BITvvv_8B, BSLvvv...
- SStream_concat0(O, ".8b");
- return;
- break;
- case 8:
- // ADDSwww_asr, ADDSwww_lsl, ADDSwww_lsr, ADDSwww_sxtb, ADDSwww_sxth, ADD...
- SStream_concat0(O, ", ");
- break;
- case 9:
- // EXTvvvi_16b
- SStream_concat0(O, ".16b, ");
- printUImmHexOperand(MI, 3, O);
- return;
- break;
- case 10:
- // EXTvvvi_8b
- SStream_concat0(O, ".8b, ");
- printUImmHexOperand(MI, 3, O);
- return;
- break;
- case 11:
- // FMLAddv_2D, FMLAvve_2d2d, FMLSddv_2D, FMLSvve_2d2d, FMULXddv_2D, FMULX...
- SStream_concat0(O, ".d[");
- set_mem_access(MI, true);
- break;
- case 12:
- // FMLAssv_4S, FMLAvve_2s4s, FMLAvve_4s4s, FMLSssv_4S, FMLSvve_2s4s, FMLS...
- SStream_concat0(O, ".s[");
- set_mem_access(MI, true);
- break;
- case 13:
- // LDAXP_dword, LDAXP_word, LDXP_dword, LDXP_word, STLXR_byte, STLXR_dwor...
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 14:
- // LDPSWx_PostInd, LSFPPair128_PostInd_LDR, LSFPPair128_PostInd_STR, LSFP...
- SStream_concat0(O, "], ");
- set_mem_access(MI, false);
- break;
- case 15:
- // MLAvve_4h8h, MLAvve_8h8h, MLSvve_4h8h, MLSvve_8h8h, MULve_4h8h, MULve_...
- SStream_concat0(O, ".h[");
- set_mem_access(MI, true);
- break;
- case 16:
- // STLXP_dword, STLXP_word, STXP_dword, STXP_word
+ case 18:
+ // STLXPW, STLXPX, STXPW, STXPX
SStream_concat0(O, ", [");
set_mem_access(MI, true);
printOperand(MI, 3, O);
@@ -8296,239 +6398,164 @@
}
- // Fragment 6 encoded into 6 bits for 35 unique commands.
- //printf("Frag-6: %"PRIu64"\n", (Bits >> 46) & 63);
- switch ((Bits >> 46) & 63) {
+ // Fragment 6 encoded into 5 bits for 21 unique commands.
+ //printf("Frag-6: %"PRIu64"\n", (Bits >> 45) & 31);
+ switch ((Bits >> 45) & 31) {
default: // unreachable.
case 0:
- // ADDSwww_asr, ADDSxxx_asr, ADDwww_asr, ADDxxx_asr, ANDSwww_asr, ANDSxxx...
- printShiftOperand(MI, 3, O, A64SE_ASR);
- return;
- break;
- case 1:
- // ADDSwww_lsl, ADDSxxx_lsl, ADDwww_lsl, ADDxxx_lsl, ANDSwww_lsl, ANDSxxx...
- printShiftOperand(MI, 3, O, A64SE_LSL);
- return;
- break;
- case 2:
- // ADDSwww_lsr, ADDSxxx_lsr, ADDwww_lsr, ADDxxx_lsr, ANDSwww_lsr, ANDSxxx...
- printShiftOperand(MI, 3, O, A64SE_LSR);
- return;
- break;
- case 3:
- // ADDSwww_sxtb, ADDSxxw_sxtb, ADDwww_sxtb, ADDxxw_sxtb, SUBSwww_sxtb, SU...
- printRegExtendOperand(MI, 3, O, A64SE_SXTB);
- return;
- break;
- case 4:
- // ADDSwww_sxth, ADDSxxw_sxth, ADDwww_sxth, ADDxxw_sxth, SUBSwww_sxth, SU...
- printRegExtendOperand(MI, 3, O, A64SE_SXTH);
- return;
- break;
- case 5:
- // ADDSwww_sxtw, ADDSxxw_sxtw, ADDwww_sxtw, ADDxxw_sxtw, SUBSwww_sxtw, SU...
- printRegExtendOperand(MI, 3, O, A64SE_SXTW);
- return;
- break;
- case 6:
- // ADDSwww_sxtx, ADDSxxx_sxtx, ADDwww_sxtx, ADDxxx_sxtx, SUBSwww_sxtx, SU...
- printRegExtendOperand(MI, 3, O, A64SE_SXTX);
- return;
- break;
- case 7:
- // ADDSwww_uxtb, ADDSxxw_uxtb, ADDwww_uxtb, ADDxxw_uxtb, SUBSwww_uxtb, SU...
- printRegExtendOperand(MI, 3, O, A64SE_UXTB);
- return;
- break;
- case 8:
- // ADDSwww_uxth, ADDSxxw_uxth, ADDwww_uxth, ADDxxw_uxth, SUBSwww_uxth, SU...
- printRegExtendOperand(MI, 3, O, A64SE_UXTH);
- return;
- break;
- case 9:
- // ADDSwww_uxtw, ADDSxxw_uxtw, ADDwww_uxtw, ADDxxw_uxtw, SUBSwww_uxtw, SU...
- printRegExtendOperand(MI, 3, O, A64SE_UXTW);
- return;
- break;
- case 10:
- // ADDSwww_uxtx, ADDSxxx_uxtx, ADDwww_uxtx, ADDxxx_uxtx, SUBSwww_uxtx, SU...
- printRegExtendOperand(MI, 3, O, A64SE_UXTX);
- return;
- break;
- case 11:
- // ANDSwww_ror, ANDSxxx_ror, ANDwww_ror, ANDxxx_ror, BICSwww_ror, BICSxxx...
- printShiftOperand(MI, 3, O, A64SE_ROR);
- return;
- break;
- case 12:
- // BFMwwii, BFMxxii
+ // BFMWri, BFMXri
printOperand(MI, 4, O);
return;
break;
- case 13:
- // BFXILwwii, BFXILxxii
- printBFXWidthOperand(MI, 4, O);
+ case 1:
+ // CCMNWi, CCMNWr, CCMNXi, CCMNXr, CCMPWi, CCMPWr, CCMPXi, CCMPXr, CSELWr...
+ printCondCode(MI, 3, O);
return;
break;
- case 14:
- // CCMNwi, CCMNww, CCMNxi, CCMNxx, CCMPwi, CCMPww, CCMPxi, CCMPxx, CSELww...
- printCondCodeOperand(MI, 3, O);
- return;
- break;
- case 15:
- // EXTRwwwi, EXTRxxxi, FMADDdddd, FMADDssss, FMSUBdddd, FMSUBssss, FNMADD...
+ case 2:
+ // EXTRWrri, EXTRXrri, FMADDDrrr, FMADDSrrr, FMSUBDrrr, FMSUBSrrr, FNMADD...
printOperand(MI, 3, O);
return;
break;
+ case 3:
+ // FMLAv1i32_indexed, FMLAv1i64_indexed, FMLAv2i32_indexed, FMLAv2i64_ind...
+ printVectorIndex(MI, 4, O);
+ return;
+ break;
+ case 4:
+ // FMULXv1i32_indexed, FMULXv1i64_indexed, FMULXv2i32_indexed, FMULXv2i64...
+ printVectorIndex(MI, 3, O);
+ return;
+ break;
+ case 5:
+ // LDNPDi, LDNPXi, LDPDi, LDPXi, STNPDi, STNPXi, STPDi, STPXi
+ printImmScale(MI, 3, O, 8);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 6:
+ // LDNPQi, LDPQi, STNPQi, STPQi
+ printImmScale(MI, 3, O, 16);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 7:
+ // LDNPSi, LDNPWi, LDPSWi, LDPSi, LDPWi, STNPSi, STNPWi, STPSi, STPWi
+ printImmScale(MI, 3, O, 4);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 8:
+ // LDPDpost, LDPDpre, LDPXpost, LDPXpre, STPDpost, STPDpre, STPXpost, STP...
+ printImmScale(MI, 4, O, 8);
+ break;
+ case 9:
+ // LDPQpost, LDPQpre, STPQpost, STPQpre
+ printImmScale(MI, 4, O, 16);
+ break;
+ case 10:
+ // LDPSWpost, LDPSWpre, LDPSpost, LDPSpre, LDPWpost, LDPWpre, STPSpost, S...
+ printImmScale(MI, 4, O, 4);
+ break;
+ case 11:
+ // LDRBBroW, LDRBroW, LDRSBWroW, LDRSBXroW, STRBBroW, STRBroW
+ printMemExtend(MI, 3, O, 'w', 8);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 12:
+ // LDRBBroX, LDRBroX, LDRSBWroX, LDRSBXroX, STRBBroX, STRBroX
+ printMemExtend(MI, 3, O, 'x', 8);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 13:
+ // LDRDroW, LDRXroW, PRFMroW, STRDroW, STRXroW
+ printMemExtend(MI, 3, O, 'w', 64);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 14:
+ // LDRDroX, LDRXroX, PRFMroX, STRDroX, STRXroX
+ printMemExtend(MI, 3, O, 'x', 64);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
+ case 15:
+ // LDRHHroW, LDRHroW, LDRSHWroW, LDRSHXroW, STRHHroW, STRHroW
+ printMemExtend(MI, 3, O, 'w', 16);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
+ break;
case 16:
- // FMLAddv_2D, FMLAssv_4S, FMLAvve_2d2d, FMLAvve_2s4s, FMLAvve_4s4s, FMLS...
- printUImmBareOperand(MI, 4, O);
+ // LDRHHroX, LDRHroX, LDRSHWroX, LDRSHXroX, STRHHroX, STRHroX
+ printMemExtend(MI, 3, O, 'x', 16);
SStream_concat0(O, "]");
set_mem_access(MI, false);
return;
break;
case 17:
- // FMULXddv_2D, FMULXssv_4S, FMULXve_2d2d, FMULXve_2s4s, FMULXve_4s4s, FM...
- printUImmBareOperand(MI, 3, O);
+ // LDRQroW, STRQroW
+ printMemExtend(MI, 3, O, 'w', 128);
SStream_concat0(O, "]");
set_mem_access(MI, false);
return;
break;
case 18:
- // LDPSWx, LSFPPair32_LDR, LSFPPair32_NonTemp_LDR, LSFPPair32_NonTemp_STR...
- printSImm7ScaledOperand(MI, 3, O, 4);
+ // LDRQroX, STRQroX
+ printMemExtend(MI, 3, O, 'x', 128);
SStream_concat0(O, "]");
set_mem_access(MI, false);
return;
break;
case 19:
- // LDPSWx_PostInd, LDPSWx_PreInd, LSFPPair32_PostInd_LDR, LSFPPair32_Post...
- printSImm7ScaledOperand(MI, 4, O, 4);
+ // LDRSWroW, LDRSroW, LDRWroW, STRSroW, STRWroW
+ printMemExtend(MI, 3, O, 'w', 32);
+ SStream_concat0(O, "]");
+ set_mem_access(MI, false);
+ return;
break;
case 20:
- // LDRSBw_Wm_RegOffset, LDRSBx_Wm_RegOffset, LS8_Wm_RegOffset_LDR, LS8_Wm...
- printAddrRegExtendOperand(MI, 3, O, 1, 32);
+ // LDRSWroX, LDRSroX, LDRWroX, STRSroX, STRWroX
+ printMemExtend(MI, 3, O, 'x', 32);
SStream_concat0(O, "]");
set_mem_access(MI, false);
return;
break;
- case 21:
- // LDRSBw_Xm_RegOffset, LDRSBx_Xm_RegOffset, LS8_Xm_RegOffset_LDR, LS8_Xm...
- printAddrRegExtendOperand(MI, 3, O, 1, 64);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 22:
- // LDRSHw_Wm_RegOffset, LDRSHx_Wm_RegOffset, LS16_Wm_RegOffset_LDR, LS16_...
- printAddrRegExtendOperand(MI, 3, O, 2, 32);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 23:
- // LDRSHw_Xm_RegOffset, LDRSHx_Xm_RegOffset, LS16_Xm_RegOffset_LDR, LS16_...
- printAddrRegExtendOperand(MI, 3, O, 2, 64);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 24:
- // LDRSWx_Wm_RegOffset, LS32_Wm_RegOffset_LDR, LS32_Wm_RegOffset_STR, LSF...
- printAddrRegExtendOperand(MI, 3, O, 4, 32);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 25:
- // LDRSWx_Xm_RegOffset, LS32_Xm_RegOffset_LDR, LS32_Xm_RegOffset_STR, LSF...
- printAddrRegExtendOperand(MI, 3, O, 4, 64);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 26:
- // LS64_Wm_RegOffset_LDR, LS64_Wm_RegOffset_STR, LSFP64_Wm_RegOffset_LDR,...
- printAddrRegExtendOperand(MI, 3, O, 8, 32);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 27:
- // LS64_Xm_RegOffset_LDR, LS64_Xm_RegOffset_STR, LSFP64_Xm_RegOffset_LDR,...
- printAddrRegExtendOperand(MI, 3, O, 8, 64);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 28:
- // LSFP128_Wm_RegOffset_LDR, LSFP128_Wm_RegOffset_STR
- printAddrRegExtendOperand(MI, 3, O, 16, 32);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 29:
- // LSFP128_Xm_RegOffset_LDR, LSFP128_Xm_RegOffset_STR
- printAddrRegExtendOperand(MI, 3, O, 16, 64);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 30:
- // LSFPPair128_LDR, LSFPPair128_NonTemp_LDR, LSFPPair128_NonTemp_STR, LSF...
- printSImm7ScaledOperand(MI, 3, O, 16);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 31:
- // LSFPPair128_PostInd_LDR, LSFPPair128_PostInd_STR, LSFPPair128_PreInd_L...
- printSImm7ScaledOperand(MI, 4, O, 16);
- break;
- case 32:
- // LSFPPair64_LDR, LSFPPair64_NonTemp_LDR, LSFPPair64_NonTemp_STR, LSFPPa...
- printSImm7ScaledOperand(MI, 3, O, 8);
- SStream_concat0(O, "]");
- set_mem_access(MI, false);
- return;
- break;
- case 33:
- // LSFPPair64_PostInd_LDR, LSFPPair64_PostInd_STR, LSFPPair64_PreInd_LDR,...
- printSImm7ScaledOperand(MI, 4, O, 8);
- break;
- case 34:
- // SBFXwwii, SBFXxxii, UBFXwwii, UBFXxxii
- printBFXWidthOperand(MI, 3, O);
- return;
- break;
}
// Fragment 7 encoded into 1 bits for 2 unique commands.
- //printf("Frag-7: %"PRIu64"\n", (Bits >> 52) & 1);
- if ((Bits >> 52) & 1) {
- // LDPSWx_PreInd, LSFPPair128_PreInd_LDR, LSFPPair128_PreInd_STR, LSFPPai...
+ //printf("Frag-7: %"PRIu64"\n", (Bits >> 50) & 1);
+ if ((Bits >> 50) & 1) {
+ // LDPDpre, LDPQpre, LDPSWpre, LDPSpre, LDPWpre, LDPXpre, STPDpre, STPQpr...
SStream_concat0(O, "]!");
set_mem_access(MI, false);
return;
} else {
- // LDPSWx_PostInd, LSFPPair128_PostInd_LDR, LSFPPair128_PostInd_STR, LSFP...
+ // LDPDpost, LDPQpost, LDPSWpost, LDPSpost, LDPWpost, LDPXpost, STPDpost,...
return;
}
-
}
/// getRegisterName - This method is automatically generated by tblgen
/// from the register set description. This returns the assembler name
/// for the specified register.
-static char *getRegisterName(unsigned RegNo)
+static char *getRegisterName(unsigned RegNo, int AltIdx)
{
// assert(RegNo && RegNo < 420 && "Invalid register number!");
#ifndef CAPSTONE_DIET
- static char AsmStrs[] = {
+ static char AsmStrsNoRegAltName[] = {
/* 0 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0,
/* 13 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0,
/* 26 */ 'b', '1', '0', 0,
@@ -8821,43 +6848,128 @@
/* 1774 */ 'n', 'z', 'c', 'v', 0,
};
- static const uint32_t RegAsmOffset[] = {
- 1774, 1762, 1766, 1763, 1770, 204, 421, 586, 751, 916, 1081, 1246, 1411, 1576,
- 1741, 26, 253, 472, 639, 804, 969, 1134, 1299, 1464, 1629, 86, 313, 532,
- 699, 864, 1029, 1194, 1359, 1524, 1689, 146, 373, 207, 424, 589, 754, 919,
- 1084, 1249, 1414, 1579, 1744, 30, 257, 476, 643, 808, 973, 1138, 1303, 1468,
- 1633, 90, 317, 536, 703, 868, 1033, 1198, 1363, 1528, 1693, 150, 377, 210,
- 427, 592, 757, 922, 1087, 1252, 1417, 1582, 1747, 34, 261, 480, 647, 812,
- 977, 1142, 1307, 1472, 1637, 94, 321, 540, 707, 872, 1037, 1202, 1367, 1532,
- 1697, 154, 381, 213, 430, 595, 760, 925, 1090, 1255, 1420, 1585, 1750, 38,
- 265, 484, 651, 816, 981, 1146, 1311, 1476, 1641, 98, 325, 544, 711, 876,
- 1041, 1206, 1371, 1536, 1701, 158, 385, 216, 433, 598, 763, 928, 1093, 1258,
- 1423, 1588, 1753, 42, 269, 488, 655, 820, 985, 1150, 1315, 1480, 1645, 102,
- 329, 548, 715, 880, 1045, 1210, 1375, 1540, 1705, 162, 389, 219, 436, 601,
- 766, 931, 1096, 1261, 1426, 1591, 1756, 46, 273, 492, 659, 824, 989, 1154,
- 1319, 1484, 1649, 106, 333, 552, 719, 884, 1049, 1214, 1379, 1544, 1709, 166,
- 222, 439, 604, 769, 934, 1099, 1264, 1429, 1594, 1759, 50, 277, 496, 663,
- 828, 993, 1158, 1323, 1488, 1653, 110, 337, 556, 723, 888, 1053, 1218, 1383,
- 1548, 1713, 170, 401, 567, 733, 898, 1063, 1228, 1393, 1558, 1723, 6, 231,
+ static const uint32_t RegAsmOffsetNoRegAltName[] = {
+ 1713, 170, 1774, 1763, 1762, 1766, 1770, 204, 421, 586, 751, 916, 1081, 1246,
+ 1411, 1576, 1741, 26, 253, 472, 639, 804, 969, 1134, 1299, 1464, 1629, 86,
+ 313, 532, 699, 864, 1029, 1194, 1359, 1524, 1689, 146, 373, 207, 424, 589,
+ 754, 919, 1084, 1249, 1414, 1579, 1744, 30, 257, 476, 643, 808, 973, 1138,
+ 1303, 1468, 1633, 90, 317, 536, 703, 868, 1033, 1198, 1363, 1528, 1693, 150,
+ 377, 210, 427, 592, 757, 922, 1087, 1252, 1417, 1582, 1747, 34, 261, 480,
+ 647, 812, 977, 1142, 1307, 1472, 1637, 94, 321, 540, 707, 872, 1037, 1202,
+ 1367, 1532, 1697, 154, 381, 213, 430, 595, 760, 925, 1090, 1255, 1420, 1585,
+ 1750, 38, 265, 484, 651, 816, 981, 1146, 1311, 1476, 1641, 98, 325, 544,
+ 711, 876, 1041, 1206, 1371, 1536, 1701, 158, 385, 216, 433, 598, 763, 928,
+ 1093, 1258, 1423, 1588, 1753, 42, 269, 488, 655, 820, 985, 1150, 1315, 1480,
+ 1645, 102, 329, 548, 715, 880, 1045, 1210, 1375, 1540, 1705, 162, 389, 219,
+ 436, 601, 766, 931, 1096, 1261, 1426, 1591, 1756, 46, 273, 492, 659, 824,
+ 989, 1154, 1319, 1484, 1649, 106, 333, 552, 719, 884, 1049, 1214, 1379, 1544,
+ 1709, 166, 222, 439, 604, 769, 934, 1099, 1264, 1429, 1594, 1759, 50, 277,
+ 496, 663, 828, 993, 1158, 1323, 1488, 1653, 110, 337, 556, 723, 888, 1053,
+ 1218, 1383, 1548, 401, 567, 733, 898, 1063, 1228, 1393, 1558, 1723, 6, 231,
449, 615, 780, 945, 1110, 1275, 1440, 1605, 62, 289, 508, 675, 840, 1005,
- 1170, 1335, 1500, 1665, 122, 349, 182, 415, 580, 745, 910, 1075, 1240, 1405,
- 1570, 1735, 19, 245, 464, 631, 796, 961, 1126, 1291, 1456, 1621, 78, 305,
- 524, 691, 856, 1021, 1186, 1351, 1516, 1681, 138, 365, 197, 564, 730, 895,
+ 1170, 1335, 1500, 1665, 122, 349, 182, 727, 892, 1057, 1222, 1387, 1552, 1717,
+ 0, 225, 442, 607, 772, 937, 1102, 1267, 1432, 1597, 54, 281, 500, 667,
+ 832, 997, 1162, 1327, 1492, 1657, 114, 341, 174, 393, 560, 564, 730, 895,
1060, 1225, 1390, 1555, 1720, 3, 228, 445, 611, 776, 941, 1106, 1271, 1436,
1601, 58, 285, 504, 671, 836, 1001, 1166, 1331, 1496, 1661, 118, 345, 178,
- 397, 577, 742, 907, 1072, 1237, 1402, 1567, 1732, 16, 242, 460, 627, 792,
- 957, 1122, 1287, 1452, 1617, 74, 301, 520, 687, 852, 1017, 1182, 1347, 1512,
- 1677, 134, 361, 193, 411, 727, 892, 1057, 1222, 1387, 1552, 1717, 0, 225,
- 442, 607, 772, 937, 1102, 1267, 1432, 1597, 54, 281, 500, 667, 832, 997,
- 1162, 1327, 1492, 1657, 114, 341, 174, 393, 560, 739, 904, 1069, 1234, 1399,
- 1564, 1729, 13, 239, 457, 623, 788, 953, 1118, 1283, 1448, 1613, 70, 297,
- 516, 683, 848, 1013, 1178, 1343, 1508, 1673, 130, 357, 189, 407, 573,
+ 397, 415, 580, 745, 910, 1075, 1240, 1405, 1570, 1735, 19, 245, 464, 631,
+ 796, 961, 1126, 1291, 1456, 1621, 78, 305, 524, 691, 856, 1021, 1186, 1351,
+ 1516, 1681, 138, 365, 197, 739, 904, 1069, 1234, 1399, 1564, 1729, 13, 239,
+ 457, 623, 788, 953, 1118, 1283, 1448, 1613, 70, 297, 516, 683, 848, 1013,
+ 1178, 1343, 1508, 1673, 130, 357, 189, 407, 573, 577, 742, 907, 1072, 1237,
+ 1402, 1567, 1732, 16, 242, 460, 627, 792, 957, 1122, 1287, 1452, 1617, 74,
+ 301, 520, 687, 852, 1017, 1182, 1347, 1512, 1677, 134, 361, 193, 411,
};
+ static char AsmStrsvreg[] = {
+ /* 0 */ 'v', '1', '0', 0,
+ /* 4 */ 'v', '2', '0', 0,
+ /* 8 */ 'v', '3', '0', 0,
+ /* 12 */ 'v', '0', 0,
+ /* 15 */ 'v', '1', '1', 0,
+ /* 19 */ 'v', '2', '1', 0,
+ /* 23 */ 'v', '3', '1', 0,
+ /* 27 */ 'v', '1', 0,
+ /* 30 */ 'v', '1', '2', 0,
+ /* 34 */ 'v', '2', '2', 0,
+ /* 38 */ 'v', '2', 0,
+ /* 41 */ 'v', '1', '3', 0,
+ /* 45 */ 'v', '2', '3', 0,
+ /* 49 */ 'v', '3', 0,
+ /* 52 */ 'v', '1', '4', 0,
+ /* 56 */ 'v', '2', '4', 0,
+ /* 60 */ 'v', '4', 0,
+ /* 63 */ 'v', '1', '5', 0,
+ /* 67 */ 'v', '2', '5', 0,
+ /* 71 */ 'v', '5', 0,
+ /* 74 */ 'v', '1', '6', 0,
+ /* 78 */ 'v', '2', '6', 0,
+ /* 82 */ 'v', '6', 0,
+ /* 85 */ 'v', '1', '7', 0,
+ /* 89 */ 'v', '2', '7', 0,
+ /* 93 */ 'v', '7', 0,
+ /* 96 */ 'v', '1', '8', 0,
+ /* 100 */ 'v', '2', '8', 0,
+ /* 104 */ 'v', '8', 0,
+ /* 107 */ 'v', '1', '9', 0,
+ /* 111 */ 'v', '2', '9', 0,
+ /* 115 */ 'v', '9', 0,
+ };
+
+ static const uint32_t RegAsmOffsetvreg[] = {
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 12, 27, 38,
+ 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74,
+ 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8,
+ 23, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 12, 27, 38, 49, 60, 71, 82, 93, 104,
+ 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34,
+ 45, 56, 67, 78, 89, 100, 111, 8, 23, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0,
+ 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56,
+ 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82,
+ 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4,
+ 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38,
+ 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74,
+ 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8,
+ 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30,
+ 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78,
+ 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 104,
+ 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34,
+ 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60,
+ 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96,
+ 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23,
+ };
+
+ const uint32_t *RegAsmOffset;
+ char *AsmStrs;
+
+ switch(AltIdx) {
+ default: // llvm_unreachable("Invalid register alt name index!");
+ case AArch64_NoRegAltName:
+ AsmStrs = AsmStrsNoRegAltName;
+ RegAsmOffset = RegAsmOffsetNoRegAltName;
+ break;
+ case AArch64_vreg:
+ AsmStrs = AsmStrsvreg;
+ RegAsmOffset = RegAsmOffsetvreg;
+ break;
+ }
//int i;
- //for (i = 0; i < sizeof(RegAsmOffset)/4; i++)
- // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1);
+ //for (i = 0; i < sizeof(RegAsmOffsetNoRegAltName)/4; i++)
+ // printf("%s = %u\n", AsmStrsNoRegAltName+RegAsmOffsetNoRegAltName[i], i + 1);
//printf("*************************\n");
+ //for (i = 0; i < sizeof(RegAsmOffsetvreg)/4; i++)
+ // printf("%s = %u\n", AsmStrsvreg+RegAsmOffsetvreg[i], i + 1);
+ //printf("-------------------------\n");
return AsmStrs+RegAsmOffset[RegNo-1];
#else
return NULL;
@@ -8867,15 +6979,142 @@
#ifdef PRINT_ALIAS_INSTR
#undef PRINT_ALIAS_INSTR
+static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx,
+ unsigned PrintMethodIdx, SStream *OS, MCRegisterInfo *MRI)
+{
+ // printf(">>>> Method: %u, opIdx: %x\n", PrintMethodIdx, OpIdx);
+ switch (PrintMethodIdx) {
+ default:
+ // llvm_unreachable("Unknown PrintMethod kind");
+ break;
+ case 0:
+ printAddSubImm(MI, OpIdx, OS);
+ break;
+ case 1:
+ printShifter(MI, OpIdx, OS);
+ break;
+ case 2:
+ printArithExtend(MI, OpIdx, OS);
+ break;
+ case 3:
+ printLogicalImm32(MI, OpIdx, OS);
+ break;
+ case 4:
+ printLogicalImm64(MI, OpIdx, OS);
+ break;
+ case 5:
+ printVRegOperand(MI, OpIdx, OS);
+ break;
+ case 6:
+ printHexImm(MI, OpIdx, OS);
+ break;
+ case 7:
+ printInverseCondCode(MI, OpIdx, OS);
+ break;
+ case 8:
+ printVectorIndex(MI, OpIdx, OS);
+ break;
+ case 9:
+ printTypedVectorList(MI, OpIdx, OS, 16, 'b', MRI);
+ break;
+ case 10:
+ printTypedVectorList(MI, OpIdx, OS, 1, 'd', MRI);
+ break;
+ case 11:
+ printTypedVectorList(MI, OpIdx, OS, 2, 'd', MRI);
+ break;
+ case 12:
+ printTypedVectorList(MI, OpIdx, OS, 2, 's', MRI);
+ break;
+ case 13:
+ printTypedVectorList(MI, OpIdx, OS, 4, 'h', MRI);
+ break;
+ case 14:
+ printTypedVectorList(MI, OpIdx, OS, 4, 's', MRI);
+ break;
+ case 15:
+ printTypedVectorList(MI, OpIdx, OS, 8, 'b', MRI);
+ break;
+ case 16:
+ printTypedVectorList(MI, OpIdx, OS, 8, 'h', MRI);
+ break;
+ case 17:
+ printTypedVectorList(MI, OpIdx, OS, 0, 'h', MRI);
+ break;
+ case 18:
+ printTypedVectorList(MI, OpIdx, OS, 0, 's', MRI);
+ break;
+ case 19:
+ printTypedVectorList(MI, OpIdx, OS, 0, 'd', MRI);
+ break;
+ case 20:
+ printTypedVectorList(MI, OpIdx, OS, 0, 'b', MRI);
+ break;
+ case 21:
+ printPrefetchOp(MI, OpIdx, OS);
+ break;
+ case 22:
+ printSysCROperand(MI, OpIdx, OS);
+ break;
+ }
+}
+
+static bool AArch64InstPrinterValidateMCOperand(
+ MCOperand *MCOp, unsigned PredicateIndex)
+{
+ switch (PredicateIndex) {
+ default:
+ // llvm_unreachable("Unknown MCOperandPredicate kind");
+ case 1: {
+ return (MCOperand_isImm(MCOp) &&
+ MCOperand_getImm(MCOp) != ARM64_CC_AL &&
+ MCOperand_getImm(MCOp) != ARM64_CC_NV);
+ }
+ }
+}
+
static char *printAliasInstr(MCInst *MI, SStream *OS, void *info)
{
#define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg)))
const char *AsmString;
char *tmp, *AsmMnem, *AsmOps, *c;
+ int OpIdx, PrintMethodIdx;
MCRegisterInfo *MRI = (MCRegisterInfo *)info;
switch (MCInst_getOpcode(MI)) {
default: return NULL;
- case AArch64_ADDSwww_lsl:
+ case AArch64_ADDSWri:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1)) {
+ // (ADDSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm)
+ AsmString = "cmn $\x02, $\xFF\x03\x01";
+ break;
+ }
+ return NULL;
+ case AArch64_ADDSWrs:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, 0)
+ AsmString = "cmn $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh)
+ AsmString = "cmn $\x02, $\x03$\xFF\x04\x02";
+ break;
+ }
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -8885,27 +7124,81 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ADDSwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
+ // (ADDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "adds $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ADDSwww_uxtw:
+ case AArch64_ADDSWrx:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) {
+ // (ADDSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16)
+ AsmString = "cmn $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (ADDSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh)
+ AsmString = "cmn $\x02, $\x03$\xFF\x04\x03";
+ break;
+ }
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_RwspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ADDSwww_uxtw GPR32:$Rd, Rwsp:$Rn, GPR32:$Rm, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) {
+ // (ADDSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16)
AsmString = "adds $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ADDSxxx_lsl:
+ case AArch64_ADDSXri:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1)) {
+ // (ADDSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm)
+ AsmString = "cmn $\x02, $\xFF\x03\x01";
+ break;
+ }
+ return NULL;
+ case AArch64_ADDSXrs:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, 0)
+ AsmString = "cmn $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
+ // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh)
+ AsmString = "cmn $\x02, $\x03$\xFF\x04\x02";
+ break;
+ }
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -8915,51 +7208,89 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ADDSxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
+ // (ADDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
AsmString = "adds $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ADDSxxx_uxtx:
+ case AArch64_ADDSXrx:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (ADDSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh)
+ AsmString = "cmn $\x02, $\x03$\xFF\x04\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_ADDSXrx64:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) {
+ // (ADDSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24)
+ AsmString = "cmn $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
+ // (ADDSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh)
+ AsmString = "cmn $\x02, $\x03$\xFF\x04\x03";
+ break;
+ }
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_RxspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ADDSxxx_uxtx GPR64:$Rd, Rxsp:$Rn, GPR64:$Rm, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) {
+ // (ADDSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24)
AsmString = "adds $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ADDwwi_lsl0_s:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_ADDWri:
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32wspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_RwspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) &&
MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (ADDwwi_lsl0_s GPR32wsp:$Rd, Rwsp:$Rn, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ADDWri GPR32sponly:$dst, GPR32sp:$src, 0, 0)
AsmString = "mov $\x01, $\x02";
break;
}
- if (MCInst_getNumOperands(MI) == 3 &&
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_RwspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32wspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (ADDwwi_lsl0_s Rwsp:$Rd, GPR32wsp:$Rn, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ADDWri GPR32sp:$dst, GPR32sponly:$src, 0, 0)
AsmString = "mov $\x01, $\x02";
break;
}
return NULL;
- case AArch64_ADDwww_lsl:
+ case AArch64_ADDWrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -8969,64 +7300,68 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ADDwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
+ // (ADDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "add $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ADDwww_uxtw:
+ case AArch64_ADDWrx:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_RwspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32wspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ADDwww_uxtw Rwsp:$Rd, GPR32wsp:$Rn, GPR32:$Rm, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) {
+ // (ADDWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16)
AsmString = "add $\x01, $\x02, $\x03";
break;
}
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32wspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_RwspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ADDwww_uxtw GPR32wsp:$Rd, Rwsp:$Rn, GPR32:$Rm, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) {
+ // (ADDWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16)
AsmString = "add $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ADDxxi_lsl0_s:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_ADDXri:
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_RxspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (ADDxxi_lsl0_s GPR64xsp:$Rd, Rxsp:$Rn, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ADDXri GPR64sponly:$dst, GPR64sp:$src, 0, 0)
AsmString = "mov $\x01, $\x02";
break;
}
- if (MCInst_getNumOperands(MI) == 3 &&
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_RxspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (ADDxxi_lsl0_s Rxsp:$Rd, GPR64xsp:$Rn, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ADDXri GPR64sp:$dst, GPR64sponly:$src, 0, 0)
AsmString = "mov $\x01, $\x02";
break;
}
return NULL;
- case AArch64_ADDxxx_lsl:
+ case AArch64_ADDXrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -9036,40 +7371,72 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ADDxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
+ // (ADDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
AsmString = "add $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ADDxxx_uxtx:
+ case AArch64_ADDXrx64:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_RxspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ADDxxx_uxtx Rxsp:$Rd, GPR64xsp:$Rn, GPR64:$Rm, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) {
+ // (ADDXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24)
AsmString = "add $\x01, $\x02, $\x03";
break;
}
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_RxspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ADDxxx_uxtx GPR64xsp:$Rd, Rxsp:$Rn, GPR64:$Rm, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) {
+ // (ADDXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24)
AsmString = "add $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ANDSwww_lsl:
+ case AArch64_ANDSWri:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1)) {
+ // (ANDSWri WZR, GPR32:$src1, logical_imm32:$src2)
+ AsmString = "tst $\x02, $\xFF\x03\x04";
+ break;
+ }
+ return NULL;
+ case AArch64_ANDSWrs:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, 0)
+ AsmString = "tst $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, logical_shift32:$sh)
+ AsmString = "tst $\x02, $\x03$\xFF\x04\x02";
+ break;
+ }
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -9079,12 +7446,44 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ANDSwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
+ // (ANDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "ands $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ANDSxxx_lsl:
+ case AArch64_ANDSXri:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1)) {
+ // (ANDSXri XZR, GPR64:$src1, logical_imm64:$src2)
+ AsmString = "tst $\x02, $\xFF\x03\x05";
+ break;
+ }
+ return NULL;
+ case AArch64_ANDSXrs:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, 0)
+ AsmString = "tst $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
+ // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, logical_shift64:$sh)
+ AsmString = "tst $\x02, $\x03$\xFF\x04\x02";
+ break;
+ }
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -9094,12 +7493,12 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ANDSxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
+ // (ANDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
AsmString = "ands $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ANDwww_lsl:
+ case AArch64_ANDWrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -9109,12 +7508,12 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ANDwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
+ // (ANDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "and $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ANDxxx_lsl:
+ case AArch64_ANDXrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -9124,12 +7523,12 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ANDxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
+ // (ANDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
AsmString = "and $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_BICSwww_lsl:
+ case AArch64_BICSWrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -9139,12 +7538,12 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (BICSwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
+ // (BICSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "bics $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_BICSxxx_lsl:
+ case AArch64_BICSXrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -9154,12 +7553,12 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (BICSxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
+ // (BICSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
AsmString = "bics $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_BICwww_lsl:
+ case AArch64_BICWrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -9169,12 +7568,12 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (BICwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
+ // (BICWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "bic $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_BICxxx_lsl:
+ case AArch64_BICXrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -9184,152 +7583,216 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (BICxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
+ // (BICXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
AsmString = "bic $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_CLREXi:
+ case AArch64_BICv2i32:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (BICv2i32 V64:$Vd, imm0_255:$imm, 0)
+ AsmString = "bic $\xFF\x01\x06.2s, $\xFF\x02\x07";
+ break;
+ }
+ return NULL;
+ case AArch64_BICv4i16:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (BICv4i16 V64:$Vd, imm0_255:$imm, 0)
+ AsmString = "bic $\xFF\x01\x06.4h, $\xFF\x02\x07";
+ break;
+ }
+ return NULL;
+ case AArch64_BICv4i32:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (BICv4i32 V128:$Vd, imm0_255:$imm, 0)
+ AsmString = "bic $\xFF\x01\x06.4s, $\xFF\x02\x07";
+ break;
+ }
+ return NULL;
+ case AArch64_BICv8i16:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (BICv8i16 V128:$Vd, imm0_255:$imm, 0)
+ AsmString = "bic $\xFF\x01\x06.8h, $\xFF\x02\x07";
+ break;
+ }
+ return NULL;
+ case AArch64_CLREX:
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) {
- // (CLREXi 15)
+ // (CLREX 15)
AsmString = "clrex";
break;
}
return NULL;
- case AArch64_CMNww_lsl:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_CSINCWr:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_WZR &&
+ AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) {
+ // (CSINCWr GPR32:$dst, WZR, WZR, inv_ccode:$cc)
+ AsmString = "cset $\x01, $\xFF\x04\x08";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (CMNww_lsl GPR32:$Rn, GPR32:$Rm, 0)
- AsmString = "cmn $\x01, $\x02";
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) &&
+ AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) {
+ // (CSINCWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc)
+ AsmString = "cinc $\x01, $\x02, $\xFF\x04\x08";
break;
}
return NULL;
- case AArch64_CMNww_uxtw:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_CSINCXr:
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_RwspRegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (CMNww_uxtw Rwsp:$Rn, GPR32:$Rm, 0)
- AsmString = "cmn $\x01, $\x02";
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR &&
+ AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) {
+ // (CSINCXr GPR64:$dst, XZR, XZR, inv_ccode:$cc)
+ AsmString = "cset $\x01, $\xFF\x04\x08";
break;
}
- return NULL;
- case AArch64_CMNxx_lsl:
- if (MCInst_getNumOperands(MI) == 3 &&
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (CMNxx_lsl GPR64:$Rn, GPR64:$Rm, 0)
- AsmString = "cmn $\x01, $\x02";
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) &&
+ AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) {
+ // (CSINCXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc)
+ AsmString = "cinc $\x01, $\x02, $\xFF\x04\x08";
break;
}
return NULL;
- case AArch64_CMNxx_uxtx:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_CSINVWr:
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_RxspRegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (CMNxx_uxtx Rxsp:$Rn, GPR64:$Rm, 0)
- AsmString = "cmn $\x01, $\x02";
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_WZR &&
+ AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) {
+ // (CSINVWr GPR32:$dst, WZR, WZR, inv_ccode:$cc)
+ AsmString = "csetm $\x01, $\xFF\x04\x08";
break;
}
- return NULL;
- case AArch64_CMPww_lsl:
- if (MCInst_getNumOperands(MI) == 3 &&
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (CMPww_lsl GPR32:$Rn, GPR32:$Rm, 0)
- AsmString = "cmp $\x01, $\x02";
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) &&
+ AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) {
+ // (CSINVWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc)
+ AsmString = "cinv $\x01, $\x02, $\xFF\x04\x08";
break;
}
return NULL;
- case AArch64_CMPww_uxtw:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_CSINVXr:
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_RwspRegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (CMPww_uxtw Rwsp:$Rn, GPR32:$Rm, 0)
- AsmString = "cmp $\x01, $\x02";
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR &&
+ AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) {
+ // (CSINVXr GPR64:$dst, XZR, XZR, inv_ccode:$cc)
+ AsmString = "csetm $\x01, $\xFF\x04\x08";
break;
}
- return NULL;
- case AArch64_CMPxx_lsl:
- if (MCInst_getNumOperands(MI) == 3 &&
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (CMPxx_lsl GPR64:$Rn, GPR64:$Rm, 0)
- AsmString = "cmp $\x01, $\x02";
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) &&
+ AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) {
+ // (CSINVXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc)
+ AsmString = "cinv $\x01, $\x02, $\xFF\x04\x08";
break;
}
return NULL;
- case AArch64_CMPxx_uxtx:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_CSNEGWr:
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_RxspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) &&
+ AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) {
+ // (CSNEGWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc)
+ AsmString = "cneg $\x01, $\x02, $\xFF\x04\x08";
+ break;
+ }
+ return NULL;
+ case AArch64_CSNEGXr:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (CMPxx_uxtx Rxsp:$Rn, GPR64:$Rm, 0)
- AsmString = "cmp $\x01, $\x02";
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) &&
+ AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) {
+ // (CSNEGXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc)
+ AsmString = "cneg $\x01, $\x02, $\xFF\x04\x08";
break;
}
return NULL;
- case AArch64_DCPS1i:
+ case AArch64_DCPS1:
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) {
- // (DCPS1i 0)
+ // (DCPS1 0)
AsmString = "dcps1";
break;
}
return NULL;
- case AArch64_DCPS2i:
+ case AArch64_DCPS2:
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) {
- // (DCPS2i 0)
+ // (DCPS2 0)
AsmString = "dcps2";
break;
}
return NULL;
- case AArch64_DCPS3i:
+ case AArch64_DCPS3:
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) {
- // (DCPS3i 0)
+ // (DCPS3 0)
AsmString = "dcps3";
break;
}
return NULL;
- case AArch64_EONwww_lsl:
+ case AArch64_EONWrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -9339,12 +7802,12 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (EONwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
+ // (EONWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "eon $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_EONxxx_lsl:
+ case AArch64_EONXrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -9354,12 +7817,12 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (EONxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
+ // (EONXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
AsmString = "eon $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_EORwww_lsl:
+ case AArch64_EORWrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -9369,12 +7832,12 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (EORwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
+ // (EORWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "eor $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_EORxxx_lsl:
+ case AArch64_EORXrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -9384,1440 +7847,2275 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (EORxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
+ // (EORXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
AsmString = "eor $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_HINTi:
+ case AArch64_EXTRWrri:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) {
+ // (EXTRWrri GPR32:$dst, GPR32:$src, GPR32:$src, imm0_31:$shift)
+ AsmString = "ror $\x01, $\x02, $\x04";
+ break;
+ }
+ return NULL;
+ case AArch64_EXTRXrri:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) {
+ // (EXTRXrri GPR64:$dst, GPR64:$src, GPR64:$src, imm0_63:$shift)
+ AsmString = "ror $\x01, $\x02, $\x04";
+ break;
+ }
+ return NULL;
+ case AArch64_HINT:
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) {
- // (HINTi 0)
+ // (HINT { 0, 0, 0 })
AsmString = "nop";
break;
}
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1) {
- // (HINTi 1)
+ // (HINT { 0, 0, 1 })
AsmString = "yield";
break;
}
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2) {
- // (HINTi 2)
+ // (HINT { 0, 1, 0 })
AsmString = "wfe";
break;
}
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 3) {
- // (HINTi 3)
+ // (HINT { 0, 1, 1 })
AsmString = "wfi";
break;
}
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4) {
- // (HINTi 4)
+ // (HINT { 1, 0, 0 })
AsmString = "sev";
break;
}
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 5) {
- // (HINTi 5)
+ // (HINT { 1, 0, 1 })
AsmString = "sevl";
break;
}
return NULL;
- case AArch64_ISBi:
+ case AArch64_INSvi16gpr:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (INSvi16gpr V128:$dst, VectorIndexH:$idx, GPR32:$src)
+ AsmString = "mov $\xFF\x01\x06.h$\xFF\x02\x09, $\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_INSvi16lane:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) {
+ // (INSvi16lane V128:$dst, VectorIndexH:$idx, V128:$src, VectorIndexH:$idx2)
+ AsmString = "mov $\xFF\x01\x06.h$\xFF\x02\x09, $\xFF\x03\x06.h$\xFF\x04\x09";
+ break;
+ }
+ return NULL;
+ case AArch64_INSvi32gpr:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (INSvi32gpr V128:$dst, VectorIndexS:$idx, GPR32:$src)
+ AsmString = "mov $\xFF\x01\x06.s$\xFF\x02\x09, $\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_INSvi32lane:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) {
+ // (INSvi32lane V128:$dst, VectorIndexS:$idx, V128:$src, VectorIndexS:$idx2)
+ AsmString = "mov $\xFF\x01\x06.s$\xFF\x02\x09, $\xFF\x03\x06.s$\xFF\x04\x09";
+ break;
+ }
+ return NULL;
+ case AArch64_INSvi64gpr:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
+ // (INSvi64gpr V128:$dst, VectorIndexD:$idx, GPR64:$src)
+ AsmString = "mov $\xFF\x01\x06.d$\xFF\x02\x09, $\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_INSvi64lane:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) {
+ // (INSvi64lane V128:$dst, VectorIndexD:$idx, V128:$src, VectorIndexD:$idx2)
+ AsmString = "mov $\xFF\x01\x06.d$\xFF\x02\x09, $\xFF\x03\x06.d$\xFF\x04\x09";
+ break;
+ }
+ return NULL;
+ case AArch64_INSvi8gpr:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (INSvi8gpr V128:$dst, VectorIndexB:$idx, GPR32:$src)
+ AsmString = "mov $\xFF\x01\x06.b$\xFF\x02\x09, $\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_INSvi8lane:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) {
+ // (INSvi8lane V128:$dst, VectorIndexB:$idx, V128:$src, VectorIndexB:$idx2)
+ AsmString = "mov $\xFF\x01\x06.b$\xFF\x02\x09, $\xFF\x03\x06.b$\xFF\x04\x09";
+ break;
+ }
+ return NULL;
+ case AArch64_ISB:
if (MCInst_getNumOperands(MI) == 1 &&
MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) {
- // (ISBi 15)
+ // (ISB 15)
AsmString = "isb";
break;
}
return NULL;
- case AArch64_LDPSWx:
+ case AArch64_LD1Fourv16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Fourv1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Fourv2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Fourv2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Fourv4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Fourv4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Fourv8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x10, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Fourv8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x11, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Onev16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Onev1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Onev2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Onev2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Onev4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Onev4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Onev8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x10, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Onev8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x11, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Rv16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Rv16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR)
+ AsmString = "ld1r $\xFF\x02\x0A, [$\x01], #1";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Rv1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Rv1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR)
+ AsmString = "ld1r $\xFF\x02\x0B, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Rv2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Rv2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR)
+ AsmString = "ld1r $\xFF\x02\x0C, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Rv2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Rv2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR)
+ AsmString = "ld1r $\xFF\x02\x0D, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Rv4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Rv4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR)
+ AsmString = "ld1r $\xFF\x02\x0E, [$\x01], #2";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Rv4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Rv4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR)
+ AsmString = "ld1r $\xFF\x02\x0F, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Rv8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Rv8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR)
+ AsmString = "ld1r $\xFF\x02\x10, [$\x01], #1";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Rv8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Rv8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR)
+ AsmString = "ld1r $\xFF\x02\x11, [$\x01], #2";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Threev16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Threev1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Threev2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Threev2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Threev4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Threev4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Threev8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x10, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Threev8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x11, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Twov16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Twov1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Twov2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Twov2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Twov4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Twov4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Twov8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x10, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1Twov8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR)
+ AsmString = "ld1 $\xFF\x02\x11, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1i16_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR)
+ AsmString = "ld1 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #2";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1i32_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR)
+ AsmString = "ld1 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1i64_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR)
+ AsmString = "ld1 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD1i8_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR)
+ AsmString = "ld1 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #1";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Rv16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Rv16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR)
+ AsmString = "ld2r $\xFF\x02\x0A, [$\x01], #2";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Rv1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Rv1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR)
+ AsmString = "ld2r $\xFF\x02\x0B, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Rv2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Rv2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR)
+ AsmString = "ld2r $\xFF\x02\x0C, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Rv2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Rv2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR)
+ AsmString = "ld2r $\xFF\x02\x0D, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Rv4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Rv4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR)
+ AsmString = "ld2r $\xFF\x02\x0E, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Rv4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Rv4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR)
+ AsmString = "ld2r $\xFF\x02\x0F, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Rv8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Rv8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR)
+ AsmString = "ld2r $\xFF\x02\x10, [$\x01], #2";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Rv8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Rv8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR)
+ AsmString = "ld2r $\xFF\x02\x11, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Twov16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR)
+ AsmString = "ld2 $\xFF\x02\x0A, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Twov2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR)
+ AsmString = "ld2 $\xFF\x02\x0C, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Twov2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR)
+ AsmString = "ld2 $\xFF\x02\x0D, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Twov4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR)
+ AsmString = "ld2 $\xFF\x02\x0E, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Twov4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR)
+ AsmString = "ld2 $\xFF\x02\x0F, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Twov8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR)
+ AsmString = "ld2 $\xFF\x02\x10, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2Twov8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR)
+ AsmString = "ld2 $\xFF\x02\x11, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2i16_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR)
+ AsmString = "ld2 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2i32_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR)
+ AsmString = "ld2 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2i64_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR)
+ AsmString = "ld2 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD2i8_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR)
+ AsmString = "ld2 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #2";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Rv16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Rv16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR)
+ AsmString = "ld3r $\xFF\x02\x0A, [$\x01], #3";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Rv1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Rv1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR)
+ AsmString = "ld3r $\xFF\x02\x0B, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Rv2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Rv2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR)
+ AsmString = "ld3r $\xFF\x02\x0C, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Rv2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Rv2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR)
+ AsmString = "ld3r $\xFF\x02\x0D, [$\x01], #12";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Rv4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Rv4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR)
+ AsmString = "ld3r $\xFF\x02\x0E, [$\x01], #6";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Rv4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Rv4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR)
+ AsmString = "ld3r $\xFF\x02\x0F, [$\x01], #12";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Rv8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Rv8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR)
+ AsmString = "ld3r $\xFF\x02\x10, [$\x01], #3";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Rv8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Rv8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR)
+ AsmString = "ld3r $\xFF\x02\x11, [$\x01], #6";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Threev16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR)
+ AsmString = "ld3 $\xFF\x02\x0A, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Threev2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR)
+ AsmString = "ld3 $\xFF\x02\x0C, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Threev2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR)
+ AsmString = "ld3 $\xFF\x02\x0D, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Threev4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR)
+ AsmString = "ld3 $\xFF\x02\x0E, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Threev4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR)
+ AsmString = "ld3 $\xFF\x02\x0F, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Threev8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR)
+ AsmString = "ld3 $\xFF\x02\x10, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3Threev8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR)
+ AsmString = "ld3 $\xFF\x02\x11, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3i16_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR)
+ AsmString = "ld3 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #6";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3i32_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR)
+ AsmString = "ld3 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #12";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3i64_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR)
+ AsmString = "ld3 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_LD3i8_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR)
+ AsmString = "ld3 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #3";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Fourv16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR)
+ AsmString = "ld4 $\xFF\x02\x0A, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Fourv2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR)
+ AsmString = "ld4 $\xFF\x02\x0C, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Fourv2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR)
+ AsmString = "ld4 $\xFF\x02\x0D, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Fourv4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR)
+ AsmString = "ld4 $\xFF\x02\x0E, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Fourv4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR)
+ AsmString = "ld4 $\xFF\x02\x0F, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Fourv8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR)
+ AsmString = "ld4 $\xFF\x02\x10, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Fourv8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR)
+ AsmString = "ld4 $\xFF\x02\x11, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Rv16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Rv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR)
+ AsmString = "ld4r $\xFF\x02\x0A, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Rv1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Rv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR)
+ AsmString = "ld4r $\xFF\x02\x0B, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Rv2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Rv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR)
+ AsmString = "ld4r $\xFF\x02\x0C, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Rv2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Rv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR)
+ AsmString = "ld4r $\xFF\x02\x0D, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Rv4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Rv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR)
+ AsmString = "ld4r $\xFF\x02\x0E, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Rv4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Rv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR)
+ AsmString = "ld4r $\xFF\x02\x0F, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Rv8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Rv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR)
+ AsmString = "ld4r $\xFF\x02\x10, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4Rv8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (LD4Rv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR)
+ AsmString = "ld4r $\xFF\x02\x11, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4i16_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR)
+ AsmString = "ld4 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4i32_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR)
+ AsmString = "ld4 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4i64_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR)
+ AsmString = "ld4 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_LD4i8_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (LD4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR)
+ AsmString = "ld4 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_LDNPDi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (LDNPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "ldnp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDNPQi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (LDNPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "ldnp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDNPSi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (LDNPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "ldnp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDNPWi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (LDNPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "ldnp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDNPXi:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LDPSWx GPR64:$Rt, GPR64:$Rt2, GPR64xsp:$Rn, 0)
+ // (LDNPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "ldnp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDPDi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (LDPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "ldp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDPQi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (LDPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "ldp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDPSWi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (LDPSWi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0)
AsmString = "ldpsw $\x01, $\x02, [$\x03]";
break;
}
return NULL;
- case AArch64_LDRSBw:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_LDPSi:
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDRSBw GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldrsb $\x01, [$\x02]";
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (LDPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "ldp $\x01, $\x02, [$\x03]";
break;
}
return NULL;
- case AArch64_LDRSBw_Xm_RegOffset:
+ case AArch64_LDPWi:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LDRSBw_Xm_RegOffset GPR32:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "ldrsb $\x01, [$\x02, $\x03]";
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (LDPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "ldp $\x01, $\x02, [$\x03]";
break;
}
return NULL;
- case AArch64_LDRSBx:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDRSBx GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldrsb $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LDRSBx_Xm_RegOffset:
+ case AArch64_LDPXi:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (LDPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "ldp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRBBroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LDRSBx_Xm_RegOffset GPR64:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "ldrsb $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LDRSHw:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDRSHw GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldrsh $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LDRSHw_Xm_RegOffset:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LDRSHw_Xm_RegOffset GPR32:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "ldrsh $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LDRSHx:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDRSHx GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldrsh $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LDRSHx_Xm_RegOffset:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LDRSHx_Xm_RegOffset GPR64:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "ldrsh $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LDRSWx:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDRSWx GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldrsw $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LDRSWx_Xm_RegOffset:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LDRSWx_Xm_RegOffset GPR64:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "ldrsw $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LDTRSBw:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDTRSBw GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldtrsb $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LDTRSBx:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDTRSBx GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldtrsb $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LDTRSHw:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDTRSHw GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldtrsh $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LDTRSHx:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDTRSHx GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldtrsh $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LDTRSWx:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDTRSWx GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldtrsw $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LDURSWx:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LDURSWx GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldursw $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS16_LDR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS16_LDR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldrh $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS16_LDUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS16_LDUR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldurh $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS16_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS16_STR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "strh $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS16_STUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS16_STUR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "sturh $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS16_UnPriv_LDR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS16_UnPriv_LDR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldtrh $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS16_UnPriv_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS16_UnPriv_STR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "sttrh $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS16_Xm_RegOffset_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LS16_Xm_RegOffset_LDR GPR32:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "ldrh $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LS16_Xm_RegOffset_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LS16_Xm_RegOffset_STR GPR32:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "strh $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LS32_LDR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS32_LDR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldr $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS32_LDUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS32_LDUR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS32_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS32_STR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "str $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS32_STUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS32_STUR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "stur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS32_UnPriv_LDR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS32_UnPriv_LDR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldtr $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS32_UnPriv_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS32_UnPriv_STR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "sttr $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS32_Xm_RegOffset_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LS32_Xm_RegOffset_LDR GPR32:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "ldr $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LS32_Xm_RegOffset_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LS32_Xm_RegOffset_STR GPR32:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "str $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LS64_LDR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS64_LDR GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldr $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS64_LDUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS64_LDUR GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS64_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS64_STR GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "str $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS64_STUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS64_STUR GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "stur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS64_UnPriv_LDR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS64_UnPriv_LDR GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldtr $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS64_UnPriv_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS64_UnPriv_STR GPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "sttr $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS64_Xm_RegOffset_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LS64_Xm_RegOffset_LDR GPR64:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "ldr $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LS64_Xm_RegOffset_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LS64_Xm_RegOffset_STR GPR64:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "str $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LS8_LDR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS8_LDR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldrb $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS8_LDUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS8_LDUR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldurb $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS8_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS8_STR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "strb $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS8_STUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS8_STUR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "sturb $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS8_UnPriv_LDR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS8_UnPriv_LDR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldtrb $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS8_UnPriv_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LS8_UnPriv_STR GPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "sttrb $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LS8_Xm_RegOffset_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LS8_Xm_RegOffset_LDR GPR32:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
AsmString = "ldrb $\x01, [$\x02, $\x03]";
break;
}
return NULL;
- case AArch64_LS8_Xm_RegOffset_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
+ case AArch64_LDRBBui:
+ if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDRBBui GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldrb $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRBroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LS8_Xm_RegOffset_STR GPR32:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "strb $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFP128_LDR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP128_LDR FPR128:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldr $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP128_LDUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP128_LDUR FPR128:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP128_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP128_STR FPR128:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "str $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP128_STUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP128_STUR FPR128:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "stur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP128_Xm_RegOffset_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LSFP128_Xm_RegOffset_LDR FPR128:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRBroX FPR8:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
AsmString = "ldr $\x01, [$\x02, $\x03]";
break;
}
return NULL;
- case AArch64_LSFP128_Xm_RegOffset_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LSFP128_Xm_RegOffset_STR FPR128:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "str $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFP16_LDR:
+ case AArch64_LDRBui:
if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP16_LDR FPR16:$Rt, GPR64xsp:$Rn, 0)
+ // (LDRBui FPR8:$Rt, GPR64sp:$Rn, 0)
AsmString = "ldr $\x01, [$\x02]";
break;
}
return NULL;
- case AArch64_LSFP16_LDUR:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_LDRDroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP16_LDUR FPR16:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP16_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP16_STR FPR16:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "str $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP16_STUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP16_STUR FPR16:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "stur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP16_Xm_RegOffset_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LSFP16_Xm_RegOffset_LDR FPR16:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRDroX FPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
AsmString = "ldr $\x01, [$\x02, $\x03]";
break;
}
return NULL;
- case AArch64_LSFP16_Xm_RegOffset_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LSFP16_Xm_RegOffset_STR FPR16:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "str $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFP32_LDR:
+ case AArch64_LDRDui:
if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP32_LDR FPR32:$Rt, GPR64xsp:$Rn, 0)
+ // (LDRDui FPR64:$Rt, GPR64sp:$Rn, 0)
AsmString = "ldr $\x01, [$\x02]";
break;
}
return NULL;
- case AArch64_LSFP32_LDUR:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_LDRHHroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP32_LDUR FPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP32_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP32_STR FPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "str $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP32_STUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP32_STUR FPR32:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "stur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP32_Xm_RegOffset_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LSFP32_Xm_RegOffset_LDR FPR32:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "ldrh $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRHHui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDRHHui GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldrh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRHroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRHroX FPR16:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
AsmString = "ldr $\x01, [$\x02, $\x03]";
break;
}
return NULL;
- case AArch64_LSFP32_Xm_RegOffset_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LSFP32_Xm_RegOffset_STR FPR32:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "str $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFP64_LDR:
+ case AArch64_LDRHui:
if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP64_LDR FPR64:$Rt, GPR64xsp:$Rn, 0)
+ // (LDRHui FPR16:$Rt, GPR64sp:$Rn, 0)
AsmString = "ldr $\x01, [$\x02]";
break;
}
return NULL;
- case AArch64_LSFP64_LDUR:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_LDRQroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP64_LDUR FPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP64_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP64_STR FPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "str $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP64_STUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP64_STUR FPR64:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "stur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP64_Xm_RegOffset_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LSFP64_Xm_RegOffset_LDR FPR64:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRQroX FPR128:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
AsmString = "ldr $\x01, [$\x02, $\x03]";
break;
}
return NULL;
- case AArch64_LSFP64_Xm_RegOffset_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LSFP64_Xm_RegOffset_STR FPR64:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "str $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFP8_LDR:
+ case AArch64_LDRQui:
if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP8_LDR FPR8:$Rt, GPR64xsp:$Rn, 0)
+ // (LDRQui FPR128:$Rt, GPR64sp:$Rn, 0)
AsmString = "ldr $\x01, [$\x02]";
break;
}
return NULL;
- case AArch64_LSFP8_LDUR:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_LDRSBWroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP8_LDUR FPR8:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "ldur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP8_STR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP8_STR FPR8:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "str $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP8_STUR:
- if (MCInst_getNumOperands(MI) == 3 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (LSFP8_STUR FPR8:$Rt, GPR64xsp:$Rn, 0)
- AsmString = "stur $\x01, [$\x02]";
- break;
- }
- return NULL;
- case AArch64_LSFP8_Xm_RegOffset_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LSFP8_Xm_RegOffset_LDR FPR8:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "ldr $\x01, [$\x02, $\x03]";
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRSBWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "ldrsb $\x01, [$\x02, $\x03]";
break;
}
return NULL;
- case AArch64_LSFP8_Xm_RegOffset_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) {
- // (LSFP8_Xm_RegOffset_STR FPR8:$Rt, GPR64xsp:$Rn, GPR64:$Rm, 2)
- AsmString = "str $\x01, [$\x02, $\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair128_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair128_LDR FPR128:$Rt, FPR128:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "ldp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair128_NonTemp_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair128_NonTemp_LDR FPR128:$Rt, FPR128:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "ldnp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair128_NonTemp_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair128_NonTemp_STR FPR128:$Rt, FPR128:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "stnp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair128_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair128_STR FPR128:$Rt, FPR128:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "stp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair32_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair32_LDR FPR32:$Rt, FPR32:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "ldp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair32_NonTemp_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair32_NonTemp_LDR FPR32:$Rt, FPR32:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "ldnp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair32_NonTemp_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair32_NonTemp_STR FPR32:$Rt, FPR32:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "stnp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair32_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair32_STR FPR32:$Rt, FPR32:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "stp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair64_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair64_LDR FPR64:$Rt, FPR64:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "ldp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair64_NonTemp_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair64_NonTemp_LDR FPR64:$Rt, FPR64:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "ldnp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair64_NonTemp_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair64_NonTemp_STR FPR64:$Rt, FPR64:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "stnp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSFPPair64_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSFPPair64_STR FPR64:$Rt, FPR64:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "stp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSPair32_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
+ case AArch64_LDRSBWui:
+ if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSPair32_LDR GPR32:$Rt, GPR32:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "ldp $\x01, $\x02, [$\x03]";
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDRSBWui GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldrsb $\x01, [$\x02]";
break;
}
return NULL;
- case AArch64_LSPair32_NonTemp_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSPair32_NonTemp_LDR GPR32:$Rt, GPR32:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "ldnp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSPair32_NonTemp_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSPair32_NonTemp_STR GPR32:$Rt, GPR32:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "stnp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSPair32_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSPair32_STR GPR32:$Rt, GPR32:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "stp $\x01, $\x02, [$\x03]";
- break;
- }
- return NULL;
- case AArch64_LSPair64_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
+ case AArch64_LDRSBXroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSPair64_LDR GPR64:$Rt, GPR64:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "ldp $\x01, $\x02, [$\x03]";
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRSBXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "ldrsb $\x01, [$\x02, $\x03]";
break;
}
return NULL;
- case AArch64_LSPair64_NonTemp_LDR:
- if (MCInst_getNumOperands(MI) == 4 &&
+ case AArch64_LDRSBXui:
+ if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSPair64_NonTemp_LDR GPR64:$Rt, GPR64:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "ldnp $\x01, $\x02, [$\x03]";
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDRSBXui GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldrsb $\x01, [$\x02]";
break;
}
return NULL;
- case AArch64_LSPair64_NonTemp_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
+ case AArch64_LDRSHWroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRSHWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "ldrsh $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRSHWui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDRSHWui GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldrsh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRSHXroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSPair64_NonTemp_STR GPR64:$Rt, GPR64:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "stnp $\x01, $\x02, [$\x03]";
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRSHXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "ldrsh $\x01, [$\x02, $\x03]";
break;
}
return NULL;
- case AArch64_LSPair64_STR:
- if (MCInst_getNumOperands(MI) == 4 &&
+ case AArch64_LDRSHXui:
+ if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (LSPair64_STR GPR64:$Rt, GPR64:$Rt2, GPR64xsp:$Rn, 0)
- AsmString = "stp $\x01, $\x02, [$\x03]";
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDRSHXui GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldrsh $\x01, [$\x02]";
break;
}
return NULL;
- case AArch64_MADDwwww:
+ case AArch64_LDRSWroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRSWroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "ldrsw $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRSWui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDRSWui GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldrsw $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRSroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRSroX FPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "ldr $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRSui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDRSui FPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldr $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRWroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "ldr $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRWui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDRWui GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldr $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRXroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (LDRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "ldr $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDRXui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDRXui GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldr $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDTRBi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDTRBi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldtrb $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDTRHi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDTRHi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldtrh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDTRSBWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDTRSBWi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldtrsb $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDTRSBXi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDTRSBXi GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldtrsb $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDTRSHWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDTRSHWi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldtrsh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDTRSHXi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDTRSHXi GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldtrsh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDTRSWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDTRSWi GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldtrsw $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDTRWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDTRWi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldtr $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDTRXi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDTRXi GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldtr $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURBBi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURBBi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldurb $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURBi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURBi FPR8:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURDi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURDi FPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURHHi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURHHi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldurh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURHi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURHi FPR16:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURQi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURQi FPR128:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURSBWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURSBWi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldursb $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURSBXi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURSBXi GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldursb $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURSHWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURSHWi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldursh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURSHXi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURSHXi GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldursh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURSWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURSWi GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldursw $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURSi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURSi FPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURWi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_LDURXi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (LDURXi GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "ldur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_MADDWrrr:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -10826,12 +10124,12 @@
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_WZR) {
- // (MADDwwww GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, WZR)
+ // (MADDWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR)
AsmString = "mul $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_MADDxxxx:
+ case AArch64_MADDXrrr:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -10840,12 +10138,52 @@
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
- // (MADDxxxx GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, XZR)
+ // (MADDXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR)
AsmString = "mul $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_MSUBwwww:
+ case AArch64_MOVKWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 16) {
+ // (MOVKWi GPR32:$Rd, movk_symbol_g1:$sym, 16)
+ AsmString = "movk $\x01, $\x02";
+ break;
+ }
+ return NULL;
+ case AArch64_MOVKXi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 48) {
+ // (MOVKXi GPR64:$Rd, movk_symbol_g3:$sym, 48)
+ AsmString = "movk $\x01, $\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 32) {
+ // (MOVKXi GPR64:$Rd, movk_symbol_g2:$sym, 32)
+ AsmString = "movk $\x01, $\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 16) {
+ // (MOVKXi GPR64:$Rd, movk_symbol_g1:$sym, 16)
+ AsmString = "movk $\x01, $\x02";
+ break;
+ }
+ return NULL;
+ case AArch64_MSUBWrrr:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -10854,12 +10192,12 @@
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_WZR) {
- // (MSUBwwww GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, WZR)
+ // (MSUBWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR)
AsmString = "mneg $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_MSUBxxxx:
+ case AArch64_MSUBXrrr:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -10868,68 +10206,34 @@
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
- // (MSUBxxxx GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, XZR)
+ // (MSUBXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR)
AsmString = "mneg $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_MVNww_lsl:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_NOTv16i8:
+ if (MCInst_getNumOperands(MI) == 2 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (MVNww_lsl GPR32:$Rn, GPR32:$Rm, 0)
- AsmString = "mvn $\x01, $\x02";
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) {
+ // (NOTv16i8 V128:$Vd, V128:$Vn)
+ AsmString = "mvn $\xFF\x01\x06.16b, $\xFF\x02\x06.16b";
break;
}
return NULL;
- case AArch64_MVNxx_lsl:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_NOTv8i8:
+ if (MCInst_getNumOperands(MI) == 2 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
- MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (MVNxx_lsl GPR64:$Rn, GPR64:$Rm, 0)
- AsmString = "mvn $\x01, $\x02";
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1)) {
+ // (NOTv8i8 V64:$Vd, V64:$Vn)
+ AsmString = "mvn $\xFF\x01\x06.8b, $\xFF\x02\x06.8b";
break;
}
return NULL;
- case AArch64_ORNwww_lsl:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ORNwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
- AsmString = "orn $\x01, $\x02, $\x03";
- break;
- }
- return NULL;
- case AArch64_ORNxxx_lsl:
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ORNxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
- AsmString = "orn $\x01, $\x02, $\x03";
- break;
- }
- return NULL;
- case AArch64_ORRwww_lsl:
+ case AArch64_ORNWrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -10938,7 +10242,81 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ORRwww_lsl GPR32:$Rd, WZR, GPR32:$Rm, 0)
+ // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, 0)
+ AsmString = "mvn $\x01, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, logical_shift32:$sh)
+ AsmString = "mvn $\x01, $\x03$\xFF\x04\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ORNWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
+ AsmString = "orn $\x01, $\x02, $\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_ORNXrs:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, 0)
+ AsmString = "mvn $\x01, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
+ // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, logical_shift64:$sh)
+ AsmString = "mvn $\x01, $\x03$\xFF\x04\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ORNXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
+ AsmString = "orn $\x01, $\x02, $\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_ORRWrs:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (ORRWrs GPR32:$dst, WZR, GPR32:$src, 0)
AsmString = "mov $\x01, $\x03";
break;
}
@@ -10951,12 +10329,12 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ORRwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
+ // (ORRWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "orr $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_ORRxxx_lsl:
+ case AArch64_ORRXrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -10965,7 +10343,7 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ORRxxx_lsl GPR64:$Rd, XZR, GPR64:$Rm, 0)
+ // (ORRXrs GPR64:$dst, XZR, GPR64:$src, 0)
AsmString = "mov $\x01, $\x03";
break;
}
@@ -10978,68 +10356,266 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (ORRxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
+ // (ORRXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
AsmString = "orr $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_RETx:
+ case AArch64_ORRv16i8:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) {
+ // (ORRv16i8 V128:$dst, V128:$src, V128:$src)
+ AsmString = "mov $\xFF\x01\x06.16b, $\xFF\x02\x06.16b";
+ break;
+ }
+ return NULL;
+ case AArch64_ORRv2i32:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (ORRv2i32 V64:$Vd, imm0_255:$imm, 0)
+ AsmString = "orr $\xFF\x01\x06.2s, $\xFF\x02\x07";
+ break;
+ }
+ return NULL;
+ case AArch64_ORRv4i16:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (ORRv4i16 V64:$Vd, imm0_255:$imm, 0)
+ AsmString = "orr $\xFF\x01\x06.4h, $\xFF\x02\x07";
+ break;
+ }
+ return NULL;
+ case AArch64_ORRv4i32:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (ORRv4i32 V128:$Vd, imm0_255:$imm, 0)
+ AsmString = "orr $\xFF\x01\x06.4s, $\xFF\x02\x07";
+ break;
+ }
+ return NULL;
+ case AArch64_ORRv8i16:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (ORRv8i16 V128:$Vd, imm0_255:$imm, 0)
+ AsmString = "orr $\xFF\x01\x06.8h, $\xFF\x02\x07";
+ break;
+ }
+ return NULL;
+ case AArch64_ORRv8i8:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) {
+ // (ORRv8i8 V64:$dst, V64:$src, V64:$src)
+ AsmString = "mov $\xFF\x01\x06.8b, $\xFF\x02\x06.8b";
+ break;
+ }
+ return NULL;
+ case AArch64_PRFMroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (PRFMroX prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "prfm $\xFF\x01\x16, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_PRFMui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (PRFMui prfop:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "prfm $\xFF\x01\x16, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_PRFUMi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (PRFUMi prfop:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "prfum $\xFF\x01\x16, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_RET:
if (MCInst_getNumOperands(MI) == 1 &&
- MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_X30) {
- // (RETx X30)
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_LR) {
+ // (RET LR)
AsmString = "ret";
break;
}
return NULL;
- case AArch64_SBCSwww:
+ case AArch64_SBCSWr:
if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
- // (SBCSwww GPR32:$Rd, WZR, GPR32:$Rm)
+ // (SBCSWr GPR32:$dst, WZR, GPR32:$src)
AsmString = "ngcs $\x01, $\x03";
break;
}
return NULL;
- case AArch64_SBCSxxx:
+ case AArch64_SBCSXr:
if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
- // (SBCSxxx GPR64:$Rd, XZR, GPR64:$Rm)
+ // (SBCSXr GPR64:$dst, XZR, GPR64:$src)
AsmString = "ngcs $\x01, $\x03";
break;
}
return NULL;
- case AArch64_SBCwww:
+ case AArch64_SBCWr:
if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
- // (SBCwww GPR32:$Rd, WZR, GPR32:$Rm)
+ // (SBCWr GPR32:$dst, WZR, GPR32:$src)
AsmString = "ngc $\x01, $\x03";
break;
}
return NULL;
- case AArch64_SBCxxx:
+ case AArch64_SBCXr:
if (MCInst_getNumOperands(MI) == 3 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
- // (SBCxxx GPR64:$Rd, XZR, GPR64:$Rm)
+ // (SBCXr GPR64:$dst, XZR, GPR64:$src)
AsmString = "ngc $\x01, $\x03";
break;
}
return NULL;
- case AArch64_SMADDLxwwx:
+ case AArch64_SBFMWri:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) {
+ // (SBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31)
+ AsmString = "asr $\x01, $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) {
+ // (SBFMWri GPR32:$dst, GPR32:$src, 0, 7)
+ AsmString = "sxtb $\x01, $\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) {
+ // (SBFMWri GPR32:$dst, GPR32:$src, 0, 15)
+ AsmString = "sxth $\x01, $\x02";
+ break;
+ }
+ return NULL;
+ case AArch64_SBFMXri:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 63) {
+ // (SBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63)
+ AsmString = "asr $\x01, $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) {
+ // (SBFMXri GPR64:$dst, GPR64:$src, 0, 7)
+ AsmString = "sxtb $\x01, $\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) {
+ // (SBFMXri GPR64:$dst, GPR64:$src, 0, 15)
+ AsmString = "sxth $\x01, $\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) {
+ // (SBFMXri GPR64:$dst, GPR64:$src, 0, 31)
+ AsmString = "sxtw $\x01, $\x02";
+ break;
+ }
+ return NULL;
+ case AArch64_SMADDLrrr:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -11048,12 +10624,12 @@
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
- // (SMADDLxwwx GPR64:$Rd, GPR32:$Rn, GPR32:$Rm, XZR)
+ // (SMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR)
AsmString = "smull $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_SMSUBLxwwx:
+ case AArch64_SMSUBLrrr:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -11062,23 +10638,1459 @@
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
- // (SMSUBLxwwx GPR64:$Rd, GPR32:$Rn, GPR32:$Rm, XZR)
+ // (SMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR)
AsmString = "smnegl $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_SUBSwww_lsl:
+ case AArch64_ST1Fourv16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0A, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Fourv1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0B, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Fourv2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0C, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Fourv2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0D, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Fourv4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0E, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Fourv4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0F, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Fourv8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x10, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Fourv8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x11, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Onev16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0A, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Onev1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0B, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Onev2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0C, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Onev2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0D, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Onev4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0E, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Onev4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0F, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Onev8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x10, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Onev8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x11, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Threev16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0A, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Threev1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0B, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Threev2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0C, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Threev2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0D, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Threev4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0E, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Threev4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0F, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Threev8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x10, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Threev8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x11, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Twov16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0A, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Twov1d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0B, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Twov2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0C, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Twov2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0D, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Twov4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0E, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Twov4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x0F, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Twov8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x10, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1Twov8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR)
+ AsmString = "st1 $\xFF\x02\x11, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1i16_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR)
+ AsmString = "st1 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #2";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1i32_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR)
+ AsmString = "st1 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1i64_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR)
+ AsmString = "st1 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_ST1i8_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR)
+ AsmString = "st1 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #1";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2Twov16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR)
+ AsmString = "st2 $\xFF\x02\x0A, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2Twov2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR)
+ AsmString = "st2 $\xFF\x02\x0C, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2Twov2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR)
+ AsmString = "st2 $\xFF\x02\x0D, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2Twov4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR)
+ AsmString = "st2 $\xFF\x02\x0E, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2Twov4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR)
+ AsmString = "st2 $\xFF\x02\x0F, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2Twov8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR)
+ AsmString = "st2 $\xFF\x02\x10, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2Twov8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR)
+ AsmString = "st2 $\xFF\x02\x11, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2i16_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR)
+ AsmString = "st2 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2i32_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR)
+ AsmString = "st2 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2i64_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR)
+ AsmString = "st2 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST2i8_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR)
+ AsmString = "st2 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #2";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3Threev16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR)
+ AsmString = "st3 $\xFF\x02\x0A, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3Threev2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR)
+ AsmString = "st3 $\xFF\x02\x0C, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3Threev2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR)
+ AsmString = "st3 $\xFF\x02\x0D, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3Threev4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR)
+ AsmString = "st3 $\xFF\x02\x0E, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3Threev4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR)
+ AsmString = "st3 $\xFF\x02\x0F, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3Threev8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR)
+ AsmString = "st3 $\xFF\x02\x10, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3Threev8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR)
+ AsmString = "st3 $\xFF\x02\x11, [$\x01], #48";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3i16_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR)
+ AsmString = "st3 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #6";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3i32_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR)
+ AsmString = "st3 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #12";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3i64_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR)
+ AsmString = "st3 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #24";
+ break;
+ }
+ return NULL;
+ case AArch64_ST3i8_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR)
+ AsmString = "st3 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #3";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4Fourv16b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR)
+ AsmString = "st4 $\xFF\x02\x0A, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4Fourv2d_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR)
+ AsmString = "st4 $\xFF\x02\x0C, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4Fourv2s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR)
+ AsmString = "st4 $\xFF\x02\x0D, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4Fourv4h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR)
+ AsmString = "st4 $\xFF\x02\x0E, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4Fourv4s_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR)
+ AsmString = "st4 $\xFF\x02\x0F, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4Fourv8b_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR)
+ AsmString = "st4 $\xFF\x02\x10, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4Fourv8h_POST:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) {
+ // (ST4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR)
+ AsmString = "st4 $\xFF\x02\x11, [$\x01], #64";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4i16_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR)
+ AsmString = "st4 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #8";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4i32_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR)
+ AsmString = "st4 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #16";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4i64_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR)
+ AsmString = "st4 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #32";
+ break;
+ }
+ return NULL;
+ case AArch64_ST4i8_POST:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
+ // (ST4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR)
+ AsmString = "st4 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #4";
+ break;
+ }
+ return NULL;
+ case AArch64_STNPDi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (STNPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "stnp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STNPQi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (STNPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "stnp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STNPSi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (STNPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "stnp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STNPWi:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (STNPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "stnp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STNPXi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (STNPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "stnp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STPDi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (STPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "stp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STPQi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (STPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "stp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STPSi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (STPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "stp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STPWi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (STPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "stp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STPXi:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
+ // (STPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0)
+ AsmString = "stp $\x01, $\x02, [$\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRBBroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (STRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "strb $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRBBui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STRBBui GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "strb $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRBroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (STRBroX FPR8:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "str $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRBui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STRBui FPR8:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "str $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRDroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (STRDroX FPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "str $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRDui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STRDui FPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "str $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRHHroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (STRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "strh $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRHHui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STRHHui GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "strh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRHroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (STRHroX FPR16:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "str $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRHui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STRHui FPR16:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "str $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRQroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (STRQroX FPR128:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "str $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRQui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STRQui FPR128:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "str $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRSroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (STRSroX FPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "str $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRSui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STRSui FPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "str $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRWroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (STRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "str $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRWui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STRWui GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "str $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRXroX:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 4)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) {
+ // (STRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
+ AsmString = "str $\x01, [$\x02, $\x03]";
+ break;
+ }
+ return NULL;
+ case AArch64_STRXui:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STRXui GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "str $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STTRBi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STTRBi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "sttrb $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STTRHi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STTRHi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "sttrh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STTRWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STTRWi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "sttr $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STTRXi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STTRXi GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "sttr $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STURBBi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STURBBi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "sturb $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STURBi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STURBi FPR8:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "stur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STURDi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STURDi FPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "stur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STURHHi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STURHHi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "sturh $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STURHi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STURHi FPR16:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "stur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STURQi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STURQi FPR128:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "stur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STURSi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STURSi FPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "stur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STURWi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STURWi GPR32:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "stur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_STURXi:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
+ // (STURXi GPR64:$Rt, GPR64sp:$Rn, 0)
+ AsmString = "stur $\x01, [$\x02]";
+ break;
+ }
+ return NULL;
+ case AArch64_SUBSWri:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1)) {
+ // (SUBSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm)
+ AsmString = "cmp $\x02, $\xFF\x03\x01";
+ break;
+ }
+ return NULL;
+ case AArch64_SUBSWrs:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBSwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
- AsmString = "subs $\x01, $\x02, $\x03";
+ // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, 0)
+ AsmString = "cmp $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh)
+ AsmString = "cmp $\x02, $\x03$\xFF\x04\x02";
break;
}
if (MCInst_getNumOperands(MI) == 4 &&
@@ -11089,38 +12101,102 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBSwww_lsl GPR32:$Rd, WZR, GPR32:$Rm, 0)
+ // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, 0)
AsmString = "negs $\x01, $\x03";
break;
}
- return NULL;
- case AArch64_SUBSwww_uxtw:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift)
+ AsmString = "negs $\x01, $\x03$\xFF\x04\x02";
+ break;
+ }
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_RwspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBSwww_uxtw GPR32:$Rd, Rwsp:$Rn, GPR32:$Rm, 0)
+ // (SUBSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "subs $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_SUBSxxx_lsl:
+ case AArch64_SUBSWrx:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) {
+ // (SUBSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16)
+ AsmString = "cmp $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (SUBSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh)
+ AsmString = "cmp $\x02, $\x03$\xFF\x04\x03";
+ break;
+ }
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) {
+ // (SUBSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16)
+ AsmString = "subs $\x01, $\x02, $\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_SUBSXri:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1)) {
+ // (SUBSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm)
+ AsmString = "cmp $\x02, $\xFF\x03\x01";
+ break;
+ }
+ return NULL;
+ case AArch64_SUBSXrs:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBSxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
- AsmString = "subs $\x01, $\x02, $\x03";
+ // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, 0)
+ AsmString = "cmp $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
+ // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh)
+ AsmString = "cmp $\x02, $\x03$\xFF\x04\x02";
break;
}
if (MCInst_getNumOperands(MI) == 4 &&
@@ -11131,40 +12207,84 @@
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBSxxx_lsl GPR64:$Rd, XZR, GPR64:$Rm, 0)
+ // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, 0)
AsmString = "negs $\x01, $\x03";
break;
}
- return NULL;
- case AArch64_SUBSxxx_uxtx:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
+ // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift)
+ AsmString = "negs $\x01, $\x03$\xFF\x04\x02";
+ break;
+ }
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_RxspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBSxxx_uxtx GPR64:$Rd, Rxsp:$Rn, GPR64:$Rm, 0)
+ // (SUBSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
AsmString = "subs $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_SUBwww_lsl:
+ case AArch64_SUBSXrx:
if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBwww_lsl GPR32:$Rd, GPR32:$Rn, GPR32:$Rm, 0)
- AsmString = "sub $\x01, $\x02, $\x03";
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (SUBSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh)
+ AsmString = "cmp $\x02, $\x03$\xFF\x04\x03";
break;
}
+ return NULL;
+ case AArch64_SUBSXrx64:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) {
+ // (SUBSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24)
+ AsmString = "cmp $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
+ // (SUBSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh)
+ AsmString = "cmp $\x02, $\x03$\xFF\x04\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) {
+ // (SUBSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24)
+ AsmString = "subs $\x01, $\x02, $\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_SUBWrs:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
@@ -11173,121 +12293,227 @@
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBwww_lsl GPR32:$Rd, WZR, GPR32:$Rm, 0)
+ // (SUBWrs GPR32:$dst, WZR, GPR32:$src, 0)
AsmString = "neg $\x01, $\x03";
break;
}
- return NULL;
- case AArch64_SUBwww_uxtw:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_RwspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
+ // (SUBWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift)
+ AsmString = "neg $\x01, $\x03$\xFF\x04\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32wspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBwww_uxtw Rwsp:$Rd, GPR32wsp:$Rn, GPR32:$Rm, 0)
- AsmString = "sub $\x01, $\x02, $\x03";
- break;
- }
- if (MCInst_getNumOperands(MI) == 4 &&
- MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32wspRegClassID, 0) &&
- MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_RwspRegClassID, 1) &&
- MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
- MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBwww_uxtw GPR32wsp:$Rd, Rwsp:$Rn, GPR32:$Rm, 0)
+ // (SUBWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
AsmString = "sub $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_SUBxxx_lsl:
+ case AArch64_SUBWrx:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBxxx_lsl GPR64:$Rd, GPR64:$Rn, GPR64:$Rm, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) {
+ // (SUBWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16)
AsmString = "sub $\x01, $\x02, $\x03";
break;
}
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) {
+ // (SUBWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16)
+ AsmString = "sub $\x01, $\x02, $\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_SUBXrs:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBxxx_lsl GPR64:$Rd, XZR, GPR64:$Rm, 0)
+ // (SUBXrs GPR64:$dst, XZR, GPR64:$src, 0)
AsmString = "neg $\x01, $\x03";
break;
}
- return NULL;
- case AArch64_SUBxxx_uxtx:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_RxspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
+ // (SUBXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift)
+ AsmString = "neg $\x01, $\x03$\xFF\x04\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBxxx_uxtx Rxsp:$Rd, GPR64xsp:$Rn, GPR64:$Rm, 0)
+ // (SUBXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0)
+ AsmString = "sub $\x01, $\x02, $\x03";
+ break;
+ }
+ return NULL;
+ case AArch64_SUBXrx64:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) {
+ // (SUBXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24)
AsmString = "sub $\x01, $\x02, $\x03";
break;
}
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
- GETREGCLASS_CONTAIN(AArch64_GPR64xspRegClassID, 0) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
- GETREGCLASS_CONTAIN(AArch64_RxspRegClassID, 1) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) {
- // (SUBxxx_uxtx GPR64xsp:$Rd, Rxsp:$Rn, GPR64:$Rm, 0)
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) {
+ // (SUBXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24)
AsmString = "sub $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_TSTww_lsl:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_SYSxt:
+ if (MCInst_getNumOperands(MI) == 5 &&
+ MCOperand_getReg(MCInst_getOperand(MI, 4)) == AArch64_XZR) {
+ // (SYSxt imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2, XZR)
+ AsmString = "sys $\x01, $\xFF\x02\x17, $\xFF\x03\x17, $\x04";
+ break;
+ }
+ return NULL;
+ case AArch64_UBFMWri:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) {
+ // (UBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31)
+ AsmString = "lsr $\x01, $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (TSTww_lsl GPR32:$Rn, GPR32:$Rm, 0)
- AsmString = "tst $\x01, $\x02";
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) {
+ // (UBFMWri GPR32:$dst, GPR32:$src, 0, 7)
+ AsmString = "uxtb $\x01, $\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) {
+ // (UBFMWri GPR32:$dst, GPR32:$src, 0, 15)
+ AsmString = "uxth $\x01, $\x02";
break;
}
return NULL;
- case AArch64_TSTxx_lsl:
- if (MCInst_getNumOperands(MI) == 3 &&
+ case AArch64_UBFMXri:
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 63) {
+ // (UBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63)
+ AsmString = "lsr $\x01, $\x02, $\x03";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
- MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
- // (TSTxx_lsl GPR64:$Rn, GPR64:$Rm, 0)
- AsmString = "tst $\x01, $\x02";
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) {
+ // (UBFMXri GPR64:$dst, GPR64:$src, 0, 7)
+ AsmString = "uxtb $\x01, $\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) {
+ // (UBFMXri GPR64:$dst, GPR64:$src, 0, 15)
+ AsmString = "uxth $\x01, $\x02";
+ break;
+ }
+ if (MCInst_getNumOperands(MI) == 4 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
+ MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 &&
+ MCOperand_isImm(MCInst_getOperand(MI, 3)) &&
+ MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) {
+ // (UBFMXri GPR64:$dst, GPR64:$src, 0, 31)
+ AsmString = "uxtw $\x01, $\x02";
break;
}
return NULL;
- case AArch64_UMADDLxwwx:
+ case AArch64_UMADDLrrr:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -11296,12 +12522,34 @@
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
- // (UMADDLxwwx GPR64:$Rd, GPR32:$Rn, GPR32:$Rm, XZR)
+ // (UMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR)
AsmString = "umull $\x01, $\x02, $\x03";
break;
}
return NULL;
- case AArch64_UMSUBLxwwx:
+ case AArch64_UMOVvi32:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) {
+ // (UMOVvi32 GPR32:$dst, V128:$src, VectorIndexS:$idx)
+ AsmString = "mov $\x01, $\xFF\x02\x06.s$\xFF\x03\x09";
+ break;
+ }
+ return NULL;
+ case AArch64_UMOVvi64:
+ if (MCInst_getNumOperands(MI) == 3 &&
+ MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
+ GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
+ MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
+ GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) {
+ // (UMOVvi64 GPR64:$dst, V128:$src, VectorIndexD:$idx)
+ AsmString = "mov $\x01, $\xFF\x02\x06.d$\xFF\x03\x09";
+ break;
+ }
+ return NULL;
+ case AArch64_UMSUBLrrr:
if (MCInst_getNumOperands(MI) == 4 &&
MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
@@ -11310,7 +12558,7 @@
MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) {
- // (UMSUBLxwwx GPR64:$Rd, GPR32:$Rn, GPR32:$Rm, XZR)
+ // (UMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR)
AsmString = "umnegl $\x01, $\x02, $\x03";
break;
}
@@ -11330,7 +12578,14 @@
for (c = AsmOps; *c; c++) {
if (*c == '$') {
c += 1;
- printOperand(MI, *c - 1, OS);
+ if (*c == (char)0xff) {
+ c += 1;
+ OpIdx = *c - 1;
+ c += 1;
+ PrintMethodIdx = *c - 1;
+ printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS, MRI);
+ } else
+ printOperand(MI, *c - 1, OS);
} else {
SStream_concat(OS, "%c", *c);
}
diff --git a/arch/AArch64/AArch64GenDisassemblerTables.inc b/arch/AArch64/AArch64GenDisassemblerTables.inc
index b25c6e4..87b8af5 100644
--- a/arch/AArch64/AArch64GenDisassemblerTables.inc
+++ b/arch/AArch64/AArch64GenDisassemblerTables.inc
@@ -24,10874 +24,9567 @@
return (insn & fieldMask) >> startBit; \
}
-static uint8_t DecoderTableA6432[] = {
+static uint8_t DecoderTable32[] = {
/* 0 */ MCD_OPC_ExtractField, 26, 3, // Inst{28-26} ...
-/* 3 */ MCD_OPC_FilterValue, 2, 164, 11, // Skip to: 2987
-/* 7 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
-/* 10 */ MCD_OPC_FilterValue, 0, 195, 0, // Skip to: 209
-/* 14 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 17 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 52
-/* 21 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 24 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 38
-/* 28 */ MCD_OPC_CheckField, 21, 1, 0, 20, 179, // Skip to: 45878
-/* 34 */ MCD_OPC_Decode, 214, 17, 0, // Opcode: STXR_byte
-/* 38 */ MCD_OPC_FilterValue, 1, 12, 179, // Skip to: 45878
-/* 42 */ MCD_OPC_CheckField, 21, 1, 0, 6, 179, // Skip to: 45878
-/* 48 */ MCD_OPC_Decode, 208, 17, 0, // Opcode: STLXR_byte
-/* 52 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 60
-/* 56 */ MCD_OPC_Decode, 221, 10, 1, // Opcode: LSPair32_NonTemp_STR
-/* 60 */ MCD_OPC_FilterValue, 2, 31, 0, // Skip to: 95
-/* 64 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 67 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 81
-/* 71 */ MCD_OPC_CheckField, 21, 1, 0, 233, 178, // Skip to: 45878
-/* 77 */ MCD_OPC_Decode, 216, 17, 0, // Opcode: STXR_hword
-/* 81 */ MCD_OPC_FilterValue, 1, 225, 178, // Skip to: 45878
-/* 85 */ MCD_OPC_CheckField, 21, 1, 0, 219, 178, // Skip to: 45878
-/* 91 */ MCD_OPC_Decode, 210, 17, 0, // Opcode: STLXR_hword
-/* 95 */ MCD_OPC_FilterValue, 4, 49, 0, // Skip to: 148
-/* 99 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 102 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 125
-/* 106 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 109 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 117
-/* 113 */ MCD_OPC_Decode, 217, 17, 0, // Opcode: STXR_word
-/* 117 */ MCD_OPC_FilterValue, 1, 189, 178, // Skip to: 45878
-/* 121 */ MCD_OPC_Decode, 213, 17, 2, // Opcode: STXP_word
-/* 125 */ MCD_OPC_FilterValue, 1, 181, 178, // Skip to: 45878
-/* 129 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 132 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 140
-/* 136 */ MCD_OPC_Decode, 211, 17, 0, // Opcode: STLXR_word
-/* 140 */ MCD_OPC_FilterValue, 1, 166, 178, // Skip to: 45878
-/* 144 */ MCD_OPC_Decode, 207, 17, 2, // Opcode: STLXP_word
-/* 148 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 156
-/* 152 */ MCD_OPC_Decode, 229, 10, 1, // Opcode: LSPair64_NonTemp_STR
-/* 156 */ MCD_OPC_FilterValue, 6, 150, 178, // Skip to: 45878
-/* 160 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 163 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 186
-/* 167 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 170 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 178
-/* 174 */ MCD_OPC_Decode, 215, 17, 3, // Opcode: STXR_dword
-/* 178 */ MCD_OPC_FilterValue, 1, 128, 178, // Skip to: 45878
-/* 182 */ MCD_OPC_Decode, 212, 17, 4, // Opcode: STXP_dword
-/* 186 */ MCD_OPC_FilterValue, 1, 120, 178, // Skip to: 45878
-/* 190 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 193 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 201
-/* 197 */ MCD_OPC_Decode, 209, 17, 3, // Opcode: STLXR_dword
-/* 201 */ MCD_OPC_FilterValue, 1, 105, 178, // Skip to: 45878
-/* 205 */ MCD_OPC_Decode, 206, 17, 4, // Opcode: STLXP_dword
-/* 209 */ MCD_OPC_FilterValue, 1, 195, 0, // Skip to: 408
-/* 213 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 216 */ MCD_OPC_FilterValue, 0, 31, 0, // Skip to: 251
-/* 220 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 223 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 237
-/* 227 */ MCD_OPC_CheckField, 21, 1, 0, 77, 178, // Skip to: 45878
-/* 233 */ MCD_OPC_Decode, 199, 9, 5, // Opcode: LDXR_byte
-/* 237 */ MCD_OPC_FilterValue, 1, 69, 178, // Skip to: 45878
-/* 241 */ MCD_OPC_CheckField, 21, 1, 0, 63, 178, // Skip to: 45878
-/* 247 */ MCD_OPC_Decode, 149, 9, 5, // Opcode: LDAXR_byte
-/* 251 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 259
-/* 255 */ MCD_OPC_Decode, 220, 10, 1, // Opcode: LSPair32_NonTemp_LDR
-/* 259 */ MCD_OPC_FilterValue, 2, 31, 0, // Skip to: 294
-/* 263 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 266 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 280
-/* 270 */ MCD_OPC_CheckField, 21, 1, 0, 34, 178, // Skip to: 45878
-/* 276 */ MCD_OPC_Decode, 201, 9, 5, // Opcode: LDXR_hword
-/* 280 */ MCD_OPC_FilterValue, 1, 26, 178, // Skip to: 45878
-/* 284 */ MCD_OPC_CheckField, 21, 1, 0, 20, 178, // Skip to: 45878
-/* 290 */ MCD_OPC_Decode, 151, 9, 5, // Opcode: LDAXR_hword
-/* 294 */ MCD_OPC_FilterValue, 4, 49, 0, // Skip to: 347
-/* 298 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 301 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 324
-/* 305 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 308 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 316
-/* 312 */ MCD_OPC_Decode, 202, 9, 5, // Opcode: LDXR_word
-/* 316 */ MCD_OPC_FilterValue, 1, 246, 177, // Skip to: 45878
-/* 320 */ MCD_OPC_Decode, 198, 9, 6, // Opcode: LDXP_word
-/* 324 */ MCD_OPC_FilterValue, 1, 238, 177, // Skip to: 45878
-/* 328 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 331 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 339
-/* 335 */ MCD_OPC_Decode, 152, 9, 5, // Opcode: LDAXR_word
-/* 339 */ MCD_OPC_FilterValue, 1, 223, 177, // Skip to: 45878
-/* 343 */ MCD_OPC_Decode, 148, 9, 6, // Opcode: LDAXP_word
-/* 347 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 355
-/* 351 */ MCD_OPC_Decode, 228, 10, 1, // Opcode: LSPair64_NonTemp_LDR
-/* 355 */ MCD_OPC_FilterValue, 6, 207, 177, // Skip to: 45878
-/* 359 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 362 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 385
-/* 366 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 369 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 377
-/* 373 */ MCD_OPC_Decode, 200, 9, 7, // Opcode: LDXR_dword
-/* 377 */ MCD_OPC_FilterValue, 1, 185, 177, // Skip to: 45878
-/* 381 */ MCD_OPC_Decode, 197, 9, 6, // Opcode: LDXP_dword
-/* 385 */ MCD_OPC_FilterValue, 1, 177, 177, // Skip to: 45878
-/* 389 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 392 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 400
-/* 396 */ MCD_OPC_Decode, 150, 9, 7, // Opcode: LDAXR_dword
-/* 400 */ MCD_OPC_FilterValue, 1, 162, 177, // Skip to: 45878
-/* 404 */ MCD_OPC_Decode, 147, 9, 6, // Opcode: LDAXP_dword
-/* 408 */ MCD_OPC_FilterValue, 2, 99, 0, // Skip to: 511
-/* 412 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 415 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 435
-/* 419 */ MCD_OPC_CheckField, 21, 1, 0, 141, 177, // Skip to: 45878
-/* 425 */ MCD_OPC_CheckField, 15, 1, 1, 135, 177, // Skip to: 45878
-/* 431 */ MCD_OPC_Decode, 202, 17, 5, // Opcode: STLR_byte
-/* 435 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 443
-/* 439 */ MCD_OPC_Decode, 223, 10, 1, // Opcode: LSPair32_PostInd_STR
-/* 443 */ MCD_OPC_FilterValue, 2, 16, 0, // Skip to: 463
-/* 447 */ MCD_OPC_CheckField, 21, 1, 0, 113, 177, // Skip to: 45878
-/* 453 */ MCD_OPC_CheckField, 15, 1, 1, 107, 177, // Skip to: 45878
-/* 459 */ MCD_OPC_Decode, 204, 17, 5, // Opcode: STLR_hword
-/* 463 */ MCD_OPC_FilterValue, 4, 16, 0, // Skip to: 483
-/* 467 */ MCD_OPC_CheckField, 21, 1, 0, 93, 177, // Skip to: 45878
-/* 473 */ MCD_OPC_CheckField, 15, 1, 1, 87, 177, // Skip to: 45878
-/* 479 */ MCD_OPC_Decode, 205, 17, 5, // Opcode: STLR_word
-/* 483 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 491
-/* 487 */ MCD_OPC_Decode, 231, 10, 1, // Opcode: LSPair64_PostInd_STR
-/* 491 */ MCD_OPC_FilterValue, 6, 71, 177, // Skip to: 45878
-/* 495 */ MCD_OPC_CheckField, 21, 1, 0, 65, 177, // Skip to: 45878
-/* 501 */ MCD_OPC_CheckField, 15, 1, 1, 59, 177, // Skip to: 45878
-/* 507 */ MCD_OPC_Decode, 203, 17, 7, // Opcode: STLR_dword
-/* 511 */ MCD_OPC_FilterValue, 3, 107, 0, // Skip to: 622
-/* 515 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 518 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 538
-/* 522 */ MCD_OPC_CheckField, 21, 1, 0, 38, 177, // Skip to: 45878
-/* 528 */ MCD_OPC_CheckField, 15, 1, 1, 32, 177, // Skip to: 45878
-/* 534 */ MCD_OPC_Decode, 143, 9, 5, // Opcode: LDAR_byte
-/* 538 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 546
-/* 542 */ MCD_OPC_Decode, 222, 10, 1, // Opcode: LSPair32_PostInd_LDR
-/* 546 */ MCD_OPC_FilterValue, 2, 16, 0, // Skip to: 566
-/* 550 */ MCD_OPC_CheckField, 21, 1, 0, 10, 177, // Skip to: 45878
-/* 556 */ MCD_OPC_CheckField, 15, 1, 1, 4, 177, // Skip to: 45878
-/* 562 */ MCD_OPC_Decode, 145, 9, 5, // Opcode: LDAR_hword
-/* 566 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 574
-/* 570 */ MCD_OPC_Decode, 154, 9, 1, // Opcode: LDPSWx_PostInd
-/* 574 */ MCD_OPC_FilterValue, 4, 16, 0, // Skip to: 594
-/* 578 */ MCD_OPC_CheckField, 21, 1, 0, 238, 176, // Skip to: 45878
-/* 584 */ MCD_OPC_CheckField, 15, 1, 1, 232, 176, // Skip to: 45878
-/* 590 */ MCD_OPC_Decode, 146, 9, 5, // Opcode: LDAR_word
-/* 594 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 602
-/* 598 */ MCD_OPC_Decode, 230, 10, 1, // Opcode: LSPair64_PostInd_LDR
-/* 602 */ MCD_OPC_FilterValue, 6, 216, 176, // Skip to: 45878
-/* 606 */ MCD_OPC_CheckField, 21, 1, 0, 210, 176, // Skip to: 45878
-/* 612 */ MCD_OPC_CheckField, 15, 1, 1, 204, 176, // Skip to: 45878
-/* 618 */ MCD_OPC_Decode, 144, 9, 7, // Opcode: LDAR_dword
-/* 622 */ MCD_OPC_FilterValue, 4, 19, 0, // Skip to: 645
-/* 626 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 629 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 637
-/* 633 */ MCD_OPC_Decode, 226, 10, 1, // Opcode: LSPair32_STR
-/* 637 */ MCD_OPC_FilterValue, 5, 181, 176, // Skip to: 45878
-/* 641 */ MCD_OPC_Decode, 234, 10, 1, // Opcode: LSPair64_STR
-/* 645 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 676
-/* 649 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 652 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 660
-/* 656 */ MCD_OPC_Decode, 219, 10, 1, // Opcode: LSPair32_LDR
-/* 660 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 668
-/* 664 */ MCD_OPC_Decode, 153, 9, 1, // Opcode: LDPSWx
-/* 668 */ MCD_OPC_FilterValue, 5, 150, 176, // Skip to: 45878
-/* 672 */ MCD_OPC_Decode, 227, 10, 1, // Opcode: LSPair64_LDR
-/* 676 */ MCD_OPC_FilterValue, 6, 19, 0, // Skip to: 699
-/* 680 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 683 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 691
-/* 687 */ MCD_OPC_Decode, 225, 10, 1, // Opcode: LSPair32_PreInd_STR
-/* 691 */ MCD_OPC_FilterValue, 5, 127, 176, // Skip to: 45878
-/* 695 */ MCD_OPC_Decode, 233, 10, 1, // Opcode: LSPair64_PreInd_STR
-/* 699 */ MCD_OPC_FilterValue, 7, 27, 0, // Skip to: 730
-/* 703 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 706 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 714
-/* 710 */ MCD_OPC_Decode, 224, 10, 1, // Opcode: LSPair32_PreInd_LDR
-/* 714 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 722
-/* 718 */ MCD_OPC_Decode, 155, 9, 1, // Opcode: LDPSWx_PreInd
-/* 722 */ MCD_OPC_FilterValue, 5, 96, 176, // Skip to: 45878
-/* 726 */ MCD_OPC_Decode, 232, 10, 1, // Opcode: LSPair64_PreInd_LDR
-/* 730 */ MCD_OPC_FilterValue, 8, 226, 0, // Skip to: 960
-/* 734 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 737 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 760
-/* 741 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 744 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 752
-/* 748 */ MCD_OPC_Decode, 136, 1, 8, // Opcode: ANDwww_lsl
-/* 752 */ MCD_OPC_FilterValue, 1, 66, 176, // Skip to: 45878
-/* 756 */ MCD_OPC_Decode, 218, 1, 8, // Opcode: BICwww_lsl
-/* 760 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 793
-/* 764 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 767 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 775
-/* 771 */ MCD_OPC_Decode, 206, 11, 8, // Opcode: ORRwww_lsl
-/* 775 */ MCD_OPC_FilterValue, 1, 43, 176, // Skip to: 45878
-/* 779 */ MCD_OPC_CheckField, 5, 5, 31, 4, 0, // Skip to: 789
-/* 785 */ MCD_OPC_Decode, 171, 11, 9, // Opcode: MVNww_lsl
-/* 789 */ MCD_OPC_Decode, 191, 11, 8, // Opcode: ORNwww_lsl
-/* 793 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 816
-/* 797 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 800 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 808
-/* 804 */ MCD_OPC_Decode, 197, 3, 8, // Opcode: EORwww_lsl
-/* 808 */ MCD_OPC_FilterValue, 1, 10, 176, // Skip to: 45878
-/* 812 */ MCD_OPC_Decode, 186, 3, 8, // Opcode: EONwww_lsl
-/* 816 */ MCD_OPC_FilterValue, 3, 28, 0, // Skip to: 848
-/* 820 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 823 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 840
-/* 827 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 837
-/* 833 */ MCD_OPC_Decode, 222, 18, 10, // Opcode: TSTww_lsl
-/* 837 */ MCD_OPC_Decode, 124, 8, // Opcode: ANDSwww_lsl
-/* 840 */ MCD_OPC_FilterValue, 1, 234, 175, // Skip to: 45878
-/* 844 */ MCD_OPC_Decode, 204, 1, 8, // Opcode: BICSwww_lsl
-/* 848 */ MCD_OPC_FilterValue, 4, 19, 0, // Skip to: 871
-/* 852 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 855 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 863
-/* 859 */ MCD_OPC_Decode, 141, 1, 11, // Opcode: ANDxxx_lsl
-/* 863 */ MCD_OPC_FilterValue, 1, 211, 175, // Skip to: 45878
-/* 867 */ MCD_OPC_Decode, 222, 1, 11, // Opcode: BICxxx_lsl
-/* 871 */ MCD_OPC_FilterValue, 5, 29, 0, // Skip to: 904
-/* 875 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 878 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 886
-/* 882 */ MCD_OPC_Decode, 211, 11, 11, // Opcode: ORRxxx_lsl
-/* 886 */ MCD_OPC_FilterValue, 1, 188, 175, // Skip to: 45878
-/* 890 */ MCD_OPC_CheckField, 5, 5, 31, 4, 0, // Skip to: 900
-/* 896 */ MCD_OPC_Decode, 175, 11, 12, // Opcode: MVNxx_lsl
-/* 900 */ MCD_OPC_Decode, 195, 11, 11, // Opcode: ORNxxx_lsl
-/* 904 */ MCD_OPC_FilterValue, 6, 19, 0, // Skip to: 927
-/* 908 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 911 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 919
-/* 915 */ MCD_OPC_Decode, 202, 3, 11, // Opcode: EORxxx_lsl
-/* 919 */ MCD_OPC_FilterValue, 1, 155, 175, // Skip to: 45878
-/* 923 */ MCD_OPC_Decode, 190, 3, 11, // Opcode: EONxxx_lsl
-/* 927 */ MCD_OPC_FilterValue, 7, 147, 175, // Skip to: 45878
-/* 931 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 934 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 952
-/* 938 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 948
-/* 944 */ MCD_OPC_Decode, 226, 18, 13, // Opcode: TSTxx_lsl
-/* 948 */ MCD_OPC_Decode, 129, 1, 11, // Opcode: ANDSxxx_lsl
-/* 952 */ MCD_OPC_FilterValue, 1, 122, 175, // Skip to: 45878
-/* 956 */ MCD_OPC_Decode, 208, 1, 11, // Opcode: BICSxxx_lsl
-/* 960 */ MCD_OPC_FilterValue, 9, 226, 0, // Skip to: 1190
-/* 964 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 967 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 990
-/* 971 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 974 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 982
-/* 978 */ MCD_OPC_Decode, 137, 1, 8, // Opcode: ANDwww_lsr
-/* 982 */ MCD_OPC_FilterValue, 1, 92, 175, // Skip to: 45878
-/* 986 */ MCD_OPC_Decode, 219, 1, 8, // Opcode: BICwww_lsr
-/* 990 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 1023
-/* 994 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 997 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1005
-/* 1001 */ MCD_OPC_Decode, 207, 11, 8, // Opcode: ORRwww_lsr
-/* 1005 */ MCD_OPC_FilterValue, 1, 69, 175, // Skip to: 45878
-/* 1009 */ MCD_OPC_CheckField, 5, 5, 31, 4, 0, // Skip to: 1019
-/* 1015 */ MCD_OPC_Decode, 172, 11, 9, // Opcode: MVNww_lsr
-/* 1019 */ MCD_OPC_Decode, 192, 11, 8, // Opcode: ORNwww_lsr
-/* 1023 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 1046
-/* 1027 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1030 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1038
-/* 1034 */ MCD_OPC_Decode, 198, 3, 8, // Opcode: EORwww_lsr
-/* 1038 */ MCD_OPC_FilterValue, 1, 36, 175, // Skip to: 45878
-/* 1042 */ MCD_OPC_Decode, 187, 3, 8, // Opcode: EONwww_lsr
-/* 1046 */ MCD_OPC_FilterValue, 3, 28, 0, // Skip to: 1078
-/* 1050 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1053 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 1070
-/* 1057 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1067
-/* 1063 */ MCD_OPC_Decode, 223, 18, 10, // Opcode: TSTww_lsr
-/* 1067 */ MCD_OPC_Decode, 125, 8, // Opcode: ANDSwww_lsr
-/* 1070 */ MCD_OPC_FilterValue, 1, 4, 175, // Skip to: 45878
-/* 1074 */ MCD_OPC_Decode, 205, 1, 8, // Opcode: BICSwww_lsr
-/* 1078 */ MCD_OPC_FilterValue, 4, 19, 0, // Skip to: 1101
-/* 1082 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1085 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1093
-/* 1089 */ MCD_OPC_Decode, 142, 1, 11, // Opcode: ANDxxx_lsr
-/* 1093 */ MCD_OPC_FilterValue, 1, 237, 174, // Skip to: 45878
-/* 1097 */ MCD_OPC_Decode, 223, 1, 11, // Opcode: BICxxx_lsr
-/* 1101 */ MCD_OPC_FilterValue, 5, 29, 0, // Skip to: 1134
-/* 1105 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1108 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1116
-/* 1112 */ MCD_OPC_Decode, 212, 11, 11, // Opcode: ORRxxx_lsr
-/* 1116 */ MCD_OPC_FilterValue, 1, 214, 174, // Skip to: 45878
-/* 1120 */ MCD_OPC_CheckField, 5, 5, 31, 4, 0, // Skip to: 1130
-/* 1126 */ MCD_OPC_Decode, 176, 11, 12, // Opcode: MVNxx_lsr
-/* 1130 */ MCD_OPC_Decode, 196, 11, 11, // Opcode: ORNxxx_lsr
-/* 1134 */ MCD_OPC_FilterValue, 6, 19, 0, // Skip to: 1157
-/* 1138 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1141 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1149
-/* 1145 */ MCD_OPC_Decode, 203, 3, 11, // Opcode: EORxxx_lsr
-/* 1149 */ MCD_OPC_FilterValue, 1, 181, 174, // Skip to: 45878
-/* 1153 */ MCD_OPC_Decode, 191, 3, 11, // Opcode: EONxxx_lsr
-/* 1157 */ MCD_OPC_FilterValue, 7, 173, 174, // Skip to: 45878
-/* 1161 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1164 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 1182
-/* 1168 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1178
-/* 1174 */ MCD_OPC_Decode, 227, 18, 13, // Opcode: TSTxx_lsr
-/* 1178 */ MCD_OPC_Decode, 130, 1, 11, // Opcode: ANDSxxx_lsr
-/* 1182 */ MCD_OPC_FilterValue, 1, 148, 174, // Skip to: 45878
-/* 1186 */ MCD_OPC_Decode, 209, 1, 11, // Opcode: BICSxxx_lsr
-/* 1190 */ MCD_OPC_FilterValue, 10, 226, 0, // Skip to: 1420
-/* 1194 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 1197 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 1220
-/* 1201 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1204 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1212
-/* 1208 */ MCD_OPC_Decode, 135, 1, 8, // Opcode: ANDwww_asr
-/* 1212 */ MCD_OPC_FilterValue, 1, 118, 174, // Skip to: 45878
-/* 1216 */ MCD_OPC_Decode, 217, 1, 8, // Opcode: BICwww_asr
-/* 1220 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 1253
-/* 1224 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1227 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1235
-/* 1231 */ MCD_OPC_Decode, 205, 11, 8, // Opcode: ORRwww_asr
-/* 1235 */ MCD_OPC_FilterValue, 1, 95, 174, // Skip to: 45878
-/* 1239 */ MCD_OPC_CheckField, 5, 5, 31, 4, 0, // Skip to: 1249
-/* 1245 */ MCD_OPC_Decode, 170, 11, 9, // Opcode: MVNww_asr
-/* 1249 */ MCD_OPC_Decode, 190, 11, 8, // Opcode: ORNwww_asr
-/* 1253 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 1276
-/* 1257 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1260 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1268
-/* 1264 */ MCD_OPC_Decode, 196, 3, 8, // Opcode: EORwww_asr
-/* 1268 */ MCD_OPC_FilterValue, 1, 62, 174, // Skip to: 45878
-/* 1272 */ MCD_OPC_Decode, 185, 3, 8, // Opcode: EONwww_asr
-/* 1276 */ MCD_OPC_FilterValue, 3, 28, 0, // Skip to: 1308
-/* 1280 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1283 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 1300
-/* 1287 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1297
-/* 1293 */ MCD_OPC_Decode, 221, 18, 10, // Opcode: TSTww_asr
-/* 1297 */ MCD_OPC_Decode, 123, 8, // Opcode: ANDSwww_asr
-/* 1300 */ MCD_OPC_FilterValue, 1, 30, 174, // Skip to: 45878
-/* 1304 */ MCD_OPC_Decode, 203, 1, 8, // Opcode: BICSwww_asr
-/* 1308 */ MCD_OPC_FilterValue, 4, 19, 0, // Skip to: 1331
-/* 1312 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1315 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1323
-/* 1319 */ MCD_OPC_Decode, 140, 1, 11, // Opcode: ANDxxx_asr
-/* 1323 */ MCD_OPC_FilterValue, 1, 7, 174, // Skip to: 45878
-/* 1327 */ MCD_OPC_Decode, 221, 1, 11, // Opcode: BICxxx_asr
-/* 1331 */ MCD_OPC_FilterValue, 5, 29, 0, // Skip to: 1364
-/* 1335 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1338 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1346
-/* 1342 */ MCD_OPC_Decode, 210, 11, 11, // Opcode: ORRxxx_asr
-/* 1346 */ MCD_OPC_FilterValue, 1, 240, 173, // Skip to: 45878
-/* 1350 */ MCD_OPC_CheckField, 5, 5, 31, 4, 0, // Skip to: 1360
-/* 1356 */ MCD_OPC_Decode, 174, 11, 12, // Opcode: MVNxx_asr
-/* 1360 */ MCD_OPC_Decode, 194, 11, 11, // Opcode: ORNxxx_asr
-/* 1364 */ MCD_OPC_FilterValue, 6, 19, 0, // Skip to: 1387
-/* 1368 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1371 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1379
-/* 1375 */ MCD_OPC_Decode, 201, 3, 11, // Opcode: EORxxx_asr
-/* 1379 */ MCD_OPC_FilterValue, 1, 207, 173, // Skip to: 45878
-/* 1383 */ MCD_OPC_Decode, 189, 3, 11, // Opcode: EONxxx_asr
-/* 1387 */ MCD_OPC_FilterValue, 7, 199, 173, // Skip to: 45878
-/* 1391 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1394 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 1412
-/* 1398 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1408
-/* 1404 */ MCD_OPC_Decode, 225, 18, 13, // Opcode: TSTxx_asr
-/* 1408 */ MCD_OPC_Decode, 128, 1, 11, // Opcode: ANDSxxx_asr
-/* 1412 */ MCD_OPC_FilterValue, 1, 174, 173, // Skip to: 45878
-/* 1416 */ MCD_OPC_Decode, 207, 1, 11, // Opcode: BICSxxx_asr
-/* 1420 */ MCD_OPC_FilterValue, 11, 226, 0, // Skip to: 1650
-/* 1424 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 1427 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 1450
-/* 1431 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1434 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1442
-/* 1438 */ MCD_OPC_Decode, 138, 1, 8, // Opcode: ANDwww_ror
-/* 1442 */ MCD_OPC_FilterValue, 1, 144, 173, // Skip to: 45878
-/* 1446 */ MCD_OPC_Decode, 220, 1, 8, // Opcode: BICwww_ror
-/* 1450 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 1483
-/* 1454 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1457 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1465
-/* 1461 */ MCD_OPC_Decode, 208, 11, 8, // Opcode: ORRwww_ror
-/* 1465 */ MCD_OPC_FilterValue, 1, 121, 173, // Skip to: 45878
-/* 1469 */ MCD_OPC_CheckField, 5, 5, 31, 4, 0, // Skip to: 1479
-/* 1475 */ MCD_OPC_Decode, 173, 11, 9, // Opcode: MVNww_ror
-/* 1479 */ MCD_OPC_Decode, 193, 11, 8, // Opcode: ORNwww_ror
-/* 1483 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 1506
-/* 1487 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1490 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1498
-/* 1494 */ MCD_OPC_Decode, 199, 3, 8, // Opcode: EORwww_ror
-/* 1498 */ MCD_OPC_FilterValue, 1, 88, 173, // Skip to: 45878
-/* 1502 */ MCD_OPC_Decode, 188, 3, 8, // Opcode: EONwww_ror
-/* 1506 */ MCD_OPC_FilterValue, 3, 28, 0, // Skip to: 1538
-/* 1510 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1513 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 1530
-/* 1517 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1527
-/* 1523 */ MCD_OPC_Decode, 224, 18, 10, // Opcode: TSTww_ror
-/* 1527 */ MCD_OPC_Decode, 126, 8, // Opcode: ANDSwww_ror
-/* 1530 */ MCD_OPC_FilterValue, 1, 56, 173, // Skip to: 45878
-/* 1534 */ MCD_OPC_Decode, 206, 1, 8, // Opcode: BICSwww_ror
-/* 1538 */ MCD_OPC_FilterValue, 4, 19, 0, // Skip to: 1561
-/* 1542 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1545 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1553
-/* 1549 */ MCD_OPC_Decode, 143, 1, 11, // Opcode: ANDxxx_ror
-/* 1553 */ MCD_OPC_FilterValue, 1, 33, 173, // Skip to: 45878
-/* 1557 */ MCD_OPC_Decode, 224, 1, 11, // Opcode: BICxxx_ror
-/* 1561 */ MCD_OPC_FilterValue, 5, 29, 0, // Skip to: 1594
-/* 1565 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1568 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1576
-/* 1572 */ MCD_OPC_Decode, 213, 11, 11, // Opcode: ORRxxx_ror
-/* 1576 */ MCD_OPC_FilterValue, 1, 10, 173, // Skip to: 45878
-/* 1580 */ MCD_OPC_CheckField, 5, 5, 31, 4, 0, // Skip to: 1590
-/* 1586 */ MCD_OPC_Decode, 177, 11, 12, // Opcode: MVNxx_ror
-/* 1590 */ MCD_OPC_Decode, 197, 11, 11, // Opcode: ORNxxx_ror
-/* 1594 */ MCD_OPC_FilterValue, 6, 19, 0, // Skip to: 1617
-/* 1598 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1601 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1609
-/* 1605 */ MCD_OPC_Decode, 204, 3, 11, // Opcode: EORxxx_ror
-/* 1609 */ MCD_OPC_FilterValue, 1, 233, 172, // Skip to: 45878
-/* 1613 */ MCD_OPC_Decode, 192, 3, 11, // Opcode: EONxxx_ror
-/* 1617 */ MCD_OPC_FilterValue, 7, 225, 172, // Skip to: 45878
-/* 1621 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1624 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 1642
-/* 1628 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1638
-/* 1634 */ MCD_OPC_Decode, 228, 18, 13, // Opcode: TSTxx_ror
-/* 1638 */ MCD_OPC_Decode, 131, 1, 11, // Opcode: ANDSxxx_ror
-/* 1642 */ MCD_OPC_FilterValue, 1, 200, 172, // Skip to: 45878
-/* 1646 */ MCD_OPC_Decode, 210, 1, 11, // Opcode: BICSxxx_ror
-/* 1650 */ MCD_OPC_FilterValue, 12, 247, 3, // Skip to: 2669
-/* 1654 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 1657 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 1734
-/* 1661 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1664 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1671
-/* 1668 */ MCD_OPC_Decode, 87, 8, // Opcode: ADDwww_lsl
-/* 1671 */ MCD_OPC_FilterValue, 1, 171, 172, // Skip to: 45878
-/* 1675 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 1678 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 1685
-/* 1682 */ MCD_OPC_Decode, 93, 14, // Opcode: ADDwww_uxtb
-/* 1685 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 1692
-/* 1689 */ MCD_OPC_Decode, 94, 14, // Opcode: ADDwww_uxth
-/* 1692 */ MCD_OPC_FilterValue, 2, 3, 0, // Skip to: 1699
-/* 1696 */ MCD_OPC_Decode, 95, 14, // Opcode: ADDwww_uxtw
-/* 1699 */ MCD_OPC_FilterValue, 3, 3, 0, // Skip to: 1706
-/* 1703 */ MCD_OPC_Decode, 96, 14, // Opcode: ADDwww_uxtx
-/* 1706 */ MCD_OPC_FilterValue, 4, 3, 0, // Skip to: 1713
-/* 1710 */ MCD_OPC_Decode, 89, 14, // Opcode: ADDwww_sxtb
-/* 1713 */ MCD_OPC_FilterValue, 5, 3, 0, // Skip to: 1720
-/* 1717 */ MCD_OPC_Decode, 90, 14, // Opcode: ADDwww_sxth
-/* 1720 */ MCD_OPC_FilterValue, 6, 3, 0, // Skip to: 1727
-/* 1724 */ MCD_OPC_Decode, 91, 14, // Opcode: ADDwww_sxtw
-/* 1727 */ MCD_OPC_FilterValue, 7, 115, 172, // Skip to: 45878
-/* 1731 */ MCD_OPC_Decode, 92, 14, // Opcode: ADDwww_sxtx
-/* 1734 */ MCD_OPC_FilterValue, 1, 163, 0, // Skip to: 1901
-/* 1738 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1741 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 1758
-/* 1745 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1755
-/* 1751 */ MCD_OPC_Decode, 219, 2, 10, // Opcode: CMNww_lsl
-/* 1755 */ MCD_OPC_Decode, 46, 8, // Opcode: ADDSwww_lsl
-/* 1758 */ MCD_OPC_FilterValue, 1, 84, 172, // Skip to: 45878
-/* 1762 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 1765 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 1782
-/* 1769 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1779
-/* 1775 */ MCD_OPC_Decode, 225, 2, 15, // Opcode: CMNww_uxtb
-/* 1779 */ MCD_OPC_Decode, 52, 16, // Opcode: ADDSwww_uxtb
-/* 1782 */ MCD_OPC_FilterValue, 1, 13, 0, // Skip to: 1799
-/* 1786 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1796
-/* 1792 */ MCD_OPC_Decode, 226, 2, 15, // Opcode: CMNww_uxth
-/* 1796 */ MCD_OPC_Decode, 53, 16, // Opcode: ADDSwww_uxth
-/* 1799 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 1816
-/* 1803 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1813
-/* 1809 */ MCD_OPC_Decode, 227, 2, 15, // Opcode: CMNww_uxtw
-/* 1813 */ MCD_OPC_Decode, 54, 16, // Opcode: ADDSwww_uxtw
-/* 1816 */ MCD_OPC_FilterValue, 3, 13, 0, // Skip to: 1833
-/* 1820 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1830
-/* 1826 */ MCD_OPC_Decode, 228, 2, 15, // Opcode: CMNww_uxtx
-/* 1830 */ MCD_OPC_Decode, 55, 16, // Opcode: ADDSwww_uxtx
-/* 1833 */ MCD_OPC_FilterValue, 4, 13, 0, // Skip to: 1850
-/* 1837 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1847
-/* 1843 */ MCD_OPC_Decode, 221, 2, 15, // Opcode: CMNww_sxtb
-/* 1847 */ MCD_OPC_Decode, 48, 16, // Opcode: ADDSwww_sxtb
-/* 1850 */ MCD_OPC_FilterValue, 5, 13, 0, // Skip to: 1867
-/* 1854 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1864
-/* 1860 */ MCD_OPC_Decode, 222, 2, 15, // Opcode: CMNww_sxth
-/* 1864 */ MCD_OPC_Decode, 49, 16, // Opcode: ADDSwww_sxth
-/* 1867 */ MCD_OPC_FilterValue, 6, 13, 0, // Skip to: 1884
-/* 1871 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1881
-/* 1877 */ MCD_OPC_Decode, 223, 2, 15, // Opcode: CMNww_sxtw
-/* 1881 */ MCD_OPC_Decode, 50, 16, // Opcode: ADDSwww_sxtw
-/* 1884 */ MCD_OPC_FilterValue, 7, 214, 171, // Skip to: 45878
-/* 1888 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 1898
-/* 1894 */ MCD_OPC_Decode, 224, 2, 15, // Opcode: CMNww_sxtx
-/* 1898 */ MCD_OPC_Decode, 51, 16, // Opcode: ADDSwww_sxtx
-/* 1901 */ MCD_OPC_FilterValue, 2, 82, 0, // Skip to: 1987
-/* 1905 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1908 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1916
-/* 1912 */ MCD_OPC_Decode, 133, 18, 8, // Opcode: SUBwww_lsl
-/* 1916 */ MCD_OPC_FilterValue, 1, 182, 171, // Skip to: 45878
-/* 1920 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 1923 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1931
-/* 1927 */ MCD_OPC_Decode, 139, 18, 14, // Opcode: SUBwww_uxtb
-/* 1931 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1939
-/* 1935 */ MCD_OPC_Decode, 140, 18, 14, // Opcode: SUBwww_uxth
-/* 1939 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 1947
-/* 1943 */ MCD_OPC_Decode, 141, 18, 14, // Opcode: SUBwww_uxtw
-/* 1947 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 1955
-/* 1951 */ MCD_OPC_Decode, 142, 18, 14, // Opcode: SUBwww_uxtx
-/* 1955 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 1963
-/* 1959 */ MCD_OPC_Decode, 135, 18, 14, // Opcode: SUBwww_sxtb
-/* 1963 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 1971
-/* 1967 */ MCD_OPC_Decode, 136, 18, 14, // Opcode: SUBwww_sxth
-/* 1971 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 1979
-/* 1975 */ MCD_OPC_Decode, 137, 18, 14, // Opcode: SUBwww_sxtw
-/* 1979 */ MCD_OPC_FilterValue, 7, 119, 171, // Skip to: 45878
-/* 1983 */ MCD_OPC_Decode, 138, 18, 14, // Opcode: SUBwww_sxtx
-/* 1987 */ MCD_OPC_FilterValue, 3, 172, 0, // Skip to: 2163
-/* 1991 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 1994 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2012
-/* 1998 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2008
-/* 2004 */ MCD_OPC_Decode, 241, 2, 10, // Opcode: CMPww_lsl
-/* 2008 */ MCD_OPC_Decode, 225, 17, 8, // Opcode: SUBSwww_lsl
-/* 2012 */ MCD_OPC_FilterValue, 1, 86, 171, // Skip to: 45878
-/* 2016 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 2019 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2037
-/* 2023 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2033
-/* 2029 */ MCD_OPC_Decode, 247, 2, 15, // Opcode: CMPww_uxtb
-/* 2033 */ MCD_OPC_Decode, 231, 17, 16, // Opcode: SUBSwww_uxtb
-/* 2037 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 2055
-/* 2041 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2051
-/* 2047 */ MCD_OPC_Decode, 248, 2, 15, // Opcode: CMPww_uxth
-/* 2051 */ MCD_OPC_Decode, 232, 17, 16, // Opcode: SUBSwww_uxth
-/* 2055 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 2073
-/* 2059 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2069
-/* 2065 */ MCD_OPC_Decode, 249, 2, 15, // Opcode: CMPww_uxtw
-/* 2069 */ MCD_OPC_Decode, 233, 17, 16, // Opcode: SUBSwww_uxtw
-/* 2073 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 2091
-/* 2077 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2087
-/* 2083 */ MCD_OPC_Decode, 250, 2, 15, // Opcode: CMPww_uxtx
-/* 2087 */ MCD_OPC_Decode, 234, 17, 16, // Opcode: SUBSwww_uxtx
-/* 2091 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 2109
-/* 2095 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2105
-/* 2101 */ MCD_OPC_Decode, 243, 2, 15, // Opcode: CMPww_sxtb
-/* 2105 */ MCD_OPC_Decode, 227, 17, 16, // Opcode: SUBSwww_sxtb
-/* 2109 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 2127
-/* 2113 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2123
-/* 2119 */ MCD_OPC_Decode, 244, 2, 15, // Opcode: CMPww_sxth
-/* 2123 */ MCD_OPC_Decode, 228, 17, 16, // Opcode: SUBSwww_sxth
-/* 2127 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 2145
-/* 2131 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2141
-/* 2137 */ MCD_OPC_Decode, 245, 2, 15, // Opcode: CMPww_sxtw
-/* 2141 */ MCD_OPC_Decode, 229, 17, 16, // Opcode: SUBSwww_sxtw
-/* 2145 */ MCD_OPC_FilterValue, 7, 209, 170, // Skip to: 45878
-/* 2149 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2159
-/* 2155 */ MCD_OPC_Decode, 246, 2, 15, // Opcode: CMPww_sxtx
-/* 2159 */ MCD_OPC_Decode, 230, 17, 16, // Opcode: SUBSwww_sxtx
-/* 2163 */ MCD_OPC_FilterValue, 4, 73, 0, // Skip to: 2240
-/* 2167 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2170 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 2177
-/* 2174 */ MCD_OPC_Decode, 110, 11, // Opcode: ADDxxx_lsl
-/* 2177 */ MCD_OPC_FilterValue, 1, 177, 170, // Skip to: 45878
-/* 2181 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 2184 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 2191
-/* 2188 */ MCD_OPC_Decode, 106, 17, // Opcode: ADDxxw_uxtb
-/* 2191 */ MCD_OPC_FilterValue, 1, 3, 0, // Skip to: 2198
-/* 2195 */ MCD_OPC_Decode, 107, 17, // Opcode: ADDxxw_uxth
-/* 2198 */ MCD_OPC_FilterValue, 2, 3, 0, // Skip to: 2205
-/* 2202 */ MCD_OPC_Decode, 108, 17, // Opcode: ADDxxw_uxtw
-/* 2205 */ MCD_OPC_FilterValue, 3, 3, 0, // Skip to: 2212
-/* 2209 */ MCD_OPC_Decode, 113, 18, // Opcode: ADDxxx_uxtx
-/* 2212 */ MCD_OPC_FilterValue, 4, 3, 0, // Skip to: 2219
-/* 2216 */ MCD_OPC_Decode, 103, 17, // Opcode: ADDxxw_sxtb
-/* 2219 */ MCD_OPC_FilterValue, 5, 3, 0, // Skip to: 2226
-/* 2223 */ MCD_OPC_Decode, 104, 17, // Opcode: ADDxxw_sxth
-/* 2226 */ MCD_OPC_FilterValue, 6, 3, 0, // Skip to: 2233
-/* 2230 */ MCD_OPC_Decode, 105, 17, // Opcode: ADDxxw_sxtw
-/* 2233 */ MCD_OPC_FilterValue, 7, 121, 170, // Skip to: 45878
-/* 2237 */ MCD_OPC_Decode, 112, 18, // Opcode: ADDxxx_sxtx
-/* 2240 */ MCD_OPC_FilterValue, 5, 163, 0, // Skip to: 2407
-/* 2244 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2247 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 2264
-/* 2251 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2261
-/* 2257 */ MCD_OPC_Decode, 236, 2, 13, // Opcode: CMNxx_lsl
-/* 2261 */ MCD_OPC_Decode, 63, 11, // Opcode: ADDSxxx_lsl
-/* 2264 */ MCD_OPC_FilterValue, 1, 90, 170, // Skip to: 45878
-/* 2268 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 2271 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 2288
-/* 2275 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2285
-/* 2281 */ MCD_OPC_Decode, 232, 2, 19, // Opcode: CMNxw_uxtb
-/* 2285 */ MCD_OPC_Decode, 59, 20, // Opcode: ADDSxxw_uxtb
-/* 2288 */ MCD_OPC_FilterValue, 1, 13, 0, // Skip to: 2305
-/* 2292 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2302
-/* 2298 */ MCD_OPC_Decode, 233, 2, 19, // Opcode: CMNxw_uxth
-/* 2302 */ MCD_OPC_Decode, 60, 20, // Opcode: ADDSxxw_uxth
-/* 2305 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 2322
-/* 2309 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2319
-/* 2315 */ MCD_OPC_Decode, 234, 2, 19, // Opcode: CMNxw_uxtw
-/* 2319 */ MCD_OPC_Decode, 61, 20, // Opcode: ADDSxxw_uxtw
-/* 2322 */ MCD_OPC_FilterValue, 3, 13, 0, // Skip to: 2339
-/* 2326 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2336
-/* 2332 */ MCD_OPC_Decode, 239, 2, 21, // Opcode: CMNxx_uxtx
-/* 2336 */ MCD_OPC_Decode, 66, 22, // Opcode: ADDSxxx_uxtx
-/* 2339 */ MCD_OPC_FilterValue, 4, 13, 0, // Skip to: 2356
-/* 2343 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2353
-/* 2349 */ MCD_OPC_Decode, 229, 2, 19, // Opcode: CMNxw_sxtb
-/* 2353 */ MCD_OPC_Decode, 56, 20, // Opcode: ADDSxxw_sxtb
-/* 2356 */ MCD_OPC_FilterValue, 5, 13, 0, // Skip to: 2373
-/* 2360 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2370
-/* 2366 */ MCD_OPC_Decode, 230, 2, 19, // Opcode: CMNxw_sxth
-/* 2370 */ MCD_OPC_Decode, 57, 20, // Opcode: ADDSxxw_sxth
-/* 2373 */ MCD_OPC_FilterValue, 6, 13, 0, // Skip to: 2390
-/* 2377 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2387
-/* 2383 */ MCD_OPC_Decode, 231, 2, 19, // Opcode: CMNxw_sxtw
-/* 2387 */ MCD_OPC_Decode, 58, 20, // Opcode: ADDSxxw_sxtw
-/* 2390 */ MCD_OPC_FilterValue, 7, 220, 169, // Skip to: 45878
-/* 2394 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2404
-/* 2400 */ MCD_OPC_Decode, 238, 2, 21, // Opcode: CMNxx_sxtx
-/* 2404 */ MCD_OPC_Decode, 65, 22, // Opcode: ADDSxxx_sxtx
-/* 2407 */ MCD_OPC_FilterValue, 6, 82, 0, // Skip to: 2493
-/* 2411 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2414 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2422
-/* 2418 */ MCD_OPC_Decode, 156, 18, 11, // Opcode: SUBxxx_lsl
-/* 2422 */ MCD_OPC_FilterValue, 1, 188, 169, // Skip to: 45878
-/* 2426 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 2429 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 2437
-/* 2433 */ MCD_OPC_Decode, 152, 18, 17, // Opcode: SUBxxw_uxtb
-/* 2437 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 2445
-/* 2441 */ MCD_OPC_Decode, 153, 18, 17, // Opcode: SUBxxw_uxth
-/* 2445 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 2453
-/* 2449 */ MCD_OPC_Decode, 154, 18, 17, // Opcode: SUBxxw_uxtw
-/* 2453 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 2461
-/* 2457 */ MCD_OPC_Decode, 159, 18, 18, // Opcode: SUBxxx_uxtx
-/* 2461 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 2469
-/* 2465 */ MCD_OPC_Decode, 149, 18, 17, // Opcode: SUBxxw_sxtb
-/* 2469 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 2477
-/* 2473 */ MCD_OPC_Decode, 150, 18, 17, // Opcode: SUBxxw_sxth
-/* 2477 */ MCD_OPC_FilterValue, 6, 4, 0, // Skip to: 2485
-/* 2481 */ MCD_OPC_Decode, 151, 18, 17, // Opcode: SUBxxw_sxtw
-/* 2485 */ MCD_OPC_FilterValue, 7, 125, 169, // Skip to: 45878
-/* 2489 */ MCD_OPC_Decode, 158, 18, 18, // Opcode: SUBxxx_sxtx
-/* 2493 */ MCD_OPC_FilterValue, 7, 117, 169, // Skip to: 45878
-/* 2497 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 3 */ MCD_OPC_FilterValue, 2, 86, 4, // Skip to: 1117
+/* 7 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 10 */ MCD_OPC_FilterValue, 0, 132, 0, // Skip to: 146
+/* 14 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 17 */ MCD_OPC_FilterValue, 0, 77, 0, // Skip to: 98
+/* 21 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 24 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 47
+/* 28 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 31 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 39
+/* 35 */ MCD_OPC_Decode, 145, 15, 0, // Opcode: STXRB
+/* 39 */ MCD_OPC_FilterValue, 1, 178, 158, // Skip to: 40669
+/* 43 */ MCD_OPC_Decode, 189, 14, 0, // Opcode: STLXRB
+/* 47 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 70
+/* 51 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 54 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 62
+/* 58 */ MCD_OPC_Decode, 169, 8, 0, // Opcode: LDXRB
+/* 62 */ MCD_OPC_FilterValue, 1, 155, 158, // Skip to: 40669
+/* 66 */ MCD_OPC_Decode, 169, 7, 0, // Opcode: LDAXRB
+/* 70 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 84
+/* 74 */ MCD_OPC_CheckField, 15, 1, 1, 141, 158, // Skip to: 40669
+/* 80 */ MCD_OPC_Decode, 183, 14, 0, // Opcode: STLRB
+/* 84 */ MCD_OPC_FilterValue, 6, 133, 158, // Skip to: 40669
+/* 88 */ MCD_OPC_CheckField, 15, 1, 1, 127, 158, // Skip to: 40669
+/* 94 */ MCD_OPC_Decode, 163, 7, 0, // Opcode: LDARB
+/* 98 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 119
+/* 102 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 105 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 112
+/* 109 */ MCD_OPC_Decode, 93, 1, // Opcode: ANDWrs
+/* 112 */ MCD_OPC_FilterValue, 1, 105, 158, // Skip to: 40669
+/* 116 */ MCD_OPC_Decode, 109, 1, // Opcode: BICWrs
+/* 119 */ MCD_OPC_FilterValue, 3, 98, 158, // Skip to: 40669
+/* 123 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 126 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 133
+/* 130 */ MCD_OPC_Decode, 62, 1, // Opcode: ADDWrs
+/* 133 */ MCD_OPC_FilterValue, 1, 84, 158, // Skip to: 40669
+/* 137 */ MCD_OPC_CheckField, 22, 2, 0, 78, 158, // Skip to: 40669
+/* 143 */ MCD_OPC_Decode, 63, 2, // Opcode: ADDWrx
+/* 146 */ MCD_OPC_FilterValue, 1, 131, 0, // Skip to: 281
+/* 150 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 153 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 192
+/* 157 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 160 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 168
+/* 164 */ MCD_OPC_Decode, 196, 14, 3, // Opcode: STNPWi
+/* 168 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 176
+/* 172 */ MCD_OPC_Decode, 176, 7, 3, // Opcode: LDNPWi
+/* 176 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 184
+/* 180 */ MCD_OPC_Decode, 208, 14, 3, // Opcode: STPWpost
+/* 184 */ MCD_OPC_FilterValue, 3, 33, 158, // Skip to: 40669
+/* 188 */ MCD_OPC_Decode, 191, 7, 3, // Opcode: LDPWpost
+/* 192 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 231
+/* 196 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 199 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 207
+/* 203 */ MCD_OPC_Decode, 207, 14, 3, // Opcode: STPWi
+/* 207 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 215
+/* 211 */ MCD_OPC_Decode, 190, 7, 3, // Opcode: LDPWi
+/* 215 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 223
+/* 219 */ MCD_OPC_Decode, 209, 14, 3, // Opcode: STPWpre
+/* 223 */ MCD_OPC_FilterValue, 3, 250, 157, // Skip to: 40669
+/* 227 */ MCD_OPC_Decode, 192, 7, 3, // Opcode: LDPWpre
+/* 231 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 254
+/* 235 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 238 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 246
+/* 242 */ MCD_OPC_Decode, 135, 9, 1, // Opcode: ORRWrs
+/* 246 */ MCD_OPC_FilterValue, 1, 227, 157, // Skip to: 40669
+/* 250 */ MCD_OPC_Decode, 128, 9, 1, // Opcode: ORNWrs
+/* 254 */ MCD_OPC_FilterValue, 3, 219, 157, // Skip to: 40669
+/* 258 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 261 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 268
+/* 265 */ MCD_OPC_Decode, 48, 1, // Opcode: ADDSWrs
+/* 268 */ MCD_OPC_FilterValue, 1, 205, 157, // Skip to: 40669
+/* 272 */ MCD_OPC_CheckField, 22, 2, 0, 199, 157, // Skip to: 40669
+/* 278 */ MCD_OPC_Decode, 49, 2, // Opcode: ADDSWrx
+/* 281 */ MCD_OPC_FilterValue, 2, 136, 0, // Skip to: 421
+/* 285 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 288 */ MCD_OPC_FilterValue, 0, 77, 0, // Skip to: 369
+/* 292 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 295 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 318
+/* 299 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 302 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 310
+/* 306 */ MCD_OPC_Decode, 146, 15, 0, // Opcode: STXRH
+/* 310 */ MCD_OPC_FilterValue, 1, 163, 157, // Skip to: 40669
+/* 314 */ MCD_OPC_Decode, 190, 14, 0, // Opcode: STLXRH
+/* 318 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 341
+/* 322 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 325 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 333
+/* 329 */ MCD_OPC_Decode, 170, 8, 0, // Opcode: LDXRH
+/* 333 */ MCD_OPC_FilterValue, 1, 140, 157, // Skip to: 40669
+/* 337 */ MCD_OPC_Decode, 170, 7, 0, // Opcode: LDAXRH
+/* 341 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 355
+/* 345 */ MCD_OPC_CheckField, 15, 1, 1, 126, 157, // Skip to: 40669
+/* 351 */ MCD_OPC_Decode, 184, 14, 0, // Opcode: STLRH
+/* 355 */ MCD_OPC_FilterValue, 6, 118, 157, // Skip to: 40669
+/* 359 */ MCD_OPC_CheckField, 15, 1, 1, 112, 157, // Skip to: 40669
+/* 365 */ MCD_OPC_Decode, 164, 7, 0, // Opcode: LDARH
+/* 369 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 392
+/* 373 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 376 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 384
+/* 380 */ MCD_OPC_Decode, 166, 2, 1, // Opcode: EORWrs
+/* 384 */ MCD_OPC_FilterValue, 1, 89, 157, // Skip to: 40669
+/* 388 */ MCD_OPC_Decode, 161, 2, 1, // Opcode: EONWrs
+/* 392 */ MCD_OPC_FilterValue, 3, 81, 157, // Skip to: 40669
+/* 396 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 399 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 407
+/* 403 */ MCD_OPC_Decode, 166, 15, 1, // Opcode: SUBWrs
+/* 407 */ MCD_OPC_FilterValue, 1, 66, 157, // Skip to: 40669
+/* 411 */ MCD_OPC_CheckField, 22, 2, 0, 60, 157, // Skip to: 40669
+/* 417 */ MCD_OPC_Decode, 167, 15, 2, // Opcode: SUBWrx
+/* 421 */ MCD_OPC_FilterValue, 3, 90, 0, // Skip to: 515
+/* 425 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 428 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 442
+/* 432 */ MCD_OPC_CheckField, 22, 2, 3, 39, 157, // Skip to: 40669
+/* 438 */ MCD_OPC_Decode, 185, 7, 3, // Opcode: LDPSWpost
+/* 442 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 465
+/* 446 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 449 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 457
+/* 453 */ MCD_OPC_Decode, 184, 7, 3, // Opcode: LDPSWi
+/* 457 */ MCD_OPC_FilterValue, 3, 16, 157, // Skip to: 40669
+/* 461 */ MCD_OPC_Decode, 186, 7, 3, // Opcode: LDPSWpre
+/* 465 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 486
+/* 469 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 472 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 479
+/* 476 */ MCD_OPC_Decode, 87, 1, // Opcode: ANDSWrs
+/* 479 */ MCD_OPC_FilterValue, 1, 250, 156, // Skip to: 40669
+/* 483 */ MCD_OPC_Decode, 105, 1, // Opcode: BICSWrs
+/* 486 */ MCD_OPC_FilterValue, 3, 243, 156, // Skip to: 40669
+/* 490 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 493 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 501
+/* 497 */ MCD_OPC_Decode, 157, 15, 1, // Opcode: SUBSWrs
+/* 501 */ MCD_OPC_FilterValue, 1, 228, 156, // Skip to: 40669
+/* 505 */ MCD_OPC_CheckField, 22, 2, 0, 222, 156, // Skip to: 40669
+/* 511 */ MCD_OPC_Decode, 158, 15, 2, // Opcode: SUBSWrx
+/* 515 */ MCD_OPC_FilterValue, 4, 188, 0, // Skip to: 707
+/* 519 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 522 */ MCD_OPC_FilterValue, 0, 123, 0, // Skip to: 649
+/* 526 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 529 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 552
+/* 533 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 536 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 544
+/* 540 */ MCD_OPC_Decode, 147, 15, 0, // Opcode: STXRW
+/* 544 */ MCD_OPC_FilterValue, 1, 185, 156, // Skip to: 40669
+/* 548 */ MCD_OPC_Decode, 191, 14, 0, // Opcode: STLXRW
+/* 552 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 575
+/* 556 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 559 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 567
+/* 563 */ MCD_OPC_Decode, 143, 15, 0, // Opcode: STXPW
+/* 567 */ MCD_OPC_FilterValue, 1, 162, 156, // Skip to: 40669
+/* 571 */ MCD_OPC_Decode, 187, 14, 0, // Opcode: STLXPW
+/* 575 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 598
+/* 579 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 582 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 590
+/* 586 */ MCD_OPC_Decode, 171, 8, 0, // Opcode: LDXRW
+/* 590 */ MCD_OPC_FilterValue, 1, 139, 156, // Skip to: 40669
+/* 594 */ MCD_OPC_Decode, 171, 7, 0, // Opcode: LDAXRW
+/* 598 */ MCD_OPC_FilterValue, 3, 19, 0, // Skip to: 621
+/* 602 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 605 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 613
+/* 609 */ MCD_OPC_Decode, 167, 8, 0, // Opcode: LDXPW
+/* 613 */ MCD_OPC_FilterValue, 1, 116, 156, // Skip to: 40669
+/* 617 */ MCD_OPC_Decode, 167, 7, 0, // Opcode: LDAXPW
+/* 621 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 635
+/* 625 */ MCD_OPC_CheckField, 15, 1, 1, 102, 156, // Skip to: 40669
+/* 631 */ MCD_OPC_Decode, 185, 14, 0, // Opcode: STLRW
+/* 635 */ MCD_OPC_FilterValue, 6, 94, 156, // Skip to: 40669
+/* 639 */ MCD_OPC_CheckField, 15, 1, 1, 88, 156, // Skip to: 40669
+/* 645 */ MCD_OPC_Decode, 165, 7, 0, // Opcode: LDARW
+/* 649 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 670
+/* 653 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 656 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 663
+/* 660 */ MCD_OPC_Decode, 96, 1, // Opcode: ANDXrs
+/* 663 */ MCD_OPC_FilterValue, 1, 66, 156, // Skip to: 40669
+/* 667 */ MCD_OPC_Decode, 111, 1, // Opcode: BICXrs
+/* 670 */ MCD_OPC_FilterValue, 3, 59, 156, // Skip to: 40669
+/* 674 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 677 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 684
+/* 681 */ MCD_OPC_Decode, 66, 1, // Opcode: ADDXrs
+/* 684 */ MCD_OPC_FilterValue, 1, 45, 156, // Skip to: 40669
+/* 688 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 691 */ MCD_OPC_FilterValue, 0, 38, 156, // Skip to: 40669
+/* 695 */ MCD_OPC_CheckField, 13, 2, 3, 3, 0, // Skip to: 704
+/* 701 */ MCD_OPC_Decode, 68, 2, // Opcode: ADDXrx64
+/* 704 */ MCD_OPC_Decode, 67, 2, // Opcode: ADDXrx
+/* 707 */ MCD_OPC_FilterValue, 5, 141, 0, // Skip to: 852
+/* 711 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 714 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 753
+/* 718 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 721 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 729
+/* 725 */ MCD_OPC_Decode, 197, 14, 3, // Opcode: STNPXi
+/* 729 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 737
+/* 733 */ MCD_OPC_Decode, 177, 7, 3, // Opcode: LDNPXi
+/* 737 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 745
+/* 741 */ MCD_OPC_Decode, 211, 14, 3, // Opcode: STPXpost
+/* 745 */ MCD_OPC_FilterValue, 3, 240, 155, // Skip to: 40669
+/* 749 */ MCD_OPC_Decode, 194, 7, 3, // Opcode: LDPXpost
+/* 753 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 792
+/* 757 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 760 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 768
+/* 764 */ MCD_OPC_Decode, 210, 14, 3, // Opcode: STPXi
+/* 768 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 776
+/* 772 */ MCD_OPC_Decode, 193, 7, 3, // Opcode: LDPXi
+/* 776 */ MCD_OPC_FilterValue, 2, 4, 0, // Skip to: 784
+/* 780 */ MCD_OPC_Decode, 212, 14, 3, // Opcode: STPXpre
+/* 784 */ MCD_OPC_FilterValue, 3, 201, 155, // Skip to: 40669
+/* 788 */ MCD_OPC_Decode, 195, 7, 3, // Opcode: LDPXpre
+/* 792 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 815
+/* 796 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 799 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 807
+/* 803 */ MCD_OPC_Decode, 138, 9, 1, // Opcode: ORRXrs
+/* 807 */ MCD_OPC_FilterValue, 1, 178, 155, // Skip to: 40669
+/* 811 */ MCD_OPC_Decode, 130, 9, 1, // Opcode: ORNXrs
+/* 815 */ MCD_OPC_FilterValue, 3, 170, 155, // Skip to: 40669
+/* 819 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 822 */ MCD_OPC_FilterValue, 0, 3, 0, // Skip to: 829
+/* 826 */ MCD_OPC_Decode, 52, 1, // Opcode: ADDSXrs
+/* 829 */ MCD_OPC_FilterValue, 1, 156, 155, // Skip to: 40669
+/* 833 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 836 */ MCD_OPC_FilterValue, 0, 149, 155, // Skip to: 40669
+/* 840 */ MCD_OPC_CheckField, 13, 2, 3, 3, 0, // Skip to: 849
+/* 846 */ MCD_OPC_Decode, 54, 2, // Opcode: ADDSXrx64
+/* 849 */ MCD_OPC_Decode, 53, 2, // Opcode: ADDSXrx
+/* 852 */ MCD_OPC_FilterValue, 6, 193, 0, // Skip to: 1049
+/* 856 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 859 */ MCD_OPC_FilterValue, 0, 123, 0, // Skip to: 986
+/* 863 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 866 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 889
+/* 870 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 873 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 881
+/* 877 */ MCD_OPC_Decode, 148, 15, 0, // Opcode: STXRX
+/* 881 */ MCD_OPC_FilterValue, 1, 104, 155, // Skip to: 40669
+/* 885 */ MCD_OPC_Decode, 192, 14, 0, // Opcode: STLXRX
+/* 889 */ MCD_OPC_FilterValue, 1, 19, 0, // Skip to: 912
+/* 893 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 896 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 904
+/* 900 */ MCD_OPC_Decode, 144, 15, 0, // Opcode: STXPX
+/* 904 */ MCD_OPC_FilterValue, 1, 81, 155, // Skip to: 40669
+/* 908 */ MCD_OPC_Decode, 188, 14, 0, // Opcode: STLXPX
+/* 912 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 935
+/* 916 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 919 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 927
+/* 923 */ MCD_OPC_Decode, 172, 8, 0, // Opcode: LDXRX
+/* 927 */ MCD_OPC_FilterValue, 1, 58, 155, // Skip to: 40669
+/* 931 */ MCD_OPC_Decode, 172, 7, 0, // Opcode: LDAXRX
+/* 935 */ MCD_OPC_FilterValue, 3, 19, 0, // Skip to: 958
+/* 939 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 942 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 950
+/* 946 */ MCD_OPC_Decode, 168, 8, 0, // Opcode: LDXPX
+/* 950 */ MCD_OPC_FilterValue, 1, 35, 155, // Skip to: 40669
+/* 954 */ MCD_OPC_Decode, 168, 7, 0, // Opcode: LDAXPX
+/* 958 */ MCD_OPC_FilterValue, 4, 10, 0, // Skip to: 972
+/* 962 */ MCD_OPC_CheckField, 15, 1, 1, 21, 155, // Skip to: 40669
+/* 968 */ MCD_OPC_Decode, 186, 14, 0, // Opcode: STLRX
+/* 972 */ MCD_OPC_FilterValue, 6, 13, 155, // Skip to: 40669
+/* 976 */ MCD_OPC_CheckField, 15, 1, 1, 7, 155, // Skip to: 40669
+/* 982 */ MCD_OPC_Decode, 166, 7, 0, // Opcode: LDARX
+/* 986 */ MCD_OPC_FilterValue, 2, 19, 0, // Skip to: 1009
+/* 990 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 993 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1001
+/* 997 */ MCD_OPC_Decode, 169, 2, 1, // Opcode: EORXrs
+/* 1001 */ MCD_OPC_FilterValue, 1, 240, 154, // Skip to: 40669
+/* 1005 */ MCD_OPC_Decode, 163, 2, 1, // Opcode: EONXrs
+/* 1009 */ MCD_OPC_FilterValue, 3, 232, 154, // Skip to: 40669
+/* 1013 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 1016 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 1024
+/* 1020 */ MCD_OPC_Decode, 170, 15, 1, // Opcode: SUBXrs
+/* 1024 */ MCD_OPC_FilterValue, 1, 217, 154, // Skip to: 40669
+/* 1028 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 1031 */ MCD_OPC_FilterValue, 0, 210, 154, // Skip to: 40669
+/* 1035 */ MCD_OPC_CheckField, 13, 2, 3, 4, 0, // Skip to: 1045
+/* 1041 */ MCD_OPC_Decode, 172, 15, 2, // Opcode: SUBXrx64
+/* 1045 */ MCD_OPC_Decode, 171, 15, 2, // Opcode: SUBXrx
+/* 1049 */ MCD_OPC_FilterValue, 7, 192, 154, // Skip to: 40669
+/* 1053 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 1056 */ MCD_OPC_FilterValue, 0, 18, 0, // Skip to: 1078
+/* 1060 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 1063 */ MCD_OPC_FilterValue, 2, 3, 0, // Skip to: 1070
+/* 1067 */ MCD_OPC_Decode, 90, 1, // Opcode: ANDSXrs
+/* 1070 */ MCD_OPC_FilterValue, 3, 171, 154, // Skip to: 40669
+/* 1074 */ MCD_OPC_Decode, 161, 15, 1, // Opcode: SUBSXrs
+/* 1078 */ MCD_OPC_FilterValue, 1, 163, 154, // Skip to: 40669
+/* 1082 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 1085 */ MCD_OPC_FilterValue, 2, 3, 0, // Skip to: 1092
+/* 1089 */ MCD_OPC_Decode, 107, 1, // Opcode: BICSXrs
+/* 1092 */ MCD_OPC_FilterValue, 3, 149, 154, // Skip to: 40669
+/* 1096 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 1099 */ MCD_OPC_FilterValue, 0, 142, 154, // Skip to: 40669
+/* 1103 */ MCD_OPC_CheckField, 13, 2, 3, 4, 0, // Skip to: 1113
+/* 1109 */ MCD_OPC_Decode, 163, 15, 2, // Opcode: SUBSXrx64
+/* 1113 */ MCD_OPC_Decode, 162, 15, 2, // Opcode: SUBSXrx
+/* 1117 */ MCD_OPC_FilterValue, 3, 234, 110, // Skip to: 29515
+/* 1121 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
+/* 1124 */ MCD_OPC_FilterValue, 0, 165, 2, // Skip to: 1805
+/* 1128 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 1131 */ MCD_OPC_FilterValue, 0, 47, 1, // Skip to: 1438
+/* 1135 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
+/* 1138 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1150
+/* 1142 */ MCD_OPC_CheckPredicate, 0, 99, 154, // Skip to: 40669
+/* 1146 */ MCD_OPC_Decode, 171, 14, 4, // Opcode: ST4Fourv8b
+/* 1150 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1162
+/* 1154 */ MCD_OPC_CheckPredicate, 0, 87, 154, // Skip to: 40669
+/* 1158 */ MCD_OPC_Decode, 167, 14, 4, // Opcode: ST4Fourv4h
+/* 1162 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1174
+/* 1166 */ MCD_OPC_CheckPredicate, 0, 75, 154, // Skip to: 40669
+/* 1170 */ MCD_OPC_Decode, 165, 14, 4, // Opcode: ST4Fourv2s
+/* 1174 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1186
+/* 1178 */ MCD_OPC_CheckPredicate, 0, 63, 154, // Skip to: 40669
+/* 1182 */ MCD_OPC_Decode, 185, 13, 4, // Opcode: ST1Fourv8b
+/* 1186 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1198
+/* 1190 */ MCD_OPC_CheckPredicate, 0, 51, 154, // Skip to: 40669
+/* 1194 */ MCD_OPC_Decode, 181, 13, 4, // Opcode: ST1Fourv4h
+/* 1198 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1210
+/* 1202 */ MCD_OPC_CheckPredicate, 0, 39, 154, // Skip to: 40669
+/* 1206 */ MCD_OPC_Decode, 179, 13, 4, // Opcode: ST1Fourv2s
+/* 1210 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1222
+/* 1214 */ MCD_OPC_CheckPredicate, 0, 27, 154, // Skip to: 40669
+/* 1218 */ MCD_OPC_Decode, 175, 13, 4, // Opcode: ST1Fourv1d
+/* 1222 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 1234
+/* 1226 */ MCD_OPC_CheckPredicate, 0, 15, 154, // Skip to: 40669
+/* 1230 */ MCD_OPC_Decode, 149, 14, 5, // Opcode: ST3Threev8b
+/* 1234 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 1246
+/* 1238 */ MCD_OPC_CheckPredicate, 0, 3, 154, // Skip to: 40669
+/* 1242 */ MCD_OPC_Decode, 145, 14, 5, // Opcode: ST3Threev4h
+/* 1246 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 1258
+/* 1250 */ MCD_OPC_CheckPredicate, 0, 247, 153, // Skip to: 40669
+/* 1254 */ MCD_OPC_Decode, 143, 14, 5, // Opcode: ST3Threev2s
+/* 1258 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 1270
+/* 1262 */ MCD_OPC_CheckPredicate, 0, 235, 153, // Skip to: 40669
+/* 1266 */ MCD_OPC_Decode, 217, 13, 5, // Opcode: ST1Threev8b
+/* 1270 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 1282
+/* 1274 */ MCD_OPC_CheckPredicate, 0, 223, 153, // Skip to: 40669
+/* 1278 */ MCD_OPC_Decode, 213, 13, 5, // Opcode: ST1Threev4h
+/* 1282 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 1294
+/* 1286 */ MCD_OPC_CheckPredicate, 0, 211, 153, // Skip to: 40669
+/* 1290 */ MCD_OPC_Decode, 211, 13, 5, // Opcode: ST1Threev2s
+/* 1294 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 1306
+/* 1298 */ MCD_OPC_CheckPredicate, 0, 199, 153, // Skip to: 40669
+/* 1302 */ MCD_OPC_Decode, 207, 13, 5, // Opcode: ST1Threev1d
+/* 1306 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 1318
+/* 1310 */ MCD_OPC_CheckPredicate, 0, 187, 153, // Skip to: 40669
+/* 1314 */ MCD_OPC_Decode, 201, 13, 6, // Opcode: ST1Onev8b
+/* 1318 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 1330
+/* 1322 */ MCD_OPC_CheckPredicate, 0, 175, 153, // Skip to: 40669
+/* 1326 */ MCD_OPC_Decode, 197, 13, 6, // Opcode: ST1Onev4h
+/* 1330 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 1342
+/* 1334 */ MCD_OPC_CheckPredicate, 0, 163, 153, // Skip to: 40669
+/* 1338 */ MCD_OPC_Decode, 195, 13, 6, // Opcode: ST1Onev2s
+/* 1342 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 1354
+/* 1346 */ MCD_OPC_CheckPredicate, 0, 151, 153, // Skip to: 40669
+/* 1350 */ MCD_OPC_Decode, 191, 13, 6, // Opcode: ST1Onev1d
+/* 1354 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 1366
+/* 1358 */ MCD_OPC_CheckPredicate, 0, 139, 153, // Skip to: 40669
+/* 1362 */ MCD_OPC_Decode, 255, 13, 7, // Opcode: ST2Twov8b
+/* 1366 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 1378
+/* 1370 */ MCD_OPC_CheckPredicate, 0, 127, 153, // Skip to: 40669
+/* 1374 */ MCD_OPC_Decode, 251, 13, 7, // Opcode: ST2Twov4h
+/* 1378 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 1390
+/* 1382 */ MCD_OPC_CheckPredicate, 0, 115, 153, // Skip to: 40669
+/* 1386 */ MCD_OPC_Decode, 249, 13, 7, // Opcode: ST2Twov2s
+/* 1390 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 1402
+/* 1394 */ MCD_OPC_CheckPredicate, 0, 103, 153, // Skip to: 40669
+/* 1398 */ MCD_OPC_Decode, 233, 13, 7, // Opcode: ST1Twov8b
+/* 1402 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 1414
+/* 1406 */ MCD_OPC_CheckPredicate, 0, 91, 153, // Skip to: 40669
+/* 1410 */ MCD_OPC_Decode, 229, 13, 7, // Opcode: ST1Twov4h
+/* 1414 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 1426
+/* 1418 */ MCD_OPC_CheckPredicate, 0, 79, 153, // Skip to: 40669
+/* 1422 */ MCD_OPC_Decode, 227, 13, 7, // Opcode: ST1Twov2s
+/* 1426 */ MCD_OPC_FilterValue, 43, 71, 153, // Skip to: 40669
+/* 1430 */ MCD_OPC_CheckPredicate, 0, 67, 153, // Skip to: 40669
+/* 1434 */ MCD_OPC_Decode, 223, 13, 7, // Opcode: ST1Twov1d
+/* 1438 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 1446
+/* 1442 */ MCD_OPC_Decode, 195, 14, 3, // Opcode: STNPSi
+/* 1446 */ MCD_OPC_FilterValue, 2, 83, 1, // Skip to: 1789
+/* 1450 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
+/* 1453 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1465
+/* 1457 */ MCD_OPC_CheckPredicate, 0, 40, 153, // Skip to: 40669
+/* 1461 */ MCD_OPC_Decode, 161, 14, 8, // Opcode: ST4Fourv16b
+/* 1465 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1477
+/* 1469 */ MCD_OPC_CheckPredicate, 0, 28, 153, // Skip to: 40669
+/* 1473 */ MCD_OPC_Decode, 173, 14, 8, // Opcode: ST4Fourv8h
+/* 1477 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1489
+/* 1481 */ MCD_OPC_CheckPredicate, 0, 16, 153, // Skip to: 40669
+/* 1485 */ MCD_OPC_Decode, 169, 14, 8, // Opcode: ST4Fourv4s
+/* 1489 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 1501
+/* 1493 */ MCD_OPC_CheckPredicate, 0, 4, 153, // Skip to: 40669
+/* 1497 */ MCD_OPC_Decode, 163, 14, 8, // Opcode: ST4Fourv2d
+/* 1501 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1513
+/* 1505 */ MCD_OPC_CheckPredicate, 0, 248, 152, // Skip to: 40669
+/* 1509 */ MCD_OPC_Decode, 173, 13, 8, // Opcode: ST1Fourv16b
+/* 1513 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1525
+/* 1517 */ MCD_OPC_CheckPredicate, 0, 236, 152, // Skip to: 40669
+/* 1521 */ MCD_OPC_Decode, 187, 13, 8, // Opcode: ST1Fourv8h
+/* 1525 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1537
+/* 1529 */ MCD_OPC_CheckPredicate, 0, 224, 152, // Skip to: 40669
+/* 1533 */ MCD_OPC_Decode, 183, 13, 8, // Opcode: ST1Fourv4s
+/* 1537 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1549
+/* 1541 */ MCD_OPC_CheckPredicate, 0, 212, 152, // Skip to: 40669
+/* 1545 */ MCD_OPC_Decode, 177, 13, 8, // Opcode: ST1Fourv2d
+/* 1549 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 1561
+/* 1553 */ MCD_OPC_CheckPredicate, 0, 200, 152, // Skip to: 40669
+/* 1557 */ MCD_OPC_Decode, 139, 14, 9, // Opcode: ST3Threev16b
+/* 1561 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 1573
+/* 1565 */ MCD_OPC_CheckPredicate, 0, 188, 152, // Skip to: 40669
+/* 1569 */ MCD_OPC_Decode, 151, 14, 9, // Opcode: ST3Threev8h
+/* 1573 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 1585
+/* 1577 */ MCD_OPC_CheckPredicate, 0, 176, 152, // Skip to: 40669
+/* 1581 */ MCD_OPC_Decode, 147, 14, 9, // Opcode: ST3Threev4s
+/* 1585 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 1597
+/* 1589 */ MCD_OPC_CheckPredicate, 0, 164, 152, // Skip to: 40669
+/* 1593 */ MCD_OPC_Decode, 141, 14, 9, // Opcode: ST3Threev2d
+/* 1597 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 1609
+/* 1601 */ MCD_OPC_CheckPredicate, 0, 152, 152, // Skip to: 40669
+/* 1605 */ MCD_OPC_Decode, 205, 13, 9, // Opcode: ST1Threev16b
+/* 1609 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 1621
+/* 1613 */ MCD_OPC_CheckPredicate, 0, 140, 152, // Skip to: 40669
+/* 1617 */ MCD_OPC_Decode, 219, 13, 9, // Opcode: ST1Threev8h
+/* 1621 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 1633
+/* 1625 */ MCD_OPC_CheckPredicate, 0, 128, 152, // Skip to: 40669
+/* 1629 */ MCD_OPC_Decode, 215, 13, 9, // Opcode: ST1Threev4s
+/* 1633 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 1645
+/* 1637 */ MCD_OPC_CheckPredicate, 0, 116, 152, // Skip to: 40669
+/* 1641 */ MCD_OPC_Decode, 209, 13, 9, // Opcode: ST1Threev2d
+/* 1645 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 1657
+/* 1649 */ MCD_OPC_CheckPredicate, 0, 104, 152, // Skip to: 40669
+/* 1653 */ MCD_OPC_Decode, 189, 13, 10, // Opcode: ST1Onev16b
+/* 1657 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 1669
+/* 1661 */ MCD_OPC_CheckPredicate, 0, 92, 152, // Skip to: 40669
+/* 1665 */ MCD_OPC_Decode, 203, 13, 10, // Opcode: ST1Onev8h
+/* 1669 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 1681
+/* 1673 */ MCD_OPC_CheckPredicate, 0, 80, 152, // Skip to: 40669
+/* 1677 */ MCD_OPC_Decode, 199, 13, 10, // Opcode: ST1Onev4s
+/* 1681 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 1693
+/* 1685 */ MCD_OPC_CheckPredicate, 0, 68, 152, // Skip to: 40669
+/* 1689 */ MCD_OPC_Decode, 193, 13, 10, // Opcode: ST1Onev2d
+/* 1693 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 1705
+/* 1697 */ MCD_OPC_CheckPredicate, 0, 56, 152, // Skip to: 40669
+/* 1701 */ MCD_OPC_Decode, 245, 13, 11, // Opcode: ST2Twov16b
+/* 1705 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 1717
+/* 1709 */ MCD_OPC_CheckPredicate, 0, 44, 152, // Skip to: 40669
+/* 1713 */ MCD_OPC_Decode, 129, 14, 11, // Opcode: ST2Twov8h
+/* 1717 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 1729
+/* 1721 */ MCD_OPC_CheckPredicate, 0, 32, 152, // Skip to: 40669
+/* 1725 */ MCD_OPC_Decode, 253, 13, 11, // Opcode: ST2Twov4s
+/* 1729 */ MCD_OPC_FilterValue, 35, 8, 0, // Skip to: 1741
+/* 1733 */ MCD_OPC_CheckPredicate, 0, 20, 152, // Skip to: 40669
+/* 1737 */ MCD_OPC_Decode, 247, 13, 11, // Opcode: ST2Twov2d
+/* 1741 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 1753
+/* 1745 */ MCD_OPC_CheckPredicate, 0, 8, 152, // Skip to: 40669
+/* 1749 */ MCD_OPC_Decode, 221, 13, 11, // Opcode: ST1Twov16b
+/* 1753 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 1765
+/* 1757 */ MCD_OPC_CheckPredicate, 0, 252, 151, // Skip to: 40669
+/* 1761 */ MCD_OPC_Decode, 235, 13, 11, // Opcode: ST1Twov8h
+/* 1765 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 1777
+/* 1769 */ MCD_OPC_CheckPredicate, 0, 240, 151, // Skip to: 40669
+/* 1773 */ MCD_OPC_Decode, 231, 13, 11, // Opcode: ST1Twov4s
+/* 1777 */ MCD_OPC_FilterValue, 43, 232, 151, // Skip to: 40669
+/* 1781 */ MCD_OPC_CheckPredicate, 0, 228, 151, // Skip to: 40669
+/* 1785 */ MCD_OPC_Decode, 225, 13, 11, // Opcode: ST1Twov2d
+/* 1789 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 1797
+/* 1793 */ MCD_OPC_Decode, 193, 14, 3, // Opcode: STNPDi
+/* 1797 */ MCD_OPC_FilterValue, 5, 212, 151, // Skip to: 40669
+/* 1801 */ MCD_OPC_Decode, 194, 14, 3, // Opcode: STNPQi
+/* 1805 */ MCD_OPC_FilterValue, 1, 165, 2, // Skip to: 2486
+/* 1809 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 1812 */ MCD_OPC_FilterValue, 0, 47, 1, // Skip to: 2119
+/* 1816 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
+/* 1819 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 1831
+/* 1823 */ MCD_OPC_CheckPredicate, 0, 186, 151, // Skip to: 40669
+/* 1827 */ MCD_OPC_Decode, 135, 7, 4, // Opcode: LD4Fourv8b
+/* 1831 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 1843
+/* 1835 */ MCD_OPC_CheckPredicate, 0, 174, 151, // Skip to: 40669
+/* 1839 */ MCD_OPC_Decode, 131, 7, 4, // Opcode: LD4Fourv4h
+/* 1843 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 1855
+/* 1847 */ MCD_OPC_CheckPredicate, 0, 162, 151, // Skip to: 40669
+/* 1851 */ MCD_OPC_Decode, 129, 7, 4, // Opcode: LD4Fourv2s
+/* 1855 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 1867
+/* 1859 */ MCD_OPC_CheckPredicate, 0, 150, 151, // Skip to: 40669
+/* 1863 */ MCD_OPC_Decode, 229, 5, 4, // Opcode: LD1Fourv8b
+/* 1867 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 1879
+/* 1871 */ MCD_OPC_CheckPredicate, 0, 138, 151, // Skip to: 40669
+/* 1875 */ MCD_OPC_Decode, 225, 5, 4, // Opcode: LD1Fourv4h
+/* 1879 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 1891
+/* 1883 */ MCD_OPC_CheckPredicate, 0, 126, 151, // Skip to: 40669
+/* 1887 */ MCD_OPC_Decode, 223, 5, 4, // Opcode: LD1Fourv2s
+/* 1891 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 1903
+/* 1895 */ MCD_OPC_CheckPredicate, 0, 114, 151, // Skip to: 40669
+/* 1899 */ MCD_OPC_Decode, 219, 5, 4, // Opcode: LD1Fourv1d
+/* 1903 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 1915
+/* 1907 */ MCD_OPC_CheckPredicate, 0, 102, 151, // Skip to: 40669
+/* 1911 */ MCD_OPC_Decode, 241, 6, 5, // Opcode: LD3Threev8b
+/* 1915 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 1927
+/* 1919 */ MCD_OPC_CheckPredicate, 0, 90, 151, // Skip to: 40669
+/* 1923 */ MCD_OPC_Decode, 237, 6, 5, // Opcode: LD3Threev4h
+/* 1927 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 1939
+/* 1931 */ MCD_OPC_CheckPredicate, 0, 78, 151, // Skip to: 40669
+/* 1935 */ MCD_OPC_Decode, 235, 6, 5, // Opcode: LD3Threev2s
+/* 1939 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 1951
+/* 1943 */ MCD_OPC_CheckPredicate, 0, 66, 151, // Skip to: 40669
+/* 1947 */ MCD_OPC_Decode, 149, 6, 5, // Opcode: LD1Threev8b
+/* 1951 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 1963
+/* 1955 */ MCD_OPC_CheckPredicate, 0, 54, 151, // Skip to: 40669
+/* 1959 */ MCD_OPC_Decode, 145, 6, 5, // Opcode: LD1Threev4h
+/* 1963 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 1975
+/* 1967 */ MCD_OPC_CheckPredicate, 0, 42, 151, // Skip to: 40669
+/* 1971 */ MCD_OPC_Decode, 143, 6, 5, // Opcode: LD1Threev2s
+/* 1975 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 1987
+/* 1979 */ MCD_OPC_CheckPredicate, 0, 30, 151, // Skip to: 40669
+/* 1983 */ MCD_OPC_Decode, 139, 6, 5, // Opcode: LD1Threev1d
+/* 1987 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 1999
+/* 1991 */ MCD_OPC_CheckPredicate, 0, 18, 151, // Skip to: 40669
+/* 1995 */ MCD_OPC_Decode, 245, 5, 6, // Opcode: LD1Onev8b
+/* 1999 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 2011
+/* 2003 */ MCD_OPC_CheckPredicate, 0, 6, 151, // Skip to: 40669
+/* 2007 */ MCD_OPC_Decode, 241, 5, 6, // Opcode: LD1Onev4h
+/* 2011 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 2023
+/* 2015 */ MCD_OPC_CheckPredicate, 0, 250, 150, // Skip to: 40669
+/* 2019 */ MCD_OPC_Decode, 239, 5, 6, // Opcode: LD1Onev2s
+/* 2023 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 2035
+/* 2027 */ MCD_OPC_CheckPredicate, 0, 238, 150, // Skip to: 40669
+/* 2031 */ MCD_OPC_Decode, 235, 5, 6, // Opcode: LD1Onev1d
+/* 2035 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 2047
+/* 2039 */ MCD_OPC_CheckPredicate, 0, 226, 150, // Skip to: 40669
+/* 2043 */ MCD_OPC_Decode, 203, 6, 7, // Opcode: LD2Twov8b
+/* 2047 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 2059
+/* 2051 */ MCD_OPC_CheckPredicate, 0, 214, 150, // Skip to: 40669
+/* 2055 */ MCD_OPC_Decode, 199, 6, 7, // Opcode: LD2Twov4h
+/* 2059 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 2071
+/* 2063 */ MCD_OPC_CheckPredicate, 0, 202, 150, // Skip to: 40669
+/* 2067 */ MCD_OPC_Decode, 197, 6, 7, // Opcode: LD2Twov2s
+/* 2071 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 2083
+/* 2075 */ MCD_OPC_CheckPredicate, 0, 190, 150, // Skip to: 40669
+/* 2079 */ MCD_OPC_Decode, 165, 6, 7, // Opcode: LD1Twov8b
+/* 2083 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 2095
+/* 2087 */ MCD_OPC_CheckPredicate, 0, 178, 150, // Skip to: 40669
+/* 2091 */ MCD_OPC_Decode, 161, 6, 7, // Opcode: LD1Twov4h
+/* 2095 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 2107
+/* 2099 */ MCD_OPC_CheckPredicate, 0, 166, 150, // Skip to: 40669
+/* 2103 */ MCD_OPC_Decode, 159, 6, 7, // Opcode: LD1Twov2s
+/* 2107 */ MCD_OPC_FilterValue, 43, 158, 150, // Skip to: 40669
+/* 2111 */ MCD_OPC_CheckPredicate, 0, 154, 150, // Skip to: 40669
+/* 2115 */ MCD_OPC_Decode, 155, 6, 7, // Opcode: LD1Twov1d
+/* 2119 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 2127
+/* 2123 */ MCD_OPC_Decode, 175, 7, 3, // Opcode: LDNPSi
+/* 2127 */ MCD_OPC_FilterValue, 2, 83, 1, // Skip to: 2470
+/* 2131 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
+/* 2134 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 2146
+/* 2138 */ MCD_OPC_CheckPredicate, 0, 127, 150, // Skip to: 40669
+/* 2142 */ MCD_OPC_Decode, 253, 6, 8, // Opcode: LD4Fourv16b
+/* 2146 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 2158
+/* 2150 */ MCD_OPC_CheckPredicate, 0, 115, 150, // Skip to: 40669
+/* 2154 */ MCD_OPC_Decode, 137, 7, 8, // Opcode: LD4Fourv8h
+/* 2158 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 2170
+/* 2162 */ MCD_OPC_CheckPredicate, 0, 103, 150, // Skip to: 40669
+/* 2166 */ MCD_OPC_Decode, 133, 7, 8, // Opcode: LD4Fourv4s
+/* 2170 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 2182
+/* 2174 */ MCD_OPC_CheckPredicate, 0, 91, 150, // Skip to: 40669
+/* 2178 */ MCD_OPC_Decode, 255, 6, 8, // Opcode: LD4Fourv2d
+/* 2182 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 2194
+/* 2186 */ MCD_OPC_CheckPredicate, 0, 79, 150, // Skip to: 40669
+/* 2190 */ MCD_OPC_Decode, 217, 5, 8, // Opcode: LD1Fourv16b
+/* 2194 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 2206
+/* 2198 */ MCD_OPC_CheckPredicate, 0, 67, 150, // Skip to: 40669
+/* 2202 */ MCD_OPC_Decode, 231, 5, 8, // Opcode: LD1Fourv8h
+/* 2206 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 2218
+/* 2210 */ MCD_OPC_CheckPredicate, 0, 55, 150, // Skip to: 40669
+/* 2214 */ MCD_OPC_Decode, 227, 5, 8, // Opcode: LD1Fourv4s
+/* 2218 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 2230
+/* 2222 */ MCD_OPC_CheckPredicate, 0, 43, 150, // Skip to: 40669
+/* 2226 */ MCD_OPC_Decode, 221, 5, 8, // Opcode: LD1Fourv2d
+/* 2230 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 2242
+/* 2234 */ MCD_OPC_CheckPredicate, 0, 31, 150, // Skip to: 40669
+/* 2238 */ MCD_OPC_Decode, 231, 6, 9, // Opcode: LD3Threev16b
+/* 2242 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 2254
+/* 2246 */ MCD_OPC_CheckPredicate, 0, 19, 150, // Skip to: 40669
+/* 2250 */ MCD_OPC_Decode, 243, 6, 9, // Opcode: LD3Threev8h
+/* 2254 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 2266
+/* 2258 */ MCD_OPC_CheckPredicate, 0, 7, 150, // Skip to: 40669
+/* 2262 */ MCD_OPC_Decode, 239, 6, 9, // Opcode: LD3Threev4s
+/* 2266 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 2278
+/* 2270 */ MCD_OPC_CheckPredicate, 0, 251, 149, // Skip to: 40669
+/* 2274 */ MCD_OPC_Decode, 233, 6, 9, // Opcode: LD3Threev2d
+/* 2278 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 2290
+/* 2282 */ MCD_OPC_CheckPredicate, 0, 239, 149, // Skip to: 40669
+/* 2286 */ MCD_OPC_Decode, 137, 6, 9, // Opcode: LD1Threev16b
+/* 2290 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 2302
+/* 2294 */ MCD_OPC_CheckPredicate, 0, 227, 149, // Skip to: 40669
+/* 2298 */ MCD_OPC_Decode, 151, 6, 9, // Opcode: LD1Threev8h
+/* 2302 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 2314
+/* 2306 */ MCD_OPC_CheckPredicate, 0, 215, 149, // Skip to: 40669
+/* 2310 */ MCD_OPC_Decode, 147, 6, 9, // Opcode: LD1Threev4s
+/* 2314 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 2326
+/* 2318 */ MCD_OPC_CheckPredicate, 0, 203, 149, // Skip to: 40669
+/* 2322 */ MCD_OPC_Decode, 141, 6, 9, // Opcode: LD1Threev2d
+/* 2326 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 2338
+/* 2330 */ MCD_OPC_CheckPredicate, 0, 191, 149, // Skip to: 40669
+/* 2334 */ MCD_OPC_Decode, 233, 5, 10, // Opcode: LD1Onev16b
+/* 2338 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 2350
+/* 2342 */ MCD_OPC_CheckPredicate, 0, 179, 149, // Skip to: 40669
+/* 2346 */ MCD_OPC_Decode, 247, 5, 10, // Opcode: LD1Onev8h
+/* 2350 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 2362
+/* 2354 */ MCD_OPC_CheckPredicate, 0, 167, 149, // Skip to: 40669
+/* 2358 */ MCD_OPC_Decode, 243, 5, 10, // Opcode: LD1Onev4s
+/* 2362 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 2374
+/* 2366 */ MCD_OPC_CheckPredicate, 0, 155, 149, // Skip to: 40669
+/* 2370 */ MCD_OPC_Decode, 237, 5, 10, // Opcode: LD1Onev2d
+/* 2374 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 2386
+/* 2378 */ MCD_OPC_CheckPredicate, 0, 143, 149, // Skip to: 40669
+/* 2382 */ MCD_OPC_Decode, 193, 6, 11, // Opcode: LD2Twov16b
+/* 2386 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 2398
+/* 2390 */ MCD_OPC_CheckPredicate, 0, 131, 149, // Skip to: 40669
+/* 2394 */ MCD_OPC_Decode, 205, 6, 11, // Opcode: LD2Twov8h
+/* 2398 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 2410
+/* 2402 */ MCD_OPC_CheckPredicate, 0, 119, 149, // Skip to: 40669
+/* 2406 */ MCD_OPC_Decode, 201, 6, 11, // Opcode: LD2Twov4s
+/* 2410 */ MCD_OPC_FilterValue, 35, 8, 0, // Skip to: 2422
+/* 2414 */ MCD_OPC_CheckPredicate, 0, 107, 149, // Skip to: 40669
+/* 2418 */ MCD_OPC_Decode, 195, 6, 11, // Opcode: LD2Twov2d
+/* 2422 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 2434
+/* 2426 */ MCD_OPC_CheckPredicate, 0, 95, 149, // Skip to: 40669
+/* 2430 */ MCD_OPC_Decode, 153, 6, 11, // Opcode: LD1Twov16b
+/* 2434 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 2446
+/* 2438 */ MCD_OPC_CheckPredicate, 0, 83, 149, // Skip to: 40669
+/* 2442 */ MCD_OPC_Decode, 167, 6, 11, // Opcode: LD1Twov8h
+/* 2446 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 2458
+/* 2450 */ MCD_OPC_CheckPredicate, 0, 71, 149, // Skip to: 40669
+/* 2454 */ MCD_OPC_Decode, 163, 6, 11, // Opcode: LD1Twov4s
+/* 2458 */ MCD_OPC_FilterValue, 43, 63, 149, // Skip to: 40669
+/* 2462 */ MCD_OPC_CheckPredicate, 0, 59, 149, // Skip to: 40669
+/* 2466 */ MCD_OPC_Decode, 157, 6, 11, // Opcode: LD1Twov2d
+/* 2470 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 2478
+/* 2474 */ MCD_OPC_Decode, 173, 7, 3, // Opcode: LDNPDi
+/* 2478 */ MCD_OPC_FilterValue, 5, 43, 149, // Skip to: 40669
+/* 2482 */ MCD_OPC_Decode, 174, 7, 3, // Opcode: LDNPQi
+/* 2486 */ MCD_OPC_FilterValue, 2, 227, 3, // Skip to: 3485
+/* 2490 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 2493 */ MCD_OPC_FilterValue, 0, 197, 1, // Skip to: 2950
+/* 2497 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
/* 2500 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2518
-/* 2504 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2514
-/* 2510 */ MCD_OPC_Decode, 130, 3, 13, // Opcode: CMPxx_lsl
-/* 2514 */ MCD_OPC_Decode, 242, 17, 11, // Opcode: SUBSxxx_lsl
-/* 2518 */ MCD_OPC_FilterValue, 1, 92, 169, // Skip to: 45878
-/* 2522 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 2525 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2543
-/* 2529 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2539
-/* 2535 */ MCD_OPC_Decode, 254, 2, 19, // Opcode: CMPxw_uxtb
-/* 2539 */ MCD_OPC_Decode, 238, 17, 20, // Opcode: SUBSxxw_uxtb
-/* 2543 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 2561
-/* 2547 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2557
-/* 2553 */ MCD_OPC_Decode, 255, 2, 19, // Opcode: CMPxw_uxth
-/* 2557 */ MCD_OPC_Decode, 239, 17, 20, // Opcode: SUBSxxw_uxth
-/* 2561 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 2579
-/* 2565 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2575
-/* 2571 */ MCD_OPC_Decode, 128, 3, 19, // Opcode: CMPxw_uxtw
-/* 2575 */ MCD_OPC_Decode, 240, 17, 20, // Opcode: SUBSxxw_uxtw
-/* 2579 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 2597
-/* 2583 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2593
-/* 2589 */ MCD_OPC_Decode, 133, 3, 21, // Opcode: CMPxx_uxtx
-/* 2593 */ MCD_OPC_Decode, 245, 17, 22, // Opcode: SUBSxxx_uxtx
-/* 2597 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 2615
-/* 2601 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2611
-/* 2607 */ MCD_OPC_Decode, 251, 2, 19, // Opcode: CMPxw_sxtb
-/* 2611 */ MCD_OPC_Decode, 235, 17, 20, // Opcode: SUBSxxw_sxtb
-/* 2615 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 2633
-/* 2619 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2629
-/* 2625 */ MCD_OPC_Decode, 252, 2, 19, // Opcode: CMPxw_sxth
-/* 2629 */ MCD_OPC_Decode, 236, 17, 20, // Opcode: SUBSxxw_sxth
-/* 2633 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 2651
-/* 2637 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2647
-/* 2643 */ MCD_OPC_Decode, 253, 2, 19, // Opcode: CMPxw_sxtw
-/* 2647 */ MCD_OPC_Decode, 237, 17, 20, // Opcode: SUBSxxw_sxtw
-/* 2651 */ MCD_OPC_FilterValue, 7, 215, 168, // Skip to: 45878
-/* 2655 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2665
-/* 2661 */ MCD_OPC_Decode, 132, 3, 21, // Opcode: CMPxx_sxtx
-/* 2665 */ MCD_OPC_Decode, 244, 17, 22, // Opcode: SUBSxxx_sxtx
-/* 2669 */ MCD_OPC_FilterValue, 13, 155, 0, // Skip to: 2828
-/* 2673 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 2676 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 2689
-/* 2680 */ MCD_OPC_CheckField, 21, 1, 0, 184, 168, // Skip to: 45878
-/* 2686 */ MCD_OPC_Decode, 88, 8, // Opcode: ADDwww_lsr
-/* 2689 */ MCD_OPC_FilterValue, 1, 20, 0, // Skip to: 2713
-/* 2693 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2696 */ MCD_OPC_FilterValue, 0, 170, 168, // Skip to: 45878
-/* 2700 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2710
-/* 2706 */ MCD_OPC_Decode, 220, 2, 10, // Opcode: CMNww_lsr
-/* 2710 */ MCD_OPC_Decode, 47, 8, // Opcode: ADDSwww_lsr
-/* 2713 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 2727
-/* 2717 */ MCD_OPC_CheckField, 21, 1, 0, 147, 168, // Skip to: 45878
-/* 2723 */ MCD_OPC_Decode, 134, 18, 8, // Opcode: SUBwww_lsr
-/* 2727 */ MCD_OPC_FilterValue, 3, 21, 0, // Skip to: 2752
-/* 2731 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2734 */ MCD_OPC_FilterValue, 0, 132, 168, // Skip to: 45878
-/* 2738 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2748
-/* 2744 */ MCD_OPC_Decode, 242, 2, 10, // Opcode: CMPww_lsr
-/* 2748 */ MCD_OPC_Decode, 226, 17, 8, // Opcode: SUBSwww_lsr
-/* 2752 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 2765
-/* 2756 */ MCD_OPC_CheckField, 21, 1, 0, 108, 168, // Skip to: 45878
-/* 2762 */ MCD_OPC_Decode, 111, 11, // Opcode: ADDxxx_lsr
-/* 2765 */ MCD_OPC_FilterValue, 5, 20, 0, // Skip to: 2789
-/* 2769 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2772 */ MCD_OPC_FilterValue, 0, 94, 168, // Skip to: 45878
-/* 2776 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2786
-/* 2782 */ MCD_OPC_Decode, 237, 2, 13, // Opcode: CMNxx_lsr
-/* 2786 */ MCD_OPC_Decode, 64, 11, // Opcode: ADDSxxx_lsr
-/* 2789 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 2803
-/* 2793 */ MCD_OPC_CheckField, 21, 1, 0, 71, 168, // Skip to: 45878
-/* 2799 */ MCD_OPC_Decode, 157, 18, 11, // Opcode: SUBxxx_lsr
-/* 2803 */ MCD_OPC_FilterValue, 7, 63, 168, // Skip to: 45878
-/* 2807 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2810 */ MCD_OPC_FilterValue, 0, 56, 168, // Skip to: 45878
-/* 2814 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2824
-/* 2820 */ MCD_OPC_Decode, 131, 3, 13, // Opcode: CMPxx_lsr
-/* 2824 */ MCD_OPC_Decode, 243, 17, 11, // Opcode: SUBSxxx_lsr
-/* 2828 */ MCD_OPC_FilterValue, 14, 38, 168, // Skip to: 45878
-/* 2832 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 2835 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 2848
-/* 2839 */ MCD_OPC_CheckField, 21, 1, 0, 25, 168, // Skip to: 45878
-/* 2845 */ MCD_OPC_Decode, 86, 8, // Opcode: ADDwww_asr
-/* 2848 */ MCD_OPC_FilterValue, 1, 20, 0, // Skip to: 2872
-/* 2852 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2855 */ MCD_OPC_FilterValue, 0, 11, 168, // Skip to: 45878
-/* 2859 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2869
-/* 2865 */ MCD_OPC_Decode, 218, 2, 10, // Opcode: CMNww_asr
-/* 2869 */ MCD_OPC_Decode, 45, 8, // Opcode: ADDSwww_asr
-/* 2872 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 2886
-/* 2876 */ MCD_OPC_CheckField, 21, 1, 0, 244, 167, // Skip to: 45878
-/* 2882 */ MCD_OPC_Decode, 132, 18, 8, // Opcode: SUBwww_asr
-/* 2886 */ MCD_OPC_FilterValue, 3, 21, 0, // Skip to: 2911
-/* 2890 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2893 */ MCD_OPC_FilterValue, 0, 229, 167, // Skip to: 45878
-/* 2897 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2907
-/* 2903 */ MCD_OPC_Decode, 240, 2, 10, // Opcode: CMPww_asr
-/* 2907 */ MCD_OPC_Decode, 224, 17, 8, // Opcode: SUBSwww_asr
-/* 2911 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 2924
-/* 2915 */ MCD_OPC_CheckField, 21, 1, 0, 205, 167, // Skip to: 45878
-/* 2921 */ MCD_OPC_Decode, 109, 11, // Opcode: ADDxxx_asr
-/* 2924 */ MCD_OPC_FilterValue, 5, 20, 0, // Skip to: 2948
-/* 2928 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2931 */ MCD_OPC_FilterValue, 0, 191, 167, // Skip to: 45878
-/* 2935 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2945
-/* 2941 */ MCD_OPC_Decode, 235, 2, 13, // Opcode: CMNxx_asr
-/* 2945 */ MCD_OPC_Decode, 62, 11, // Opcode: ADDSxxx_asr
-/* 2948 */ MCD_OPC_FilterValue, 6, 10, 0, // Skip to: 2962
-/* 2952 */ MCD_OPC_CheckField, 21, 1, 0, 168, 167, // Skip to: 45878
-/* 2958 */ MCD_OPC_Decode, 155, 18, 11, // Opcode: SUBxxx_asr
-/* 2962 */ MCD_OPC_FilterValue, 7, 160, 167, // Skip to: 45878
-/* 2966 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 2969 */ MCD_OPC_FilterValue, 0, 153, 167, // Skip to: 45878
-/* 2973 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 2983
-/* 2979 */ MCD_OPC_Decode, 129, 3, 13, // Opcode: CMPxx_asr
-/* 2983 */ MCD_OPC_Decode, 241, 17, 11, // Opcode: SUBSxxx_asr
-/* 2987 */ MCD_OPC_FilterValue, 3, 42, 121, // Skip to: 34009
-/* 2991 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
-/* 2994 */ MCD_OPC_FilterValue, 0, 177, 2, // Skip to: 3687
-/* 2998 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 3001 */ MCD_OPC_FilterValue, 0, 47, 1, // Skip to: 3308
-/* 3005 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
-/* 3008 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3020
-/* 3012 */ MCD_OPC_CheckPredicate, 0, 110, 167, // Skip to: 45878
-/* 3016 */ MCD_OPC_Decode, 200, 17, 23, // Opcode: ST4_8B
-/* 3020 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3032
-/* 3024 */ MCD_OPC_CheckPredicate, 0, 98, 167, // Skip to: 45878
-/* 3028 */ MCD_OPC_Decode, 198, 17, 23, // Opcode: ST4_4H
-/* 3032 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3044
-/* 3036 */ MCD_OPC_CheckPredicate, 0, 86, 167, // Skip to: 45878
-/* 3040 */ MCD_OPC_Decode, 197, 17, 23, // Opcode: ST4_2S
-/* 3044 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 3056
-/* 3048 */ MCD_OPC_CheckPredicate, 0, 74, 167, // Skip to: 45878
-/* 3052 */ MCD_OPC_Decode, 229, 16, 23, // Opcode: ST1x4_8B
-/* 3056 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 3068
-/* 3060 */ MCD_OPC_CheckPredicate, 0, 62, 167, // Skip to: 45878
-/* 3064 */ MCD_OPC_Decode, 227, 16, 23, // Opcode: ST1x4_4H
-/* 3068 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 3080
-/* 3072 */ MCD_OPC_CheckPredicate, 0, 50, 167, // Skip to: 45878
-/* 3076 */ MCD_OPC_Decode, 226, 16, 23, // Opcode: ST1x4_2S
-/* 3080 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 3092
-/* 3084 */ MCD_OPC_CheckPredicate, 0, 38, 167, // Skip to: 45878
-/* 3088 */ MCD_OPC_Decode, 224, 16, 23, // Opcode: ST1x4_1D
-/* 3092 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 3104
-/* 3096 */ MCD_OPC_CheckPredicate, 0, 26, 167, // Skip to: 45878
-/* 3100 */ MCD_OPC_Decode, 167, 17, 24, // Opcode: ST3_8B
-/* 3104 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 3116
-/* 3108 */ MCD_OPC_CheckPredicate, 0, 14, 167, // Skip to: 45878
-/* 3112 */ MCD_OPC_Decode, 165, 17, 24, // Opcode: ST3_4H
-/* 3116 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 3128
-/* 3120 */ MCD_OPC_CheckPredicate, 0, 2, 167, // Skip to: 45878
-/* 3124 */ MCD_OPC_Decode, 164, 17, 24, // Opcode: ST3_2S
-/* 3128 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 3140
-/* 3132 */ MCD_OPC_CheckPredicate, 0, 246, 166, // Skip to: 45878
-/* 3136 */ MCD_OPC_Decode, 205, 16, 24, // Opcode: ST1x3_8B
-/* 3140 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 3152
-/* 3144 */ MCD_OPC_CheckPredicate, 0, 234, 166, // Skip to: 45878
-/* 3148 */ MCD_OPC_Decode, 203, 16, 24, // Opcode: ST1x3_4H
-/* 3152 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 3164
-/* 3156 */ MCD_OPC_CheckPredicate, 0, 222, 166, // Skip to: 45878
-/* 3160 */ MCD_OPC_Decode, 202, 16, 24, // Opcode: ST1x3_2S
-/* 3164 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 3176
-/* 3168 */ MCD_OPC_CheckPredicate, 0, 210, 166, // Skip to: 45878
-/* 3172 */ MCD_OPC_Decode, 200, 16, 24, // Opcode: ST1x3_1D
-/* 3176 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 3188
-/* 3180 */ MCD_OPC_CheckPredicate, 0, 198, 166, // Skip to: 45878
-/* 3184 */ MCD_OPC_Decode, 157, 16, 25, // Opcode: ST1_8B
-/* 3188 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 3200
-/* 3192 */ MCD_OPC_CheckPredicate, 0, 186, 166, // Skip to: 45878
-/* 3196 */ MCD_OPC_Decode, 155, 16, 25, // Opcode: ST1_4H
-/* 3200 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 3212
-/* 3204 */ MCD_OPC_CheckPredicate, 0, 174, 166, // Skip to: 45878
-/* 3208 */ MCD_OPC_Decode, 154, 16, 25, // Opcode: ST1_2S
-/* 3212 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 3224
-/* 3216 */ MCD_OPC_CheckPredicate, 0, 162, 166, // Skip to: 45878
-/* 3220 */ MCD_OPC_Decode, 152, 16, 25, // Opcode: ST1_1D
-/* 3224 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 3236
-/* 3228 */ MCD_OPC_CheckPredicate, 0, 150, 166, // Skip to: 45878
-/* 3232 */ MCD_OPC_Decode, 134, 17, 26, // Opcode: ST2_8B
-/* 3236 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 3248
-/* 3240 */ MCD_OPC_CheckPredicate, 0, 138, 166, // Skip to: 45878
-/* 3244 */ MCD_OPC_Decode, 132, 17, 26, // Opcode: ST2_4H
-/* 3248 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 3260
-/* 3252 */ MCD_OPC_CheckPredicate, 0, 126, 166, // Skip to: 45878
-/* 3256 */ MCD_OPC_Decode, 131, 17, 26, // Opcode: ST2_2S
-/* 3260 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 3272
-/* 3264 */ MCD_OPC_CheckPredicate, 0, 114, 166, // Skip to: 45878
-/* 3268 */ MCD_OPC_Decode, 181, 16, 26, // Opcode: ST1x2_8B
-/* 3272 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 3284
-/* 3276 */ MCD_OPC_CheckPredicate, 0, 102, 166, // Skip to: 45878
-/* 3280 */ MCD_OPC_Decode, 179, 16, 26, // Opcode: ST1x2_4H
-/* 3284 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 3296
-/* 3288 */ MCD_OPC_CheckPredicate, 0, 90, 166, // Skip to: 45878
-/* 3292 */ MCD_OPC_Decode, 178, 16, 26, // Opcode: ST1x2_2S
-/* 3296 */ MCD_OPC_FilterValue, 43, 82, 166, // Skip to: 45878
-/* 3300 */ MCD_OPC_CheckPredicate, 0, 78, 166, // Skip to: 45878
-/* 3304 */ MCD_OPC_Decode, 176, 16, 26, // Opcode: ST1x2_1D
-/* 3308 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3320
-/* 3312 */ MCD_OPC_CheckPredicate, 1, 66, 166, // Skip to: 45878
-/* 3316 */ MCD_OPC_Decode, 201, 10, 1, // Opcode: LSFPPair32_NonTemp_STR
-/* 3320 */ MCD_OPC_FilterValue, 2, 83, 1, // Skip to: 3663
-/* 3324 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
-/* 3327 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3339
-/* 3331 */ MCD_OPC_CheckPredicate, 0, 47, 166, // Skip to: 45878
-/* 3335 */ MCD_OPC_Decode, 195, 17, 27, // Opcode: ST4_16B
-/* 3339 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3351
-/* 3343 */ MCD_OPC_CheckPredicate, 0, 35, 166, // Skip to: 45878
-/* 3347 */ MCD_OPC_Decode, 201, 17, 27, // Opcode: ST4_8H
-/* 3351 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3363
-/* 3355 */ MCD_OPC_CheckPredicate, 0, 23, 166, // Skip to: 45878
-/* 3359 */ MCD_OPC_Decode, 199, 17, 27, // Opcode: ST4_4S
-/* 3363 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 3375
-/* 3367 */ MCD_OPC_CheckPredicate, 0, 11, 166, // Skip to: 45878
-/* 3371 */ MCD_OPC_Decode, 196, 17, 27, // Opcode: ST4_2D
-/* 3375 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 3387
-/* 3379 */ MCD_OPC_CheckPredicate, 0, 255, 165, // Skip to: 45878
-/* 3383 */ MCD_OPC_Decode, 223, 16, 27, // Opcode: ST1x4_16B
-/* 3387 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 3399
-/* 3391 */ MCD_OPC_CheckPredicate, 0, 243, 165, // Skip to: 45878
-/* 3395 */ MCD_OPC_Decode, 230, 16, 27, // Opcode: ST1x4_8H
-/* 3399 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 3411
-/* 3403 */ MCD_OPC_CheckPredicate, 0, 231, 165, // Skip to: 45878
-/* 3407 */ MCD_OPC_Decode, 228, 16, 27, // Opcode: ST1x4_4S
-/* 3411 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 3423
-/* 3415 */ MCD_OPC_CheckPredicate, 0, 219, 165, // Skip to: 45878
-/* 3419 */ MCD_OPC_Decode, 225, 16, 27, // Opcode: ST1x4_2D
-/* 3423 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 3435
-/* 3427 */ MCD_OPC_CheckPredicate, 0, 207, 165, // Skip to: 45878
-/* 3431 */ MCD_OPC_Decode, 162, 17, 28, // Opcode: ST3_16B
-/* 3435 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 3447
-/* 3439 */ MCD_OPC_CheckPredicate, 0, 195, 165, // Skip to: 45878
-/* 3443 */ MCD_OPC_Decode, 168, 17, 28, // Opcode: ST3_8H
-/* 3447 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 3459
-/* 3451 */ MCD_OPC_CheckPredicate, 0, 183, 165, // Skip to: 45878
-/* 3455 */ MCD_OPC_Decode, 166, 17, 28, // Opcode: ST3_4S
-/* 3459 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 3471
-/* 3463 */ MCD_OPC_CheckPredicate, 0, 171, 165, // Skip to: 45878
-/* 3467 */ MCD_OPC_Decode, 163, 17, 28, // Opcode: ST3_2D
-/* 3471 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 3483
-/* 3475 */ MCD_OPC_CheckPredicate, 0, 159, 165, // Skip to: 45878
-/* 3479 */ MCD_OPC_Decode, 199, 16, 28, // Opcode: ST1x3_16B
-/* 3483 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 3495
-/* 3487 */ MCD_OPC_CheckPredicate, 0, 147, 165, // Skip to: 45878
-/* 3491 */ MCD_OPC_Decode, 206, 16, 28, // Opcode: ST1x3_8H
-/* 3495 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 3507
-/* 3499 */ MCD_OPC_CheckPredicate, 0, 135, 165, // Skip to: 45878
-/* 3503 */ MCD_OPC_Decode, 204, 16, 28, // Opcode: ST1x3_4S
-/* 3507 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 3519
-/* 3511 */ MCD_OPC_CheckPredicate, 0, 123, 165, // Skip to: 45878
-/* 3515 */ MCD_OPC_Decode, 201, 16, 28, // Opcode: ST1x3_2D
-/* 3519 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 3531
-/* 3523 */ MCD_OPC_CheckPredicate, 0, 111, 165, // Skip to: 45878
-/* 3527 */ MCD_OPC_Decode, 151, 16, 29, // Opcode: ST1_16B
-/* 3531 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 3543
-/* 3535 */ MCD_OPC_CheckPredicate, 0, 99, 165, // Skip to: 45878
-/* 3539 */ MCD_OPC_Decode, 158, 16, 29, // Opcode: ST1_8H
-/* 3543 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 3555
-/* 3547 */ MCD_OPC_CheckPredicate, 0, 87, 165, // Skip to: 45878
-/* 3551 */ MCD_OPC_Decode, 156, 16, 29, // Opcode: ST1_4S
-/* 3555 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 3567
-/* 3559 */ MCD_OPC_CheckPredicate, 0, 75, 165, // Skip to: 45878
-/* 3563 */ MCD_OPC_Decode, 153, 16, 29, // Opcode: ST1_2D
-/* 3567 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 3579
-/* 3571 */ MCD_OPC_CheckPredicate, 0, 63, 165, // Skip to: 45878
-/* 3575 */ MCD_OPC_Decode, 129, 17, 30, // Opcode: ST2_16B
-/* 3579 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 3591
-/* 3583 */ MCD_OPC_CheckPredicate, 0, 51, 165, // Skip to: 45878
-/* 3587 */ MCD_OPC_Decode, 135, 17, 30, // Opcode: ST2_8H
-/* 3591 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 3603
-/* 3595 */ MCD_OPC_CheckPredicate, 0, 39, 165, // Skip to: 45878
-/* 3599 */ MCD_OPC_Decode, 133, 17, 30, // Opcode: ST2_4S
-/* 3603 */ MCD_OPC_FilterValue, 35, 8, 0, // Skip to: 3615
-/* 3607 */ MCD_OPC_CheckPredicate, 0, 27, 165, // Skip to: 45878
-/* 3611 */ MCD_OPC_Decode, 130, 17, 30, // Opcode: ST2_2D
-/* 3615 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 3627
-/* 3619 */ MCD_OPC_CheckPredicate, 0, 15, 165, // Skip to: 45878
-/* 3623 */ MCD_OPC_Decode, 175, 16, 30, // Opcode: ST1x2_16B
-/* 3627 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 3639
-/* 3631 */ MCD_OPC_CheckPredicate, 0, 3, 165, // Skip to: 45878
-/* 3635 */ MCD_OPC_Decode, 182, 16, 30, // Opcode: ST1x2_8H
-/* 3639 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 3651
-/* 3643 */ MCD_OPC_CheckPredicate, 0, 247, 164, // Skip to: 45878
-/* 3647 */ MCD_OPC_Decode, 180, 16, 30, // Opcode: ST1x2_4S
-/* 3651 */ MCD_OPC_FilterValue, 43, 239, 164, // Skip to: 45878
-/* 3655 */ MCD_OPC_CheckPredicate, 0, 235, 164, // Skip to: 45878
-/* 3659 */ MCD_OPC_Decode, 177, 16, 30, // Opcode: ST1x2_2D
-/* 3663 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 3675
-/* 3667 */ MCD_OPC_CheckPredicate, 1, 223, 164, // Skip to: 45878
-/* 3671 */ MCD_OPC_Decode, 209, 10, 1, // Opcode: LSFPPair64_NonTemp_STR
-/* 3675 */ MCD_OPC_FilterValue, 5, 215, 164, // Skip to: 45878
-/* 3679 */ MCD_OPC_CheckPredicate, 1, 211, 164, // Skip to: 45878
-/* 3683 */ MCD_OPC_Decode, 193, 10, 1, // Opcode: LSFPPair128_NonTemp_STR
-/* 3687 */ MCD_OPC_FilterValue, 1, 177, 2, // Skip to: 4380
-/* 3691 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 3694 */ MCD_OPC_FilterValue, 0, 47, 1, // Skip to: 4001
-/* 3698 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
-/* 3701 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 3713
-/* 3705 */ MCD_OPC_CheckPredicate, 0, 185, 164, // Skip to: 45878
-/* 3709 */ MCD_OPC_Decode, 141, 9, 31, // Opcode: LD4_8B
-/* 3713 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 3725
-/* 3717 */ MCD_OPC_CheckPredicate, 0, 173, 164, // Skip to: 45878
-/* 3721 */ MCD_OPC_Decode, 139, 9, 31, // Opcode: LD4_4H
-/* 3725 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 3737
-/* 3729 */ MCD_OPC_CheckPredicate, 0, 161, 164, // Skip to: 45878
-/* 3733 */ MCD_OPC_Decode, 138, 9, 31, // Opcode: LD4_2S
-/* 3737 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 3749
-/* 3741 */ MCD_OPC_CheckPredicate, 0, 149, 164, // Skip to: 45878
-/* 3745 */ MCD_OPC_Decode, 226, 7, 31, // Opcode: LD1x4_8B
-/* 3749 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 3761
-/* 3753 */ MCD_OPC_CheckPredicate, 0, 137, 164, // Skip to: 45878
-/* 3757 */ MCD_OPC_Decode, 224, 7, 31, // Opcode: LD1x4_4H
-/* 3761 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 3773
-/* 3765 */ MCD_OPC_CheckPredicate, 0, 125, 164, // Skip to: 45878
-/* 3769 */ MCD_OPC_Decode, 223, 7, 31, // Opcode: LD1x4_2S
-/* 3773 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 3785
-/* 3777 */ MCD_OPC_CheckPredicate, 0, 113, 164, // Skip to: 45878
-/* 3781 */ MCD_OPC_Decode, 221, 7, 31, // Opcode: LD1x4_1D
-/* 3785 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 3797
-/* 3789 */ MCD_OPC_CheckPredicate, 0, 101, 164, // Skip to: 45878
-/* 3793 */ MCD_OPC_Decode, 212, 8, 32, // Opcode: LD3_8B
-/* 3797 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 3809
-/* 3801 */ MCD_OPC_CheckPredicate, 0, 89, 164, // Skip to: 45878
-/* 3805 */ MCD_OPC_Decode, 210, 8, 32, // Opcode: LD3_4H
-/* 3809 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 3821
-/* 3813 */ MCD_OPC_CheckPredicate, 0, 77, 164, // Skip to: 45878
-/* 3817 */ MCD_OPC_Decode, 209, 8, 32, // Opcode: LD3_2S
-/* 3821 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 3833
-/* 3825 */ MCD_OPC_CheckPredicate, 0, 65, 164, // Skip to: 45878
-/* 3829 */ MCD_OPC_Decode, 202, 7, 32, // Opcode: LD1x3_8B
-/* 3833 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 3845
-/* 3837 */ MCD_OPC_CheckPredicate, 0, 53, 164, // Skip to: 45878
-/* 3841 */ MCD_OPC_Decode, 200, 7, 32, // Opcode: LD1x3_4H
-/* 3845 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 3857
-/* 3849 */ MCD_OPC_CheckPredicate, 0, 41, 164, // Skip to: 45878
-/* 3853 */ MCD_OPC_Decode, 199, 7, 32, // Opcode: LD1x3_2S
-/* 3857 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 3869
-/* 3861 */ MCD_OPC_CheckPredicate, 0, 29, 164, // Skip to: 45878
-/* 3865 */ MCD_OPC_Decode, 197, 7, 32, // Opcode: LD1x3_1D
-/* 3869 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 3881
-/* 3873 */ MCD_OPC_CheckPredicate, 0, 17, 164, // Skip to: 45878
-/* 3877 */ MCD_OPC_Decode, 154, 7, 33, // Opcode: LD1_8B
-/* 3881 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 3893
-/* 3885 */ MCD_OPC_CheckPredicate, 0, 5, 164, // Skip to: 45878
-/* 3889 */ MCD_OPC_Decode, 152, 7, 33, // Opcode: LD1_4H
-/* 3893 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 3905
-/* 3897 */ MCD_OPC_CheckPredicate, 0, 249, 163, // Skip to: 45878
-/* 3901 */ MCD_OPC_Decode, 151, 7, 33, // Opcode: LD1_2S
-/* 3905 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 3917
-/* 3909 */ MCD_OPC_CheckPredicate, 0, 237, 163, // Skip to: 45878
-/* 3913 */ MCD_OPC_Decode, 149, 7, 33, // Opcode: LD1_1D
-/* 3917 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 3929
-/* 3921 */ MCD_OPC_CheckPredicate, 0, 225, 163, // Skip to: 45878
-/* 3925 */ MCD_OPC_Decode, 155, 8, 34, // Opcode: LD2_8B
-/* 3929 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 3941
-/* 3933 */ MCD_OPC_CheckPredicate, 0, 213, 163, // Skip to: 45878
-/* 3937 */ MCD_OPC_Decode, 153, 8, 34, // Opcode: LD2_4H
-/* 3941 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 3953
-/* 3945 */ MCD_OPC_CheckPredicate, 0, 201, 163, // Skip to: 45878
-/* 3949 */ MCD_OPC_Decode, 152, 8, 34, // Opcode: LD2_2S
-/* 3953 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 3965
-/* 3957 */ MCD_OPC_CheckPredicate, 0, 189, 163, // Skip to: 45878
-/* 3961 */ MCD_OPC_Decode, 178, 7, 34, // Opcode: LD1x2_8B
-/* 3965 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 3977
-/* 3969 */ MCD_OPC_CheckPredicate, 0, 177, 163, // Skip to: 45878
-/* 3973 */ MCD_OPC_Decode, 176, 7, 34, // Opcode: LD1x2_4H
-/* 3977 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 3989
-/* 3981 */ MCD_OPC_CheckPredicate, 0, 165, 163, // Skip to: 45878
-/* 3985 */ MCD_OPC_Decode, 175, 7, 34, // Opcode: LD1x2_2S
-/* 3989 */ MCD_OPC_FilterValue, 43, 157, 163, // Skip to: 45878
-/* 3993 */ MCD_OPC_CheckPredicate, 0, 153, 163, // Skip to: 45878
-/* 3997 */ MCD_OPC_Decode, 173, 7, 34, // Opcode: LD1x2_1D
-/* 4001 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 4013
-/* 4005 */ MCD_OPC_CheckPredicate, 1, 141, 163, // Skip to: 45878
-/* 4009 */ MCD_OPC_Decode, 200, 10, 1, // Opcode: LSFPPair32_NonTemp_LDR
-/* 4013 */ MCD_OPC_FilterValue, 2, 83, 1, // Skip to: 4356
-/* 4017 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
-/* 4020 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 4032
-/* 4024 */ MCD_OPC_CheckPredicate, 0, 122, 163, // Skip to: 45878
-/* 4028 */ MCD_OPC_Decode, 136, 9, 35, // Opcode: LD4_16B
-/* 4032 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 4044
-/* 4036 */ MCD_OPC_CheckPredicate, 0, 110, 163, // Skip to: 45878
-/* 4040 */ MCD_OPC_Decode, 142, 9, 35, // Opcode: LD4_8H
-/* 4044 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 4056
-/* 4048 */ MCD_OPC_CheckPredicate, 0, 98, 163, // Skip to: 45878
-/* 4052 */ MCD_OPC_Decode, 140, 9, 35, // Opcode: LD4_4S
-/* 4056 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 4068
-/* 4060 */ MCD_OPC_CheckPredicate, 0, 86, 163, // Skip to: 45878
-/* 4064 */ MCD_OPC_Decode, 137, 9, 35, // Opcode: LD4_2D
-/* 4068 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 4080
-/* 4072 */ MCD_OPC_CheckPredicate, 0, 74, 163, // Skip to: 45878
-/* 4076 */ MCD_OPC_Decode, 220, 7, 35, // Opcode: LD1x4_16B
-/* 4080 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 4092
-/* 4084 */ MCD_OPC_CheckPredicate, 0, 62, 163, // Skip to: 45878
-/* 4088 */ MCD_OPC_Decode, 227, 7, 35, // Opcode: LD1x4_8H
-/* 4092 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 4104
-/* 4096 */ MCD_OPC_CheckPredicate, 0, 50, 163, // Skip to: 45878
-/* 4100 */ MCD_OPC_Decode, 225, 7, 35, // Opcode: LD1x4_4S
-/* 4104 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 4116
-/* 4108 */ MCD_OPC_CheckPredicate, 0, 38, 163, // Skip to: 45878
-/* 4112 */ MCD_OPC_Decode, 222, 7, 35, // Opcode: LD1x4_2D
-/* 4116 */ MCD_OPC_FilterValue, 16, 8, 0, // Skip to: 4128
-/* 4120 */ MCD_OPC_CheckPredicate, 0, 26, 163, // Skip to: 45878
-/* 4124 */ MCD_OPC_Decode, 207, 8, 36, // Opcode: LD3_16B
-/* 4128 */ MCD_OPC_FilterValue, 17, 8, 0, // Skip to: 4140
-/* 4132 */ MCD_OPC_CheckPredicate, 0, 14, 163, // Skip to: 45878
-/* 4136 */ MCD_OPC_Decode, 213, 8, 36, // Opcode: LD3_8H
-/* 4140 */ MCD_OPC_FilterValue, 18, 8, 0, // Skip to: 4152
-/* 4144 */ MCD_OPC_CheckPredicate, 0, 2, 163, // Skip to: 45878
-/* 4148 */ MCD_OPC_Decode, 211, 8, 36, // Opcode: LD3_4S
-/* 4152 */ MCD_OPC_FilterValue, 19, 8, 0, // Skip to: 4164
-/* 4156 */ MCD_OPC_CheckPredicate, 0, 246, 162, // Skip to: 45878
-/* 4160 */ MCD_OPC_Decode, 208, 8, 36, // Opcode: LD3_2D
-/* 4164 */ MCD_OPC_FilterValue, 24, 8, 0, // Skip to: 4176
-/* 4168 */ MCD_OPC_CheckPredicate, 0, 234, 162, // Skip to: 45878
-/* 4172 */ MCD_OPC_Decode, 196, 7, 36, // Opcode: LD1x3_16B
-/* 4176 */ MCD_OPC_FilterValue, 25, 8, 0, // Skip to: 4188
-/* 4180 */ MCD_OPC_CheckPredicate, 0, 222, 162, // Skip to: 45878
-/* 4184 */ MCD_OPC_Decode, 203, 7, 36, // Opcode: LD1x3_8H
-/* 4188 */ MCD_OPC_FilterValue, 26, 8, 0, // Skip to: 4200
-/* 4192 */ MCD_OPC_CheckPredicate, 0, 210, 162, // Skip to: 45878
-/* 4196 */ MCD_OPC_Decode, 201, 7, 36, // Opcode: LD1x3_4S
-/* 4200 */ MCD_OPC_FilterValue, 27, 8, 0, // Skip to: 4212
-/* 4204 */ MCD_OPC_CheckPredicate, 0, 198, 162, // Skip to: 45878
-/* 4208 */ MCD_OPC_Decode, 198, 7, 36, // Opcode: LD1x3_2D
-/* 4212 */ MCD_OPC_FilterValue, 28, 8, 0, // Skip to: 4224
-/* 4216 */ MCD_OPC_CheckPredicate, 0, 186, 162, // Skip to: 45878
-/* 4220 */ MCD_OPC_Decode, 148, 7, 37, // Opcode: LD1_16B
-/* 4224 */ MCD_OPC_FilterValue, 29, 8, 0, // Skip to: 4236
-/* 4228 */ MCD_OPC_CheckPredicate, 0, 174, 162, // Skip to: 45878
-/* 4232 */ MCD_OPC_Decode, 155, 7, 37, // Opcode: LD1_8H
-/* 4236 */ MCD_OPC_FilterValue, 30, 8, 0, // Skip to: 4248
-/* 4240 */ MCD_OPC_CheckPredicate, 0, 162, 162, // Skip to: 45878
-/* 4244 */ MCD_OPC_Decode, 153, 7, 37, // Opcode: LD1_4S
-/* 4248 */ MCD_OPC_FilterValue, 31, 8, 0, // Skip to: 4260
-/* 4252 */ MCD_OPC_CheckPredicate, 0, 150, 162, // Skip to: 45878
-/* 4256 */ MCD_OPC_Decode, 150, 7, 37, // Opcode: LD1_2D
-/* 4260 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 4272
-/* 4264 */ MCD_OPC_CheckPredicate, 0, 138, 162, // Skip to: 45878
-/* 4268 */ MCD_OPC_Decode, 150, 8, 38, // Opcode: LD2_16B
-/* 4272 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 4284
-/* 4276 */ MCD_OPC_CheckPredicate, 0, 126, 162, // Skip to: 45878
-/* 4280 */ MCD_OPC_Decode, 156, 8, 38, // Opcode: LD2_8H
-/* 4284 */ MCD_OPC_FilterValue, 34, 8, 0, // Skip to: 4296
-/* 4288 */ MCD_OPC_CheckPredicate, 0, 114, 162, // Skip to: 45878
-/* 4292 */ MCD_OPC_Decode, 154, 8, 38, // Opcode: LD2_4S
-/* 4296 */ MCD_OPC_FilterValue, 35, 8, 0, // Skip to: 4308
-/* 4300 */ MCD_OPC_CheckPredicate, 0, 102, 162, // Skip to: 45878
-/* 4304 */ MCD_OPC_Decode, 151, 8, 38, // Opcode: LD2_2D
-/* 4308 */ MCD_OPC_FilterValue, 40, 8, 0, // Skip to: 4320
-/* 4312 */ MCD_OPC_CheckPredicate, 0, 90, 162, // Skip to: 45878
-/* 4316 */ MCD_OPC_Decode, 172, 7, 38, // Opcode: LD1x2_16B
-/* 4320 */ MCD_OPC_FilterValue, 41, 8, 0, // Skip to: 4332
-/* 4324 */ MCD_OPC_CheckPredicate, 0, 78, 162, // Skip to: 45878
-/* 4328 */ MCD_OPC_Decode, 179, 7, 38, // Opcode: LD1x2_8H
-/* 4332 */ MCD_OPC_FilterValue, 42, 8, 0, // Skip to: 4344
-/* 4336 */ MCD_OPC_CheckPredicate, 0, 66, 162, // Skip to: 45878
-/* 4340 */ MCD_OPC_Decode, 177, 7, 38, // Opcode: LD1x2_4S
-/* 4344 */ MCD_OPC_FilterValue, 43, 58, 162, // Skip to: 45878
-/* 4348 */ MCD_OPC_CheckPredicate, 0, 54, 162, // Skip to: 45878
-/* 4352 */ MCD_OPC_Decode, 174, 7, 38, // Opcode: LD1x2_2D
-/* 4356 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 4368
-/* 4360 */ MCD_OPC_CheckPredicate, 1, 42, 162, // Skip to: 45878
-/* 4364 */ MCD_OPC_Decode, 208, 10, 1, // Opcode: LSFPPair64_NonTemp_LDR
-/* 4368 */ MCD_OPC_FilterValue, 5, 34, 162, // Skip to: 45878
-/* 4372 */ MCD_OPC_CheckPredicate, 1, 30, 162, // Skip to: 45878
-/* 4376 */ MCD_OPC_Decode, 192, 10, 1, // Opcode: LSFPPair128_NonTemp_LDR
-/* 4380 */ MCD_OPC_FilterValue, 2, 10, 7, // Skip to: 6186
-/* 4384 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 4387 */ MCD_OPC_FilterValue, 0, 60, 3, // Skip to: 5219
-/* 4391 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 4394 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 4427
-/* 4398 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4401 */ MCD_OPC_FilterValue, 0, 1, 162, // Skip to: 45878
-/* 4405 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4419
-/* 4409 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4419
-/* 4415 */ MCD_OPC_Decode, 191, 17, 39, // Opcode: ST4WB_8B_fixed
-/* 4419 */ MCD_OPC_CheckPredicate, 0, 239, 161, // Skip to: 45878
-/* 4423 */ MCD_OPC_Decode, 192, 17, 39, // Opcode: ST4WB_8B_register
-/* 4427 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 4460
-/* 4431 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4434 */ MCD_OPC_FilterValue, 0, 224, 161, // Skip to: 45878
-/* 4438 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4452
-/* 4442 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4452
-/* 4448 */ MCD_OPC_Decode, 187, 17, 39, // Opcode: ST4WB_4H_fixed
-/* 4452 */ MCD_OPC_CheckPredicate, 0, 206, 161, // Skip to: 45878
-/* 4456 */ MCD_OPC_Decode, 188, 17, 39, // Opcode: ST4WB_4H_register
-/* 4460 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 4493
-/* 4464 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4467 */ MCD_OPC_FilterValue, 0, 191, 161, // Skip to: 45878
-/* 4471 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4485
-/* 4475 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4485
-/* 4481 */ MCD_OPC_Decode, 185, 17, 39, // Opcode: ST4WB_2S_fixed
-/* 4485 */ MCD_OPC_CheckPredicate, 0, 173, 161, // Skip to: 45878
-/* 4489 */ MCD_OPC_Decode, 186, 17, 39, // Opcode: ST4WB_2S_register
-/* 4493 */ MCD_OPC_FilterValue, 8, 29, 0, // Skip to: 4526
-/* 4497 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4500 */ MCD_OPC_FilterValue, 0, 158, 161, // Skip to: 45878
-/* 4504 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4518
-/* 4508 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4518
-/* 4514 */ MCD_OPC_Decode, 219, 16, 39, // Opcode: ST1x4WB_8B_fixed
-/* 4518 */ MCD_OPC_CheckPredicate, 0, 140, 161, // Skip to: 45878
-/* 4522 */ MCD_OPC_Decode, 220, 16, 39, // Opcode: ST1x4WB_8B_register
-/* 4526 */ MCD_OPC_FilterValue, 9, 29, 0, // Skip to: 4559
-/* 4530 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4533 */ MCD_OPC_FilterValue, 0, 125, 161, // Skip to: 45878
-/* 4537 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4551
-/* 4541 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4551
-/* 4547 */ MCD_OPC_Decode, 215, 16, 39, // Opcode: ST1x4WB_4H_fixed
-/* 4551 */ MCD_OPC_CheckPredicate, 0, 107, 161, // Skip to: 45878
-/* 4555 */ MCD_OPC_Decode, 216, 16, 39, // Opcode: ST1x4WB_4H_register
-/* 4559 */ MCD_OPC_FilterValue, 10, 29, 0, // Skip to: 4592
-/* 4563 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4566 */ MCD_OPC_FilterValue, 0, 92, 161, // Skip to: 45878
-/* 4570 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4584
-/* 4574 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4584
-/* 4580 */ MCD_OPC_Decode, 213, 16, 39, // Opcode: ST1x4WB_2S_fixed
-/* 4584 */ MCD_OPC_CheckPredicate, 0, 74, 161, // Skip to: 45878
-/* 4588 */ MCD_OPC_Decode, 214, 16, 39, // Opcode: ST1x4WB_2S_register
-/* 4592 */ MCD_OPC_FilterValue, 11, 29, 0, // Skip to: 4625
-/* 4596 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4599 */ MCD_OPC_FilterValue, 0, 59, 161, // Skip to: 45878
-/* 4603 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4617
-/* 4607 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4617
-/* 4613 */ MCD_OPC_Decode, 209, 16, 39, // Opcode: ST1x4WB_1D_fixed
-/* 4617 */ MCD_OPC_CheckPredicate, 0, 41, 161, // Skip to: 45878
-/* 4621 */ MCD_OPC_Decode, 210, 16, 39, // Opcode: ST1x4WB_1D_register
-/* 4625 */ MCD_OPC_FilterValue, 16, 29, 0, // Skip to: 4658
-/* 4629 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4632 */ MCD_OPC_FilterValue, 0, 26, 161, // Skip to: 45878
-/* 4636 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4650
-/* 4640 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4650
-/* 4646 */ MCD_OPC_Decode, 158, 17, 39, // Opcode: ST3WB_8B_fixed
-/* 4650 */ MCD_OPC_CheckPredicate, 0, 8, 161, // Skip to: 45878
-/* 4654 */ MCD_OPC_Decode, 159, 17, 39, // Opcode: ST3WB_8B_register
-/* 4658 */ MCD_OPC_FilterValue, 17, 29, 0, // Skip to: 4691
-/* 4662 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4665 */ MCD_OPC_FilterValue, 0, 249, 160, // Skip to: 45878
-/* 4669 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4683
-/* 4673 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4683
-/* 4679 */ MCD_OPC_Decode, 154, 17, 39, // Opcode: ST3WB_4H_fixed
-/* 4683 */ MCD_OPC_CheckPredicate, 0, 231, 160, // Skip to: 45878
-/* 4687 */ MCD_OPC_Decode, 155, 17, 39, // Opcode: ST3WB_4H_register
-/* 4691 */ MCD_OPC_FilterValue, 18, 29, 0, // Skip to: 4724
-/* 4695 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4698 */ MCD_OPC_FilterValue, 0, 216, 160, // Skip to: 45878
-/* 4702 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4716
-/* 4706 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4716
-/* 4712 */ MCD_OPC_Decode, 152, 17, 39, // Opcode: ST3WB_2S_fixed
-/* 4716 */ MCD_OPC_CheckPredicate, 0, 198, 160, // Skip to: 45878
-/* 4720 */ MCD_OPC_Decode, 153, 17, 39, // Opcode: ST3WB_2S_register
-/* 4724 */ MCD_OPC_FilterValue, 24, 29, 0, // Skip to: 4757
-/* 4728 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4731 */ MCD_OPC_FilterValue, 0, 183, 160, // Skip to: 45878
-/* 4735 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4749
-/* 4739 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4749
-/* 4745 */ MCD_OPC_Decode, 195, 16, 39, // Opcode: ST1x3WB_8B_fixed
-/* 4749 */ MCD_OPC_CheckPredicate, 0, 165, 160, // Skip to: 45878
-/* 4753 */ MCD_OPC_Decode, 196, 16, 39, // Opcode: ST1x3WB_8B_register
-/* 4757 */ MCD_OPC_FilterValue, 25, 29, 0, // Skip to: 4790
-/* 4761 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4764 */ MCD_OPC_FilterValue, 0, 150, 160, // Skip to: 45878
-/* 4768 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4782
-/* 4772 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4782
-/* 4778 */ MCD_OPC_Decode, 191, 16, 39, // Opcode: ST1x3WB_4H_fixed
-/* 4782 */ MCD_OPC_CheckPredicate, 0, 132, 160, // Skip to: 45878
-/* 4786 */ MCD_OPC_Decode, 192, 16, 39, // Opcode: ST1x3WB_4H_register
-/* 4790 */ MCD_OPC_FilterValue, 26, 29, 0, // Skip to: 4823
-/* 4794 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4797 */ MCD_OPC_FilterValue, 0, 117, 160, // Skip to: 45878
-/* 4801 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4815
-/* 4805 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4815
-/* 4811 */ MCD_OPC_Decode, 189, 16, 39, // Opcode: ST1x3WB_2S_fixed
-/* 4815 */ MCD_OPC_CheckPredicate, 0, 99, 160, // Skip to: 45878
-/* 4819 */ MCD_OPC_Decode, 190, 16, 39, // Opcode: ST1x3WB_2S_register
-/* 4823 */ MCD_OPC_FilterValue, 27, 29, 0, // Skip to: 4856
-/* 4827 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4830 */ MCD_OPC_FilterValue, 0, 84, 160, // Skip to: 45878
-/* 4834 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4848
-/* 4838 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4848
-/* 4844 */ MCD_OPC_Decode, 185, 16, 39, // Opcode: ST1x3WB_1D_fixed
-/* 4848 */ MCD_OPC_CheckPredicate, 0, 66, 160, // Skip to: 45878
-/* 4852 */ MCD_OPC_Decode, 186, 16, 39, // Opcode: ST1x3WB_1D_register
-/* 4856 */ MCD_OPC_FilterValue, 28, 29, 0, // Skip to: 4889
-/* 4860 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4863 */ MCD_OPC_FilterValue, 0, 51, 160, // Skip to: 45878
-/* 4867 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4881
-/* 4871 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4881
-/* 4877 */ MCD_OPC_Decode, 147, 16, 39, // Opcode: ST1WB_8B_fixed
-/* 4881 */ MCD_OPC_CheckPredicate, 0, 33, 160, // Skip to: 45878
-/* 4885 */ MCD_OPC_Decode, 148, 16, 39, // Opcode: ST1WB_8B_register
-/* 4889 */ MCD_OPC_FilterValue, 29, 29, 0, // Skip to: 4922
-/* 4893 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4896 */ MCD_OPC_FilterValue, 0, 18, 160, // Skip to: 45878
-/* 4900 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4914
-/* 4904 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4914
-/* 4910 */ MCD_OPC_Decode, 143, 16, 39, // Opcode: ST1WB_4H_fixed
-/* 4914 */ MCD_OPC_CheckPredicate, 0, 0, 160, // Skip to: 45878
-/* 4918 */ MCD_OPC_Decode, 144, 16, 39, // Opcode: ST1WB_4H_register
-/* 4922 */ MCD_OPC_FilterValue, 30, 29, 0, // Skip to: 4955
-/* 4926 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4929 */ MCD_OPC_FilterValue, 0, 241, 159, // Skip to: 45878
-/* 4933 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4947
-/* 4937 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4947
-/* 4943 */ MCD_OPC_Decode, 141, 16, 39, // Opcode: ST1WB_2S_fixed
-/* 4947 */ MCD_OPC_CheckPredicate, 0, 223, 159, // Skip to: 45878
-/* 4951 */ MCD_OPC_Decode, 142, 16, 39, // Opcode: ST1WB_2S_register
-/* 4955 */ MCD_OPC_FilterValue, 31, 29, 0, // Skip to: 4988
-/* 4959 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4962 */ MCD_OPC_FilterValue, 0, 208, 159, // Skip to: 45878
-/* 4966 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 4980
-/* 4970 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 4980
-/* 4976 */ MCD_OPC_Decode, 137, 16, 39, // Opcode: ST1WB_1D_fixed
-/* 4980 */ MCD_OPC_CheckPredicate, 0, 190, 159, // Skip to: 45878
-/* 4984 */ MCD_OPC_Decode, 138, 16, 39, // Opcode: ST1WB_1D_register
-/* 4988 */ MCD_OPC_FilterValue, 32, 29, 0, // Skip to: 5021
-/* 4992 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 4995 */ MCD_OPC_FilterValue, 0, 175, 159, // Skip to: 45878
-/* 4999 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5013
-/* 5003 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5013
-/* 5009 */ MCD_OPC_Decode, 253, 16, 39, // Opcode: ST2WB_8B_fixed
-/* 5013 */ MCD_OPC_CheckPredicate, 0, 157, 159, // Skip to: 45878
-/* 5017 */ MCD_OPC_Decode, 254, 16, 39, // Opcode: ST2WB_8B_register
-/* 5021 */ MCD_OPC_FilterValue, 33, 29, 0, // Skip to: 5054
-/* 5025 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5028 */ MCD_OPC_FilterValue, 0, 142, 159, // Skip to: 45878
-/* 5032 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5046
-/* 5036 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5046
-/* 5042 */ MCD_OPC_Decode, 249, 16, 39, // Opcode: ST2WB_4H_fixed
-/* 5046 */ MCD_OPC_CheckPredicate, 0, 124, 159, // Skip to: 45878
-/* 5050 */ MCD_OPC_Decode, 250, 16, 39, // Opcode: ST2WB_4H_register
-/* 5054 */ MCD_OPC_FilterValue, 34, 29, 0, // Skip to: 5087
-/* 5058 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5061 */ MCD_OPC_FilterValue, 0, 109, 159, // Skip to: 45878
-/* 5065 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5079
-/* 5069 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5079
-/* 5075 */ MCD_OPC_Decode, 247, 16, 39, // Opcode: ST2WB_2S_fixed
-/* 5079 */ MCD_OPC_CheckPredicate, 0, 91, 159, // Skip to: 45878
-/* 5083 */ MCD_OPC_Decode, 248, 16, 39, // Opcode: ST2WB_2S_register
-/* 5087 */ MCD_OPC_FilterValue, 40, 29, 0, // Skip to: 5120
-/* 5091 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5094 */ MCD_OPC_FilterValue, 0, 76, 159, // Skip to: 45878
-/* 5098 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5112
-/* 5102 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5112
-/* 5108 */ MCD_OPC_Decode, 171, 16, 39, // Opcode: ST1x2WB_8B_fixed
-/* 5112 */ MCD_OPC_CheckPredicate, 0, 58, 159, // Skip to: 45878
-/* 5116 */ MCD_OPC_Decode, 172, 16, 39, // Opcode: ST1x2WB_8B_register
-/* 5120 */ MCD_OPC_FilterValue, 41, 29, 0, // Skip to: 5153
-/* 5124 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5127 */ MCD_OPC_FilterValue, 0, 43, 159, // Skip to: 45878
-/* 5131 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5145
-/* 5135 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5145
-/* 5141 */ MCD_OPC_Decode, 167, 16, 39, // Opcode: ST1x2WB_4H_fixed
-/* 5145 */ MCD_OPC_CheckPredicate, 0, 25, 159, // Skip to: 45878
-/* 5149 */ MCD_OPC_Decode, 168, 16, 39, // Opcode: ST1x2WB_4H_register
-/* 5153 */ MCD_OPC_FilterValue, 42, 29, 0, // Skip to: 5186
-/* 5157 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5160 */ MCD_OPC_FilterValue, 0, 10, 159, // Skip to: 45878
-/* 5164 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5178
-/* 5168 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5178
-/* 5174 */ MCD_OPC_Decode, 165, 16, 39, // Opcode: ST1x2WB_2S_fixed
-/* 5178 */ MCD_OPC_CheckPredicate, 0, 248, 158, // Skip to: 45878
-/* 5182 */ MCD_OPC_Decode, 166, 16, 39, // Opcode: ST1x2WB_2S_register
-/* 5186 */ MCD_OPC_FilterValue, 43, 240, 158, // Skip to: 45878
-/* 5190 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5193 */ MCD_OPC_FilterValue, 0, 233, 158, // Skip to: 45878
-/* 5197 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5211
-/* 5201 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5211
-/* 5207 */ MCD_OPC_Decode, 161, 16, 39, // Opcode: ST1x2WB_1D_fixed
-/* 5211 */ MCD_OPC_CheckPredicate, 0, 215, 158, // Skip to: 45878
-/* 5215 */ MCD_OPC_Decode, 162, 16, 39, // Opcode: ST1x2WB_1D_register
-/* 5219 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 5231
-/* 5223 */ MCD_OPC_CheckPredicate, 1, 203, 158, // Skip to: 45878
-/* 5227 */ MCD_OPC_Decode, 203, 10, 1, // Opcode: LSFPPair32_PostInd_STR
-/* 5231 */ MCD_OPC_FilterValue, 2, 159, 3, // Skip to: 6162
-/* 5235 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 5238 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 5271
-/* 5242 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5245 */ MCD_OPC_FilterValue, 0, 181, 158, // Skip to: 45878
-/* 5249 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5263
-/* 5253 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5263
-/* 5259 */ MCD_OPC_Decode, 181, 17, 39, // Opcode: ST4WB_16B_fixed
-/* 5263 */ MCD_OPC_CheckPredicate, 0, 163, 158, // Skip to: 45878
-/* 5267 */ MCD_OPC_Decode, 182, 17, 39, // Opcode: ST4WB_16B_register
-/* 5271 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 5304
-/* 5275 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5278 */ MCD_OPC_FilterValue, 0, 148, 158, // Skip to: 45878
-/* 5282 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5296
-/* 5286 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5296
-/* 5292 */ MCD_OPC_Decode, 193, 17, 39, // Opcode: ST4WB_8H_fixed
-/* 5296 */ MCD_OPC_CheckPredicate, 0, 130, 158, // Skip to: 45878
-/* 5300 */ MCD_OPC_Decode, 194, 17, 39, // Opcode: ST4WB_8H_register
-/* 5304 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 5337
-/* 5308 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5311 */ MCD_OPC_FilterValue, 0, 115, 158, // Skip to: 45878
-/* 5315 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5329
-/* 5319 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5329
-/* 5325 */ MCD_OPC_Decode, 189, 17, 39, // Opcode: ST4WB_4S_fixed
-/* 5329 */ MCD_OPC_CheckPredicate, 0, 97, 158, // Skip to: 45878
-/* 5333 */ MCD_OPC_Decode, 190, 17, 39, // Opcode: ST4WB_4S_register
-/* 5337 */ MCD_OPC_FilterValue, 3, 29, 0, // Skip to: 5370
-/* 5341 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5344 */ MCD_OPC_FilterValue, 0, 82, 158, // Skip to: 45878
-/* 5348 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5362
-/* 5352 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5362
-/* 5358 */ MCD_OPC_Decode, 183, 17, 39, // Opcode: ST4WB_2D_fixed
-/* 5362 */ MCD_OPC_CheckPredicate, 0, 64, 158, // Skip to: 45878
-/* 5366 */ MCD_OPC_Decode, 184, 17, 39, // Opcode: ST4WB_2D_register
-/* 5370 */ MCD_OPC_FilterValue, 8, 29, 0, // Skip to: 5403
-/* 5374 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5377 */ MCD_OPC_FilterValue, 0, 49, 158, // Skip to: 45878
-/* 5381 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5395
-/* 5385 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5395
-/* 5391 */ MCD_OPC_Decode, 207, 16, 39, // Opcode: ST1x4WB_16B_fixed
-/* 5395 */ MCD_OPC_CheckPredicate, 0, 31, 158, // Skip to: 45878
-/* 5399 */ MCD_OPC_Decode, 208, 16, 39, // Opcode: ST1x4WB_16B_register
-/* 5403 */ MCD_OPC_FilterValue, 9, 29, 0, // Skip to: 5436
-/* 5407 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5410 */ MCD_OPC_FilterValue, 0, 16, 158, // Skip to: 45878
-/* 5414 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5428
-/* 5418 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5428
-/* 5424 */ MCD_OPC_Decode, 221, 16, 39, // Opcode: ST1x4WB_8H_fixed
-/* 5428 */ MCD_OPC_CheckPredicate, 0, 254, 157, // Skip to: 45878
-/* 5432 */ MCD_OPC_Decode, 222, 16, 39, // Opcode: ST1x4WB_8H_register
-/* 5436 */ MCD_OPC_FilterValue, 10, 29, 0, // Skip to: 5469
-/* 5440 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5443 */ MCD_OPC_FilterValue, 0, 239, 157, // Skip to: 45878
-/* 5447 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5461
-/* 5451 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5461
-/* 5457 */ MCD_OPC_Decode, 217, 16, 39, // Opcode: ST1x4WB_4S_fixed
-/* 5461 */ MCD_OPC_CheckPredicate, 0, 221, 157, // Skip to: 45878
-/* 5465 */ MCD_OPC_Decode, 218, 16, 39, // Opcode: ST1x4WB_4S_register
-/* 5469 */ MCD_OPC_FilterValue, 11, 29, 0, // Skip to: 5502
-/* 5473 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5476 */ MCD_OPC_FilterValue, 0, 206, 157, // Skip to: 45878
-/* 5480 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5494
-/* 5484 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5494
-/* 5490 */ MCD_OPC_Decode, 211, 16, 39, // Opcode: ST1x4WB_2D_fixed
-/* 5494 */ MCD_OPC_CheckPredicate, 0, 188, 157, // Skip to: 45878
-/* 5498 */ MCD_OPC_Decode, 212, 16, 39, // Opcode: ST1x4WB_2D_register
-/* 5502 */ MCD_OPC_FilterValue, 16, 29, 0, // Skip to: 5535
-/* 5506 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5509 */ MCD_OPC_FilterValue, 0, 173, 157, // Skip to: 45878
-/* 5513 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5527
-/* 5517 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5527
-/* 5523 */ MCD_OPC_Decode, 148, 17, 39, // Opcode: ST3WB_16B_fixed
-/* 5527 */ MCD_OPC_CheckPredicate, 0, 155, 157, // Skip to: 45878
-/* 5531 */ MCD_OPC_Decode, 149, 17, 39, // Opcode: ST3WB_16B_register
-/* 5535 */ MCD_OPC_FilterValue, 17, 29, 0, // Skip to: 5568
-/* 5539 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5542 */ MCD_OPC_FilterValue, 0, 140, 157, // Skip to: 45878
-/* 5546 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5560
-/* 5550 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5560
-/* 5556 */ MCD_OPC_Decode, 160, 17, 39, // Opcode: ST3WB_8H_fixed
-/* 5560 */ MCD_OPC_CheckPredicate, 0, 122, 157, // Skip to: 45878
-/* 5564 */ MCD_OPC_Decode, 161, 17, 39, // Opcode: ST3WB_8H_register
-/* 5568 */ MCD_OPC_FilterValue, 18, 29, 0, // Skip to: 5601
-/* 5572 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5575 */ MCD_OPC_FilterValue, 0, 107, 157, // Skip to: 45878
-/* 5579 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5593
-/* 5583 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5593
-/* 5589 */ MCD_OPC_Decode, 156, 17, 39, // Opcode: ST3WB_4S_fixed
-/* 5593 */ MCD_OPC_CheckPredicate, 0, 89, 157, // Skip to: 45878
-/* 5597 */ MCD_OPC_Decode, 157, 17, 39, // Opcode: ST3WB_4S_register
-/* 5601 */ MCD_OPC_FilterValue, 19, 29, 0, // Skip to: 5634
-/* 5605 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5608 */ MCD_OPC_FilterValue, 0, 74, 157, // Skip to: 45878
-/* 5612 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5626
-/* 5616 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5626
-/* 5622 */ MCD_OPC_Decode, 150, 17, 39, // Opcode: ST3WB_2D_fixed
-/* 5626 */ MCD_OPC_CheckPredicate, 0, 56, 157, // Skip to: 45878
-/* 5630 */ MCD_OPC_Decode, 151, 17, 39, // Opcode: ST3WB_2D_register
-/* 5634 */ MCD_OPC_FilterValue, 24, 29, 0, // Skip to: 5667
-/* 5638 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5641 */ MCD_OPC_FilterValue, 0, 41, 157, // Skip to: 45878
-/* 5645 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5659
-/* 5649 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5659
-/* 5655 */ MCD_OPC_Decode, 183, 16, 39, // Opcode: ST1x3WB_16B_fixed
-/* 5659 */ MCD_OPC_CheckPredicate, 0, 23, 157, // Skip to: 45878
-/* 5663 */ MCD_OPC_Decode, 184, 16, 39, // Opcode: ST1x3WB_16B_register
-/* 5667 */ MCD_OPC_FilterValue, 25, 29, 0, // Skip to: 5700
-/* 5671 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5674 */ MCD_OPC_FilterValue, 0, 8, 157, // Skip to: 45878
-/* 5678 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5692
-/* 5682 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5692
-/* 5688 */ MCD_OPC_Decode, 197, 16, 39, // Opcode: ST1x3WB_8H_fixed
-/* 5692 */ MCD_OPC_CheckPredicate, 0, 246, 156, // Skip to: 45878
-/* 5696 */ MCD_OPC_Decode, 198, 16, 39, // Opcode: ST1x3WB_8H_register
-/* 5700 */ MCD_OPC_FilterValue, 26, 29, 0, // Skip to: 5733
-/* 5704 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5707 */ MCD_OPC_FilterValue, 0, 231, 156, // Skip to: 45878
-/* 5711 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5725
-/* 5715 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5725
-/* 5721 */ MCD_OPC_Decode, 193, 16, 39, // Opcode: ST1x3WB_4S_fixed
-/* 5725 */ MCD_OPC_CheckPredicate, 0, 213, 156, // Skip to: 45878
-/* 5729 */ MCD_OPC_Decode, 194, 16, 39, // Opcode: ST1x3WB_4S_register
-/* 5733 */ MCD_OPC_FilterValue, 27, 29, 0, // Skip to: 5766
-/* 5737 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5740 */ MCD_OPC_FilterValue, 0, 198, 156, // Skip to: 45878
-/* 5744 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5758
-/* 5748 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5758
-/* 5754 */ MCD_OPC_Decode, 187, 16, 39, // Opcode: ST1x3WB_2D_fixed
-/* 5758 */ MCD_OPC_CheckPredicate, 0, 180, 156, // Skip to: 45878
-/* 5762 */ MCD_OPC_Decode, 188, 16, 39, // Opcode: ST1x3WB_2D_register
-/* 5766 */ MCD_OPC_FilterValue, 28, 29, 0, // Skip to: 5799
-/* 5770 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5773 */ MCD_OPC_FilterValue, 0, 165, 156, // Skip to: 45878
-/* 5777 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5791
-/* 5781 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5791
-/* 5787 */ MCD_OPC_Decode, 135, 16, 39, // Opcode: ST1WB_16B_fixed
-/* 5791 */ MCD_OPC_CheckPredicate, 0, 147, 156, // Skip to: 45878
-/* 5795 */ MCD_OPC_Decode, 136, 16, 39, // Opcode: ST1WB_16B_register
-/* 5799 */ MCD_OPC_FilterValue, 29, 29, 0, // Skip to: 5832
-/* 5803 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5806 */ MCD_OPC_FilterValue, 0, 132, 156, // Skip to: 45878
-/* 5810 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5824
-/* 5814 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5824
-/* 5820 */ MCD_OPC_Decode, 149, 16, 39, // Opcode: ST1WB_8H_fixed
-/* 5824 */ MCD_OPC_CheckPredicate, 0, 114, 156, // Skip to: 45878
-/* 5828 */ MCD_OPC_Decode, 150, 16, 39, // Opcode: ST1WB_8H_register
-/* 5832 */ MCD_OPC_FilterValue, 30, 29, 0, // Skip to: 5865
-/* 5836 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5839 */ MCD_OPC_FilterValue, 0, 99, 156, // Skip to: 45878
-/* 5843 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5857
-/* 5847 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5857
-/* 5853 */ MCD_OPC_Decode, 145, 16, 39, // Opcode: ST1WB_4S_fixed
-/* 5857 */ MCD_OPC_CheckPredicate, 0, 81, 156, // Skip to: 45878
-/* 5861 */ MCD_OPC_Decode, 146, 16, 39, // Opcode: ST1WB_4S_register
-/* 5865 */ MCD_OPC_FilterValue, 31, 29, 0, // Skip to: 5898
-/* 5869 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5872 */ MCD_OPC_FilterValue, 0, 66, 156, // Skip to: 45878
-/* 5876 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5890
-/* 5880 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5890
-/* 5886 */ MCD_OPC_Decode, 139, 16, 39, // Opcode: ST1WB_2D_fixed
-/* 5890 */ MCD_OPC_CheckPredicate, 0, 48, 156, // Skip to: 45878
-/* 5894 */ MCD_OPC_Decode, 140, 16, 39, // Opcode: ST1WB_2D_register
-/* 5898 */ MCD_OPC_FilterValue, 32, 29, 0, // Skip to: 5931
-/* 5902 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5905 */ MCD_OPC_FilterValue, 0, 33, 156, // Skip to: 45878
-/* 5909 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5923
-/* 5913 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5923
-/* 5919 */ MCD_OPC_Decode, 243, 16, 39, // Opcode: ST2WB_16B_fixed
-/* 5923 */ MCD_OPC_CheckPredicate, 0, 15, 156, // Skip to: 45878
-/* 5927 */ MCD_OPC_Decode, 244, 16, 39, // Opcode: ST2WB_16B_register
-/* 5931 */ MCD_OPC_FilterValue, 33, 29, 0, // Skip to: 5964
-/* 5935 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5938 */ MCD_OPC_FilterValue, 0, 0, 156, // Skip to: 45878
-/* 5942 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5956
-/* 5946 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5956
-/* 5952 */ MCD_OPC_Decode, 255, 16, 39, // Opcode: ST2WB_8H_fixed
-/* 5956 */ MCD_OPC_CheckPredicate, 0, 238, 155, // Skip to: 45878
-/* 5960 */ MCD_OPC_Decode, 128, 17, 39, // Opcode: ST2WB_8H_register
-/* 5964 */ MCD_OPC_FilterValue, 34, 29, 0, // Skip to: 5997
-/* 5968 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 5971 */ MCD_OPC_FilterValue, 0, 223, 155, // Skip to: 45878
-/* 5975 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 5989
-/* 5979 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 5989
-/* 5985 */ MCD_OPC_Decode, 251, 16, 39, // Opcode: ST2WB_4S_fixed
-/* 5989 */ MCD_OPC_CheckPredicate, 0, 205, 155, // Skip to: 45878
-/* 5993 */ MCD_OPC_Decode, 252, 16, 39, // Opcode: ST2WB_4S_register
-/* 5997 */ MCD_OPC_FilterValue, 35, 29, 0, // Skip to: 6030
-/* 6001 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6004 */ MCD_OPC_FilterValue, 0, 190, 155, // Skip to: 45878
-/* 6008 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6022
-/* 6012 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6022
-/* 6018 */ MCD_OPC_Decode, 245, 16, 39, // Opcode: ST2WB_2D_fixed
-/* 6022 */ MCD_OPC_CheckPredicate, 0, 172, 155, // Skip to: 45878
-/* 6026 */ MCD_OPC_Decode, 246, 16, 39, // Opcode: ST2WB_2D_register
-/* 6030 */ MCD_OPC_FilterValue, 40, 29, 0, // Skip to: 6063
-/* 6034 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6037 */ MCD_OPC_FilterValue, 0, 157, 155, // Skip to: 45878
-/* 6041 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6055
-/* 6045 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6055
-/* 6051 */ MCD_OPC_Decode, 159, 16, 39, // Opcode: ST1x2WB_16B_fixed
-/* 6055 */ MCD_OPC_CheckPredicate, 0, 139, 155, // Skip to: 45878
-/* 6059 */ MCD_OPC_Decode, 160, 16, 39, // Opcode: ST1x2WB_16B_register
-/* 6063 */ MCD_OPC_FilterValue, 41, 29, 0, // Skip to: 6096
-/* 6067 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6070 */ MCD_OPC_FilterValue, 0, 124, 155, // Skip to: 45878
-/* 6074 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6088
-/* 6078 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6088
-/* 6084 */ MCD_OPC_Decode, 173, 16, 39, // Opcode: ST1x2WB_8H_fixed
-/* 6088 */ MCD_OPC_CheckPredicate, 0, 106, 155, // Skip to: 45878
-/* 6092 */ MCD_OPC_Decode, 174, 16, 39, // Opcode: ST1x2WB_8H_register
-/* 6096 */ MCD_OPC_FilterValue, 42, 29, 0, // Skip to: 6129
-/* 6100 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6103 */ MCD_OPC_FilterValue, 0, 91, 155, // Skip to: 45878
-/* 6107 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6121
-/* 6111 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6121
-/* 6117 */ MCD_OPC_Decode, 169, 16, 39, // Opcode: ST1x2WB_4S_fixed
-/* 6121 */ MCD_OPC_CheckPredicate, 0, 73, 155, // Skip to: 45878
-/* 6125 */ MCD_OPC_Decode, 170, 16, 39, // Opcode: ST1x2WB_4S_register
-/* 6129 */ MCD_OPC_FilterValue, 43, 65, 155, // Skip to: 45878
-/* 6133 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6136 */ MCD_OPC_FilterValue, 0, 58, 155, // Skip to: 45878
-/* 6140 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6154
-/* 6144 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6154
-/* 6150 */ MCD_OPC_Decode, 163, 16, 39, // Opcode: ST1x2WB_2D_fixed
-/* 6154 */ MCD_OPC_CheckPredicate, 0, 40, 155, // Skip to: 45878
-/* 6158 */ MCD_OPC_Decode, 164, 16, 39, // Opcode: ST1x2WB_2D_register
-/* 6162 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 6174
-/* 6166 */ MCD_OPC_CheckPredicate, 1, 28, 155, // Skip to: 45878
-/* 6170 */ MCD_OPC_Decode, 211, 10, 1, // Opcode: LSFPPair64_PostInd_STR
-/* 6174 */ MCD_OPC_FilterValue, 5, 20, 155, // Skip to: 45878
-/* 6178 */ MCD_OPC_CheckPredicate, 1, 16, 155, // Skip to: 45878
-/* 6182 */ MCD_OPC_Decode, 195, 10, 1, // Opcode: LSFPPair128_PostInd_STR
-/* 6186 */ MCD_OPC_FilterValue, 3, 10, 7, // Skip to: 7992
-/* 6190 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 6193 */ MCD_OPC_FilterValue, 0, 60, 3, // Skip to: 7025
-/* 6197 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 6200 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 6233
-/* 6204 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6207 */ MCD_OPC_FilterValue, 0, 243, 154, // Skip to: 45878
-/* 6211 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6225
-/* 6215 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6225
-/* 6221 */ MCD_OPC_Decode, 132, 9, 39, // Opcode: LD4WB_8B_fixed
-/* 6225 */ MCD_OPC_CheckPredicate, 0, 225, 154, // Skip to: 45878
-/* 6229 */ MCD_OPC_Decode, 133, 9, 39, // Opcode: LD4WB_8B_register
-/* 6233 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 6266
-/* 6237 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6240 */ MCD_OPC_FilterValue, 0, 210, 154, // Skip to: 45878
-/* 6244 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6258
-/* 6248 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6258
-/* 6254 */ MCD_OPC_Decode, 128, 9, 39, // Opcode: LD4WB_4H_fixed
-/* 6258 */ MCD_OPC_CheckPredicate, 0, 192, 154, // Skip to: 45878
-/* 6262 */ MCD_OPC_Decode, 129, 9, 39, // Opcode: LD4WB_4H_register
-/* 6266 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 6299
-/* 6270 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6273 */ MCD_OPC_FilterValue, 0, 177, 154, // Skip to: 45878
-/* 6277 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6291
-/* 6281 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6291
-/* 6287 */ MCD_OPC_Decode, 254, 8, 39, // Opcode: LD4WB_2S_fixed
-/* 6291 */ MCD_OPC_CheckPredicate, 0, 159, 154, // Skip to: 45878
-/* 6295 */ MCD_OPC_Decode, 255, 8, 39, // Opcode: LD4WB_2S_register
-/* 6299 */ MCD_OPC_FilterValue, 8, 29, 0, // Skip to: 6332
-/* 6303 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6306 */ MCD_OPC_FilterValue, 0, 144, 154, // Skip to: 45878
-/* 6310 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6324
-/* 6314 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6324
-/* 6320 */ MCD_OPC_Decode, 216, 7, 39, // Opcode: LD1x4WB_8B_fixed
-/* 6324 */ MCD_OPC_CheckPredicate, 0, 126, 154, // Skip to: 45878
-/* 6328 */ MCD_OPC_Decode, 217, 7, 39, // Opcode: LD1x4WB_8B_register
-/* 6332 */ MCD_OPC_FilterValue, 9, 29, 0, // Skip to: 6365
-/* 6336 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6339 */ MCD_OPC_FilterValue, 0, 111, 154, // Skip to: 45878
-/* 6343 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6357
-/* 6347 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6357
-/* 6353 */ MCD_OPC_Decode, 212, 7, 39, // Opcode: LD1x4WB_4H_fixed
-/* 6357 */ MCD_OPC_CheckPredicate, 0, 93, 154, // Skip to: 45878
-/* 6361 */ MCD_OPC_Decode, 213, 7, 39, // Opcode: LD1x4WB_4H_register
-/* 6365 */ MCD_OPC_FilterValue, 10, 29, 0, // Skip to: 6398
-/* 6369 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6372 */ MCD_OPC_FilterValue, 0, 78, 154, // Skip to: 45878
-/* 6376 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6390
-/* 6380 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6390
-/* 6386 */ MCD_OPC_Decode, 210, 7, 39, // Opcode: LD1x4WB_2S_fixed
-/* 6390 */ MCD_OPC_CheckPredicate, 0, 60, 154, // Skip to: 45878
-/* 6394 */ MCD_OPC_Decode, 211, 7, 39, // Opcode: LD1x4WB_2S_register
-/* 6398 */ MCD_OPC_FilterValue, 11, 29, 0, // Skip to: 6431
-/* 6402 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6405 */ MCD_OPC_FilterValue, 0, 45, 154, // Skip to: 45878
-/* 6409 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6423
-/* 6413 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6423
-/* 6419 */ MCD_OPC_Decode, 206, 7, 39, // Opcode: LD1x4WB_1D_fixed
-/* 6423 */ MCD_OPC_CheckPredicate, 0, 27, 154, // Skip to: 45878
-/* 6427 */ MCD_OPC_Decode, 207, 7, 39, // Opcode: LD1x4WB_1D_register
-/* 6431 */ MCD_OPC_FilterValue, 16, 29, 0, // Skip to: 6464
-/* 6435 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6438 */ MCD_OPC_FilterValue, 0, 12, 154, // Skip to: 45878
-/* 6442 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6456
-/* 6446 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6456
-/* 6452 */ MCD_OPC_Decode, 203, 8, 39, // Opcode: LD3WB_8B_fixed
-/* 6456 */ MCD_OPC_CheckPredicate, 0, 250, 153, // Skip to: 45878
-/* 6460 */ MCD_OPC_Decode, 204, 8, 39, // Opcode: LD3WB_8B_register
-/* 6464 */ MCD_OPC_FilterValue, 17, 29, 0, // Skip to: 6497
-/* 6468 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6471 */ MCD_OPC_FilterValue, 0, 235, 153, // Skip to: 45878
-/* 6475 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6489
-/* 6479 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6489
-/* 6485 */ MCD_OPC_Decode, 199, 8, 39, // Opcode: LD3WB_4H_fixed
-/* 6489 */ MCD_OPC_CheckPredicate, 0, 217, 153, // Skip to: 45878
-/* 6493 */ MCD_OPC_Decode, 200, 8, 39, // Opcode: LD3WB_4H_register
-/* 6497 */ MCD_OPC_FilterValue, 18, 29, 0, // Skip to: 6530
-/* 6501 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6504 */ MCD_OPC_FilterValue, 0, 202, 153, // Skip to: 45878
-/* 6508 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6522
-/* 6512 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6522
-/* 6518 */ MCD_OPC_Decode, 197, 8, 39, // Opcode: LD3WB_2S_fixed
-/* 6522 */ MCD_OPC_CheckPredicate, 0, 184, 153, // Skip to: 45878
-/* 6526 */ MCD_OPC_Decode, 198, 8, 39, // Opcode: LD3WB_2S_register
-/* 6530 */ MCD_OPC_FilterValue, 24, 29, 0, // Skip to: 6563
-/* 6534 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6537 */ MCD_OPC_FilterValue, 0, 169, 153, // Skip to: 45878
-/* 6541 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6555
-/* 6545 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6555
-/* 6551 */ MCD_OPC_Decode, 192, 7, 39, // Opcode: LD1x3WB_8B_fixed
-/* 6555 */ MCD_OPC_CheckPredicate, 0, 151, 153, // Skip to: 45878
-/* 6559 */ MCD_OPC_Decode, 193, 7, 39, // Opcode: LD1x3WB_8B_register
-/* 6563 */ MCD_OPC_FilterValue, 25, 29, 0, // Skip to: 6596
-/* 6567 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6570 */ MCD_OPC_FilterValue, 0, 136, 153, // Skip to: 45878
-/* 6574 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6588
-/* 6578 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6588
-/* 6584 */ MCD_OPC_Decode, 188, 7, 39, // Opcode: LD1x3WB_4H_fixed
-/* 6588 */ MCD_OPC_CheckPredicate, 0, 118, 153, // Skip to: 45878
-/* 6592 */ MCD_OPC_Decode, 189, 7, 39, // Opcode: LD1x3WB_4H_register
-/* 6596 */ MCD_OPC_FilterValue, 26, 29, 0, // Skip to: 6629
-/* 6600 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6603 */ MCD_OPC_FilterValue, 0, 103, 153, // Skip to: 45878
-/* 6607 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6621
-/* 6611 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6621
-/* 6617 */ MCD_OPC_Decode, 186, 7, 39, // Opcode: LD1x3WB_2S_fixed
-/* 6621 */ MCD_OPC_CheckPredicate, 0, 85, 153, // Skip to: 45878
-/* 6625 */ MCD_OPC_Decode, 187, 7, 39, // Opcode: LD1x3WB_2S_register
-/* 6629 */ MCD_OPC_FilterValue, 27, 29, 0, // Skip to: 6662
-/* 6633 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6636 */ MCD_OPC_FilterValue, 0, 70, 153, // Skip to: 45878
-/* 6640 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6654
-/* 6644 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6654
-/* 6650 */ MCD_OPC_Decode, 182, 7, 39, // Opcode: LD1x3WB_1D_fixed
-/* 6654 */ MCD_OPC_CheckPredicate, 0, 52, 153, // Skip to: 45878
-/* 6658 */ MCD_OPC_Decode, 183, 7, 39, // Opcode: LD1x3WB_1D_register
-/* 6662 */ MCD_OPC_FilterValue, 28, 29, 0, // Skip to: 6695
-/* 6666 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6669 */ MCD_OPC_FilterValue, 0, 37, 153, // Skip to: 45878
-/* 6673 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6687
-/* 6677 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6687
-/* 6683 */ MCD_OPC_Decode, 144, 7, 39, // Opcode: LD1WB_8B_fixed
-/* 6687 */ MCD_OPC_CheckPredicate, 0, 19, 153, // Skip to: 45878
-/* 6691 */ MCD_OPC_Decode, 145, 7, 39, // Opcode: LD1WB_8B_register
-/* 6695 */ MCD_OPC_FilterValue, 29, 29, 0, // Skip to: 6728
-/* 6699 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6702 */ MCD_OPC_FilterValue, 0, 4, 153, // Skip to: 45878
-/* 6706 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6720
-/* 6710 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6720
-/* 6716 */ MCD_OPC_Decode, 140, 7, 39, // Opcode: LD1WB_4H_fixed
-/* 6720 */ MCD_OPC_CheckPredicate, 0, 242, 152, // Skip to: 45878
-/* 6724 */ MCD_OPC_Decode, 141, 7, 39, // Opcode: LD1WB_4H_register
-/* 6728 */ MCD_OPC_FilterValue, 30, 29, 0, // Skip to: 6761
-/* 6732 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6735 */ MCD_OPC_FilterValue, 0, 227, 152, // Skip to: 45878
-/* 6739 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6753
-/* 6743 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6753
-/* 6749 */ MCD_OPC_Decode, 138, 7, 39, // Opcode: LD1WB_2S_fixed
-/* 6753 */ MCD_OPC_CheckPredicate, 0, 209, 152, // Skip to: 45878
-/* 6757 */ MCD_OPC_Decode, 139, 7, 39, // Opcode: LD1WB_2S_register
-/* 6761 */ MCD_OPC_FilterValue, 31, 29, 0, // Skip to: 6794
-/* 6765 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6768 */ MCD_OPC_FilterValue, 0, 194, 152, // Skip to: 45878
-/* 6772 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6786
-/* 6776 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6786
-/* 6782 */ MCD_OPC_Decode, 134, 7, 39, // Opcode: LD1WB_1D_fixed
-/* 6786 */ MCD_OPC_CheckPredicate, 0, 176, 152, // Skip to: 45878
-/* 6790 */ MCD_OPC_Decode, 135, 7, 39, // Opcode: LD1WB_1D_register
-/* 6794 */ MCD_OPC_FilterValue, 32, 29, 0, // Skip to: 6827
-/* 6798 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6801 */ MCD_OPC_FilterValue, 0, 161, 152, // Skip to: 45878
-/* 6805 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6819
-/* 6809 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6819
-/* 6815 */ MCD_OPC_Decode, 146, 8, 39, // Opcode: LD2WB_8B_fixed
-/* 6819 */ MCD_OPC_CheckPredicate, 0, 143, 152, // Skip to: 45878
-/* 6823 */ MCD_OPC_Decode, 147, 8, 39, // Opcode: LD2WB_8B_register
-/* 6827 */ MCD_OPC_FilterValue, 33, 29, 0, // Skip to: 6860
-/* 6831 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6834 */ MCD_OPC_FilterValue, 0, 128, 152, // Skip to: 45878
-/* 6838 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6852
-/* 6842 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6852
-/* 6848 */ MCD_OPC_Decode, 142, 8, 39, // Opcode: LD2WB_4H_fixed
-/* 6852 */ MCD_OPC_CheckPredicate, 0, 110, 152, // Skip to: 45878
-/* 6856 */ MCD_OPC_Decode, 143, 8, 39, // Opcode: LD2WB_4H_register
-/* 6860 */ MCD_OPC_FilterValue, 34, 29, 0, // Skip to: 6893
-/* 6864 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6867 */ MCD_OPC_FilterValue, 0, 95, 152, // Skip to: 45878
-/* 6871 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6885
-/* 6875 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6885
-/* 6881 */ MCD_OPC_Decode, 140, 8, 39, // Opcode: LD2WB_2S_fixed
-/* 6885 */ MCD_OPC_CheckPredicate, 0, 77, 152, // Skip to: 45878
-/* 6889 */ MCD_OPC_Decode, 141, 8, 39, // Opcode: LD2WB_2S_register
-/* 6893 */ MCD_OPC_FilterValue, 40, 29, 0, // Skip to: 6926
-/* 6897 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6900 */ MCD_OPC_FilterValue, 0, 62, 152, // Skip to: 45878
-/* 6904 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6918
-/* 6908 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6918
-/* 6914 */ MCD_OPC_Decode, 168, 7, 39, // Opcode: LD1x2WB_8B_fixed
-/* 6918 */ MCD_OPC_CheckPredicate, 0, 44, 152, // Skip to: 45878
-/* 6922 */ MCD_OPC_Decode, 169, 7, 39, // Opcode: LD1x2WB_8B_register
-/* 6926 */ MCD_OPC_FilterValue, 41, 29, 0, // Skip to: 6959
-/* 6930 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6933 */ MCD_OPC_FilterValue, 0, 29, 152, // Skip to: 45878
-/* 6937 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6951
-/* 6941 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6951
-/* 6947 */ MCD_OPC_Decode, 164, 7, 39, // Opcode: LD1x2WB_4H_fixed
-/* 6951 */ MCD_OPC_CheckPredicate, 0, 11, 152, // Skip to: 45878
-/* 6955 */ MCD_OPC_Decode, 165, 7, 39, // Opcode: LD1x2WB_4H_register
-/* 6959 */ MCD_OPC_FilterValue, 42, 29, 0, // Skip to: 6992
-/* 6963 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6966 */ MCD_OPC_FilterValue, 0, 252, 151, // Skip to: 45878
-/* 6970 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 6984
-/* 6974 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 6984
-/* 6980 */ MCD_OPC_Decode, 162, 7, 39, // Opcode: LD1x2WB_2S_fixed
-/* 6984 */ MCD_OPC_CheckPredicate, 0, 234, 151, // Skip to: 45878
-/* 6988 */ MCD_OPC_Decode, 163, 7, 39, // Opcode: LD1x2WB_2S_register
-/* 6992 */ MCD_OPC_FilterValue, 43, 226, 151, // Skip to: 45878
-/* 6996 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 6999 */ MCD_OPC_FilterValue, 0, 219, 151, // Skip to: 45878
-/* 7003 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7017
-/* 7007 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7017
-/* 7013 */ MCD_OPC_Decode, 158, 7, 39, // Opcode: LD1x2WB_1D_fixed
-/* 7017 */ MCD_OPC_CheckPredicate, 0, 201, 151, // Skip to: 45878
-/* 7021 */ MCD_OPC_Decode, 159, 7, 39, // Opcode: LD1x2WB_1D_register
-/* 7025 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7037
-/* 7029 */ MCD_OPC_CheckPredicate, 1, 189, 151, // Skip to: 45878
-/* 7033 */ MCD_OPC_Decode, 202, 10, 1, // Opcode: LSFPPair32_PostInd_LDR
-/* 7037 */ MCD_OPC_FilterValue, 2, 159, 3, // Skip to: 7968
-/* 7041 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 7044 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 7077
-/* 7048 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7051 */ MCD_OPC_FilterValue, 0, 167, 151, // Skip to: 45878
-/* 7055 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7069
-/* 7059 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7069
-/* 7065 */ MCD_OPC_Decode, 250, 8, 39, // Opcode: LD4WB_16B_fixed
-/* 7069 */ MCD_OPC_CheckPredicate, 0, 149, 151, // Skip to: 45878
-/* 7073 */ MCD_OPC_Decode, 251, 8, 39, // Opcode: LD4WB_16B_register
-/* 7077 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 7110
-/* 7081 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7084 */ MCD_OPC_FilterValue, 0, 134, 151, // Skip to: 45878
-/* 7088 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7102
-/* 7092 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7102
-/* 7098 */ MCD_OPC_Decode, 134, 9, 39, // Opcode: LD4WB_8H_fixed
-/* 7102 */ MCD_OPC_CheckPredicate, 0, 116, 151, // Skip to: 45878
-/* 7106 */ MCD_OPC_Decode, 135, 9, 39, // Opcode: LD4WB_8H_register
-/* 7110 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 7143
-/* 7114 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7117 */ MCD_OPC_FilterValue, 0, 101, 151, // Skip to: 45878
-/* 7121 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7135
-/* 7125 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7135
-/* 7131 */ MCD_OPC_Decode, 130, 9, 39, // Opcode: LD4WB_4S_fixed
-/* 7135 */ MCD_OPC_CheckPredicate, 0, 83, 151, // Skip to: 45878
-/* 7139 */ MCD_OPC_Decode, 131, 9, 39, // Opcode: LD4WB_4S_register
-/* 7143 */ MCD_OPC_FilterValue, 3, 29, 0, // Skip to: 7176
-/* 7147 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7150 */ MCD_OPC_FilterValue, 0, 68, 151, // Skip to: 45878
-/* 7154 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7168
-/* 7158 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7168
-/* 7164 */ MCD_OPC_Decode, 252, 8, 39, // Opcode: LD4WB_2D_fixed
-/* 7168 */ MCD_OPC_CheckPredicate, 0, 50, 151, // Skip to: 45878
-/* 7172 */ MCD_OPC_Decode, 253, 8, 39, // Opcode: LD4WB_2D_register
-/* 7176 */ MCD_OPC_FilterValue, 8, 29, 0, // Skip to: 7209
-/* 7180 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7183 */ MCD_OPC_FilterValue, 0, 35, 151, // Skip to: 45878
-/* 7187 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7201
-/* 7191 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7201
-/* 7197 */ MCD_OPC_Decode, 204, 7, 39, // Opcode: LD1x4WB_16B_fixed
-/* 7201 */ MCD_OPC_CheckPredicate, 0, 17, 151, // Skip to: 45878
-/* 7205 */ MCD_OPC_Decode, 205, 7, 39, // Opcode: LD1x4WB_16B_register
-/* 7209 */ MCD_OPC_FilterValue, 9, 29, 0, // Skip to: 7242
-/* 7213 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7216 */ MCD_OPC_FilterValue, 0, 2, 151, // Skip to: 45878
-/* 7220 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7234
-/* 7224 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7234
-/* 7230 */ MCD_OPC_Decode, 218, 7, 39, // Opcode: LD1x4WB_8H_fixed
-/* 7234 */ MCD_OPC_CheckPredicate, 0, 240, 150, // Skip to: 45878
-/* 7238 */ MCD_OPC_Decode, 219, 7, 39, // Opcode: LD1x4WB_8H_register
-/* 7242 */ MCD_OPC_FilterValue, 10, 29, 0, // Skip to: 7275
-/* 7246 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7249 */ MCD_OPC_FilterValue, 0, 225, 150, // Skip to: 45878
-/* 7253 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7267
-/* 7257 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7267
-/* 7263 */ MCD_OPC_Decode, 214, 7, 39, // Opcode: LD1x4WB_4S_fixed
-/* 7267 */ MCD_OPC_CheckPredicate, 0, 207, 150, // Skip to: 45878
-/* 7271 */ MCD_OPC_Decode, 215, 7, 39, // Opcode: LD1x4WB_4S_register
-/* 7275 */ MCD_OPC_FilterValue, 11, 29, 0, // Skip to: 7308
-/* 7279 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7282 */ MCD_OPC_FilterValue, 0, 192, 150, // Skip to: 45878
-/* 7286 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7300
-/* 7290 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7300
-/* 7296 */ MCD_OPC_Decode, 208, 7, 39, // Opcode: LD1x4WB_2D_fixed
-/* 7300 */ MCD_OPC_CheckPredicate, 0, 174, 150, // Skip to: 45878
-/* 7304 */ MCD_OPC_Decode, 209, 7, 39, // Opcode: LD1x4WB_2D_register
-/* 7308 */ MCD_OPC_FilterValue, 16, 29, 0, // Skip to: 7341
-/* 7312 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7315 */ MCD_OPC_FilterValue, 0, 159, 150, // Skip to: 45878
-/* 7319 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7333
-/* 7323 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7333
-/* 7329 */ MCD_OPC_Decode, 193, 8, 39, // Opcode: LD3WB_16B_fixed
-/* 7333 */ MCD_OPC_CheckPredicate, 0, 141, 150, // Skip to: 45878
-/* 7337 */ MCD_OPC_Decode, 194, 8, 39, // Opcode: LD3WB_16B_register
-/* 7341 */ MCD_OPC_FilterValue, 17, 29, 0, // Skip to: 7374
-/* 7345 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7348 */ MCD_OPC_FilterValue, 0, 126, 150, // Skip to: 45878
-/* 7352 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7366
-/* 7356 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7366
-/* 7362 */ MCD_OPC_Decode, 205, 8, 39, // Opcode: LD3WB_8H_fixed
-/* 7366 */ MCD_OPC_CheckPredicate, 0, 108, 150, // Skip to: 45878
-/* 7370 */ MCD_OPC_Decode, 206, 8, 39, // Opcode: LD3WB_8H_register
-/* 7374 */ MCD_OPC_FilterValue, 18, 29, 0, // Skip to: 7407
-/* 7378 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7381 */ MCD_OPC_FilterValue, 0, 93, 150, // Skip to: 45878
-/* 7385 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7399
-/* 7389 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7399
-/* 7395 */ MCD_OPC_Decode, 201, 8, 39, // Opcode: LD3WB_4S_fixed
-/* 7399 */ MCD_OPC_CheckPredicate, 0, 75, 150, // Skip to: 45878
-/* 7403 */ MCD_OPC_Decode, 202, 8, 39, // Opcode: LD3WB_4S_register
-/* 7407 */ MCD_OPC_FilterValue, 19, 29, 0, // Skip to: 7440
-/* 7411 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7414 */ MCD_OPC_FilterValue, 0, 60, 150, // Skip to: 45878
-/* 7418 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7432
-/* 7422 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7432
-/* 7428 */ MCD_OPC_Decode, 195, 8, 39, // Opcode: LD3WB_2D_fixed
-/* 7432 */ MCD_OPC_CheckPredicate, 0, 42, 150, // Skip to: 45878
-/* 7436 */ MCD_OPC_Decode, 196, 8, 39, // Opcode: LD3WB_2D_register
-/* 7440 */ MCD_OPC_FilterValue, 24, 29, 0, // Skip to: 7473
-/* 7444 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7447 */ MCD_OPC_FilterValue, 0, 27, 150, // Skip to: 45878
-/* 7451 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7465
-/* 7455 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7465
-/* 7461 */ MCD_OPC_Decode, 180, 7, 39, // Opcode: LD1x3WB_16B_fixed
-/* 7465 */ MCD_OPC_CheckPredicate, 0, 9, 150, // Skip to: 45878
-/* 7469 */ MCD_OPC_Decode, 181, 7, 39, // Opcode: LD1x3WB_16B_register
-/* 7473 */ MCD_OPC_FilterValue, 25, 29, 0, // Skip to: 7506
-/* 7477 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7480 */ MCD_OPC_FilterValue, 0, 250, 149, // Skip to: 45878
-/* 7484 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7498
-/* 7488 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7498
-/* 7494 */ MCD_OPC_Decode, 194, 7, 39, // Opcode: LD1x3WB_8H_fixed
-/* 7498 */ MCD_OPC_CheckPredicate, 0, 232, 149, // Skip to: 45878
-/* 7502 */ MCD_OPC_Decode, 195, 7, 39, // Opcode: LD1x3WB_8H_register
-/* 7506 */ MCD_OPC_FilterValue, 26, 29, 0, // Skip to: 7539
-/* 7510 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7513 */ MCD_OPC_FilterValue, 0, 217, 149, // Skip to: 45878
-/* 7517 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7531
-/* 7521 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7531
-/* 7527 */ MCD_OPC_Decode, 190, 7, 39, // Opcode: LD1x3WB_4S_fixed
-/* 7531 */ MCD_OPC_CheckPredicate, 0, 199, 149, // Skip to: 45878
-/* 7535 */ MCD_OPC_Decode, 191, 7, 39, // Opcode: LD1x3WB_4S_register
-/* 7539 */ MCD_OPC_FilterValue, 27, 29, 0, // Skip to: 7572
-/* 7543 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7546 */ MCD_OPC_FilterValue, 0, 184, 149, // Skip to: 45878
-/* 7550 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7564
-/* 7554 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7564
-/* 7560 */ MCD_OPC_Decode, 184, 7, 39, // Opcode: LD1x3WB_2D_fixed
-/* 7564 */ MCD_OPC_CheckPredicate, 0, 166, 149, // Skip to: 45878
-/* 7568 */ MCD_OPC_Decode, 185, 7, 39, // Opcode: LD1x3WB_2D_register
-/* 7572 */ MCD_OPC_FilterValue, 28, 29, 0, // Skip to: 7605
-/* 7576 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7579 */ MCD_OPC_FilterValue, 0, 151, 149, // Skip to: 45878
-/* 7583 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7597
-/* 7587 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7597
-/* 7593 */ MCD_OPC_Decode, 132, 7, 39, // Opcode: LD1WB_16B_fixed
-/* 7597 */ MCD_OPC_CheckPredicate, 0, 133, 149, // Skip to: 45878
-/* 7601 */ MCD_OPC_Decode, 133, 7, 39, // Opcode: LD1WB_16B_register
-/* 7605 */ MCD_OPC_FilterValue, 29, 29, 0, // Skip to: 7638
-/* 7609 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7612 */ MCD_OPC_FilterValue, 0, 118, 149, // Skip to: 45878
-/* 7616 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7630
-/* 7620 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7630
-/* 7626 */ MCD_OPC_Decode, 146, 7, 39, // Opcode: LD1WB_8H_fixed
-/* 7630 */ MCD_OPC_CheckPredicate, 0, 100, 149, // Skip to: 45878
-/* 7634 */ MCD_OPC_Decode, 147, 7, 39, // Opcode: LD1WB_8H_register
-/* 7638 */ MCD_OPC_FilterValue, 30, 29, 0, // Skip to: 7671
-/* 7642 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7645 */ MCD_OPC_FilterValue, 0, 85, 149, // Skip to: 45878
-/* 7649 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7663
-/* 7653 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7663
-/* 7659 */ MCD_OPC_Decode, 142, 7, 39, // Opcode: LD1WB_4S_fixed
-/* 7663 */ MCD_OPC_CheckPredicate, 0, 67, 149, // Skip to: 45878
-/* 7667 */ MCD_OPC_Decode, 143, 7, 39, // Opcode: LD1WB_4S_register
-/* 7671 */ MCD_OPC_FilterValue, 31, 29, 0, // Skip to: 7704
-/* 7675 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7678 */ MCD_OPC_FilterValue, 0, 52, 149, // Skip to: 45878
-/* 7682 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7696
-/* 7686 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7696
-/* 7692 */ MCD_OPC_Decode, 136, 7, 39, // Opcode: LD1WB_2D_fixed
-/* 7696 */ MCD_OPC_CheckPredicate, 0, 34, 149, // Skip to: 45878
-/* 7700 */ MCD_OPC_Decode, 137, 7, 39, // Opcode: LD1WB_2D_register
-/* 7704 */ MCD_OPC_FilterValue, 32, 29, 0, // Skip to: 7737
-/* 7708 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7711 */ MCD_OPC_FilterValue, 0, 19, 149, // Skip to: 45878
-/* 7715 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7729
-/* 7719 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7729
-/* 7725 */ MCD_OPC_Decode, 136, 8, 39, // Opcode: LD2WB_16B_fixed
-/* 7729 */ MCD_OPC_CheckPredicate, 0, 1, 149, // Skip to: 45878
-/* 7733 */ MCD_OPC_Decode, 137, 8, 39, // Opcode: LD2WB_16B_register
-/* 7737 */ MCD_OPC_FilterValue, 33, 29, 0, // Skip to: 7770
-/* 7741 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7744 */ MCD_OPC_FilterValue, 0, 242, 148, // Skip to: 45878
-/* 7748 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7762
-/* 7752 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7762
-/* 7758 */ MCD_OPC_Decode, 148, 8, 39, // Opcode: LD2WB_8H_fixed
-/* 7762 */ MCD_OPC_CheckPredicate, 0, 224, 148, // Skip to: 45878
-/* 7766 */ MCD_OPC_Decode, 149, 8, 39, // Opcode: LD2WB_8H_register
-/* 7770 */ MCD_OPC_FilterValue, 34, 29, 0, // Skip to: 7803
-/* 7774 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7777 */ MCD_OPC_FilterValue, 0, 209, 148, // Skip to: 45878
-/* 7781 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7795
-/* 7785 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7795
-/* 7791 */ MCD_OPC_Decode, 144, 8, 39, // Opcode: LD2WB_4S_fixed
-/* 7795 */ MCD_OPC_CheckPredicate, 0, 191, 148, // Skip to: 45878
-/* 7799 */ MCD_OPC_Decode, 145, 8, 39, // Opcode: LD2WB_4S_register
-/* 7803 */ MCD_OPC_FilterValue, 35, 29, 0, // Skip to: 7836
-/* 7807 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7810 */ MCD_OPC_FilterValue, 0, 176, 148, // Skip to: 45878
-/* 7814 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7828
-/* 7818 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7828
-/* 7824 */ MCD_OPC_Decode, 138, 8, 39, // Opcode: LD2WB_2D_fixed
-/* 7828 */ MCD_OPC_CheckPredicate, 0, 158, 148, // Skip to: 45878
-/* 7832 */ MCD_OPC_Decode, 139, 8, 39, // Opcode: LD2WB_2D_register
-/* 7836 */ MCD_OPC_FilterValue, 40, 29, 0, // Skip to: 7869
-/* 7840 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7843 */ MCD_OPC_FilterValue, 0, 143, 148, // Skip to: 45878
-/* 7847 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7861
-/* 7851 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7861
-/* 7857 */ MCD_OPC_Decode, 156, 7, 39, // Opcode: LD1x2WB_16B_fixed
-/* 7861 */ MCD_OPC_CheckPredicate, 0, 125, 148, // Skip to: 45878
-/* 7865 */ MCD_OPC_Decode, 157, 7, 39, // Opcode: LD1x2WB_16B_register
-/* 7869 */ MCD_OPC_FilterValue, 41, 29, 0, // Skip to: 7902
-/* 7873 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7876 */ MCD_OPC_FilterValue, 0, 110, 148, // Skip to: 45878
-/* 7880 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7894
-/* 7884 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7894
-/* 7890 */ MCD_OPC_Decode, 170, 7, 39, // Opcode: LD1x2WB_8H_fixed
-/* 7894 */ MCD_OPC_CheckPredicate, 0, 92, 148, // Skip to: 45878
-/* 7898 */ MCD_OPC_Decode, 171, 7, 39, // Opcode: LD1x2WB_8H_register
-/* 7902 */ MCD_OPC_FilterValue, 42, 29, 0, // Skip to: 7935
-/* 7906 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7909 */ MCD_OPC_FilterValue, 0, 77, 148, // Skip to: 45878
-/* 7913 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7927
-/* 7917 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7927
-/* 7923 */ MCD_OPC_Decode, 166, 7, 39, // Opcode: LD1x2WB_4S_fixed
-/* 7927 */ MCD_OPC_CheckPredicate, 0, 59, 148, // Skip to: 45878
-/* 7931 */ MCD_OPC_Decode, 167, 7, 39, // Opcode: LD1x2WB_4S_register
-/* 7935 */ MCD_OPC_FilterValue, 43, 51, 148, // Skip to: 45878
-/* 7939 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 7942 */ MCD_OPC_FilterValue, 0, 44, 148, // Skip to: 45878
-/* 7946 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 7960
-/* 7950 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 7960
-/* 7956 */ MCD_OPC_Decode, 160, 7, 39, // Opcode: LD1x2WB_2D_fixed
-/* 7960 */ MCD_OPC_CheckPredicate, 0, 26, 148, // Skip to: 45878
-/* 7964 */ MCD_OPC_Decode, 161, 7, 39, // Opcode: LD1x2WB_2D_register
-/* 7968 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 7980
-/* 7972 */ MCD_OPC_CheckPredicate, 1, 14, 148, // Skip to: 45878
-/* 7976 */ MCD_OPC_Decode, 210, 10, 1, // Opcode: LSFPPair64_PostInd_LDR
-/* 7980 */ MCD_OPC_FilterValue, 5, 6, 148, // Skip to: 45878
-/* 7984 */ MCD_OPC_CheckPredicate, 1, 2, 148, // Skip to: 45878
-/* 7988 */ MCD_OPC_Decode, 194, 10, 1, // Opcode: LSFPPair128_PostInd_LDR
-/* 7992 */ MCD_OPC_FilterValue, 4, 167, 1, // Skip to: 8419
-/* 7996 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ...
-/* 7999 */ MCD_OPC_FilterValue, 0, 117, 1, // Skip to: 8376
-/* 8003 */ MCD_OPC_ExtractField, 13, 9, // Inst{21-13} ...
-/* 8006 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 8024
-/* 8010 */ MCD_OPC_CheckPredicate, 0, 232, 147, // Skip to: 45878
-/* 8014 */ MCD_OPC_CheckField, 31, 1, 0, 226, 147, // Skip to: 45878
-/* 8020 */ MCD_OPC_Decode, 251, 15, 40, // Opcode: ST1LN_B
-/* 8024 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 8042
-/* 8028 */ MCD_OPC_CheckPredicate, 0, 214, 147, // Skip to: 45878
-/* 8032 */ MCD_OPC_CheckField, 31, 1, 0, 208, 147, // Skip to: 45878
-/* 8038 */ MCD_OPC_Decode, 136, 17, 41, // Opcode: ST3LN_B
-/* 8042 */ MCD_OPC_FilterValue, 2, 20, 0, // Skip to: 8066
-/* 8046 */ MCD_OPC_CheckPredicate, 0, 196, 147, // Skip to: 45878
-/* 8050 */ MCD_OPC_CheckField, 31, 1, 0, 190, 147, // Skip to: 45878
-/* 8056 */ MCD_OPC_CheckField, 10, 1, 0, 184, 147, // Skip to: 45878
-/* 8062 */ MCD_OPC_Decode, 253, 15, 42, // Opcode: ST1LN_H
-/* 8066 */ MCD_OPC_FilterValue, 3, 20, 0, // Skip to: 8090
-/* 8070 */ MCD_OPC_CheckPredicate, 0, 172, 147, // Skip to: 45878
-/* 8074 */ MCD_OPC_CheckField, 31, 1, 0, 166, 147, // Skip to: 45878
-/* 8080 */ MCD_OPC_CheckField, 10, 1, 0, 160, 147, // Skip to: 45878
-/* 8086 */ MCD_OPC_Decode, 138, 17, 43, // Opcode: ST3LN_H
-/* 8090 */ MCD_OPC_FilterValue, 4, 45, 0, // Skip to: 8139
-/* 8094 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 8097 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 8115
-/* 8101 */ MCD_OPC_CheckPredicate, 0, 141, 147, // Skip to: 45878
-/* 8105 */ MCD_OPC_CheckField, 31, 1, 0, 135, 147, // Skip to: 45878
-/* 8111 */ MCD_OPC_Decode, 254, 15, 44, // Opcode: ST1LN_S
-/* 8115 */ MCD_OPC_FilterValue, 1, 127, 147, // Skip to: 45878
-/* 8119 */ MCD_OPC_CheckPredicate, 0, 123, 147, // Skip to: 45878
-/* 8123 */ MCD_OPC_CheckField, 31, 1, 0, 117, 147, // Skip to: 45878
-/* 8129 */ MCD_OPC_CheckField, 12, 1, 0, 111, 147, // Skip to: 45878
-/* 8135 */ MCD_OPC_Decode, 252, 15, 45, // Opcode: ST1LN_D
-/* 8139 */ MCD_OPC_FilterValue, 5, 45, 0, // Skip to: 8188
-/* 8143 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 8146 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 8164
-/* 8150 */ MCD_OPC_CheckPredicate, 0, 92, 147, // Skip to: 45878
-/* 8154 */ MCD_OPC_CheckField, 31, 1, 0, 86, 147, // Skip to: 45878
-/* 8160 */ MCD_OPC_Decode, 139, 17, 46, // Opcode: ST3LN_S
-/* 8164 */ MCD_OPC_FilterValue, 1, 78, 147, // Skip to: 45878
-/* 8168 */ MCD_OPC_CheckPredicate, 0, 74, 147, // Skip to: 45878
-/* 8172 */ MCD_OPC_CheckField, 31, 1, 0, 68, 147, // Skip to: 45878
-/* 8178 */ MCD_OPC_CheckField, 12, 1, 0, 62, 147, // Skip to: 45878
-/* 8184 */ MCD_OPC_Decode, 137, 17, 47, // Opcode: ST3LN_D
-/* 8188 */ MCD_OPC_FilterValue, 128, 2, 14, 0, // Skip to: 8207
-/* 8193 */ MCD_OPC_CheckPredicate, 0, 49, 147, // Skip to: 45878
-/* 8197 */ MCD_OPC_CheckField, 31, 1, 0, 43, 147, // Skip to: 45878
-/* 8203 */ MCD_OPC_Decode, 231, 16, 48, // Opcode: ST2LN_B
-/* 8207 */ MCD_OPC_FilterValue, 129, 2, 14, 0, // Skip to: 8226
-/* 8212 */ MCD_OPC_CheckPredicate, 0, 30, 147, // Skip to: 45878
-/* 8216 */ MCD_OPC_CheckField, 31, 1, 0, 24, 147, // Skip to: 45878
-/* 8222 */ MCD_OPC_Decode, 169, 17, 49, // Opcode: ST4LN_B
-/* 8226 */ MCD_OPC_FilterValue, 130, 2, 20, 0, // Skip to: 8251
-/* 8231 */ MCD_OPC_CheckPredicate, 0, 11, 147, // Skip to: 45878
-/* 8235 */ MCD_OPC_CheckField, 31, 1, 0, 5, 147, // Skip to: 45878
-/* 8241 */ MCD_OPC_CheckField, 10, 1, 0, 255, 146, // Skip to: 45878
-/* 8247 */ MCD_OPC_Decode, 233, 16, 50, // Opcode: ST2LN_H
-/* 8251 */ MCD_OPC_FilterValue, 131, 2, 20, 0, // Skip to: 8276
-/* 8256 */ MCD_OPC_CheckPredicate, 0, 242, 146, // Skip to: 45878
-/* 8260 */ MCD_OPC_CheckField, 31, 1, 0, 236, 146, // Skip to: 45878
-/* 8266 */ MCD_OPC_CheckField, 10, 1, 0, 230, 146, // Skip to: 45878
-/* 8272 */ MCD_OPC_Decode, 171, 17, 51, // Opcode: ST4LN_H
-/* 8276 */ MCD_OPC_FilterValue, 132, 2, 45, 0, // Skip to: 8326
-/* 8281 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 8284 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 8302
-/* 8288 */ MCD_OPC_CheckPredicate, 0, 210, 146, // Skip to: 45878
-/* 8292 */ MCD_OPC_CheckField, 31, 1, 0, 204, 146, // Skip to: 45878
-/* 8298 */ MCD_OPC_Decode, 234, 16, 52, // Opcode: ST2LN_S
-/* 8302 */ MCD_OPC_FilterValue, 1, 196, 146, // Skip to: 45878
-/* 8306 */ MCD_OPC_CheckPredicate, 0, 192, 146, // Skip to: 45878
-/* 8310 */ MCD_OPC_CheckField, 31, 1, 0, 186, 146, // Skip to: 45878
-/* 8316 */ MCD_OPC_CheckField, 12, 1, 0, 180, 146, // Skip to: 45878
-/* 8322 */ MCD_OPC_Decode, 232, 16, 53, // Opcode: ST2LN_D
-/* 8326 */ MCD_OPC_FilterValue, 133, 2, 171, 146, // Skip to: 45878
-/* 8331 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 8334 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 8352
-/* 8338 */ MCD_OPC_CheckPredicate, 0, 160, 146, // Skip to: 45878
-/* 8342 */ MCD_OPC_CheckField, 31, 1, 0, 154, 146, // Skip to: 45878
-/* 8348 */ MCD_OPC_Decode, 172, 17, 54, // Opcode: ST4LN_S
-/* 8352 */ MCD_OPC_FilterValue, 1, 146, 146, // Skip to: 45878
-/* 8356 */ MCD_OPC_CheckPredicate, 0, 142, 146, // Skip to: 45878
-/* 8360 */ MCD_OPC_CheckField, 31, 1, 0, 136, 146, // Skip to: 45878
-/* 8366 */ MCD_OPC_CheckField, 12, 1, 0, 130, 146, // Skip to: 45878
-/* 8372 */ MCD_OPC_Decode, 170, 17, 55, // Opcode: ST4LN_D
-/* 8376 */ MCD_OPC_FilterValue, 1, 122, 146, // Skip to: 45878
-/* 8380 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 8383 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8395
-/* 8387 */ MCD_OPC_CheckPredicate, 1, 111, 146, // Skip to: 45878
-/* 8391 */ MCD_OPC_Decode, 206, 10, 1, // Opcode: LSFPPair32_STR
-/* 8395 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 8407
-/* 8399 */ MCD_OPC_CheckPredicate, 1, 99, 146, // Skip to: 45878
-/* 8403 */ MCD_OPC_Decode, 214, 10, 1, // Opcode: LSFPPair64_STR
-/* 8407 */ MCD_OPC_FilterValue, 2, 91, 146, // Skip to: 45878
-/* 8411 */ MCD_OPC_CheckPredicate, 1, 87, 146, // Skip to: 45878
-/* 8415 */ MCD_OPC_Decode, 198, 10, 1, // Opcode: LSFPPair128_STR
-/* 8419 */ MCD_OPC_FilterValue, 5, 181, 3, // Skip to: 9372
-/* 8423 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ...
-/* 8426 */ MCD_OPC_FilterValue, 0, 131, 3, // Skip to: 9329
-/* 8430 */ MCD_OPC_ExtractField, 13, 9, // Inst{21-13} ...
-/* 8433 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 8451
-/* 8437 */ MCD_OPC_CheckPredicate, 0, 61, 146, // Skip to: 45878
-/* 8441 */ MCD_OPC_CheckField, 31, 1, 0, 55, 146, // Skip to: 45878
-/* 8447 */ MCD_OPC_Decode, 224, 6, 56, // Opcode: LD1LN_B
-/* 8451 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 8469
-/* 8455 */ MCD_OPC_CheckPredicate, 0, 43, 146, // Skip to: 45878
-/* 8459 */ MCD_OPC_CheckField, 31, 1, 0, 37, 146, // Skip to: 45878
-/* 8465 */ MCD_OPC_Decode, 157, 8, 57, // Opcode: LD3LN_B
-/* 8469 */ MCD_OPC_FilterValue, 2, 20, 0, // Skip to: 8493
-/* 8473 */ MCD_OPC_CheckPredicate, 0, 25, 146, // Skip to: 45878
-/* 8477 */ MCD_OPC_CheckField, 31, 1, 0, 19, 146, // Skip to: 45878
-/* 8483 */ MCD_OPC_CheckField, 10, 1, 0, 13, 146, // Skip to: 45878
-/* 8489 */ MCD_OPC_Decode, 226, 6, 58, // Opcode: LD1LN_H
-/* 8493 */ MCD_OPC_FilterValue, 3, 20, 0, // Skip to: 8517
-/* 8497 */ MCD_OPC_CheckPredicate, 0, 1, 146, // Skip to: 45878
-/* 8501 */ MCD_OPC_CheckField, 31, 1, 0, 251, 145, // Skip to: 45878
-/* 8507 */ MCD_OPC_CheckField, 10, 1, 0, 245, 145, // Skip to: 45878
-/* 8513 */ MCD_OPC_Decode, 159, 8, 59, // Opcode: LD3LN_H
-/* 8517 */ MCD_OPC_FilterValue, 4, 45, 0, // Skip to: 8566
-/* 8521 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 8524 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 8542
-/* 8528 */ MCD_OPC_CheckPredicate, 0, 226, 145, // Skip to: 45878
-/* 8532 */ MCD_OPC_CheckField, 31, 1, 0, 220, 145, // Skip to: 45878
-/* 8538 */ MCD_OPC_Decode, 227, 6, 60, // Opcode: LD1LN_S
-/* 8542 */ MCD_OPC_FilterValue, 1, 212, 145, // Skip to: 45878
-/* 8546 */ MCD_OPC_CheckPredicate, 0, 208, 145, // Skip to: 45878
-/* 8550 */ MCD_OPC_CheckField, 31, 1, 0, 202, 145, // Skip to: 45878
-/* 8556 */ MCD_OPC_CheckField, 12, 1, 0, 196, 145, // Skip to: 45878
-/* 8562 */ MCD_OPC_Decode, 225, 6, 61, // Opcode: LD1LN_D
-/* 8566 */ MCD_OPC_FilterValue, 5, 45, 0, // Skip to: 8615
-/* 8570 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 8573 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 8591
-/* 8577 */ MCD_OPC_CheckPredicate, 0, 177, 145, // Skip to: 45878
-/* 8581 */ MCD_OPC_CheckField, 31, 1, 0, 171, 145, // Skip to: 45878
-/* 8587 */ MCD_OPC_Decode, 160, 8, 62, // Opcode: LD3LN_S
-/* 8591 */ MCD_OPC_FilterValue, 1, 163, 145, // Skip to: 45878
-/* 8595 */ MCD_OPC_CheckPredicate, 0, 159, 145, // Skip to: 45878
-/* 8599 */ MCD_OPC_CheckField, 31, 1, 0, 153, 145, // Skip to: 45878
-/* 8605 */ MCD_OPC_CheckField, 12, 1, 0, 147, 145, // Skip to: 45878
-/* 8611 */ MCD_OPC_Decode, 158, 8, 63, // Opcode: LD3LN_D
-/* 8615 */ MCD_OPC_FilterValue, 6, 127, 0, // Skip to: 8746
-/* 8619 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
-/* 8622 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 8653
-/* 8626 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 8629 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8641
-/* 8633 */ MCD_OPC_CheckPredicate, 0, 121, 145, // Skip to: 45878
-/* 8637 */ MCD_OPC_Decode, 242, 6, 33, // Opcode: LD1R_8B
-/* 8641 */ MCD_OPC_FilterValue, 1, 113, 145, // Skip to: 45878
-/* 8645 */ MCD_OPC_CheckPredicate, 0, 109, 145, // Skip to: 45878
-/* 8649 */ MCD_OPC_Decode, 236, 6, 37, // Opcode: LD1R_16B
-/* 8653 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 8684
-/* 8657 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 8660 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8672
-/* 8664 */ MCD_OPC_CheckPredicate, 0, 90, 145, // Skip to: 45878
-/* 8668 */ MCD_OPC_Decode, 240, 6, 33, // Opcode: LD1R_4H
-/* 8672 */ MCD_OPC_FilterValue, 1, 82, 145, // Skip to: 45878
-/* 8676 */ MCD_OPC_CheckPredicate, 0, 78, 145, // Skip to: 45878
-/* 8680 */ MCD_OPC_Decode, 243, 6, 37, // Opcode: LD1R_8H
-/* 8684 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 8715
-/* 8688 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 8691 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8703
-/* 8695 */ MCD_OPC_CheckPredicate, 0, 59, 145, // Skip to: 45878
-/* 8699 */ MCD_OPC_Decode, 239, 6, 33, // Opcode: LD1R_2S
-/* 8703 */ MCD_OPC_FilterValue, 1, 51, 145, // Skip to: 45878
-/* 8707 */ MCD_OPC_CheckPredicate, 0, 47, 145, // Skip to: 45878
-/* 8711 */ MCD_OPC_Decode, 241, 6, 37, // Opcode: LD1R_4S
-/* 8715 */ MCD_OPC_FilterValue, 3, 39, 145, // Skip to: 45878
-/* 8719 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 8722 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8734
-/* 8726 */ MCD_OPC_CheckPredicate, 0, 28, 145, // Skip to: 45878
-/* 8730 */ MCD_OPC_Decode, 237, 6, 33, // Opcode: LD1R_1D
-/* 8734 */ MCD_OPC_FilterValue, 1, 20, 145, // Skip to: 45878
-/* 8738 */ MCD_OPC_CheckPredicate, 0, 16, 145, // Skip to: 45878
-/* 8742 */ MCD_OPC_Decode, 238, 6, 37, // Opcode: LD1R_2D
-/* 8746 */ MCD_OPC_FilterValue, 7, 127, 0, // Skip to: 8877
-/* 8750 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
-/* 8753 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 8784
-/* 8757 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 8760 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8772
-/* 8764 */ MCD_OPC_CheckPredicate, 0, 246, 144, // Skip to: 45878
-/* 8768 */ MCD_OPC_Decode, 175, 8, 32, // Opcode: LD3R_8B
-/* 8772 */ MCD_OPC_FilterValue, 1, 238, 144, // Skip to: 45878
-/* 8776 */ MCD_OPC_CheckPredicate, 0, 234, 144, // Skip to: 45878
-/* 8780 */ MCD_OPC_Decode, 169, 8, 36, // Opcode: LD3R_16B
-/* 8784 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 8815
-/* 8788 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 8791 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8803
-/* 8795 */ MCD_OPC_CheckPredicate, 0, 215, 144, // Skip to: 45878
-/* 8799 */ MCD_OPC_Decode, 173, 8, 32, // Opcode: LD3R_4H
-/* 8803 */ MCD_OPC_FilterValue, 1, 207, 144, // Skip to: 45878
-/* 8807 */ MCD_OPC_CheckPredicate, 0, 203, 144, // Skip to: 45878
-/* 8811 */ MCD_OPC_Decode, 176, 8, 36, // Opcode: LD3R_8H
-/* 8815 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 8846
-/* 8819 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 8822 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8834
-/* 8826 */ MCD_OPC_CheckPredicate, 0, 184, 144, // Skip to: 45878
-/* 8830 */ MCD_OPC_Decode, 172, 8, 32, // Opcode: LD3R_2S
-/* 8834 */ MCD_OPC_FilterValue, 1, 176, 144, // Skip to: 45878
-/* 8838 */ MCD_OPC_CheckPredicate, 0, 172, 144, // Skip to: 45878
-/* 8842 */ MCD_OPC_Decode, 174, 8, 36, // Opcode: LD3R_4S
-/* 8846 */ MCD_OPC_FilterValue, 3, 164, 144, // Skip to: 45878
-/* 8850 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 8853 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8865
-/* 8857 */ MCD_OPC_CheckPredicate, 0, 153, 144, // Skip to: 45878
-/* 8861 */ MCD_OPC_Decode, 170, 8, 32, // Opcode: LD3R_1D
-/* 8865 */ MCD_OPC_FilterValue, 1, 145, 144, // Skip to: 45878
-/* 8869 */ MCD_OPC_CheckPredicate, 0, 141, 144, // Skip to: 45878
-/* 8873 */ MCD_OPC_Decode, 171, 8, 36, // Opcode: LD3R_2D
-/* 8877 */ MCD_OPC_FilterValue, 128, 2, 14, 0, // Skip to: 8896
-/* 8882 */ MCD_OPC_CheckPredicate, 0, 128, 144, // Skip to: 45878
-/* 8886 */ MCD_OPC_CheckField, 31, 1, 0, 122, 144, // Skip to: 45878
-/* 8892 */ MCD_OPC_Decode, 228, 7, 64, // Opcode: LD2LN_B
-/* 8896 */ MCD_OPC_FilterValue, 129, 2, 14, 0, // Skip to: 8915
-/* 8901 */ MCD_OPC_CheckPredicate, 0, 109, 144, // Skip to: 45878
-/* 8905 */ MCD_OPC_CheckField, 31, 1, 0, 103, 144, // Skip to: 45878
-/* 8911 */ MCD_OPC_Decode, 214, 8, 65, // Opcode: LD4LN_B
-/* 8915 */ MCD_OPC_FilterValue, 130, 2, 20, 0, // Skip to: 8940
-/* 8920 */ MCD_OPC_CheckPredicate, 0, 90, 144, // Skip to: 45878
-/* 8924 */ MCD_OPC_CheckField, 31, 1, 0, 84, 144, // Skip to: 45878
-/* 8930 */ MCD_OPC_CheckField, 10, 1, 0, 78, 144, // Skip to: 45878
-/* 8936 */ MCD_OPC_Decode, 230, 7, 66, // Opcode: LD2LN_H
-/* 8940 */ MCD_OPC_FilterValue, 131, 2, 20, 0, // Skip to: 8965
-/* 8945 */ MCD_OPC_CheckPredicate, 0, 65, 144, // Skip to: 45878
-/* 8949 */ MCD_OPC_CheckField, 31, 1, 0, 59, 144, // Skip to: 45878
-/* 8955 */ MCD_OPC_CheckField, 10, 1, 0, 53, 144, // Skip to: 45878
-/* 8961 */ MCD_OPC_Decode, 216, 8, 67, // Opcode: LD4LN_H
-/* 8965 */ MCD_OPC_FilterValue, 132, 2, 45, 0, // Skip to: 9015
-/* 8970 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 8973 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 8991
-/* 8977 */ MCD_OPC_CheckPredicate, 0, 33, 144, // Skip to: 45878
-/* 8981 */ MCD_OPC_CheckField, 31, 1, 0, 27, 144, // Skip to: 45878
-/* 8987 */ MCD_OPC_Decode, 231, 7, 68, // Opcode: LD2LN_S
-/* 8991 */ MCD_OPC_FilterValue, 1, 19, 144, // Skip to: 45878
-/* 8995 */ MCD_OPC_CheckPredicate, 0, 15, 144, // Skip to: 45878
-/* 8999 */ MCD_OPC_CheckField, 31, 1, 0, 9, 144, // Skip to: 45878
-/* 9005 */ MCD_OPC_CheckField, 12, 1, 0, 3, 144, // Skip to: 45878
-/* 9011 */ MCD_OPC_Decode, 229, 7, 69, // Opcode: LD2LN_D
-/* 9015 */ MCD_OPC_FilterValue, 133, 2, 45, 0, // Skip to: 9065
-/* 9020 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 9023 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 9041
-/* 9027 */ MCD_OPC_CheckPredicate, 0, 239, 143, // Skip to: 45878
-/* 9031 */ MCD_OPC_CheckField, 31, 1, 0, 233, 143, // Skip to: 45878
-/* 9037 */ MCD_OPC_Decode, 217, 8, 70, // Opcode: LD4LN_S
-/* 9041 */ MCD_OPC_FilterValue, 1, 225, 143, // Skip to: 45878
-/* 9045 */ MCD_OPC_CheckPredicate, 0, 221, 143, // Skip to: 45878
-/* 9049 */ MCD_OPC_CheckField, 31, 1, 0, 215, 143, // Skip to: 45878
-/* 9055 */ MCD_OPC_CheckField, 12, 1, 0, 209, 143, // Skip to: 45878
-/* 9061 */ MCD_OPC_Decode, 215, 8, 71, // Opcode: LD4LN_D
-/* 9065 */ MCD_OPC_FilterValue, 134, 2, 127, 0, // Skip to: 9197
-/* 9070 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
-/* 9073 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 9104
-/* 9077 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 9080 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9092
-/* 9084 */ MCD_OPC_CheckPredicate, 0, 182, 143, // Skip to: 45878
-/* 9088 */ MCD_OPC_Decode, 246, 7, 34, // Opcode: LD2R_8B
-/* 9092 */ MCD_OPC_FilterValue, 1, 174, 143, // Skip to: 45878
-/* 9096 */ MCD_OPC_CheckPredicate, 0, 170, 143, // Skip to: 45878
-/* 9100 */ MCD_OPC_Decode, 240, 7, 38, // Opcode: LD2R_16B
-/* 9104 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 9135
-/* 9108 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 9111 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9123
-/* 9115 */ MCD_OPC_CheckPredicate, 0, 151, 143, // Skip to: 45878
-/* 9119 */ MCD_OPC_Decode, 244, 7, 34, // Opcode: LD2R_4H
-/* 9123 */ MCD_OPC_FilterValue, 1, 143, 143, // Skip to: 45878
-/* 9127 */ MCD_OPC_CheckPredicate, 0, 139, 143, // Skip to: 45878
-/* 9131 */ MCD_OPC_Decode, 247, 7, 38, // Opcode: LD2R_8H
-/* 9135 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 9166
-/* 9139 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 9142 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9154
-/* 9146 */ MCD_OPC_CheckPredicate, 0, 120, 143, // Skip to: 45878
-/* 9150 */ MCD_OPC_Decode, 243, 7, 34, // Opcode: LD2R_2S
-/* 9154 */ MCD_OPC_FilterValue, 1, 112, 143, // Skip to: 45878
-/* 9158 */ MCD_OPC_CheckPredicate, 0, 108, 143, // Skip to: 45878
-/* 9162 */ MCD_OPC_Decode, 245, 7, 38, // Opcode: LD2R_4S
-/* 9166 */ MCD_OPC_FilterValue, 3, 100, 143, // Skip to: 45878
-/* 9170 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 9173 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9185
-/* 9177 */ MCD_OPC_CheckPredicate, 0, 89, 143, // Skip to: 45878
-/* 9181 */ MCD_OPC_Decode, 241, 7, 34, // Opcode: LD2R_1D
-/* 9185 */ MCD_OPC_FilterValue, 1, 81, 143, // Skip to: 45878
-/* 9189 */ MCD_OPC_CheckPredicate, 0, 77, 143, // Skip to: 45878
-/* 9193 */ MCD_OPC_Decode, 242, 7, 38, // Opcode: LD2R_2D
-/* 9197 */ MCD_OPC_FilterValue, 135, 2, 68, 143, // Skip to: 45878
-/* 9202 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
-/* 9205 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 9236
-/* 9209 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 9212 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9224
-/* 9216 */ MCD_OPC_CheckPredicate, 0, 50, 143, // Skip to: 45878
-/* 9220 */ MCD_OPC_Decode, 232, 8, 31, // Opcode: LD4R_8B
-/* 9224 */ MCD_OPC_FilterValue, 1, 42, 143, // Skip to: 45878
-/* 9228 */ MCD_OPC_CheckPredicate, 0, 38, 143, // Skip to: 45878
-/* 9232 */ MCD_OPC_Decode, 226, 8, 35, // Opcode: LD4R_16B
-/* 9236 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 9267
-/* 9240 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 9243 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9255
-/* 9247 */ MCD_OPC_CheckPredicate, 0, 19, 143, // Skip to: 45878
-/* 9251 */ MCD_OPC_Decode, 230, 8, 31, // Opcode: LD4R_4H
-/* 9255 */ MCD_OPC_FilterValue, 1, 11, 143, // Skip to: 45878
-/* 9259 */ MCD_OPC_CheckPredicate, 0, 7, 143, // Skip to: 45878
-/* 9263 */ MCD_OPC_Decode, 233, 8, 35, // Opcode: LD4R_8H
-/* 9267 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 9298
-/* 9271 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 9274 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9286
-/* 9278 */ MCD_OPC_CheckPredicate, 0, 244, 142, // Skip to: 45878
-/* 9282 */ MCD_OPC_Decode, 229, 8, 31, // Opcode: LD4R_2S
-/* 9286 */ MCD_OPC_FilterValue, 1, 236, 142, // Skip to: 45878
-/* 9290 */ MCD_OPC_CheckPredicate, 0, 232, 142, // Skip to: 45878
-/* 9294 */ MCD_OPC_Decode, 231, 8, 35, // Opcode: LD4R_4S
-/* 9298 */ MCD_OPC_FilterValue, 3, 224, 142, // Skip to: 45878
-/* 9302 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 9305 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9317
-/* 9309 */ MCD_OPC_CheckPredicate, 0, 213, 142, // Skip to: 45878
-/* 9313 */ MCD_OPC_Decode, 227, 8, 31, // Opcode: LD4R_1D
-/* 9317 */ MCD_OPC_FilterValue, 1, 205, 142, // Skip to: 45878
-/* 9321 */ MCD_OPC_CheckPredicate, 0, 201, 142, // Skip to: 45878
-/* 9325 */ MCD_OPC_Decode, 228, 8, 35, // Opcode: LD4R_2D
-/* 9329 */ MCD_OPC_FilterValue, 1, 193, 142, // Skip to: 45878
-/* 9333 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 9336 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9348
-/* 9340 */ MCD_OPC_CheckPredicate, 1, 182, 142, // Skip to: 45878
-/* 9344 */ MCD_OPC_Decode, 199, 10, 1, // Opcode: LSFPPair32_LDR
-/* 9348 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 9360
-/* 9352 */ MCD_OPC_CheckPredicate, 1, 170, 142, // Skip to: 45878
-/* 9356 */ MCD_OPC_Decode, 207, 10, 1, // Opcode: LSFPPair64_LDR
-/* 9360 */ MCD_OPC_FilterValue, 2, 162, 142, // Skip to: 45878
-/* 9364 */ MCD_OPC_CheckPredicate, 1, 158, 142, // Skip to: 45878
-/* 9368 */ MCD_OPC_Decode, 191, 10, 1, // Opcode: LSFPPair128_LDR
-/* 9372 */ MCD_OPC_FilterValue, 6, 195, 2, // Skip to: 10083
-/* 9376 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ...
-/* 9379 */ MCD_OPC_FilterValue, 0, 145, 2, // Skip to: 10040
-/* 9383 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 9386 */ MCD_OPC_FilterValue, 0, 69, 0, // Skip to: 9459
-/* 9390 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 9393 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 9426
-/* 9397 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9400 */ MCD_OPC_FilterValue, 0, 122, 142, // Skip to: 45878
-/* 9404 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9418
-/* 9408 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9418
-/* 9414 */ MCD_OPC_Decode, 255, 15, 72, // Opcode: ST1LN_WB_B_fixed
-/* 9418 */ MCD_OPC_CheckPredicate, 0, 104, 142, // Skip to: 45878
-/* 9422 */ MCD_OPC_Decode, 128, 16, 72, // Opcode: ST1LN_WB_B_register
-/* 9426 */ MCD_OPC_FilterValue, 1, 96, 142, // Skip to: 45878
-/* 9430 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9433 */ MCD_OPC_FilterValue, 0, 89, 142, // Skip to: 45878
-/* 9437 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9451
-/* 9441 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9451
-/* 9447 */ MCD_OPC_Decode, 235, 16, 72, // Opcode: ST2LN_WB_B_fixed
-/* 9451 */ MCD_OPC_CheckPredicate, 0, 71, 142, // Skip to: 45878
-/* 9455 */ MCD_OPC_Decode, 236, 16, 72, // Opcode: ST2LN_WB_B_register
-/* 9459 */ MCD_OPC_FilterValue, 1, 69, 0, // Skip to: 9532
-/* 9463 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 9466 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 9499
-/* 9470 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9473 */ MCD_OPC_FilterValue, 0, 49, 142, // Skip to: 45878
-/* 9477 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9491
-/* 9481 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9491
-/* 9487 */ MCD_OPC_Decode, 140, 17, 72, // Opcode: ST3LN_WB_B_fixed
-/* 9491 */ MCD_OPC_CheckPredicate, 0, 31, 142, // Skip to: 45878
-/* 9495 */ MCD_OPC_Decode, 141, 17, 72, // Opcode: ST3LN_WB_B_register
-/* 9499 */ MCD_OPC_FilterValue, 1, 23, 142, // Skip to: 45878
-/* 9503 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9506 */ MCD_OPC_FilterValue, 0, 16, 142, // Skip to: 45878
-/* 9510 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9524
-/* 9514 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9524
-/* 9520 */ MCD_OPC_Decode, 173, 17, 72, // Opcode: ST4LN_WB_B_fixed
-/* 9524 */ MCD_OPC_CheckPredicate, 0, 254, 141, // Skip to: 45878
-/* 9528 */ MCD_OPC_Decode, 174, 17, 72, // Opcode: ST4LN_WB_B_register
-/* 9532 */ MCD_OPC_FilterValue, 2, 83, 0, // Skip to: 9619
-/* 9536 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 9539 */ MCD_OPC_FilterValue, 0, 36, 0, // Skip to: 9579
-/* 9543 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 9546 */ MCD_OPC_FilterValue, 0, 232, 141, // Skip to: 45878
-/* 9550 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9553 */ MCD_OPC_FilterValue, 0, 225, 141, // Skip to: 45878
-/* 9557 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9571
-/* 9561 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9571
-/* 9567 */ MCD_OPC_Decode, 131, 16, 72, // Opcode: ST1LN_WB_H_fixed
-/* 9571 */ MCD_OPC_CheckPredicate, 0, 207, 141, // Skip to: 45878
-/* 9575 */ MCD_OPC_Decode, 132, 16, 72, // Opcode: ST1LN_WB_H_register
-/* 9579 */ MCD_OPC_FilterValue, 1, 199, 141, // Skip to: 45878
-/* 9583 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 9586 */ MCD_OPC_FilterValue, 0, 192, 141, // Skip to: 45878
-/* 9590 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9593 */ MCD_OPC_FilterValue, 0, 185, 141, // Skip to: 45878
-/* 9597 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9611
-/* 9601 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9611
-/* 9607 */ MCD_OPC_Decode, 239, 16, 72, // Opcode: ST2LN_WB_H_fixed
-/* 9611 */ MCD_OPC_CheckPredicate, 0, 167, 141, // Skip to: 45878
-/* 9615 */ MCD_OPC_Decode, 240, 16, 72, // Opcode: ST2LN_WB_H_register
-/* 9619 */ MCD_OPC_FilterValue, 3, 83, 0, // Skip to: 9706
-/* 9623 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 9626 */ MCD_OPC_FilterValue, 0, 36, 0, // Skip to: 9666
-/* 9630 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 9633 */ MCD_OPC_FilterValue, 0, 145, 141, // Skip to: 45878
-/* 9637 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9640 */ MCD_OPC_FilterValue, 0, 138, 141, // Skip to: 45878
-/* 9644 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9658
-/* 9648 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9658
-/* 9654 */ MCD_OPC_Decode, 144, 17, 72, // Opcode: ST3LN_WB_H_fixed
-/* 9658 */ MCD_OPC_CheckPredicate, 0, 120, 141, // Skip to: 45878
-/* 9662 */ MCD_OPC_Decode, 145, 17, 72, // Opcode: ST3LN_WB_H_register
-/* 9666 */ MCD_OPC_FilterValue, 1, 112, 141, // Skip to: 45878
-/* 9670 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 9673 */ MCD_OPC_FilterValue, 0, 105, 141, // Skip to: 45878
-/* 9677 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9680 */ MCD_OPC_FilterValue, 0, 98, 141, // Skip to: 45878
-/* 9684 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9698
-/* 9688 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9698
-/* 9694 */ MCD_OPC_Decode, 177, 17, 72, // Opcode: ST4LN_WB_H_fixed
-/* 9698 */ MCD_OPC_CheckPredicate, 0, 80, 141, // Skip to: 45878
-/* 9702 */ MCD_OPC_Decode, 178, 17, 72, // Opcode: ST4LN_WB_H_register
-/* 9706 */ MCD_OPC_FilterValue, 4, 163, 0, // Skip to: 9873
-/* 9710 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 9713 */ MCD_OPC_FilterValue, 0, 69, 0, // Skip to: 9786
-/* 9717 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 9720 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 9753
-/* 9724 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9727 */ MCD_OPC_FilterValue, 0, 51, 141, // Skip to: 45878
-/* 9731 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9745
-/* 9735 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9745
-/* 9741 */ MCD_OPC_Decode, 133, 16, 72, // Opcode: ST1LN_WB_S_fixed
-/* 9745 */ MCD_OPC_CheckPredicate, 0, 33, 141, // Skip to: 45878
-/* 9749 */ MCD_OPC_Decode, 134, 16, 72, // Opcode: ST1LN_WB_S_register
-/* 9753 */ MCD_OPC_FilterValue, 1, 25, 141, // Skip to: 45878
-/* 9757 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9760 */ MCD_OPC_FilterValue, 0, 18, 141, // Skip to: 45878
-/* 9764 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9778
-/* 9768 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9778
-/* 9774 */ MCD_OPC_Decode, 241, 16, 72, // Opcode: ST2LN_WB_S_fixed
-/* 9778 */ MCD_OPC_CheckPredicate, 0, 0, 141, // Skip to: 45878
-/* 9782 */ MCD_OPC_Decode, 242, 16, 72, // Opcode: ST2LN_WB_S_register
-/* 9786 */ MCD_OPC_FilterValue, 1, 248, 140, // Skip to: 45878
-/* 9790 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 9793 */ MCD_OPC_FilterValue, 0, 36, 0, // Skip to: 9833
-/* 9797 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 9800 */ MCD_OPC_FilterValue, 0, 234, 140, // Skip to: 45878
-/* 9804 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9807 */ MCD_OPC_FilterValue, 0, 227, 140, // Skip to: 45878
-/* 9811 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9825
-/* 9815 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9825
-/* 9821 */ MCD_OPC_Decode, 129, 16, 72, // Opcode: ST1LN_WB_D_fixed
-/* 9825 */ MCD_OPC_CheckPredicate, 0, 209, 140, // Skip to: 45878
-/* 9829 */ MCD_OPC_Decode, 130, 16, 72, // Opcode: ST1LN_WB_D_register
-/* 9833 */ MCD_OPC_FilterValue, 1, 201, 140, // Skip to: 45878
-/* 9837 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 9840 */ MCD_OPC_FilterValue, 0, 194, 140, // Skip to: 45878
-/* 9844 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9847 */ MCD_OPC_FilterValue, 0, 187, 140, // Skip to: 45878
-/* 9851 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9865
-/* 9855 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9865
-/* 9861 */ MCD_OPC_Decode, 237, 16, 72, // Opcode: ST2LN_WB_D_fixed
-/* 9865 */ MCD_OPC_CheckPredicate, 0, 169, 140, // Skip to: 45878
-/* 9869 */ MCD_OPC_Decode, 238, 16, 72, // Opcode: ST2LN_WB_D_register
-/* 9873 */ MCD_OPC_FilterValue, 5, 161, 140, // Skip to: 45878
-/* 9877 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 9880 */ MCD_OPC_FilterValue, 0, 69, 0, // Skip to: 9953
-/* 9884 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 9887 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 9920
-/* 9891 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9894 */ MCD_OPC_FilterValue, 0, 140, 140, // Skip to: 45878
-/* 9898 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9912
-/* 9902 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9912
-/* 9908 */ MCD_OPC_Decode, 146, 17, 72, // Opcode: ST3LN_WB_S_fixed
-/* 9912 */ MCD_OPC_CheckPredicate, 0, 122, 140, // Skip to: 45878
-/* 9916 */ MCD_OPC_Decode, 147, 17, 72, // Opcode: ST3LN_WB_S_register
-/* 9920 */ MCD_OPC_FilterValue, 1, 114, 140, // Skip to: 45878
-/* 9924 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9927 */ MCD_OPC_FilterValue, 0, 107, 140, // Skip to: 45878
-/* 9931 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9945
-/* 9935 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9945
-/* 9941 */ MCD_OPC_Decode, 179, 17, 72, // Opcode: ST4LN_WB_S_fixed
-/* 9945 */ MCD_OPC_CheckPredicate, 0, 89, 140, // Skip to: 45878
-/* 9949 */ MCD_OPC_Decode, 180, 17, 72, // Opcode: ST4LN_WB_S_register
-/* 9953 */ MCD_OPC_FilterValue, 1, 81, 140, // Skip to: 45878
-/* 9957 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 9960 */ MCD_OPC_FilterValue, 0, 36, 0, // Skip to: 10000
-/* 9964 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 9967 */ MCD_OPC_FilterValue, 0, 67, 140, // Skip to: 45878
-/* 9971 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 9974 */ MCD_OPC_FilterValue, 0, 60, 140, // Skip to: 45878
-/* 9978 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 9992
-/* 9982 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 9992
-/* 9988 */ MCD_OPC_Decode, 142, 17, 72, // Opcode: ST3LN_WB_D_fixed
-/* 9992 */ MCD_OPC_CheckPredicate, 0, 42, 140, // Skip to: 45878
-/* 9996 */ MCD_OPC_Decode, 143, 17, 72, // Opcode: ST3LN_WB_D_register
-/* 10000 */ MCD_OPC_FilterValue, 1, 34, 140, // Skip to: 45878
-/* 10004 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 10007 */ MCD_OPC_FilterValue, 0, 27, 140, // Skip to: 45878
-/* 10011 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10014 */ MCD_OPC_FilterValue, 0, 20, 140, // Skip to: 45878
-/* 10018 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10032
-/* 10022 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10032
-/* 10028 */ MCD_OPC_Decode, 175, 17, 72, // Opcode: ST4LN_WB_D_fixed
-/* 10032 */ MCD_OPC_CheckPredicate, 0, 2, 140, // Skip to: 45878
-/* 10036 */ MCD_OPC_Decode, 176, 17, 72, // Opcode: ST4LN_WB_D_register
-/* 10040 */ MCD_OPC_FilterValue, 1, 250, 139, // Skip to: 45878
-/* 10044 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 10047 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10059
-/* 10051 */ MCD_OPC_CheckPredicate, 1, 239, 139, // Skip to: 45878
-/* 10055 */ MCD_OPC_Decode, 205, 10, 1, // Opcode: LSFPPair32_PreInd_STR
-/* 10059 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 10071
-/* 10063 */ MCD_OPC_CheckPredicate, 1, 227, 139, // Skip to: 45878
-/* 10067 */ MCD_OPC_Decode, 213, 10, 1, // Opcode: LSFPPair64_PreInd_STR
-/* 10071 */ MCD_OPC_FilterValue, 2, 219, 139, // Skip to: 45878
-/* 10075 */ MCD_OPC_CheckPredicate, 1, 215, 139, // Skip to: 45878
-/* 10079 */ MCD_OPC_Decode, 197, 10, 1, // Opcode: LSFPPair128_PreInd_STR
-/* 10083 */ MCD_OPC_FilterValue, 7, 185, 6, // Skip to: 11808
-/* 10087 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ...
-/* 10090 */ MCD_OPC_FilterValue, 0, 135, 6, // Skip to: 11765
-/* 10094 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 10097 */ MCD_OPC_FilterValue, 0, 69, 0, // Skip to: 10170
-/* 10101 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 10104 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 10137
-/* 10108 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10111 */ MCD_OPC_FilterValue, 0, 179, 139, // Skip to: 45878
-/* 10115 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10129
-/* 10119 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10129
-/* 10125 */ MCD_OPC_Decode, 228, 6, 72, // Opcode: LD1LN_WB_B_fixed
-/* 10129 */ MCD_OPC_CheckPredicate, 0, 161, 139, // Skip to: 45878
-/* 10133 */ MCD_OPC_Decode, 229, 6, 72, // Opcode: LD1LN_WB_B_register
-/* 10137 */ MCD_OPC_FilterValue, 1, 153, 139, // Skip to: 45878
-/* 10141 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10144 */ MCD_OPC_FilterValue, 0, 146, 139, // Skip to: 45878
-/* 10148 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10162
-/* 10152 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10162
-/* 10158 */ MCD_OPC_Decode, 232, 7, 72, // Opcode: LD2LN_WB_B_fixed
-/* 10162 */ MCD_OPC_CheckPredicate, 0, 128, 139, // Skip to: 45878
-/* 10166 */ MCD_OPC_Decode, 233, 7, 72, // Opcode: LD2LN_WB_B_register
-/* 10170 */ MCD_OPC_FilterValue, 1, 69, 0, // Skip to: 10243
-/* 10174 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 10177 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 10210
-/* 10181 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10184 */ MCD_OPC_FilterValue, 0, 106, 139, // Skip to: 45878
-/* 10188 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10202
-/* 10192 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10202
-/* 10198 */ MCD_OPC_Decode, 161, 8, 72, // Opcode: LD3LN_WB_B_fixed
-/* 10202 */ MCD_OPC_CheckPredicate, 0, 88, 139, // Skip to: 45878
-/* 10206 */ MCD_OPC_Decode, 162, 8, 72, // Opcode: LD3LN_WB_B_register
-/* 10210 */ MCD_OPC_FilterValue, 1, 80, 139, // Skip to: 45878
-/* 10214 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10217 */ MCD_OPC_FilterValue, 0, 73, 139, // Skip to: 45878
-/* 10221 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10235
-/* 10225 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10235
-/* 10231 */ MCD_OPC_Decode, 218, 8, 72, // Opcode: LD4LN_WB_B_fixed
-/* 10235 */ MCD_OPC_CheckPredicate, 0, 55, 139, // Skip to: 45878
-/* 10239 */ MCD_OPC_Decode, 219, 8, 72, // Opcode: LD4LN_WB_B_register
-/* 10243 */ MCD_OPC_FilterValue, 2, 83, 0, // Skip to: 10330
-/* 10247 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 10250 */ MCD_OPC_FilterValue, 0, 36, 0, // Skip to: 10290
-/* 10254 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 10257 */ MCD_OPC_FilterValue, 0, 33, 139, // Skip to: 45878
-/* 10261 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10264 */ MCD_OPC_FilterValue, 0, 26, 139, // Skip to: 45878
-/* 10268 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10282
-/* 10272 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10282
-/* 10278 */ MCD_OPC_Decode, 232, 6, 72, // Opcode: LD1LN_WB_H_fixed
-/* 10282 */ MCD_OPC_CheckPredicate, 0, 8, 139, // Skip to: 45878
-/* 10286 */ MCD_OPC_Decode, 233, 6, 72, // Opcode: LD1LN_WB_H_register
-/* 10290 */ MCD_OPC_FilterValue, 1, 0, 139, // Skip to: 45878
-/* 10294 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 10297 */ MCD_OPC_FilterValue, 0, 249, 138, // Skip to: 45878
-/* 10301 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10304 */ MCD_OPC_FilterValue, 0, 242, 138, // Skip to: 45878
-/* 10308 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10322
-/* 10312 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10322
-/* 10318 */ MCD_OPC_Decode, 236, 7, 72, // Opcode: LD2LN_WB_H_fixed
-/* 10322 */ MCD_OPC_CheckPredicate, 0, 224, 138, // Skip to: 45878
-/* 10326 */ MCD_OPC_Decode, 237, 7, 72, // Opcode: LD2LN_WB_H_register
-/* 10330 */ MCD_OPC_FilterValue, 3, 83, 0, // Skip to: 10417
-/* 10334 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 10337 */ MCD_OPC_FilterValue, 0, 36, 0, // Skip to: 10377
-/* 10341 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 10344 */ MCD_OPC_FilterValue, 0, 202, 138, // Skip to: 45878
-/* 10348 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10351 */ MCD_OPC_FilterValue, 0, 195, 138, // Skip to: 45878
-/* 10355 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10369
-/* 10359 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10369
-/* 10365 */ MCD_OPC_Decode, 165, 8, 72, // Opcode: LD3LN_WB_H_fixed
-/* 10369 */ MCD_OPC_CheckPredicate, 0, 177, 138, // Skip to: 45878
-/* 10373 */ MCD_OPC_Decode, 166, 8, 72, // Opcode: LD3LN_WB_H_register
-/* 10377 */ MCD_OPC_FilterValue, 1, 169, 138, // Skip to: 45878
-/* 10381 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 10384 */ MCD_OPC_FilterValue, 0, 162, 138, // Skip to: 45878
-/* 10388 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10391 */ MCD_OPC_FilterValue, 0, 155, 138, // Skip to: 45878
-/* 10395 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10409
-/* 10399 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10409
-/* 10405 */ MCD_OPC_Decode, 222, 8, 72, // Opcode: LD4LN_WB_H_fixed
-/* 10409 */ MCD_OPC_CheckPredicate, 0, 137, 138, // Skip to: 45878
-/* 10413 */ MCD_OPC_Decode, 223, 8, 72, // Opcode: LD4LN_WB_H_register
-/* 10417 */ MCD_OPC_FilterValue, 4, 163, 0, // Skip to: 10584
-/* 10421 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 10424 */ MCD_OPC_FilterValue, 0, 69, 0, // Skip to: 10497
-/* 10428 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 10431 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 10464
-/* 10435 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10438 */ MCD_OPC_FilterValue, 0, 108, 138, // Skip to: 45878
-/* 10442 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10456
-/* 10446 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10456
-/* 10452 */ MCD_OPC_Decode, 234, 6, 72, // Opcode: LD1LN_WB_S_fixed
-/* 10456 */ MCD_OPC_CheckPredicate, 0, 90, 138, // Skip to: 45878
-/* 10460 */ MCD_OPC_Decode, 235, 6, 72, // Opcode: LD1LN_WB_S_register
-/* 10464 */ MCD_OPC_FilterValue, 1, 82, 138, // Skip to: 45878
-/* 10468 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10471 */ MCD_OPC_FilterValue, 0, 75, 138, // Skip to: 45878
-/* 10475 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10489
-/* 10479 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10489
-/* 10485 */ MCD_OPC_Decode, 238, 7, 72, // Opcode: LD2LN_WB_S_fixed
-/* 10489 */ MCD_OPC_CheckPredicate, 0, 57, 138, // Skip to: 45878
-/* 10493 */ MCD_OPC_Decode, 239, 7, 72, // Opcode: LD2LN_WB_S_register
-/* 10497 */ MCD_OPC_FilterValue, 1, 49, 138, // Skip to: 45878
-/* 10501 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 10504 */ MCD_OPC_FilterValue, 0, 36, 0, // Skip to: 10544
-/* 10508 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 10511 */ MCD_OPC_FilterValue, 0, 35, 138, // Skip to: 45878
-/* 10515 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10518 */ MCD_OPC_FilterValue, 0, 28, 138, // Skip to: 45878
-/* 10522 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10536
-/* 10526 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10536
-/* 10532 */ MCD_OPC_Decode, 230, 6, 72, // Opcode: LD1LN_WB_D_fixed
-/* 10536 */ MCD_OPC_CheckPredicate, 0, 10, 138, // Skip to: 45878
-/* 10540 */ MCD_OPC_Decode, 231, 6, 72, // Opcode: LD1LN_WB_D_register
-/* 10544 */ MCD_OPC_FilterValue, 1, 2, 138, // Skip to: 45878
-/* 10548 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 10551 */ MCD_OPC_FilterValue, 0, 251, 137, // Skip to: 45878
-/* 10555 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10558 */ MCD_OPC_FilterValue, 0, 244, 137, // Skip to: 45878
-/* 10562 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10576
-/* 10566 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10576
-/* 10572 */ MCD_OPC_Decode, 234, 7, 72, // Opcode: LD2LN_WB_D_fixed
-/* 10576 */ MCD_OPC_CheckPredicate, 0, 226, 137, // Skip to: 45878
-/* 10580 */ MCD_OPC_Decode, 235, 7, 72, // Opcode: LD2LN_WB_D_register
-/* 10584 */ MCD_OPC_FilterValue, 5, 163, 0, // Skip to: 10751
-/* 10588 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 10591 */ MCD_OPC_FilterValue, 0, 69, 0, // Skip to: 10664
-/* 10595 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 10598 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 10631
-/* 10602 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10605 */ MCD_OPC_FilterValue, 0, 197, 137, // Skip to: 45878
-/* 10609 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10623
-/* 10613 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10623
-/* 10619 */ MCD_OPC_Decode, 167, 8, 72, // Opcode: LD3LN_WB_S_fixed
-/* 10623 */ MCD_OPC_CheckPredicate, 0, 179, 137, // Skip to: 45878
-/* 10627 */ MCD_OPC_Decode, 168, 8, 72, // Opcode: LD3LN_WB_S_register
-/* 10631 */ MCD_OPC_FilterValue, 1, 171, 137, // Skip to: 45878
-/* 10635 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10638 */ MCD_OPC_FilterValue, 0, 164, 137, // Skip to: 45878
-/* 10642 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10656
-/* 10646 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10656
-/* 10652 */ MCD_OPC_Decode, 224, 8, 72, // Opcode: LD4LN_WB_S_fixed
-/* 10656 */ MCD_OPC_CheckPredicate, 0, 146, 137, // Skip to: 45878
-/* 10660 */ MCD_OPC_Decode, 225, 8, 72, // Opcode: LD4LN_WB_S_register
-/* 10664 */ MCD_OPC_FilterValue, 1, 138, 137, // Skip to: 45878
-/* 10668 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 10671 */ MCD_OPC_FilterValue, 0, 36, 0, // Skip to: 10711
-/* 10675 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 10678 */ MCD_OPC_FilterValue, 0, 124, 137, // Skip to: 45878
-/* 10682 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10685 */ MCD_OPC_FilterValue, 0, 117, 137, // Skip to: 45878
-/* 10689 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10703
-/* 10693 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10703
-/* 10699 */ MCD_OPC_Decode, 163, 8, 72, // Opcode: LD3LN_WB_D_fixed
-/* 10703 */ MCD_OPC_CheckPredicate, 0, 99, 137, // Skip to: 45878
-/* 10707 */ MCD_OPC_Decode, 164, 8, 72, // Opcode: LD3LN_WB_D_register
-/* 10711 */ MCD_OPC_FilterValue, 1, 91, 137, // Skip to: 45878
-/* 10715 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 10718 */ MCD_OPC_FilterValue, 0, 84, 137, // Skip to: 45878
-/* 10722 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 10725 */ MCD_OPC_FilterValue, 0, 77, 137, // Skip to: 45878
-/* 10729 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10743
-/* 10733 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10743
-/* 10739 */ MCD_OPC_Decode, 220, 8, 72, // Opcode: LD4LN_WB_D_fixed
-/* 10743 */ MCD_OPC_CheckPredicate, 0, 59, 137, // Skip to: 45878
-/* 10747 */ MCD_OPC_Decode, 221, 8, 72, // Opcode: LD4LN_WB_D_register
-/* 10751 */ MCD_OPC_FilterValue, 6, 247, 1, // Skip to: 11258
-/* 10755 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
-/* 10758 */ MCD_OPC_FilterValue, 0, 121, 0, // Skip to: 10883
-/* 10762 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 10765 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 10824
-/* 10769 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 10772 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 10798
-/* 10776 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10790
-/* 10780 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10790
-/* 10786 */ MCD_OPC_Decode, 128, 7, 72, // Opcode: LD1R_WB_8B_fixed
-/* 10790 */ MCD_OPC_CheckPredicate, 0, 12, 137, // Skip to: 45878
-/* 10794 */ MCD_OPC_Decode, 129, 7, 72, // Opcode: LD1R_WB_8B_register
-/* 10798 */ MCD_OPC_FilterValue, 1, 4, 137, // Skip to: 45878
-/* 10802 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10816
-/* 10806 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10816
-/* 10812 */ MCD_OPC_Decode, 244, 6, 72, // Opcode: LD1R_WB_16B_fixed
-/* 10816 */ MCD_OPC_CheckPredicate, 0, 242, 136, // Skip to: 45878
-/* 10820 */ MCD_OPC_Decode, 245, 6, 72, // Opcode: LD1R_WB_16B_register
-/* 10824 */ MCD_OPC_FilterValue, 1, 234, 136, // Skip to: 45878
-/* 10828 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 10831 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 10857
-/* 10835 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10849
-/* 10839 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10849
-/* 10845 */ MCD_OPC_Decode, 132, 8, 72, // Opcode: LD2R_WB_8B_fixed
-/* 10849 */ MCD_OPC_CheckPredicate, 0, 209, 136, // Skip to: 45878
-/* 10853 */ MCD_OPC_Decode, 133, 8, 72, // Opcode: LD2R_WB_8B_register
-/* 10857 */ MCD_OPC_FilterValue, 1, 201, 136, // Skip to: 45878
-/* 10861 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10875
-/* 10865 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10875
-/* 10871 */ MCD_OPC_Decode, 248, 7, 72, // Opcode: LD2R_WB_16B_fixed
-/* 10875 */ MCD_OPC_CheckPredicate, 0, 183, 136, // Skip to: 45878
-/* 10879 */ MCD_OPC_Decode, 249, 7, 72, // Opcode: LD2R_WB_16B_register
-/* 10883 */ MCD_OPC_FilterValue, 1, 121, 0, // Skip to: 11008
-/* 10887 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 10890 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 10949
-/* 10894 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 10897 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 10923
-/* 10901 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10915
-/* 10905 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10915
-/* 10911 */ MCD_OPC_Decode, 252, 6, 72, // Opcode: LD1R_WB_4H_fixed
-/* 10915 */ MCD_OPC_CheckPredicate, 0, 143, 136, // Skip to: 45878
-/* 10919 */ MCD_OPC_Decode, 253, 6, 72, // Opcode: LD1R_WB_4H_register
-/* 10923 */ MCD_OPC_FilterValue, 1, 135, 136, // Skip to: 45878
-/* 10927 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10941
-/* 10931 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10941
-/* 10937 */ MCD_OPC_Decode, 130, 7, 72, // Opcode: LD1R_WB_8H_fixed
-/* 10941 */ MCD_OPC_CheckPredicate, 0, 117, 136, // Skip to: 45878
-/* 10945 */ MCD_OPC_Decode, 131, 7, 72, // Opcode: LD1R_WB_8H_register
-/* 10949 */ MCD_OPC_FilterValue, 1, 109, 136, // Skip to: 45878
-/* 10953 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 10956 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 10982
-/* 10960 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 10974
-/* 10964 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 10974
-/* 10970 */ MCD_OPC_Decode, 128, 8, 72, // Opcode: LD2R_WB_4H_fixed
-/* 10974 */ MCD_OPC_CheckPredicate, 0, 84, 136, // Skip to: 45878
-/* 10978 */ MCD_OPC_Decode, 129, 8, 72, // Opcode: LD2R_WB_4H_register
-/* 10982 */ MCD_OPC_FilterValue, 1, 76, 136, // Skip to: 45878
-/* 10986 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11000
-/* 10990 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11000
-/* 10996 */ MCD_OPC_Decode, 134, 8, 72, // Opcode: LD2R_WB_8H_fixed
-/* 11000 */ MCD_OPC_CheckPredicate, 0, 58, 136, // Skip to: 45878
-/* 11004 */ MCD_OPC_Decode, 135, 8, 72, // Opcode: LD2R_WB_8H_register
-/* 11008 */ MCD_OPC_FilterValue, 2, 121, 0, // Skip to: 11133
-/* 11012 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 11015 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 11074
-/* 11019 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11022 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11048
-/* 11026 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11040
-/* 11030 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11040
-/* 11036 */ MCD_OPC_Decode, 250, 6, 72, // Opcode: LD1R_WB_2S_fixed
-/* 11040 */ MCD_OPC_CheckPredicate, 0, 18, 136, // Skip to: 45878
-/* 11044 */ MCD_OPC_Decode, 251, 6, 72, // Opcode: LD1R_WB_2S_register
-/* 11048 */ MCD_OPC_FilterValue, 1, 10, 136, // Skip to: 45878
-/* 11052 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11066
-/* 11056 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11066
-/* 11062 */ MCD_OPC_Decode, 254, 6, 72, // Opcode: LD1R_WB_4S_fixed
-/* 11066 */ MCD_OPC_CheckPredicate, 0, 248, 135, // Skip to: 45878
-/* 11070 */ MCD_OPC_Decode, 255, 6, 72, // Opcode: LD1R_WB_4S_register
-/* 11074 */ MCD_OPC_FilterValue, 1, 240, 135, // Skip to: 45878
-/* 11078 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11081 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11107
-/* 11085 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11099
-/* 11089 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11099
-/* 11095 */ MCD_OPC_Decode, 254, 7, 72, // Opcode: LD2R_WB_2S_fixed
-/* 11099 */ MCD_OPC_CheckPredicate, 0, 215, 135, // Skip to: 45878
-/* 11103 */ MCD_OPC_Decode, 255, 7, 72, // Opcode: LD2R_WB_2S_register
-/* 11107 */ MCD_OPC_FilterValue, 1, 207, 135, // Skip to: 45878
-/* 11111 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11125
-/* 11115 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11125
-/* 11121 */ MCD_OPC_Decode, 130, 8, 72, // Opcode: LD2R_WB_4S_fixed
-/* 11125 */ MCD_OPC_CheckPredicate, 0, 189, 135, // Skip to: 45878
-/* 11129 */ MCD_OPC_Decode, 131, 8, 72, // Opcode: LD2R_WB_4S_register
-/* 11133 */ MCD_OPC_FilterValue, 3, 181, 135, // Skip to: 45878
-/* 11137 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 11140 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 11199
-/* 11144 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11147 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11173
-/* 11151 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11165
-/* 11155 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11165
-/* 11161 */ MCD_OPC_Decode, 246, 6, 72, // Opcode: LD1R_WB_1D_fixed
-/* 11165 */ MCD_OPC_CheckPredicate, 0, 149, 135, // Skip to: 45878
-/* 11169 */ MCD_OPC_Decode, 247, 6, 72, // Opcode: LD1R_WB_1D_register
-/* 11173 */ MCD_OPC_FilterValue, 1, 141, 135, // Skip to: 45878
-/* 11177 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11191
-/* 11181 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11191
-/* 11187 */ MCD_OPC_Decode, 248, 6, 72, // Opcode: LD1R_WB_2D_fixed
-/* 11191 */ MCD_OPC_CheckPredicate, 0, 123, 135, // Skip to: 45878
-/* 11195 */ MCD_OPC_Decode, 249, 6, 72, // Opcode: LD1R_WB_2D_register
-/* 11199 */ MCD_OPC_FilterValue, 1, 115, 135, // Skip to: 45878
-/* 11203 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11206 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11232
-/* 11210 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11224
-/* 11214 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11224
-/* 11220 */ MCD_OPC_Decode, 250, 7, 72, // Opcode: LD2R_WB_1D_fixed
-/* 11224 */ MCD_OPC_CheckPredicate, 0, 90, 135, // Skip to: 45878
-/* 11228 */ MCD_OPC_Decode, 251, 7, 72, // Opcode: LD2R_WB_1D_register
-/* 11232 */ MCD_OPC_FilterValue, 1, 82, 135, // Skip to: 45878
-/* 11236 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11250
-/* 11240 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11250
-/* 11246 */ MCD_OPC_Decode, 252, 7, 72, // Opcode: LD2R_WB_2D_fixed
-/* 11250 */ MCD_OPC_CheckPredicate, 0, 64, 135, // Skip to: 45878
-/* 11254 */ MCD_OPC_Decode, 253, 7, 72, // Opcode: LD2R_WB_2D_register
-/* 11258 */ MCD_OPC_FilterValue, 7, 56, 135, // Skip to: 45878
-/* 11262 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
-/* 11265 */ MCD_OPC_FilterValue, 0, 121, 0, // Skip to: 11390
-/* 11269 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 11272 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 11331
-/* 11276 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11279 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11305
-/* 11283 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11297
-/* 11287 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11297
-/* 11293 */ MCD_OPC_Decode, 189, 8, 72, // Opcode: LD3R_WB_8B_fixed
-/* 11297 */ MCD_OPC_CheckPredicate, 0, 17, 135, // Skip to: 45878
-/* 11301 */ MCD_OPC_Decode, 190, 8, 72, // Opcode: LD3R_WB_8B_register
-/* 11305 */ MCD_OPC_FilterValue, 1, 9, 135, // Skip to: 45878
-/* 11309 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11323
-/* 11313 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11323
-/* 11319 */ MCD_OPC_Decode, 177, 8, 72, // Opcode: LD3R_WB_16B_fixed
-/* 11323 */ MCD_OPC_CheckPredicate, 0, 247, 134, // Skip to: 45878
-/* 11327 */ MCD_OPC_Decode, 178, 8, 72, // Opcode: LD3R_WB_16B_register
-/* 11331 */ MCD_OPC_FilterValue, 1, 239, 134, // Skip to: 45878
-/* 11335 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11338 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11364
-/* 11342 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11356
-/* 11346 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11356
-/* 11352 */ MCD_OPC_Decode, 246, 8, 72, // Opcode: LD4R_WB_8B_fixed
-/* 11356 */ MCD_OPC_CheckPredicate, 0, 214, 134, // Skip to: 45878
-/* 11360 */ MCD_OPC_Decode, 247, 8, 72, // Opcode: LD4R_WB_8B_register
-/* 11364 */ MCD_OPC_FilterValue, 1, 206, 134, // Skip to: 45878
-/* 11368 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11382
-/* 11372 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11382
-/* 11378 */ MCD_OPC_Decode, 234, 8, 72, // Opcode: LD4R_WB_16B_fixed
-/* 11382 */ MCD_OPC_CheckPredicate, 0, 188, 134, // Skip to: 45878
-/* 11386 */ MCD_OPC_Decode, 235, 8, 72, // Opcode: LD4R_WB_16B_register
-/* 11390 */ MCD_OPC_FilterValue, 1, 121, 0, // Skip to: 11515
-/* 11394 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 11397 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 11456
-/* 11401 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11404 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11430
-/* 11408 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11422
-/* 11412 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11422
-/* 11418 */ MCD_OPC_Decode, 185, 8, 72, // Opcode: LD3R_WB_4H_fixed
-/* 11422 */ MCD_OPC_CheckPredicate, 0, 148, 134, // Skip to: 45878
-/* 11426 */ MCD_OPC_Decode, 186, 8, 72, // Opcode: LD3R_WB_4H_register
-/* 11430 */ MCD_OPC_FilterValue, 1, 140, 134, // Skip to: 45878
-/* 11434 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11448
-/* 11438 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11448
-/* 11444 */ MCD_OPC_Decode, 191, 8, 72, // Opcode: LD3R_WB_8H_fixed
-/* 11448 */ MCD_OPC_CheckPredicate, 0, 122, 134, // Skip to: 45878
-/* 11452 */ MCD_OPC_Decode, 192, 8, 72, // Opcode: LD3R_WB_8H_register
-/* 11456 */ MCD_OPC_FilterValue, 1, 114, 134, // Skip to: 45878
-/* 11460 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11463 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11489
-/* 11467 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11481
-/* 11471 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11481
-/* 11477 */ MCD_OPC_Decode, 242, 8, 72, // Opcode: LD4R_WB_4H_fixed
-/* 11481 */ MCD_OPC_CheckPredicate, 0, 89, 134, // Skip to: 45878
-/* 11485 */ MCD_OPC_Decode, 243, 8, 72, // Opcode: LD4R_WB_4H_register
-/* 11489 */ MCD_OPC_FilterValue, 1, 81, 134, // Skip to: 45878
-/* 11493 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11507
-/* 11497 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11507
-/* 11503 */ MCD_OPC_Decode, 248, 8, 72, // Opcode: LD4R_WB_8H_fixed
-/* 11507 */ MCD_OPC_CheckPredicate, 0, 63, 134, // Skip to: 45878
-/* 11511 */ MCD_OPC_Decode, 249, 8, 72, // Opcode: LD4R_WB_8H_register
-/* 11515 */ MCD_OPC_FilterValue, 2, 121, 0, // Skip to: 11640
-/* 11519 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 11522 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 11581
-/* 11526 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11529 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11555
-/* 11533 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11547
-/* 11537 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11547
-/* 11543 */ MCD_OPC_Decode, 183, 8, 72, // Opcode: LD3R_WB_2S_fixed
-/* 11547 */ MCD_OPC_CheckPredicate, 0, 23, 134, // Skip to: 45878
-/* 11551 */ MCD_OPC_Decode, 184, 8, 72, // Opcode: LD3R_WB_2S_register
-/* 11555 */ MCD_OPC_FilterValue, 1, 15, 134, // Skip to: 45878
-/* 11559 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11573
-/* 11563 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11573
-/* 11569 */ MCD_OPC_Decode, 187, 8, 72, // Opcode: LD3R_WB_4S_fixed
-/* 11573 */ MCD_OPC_CheckPredicate, 0, 253, 133, // Skip to: 45878
-/* 11577 */ MCD_OPC_Decode, 188, 8, 72, // Opcode: LD3R_WB_4S_register
-/* 11581 */ MCD_OPC_FilterValue, 1, 245, 133, // Skip to: 45878
-/* 11585 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11588 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11614
-/* 11592 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11606
-/* 11596 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11606
-/* 11602 */ MCD_OPC_Decode, 240, 8, 72, // Opcode: LD4R_WB_2S_fixed
-/* 11606 */ MCD_OPC_CheckPredicate, 0, 220, 133, // Skip to: 45878
-/* 11610 */ MCD_OPC_Decode, 241, 8, 72, // Opcode: LD4R_WB_2S_register
-/* 11614 */ MCD_OPC_FilterValue, 1, 212, 133, // Skip to: 45878
-/* 11618 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11632
-/* 11622 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11632
-/* 11628 */ MCD_OPC_Decode, 244, 8, 72, // Opcode: LD4R_WB_4S_fixed
-/* 11632 */ MCD_OPC_CheckPredicate, 0, 194, 133, // Skip to: 45878
-/* 11636 */ MCD_OPC_Decode, 245, 8, 72, // Opcode: LD4R_WB_4S_register
-/* 11640 */ MCD_OPC_FilterValue, 3, 186, 133, // Skip to: 45878
-/* 11644 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 11647 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 11706
-/* 11651 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11654 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11680
-/* 11658 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11672
-/* 11662 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11672
-/* 11668 */ MCD_OPC_Decode, 179, 8, 72, // Opcode: LD3R_WB_1D_fixed
-/* 11672 */ MCD_OPC_CheckPredicate, 0, 154, 133, // Skip to: 45878
-/* 11676 */ MCD_OPC_Decode, 180, 8, 72, // Opcode: LD3R_WB_1D_register
-/* 11680 */ MCD_OPC_FilterValue, 1, 146, 133, // Skip to: 45878
-/* 11684 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11698
-/* 11688 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11698
-/* 11694 */ MCD_OPC_Decode, 181, 8, 72, // Opcode: LD3R_WB_2D_fixed
-/* 11698 */ MCD_OPC_CheckPredicate, 0, 128, 133, // Skip to: 45878
-/* 11702 */ MCD_OPC_Decode, 182, 8, 72, // Opcode: LD3R_WB_2D_register
-/* 11706 */ MCD_OPC_FilterValue, 1, 120, 133, // Skip to: 45878
-/* 11710 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11713 */ MCD_OPC_FilterValue, 0, 22, 0, // Skip to: 11739
-/* 11717 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11731
-/* 11721 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11731
-/* 11727 */ MCD_OPC_Decode, 236, 8, 72, // Opcode: LD4R_WB_1D_fixed
-/* 11731 */ MCD_OPC_CheckPredicate, 0, 95, 133, // Skip to: 45878
-/* 11735 */ MCD_OPC_Decode, 237, 8, 72, // Opcode: LD4R_WB_1D_register
-/* 11739 */ MCD_OPC_FilterValue, 1, 87, 133, // Skip to: 45878
-/* 11743 */ MCD_OPC_CheckPredicate, 0, 10, 0, // Skip to: 11757
-/* 11747 */ MCD_OPC_CheckField, 16, 5, 31, 4, 0, // Skip to: 11757
-/* 11753 */ MCD_OPC_Decode, 238, 8, 72, // Opcode: LD4R_WB_2D_fixed
-/* 11757 */ MCD_OPC_CheckPredicate, 0, 69, 133, // Skip to: 45878
-/* 11761 */ MCD_OPC_Decode, 239, 8, 72, // Opcode: LD4R_WB_2D_register
-/* 11765 */ MCD_OPC_FilterValue, 1, 61, 133, // Skip to: 45878
-/* 11769 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
-/* 11772 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11784
-/* 11776 */ MCD_OPC_CheckPredicate, 1, 50, 133, // Skip to: 45878
-/* 11780 */ MCD_OPC_Decode, 204, 10, 1, // Opcode: LSFPPair32_PreInd_LDR
-/* 11784 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 11796
-/* 11788 */ MCD_OPC_CheckPredicate, 1, 38, 133, // Skip to: 45878
-/* 11792 */ MCD_OPC_Decode, 212, 10, 1, // Opcode: LSFPPair64_PreInd_LDR
-/* 11796 */ MCD_OPC_FilterValue, 2, 30, 133, // Skip to: 45878
-/* 11800 */ MCD_OPC_CheckPredicate, 1, 26, 133, // Skip to: 45878
-/* 11804 */ MCD_OPC_Decode, 196, 10, 1, // Opcode: LSFPPair128_PreInd_LDR
-/* 11808 */ MCD_OPC_FilterValue, 8, 158, 21, // Skip to: 17346
-/* 11812 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 11815 */ MCD_OPC_FilterValue, 0, 37, 6, // Skip to: 13392
-/* 11819 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 11822 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 11853
-/* 11826 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 11829 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11841
-/* 11833 */ MCD_OPC_CheckPredicate, 0, 249, 132, // Skip to: 45878
-/* 11837 */ MCD_OPC_Decode, 182, 18, 73, // Opcode: TBL1_8b
-/* 11841 */ MCD_OPC_FilterValue, 1, 241, 132, // Skip to: 45878
-/* 11845 */ MCD_OPC_CheckPredicate, 0, 237, 132, // Skip to: 45878
-/* 11849 */ MCD_OPC_Decode, 198, 12, 74, // Opcode: SADDLvvv_8h8b
-/* 11853 */ MCD_OPC_FilterValue, 1, 71, 0, // Skip to: 11928
-/* 11857 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 11860 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 11916
-/* 11864 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
-/* 11867 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 11904
-/* 11871 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
-/* 11874 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 11892
-/* 11878 */ MCD_OPC_CheckPredicate, 0, 204, 132, // Skip to: 45878
-/* 11882 */ MCD_OPC_CheckField, 18, 1, 1, 198, 132, // Skip to: 45878
-/* 11888 */ MCD_OPC_Decode, 176, 3, 75, // Opcode: DUPELT2s
-/* 11892 */ MCD_OPC_FilterValue, 1, 190, 132, // Skip to: 45878
-/* 11896 */ MCD_OPC_CheckPredicate, 0, 186, 132, // Skip to: 45878
-/* 11900 */ MCD_OPC_Decode, 177, 3, 76, // Opcode: DUPELT4h
-/* 11904 */ MCD_OPC_FilterValue, 1, 178, 132, // Skip to: 45878
-/* 11908 */ MCD_OPC_CheckPredicate, 0, 174, 132, // Skip to: 45878
-/* 11912 */ MCD_OPC_Decode, 179, 3, 77, // Opcode: DUPELT8b
-/* 11916 */ MCD_OPC_FilterValue, 1, 166, 132, // Skip to: 45878
-/* 11920 */ MCD_OPC_CheckPredicate, 0, 162, 132, // Skip to: 45878
-/* 11924 */ MCD_OPC_Decode, 246, 12, 78, // Opcode: SHADDvvv_8B
-/* 11928 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 11946
-/* 11932 */ MCD_OPC_CheckPredicate, 0, 150, 132, // Skip to: 45878
-/* 11936 */ MCD_OPC_CheckField, 16, 6, 32, 144, 132, // Skip to: 45878
-/* 11942 */ MCD_OPC_Decode, 134, 12, 79, // Opcode: REV64_8b
-/* 11946 */ MCD_OPC_FilterValue, 3, 58, 0, // Skip to: 12008
-/* 11950 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 11953 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 11996
-/* 11957 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 11960 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 11972
-/* 11964 */ MCD_OPC_CheckPredicate, 0, 118, 132, // Skip to: 45878
-/* 11968 */ MCD_OPC_Decode, 172, 3, 80, // Opcode: DUP8b
-/* 11972 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 11984
-/* 11976 */ MCD_OPC_CheckPredicate, 0, 106, 132, // Skip to: 45878
-/* 11980 */ MCD_OPC_Decode, 170, 3, 80, // Opcode: DUP4h
-/* 11984 */ MCD_OPC_FilterValue, 4, 98, 132, // Skip to: 45878
-/* 11988 */ MCD_OPC_CheckPredicate, 0, 94, 132, // Skip to: 45878
-/* 11992 */ MCD_OPC_Decode, 169, 3, 80, // Opcode: DUP2s
-/* 11996 */ MCD_OPC_FilterValue, 1, 86, 132, // Skip to: 45878
-/* 12000 */ MCD_OPC_CheckPredicate, 0, 82, 132, // Skip to: 45878
-/* 12004 */ MCD_OPC_Decode, 247, 13, 78, // Opcode: SQADDvvv_8B
-/* 12008 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 12039
-/* 12012 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12015 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12027
-/* 12019 */ MCD_OPC_CheckPredicate, 0, 63, 132, // Skip to: 45878
-/* 12023 */ MCD_OPC_Decode, 192, 18, 81, // Opcode: TBX1_8b
-/* 12027 */ MCD_OPC_FilterValue, 1, 55, 132, // Skip to: 45878
-/* 12031 */ MCD_OPC_CheckPredicate, 0, 51, 132, // Skip to: 45878
-/* 12035 */ MCD_OPC_Decode, 204, 12, 82, // Opcode: SADDWvvv_8h8b
-/* 12039 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 12057
-/* 12043 */ MCD_OPC_CheckPredicate, 0, 39, 132, // Skip to: 45878
-/* 12047 */ MCD_OPC_CheckField, 21, 1, 1, 33, 132, // Skip to: 45878
-/* 12053 */ MCD_OPC_Decode, 175, 15, 78, // Opcode: SRHADDvvv_8B
-/* 12057 */ MCD_OPC_FilterValue, 6, 33, 0, // Skip to: 12094
-/* 12061 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12064 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12076
-/* 12068 */ MCD_OPC_CheckPredicate, 0, 14, 132, // Skip to: 45878
-/* 12072 */ MCD_OPC_Decode, 182, 21, 78, // Opcode: UZP1vvv_8b
-/* 12076 */ MCD_OPC_FilterValue, 1, 6, 132, // Skip to: 45878
-/* 12080 */ MCD_OPC_CheckPredicate, 0, 2, 132, // Skip to: 45878
-/* 12084 */ MCD_OPC_CheckField, 16, 5, 0, 252, 131, // Skip to: 45878
-/* 12090 */ MCD_OPC_Decode, 250, 11, 79, // Opcode: REV16_8b
-/* 12094 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 12112
-/* 12098 */ MCD_OPC_CheckPredicate, 0, 240, 131, // Skip to: 45878
-/* 12102 */ MCD_OPC_CheckField, 21, 1, 1, 234, 131, // Skip to: 45878
-/* 12108 */ MCD_OPC_Decode, 133, 1, 78, // Opcode: ANDvvv_8B
-/* 12112 */ MCD_OPC_FilterValue, 8, 27, 0, // Skip to: 12143
-/* 12116 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12119 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12131
-/* 12123 */ MCD_OPC_CheckPredicate, 0, 215, 131, // Skip to: 45878
-/* 12127 */ MCD_OPC_Decode, 184, 18, 83, // Opcode: TBL2_8b
-/* 12131 */ MCD_OPC_FilterValue, 1, 207, 131, // Skip to: 45878
-/* 12135 */ MCD_OPC_CheckPredicate, 0, 203, 131, // Skip to: 45878
-/* 12139 */ MCD_OPC_Decode, 244, 15, 74, // Opcode: SSUBLvvv_8h8b
-/* 12143 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 12161
-/* 12147 */ MCD_OPC_CheckPredicate, 0, 191, 131, // Skip to: 45878
-/* 12151 */ MCD_OPC_CheckField, 21, 1, 1, 185, 131, // Skip to: 45878
-/* 12157 */ MCD_OPC_Decode, 144, 13, 78, // Opcode: SHSUBvvv_8B
-/* 12161 */ MCD_OPC_FilterValue, 10, 46, 0, // Skip to: 12211
-/* 12165 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12168 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12180
-/* 12172 */ MCD_OPC_CheckPredicate, 0, 166, 131, // Skip to: 45878
-/* 12176 */ MCD_OPC_Decode, 212, 18, 78, // Opcode: TRN1vvv_8b
-/* 12180 */ MCD_OPC_FilterValue, 1, 158, 131, // Skip to: 45878
-/* 12184 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 12187 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12199
-/* 12191 */ MCD_OPC_CheckPredicate, 0, 147, 131, // Skip to: 45878
-/* 12195 */ MCD_OPC_Decode, 189, 12, 79, // Opcode: SADDLP8b4h
-/* 12199 */ MCD_OPC_FilterValue, 1, 139, 131, // Skip to: 45878
-/* 12203 */ MCD_OPC_CheckPredicate, 0, 135, 131, // Skip to: 45878
-/* 12207 */ MCD_OPC_Decode, 208, 21, 84, // Opcode: XTN8h8b
-/* 12211 */ MCD_OPC_FilterValue, 11, 52, 0, // Skip to: 12267
-/* 12215 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12218 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 12255
-/* 12222 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
-/* 12225 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12243
-/* 12229 */ MCD_OPC_CheckPredicate, 0, 109, 131, // Skip to: 45878
-/* 12233 */ MCD_OPC_CheckField, 17, 1, 1, 103, 131, // Skip to: 45878
-/* 12239 */ MCD_OPC_Decode, 211, 13, 85, // Opcode: SMOVwh
-/* 12243 */ MCD_OPC_FilterValue, 1, 95, 131, // Skip to: 45878
-/* 12247 */ MCD_OPC_CheckPredicate, 0, 91, 131, // Skip to: 45878
-/* 12251 */ MCD_OPC_Decode, 210, 13, 86, // Opcode: SMOVwb
-/* 12255 */ MCD_OPC_FilterValue, 1, 83, 131, // Skip to: 45878
-/* 12259 */ MCD_OPC_CheckPredicate, 0, 79, 131, // Skip to: 45878
-/* 12263 */ MCD_OPC_Decode, 151, 15, 78, // Opcode: SQSUBvvv_8B
-/* 12267 */ MCD_OPC_FilterValue, 12, 27, 0, // Skip to: 12298
-/* 12271 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12274 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12286
-/* 12278 */ MCD_OPC_CheckPredicate, 0, 60, 131, // Skip to: 45878
-/* 12282 */ MCD_OPC_Decode, 194, 18, 87, // Opcode: TBX2_8b
-/* 12286 */ MCD_OPC_FilterValue, 1, 52, 131, // Skip to: 45878
-/* 12290 */ MCD_OPC_CheckPredicate, 0, 48, 131, // Skip to: 45878
-/* 12294 */ MCD_OPC_Decode, 250, 15, 82, // Opcode: SSUBWvvv_8h8b
-/* 12298 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 12316
-/* 12302 */ MCD_OPC_CheckPredicate, 0, 36, 131, // Skip to: 45878
-/* 12306 */ MCD_OPC_CheckField, 21, 1, 1, 30, 131, // Skip to: 45878
-/* 12312 */ MCD_OPC_Decode, 184, 2, 78, // Opcode: CMGTvvv_8B
-/* 12316 */ MCD_OPC_FilterValue, 14, 46, 0, // Skip to: 12366
-/* 12320 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12323 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12335
-/* 12327 */ MCD_OPC_CheckPredicate, 0, 11, 131, // Skip to: 45878
-/* 12331 */ MCD_OPC_Decode, 214, 21, 78, // Opcode: ZIP1vvv_8b
-/* 12335 */ MCD_OPC_FilterValue, 1, 3, 131, // Skip to: 45878
-/* 12339 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 12342 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12354
-/* 12346 */ MCD_OPC_CheckPredicate, 0, 248, 130, // Skip to: 45878
-/* 12350 */ MCD_OPC_Decode, 165, 18, 88, // Opcode: SUQADD8b
-/* 12354 */ MCD_OPC_FilterValue, 16, 240, 130, // Skip to: 45878
-/* 12358 */ MCD_OPC_CheckPredicate, 0, 236, 130, // Skip to: 45878
-/* 12362 */ MCD_OPC_Decode, 193, 12, 89, // Opcode: SADDLV_1h8b
-/* 12366 */ MCD_OPC_FilterValue, 15, 71, 0, // Skip to: 12441
-/* 12370 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12373 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 12429
-/* 12377 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
-/* 12380 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 12417
-/* 12384 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
-/* 12387 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12405
-/* 12391 */ MCD_OPC_CheckPredicate, 0, 203, 130, // Skip to: 45878
-/* 12395 */ MCD_OPC_CheckField, 18, 1, 1, 197, 130, // Skip to: 45878
-/* 12401 */ MCD_OPC_Decode, 246, 19, 90, // Opcode: UMOVws
-/* 12405 */ MCD_OPC_FilterValue, 1, 189, 130, // Skip to: 45878
-/* 12409 */ MCD_OPC_CheckPredicate, 0, 185, 130, // Skip to: 45878
-/* 12413 */ MCD_OPC_Decode, 245, 19, 85, // Opcode: UMOVwh
-/* 12417 */ MCD_OPC_FilterValue, 1, 177, 130, // Skip to: 45878
-/* 12421 */ MCD_OPC_CheckPredicate, 0, 173, 130, // Skip to: 45878
-/* 12425 */ MCD_OPC_Decode, 244, 19, 86, // Opcode: UMOVwb
-/* 12429 */ MCD_OPC_FilterValue, 1, 165, 130, // Skip to: 45878
-/* 12433 */ MCD_OPC_CheckPredicate, 0, 161, 130, // Skip to: 45878
-/* 12437 */ MCD_OPC_Decode, 168, 2, 78, // Opcode: CMGEvvv_8B
-/* 12441 */ MCD_OPC_FilterValue, 16, 26, 0, // Skip to: 12471
-/* 12445 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12448 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12460
-/* 12452 */ MCD_OPC_CheckPredicate, 0, 142, 130, // Skip to: 45878
-/* 12456 */ MCD_OPC_Decode, 186, 18, 91, // Opcode: TBL3_8b
-/* 12460 */ MCD_OPC_FilterValue, 1, 134, 130, // Skip to: 45878
-/* 12464 */ MCD_OPC_CheckPredicate, 0, 130, 130, // Skip to: 45878
-/* 12468 */ MCD_OPC_Decode, 36, 92, // Opcode: ADDHNvvv_8b8h
-/* 12471 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 12489
-/* 12475 */ MCD_OPC_CheckPredicate, 0, 119, 130, // Skip to: 45878
-/* 12479 */ MCD_OPC_CheckField, 21, 1, 1, 113, 130, // Skip to: 45878
-/* 12485 */ MCD_OPC_Decode, 221, 15, 78, // Opcode: SSHLvvv_8B
-/* 12489 */ MCD_OPC_FilterValue, 18, 27, 0, // Skip to: 12520
-/* 12493 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 12496 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 12508
-/* 12500 */ MCD_OPC_CheckPredicate, 0, 94, 130, // Skip to: 45878
-/* 12504 */ MCD_OPC_Decode, 254, 1, 79, // Opcode: CLS8b
-/* 12508 */ MCD_OPC_FilterValue, 33, 86, 130, // Skip to: 45878
-/* 12512 */ MCD_OPC_CheckPredicate, 0, 82, 130, // Skip to: 45878
-/* 12516 */ MCD_OPC_Decode, 158, 15, 84, // Opcode: SQXTN8h8b
-/* 12520 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 12538
-/* 12524 */ MCD_OPC_CheckPredicate, 0, 70, 130, // Skip to: 45878
-/* 12528 */ MCD_OPC_CheckField, 21, 1, 1, 64, 130, // Skip to: 45878
-/* 12534 */ MCD_OPC_Decode, 128, 15, 78, // Opcode: SQSHLvvv_8B
-/* 12538 */ MCD_OPC_FilterValue, 20, 27, 0, // Skip to: 12569
-/* 12542 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12545 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12557
-/* 12549 */ MCD_OPC_CheckPredicate, 0, 45, 130, // Skip to: 45878
-/* 12553 */ MCD_OPC_Decode, 196, 18, 93, // Opcode: TBX3_8b
-/* 12557 */ MCD_OPC_FilterValue, 1, 37, 130, // Skip to: 45878
-/* 12561 */ MCD_OPC_CheckPredicate, 0, 33, 130, // Skip to: 45878
-/* 12565 */ MCD_OPC_Decode, 157, 12, 94, // Opcode: SABALvvv_8h8b
-/* 12569 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 12587
-/* 12573 */ MCD_OPC_CheckPredicate, 0, 21, 130, // Skip to: 45878
-/* 12577 */ MCD_OPC_CheckField, 21, 1, 1, 15, 130, // Skip to: 45878
-/* 12583 */ MCD_OPC_Decode, 191, 15, 78, // Opcode: SRSHLvvv_8B
-/* 12587 */ MCD_OPC_FilterValue, 22, 33, 0, // Skip to: 12624
-/* 12591 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12594 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12606
-/* 12598 */ MCD_OPC_CheckPredicate, 0, 252, 129, // Skip to: 45878
-/* 12602 */ MCD_OPC_Decode, 189, 21, 78, // Opcode: UZP2vvv_8b
-/* 12606 */ MCD_OPC_FilterValue, 1, 244, 129, // Skip to: 45878
-/* 12610 */ MCD_OPC_CheckPredicate, 0, 240, 129, // Skip to: 45878
-/* 12614 */ MCD_OPC_CheckField, 16, 5, 0, 234, 129, // Skip to: 45878
-/* 12620 */ MCD_OPC_Decode, 143, 3, 79, // Opcode: CNT8b
-/* 12624 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 12642
-/* 12628 */ MCD_OPC_CheckPredicate, 0, 222, 129, // Skip to: 45878
-/* 12632 */ MCD_OPC_CheckField, 21, 1, 1, 216, 129, // Skip to: 45878
-/* 12638 */ MCD_OPC_Decode, 211, 14, 78, // Opcode: SQRSHLvvv_8B
-/* 12642 */ MCD_OPC_FilterValue, 24, 27, 0, // Skip to: 12673
-/* 12646 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12649 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12661
-/* 12653 */ MCD_OPC_CheckPredicate, 0, 197, 129, // Skip to: 45878
-/* 12657 */ MCD_OPC_Decode, 188, 18, 95, // Opcode: TBL4_8b
-/* 12661 */ MCD_OPC_FilterValue, 1, 189, 129, // Skip to: 45878
-/* 12665 */ MCD_OPC_CheckPredicate, 0, 185, 129, // Skip to: 45878
-/* 12669 */ MCD_OPC_Decode, 223, 17, 92, // Opcode: SUBHNvvv_8b8h
-/* 12673 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 12691
-/* 12677 */ MCD_OPC_CheckPredicate, 0, 173, 129, // Skip to: 45878
-/* 12681 */ MCD_OPC_CheckField, 21, 1, 1, 167, 129, // Skip to: 45878
-/* 12687 */ MCD_OPC_Decode, 170, 13, 78, // Opcode: SMAXvvv_8B
-/* 12691 */ MCD_OPC_FilterValue, 26, 46, 0, // Skip to: 12741
-/* 12695 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12698 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12710
-/* 12702 */ MCD_OPC_CheckPredicate, 0, 148, 129, // Skip to: 45878
-/* 12706 */ MCD_OPC_Decode, 219, 18, 78, // Opcode: TRN2vvv_8b
-/* 12710 */ MCD_OPC_FilterValue, 1, 140, 129, // Skip to: 45878
-/* 12714 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 12717 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12729
-/* 12721 */ MCD_OPC_CheckPredicate, 0, 129, 129, // Skip to: 45878
-/* 12725 */ MCD_OPC_Decode, 180, 12, 88, // Opcode: SADALP8b4h
-/* 12729 */ MCD_OPC_FilterValue, 1, 121, 129, // Skip to: 45878
-/* 12733 */ MCD_OPC_CheckPredicate, 0, 117, 129, // Skip to: 45878
-/* 12737 */ MCD_OPC_Decode, 209, 4, 84, // Opcode: FCVTN4s4h
-/* 12741 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 12759
-/* 12745 */ MCD_OPC_CheckPredicate, 0, 105, 129, // Skip to: 45878
-/* 12749 */ MCD_OPC_CheckField, 21, 1, 1, 99, 129, // Skip to: 45878
-/* 12755 */ MCD_OPC_Decode, 188, 13, 78, // Opcode: SMINvvv_8B
-/* 12759 */ MCD_OPC_FilterValue, 28, 27, 0, // Skip to: 12790
-/* 12763 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12766 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12778
-/* 12770 */ MCD_OPC_CheckPredicate, 0, 80, 129, // Skip to: 45878
-/* 12774 */ MCD_OPC_Decode, 198, 18, 96, // Opcode: TBX4_8b
-/* 12778 */ MCD_OPC_FilterValue, 1, 72, 129, // Skip to: 45878
-/* 12782 */ MCD_OPC_CheckPredicate, 0, 68, 129, // Skip to: 45878
-/* 12786 */ MCD_OPC_Decode, 169, 12, 74, // Opcode: SABDLvvv_8h8b
-/* 12790 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 12808
-/* 12794 */ MCD_OPC_CheckPredicate, 0, 56, 129, // Skip to: 45878
-/* 12798 */ MCD_OPC_CheckField, 21, 1, 1, 50, 129, // Skip to: 45878
-/* 12804 */ MCD_OPC_Decode, 174, 12, 78, // Opcode: SABDvvv_8B
-/* 12808 */ MCD_OPC_FilterValue, 30, 46, 0, // Skip to: 12858
-/* 12812 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 12815 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12827
-/* 12819 */ MCD_OPC_CheckPredicate, 0, 31, 129, // Skip to: 45878
-/* 12823 */ MCD_OPC_Decode, 221, 21, 78, // Opcode: ZIP2vvv_8b
-/* 12827 */ MCD_OPC_FilterValue, 1, 23, 129, // Skip to: 45878
-/* 12831 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 12834 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12846
-/* 12838 */ MCD_OPC_CheckPredicate, 0, 12, 129, // Skip to: 45878
-/* 12842 */ MCD_OPC_Decode, 232, 13, 79, // Opcode: SQABS8b
-/* 12846 */ MCD_OPC_FilterValue, 1, 4, 129, // Skip to: 45878
-/* 12850 */ MCD_OPC_CheckPredicate, 0, 0, 129, // Skip to: 45878
-/* 12854 */ MCD_OPC_Decode, 186, 4, 97, // Opcode: FCVTL4h4s
-/* 12858 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 12876
-/* 12862 */ MCD_OPC_CheckPredicate, 0, 244, 128, // Skip to: 45878
-/* 12866 */ MCD_OPC_CheckField, 21, 1, 1, 238, 128, // Skip to: 45878
-/* 12872 */ MCD_OPC_Decode, 162, 12, 98, // Opcode: SABAvvv_8B
-/* 12876 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 12894
-/* 12880 */ MCD_OPC_CheckPredicate, 0, 226, 128, // Skip to: 45878
-/* 12884 */ MCD_OPC_CheckField, 21, 1, 1, 220, 128, // Skip to: 45878
-/* 12890 */ MCD_OPC_Decode, 199, 13, 94, // Opcode: SMLALvvv_8h8b
-/* 12894 */ MCD_OPC_FilterValue, 33, 13, 0, // Skip to: 12911
-/* 12898 */ MCD_OPC_CheckPredicate, 0, 208, 128, // Skip to: 45878
-/* 12902 */ MCD_OPC_CheckField, 21, 1, 1, 202, 128, // Skip to: 45878
-/* 12908 */ MCD_OPC_Decode, 78, 78, // Opcode: ADDvvv_8B
-/* 12911 */ MCD_OPC_FilterValue, 34, 27, 0, // Skip to: 12942
-/* 12915 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 12918 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 12930
-/* 12922 */ MCD_OPC_CheckPredicate, 0, 184, 128, // Skip to: 45878
-/* 12926 */ MCD_OPC_Decode, 177, 2, 79, // Opcode: CMGTvvi_8B
-/* 12930 */ MCD_OPC_FilterValue, 33, 176, 128, // Skip to: 45878
-/* 12934 */ MCD_OPC_CheckPredicate, 0, 172, 128, // Skip to: 45878
-/* 12938 */ MCD_OPC_Decode, 171, 6, 79, // Opcode: FRINTN_2s
-/* 12942 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 12960
-/* 12946 */ MCD_OPC_CheckPredicate, 0, 160, 128, // Skip to: 45878
-/* 12950 */ MCD_OPC_CheckField, 21, 1, 1, 154, 128, // Skip to: 45878
-/* 12956 */ MCD_OPC_Decode, 140, 3, 78, // Opcode: CMTSTvvv_8B
-/* 12960 */ MCD_OPC_FilterValue, 37, 14, 0, // Skip to: 12978
-/* 12964 */ MCD_OPC_CheckPredicate, 0, 142, 128, // Skip to: 45878
-/* 12968 */ MCD_OPC_CheckField, 21, 1, 1, 136, 128, // Skip to: 45878
-/* 12974 */ MCD_OPC_Decode, 249, 10, 98, // Opcode: MLAvvv_8B
-/* 12978 */ MCD_OPC_FilterValue, 38, 27, 0, // Skip to: 13009
-/* 12982 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 12985 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 12997
-/* 12989 */ MCD_OPC_CheckPredicate, 0, 117, 128, // Skip to: 45878
-/* 12993 */ MCD_OPC_Decode, 145, 2, 79, // Opcode: CMEQvvi_8B
-/* 12997 */ MCD_OPC_FilterValue, 33, 109, 128, // Skip to: 45878
-/* 13001 */ MCD_OPC_CheckPredicate, 0, 105, 128, // Skip to: 45878
-/* 13005 */ MCD_OPC_Decode, 166, 6, 79, // Opcode: FRINTM_2s
-/* 13009 */ MCD_OPC_FilterValue, 39, 14, 0, // Skip to: 13027
-/* 13013 */ MCD_OPC_CheckPredicate, 0, 93, 128, // Skip to: 45878
-/* 13017 */ MCD_OPC_CheckField, 21, 1, 1, 87, 128, // Skip to: 45878
-/* 13023 */ MCD_OPC_Decode, 162, 11, 78, // Opcode: MULvvv_8B
-/* 13027 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 13045
-/* 13031 */ MCD_OPC_CheckPredicate, 0, 75, 128, // Skip to: 45878
-/* 13035 */ MCD_OPC_CheckField, 21, 1, 1, 69, 128, // Skip to: 45878
-/* 13041 */ MCD_OPC_Decode, 209, 13, 94, // Opcode: SMLSLvvv_8h8b
-/* 13045 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 13063
-/* 13049 */ MCD_OPC_CheckPredicate, 0, 57, 128, // Skip to: 45878
-/* 13053 */ MCD_OPC_CheckField, 21, 1, 1, 51, 128, // Skip to: 45878
-/* 13059 */ MCD_OPC_Decode, 159, 13, 78, // Opcode: SMAXPvvv_8B
-/* 13063 */ MCD_OPC_FilterValue, 42, 51, 0, // Skip to: 13118
-/* 13067 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 13070 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 13082
-/* 13074 */ MCD_OPC_CheckPredicate, 0, 32, 128, // Skip to: 45878
-/* 13078 */ MCD_OPC_Decode, 216, 2, 79, // Opcode: CMLTvvi_8B
-/* 13082 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 13094
-/* 13086 */ MCD_OPC_CheckPredicate, 0, 20, 128, // Skip to: 45878
-/* 13090 */ MCD_OPC_Decode, 212, 4, 79, // Opcode: FCVTNS_2s
-/* 13094 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 13106
-/* 13098 */ MCD_OPC_CheckPredicate, 0, 8, 128, // Skip to: 45878
-/* 13102 */ MCD_OPC_Decode, 162, 13, 99, // Opcode: SMAXV_1b8b
-/* 13106 */ MCD_OPC_FilterValue, 49, 0, 128, // Skip to: 45878
-/* 13110 */ MCD_OPC_CheckPredicate, 0, 252, 127, // Skip to: 45878
-/* 13114 */ MCD_OPC_Decode, 180, 13, 99, // Opcode: SMINV_1b8b
-/* 13118 */ MCD_OPC_FilterValue, 43, 14, 0, // Skip to: 13136
-/* 13122 */ MCD_OPC_CheckPredicate, 0, 240, 127, // Skip to: 45878
-/* 13126 */ MCD_OPC_CheckField, 21, 1, 1, 234, 127, // Skip to: 45878
-/* 13132 */ MCD_OPC_Decode, 177, 13, 78, // Opcode: SMINPvvv_8B
-/* 13136 */ MCD_OPC_FilterValue, 46, 37, 0, // Skip to: 13177
-/* 13140 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 13143 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 13154
-/* 13147 */ MCD_OPC_CheckPredicate, 0, 215, 127, // Skip to: 45878
-/* 13151 */ MCD_OPC_Decode, 24, 79, // Opcode: ABS8b
-/* 13154 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 13166
-/* 13158 */ MCD_OPC_CheckPredicate, 0, 204, 127, // Skip to: 45878
-/* 13162 */ MCD_OPC_Decode, 190, 4, 79, // Opcode: FCVTMS_2s
-/* 13166 */ MCD_OPC_FilterValue, 49, 196, 127, // Skip to: 45878
-/* 13170 */ MCD_OPC_CheckPredicate, 0, 192, 127, // Skip to: 45878
-/* 13174 */ MCD_OPC_Decode, 68, 99, // Opcode: ADDV_1b8b
-/* 13177 */ MCD_OPC_FilterValue, 47, 13, 0, // Skip to: 13194
-/* 13181 */ MCD_OPC_CheckPredicate, 0, 181, 127, // Skip to: 45878
-/* 13185 */ MCD_OPC_CheckField, 21, 1, 1, 175, 127, // Skip to: 45878
-/* 13191 */ MCD_OPC_Decode, 42, 78, // Opcode: ADDP_8B
-/* 13194 */ MCD_OPC_FilterValue, 48, 14, 0, // Skip to: 13212
-/* 13198 */ MCD_OPC_CheckPredicate, 0, 164, 127, // Skip to: 45878
-/* 13202 */ MCD_OPC_CheckField, 21, 1, 1, 158, 127, // Skip to: 45878
-/* 13208 */ MCD_OPC_Decode, 226, 13, 74, // Opcode: SMULLvvv_8h8b
-/* 13212 */ MCD_OPC_FilterValue, 49, 14, 0, // Skip to: 13230
-/* 13216 */ MCD_OPC_CheckPredicate, 0, 146, 127, // Skip to: 45878
-/* 13220 */ MCD_OPC_CheckField, 21, 1, 1, 140, 127, // Skip to: 45878
-/* 13226 */ MCD_OPC_Decode, 174, 5, 78, // Opcode: FMAXNMvvv_2S
-/* 13230 */ MCD_OPC_FilterValue, 50, 14, 0, // Skip to: 13248
-/* 13234 */ MCD_OPC_CheckPredicate, 0, 128, 127, // Skip to: 45878
-/* 13238 */ MCD_OPC_CheckField, 16, 6, 33, 122, 127, // Skip to: 45878
-/* 13244 */ MCD_OPC_Decode, 168, 4, 79, // Opcode: FCVTAS_2s
-/* 13248 */ MCD_OPC_FilterValue, 51, 14, 0, // Skip to: 13266
-/* 13252 */ MCD_OPC_CheckPredicate, 0, 110, 127, // Skip to: 45878
-/* 13256 */ MCD_OPC_CheckField, 21, 1, 1, 104, 127, // Skip to: 45878
-/* 13262 */ MCD_OPC_Decode, 215, 5, 98, // Opcode: FMLAvvv_2S
-/* 13266 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 13284
-/* 13270 */ MCD_OPC_CheckPredicate, 0, 92, 127, // Skip to: 45878
-/* 13274 */ MCD_OPC_CheckField, 21, 1, 1, 86, 127, // Skip to: 45878
-/* 13280 */ MCD_OPC_Decode, 239, 3, 78, // Opcode: FADDvvv_2S
-/* 13284 */ MCD_OPC_FilterValue, 54, 14, 0, // Skip to: 13302
-/* 13288 */ MCD_OPC_CheckPredicate, 0, 74, 127, // Skip to: 45878
-/* 13292 */ MCD_OPC_CheckField, 16, 6, 33, 68, 127, // Skip to: 45878
-/* 13298 */ MCD_OPC_Decode, 216, 12, 79, // Opcode: SCVTF_2s
-/* 13302 */ MCD_OPC_FilterValue, 55, 14, 0, // Skip to: 13320
-/* 13306 */ MCD_OPC_CheckPredicate, 0, 56, 127, // Skip to: 45878
-/* 13310 */ MCD_OPC_CheckField, 21, 1, 1, 50, 127, // Skip to: 45878
-/* 13316 */ MCD_OPC_Decode, 248, 5, 78, // Opcode: FMULXvvv_2S
-/* 13320 */ MCD_OPC_FilterValue, 56, 14, 0, // Skip to: 13338
-/* 13324 */ MCD_OPC_CheckPredicate, 0, 38, 127, // Skip to: 45878
-/* 13328 */ MCD_OPC_CheckField, 21, 1, 1, 32, 127, // Skip to: 45878
-/* 13334 */ MCD_OPC_Decode, 217, 11, 74, // Opcode: PMULLvvv_8h8b
-/* 13338 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 13356
-/* 13342 */ MCD_OPC_CheckPredicate, 0, 20, 127, // Skip to: 45878
-/* 13346 */ MCD_OPC_CheckField, 21, 1, 1, 14, 127, // Skip to: 45878
-/* 13352 */ MCD_OPC_Decode, 253, 3, 78, // Opcode: FCMEQvvv_2S
-/* 13356 */ MCD_OPC_FilterValue, 61, 14, 0, // Skip to: 13374
-/* 13360 */ MCD_OPC_CheckPredicate, 0, 2, 127, // Skip to: 45878
-/* 13364 */ MCD_OPC_CheckField, 21, 1, 1, 252, 126, // Skip to: 45878
-/* 13370 */ MCD_OPC_Decode, 185, 5, 78, // Opcode: FMAXvvv_2S
-/* 13374 */ MCD_OPC_FilterValue, 63, 244, 126, // Skip to: 45878
-/* 13378 */ MCD_OPC_CheckPredicate, 0, 240, 126, // Skip to: 45878
-/* 13382 */ MCD_OPC_CheckField, 21, 1, 1, 234, 126, // Skip to: 45878
-/* 13388 */ MCD_OPC_Decode, 151, 6, 78, // Opcode: FRECPSvvv_2S
-/* 13392 */ MCD_OPC_FilterValue, 1, 85, 4, // Skip to: 14505
-/* 13396 */ MCD_OPC_ExtractField, 14, 2, // Inst{15-14} ...
-/* 13399 */ MCD_OPC_FilterValue, 0, 64, 1, // Skip to: 13723
-/* 13403 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 13406 */ MCD_OPC_FilterValue, 0, 162, 0, // Skip to: 13572
-/* 13410 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 13413 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13425
-/* 13417 */ MCD_OPC_CheckPredicate, 0, 201, 126, // Skip to: 45878
-/* 13421 */ MCD_OPC_Decode, 209, 3, 100, // Opcode: EXTvvvi_8b
-/* 13425 */ MCD_OPC_FilterValue, 1, 193, 126, // Skip to: 45878
-/* 13429 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ...
-/* 13432 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13444
-/* 13436 */ MCD_OPC_CheckPredicate, 0, 182, 126, // Skip to: 45878
-/* 13440 */ MCD_OPC_Decode, 147, 19, 74, // Opcode: UADDLvvv_8h8b
-/* 13444 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13462
-/* 13448 */ MCD_OPC_CheckPredicate, 0, 170, 126, // Skip to: 45878
-/* 13452 */ MCD_OPC_CheckField, 16, 5, 0, 164, 126, // Skip to: 45878
-/* 13458 */ MCD_OPC_Decode, 255, 11, 79, // Opcode: REV32_8b
-/* 13462 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 13474
-/* 13466 */ MCD_OPC_CheckPredicate, 0, 152, 126, // Skip to: 45878
-/* 13470 */ MCD_OPC_Decode, 153, 19, 82, // Opcode: UADDWvvv_8h8b
-/* 13474 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 13486
-/* 13478 */ MCD_OPC_CheckPredicate, 0, 140, 126, // Skip to: 45878
-/* 13482 */ MCD_OPC_Decode, 166, 21, 74, // Opcode: USUBLvvv_8h8b
-/* 13486 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 13517
-/* 13490 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 13493 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13505
-/* 13497 */ MCD_OPC_CheckPredicate, 0, 121, 126, // Skip to: 45878
-/* 13501 */ MCD_OPC_Decode, 138, 19, 79, // Opcode: UADDLP8b4h
-/* 13505 */ MCD_OPC_FilterValue, 1, 113, 126, // Skip to: 45878
-/* 13509 */ MCD_OPC_CheckPredicate, 0, 109, 126, // Skip to: 45878
-/* 13513 */ MCD_OPC_Decode, 167, 15, 84, // Opcode: SQXTUN8h8b
-/* 13517 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 13529
-/* 13521 */ MCD_OPC_CheckPredicate, 0, 97, 126, // Skip to: 45878
-/* 13525 */ MCD_OPC_Decode, 172, 21, 82, // Opcode: USUBWvvv_8h8b
-/* 13529 */ MCD_OPC_FilterValue, 7, 89, 126, // Skip to: 45878
-/* 13533 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 13536 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13548
-/* 13540 */ MCD_OPC_CheckPredicate, 0, 78, 126, // Skip to: 45878
-/* 13544 */ MCD_OPC_Decode, 147, 21, 88, // Opcode: USQADD8b
-/* 13548 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 13560
-/* 13552 */ MCD_OPC_CheckPredicate, 0, 66, 126, // Skip to: 45878
-/* 13556 */ MCD_OPC_Decode, 252, 12, 101, // Opcode: SHLL8b8h
-/* 13560 */ MCD_OPC_FilterValue, 16, 58, 126, // Skip to: 45878
-/* 13564 */ MCD_OPC_CheckPredicate, 0, 54, 126, // Skip to: 45878
-/* 13568 */ MCD_OPC_Decode, 142, 19, 89, // Opcode: UADDLV_1h8b
-/* 13572 */ MCD_OPC_FilterValue, 1, 46, 126, // Skip to: 45878
-/* 13576 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ...
-/* 13579 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13597
-/* 13583 */ MCD_OPC_CheckPredicate, 0, 35, 126, // Skip to: 45878
-/* 13587 */ MCD_OPC_CheckField, 21, 1, 1, 29, 126, // Skip to: 45878
-/* 13593 */ MCD_OPC_Decode, 181, 19, 78, // Opcode: UHADDvvv_8B
-/* 13597 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13615
-/* 13601 */ MCD_OPC_CheckPredicate, 0, 17, 126, // Skip to: 45878
-/* 13605 */ MCD_OPC_CheckField, 21, 1, 1, 11, 126, // Skip to: 45878
-/* 13611 */ MCD_OPC_Decode, 141, 20, 78, // Opcode: UQADDvvv_8B
-/* 13615 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13633
-/* 13619 */ MCD_OPC_CheckPredicate, 0, 255, 125, // Skip to: 45878
-/* 13623 */ MCD_OPC_CheckField, 21, 1, 1, 249, 125, // Skip to: 45878
-/* 13629 */ MCD_OPC_Decode, 220, 20, 78, // Opcode: URHADDvvv_8B
-/* 13633 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 13651
-/* 13637 */ MCD_OPC_CheckPredicate, 0, 237, 125, // Skip to: 45878
-/* 13641 */ MCD_OPC_CheckField, 21, 1, 1, 231, 125, // Skip to: 45878
-/* 13647 */ MCD_OPC_Decode, 194, 3, 78, // Opcode: EORvvv_8B
-/* 13651 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 13669
-/* 13655 */ MCD_OPC_CheckPredicate, 0, 219, 125, // Skip to: 45878
-/* 13659 */ MCD_OPC_CheckField, 21, 1, 1, 213, 125, // Skip to: 45878
-/* 13665 */ MCD_OPC_Decode, 187, 19, 78, // Opcode: UHSUBvvv_8B
-/* 13669 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 13687
-/* 13673 */ MCD_OPC_CheckPredicate, 0, 201, 125, // Skip to: 45878
-/* 13677 */ MCD_OPC_CheckField, 21, 1, 1, 195, 125, // Skip to: 45878
-/* 13683 */ MCD_OPC_Decode, 203, 20, 78, // Opcode: UQSUBvvv_8B
-/* 13687 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 13705
-/* 13691 */ MCD_OPC_CheckPredicate, 0, 183, 125, // Skip to: 45878
-/* 13695 */ MCD_OPC_CheckField, 21, 1, 1, 177, 125, // Skip to: 45878
-/* 13701 */ MCD_OPC_Decode, 192, 2, 78, // Opcode: CMHIvvv_8B
-/* 13705 */ MCD_OPC_FilterValue, 7, 169, 125, // Skip to: 45878
-/* 13709 */ MCD_OPC_CheckPredicate, 0, 165, 125, // Skip to: 45878
-/* 13713 */ MCD_OPC_CheckField, 21, 1, 1, 159, 125, // Skip to: 45878
-/* 13719 */ MCD_OPC_Decode, 200, 2, 78, // Opcode: CMHSvvv_8B
-/* 13723 */ MCD_OPC_FilterValue, 1, 48, 1, // Skip to: 14031
-/* 13727 */ MCD_OPC_ExtractField, 10, 4, // Inst{13-10} ...
-/* 13730 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13748
-/* 13734 */ MCD_OPC_CheckPredicate, 0, 140, 125, // Skip to: 45878
-/* 13738 */ MCD_OPC_CheckField, 21, 1, 1, 134, 125, // Skip to: 45878
-/* 13744 */ MCD_OPC_Decode, 242, 11, 92, // Opcode: RADDHNvvv_8b8h
-/* 13748 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13766
-/* 13752 */ MCD_OPC_CheckPredicate, 0, 122, 125, // Skip to: 45878
-/* 13756 */ MCD_OPC_CheckField, 21, 1, 1, 116, 125, // Skip to: 45878
-/* 13762 */ MCD_OPC_Decode, 132, 21, 78, // Opcode: USHLvvv_8B
-/* 13766 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 13797
-/* 13770 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 13773 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 13785
-/* 13777 */ MCD_OPC_CheckPredicate, 0, 97, 125, // Skip to: 45878
-/* 13781 */ MCD_OPC_Decode, 134, 2, 79, // Opcode: CLZ8b
-/* 13785 */ MCD_OPC_FilterValue, 33, 89, 125, // Skip to: 45878
-/* 13789 */ MCD_OPC_CheckPredicate, 0, 85, 125, // Skip to: 45878
-/* 13793 */ MCD_OPC_Decode, 210, 20, 84, // Opcode: UQXTN8h8b
-/* 13797 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 13815
-/* 13801 */ MCD_OPC_CheckPredicate, 0, 73, 125, // Skip to: 45878
-/* 13805 */ MCD_OPC_CheckField, 21, 1, 1, 67, 125, // Skip to: 45878
-/* 13811 */ MCD_OPC_Decode, 183, 20, 78, // Opcode: UQSHLvvv_8B
-/* 13815 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 13833
-/* 13819 */ MCD_OPC_CheckPredicate, 0, 55, 125, // Skip to: 45878
-/* 13823 */ MCD_OPC_CheckField, 21, 1, 1, 49, 125, // Skip to: 45878
-/* 13829 */ MCD_OPC_Decode, 234, 18, 94, // Opcode: UABALvvv_8h8b
-/* 13833 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 13851
-/* 13837 */ MCD_OPC_CheckPredicate, 0, 37, 125, // Skip to: 45878
-/* 13841 */ MCD_OPC_CheckField, 21, 1, 1, 31, 125, // Skip to: 45878
-/* 13847 */ MCD_OPC_Decode, 228, 20, 78, // Opcode: URSHLvvv_8B
-/* 13851 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 13869
-/* 13855 */ MCD_OPC_CheckPredicate, 0, 19, 125, // Skip to: 45878
-/* 13859 */ MCD_OPC_CheckField, 16, 6, 32, 13, 125, // Skip to: 45878
-/* 13865 */ MCD_OPC_Decode, 187, 11, 79, // Opcode: NOT8b
-/* 13869 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 13887
-/* 13873 */ MCD_OPC_CheckPredicate, 0, 1, 125, // Skip to: 45878
-/* 13877 */ MCD_OPC_CheckField, 21, 1, 1, 251, 124, // Skip to: 45878
-/* 13883 */ MCD_OPC_Decode, 152, 20, 78, // Opcode: UQRSHLvvv_8B
-/* 13887 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 13905
-/* 13891 */ MCD_OPC_CheckPredicate, 0, 239, 124, // Skip to: 45878
-/* 13895 */ MCD_OPC_CheckField, 21, 1, 1, 233, 124, // Skip to: 45878
-/* 13901 */ MCD_OPC_Decode, 151, 12, 92, // Opcode: RSUBHNvvv_8b8h
-/* 13905 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 13923
-/* 13909 */ MCD_OPC_CheckPredicate, 0, 221, 124, // Skip to: 45878
-/* 13913 */ MCD_OPC_CheckField, 21, 1, 1, 215, 124, // Skip to: 45878
-/* 13919 */ MCD_OPC_Decode, 205, 19, 78, // Opcode: UMAXvvv_8B
-/* 13923 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 13941
-/* 13927 */ MCD_OPC_CheckPredicate, 0, 203, 124, // Skip to: 45878
-/* 13931 */ MCD_OPC_CheckField, 16, 6, 32, 197, 124, // Skip to: 45878
-/* 13937 */ MCD_OPC_Decode, 129, 19, 88, // Opcode: UADALP8b4h
-/* 13941 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 13959
-/* 13945 */ MCD_OPC_CheckPredicate, 0, 185, 124, // Skip to: 45878
-/* 13949 */ MCD_OPC_CheckField, 21, 1, 1, 179, 124, // Skip to: 45878
-/* 13955 */ MCD_OPC_Decode, 222, 19, 78, // Opcode: UMINvvv_8B
-/* 13959 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 13977
-/* 13963 */ MCD_OPC_CheckPredicate, 0, 167, 124, // Skip to: 45878
-/* 13967 */ MCD_OPC_CheckField, 21, 1, 1, 161, 124, // Skip to: 45878
-/* 13973 */ MCD_OPC_Decode, 246, 18, 74, // Opcode: UABDLvvv_8h8b
-/* 13977 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 13995
-/* 13981 */ MCD_OPC_CheckPredicate, 0, 149, 124, // Skip to: 45878
-/* 13985 */ MCD_OPC_CheckField, 21, 1, 1, 143, 124, // Skip to: 45878
-/* 13991 */ MCD_OPC_Decode, 251, 18, 78, // Opcode: UABDvvv_8B
-/* 13995 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 14013
-/* 13999 */ MCD_OPC_CheckPredicate, 0, 131, 124, // Skip to: 45878
-/* 14003 */ MCD_OPC_CheckField, 16, 6, 32, 125, 124, // Skip to: 45878
-/* 14009 */ MCD_OPC_Decode, 182, 14, 79, // Opcode: SQNEG8b
-/* 14013 */ MCD_OPC_FilterValue, 15, 117, 124, // Skip to: 45878
-/* 14017 */ MCD_OPC_CheckPredicate, 0, 113, 124, // Skip to: 45878
-/* 14021 */ MCD_OPC_CheckField, 21, 1, 1, 107, 124, // Skip to: 45878
-/* 14027 */ MCD_OPC_Decode, 239, 18, 98, // Opcode: UABAvvv_8B
-/* 14031 */ MCD_OPC_FilterValue, 2, 27, 1, // Skip to: 14318
-/* 14035 */ MCD_OPC_ExtractField, 10, 4, // Inst{13-10} ...
-/* 14038 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14056
-/* 14042 */ MCD_OPC_CheckPredicate, 0, 88, 124, // Skip to: 45878
-/* 14046 */ MCD_OPC_CheckField, 21, 1, 1, 82, 124, // Skip to: 45878
-/* 14052 */ MCD_OPC_Decode, 233, 19, 94, // Opcode: UMLALvvv_8h8b
-/* 14056 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14074
-/* 14060 */ MCD_OPC_CheckPredicate, 0, 70, 124, // Skip to: 45878
-/* 14064 */ MCD_OPC_CheckField, 21, 1, 1, 64, 124, // Skip to: 45878
-/* 14070 */ MCD_OPC_Decode, 252, 17, 78, // Opcode: SUBvvv_8B
-/* 14074 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 14105
-/* 14078 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 14081 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14093
-/* 14085 */ MCD_OPC_CheckPredicate, 0, 45, 124, // Skip to: 45878
-/* 14089 */ MCD_OPC_Decode, 161, 2, 79, // Opcode: CMGEvvi_8B
-/* 14093 */ MCD_OPC_FilterValue, 33, 37, 124, // Skip to: 45878
-/* 14097 */ MCD_OPC_CheckPredicate, 0, 33, 124, // Skip to: 45878
-/* 14101 */ MCD_OPC_Decode, 156, 6, 79, // Opcode: FRINTA_2s
-/* 14105 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 14123
-/* 14109 */ MCD_OPC_CheckPredicate, 0, 21, 124, // Skip to: 45878
-/* 14113 */ MCD_OPC_CheckField, 21, 1, 1, 15, 124, // Skip to: 45878
-/* 14119 */ MCD_OPC_Decode, 152, 2, 78, // Opcode: CMEQvvv_8B
-/* 14123 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 14141
-/* 14127 */ MCD_OPC_CheckPredicate, 0, 3, 124, // Skip to: 45878
-/* 14131 */ MCD_OPC_CheckField, 21, 1, 1, 253, 123, // Skip to: 45878
-/* 14137 */ MCD_OPC_Decode, 131, 11, 98, // Opcode: MLSvvv_8B
-/* 14141 */ MCD_OPC_FilterValue, 6, 27, 0, // Skip to: 14172
-/* 14145 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 14148 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14160
-/* 14152 */ MCD_OPC_CheckPredicate, 0, 234, 123, // Skip to: 45878
-/* 14156 */ MCD_OPC_Decode, 208, 2, 79, // Opcode: CMLEvvi_8B
-/* 14160 */ MCD_OPC_FilterValue, 33, 226, 123, // Skip to: 45878
-/* 14164 */ MCD_OPC_CheckPredicate, 0, 222, 123, // Skip to: 45878
-/* 14168 */ MCD_OPC_Decode, 181, 6, 79, // Opcode: FRINTX_2s
-/* 14172 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 14190
-/* 14176 */ MCD_OPC_CheckPredicate, 0, 210, 123, // Skip to: 45878
-/* 14180 */ MCD_OPC_CheckField, 21, 1, 1, 204, 123, // Skip to: 45878
-/* 14186 */ MCD_OPC_Decode, 219, 11, 78, // Opcode: PMULvvv_8B
-/* 14190 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 14208
-/* 14194 */ MCD_OPC_CheckPredicate, 0, 192, 123, // Skip to: 45878
-/* 14198 */ MCD_OPC_CheckField, 21, 1, 1, 186, 123, // Skip to: 45878
-/* 14204 */ MCD_OPC_Decode, 243, 19, 94, // Opcode: UMLSLvvv_8h8b
-/* 14208 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 14226
-/* 14212 */ MCD_OPC_CheckPredicate, 0, 174, 123, // Skip to: 45878
-/* 14216 */ MCD_OPC_CheckField, 21, 1, 1, 168, 123, // Skip to: 45878
-/* 14222 */ MCD_OPC_Decode, 194, 19, 78, // Opcode: UMAXPvvv_8B
-/* 14226 */ MCD_OPC_FilterValue, 10, 39, 0, // Skip to: 14269
-/* 14230 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 14233 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 14245
-/* 14237 */ MCD_OPC_CheckPredicate, 0, 149, 123, // Skip to: 45878
-/* 14241 */ MCD_OPC_Decode, 221, 4, 79, // Opcode: FCVTNU_2s
-/* 14245 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 14257
-/* 14249 */ MCD_OPC_CheckPredicate, 0, 137, 123, // Skip to: 45878
-/* 14253 */ MCD_OPC_Decode, 197, 19, 99, // Opcode: UMAXV_1b8b
-/* 14257 */ MCD_OPC_FilterValue, 49, 129, 123, // Skip to: 45878
-/* 14261 */ MCD_OPC_CheckPredicate, 0, 125, 123, // Skip to: 45878
-/* 14265 */ MCD_OPC_Decode, 214, 19, 99, // Opcode: UMINV_1b8b
-/* 14269 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 14287
-/* 14273 */ MCD_OPC_CheckPredicate, 0, 113, 123, // Skip to: 45878
-/* 14277 */ MCD_OPC_CheckField, 21, 1, 1, 107, 123, // Skip to: 45878
-/* 14283 */ MCD_OPC_Decode, 211, 19, 78, // Opcode: UMINPvvv_8B
-/* 14287 */ MCD_OPC_FilterValue, 14, 99, 123, // Skip to: 45878
-/* 14291 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 14294 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14306
-/* 14298 */ MCD_OPC_CheckPredicate, 0, 88, 123, // Skip to: 45878
-/* 14302 */ MCD_OPC_Decode, 183, 11, 79, // Opcode: NEG8b
-/* 14306 */ MCD_OPC_FilterValue, 33, 80, 123, // Skip to: 45878
-/* 14310 */ MCD_OPC_CheckPredicate, 0, 76, 123, // Skip to: 45878
-/* 14314 */ MCD_OPC_Decode, 199, 4, 79, // Opcode: FCVTMU_2s
-/* 14318 */ MCD_OPC_FilterValue, 3, 68, 123, // Skip to: 45878
-/* 14322 */ MCD_OPC_ExtractField, 10, 4, // Inst{13-10} ...
-/* 14325 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14343
-/* 14329 */ MCD_OPC_CheckPredicate, 0, 57, 123, // Skip to: 45878
-/* 14333 */ MCD_OPC_CheckField, 21, 1, 1, 51, 123, // Skip to: 45878
-/* 14339 */ MCD_OPC_Decode, 131, 20, 74, // Opcode: UMULLvvv_8h8b
-/* 14343 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14361
-/* 14347 */ MCD_OPC_CheckPredicate, 0, 39, 123, // Skip to: 45878
-/* 14351 */ MCD_OPC_CheckField, 21, 1, 1, 33, 123, // Skip to: 45878
-/* 14357 */ MCD_OPC_Decode, 168, 5, 78, // Opcode: FMAXNMPvvv_2S
-/* 14361 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14379
-/* 14365 */ MCD_OPC_CheckPredicate, 0, 21, 123, // Skip to: 45878
-/* 14369 */ MCD_OPC_CheckField, 16, 6, 33, 15, 123, // Skip to: 45878
-/* 14375 */ MCD_OPC_Decode, 177, 4, 79, // Opcode: FCVTAU_2s
-/* 14379 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 14397
-/* 14383 */ MCD_OPC_CheckPredicate, 0, 3, 123, // Skip to: 45878
-/* 14387 */ MCD_OPC_CheckField, 21, 1, 1, 253, 122, // Skip to: 45878
-/* 14393 */ MCD_OPC_Decode, 232, 3, 78, // Opcode: FADDP_2S
-/* 14397 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 14415
-/* 14401 */ MCD_OPC_CheckPredicate, 0, 241, 122, // Skip to: 45878
-/* 14405 */ MCD_OPC_CheckField, 16, 6, 33, 235, 122, // Skip to: 45878
-/* 14411 */ MCD_OPC_Decode, 161, 19, 79, // Opcode: UCVTF_2s
-/* 14415 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 14433
-/* 14419 */ MCD_OPC_CheckPredicate, 0, 223, 122, // Skip to: 45878
-/* 14423 */ MCD_OPC_CheckField, 21, 1, 1, 217, 122, // Skip to: 45878
-/* 14429 */ MCD_OPC_Decode, 130, 6, 78, // Opcode: FMULvvv_2S
-/* 14433 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 14451
-/* 14437 */ MCD_OPC_CheckPredicate, 0, 205, 122, // Skip to: 45878
-/* 14441 */ MCD_OPC_CheckField, 21, 1, 1, 199, 122, // Skip to: 45878
-/* 14447 */ MCD_OPC_Decode, 135, 4, 78, // Opcode: FCMGEvvv_2S
-/* 14451 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 14469
-/* 14455 */ MCD_OPC_CheckPredicate, 0, 187, 122, // Skip to: 45878
-/* 14459 */ MCD_OPC_CheckField, 21, 1, 1, 181, 122, // Skip to: 45878
-/* 14465 */ MCD_OPC_Decode, 224, 3, 78, // Opcode: FACGEvvv_2S
-/* 14469 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 14487
-/* 14473 */ MCD_OPC_CheckPredicate, 0, 169, 122, // Skip to: 45878
-/* 14477 */ MCD_OPC_CheckField, 21, 1, 1, 163, 122, // Skip to: 45878
-/* 14483 */ MCD_OPC_Decode, 179, 5, 78, // Opcode: FMAXPvvv_2S
-/* 14487 */ MCD_OPC_FilterValue, 15, 155, 122, // Skip to: 45878
-/* 14491 */ MCD_OPC_CheckPredicate, 0, 151, 122, // Skip to: 45878
-/* 14495 */ MCD_OPC_CheckField, 21, 1, 1, 145, 122, // Skip to: 45878
-/* 14501 */ MCD_OPC_Decode, 161, 5, 78, // Opcode: FDIVvvv_2S
-/* 14505 */ MCD_OPC_FilterValue, 2, 170, 6, // Skip to: 16215
-/* 14509 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 14512 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 14543
-/* 14516 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 14519 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14531
-/* 14523 */ MCD_OPC_CheckPredicate, 0, 119, 122, // Skip to: 45878
-/* 14527 */ MCD_OPC_Decode, 181, 18, 102, // Opcode: TBL1_16b
-/* 14531 */ MCD_OPC_FilterValue, 1, 111, 122, // Skip to: 45878
-/* 14535 */ MCD_OPC_CheckPredicate, 0, 107, 122, // Skip to: 45878
-/* 14539 */ MCD_OPC_Decode, 184, 12, 102, // Opcode: SADDL2vvv_8h16b
-/* 14543 */ MCD_OPC_FilterValue, 1, 90, 0, // Skip to: 14637
-/* 14547 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 14550 */ MCD_OPC_FilterValue, 0, 71, 0, // Skip to: 14625
-/* 14554 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
-/* 14557 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 14613
-/* 14561 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
-/* 14564 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 14601
-/* 14568 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ...
-/* 14571 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14589
-/* 14575 */ MCD_OPC_CheckPredicate, 0, 67, 122, // Skip to: 45878
-/* 14579 */ MCD_OPC_CheckField, 19, 1, 1, 61, 122, // Skip to: 45878
-/* 14585 */ MCD_OPC_Decode, 175, 3, 103, // Opcode: DUPELT2d
-/* 14589 */ MCD_OPC_FilterValue, 1, 53, 122, // Skip to: 45878
-/* 14593 */ MCD_OPC_CheckPredicate, 0, 49, 122, // Skip to: 45878
-/* 14597 */ MCD_OPC_Decode, 178, 3, 104, // Opcode: DUPELT4s
-/* 14601 */ MCD_OPC_FilterValue, 1, 41, 122, // Skip to: 45878
-/* 14605 */ MCD_OPC_CheckPredicate, 0, 37, 122, // Skip to: 45878
-/* 14609 */ MCD_OPC_Decode, 180, 3, 105, // Opcode: DUPELT8h
-/* 14613 */ MCD_OPC_FilterValue, 1, 29, 122, // Skip to: 45878
-/* 14617 */ MCD_OPC_CheckPredicate, 0, 25, 122, // Skip to: 45878
-/* 14621 */ MCD_OPC_Decode, 174, 3, 106, // Opcode: DUPELT16b
-/* 14625 */ MCD_OPC_FilterValue, 1, 17, 122, // Skip to: 45878
-/* 14629 */ MCD_OPC_CheckPredicate, 0, 13, 122, // Skip to: 45878
-/* 14633 */ MCD_OPC_Decode, 242, 12, 102, // Opcode: SHADDvvv_16B
-/* 14637 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14655
-/* 14641 */ MCD_OPC_CheckPredicate, 0, 1, 122, // Skip to: 45878
-/* 14645 */ MCD_OPC_CheckField, 16, 6, 32, 251, 121, // Skip to: 45878
-/* 14651 */ MCD_OPC_Decode, 130, 12, 107, // Opcode: REV64_16b
-/* 14655 */ MCD_OPC_FilterValue, 3, 70, 0, // Skip to: 14729
-/* 14659 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 14662 */ MCD_OPC_FilterValue, 0, 51, 0, // Skip to: 14717
-/* 14666 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 14669 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 14681
-/* 14673 */ MCD_OPC_CheckPredicate, 0, 225, 121, // Skip to: 45878
-/* 14677 */ MCD_OPC_Decode, 167, 3, 108, // Opcode: DUP16b
-/* 14681 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 14693
-/* 14685 */ MCD_OPC_CheckPredicate, 0, 213, 121, // Skip to: 45878
-/* 14689 */ MCD_OPC_Decode, 173, 3, 108, // Opcode: DUP8h
-/* 14693 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 14705
-/* 14697 */ MCD_OPC_CheckPredicate, 0, 201, 121, // Skip to: 45878
-/* 14701 */ MCD_OPC_Decode, 171, 3, 108, // Opcode: DUP4s
-/* 14705 */ MCD_OPC_FilterValue, 8, 193, 121, // Skip to: 45878
-/* 14709 */ MCD_OPC_CheckPredicate, 0, 189, 121, // Skip to: 45878
-/* 14713 */ MCD_OPC_Decode, 168, 3, 109, // Opcode: DUP2d
-/* 14717 */ MCD_OPC_FilterValue, 1, 181, 121, // Skip to: 45878
-/* 14721 */ MCD_OPC_CheckPredicate, 0, 177, 121, // Skip to: 45878
-/* 14725 */ MCD_OPC_Decode, 242, 13, 102, // Opcode: SQADDvvv_16B
-/* 14729 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 14760
-/* 14733 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 14736 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14748
-/* 14740 */ MCD_OPC_CheckPredicate, 0, 158, 121, // Skip to: 45878
-/* 14744 */ MCD_OPC_Decode, 191, 18, 110, // Opcode: TBX1_16b
-/* 14748 */ MCD_OPC_FilterValue, 1, 150, 121, // Skip to: 45878
-/* 14752 */ MCD_OPC_CheckPredicate, 0, 146, 121, // Skip to: 45878
-/* 14756 */ MCD_OPC_Decode, 201, 12, 102, // Opcode: SADDW2vvv_8h16b
-/* 14760 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 14778
-/* 14764 */ MCD_OPC_CheckPredicate, 0, 134, 121, // Skip to: 45878
-/* 14768 */ MCD_OPC_CheckField, 21, 1, 1, 128, 121, // Skip to: 45878
-/* 14774 */ MCD_OPC_Decode, 171, 15, 102, // Opcode: SRHADDvvv_16B
-/* 14778 */ MCD_OPC_FilterValue, 6, 33, 0, // Skip to: 14815
-/* 14782 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 14785 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14797
-/* 14789 */ MCD_OPC_CheckPredicate, 0, 109, 121, // Skip to: 45878
-/* 14793 */ MCD_OPC_Decode, 177, 21, 102, // Opcode: UZP1vvv_16b
-/* 14797 */ MCD_OPC_FilterValue, 1, 101, 121, // Skip to: 45878
-/* 14801 */ MCD_OPC_CheckPredicate, 0, 97, 121, // Skip to: 45878
-/* 14805 */ MCD_OPC_CheckField, 16, 5, 0, 91, 121, // Skip to: 45878
-/* 14811 */ MCD_OPC_Decode, 249, 11, 107, // Opcode: REV16_16b
-/* 14815 */ MCD_OPC_FilterValue, 7, 90, 0, // Skip to: 14909
-/* 14819 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 14822 */ MCD_OPC_FilterValue, 0, 71, 0, // Skip to: 14897
-/* 14826 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
-/* 14829 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 14885
-/* 14833 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
-/* 14836 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 14873
-/* 14840 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ...
-/* 14843 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14861
-/* 14847 */ MCD_OPC_CheckPredicate, 0, 51, 121, // Skip to: 45878
-/* 14851 */ MCD_OPC_CheckField, 19, 1, 1, 45, 121, // Skip to: 45878
-/* 14857 */ MCD_OPC_Decode, 220, 6, 111, // Opcode: INSdx
-/* 14861 */ MCD_OPC_FilterValue, 1, 37, 121, // Skip to: 45878
-/* 14865 */ MCD_OPC_CheckPredicate, 0, 33, 121, // Skip to: 45878
-/* 14869 */ MCD_OPC_Decode, 222, 6, 112, // Opcode: INSsw
-/* 14873 */ MCD_OPC_FilterValue, 1, 25, 121, // Skip to: 45878
-/* 14877 */ MCD_OPC_CheckPredicate, 0, 21, 121, // Skip to: 45878
-/* 14881 */ MCD_OPC_Decode, 221, 6, 113, // Opcode: INShw
-/* 14885 */ MCD_OPC_FilterValue, 1, 13, 121, // Skip to: 45878
-/* 14889 */ MCD_OPC_CheckPredicate, 0, 9, 121, // Skip to: 45878
-/* 14893 */ MCD_OPC_Decode, 219, 6, 114, // Opcode: INSbw
-/* 14897 */ MCD_OPC_FilterValue, 1, 1, 121, // Skip to: 45878
-/* 14901 */ MCD_OPC_CheckPredicate, 0, 253, 120, // Skip to: 45878
-/* 14905 */ MCD_OPC_Decode, 132, 1, 102, // Opcode: ANDvvv_16B
-/* 14909 */ MCD_OPC_FilterValue, 8, 27, 0, // Skip to: 14940
-/* 14913 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 14916 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14928
-/* 14920 */ MCD_OPC_CheckPredicate, 0, 234, 120, // Skip to: 45878
-/* 14924 */ MCD_OPC_Decode, 183, 18, 115, // Opcode: TBL2_16b
-/* 14928 */ MCD_OPC_FilterValue, 1, 226, 120, // Skip to: 45878
-/* 14932 */ MCD_OPC_CheckPredicate, 0, 222, 120, // Skip to: 45878
-/* 14936 */ MCD_OPC_Decode, 241, 15, 102, // Opcode: SSUBL2vvv_8h16b
-/* 14940 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 14958
-/* 14944 */ MCD_OPC_CheckPredicate, 0, 210, 120, // Skip to: 45878
-/* 14948 */ MCD_OPC_CheckField, 21, 1, 1, 204, 120, // Skip to: 45878
-/* 14954 */ MCD_OPC_Decode, 140, 13, 102, // Opcode: SHSUBvvv_16B
-/* 14958 */ MCD_OPC_FilterValue, 10, 46, 0, // Skip to: 15008
-/* 14962 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 14965 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14977
-/* 14969 */ MCD_OPC_CheckPredicate, 0, 185, 120, // Skip to: 45878
-/* 14973 */ MCD_OPC_Decode, 207, 18, 102, // Opcode: TRN1vvv_16b
-/* 14977 */ MCD_OPC_FilterValue, 1, 177, 120, // Skip to: 45878
-/* 14981 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 14984 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14996
-/* 14988 */ MCD_OPC_CheckPredicate, 0, 166, 120, // Skip to: 45878
-/* 14992 */ MCD_OPC_Decode, 185, 12, 107, // Opcode: SADDLP16b8h
-/* 14996 */ MCD_OPC_FilterValue, 1, 158, 120, // Skip to: 45878
-/* 15000 */ MCD_OPC_CheckPredicate, 0, 154, 120, // Skip to: 45878
-/* 15004 */ MCD_OPC_Decode, 207, 21, 116, // Opcode: XTN8h16b
-/* 15008 */ MCD_OPC_FilterValue, 11, 71, 0, // Skip to: 15083
-/* 15012 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15015 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 15071
-/* 15019 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
-/* 15022 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 15059
-/* 15026 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
-/* 15029 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15047
-/* 15033 */ MCD_OPC_CheckPredicate, 0, 121, 120, // Skip to: 45878
-/* 15037 */ MCD_OPC_CheckField, 18, 1, 1, 115, 120, // Skip to: 45878
-/* 15043 */ MCD_OPC_Decode, 214, 13, 117, // Opcode: SMOVxs
-/* 15047 */ MCD_OPC_FilterValue, 1, 107, 120, // Skip to: 45878
-/* 15051 */ MCD_OPC_CheckPredicate, 0, 103, 120, // Skip to: 45878
-/* 15055 */ MCD_OPC_Decode, 213, 13, 118, // Opcode: SMOVxh
-/* 15059 */ MCD_OPC_FilterValue, 1, 95, 120, // Skip to: 45878
-/* 15063 */ MCD_OPC_CheckPredicate, 0, 91, 120, // Skip to: 45878
-/* 15067 */ MCD_OPC_Decode, 212, 13, 119, // Opcode: SMOVxb
-/* 15071 */ MCD_OPC_FilterValue, 1, 83, 120, // Skip to: 45878
-/* 15075 */ MCD_OPC_CheckPredicate, 0, 79, 120, // Skip to: 45878
-/* 15079 */ MCD_OPC_Decode, 146, 15, 102, // Opcode: SQSUBvvv_16B
-/* 15083 */ MCD_OPC_FilterValue, 12, 27, 0, // Skip to: 15114
-/* 15087 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15090 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15102
-/* 15094 */ MCD_OPC_CheckPredicate, 0, 60, 120, // Skip to: 45878
-/* 15098 */ MCD_OPC_Decode, 193, 18, 120, // Opcode: TBX2_16b
-/* 15102 */ MCD_OPC_FilterValue, 1, 52, 120, // Skip to: 45878
-/* 15106 */ MCD_OPC_CheckPredicate, 0, 48, 120, // Skip to: 45878
-/* 15110 */ MCD_OPC_Decode, 247, 15, 102, // Opcode: SSUBW2vvv_8h16b
-/* 15114 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 15132
-/* 15118 */ MCD_OPC_CheckPredicate, 0, 36, 120, // Skip to: 45878
-/* 15122 */ MCD_OPC_CheckField, 21, 1, 1, 30, 120, // Skip to: 45878
-/* 15128 */ MCD_OPC_Decode, 179, 2, 102, // Opcode: CMGTvvv_16B
-/* 15132 */ MCD_OPC_FilterValue, 14, 46, 0, // Skip to: 15182
-/* 15136 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15139 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15151
-/* 15143 */ MCD_OPC_CheckPredicate, 0, 11, 120, // Skip to: 45878
-/* 15147 */ MCD_OPC_Decode, 209, 21, 102, // Opcode: ZIP1vvv_16b
-/* 15151 */ MCD_OPC_FilterValue, 1, 3, 120, // Skip to: 45878
-/* 15155 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 15158 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15170
-/* 15162 */ MCD_OPC_CheckPredicate, 0, 248, 119, // Skip to: 45878
-/* 15166 */ MCD_OPC_Decode, 160, 18, 116, // Opcode: SUQADD16b
-/* 15170 */ MCD_OPC_FilterValue, 16, 240, 119, // Skip to: 45878
-/* 15174 */ MCD_OPC_CheckPredicate, 0, 236, 119, // Skip to: 45878
-/* 15178 */ MCD_OPC_Decode, 192, 12, 121, // Opcode: SADDLV_1h16b
-/* 15182 */ MCD_OPC_FilterValue, 15, 33, 0, // Skip to: 15219
-/* 15186 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15189 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15207
-/* 15193 */ MCD_OPC_CheckPredicate, 0, 217, 119, // Skip to: 45878
-/* 15197 */ MCD_OPC_CheckField, 16, 4, 8, 211, 119, // Skip to: 45878
-/* 15203 */ MCD_OPC_Decode, 247, 19, 122, // Opcode: UMOVxd
-/* 15207 */ MCD_OPC_FilterValue, 1, 203, 119, // Skip to: 45878
-/* 15211 */ MCD_OPC_CheckPredicate, 0, 199, 119, // Skip to: 45878
-/* 15215 */ MCD_OPC_Decode, 163, 2, 102, // Opcode: CMGEvvv_16B
-/* 15219 */ MCD_OPC_FilterValue, 16, 26, 0, // Skip to: 15249
-/* 15223 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15226 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15238
-/* 15230 */ MCD_OPC_CheckPredicate, 0, 180, 119, // Skip to: 45878
-/* 15234 */ MCD_OPC_Decode, 185, 18, 123, // Opcode: TBL3_16b
-/* 15238 */ MCD_OPC_FilterValue, 1, 172, 119, // Skip to: 45878
-/* 15242 */ MCD_OPC_CheckPredicate, 0, 168, 119, // Skip to: 45878
-/* 15246 */ MCD_OPC_Decode, 31, 110, // Opcode: ADDHN2vvv_16b8h
-/* 15249 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 15267
-/* 15253 */ MCD_OPC_CheckPredicate, 0, 157, 119, // Skip to: 45878
-/* 15257 */ MCD_OPC_CheckField, 21, 1, 1, 151, 119, // Skip to: 45878
-/* 15263 */ MCD_OPC_Decode, 216, 15, 102, // Opcode: SSHLvvv_16B
-/* 15267 */ MCD_OPC_FilterValue, 18, 38, 0, // Skip to: 15309
-/* 15271 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 15274 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 15286
-/* 15278 */ MCD_OPC_CheckPredicate, 0, 132, 119, // Skip to: 45878
-/* 15282 */ MCD_OPC_Decode, 250, 1, 107, // Opcode: CLS16b
-/* 15286 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 15298
-/* 15290 */ MCD_OPC_CheckPredicate, 0, 120, 119, // Skip to: 45878
-/* 15294 */ MCD_OPC_Decode, 157, 15, 116, // Opcode: SQXTN8h16b
-/* 15298 */ MCD_OPC_FilterValue, 40, 112, 119, // Skip to: 45878
-/* 15302 */ MCD_OPC_CheckPredicate, 2, 108, 119, // Skip to: 45878
-/* 15306 */ MCD_OPC_Decode, 119, 116, // Opcode: AESE
-/* 15309 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 15327
-/* 15313 */ MCD_OPC_CheckPredicate, 0, 97, 119, // Skip to: 45878
-/* 15317 */ MCD_OPC_CheckField, 21, 1, 1, 91, 119, // Skip to: 45878
-/* 15323 */ MCD_OPC_Decode, 251, 14, 102, // Opcode: SQSHLvvv_16B
-/* 15327 */ MCD_OPC_FilterValue, 20, 27, 0, // Skip to: 15358
-/* 15331 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15334 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15346
-/* 15338 */ MCD_OPC_CheckPredicate, 0, 72, 119, // Skip to: 45878
-/* 15342 */ MCD_OPC_Decode, 195, 18, 124, // Opcode: TBX3_16b
-/* 15346 */ MCD_OPC_FilterValue, 1, 64, 119, // Skip to: 45878
-/* 15350 */ MCD_OPC_CheckPredicate, 0, 60, 119, // Skip to: 45878
-/* 15354 */ MCD_OPC_Decode, 154, 12, 110, // Opcode: SABAL2vvv_8h8b
-/* 15358 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 15376
-/* 15362 */ MCD_OPC_CheckPredicate, 0, 48, 119, // Skip to: 45878
-/* 15366 */ MCD_OPC_CheckField, 21, 1, 1, 42, 119, // Skip to: 45878
-/* 15372 */ MCD_OPC_Decode, 186, 15, 102, // Opcode: SRSHLvvv_16B
-/* 15376 */ MCD_OPC_FilterValue, 22, 45, 0, // Skip to: 15425
-/* 15380 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15383 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15395
-/* 15387 */ MCD_OPC_CheckPredicate, 0, 23, 119, // Skip to: 45878
-/* 15391 */ MCD_OPC_Decode, 184, 21, 102, // Opcode: UZP2vvv_16b
-/* 15395 */ MCD_OPC_FilterValue, 1, 15, 119, // Skip to: 45878
-/* 15399 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 15402 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15414
-/* 15406 */ MCD_OPC_CheckPredicate, 0, 4, 119, // Skip to: 45878
-/* 15410 */ MCD_OPC_Decode, 142, 3, 107, // Opcode: CNT16b
-/* 15414 */ MCD_OPC_FilterValue, 8, 252, 118, // Skip to: 45878
-/* 15418 */ MCD_OPC_CheckPredicate, 2, 248, 118, // Skip to: 45878
-/* 15422 */ MCD_OPC_Decode, 118, 116, // Opcode: AESD
-/* 15425 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 15443
-/* 15429 */ MCD_OPC_CheckPredicate, 0, 237, 118, // Skip to: 45878
-/* 15433 */ MCD_OPC_CheckField, 21, 1, 1, 231, 118, // Skip to: 45878
-/* 15439 */ MCD_OPC_Decode, 206, 14, 102, // Opcode: SQRSHLvvv_16B
-/* 15443 */ MCD_OPC_FilterValue, 24, 27, 0, // Skip to: 15474
-/* 15447 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15450 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15462
-/* 15454 */ MCD_OPC_CheckPredicate, 0, 212, 118, // Skip to: 45878
-/* 15458 */ MCD_OPC_Decode, 187, 18, 125, // Opcode: TBL4_16b
-/* 15462 */ MCD_OPC_FilterValue, 1, 204, 118, // Skip to: 45878
-/* 15466 */ MCD_OPC_CheckPredicate, 0, 200, 118, // Skip to: 45878
-/* 15470 */ MCD_OPC_Decode, 218, 17, 110, // Opcode: SUBHN2vvv_16b8h
-/* 15474 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 15492
-/* 15478 */ MCD_OPC_CheckPredicate, 0, 188, 118, // Skip to: 45878
-/* 15482 */ MCD_OPC_CheckField, 21, 1, 1, 182, 118, // Skip to: 45878
-/* 15488 */ MCD_OPC_Decode, 166, 13, 102, // Opcode: SMAXvvv_16B
-/* 15492 */ MCD_OPC_FilterValue, 26, 57, 0, // Skip to: 15553
-/* 15496 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15499 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15511
-/* 15503 */ MCD_OPC_CheckPredicate, 0, 163, 118, // Skip to: 45878
-/* 15507 */ MCD_OPC_Decode, 214, 18, 102, // Opcode: TRN2vvv_16b
-/* 15511 */ MCD_OPC_FilterValue, 1, 155, 118, // Skip to: 45878
-/* 15515 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 15518 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15530
-/* 15522 */ MCD_OPC_CheckPredicate, 0, 144, 118, // Skip to: 45878
-/* 15526 */ MCD_OPC_Decode, 176, 12, 116, // Opcode: SADALP16b8h
-/* 15530 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 15542
-/* 15534 */ MCD_OPC_CheckPredicate, 0, 132, 118, // Skip to: 45878
-/* 15538 */ MCD_OPC_Decode, 210, 4, 116, // Opcode: FCVTN4s8h
-/* 15542 */ MCD_OPC_FilterValue, 8, 124, 118, // Skip to: 45878
-/* 15546 */ MCD_OPC_CheckPredicate, 0, 120, 118, // Skip to: 45878
-/* 15550 */ MCD_OPC_Decode, 121, 107, // Opcode: AESMC
-/* 15553 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 15571
-/* 15557 */ MCD_OPC_CheckPredicate, 0, 109, 118, // Skip to: 45878
-/* 15561 */ MCD_OPC_CheckField, 21, 1, 1, 103, 118, // Skip to: 45878
-/* 15567 */ MCD_OPC_Decode, 184, 13, 102, // Opcode: SMINvvv_16B
-/* 15571 */ MCD_OPC_FilterValue, 28, 27, 0, // Skip to: 15602
-/* 15575 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15578 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15590
-/* 15582 */ MCD_OPC_CheckPredicate, 0, 84, 118, // Skip to: 45878
-/* 15586 */ MCD_OPC_Decode, 197, 18, 126, // Opcode: TBX4_16b
-/* 15590 */ MCD_OPC_FilterValue, 1, 76, 118, // Skip to: 45878
-/* 15594 */ MCD_OPC_CheckPredicate, 0, 72, 118, // Skip to: 45878
-/* 15598 */ MCD_OPC_Decode, 166, 12, 102, // Opcode: SABDL2vvv_8h8b
-/* 15602 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 15620
-/* 15606 */ MCD_OPC_CheckPredicate, 0, 60, 118, // Skip to: 45878
-/* 15610 */ MCD_OPC_CheckField, 21, 1, 1, 54, 118, // Skip to: 45878
-/* 15616 */ MCD_OPC_Decode, 170, 12, 102, // Opcode: SABDvvv_16B
-/* 15620 */ MCD_OPC_FilterValue, 30, 57, 0, // Skip to: 15681
-/* 15624 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 15627 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15639
-/* 15631 */ MCD_OPC_CheckPredicate, 0, 35, 118, // Skip to: 45878
-/* 15635 */ MCD_OPC_Decode, 216, 21, 102, // Opcode: ZIP2vvv_16b
-/* 15639 */ MCD_OPC_FilterValue, 1, 27, 118, // Skip to: 45878
-/* 15643 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 15646 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15658
-/* 15650 */ MCD_OPC_CheckPredicate, 0, 16, 118, // Skip to: 45878
-/* 15654 */ MCD_OPC_Decode, 227, 13, 107, // Opcode: SQABS16b
-/* 15658 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 15670
-/* 15662 */ MCD_OPC_CheckPredicate, 0, 4, 118, // Skip to: 45878
-/* 15666 */ MCD_OPC_Decode, 188, 4, 107, // Opcode: FCVTL8h4s
-/* 15670 */ MCD_OPC_FilterValue, 8, 252, 117, // Skip to: 45878
-/* 15674 */ MCD_OPC_CheckPredicate, 0, 248, 117, // Skip to: 45878
-/* 15678 */ MCD_OPC_Decode, 120, 107, // Opcode: AESIMC
-/* 15681 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 15699
-/* 15685 */ MCD_OPC_CheckPredicate, 0, 237, 117, // Skip to: 45878
-/* 15689 */ MCD_OPC_CheckField, 21, 1, 1, 231, 117, // Skip to: 45878
-/* 15695 */ MCD_OPC_Decode, 158, 12, 110, // Opcode: SABAvvv_16B
-/* 15699 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 15717
-/* 15703 */ MCD_OPC_CheckPredicate, 0, 219, 117, // Skip to: 45878
-/* 15707 */ MCD_OPC_CheckField, 21, 1, 1, 213, 117, // Skip to: 45878
-/* 15713 */ MCD_OPC_Decode, 192, 13, 110, // Opcode: SMLAL2vvv_8h16b
-/* 15717 */ MCD_OPC_FilterValue, 33, 13, 0, // Skip to: 15734
-/* 15721 */ MCD_OPC_CheckPredicate, 0, 201, 117, // Skip to: 45878
-/* 15725 */ MCD_OPC_CheckField, 21, 1, 1, 195, 117, // Skip to: 45878
-/* 15731 */ MCD_OPC_Decode, 73, 102, // Opcode: ADDvvv_16B
-/* 15734 */ MCD_OPC_FilterValue, 34, 27, 0, // Skip to: 15765
-/* 15738 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 15741 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 15753
-/* 15745 */ MCD_OPC_CheckPredicate, 0, 177, 117, // Skip to: 45878
-/* 15749 */ MCD_OPC_Decode, 172, 2, 107, // Opcode: CMGTvvi_16B
-/* 15753 */ MCD_OPC_FilterValue, 33, 169, 117, // Skip to: 45878
-/* 15757 */ MCD_OPC_CheckPredicate, 0, 165, 117, // Skip to: 45878
-/* 15761 */ MCD_OPC_Decode, 172, 6, 107, // Opcode: FRINTN_4s
-/* 15765 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 15783
-/* 15769 */ MCD_OPC_CheckPredicate, 0, 153, 117, // Skip to: 45878
-/* 15773 */ MCD_OPC_CheckField, 21, 1, 1, 147, 117, // Skip to: 45878
-/* 15779 */ MCD_OPC_Decode, 135, 3, 102, // Opcode: CMTSTvvv_16B
-/* 15783 */ MCD_OPC_FilterValue, 37, 14, 0, // Skip to: 15801
-/* 15787 */ MCD_OPC_CheckPredicate, 0, 135, 117, // Skip to: 45878
-/* 15791 */ MCD_OPC_CheckField, 21, 1, 1, 129, 117, // Skip to: 45878
-/* 15797 */ MCD_OPC_Decode, 245, 10, 110, // Opcode: MLAvvv_16B
-/* 15801 */ MCD_OPC_FilterValue, 38, 27, 0, // Skip to: 15832
-/* 15805 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 15808 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 15820
-/* 15812 */ MCD_OPC_CheckPredicate, 0, 110, 117, // Skip to: 45878
-/* 15816 */ MCD_OPC_Decode, 140, 2, 107, // Opcode: CMEQvvi_16B
-/* 15820 */ MCD_OPC_FilterValue, 33, 102, 117, // Skip to: 45878
-/* 15824 */ MCD_OPC_CheckPredicate, 0, 98, 117, // Skip to: 45878
-/* 15828 */ MCD_OPC_Decode, 167, 6, 107, // Opcode: FRINTM_4s
-/* 15832 */ MCD_OPC_FilterValue, 39, 14, 0, // Skip to: 15850
-/* 15836 */ MCD_OPC_CheckPredicate, 0, 86, 117, // Skip to: 45878
-/* 15840 */ MCD_OPC_CheckField, 21, 1, 1, 80, 117, // Skip to: 45878
-/* 15846 */ MCD_OPC_Decode, 158, 11, 102, // Opcode: MULvvv_16B
-/* 15850 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 15868
-/* 15854 */ MCD_OPC_CheckPredicate, 0, 68, 117, // Skip to: 45878
-/* 15858 */ MCD_OPC_CheckField, 21, 1, 1, 62, 117, // Skip to: 45878
-/* 15864 */ MCD_OPC_Decode, 202, 13, 110, // Opcode: SMLSL2vvv_8h16b
-/* 15868 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 15886
-/* 15872 */ MCD_OPC_CheckPredicate, 0, 50, 117, // Skip to: 45878
-/* 15876 */ MCD_OPC_CheckField, 21, 1, 1, 44, 117, // Skip to: 45878
-/* 15882 */ MCD_OPC_Decode, 155, 13, 102, // Opcode: SMAXPvvv_16B
-/* 15886 */ MCD_OPC_FilterValue, 42, 51, 0, // Skip to: 15941
-/* 15890 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 15893 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 15905
-/* 15897 */ MCD_OPC_CheckPredicate, 0, 25, 117, // Skip to: 45878
-/* 15901 */ MCD_OPC_Decode, 211, 2, 107, // Opcode: CMLTvvi_16B
-/* 15905 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 15917
-/* 15909 */ MCD_OPC_CheckPredicate, 0, 13, 117, // Skip to: 45878
-/* 15913 */ MCD_OPC_Decode, 213, 4, 107, // Opcode: FCVTNS_4s
-/* 15917 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 15929
-/* 15921 */ MCD_OPC_CheckPredicate, 0, 1, 117, // Skip to: 45878
-/* 15925 */ MCD_OPC_Decode, 161, 13, 127, // Opcode: SMAXV_1b16b
-/* 15929 */ MCD_OPC_FilterValue, 49, 249, 116, // Skip to: 45878
-/* 15933 */ MCD_OPC_CheckPredicate, 0, 245, 116, // Skip to: 45878
-/* 15937 */ MCD_OPC_Decode, 179, 13, 127, // Opcode: SMINV_1b16b
-/* 15941 */ MCD_OPC_FilterValue, 43, 14, 0, // Skip to: 15959
-/* 15945 */ MCD_OPC_CheckPredicate, 0, 233, 116, // Skip to: 45878
-/* 15949 */ MCD_OPC_CheckField, 21, 1, 1, 227, 116, // Skip to: 45878
-/* 15955 */ MCD_OPC_Decode, 173, 13, 102, // Opcode: SMINPvvv_16B
-/* 15959 */ MCD_OPC_FilterValue, 46, 37, 0, // Skip to: 16000
-/* 15963 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 15966 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 15977
-/* 15970 */ MCD_OPC_CheckPredicate, 0, 208, 116, // Skip to: 45878
-/* 15974 */ MCD_OPC_Decode, 19, 107, // Opcode: ABS16b
-/* 15977 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 15989
-/* 15981 */ MCD_OPC_CheckPredicate, 0, 197, 116, // Skip to: 45878
-/* 15985 */ MCD_OPC_Decode, 191, 4, 107, // Opcode: FCVTMS_4s
-/* 15989 */ MCD_OPC_FilterValue, 49, 189, 116, // Skip to: 45878
-/* 15993 */ MCD_OPC_CheckPredicate, 0, 185, 116, // Skip to: 45878
-/* 15997 */ MCD_OPC_Decode, 67, 127, // Opcode: ADDV_1b16b
-/* 16000 */ MCD_OPC_FilterValue, 47, 13, 0, // Skip to: 16017
-/* 16004 */ MCD_OPC_CheckPredicate, 0, 174, 116, // Skip to: 45878
-/* 16008 */ MCD_OPC_CheckField, 21, 1, 1, 168, 116, // Skip to: 45878
-/* 16014 */ MCD_OPC_Decode, 37, 102, // Opcode: ADDP_16B
-/* 16017 */ MCD_OPC_FilterValue, 48, 14, 0, // Skip to: 16035
-/* 16021 */ MCD_OPC_CheckPredicate, 0, 157, 116, // Skip to: 45878
-/* 16025 */ MCD_OPC_CheckField, 21, 1, 1, 151, 116, // Skip to: 45878
-/* 16031 */ MCD_OPC_Decode, 219, 13, 102, // Opcode: SMULL2vvv_8h16b
-/* 16035 */ MCD_OPC_FilterValue, 49, 14, 0, // Skip to: 16053
-/* 16039 */ MCD_OPC_CheckPredicate, 0, 139, 116, // Skip to: 45878
-/* 16043 */ MCD_OPC_CheckField, 21, 1, 1, 133, 116, // Skip to: 45878
-/* 16049 */ MCD_OPC_Decode, 175, 5, 102, // Opcode: FMAXNMvvv_4S
-/* 16053 */ MCD_OPC_FilterValue, 50, 14, 0, // Skip to: 16071
-/* 16057 */ MCD_OPC_CheckPredicate, 0, 121, 116, // Skip to: 45878
-/* 16061 */ MCD_OPC_CheckField, 16, 6, 33, 115, 116, // Skip to: 45878
-/* 16067 */ MCD_OPC_Decode, 169, 4, 107, // Opcode: FCVTAS_4s
-/* 16071 */ MCD_OPC_FilterValue, 51, 14, 0, // Skip to: 16089
-/* 16075 */ MCD_OPC_CheckPredicate, 0, 103, 116, // Skip to: 45878
-/* 16079 */ MCD_OPC_CheckField, 21, 1, 1, 97, 116, // Skip to: 45878
-/* 16085 */ MCD_OPC_Decode, 216, 5, 110, // Opcode: FMLAvvv_4S
-/* 16089 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 16107
-/* 16093 */ MCD_OPC_CheckPredicate, 0, 85, 116, // Skip to: 45878
-/* 16097 */ MCD_OPC_CheckField, 21, 1, 1, 79, 116, // Skip to: 45878
-/* 16103 */ MCD_OPC_Decode, 240, 3, 102, // Opcode: FADDvvv_4S
-/* 16107 */ MCD_OPC_FilterValue, 54, 14, 0, // Skip to: 16125
-/* 16111 */ MCD_OPC_CheckPredicate, 0, 67, 116, // Skip to: 45878
-/* 16115 */ MCD_OPC_CheckField, 16, 6, 33, 61, 116, // Skip to: 45878
-/* 16121 */ MCD_OPC_Decode, 217, 12, 107, // Opcode: SCVTF_4s
-/* 16125 */ MCD_OPC_FilterValue, 55, 14, 0, // Skip to: 16143
-/* 16129 */ MCD_OPC_CheckPredicate, 0, 49, 116, // Skip to: 45878
-/* 16133 */ MCD_OPC_CheckField, 21, 1, 1, 43, 116, // Skip to: 45878
-/* 16139 */ MCD_OPC_Decode, 249, 5, 102, // Opcode: FMULXvvv_4S
-/* 16143 */ MCD_OPC_FilterValue, 56, 14, 0, // Skip to: 16161
-/* 16147 */ MCD_OPC_CheckPredicate, 0, 31, 116, // Skip to: 45878
-/* 16151 */ MCD_OPC_CheckField, 21, 1, 1, 25, 116, // Skip to: 45878
-/* 16157 */ MCD_OPC_Decode, 215, 11, 102, // Opcode: PMULL2vvv_8h16b
-/* 16161 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 16179
-/* 16165 */ MCD_OPC_CheckPredicate, 0, 13, 116, // Skip to: 45878
-/* 16169 */ MCD_OPC_CheckField, 21, 1, 1, 7, 116, // Skip to: 45878
-/* 16175 */ MCD_OPC_Decode, 254, 3, 102, // Opcode: FCMEQvvv_4S
-/* 16179 */ MCD_OPC_FilterValue, 61, 14, 0, // Skip to: 16197
-/* 16183 */ MCD_OPC_CheckPredicate, 0, 251, 115, // Skip to: 45878
-/* 16187 */ MCD_OPC_CheckField, 21, 1, 1, 245, 115, // Skip to: 45878
-/* 16193 */ MCD_OPC_Decode, 186, 5, 102, // Opcode: FMAXvvv_4S
-/* 16197 */ MCD_OPC_FilterValue, 63, 237, 115, // Skip to: 45878
-/* 16201 */ MCD_OPC_CheckPredicate, 0, 233, 115, // Skip to: 45878
-/* 16205 */ MCD_OPC_CheckField, 21, 1, 1, 227, 115, // Skip to: 45878
-/* 16211 */ MCD_OPC_Decode, 152, 6, 102, // Opcode: FRECPSvvv_4S
-/* 16215 */ MCD_OPC_FilterValue, 3, 219, 115, // Skip to: 45878
-/* 16219 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 16222 */ MCD_OPC_FilterValue, 0, 57, 2, // Skip to: 16795
-/* 16226 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 16229 */ MCD_OPC_FilterValue, 0, 40, 1, // Skip to: 16529
-/* 16233 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 16236 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 16249
-/* 16240 */ MCD_OPC_CheckPredicate, 0, 194, 115, // Skip to: 45878
-/* 16244 */ MCD_OPC_Decode, 208, 3, 128, 1, // Opcode: EXTvvvi_16b
-/* 16249 */ MCD_OPC_FilterValue, 1, 185, 115, // Skip to: 45878
-/* 16253 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ...
-/* 16256 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16268
-/* 16260 */ MCD_OPC_CheckPredicate, 0, 174, 115, // Skip to: 45878
-/* 16264 */ MCD_OPC_Decode, 133, 19, 102, // Opcode: UADDL2vvv_8h16b
-/* 16268 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16286
-/* 16272 */ MCD_OPC_CheckPredicate, 0, 162, 115, // Skip to: 45878
-/* 16276 */ MCD_OPC_CheckField, 16, 5, 0, 156, 115, // Skip to: 45878
-/* 16282 */ MCD_OPC_Decode, 253, 11, 107, // Opcode: REV32_16b
-/* 16286 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 16298
-/* 16290 */ MCD_OPC_CheckPredicate, 0, 144, 115, // Skip to: 45878
-/* 16294 */ MCD_OPC_Decode, 150, 19, 102, // Opcode: UADDW2vvv_8h16b
-/* 16298 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 16310
-/* 16302 */ MCD_OPC_CheckPredicate, 0, 132, 115, // Skip to: 45878
-/* 16306 */ MCD_OPC_Decode, 163, 21, 102, // Opcode: USUBL2vvv_8h16b
-/* 16310 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 16341
-/* 16314 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 16317 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16329
-/* 16321 */ MCD_OPC_CheckPredicate, 0, 113, 115, // Skip to: 45878
-/* 16325 */ MCD_OPC_Decode, 134, 19, 107, // Opcode: UADDLP16b8h
-/* 16329 */ MCD_OPC_FilterValue, 1, 105, 115, // Skip to: 45878
-/* 16333 */ MCD_OPC_CheckPredicate, 0, 101, 115, // Skip to: 45878
-/* 16337 */ MCD_OPC_Decode, 166, 15, 116, // Opcode: SQXTUN8h16b
-/* 16341 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 16353
-/* 16345 */ MCD_OPC_CheckPredicate, 0, 89, 115, // Skip to: 45878
-/* 16349 */ MCD_OPC_Decode, 169, 21, 102, // Opcode: USUBW2vvv_8h16b
-/* 16353 */ MCD_OPC_FilterValue, 7, 39, 0, // Skip to: 16396
-/* 16357 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 16360 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16372
-/* 16364 */ MCD_OPC_CheckPredicate, 0, 70, 115, // Skip to: 45878
-/* 16368 */ MCD_OPC_Decode, 142, 21, 116, // Opcode: USQADD16b
-/* 16372 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 16384
-/* 16376 */ MCD_OPC_CheckPredicate, 0, 58, 115, // Skip to: 45878
-/* 16380 */ MCD_OPC_Decode, 248, 12, 101, // Opcode: SHLL16b8h
-/* 16384 */ MCD_OPC_FilterValue, 16, 50, 115, // Skip to: 45878
-/* 16388 */ MCD_OPC_CheckPredicate, 0, 46, 115, // Skip to: 45878
-/* 16392 */ MCD_OPC_Decode, 141, 19, 121, // Opcode: UADDLV_1h16b
-/* 16396 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 16408
-/* 16400 */ MCD_OPC_CheckPredicate, 0, 34, 115, // Skip to: 45878
-/* 16404 */ MCD_OPC_Decode, 237, 11, 110, // Opcode: RADDHN2vvv_16b8h
-/* 16408 */ MCD_OPC_FilterValue, 9, 27, 0, // Skip to: 16439
-/* 16412 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 16415 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16427
-/* 16419 */ MCD_OPC_CheckPredicate, 0, 15, 115, // Skip to: 45878
-/* 16423 */ MCD_OPC_Decode, 130, 2, 107, // Opcode: CLZ16b
-/* 16427 */ MCD_OPC_FilterValue, 1, 7, 115, // Skip to: 45878
-/* 16431 */ MCD_OPC_CheckPredicate, 0, 3, 115, // Skip to: 45878
-/* 16435 */ MCD_OPC_Decode, 209, 20, 116, // Opcode: UQXTN8h16b
-/* 16439 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 16451
-/* 16443 */ MCD_OPC_CheckPredicate, 0, 247, 114, // Skip to: 45878
-/* 16447 */ MCD_OPC_Decode, 231, 18, 110, // Opcode: UABAL2vvv_8h8b
-/* 16451 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 16469
-/* 16455 */ MCD_OPC_CheckPredicate, 0, 235, 114, // Skip to: 45878
-/* 16459 */ MCD_OPC_CheckField, 16, 5, 0, 229, 114, // Skip to: 45878
-/* 16465 */ MCD_OPC_Decode, 186, 11, 107, // Opcode: NOT16b
-/* 16469 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 16481
-/* 16473 */ MCD_OPC_CheckPredicate, 0, 217, 114, // Skip to: 45878
-/* 16477 */ MCD_OPC_Decode, 146, 12, 110, // Opcode: RSUBHN2vvv_16b8h
-/* 16481 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 16499
-/* 16485 */ MCD_OPC_CheckPredicate, 0, 205, 114, // Skip to: 45878
-/* 16489 */ MCD_OPC_CheckField, 16, 5, 0, 199, 114, // Skip to: 45878
-/* 16495 */ MCD_OPC_Decode, 253, 18, 116, // Opcode: UADALP16b8h
-/* 16499 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 16511
-/* 16503 */ MCD_OPC_CheckPredicate, 0, 187, 114, // Skip to: 45878
-/* 16507 */ MCD_OPC_Decode, 243, 18, 102, // Opcode: UABDL2vvv_8h8b
-/* 16511 */ MCD_OPC_FilterValue, 15, 179, 114, // Skip to: 45878
-/* 16515 */ MCD_OPC_CheckPredicate, 0, 175, 114, // Skip to: 45878
-/* 16519 */ MCD_OPC_CheckField, 16, 5, 0, 169, 114, // Skip to: 45878
-/* 16525 */ MCD_OPC_Decode, 177, 14, 107, // Opcode: SQNEG16b
-/* 16529 */ MCD_OPC_FilterValue, 1, 161, 114, // Skip to: 45878
-/* 16533 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ...
-/* 16536 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16554
-/* 16540 */ MCD_OPC_CheckPredicate, 0, 150, 114, // Skip to: 45878
-/* 16544 */ MCD_OPC_CheckField, 21, 1, 1, 144, 114, // Skip to: 45878
-/* 16550 */ MCD_OPC_Decode, 226, 19, 110, // Opcode: UMLAL2vvv_8h16b
-/* 16554 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 16585
-/* 16558 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 16561 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 16573
-/* 16565 */ MCD_OPC_CheckPredicate, 0, 125, 114, // Skip to: 45878
-/* 16569 */ MCD_OPC_Decode, 156, 2, 107, // Opcode: CMGEvvi_16B
-/* 16573 */ MCD_OPC_FilterValue, 33, 117, 114, // Skip to: 45878
-/* 16577 */ MCD_OPC_CheckPredicate, 0, 113, 114, // Skip to: 45878
-/* 16581 */ MCD_OPC_Decode, 157, 6, 107, // Opcode: FRINTA_4s
-/* 16585 */ MCD_OPC_FilterValue, 3, 27, 0, // Skip to: 16616
-/* 16589 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 16592 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 16604
-/* 16596 */ MCD_OPC_CheckPredicate, 0, 94, 114, // Skip to: 45878
-/* 16600 */ MCD_OPC_Decode, 203, 2, 107, // Opcode: CMLEvvi_16B
-/* 16604 */ MCD_OPC_FilterValue, 33, 86, 114, // Skip to: 45878
-/* 16608 */ MCD_OPC_CheckPredicate, 0, 82, 114, // Skip to: 45878
-/* 16612 */ MCD_OPC_Decode, 182, 6, 107, // Opcode: FRINTX_4s
-/* 16616 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 16634
-/* 16620 */ MCD_OPC_CheckPredicate, 0, 70, 114, // Skip to: 45878
-/* 16624 */ MCD_OPC_CheckField, 21, 1, 1, 64, 114, // Skip to: 45878
-/* 16630 */ MCD_OPC_Decode, 236, 19, 110, // Opcode: UMLSL2vvv_8h16b
-/* 16634 */ MCD_OPC_FilterValue, 5, 39, 0, // Skip to: 16677
-/* 16638 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 16641 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 16653
-/* 16645 */ MCD_OPC_CheckPredicate, 0, 45, 114, // Skip to: 45878
-/* 16649 */ MCD_OPC_Decode, 222, 4, 107, // Opcode: FCVTNU_4s
-/* 16653 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 16665
-/* 16657 */ MCD_OPC_CheckPredicate, 0, 33, 114, // Skip to: 45878
-/* 16661 */ MCD_OPC_Decode, 196, 19, 127, // Opcode: UMAXV_1b16b
-/* 16665 */ MCD_OPC_FilterValue, 49, 25, 114, // Skip to: 45878
-/* 16669 */ MCD_OPC_CheckPredicate, 0, 21, 114, // Skip to: 45878
-/* 16673 */ MCD_OPC_Decode, 213, 19, 127, // Opcode: UMINV_1b16b
-/* 16677 */ MCD_OPC_FilterValue, 7, 27, 0, // Skip to: 16708
-/* 16681 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 16684 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 16696
-/* 16688 */ MCD_OPC_CheckPredicate, 0, 2, 114, // Skip to: 45878
-/* 16692 */ MCD_OPC_Decode, 178, 11, 107, // Opcode: NEG16b
-/* 16696 */ MCD_OPC_FilterValue, 33, 250, 113, // Skip to: 45878
-/* 16700 */ MCD_OPC_CheckPredicate, 0, 246, 113, // Skip to: 45878
-/* 16704 */ MCD_OPC_Decode, 200, 4, 107, // Opcode: FCVTMU_4s
-/* 16708 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 16726
-/* 16712 */ MCD_OPC_CheckPredicate, 0, 234, 113, // Skip to: 45878
-/* 16716 */ MCD_OPC_CheckField, 21, 1, 1, 228, 113, // Skip to: 45878
-/* 16722 */ MCD_OPC_Decode, 252, 19, 102, // Opcode: UMULL2vvv_8h16b
-/* 16726 */ MCD_OPC_FilterValue, 9, 28, 0, // Skip to: 16758
-/* 16730 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 16733 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 16745
-/* 16737 */ MCD_OPC_CheckPredicate, 0, 209, 113, // Skip to: 45878
-/* 16741 */ MCD_OPC_Decode, 178, 4, 107, // Opcode: FCVTAU_4s
-/* 16745 */ MCD_OPC_FilterValue, 48, 201, 113, // Skip to: 45878
-/* 16749 */ MCD_OPC_CheckPredicate, 0, 197, 113, // Skip to: 45878
-/* 16753 */ MCD_OPC_Decode, 170, 5, 129, 1, // Opcode: FMAXNMV_1s4s
-/* 16758 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 16776
-/* 16762 */ MCD_OPC_CheckPredicate, 0, 184, 113, // Skip to: 45878
-/* 16766 */ MCD_OPC_CheckField, 16, 6, 33, 178, 113, // Skip to: 45878
-/* 16772 */ MCD_OPC_Decode, 162, 19, 107, // Opcode: UCVTF_4s
-/* 16776 */ MCD_OPC_FilterValue, 15, 170, 113, // Skip to: 45878
-/* 16780 */ MCD_OPC_CheckPredicate, 0, 166, 113, // Skip to: 45878
-/* 16784 */ MCD_OPC_CheckField, 16, 6, 48, 160, 113, // Skip to: 45878
-/* 16790 */ MCD_OPC_Decode, 181, 5, 129, 1, // Opcode: FMAXV_1s4s
-/* 16795 */ MCD_OPC_FilterValue, 1, 151, 113, // Skip to: 45878
-/* 16799 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 16802 */ MCD_OPC_FilterValue, 0, 43, 1, // Skip to: 17105
-/* 16806 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 16809 */ MCD_OPC_FilterValue, 0, 93, 0, // Skip to: 16906
-/* 16813 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
-/* 16816 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 16893
-/* 16820 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
-/* 16823 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 16874
-/* 16827 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ...
-/* 16830 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 16855
-/* 16834 */ MCD_OPC_CheckPredicate, 0, 112, 113, // Skip to: 45878
-/* 16838 */ MCD_OPC_CheckField, 19, 1, 1, 106, 113, // Skip to: 45878
-/* 16844 */ MCD_OPC_CheckField, 11, 3, 0, 100, 113, // Skip to: 45878
-/* 16850 */ MCD_OPC_Decode, 216, 6, 130, 1, // Opcode: INSELd
-/* 16855 */ MCD_OPC_FilterValue, 1, 91, 113, // Skip to: 45878
-/* 16859 */ MCD_OPC_CheckPredicate, 0, 87, 113, // Skip to: 45878
-/* 16863 */ MCD_OPC_CheckField, 11, 2, 0, 81, 113, // Skip to: 45878
-/* 16869 */ MCD_OPC_Decode, 218, 6, 131, 1, // Opcode: INSELs
-/* 16874 */ MCD_OPC_FilterValue, 1, 72, 113, // Skip to: 45878
-/* 16878 */ MCD_OPC_CheckPredicate, 0, 68, 113, // Skip to: 45878
-/* 16882 */ MCD_OPC_CheckField, 11, 1, 0, 62, 113, // Skip to: 45878
-/* 16888 */ MCD_OPC_Decode, 217, 6, 132, 1, // Opcode: INSELh
-/* 16893 */ MCD_OPC_FilterValue, 1, 53, 113, // Skip to: 45878
-/* 16897 */ MCD_OPC_CheckPredicate, 0, 49, 113, // Skip to: 45878
-/* 16901 */ MCD_OPC_Decode, 215, 6, 133, 1, // Opcode: INSELb
-/* 16906 */ MCD_OPC_FilterValue, 1, 40, 113, // Skip to: 45878
-/* 16910 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ...
-/* 16913 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16925
-/* 16917 */ MCD_OPC_CheckPredicate, 0, 29, 113, // Skip to: 45878
-/* 16921 */ MCD_OPC_Decode, 177, 19, 102, // Opcode: UHADDvvv_16B
-/* 16925 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 16937
-/* 16929 */ MCD_OPC_CheckPredicate, 0, 17, 113, // Skip to: 45878
-/* 16933 */ MCD_OPC_Decode, 136, 20, 102, // Opcode: UQADDvvv_16B
-/* 16937 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 16949
-/* 16941 */ MCD_OPC_CheckPredicate, 0, 5, 113, // Skip to: 45878
-/* 16945 */ MCD_OPC_Decode, 216, 20, 102, // Opcode: URHADDvvv_16B
-/* 16949 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 16961
-/* 16953 */ MCD_OPC_CheckPredicate, 0, 249, 112, // Skip to: 45878
-/* 16957 */ MCD_OPC_Decode, 193, 3, 102, // Opcode: EORvvv_16B
-/* 16961 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 16973
-/* 16965 */ MCD_OPC_CheckPredicate, 0, 237, 112, // Skip to: 45878
-/* 16969 */ MCD_OPC_Decode, 183, 19, 102, // Opcode: UHSUBvvv_16B
-/* 16973 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 16985
-/* 16977 */ MCD_OPC_CheckPredicate, 0, 225, 112, // Skip to: 45878
-/* 16981 */ MCD_OPC_Decode, 198, 20, 102, // Opcode: UQSUBvvv_16B
-/* 16985 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 16997
-/* 16989 */ MCD_OPC_CheckPredicate, 0, 213, 112, // Skip to: 45878
-/* 16993 */ MCD_OPC_Decode, 187, 2, 102, // Opcode: CMHIvvv_16B
-/* 16997 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 17009
-/* 17001 */ MCD_OPC_CheckPredicate, 0, 201, 112, // Skip to: 45878
-/* 17005 */ MCD_OPC_Decode, 195, 2, 102, // Opcode: CMHSvvv_16B
-/* 17009 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 17021
-/* 17013 */ MCD_OPC_CheckPredicate, 0, 189, 112, // Skip to: 45878
-/* 17017 */ MCD_OPC_Decode, 255, 20, 102, // Opcode: USHLvvv_16B
-/* 17021 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 17033
-/* 17025 */ MCD_OPC_CheckPredicate, 0, 177, 112, // Skip to: 45878
-/* 17029 */ MCD_OPC_Decode, 178, 20, 102, // Opcode: UQSHLvvv_16B
-/* 17033 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 17045
-/* 17037 */ MCD_OPC_CheckPredicate, 0, 165, 112, // Skip to: 45878
-/* 17041 */ MCD_OPC_Decode, 223, 20, 102, // Opcode: URSHLvvv_16B
-/* 17045 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 17057
-/* 17049 */ MCD_OPC_CheckPredicate, 0, 153, 112, // Skip to: 45878
-/* 17053 */ MCD_OPC_Decode, 147, 20, 102, // Opcode: UQRSHLvvv_16B
-/* 17057 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 17069
-/* 17061 */ MCD_OPC_CheckPredicate, 0, 141, 112, // Skip to: 45878
-/* 17065 */ MCD_OPC_Decode, 201, 19, 102, // Opcode: UMAXvvv_16B
-/* 17069 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 17081
-/* 17073 */ MCD_OPC_CheckPredicate, 0, 129, 112, // Skip to: 45878
-/* 17077 */ MCD_OPC_Decode, 218, 19, 102, // Opcode: UMINvvv_16B
-/* 17081 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 17093
-/* 17085 */ MCD_OPC_CheckPredicate, 0, 117, 112, // Skip to: 45878
-/* 17089 */ MCD_OPC_Decode, 247, 18, 102, // Opcode: UABDvvv_16B
-/* 17093 */ MCD_OPC_FilterValue, 15, 109, 112, // Skip to: 45878
-/* 17097 */ MCD_OPC_CheckPredicate, 0, 105, 112, // Skip to: 45878
-/* 17101 */ MCD_OPC_Decode, 235, 18, 110, // Opcode: UABAvvv_16B
-/* 17105 */ MCD_OPC_FilterValue, 1, 97, 112, // Skip to: 45878
-/* 17109 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ...
-/* 17112 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17130
-/* 17116 */ MCD_OPC_CheckPredicate, 0, 86, 112, // Skip to: 45878
-/* 17120 */ MCD_OPC_CheckField, 21, 1, 1, 80, 112, // Skip to: 45878
-/* 17126 */ MCD_OPC_Decode, 247, 17, 102, // Opcode: SUBvvv_16B
-/* 17130 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17148
-/* 17134 */ MCD_OPC_CheckPredicate, 0, 68, 112, // Skip to: 45878
-/* 17138 */ MCD_OPC_CheckField, 21, 1, 1, 62, 112, // Skip to: 45878
-/* 17144 */ MCD_OPC_Decode, 147, 2, 102, // Opcode: CMEQvvv_16B
-/* 17148 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17166
-/* 17152 */ MCD_OPC_CheckPredicate, 0, 50, 112, // Skip to: 45878
-/* 17156 */ MCD_OPC_CheckField, 21, 1, 1, 44, 112, // Skip to: 45878
-/* 17162 */ MCD_OPC_Decode, 255, 10, 110, // Opcode: MLSvvv_16B
-/* 17166 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 17184
-/* 17170 */ MCD_OPC_CheckPredicate, 0, 32, 112, // Skip to: 45878
-/* 17174 */ MCD_OPC_CheckField, 21, 1, 1, 26, 112, // Skip to: 45878
-/* 17180 */ MCD_OPC_Decode, 218, 11, 102, // Opcode: PMULvvv_16B
-/* 17184 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 17202
-/* 17188 */ MCD_OPC_CheckPredicate, 0, 14, 112, // Skip to: 45878
-/* 17192 */ MCD_OPC_CheckField, 21, 1, 1, 8, 112, // Skip to: 45878
-/* 17198 */ MCD_OPC_Decode, 190, 19, 102, // Opcode: UMAXPvvv_16B
-/* 17202 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 17220
-/* 17206 */ MCD_OPC_CheckPredicate, 0, 252, 111, // Skip to: 45878
-/* 17210 */ MCD_OPC_CheckField, 21, 1, 1, 246, 111, // Skip to: 45878
-/* 17216 */ MCD_OPC_Decode, 207, 19, 102, // Opcode: UMINPvvv_16B
-/* 17220 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 17238
-/* 17224 */ MCD_OPC_CheckPredicate, 0, 234, 111, // Skip to: 45878
-/* 17228 */ MCD_OPC_CheckField, 21, 1, 1, 228, 111, // Skip to: 45878
-/* 17234 */ MCD_OPC_Decode, 169, 5, 102, // Opcode: FMAXNMPvvv_4S
-/* 17238 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 17256
-/* 17242 */ MCD_OPC_CheckPredicate, 0, 216, 111, // Skip to: 45878
-/* 17246 */ MCD_OPC_CheckField, 21, 1, 1, 210, 111, // Skip to: 45878
-/* 17252 */ MCD_OPC_Decode, 233, 3, 102, // Opcode: FADDP_4S
-/* 17256 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 17274
-/* 17260 */ MCD_OPC_CheckPredicate, 0, 198, 111, // Skip to: 45878
-/* 17264 */ MCD_OPC_CheckField, 21, 1, 1, 192, 111, // Skip to: 45878
-/* 17270 */ MCD_OPC_Decode, 131, 6, 102, // Opcode: FMULvvv_4S
-/* 17274 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 17292
-/* 17278 */ MCD_OPC_CheckPredicate, 0, 180, 111, // Skip to: 45878
-/* 17282 */ MCD_OPC_CheckField, 21, 1, 1, 174, 111, // Skip to: 45878
-/* 17288 */ MCD_OPC_Decode, 136, 4, 102, // Opcode: FCMGEvvv_4S
-/* 17292 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 17310
-/* 17296 */ MCD_OPC_CheckPredicate, 0, 162, 111, // Skip to: 45878
-/* 17300 */ MCD_OPC_CheckField, 21, 1, 1, 156, 111, // Skip to: 45878
-/* 17306 */ MCD_OPC_Decode, 225, 3, 102, // Opcode: FACGEvvv_4S
-/* 17310 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 17328
-/* 17314 */ MCD_OPC_CheckPredicate, 0, 144, 111, // Skip to: 45878
-/* 17318 */ MCD_OPC_CheckField, 21, 1, 1, 138, 111, // Skip to: 45878
-/* 17324 */ MCD_OPC_Decode, 180, 5, 102, // Opcode: FMAXPvvv_4S
-/* 17328 */ MCD_OPC_FilterValue, 15, 130, 111, // Skip to: 45878
-/* 17332 */ MCD_OPC_CheckPredicate, 0, 126, 111, // Skip to: 45878
-/* 17336 */ MCD_OPC_CheckField, 21, 1, 1, 120, 111, // Skip to: 45878
-/* 17342 */ MCD_OPC_Decode, 162, 5, 102, // Opcode: FDIVvvv_4S
-/* 17346 */ MCD_OPC_FilterValue, 9, 128, 18, // Skip to: 22086
-/* 17350 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 17353 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 17432
-/* 17357 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 17360 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17378
-/* 17364 */ MCD_OPC_CheckPredicate, 0, 94, 111, // Skip to: 45878
-/* 17368 */ MCD_OPC_CheckField, 21, 1, 1, 88, 111, // Skip to: 45878
-/* 17374 */ MCD_OPC_Decode, 197, 12, 74, // Opcode: SADDLvvv_4s4h
-/* 17378 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17396
-/* 17382 */ MCD_OPC_CheckPredicate, 0, 76, 111, // Skip to: 45878
-/* 17386 */ MCD_OPC_CheckField, 21, 1, 1, 70, 111, // Skip to: 45878
-/* 17392 */ MCD_OPC_Decode, 146, 19, 74, // Opcode: UADDLvvv_4s4h
-/* 17396 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17414
-/* 17400 */ MCD_OPC_CheckPredicate, 0, 58, 111, // Skip to: 45878
-/* 17404 */ MCD_OPC_CheckField, 21, 1, 1, 52, 111, // Skip to: 45878
-/* 17410 */ MCD_OPC_Decode, 183, 12, 102, // Opcode: SADDL2vvv_4s8h
-/* 17414 */ MCD_OPC_FilterValue, 3, 44, 111, // Skip to: 45878
-/* 17418 */ MCD_OPC_CheckPredicate, 0, 40, 111, // Skip to: 45878
-/* 17422 */ MCD_OPC_CheckField, 21, 1, 1, 34, 111, // Skip to: 45878
-/* 17428 */ MCD_OPC_Decode, 132, 19, 102, // Opcode: UADDL2vvv_4s8h
-/* 17432 */ MCD_OPC_FilterValue, 1, 75, 0, // Skip to: 17511
-/* 17436 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 17439 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17457
-/* 17443 */ MCD_OPC_CheckPredicate, 0, 15, 111, // Skip to: 45878
-/* 17447 */ MCD_OPC_CheckField, 21, 1, 1, 9, 111, // Skip to: 45878
-/* 17453 */ MCD_OPC_Decode, 244, 12, 78, // Opcode: SHADDvvv_4H
-/* 17457 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17475
-/* 17461 */ MCD_OPC_CheckPredicate, 0, 253, 110, // Skip to: 45878
-/* 17465 */ MCD_OPC_CheckField, 21, 1, 1, 247, 110, // Skip to: 45878
-/* 17471 */ MCD_OPC_Decode, 179, 19, 78, // Opcode: UHADDvvv_4H
-/* 17475 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17493
-/* 17479 */ MCD_OPC_CheckPredicate, 0, 235, 110, // Skip to: 45878
-/* 17483 */ MCD_OPC_CheckField, 21, 1, 1, 229, 110, // Skip to: 45878
-/* 17489 */ MCD_OPC_Decode, 247, 12, 102, // Opcode: SHADDvvv_8H
-/* 17493 */ MCD_OPC_FilterValue, 3, 221, 110, // Skip to: 45878
-/* 17497 */ MCD_OPC_CheckPredicate, 0, 217, 110, // Skip to: 45878
-/* 17501 */ MCD_OPC_CheckField, 21, 1, 1, 211, 110, // Skip to: 45878
-/* 17507 */ MCD_OPC_Decode, 182, 19, 102, // Opcode: UHADDvvv_8H
-/* 17511 */ MCD_OPC_FilterValue, 2, 75, 0, // Skip to: 17590
-/* 17515 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 17518 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17536
-/* 17522 */ MCD_OPC_CheckPredicate, 0, 192, 110, // Skip to: 45878
-/* 17526 */ MCD_OPC_CheckField, 16, 6, 32, 186, 110, // Skip to: 45878
-/* 17532 */ MCD_OPC_Decode, 132, 12, 79, // Opcode: REV64_4h
-/* 17536 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17554
-/* 17540 */ MCD_OPC_CheckPredicate, 0, 174, 110, // Skip to: 45878
-/* 17544 */ MCD_OPC_CheckField, 16, 6, 32, 168, 110, // Skip to: 45878
-/* 17550 */ MCD_OPC_Decode, 254, 11, 79, // Opcode: REV32_4h
-/* 17554 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17572
-/* 17558 */ MCD_OPC_CheckPredicate, 0, 156, 110, // Skip to: 45878
-/* 17562 */ MCD_OPC_CheckField, 16, 6, 32, 150, 110, // Skip to: 45878
-/* 17568 */ MCD_OPC_Decode, 135, 12, 107, // Opcode: REV64_8h
-/* 17572 */ MCD_OPC_FilterValue, 3, 142, 110, // Skip to: 45878
-/* 17576 */ MCD_OPC_CheckPredicate, 0, 138, 110, // Skip to: 45878
-/* 17580 */ MCD_OPC_CheckField, 16, 6, 32, 132, 110, // Skip to: 45878
-/* 17586 */ MCD_OPC_Decode, 128, 12, 107, // Opcode: REV32_8h
-/* 17590 */ MCD_OPC_FilterValue, 3, 75, 0, // Skip to: 17669
-/* 17594 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 17597 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17615
-/* 17601 */ MCD_OPC_CheckPredicate, 0, 113, 110, // Skip to: 45878
-/* 17605 */ MCD_OPC_CheckField, 21, 1, 1, 107, 110, // Skip to: 45878
-/* 17611 */ MCD_OPC_Decode, 245, 13, 78, // Opcode: SQADDvvv_4H
-/* 17615 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17633
-/* 17619 */ MCD_OPC_CheckPredicate, 0, 95, 110, // Skip to: 45878
-/* 17623 */ MCD_OPC_CheckField, 21, 1, 1, 89, 110, // Skip to: 45878
-/* 17629 */ MCD_OPC_Decode, 139, 20, 78, // Opcode: UQADDvvv_4H
-/* 17633 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17651
-/* 17637 */ MCD_OPC_CheckPredicate, 0, 77, 110, // Skip to: 45878
-/* 17641 */ MCD_OPC_CheckField, 21, 1, 1, 71, 110, // Skip to: 45878
-/* 17647 */ MCD_OPC_Decode, 248, 13, 102, // Opcode: SQADDvvv_8H
-/* 17651 */ MCD_OPC_FilterValue, 3, 63, 110, // Skip to: 45878
-/* 17655 */ MCD_OPC_CheckPredicate, 0, 59, 110, // Skip to: 45878
-/* 17659 */ MCD_OPC_CheckField, 21, 1, 1, 53, 110, // Skip to: 45878
-/* 17665 */ MCD_OPC_Decode, 142, 20, 102, // Opcode: UQADDvvv_8H
-/* 17669 */ MCD_OPC_FilterValue, 4, 75, 0, // Skip to: 17748
-/* 17673 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 17676 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17694
-/* 17680 */ MCD_OPC_CheckPredicate, 0, 34, 110, // Skip to: 45878
-/* 17684 */ MCD_OPC_CheckField, 21, 1, 1, 28, 110, // Skip to: 45878
-/* 17690 */ MCD_OPC_Decode, 203, 12, 82, // Opcode: SADDWvvv_4s4h
-/* 17694 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17712
-/* 17698 */ MCD_OPC_CheckPredicate, 0, 16, 110, // Skip to: 45878
-/* 17702 */ MCD_OPC_CheckField, 21, 1, 1, 10, 110, // Skip to: 45878
-/* 17708 */ MCD_OPC_Decode, 152, 19, 82, // Opcode: UADDWvvv_4s4h
-/* 17712 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17730
-/* 17716 */ MCD_OPC_CheckPredicate, 0, 254, 109, // Skip to: 45878
-/* 17720 */ MCD_OPC_CheckField, 21, 1, 1, 248, 109, // Skip to: 45878
-/* 17726 */ MCD_OPC_Decode, 200, 12, 102, // Opcode: SADDW2vvv_4s8h
-/* 17730 */ MCD_OPC_FilterValue, 3, 240, 109, // Skip to: 45878
-/* 17734 */ MCD_OPC_CheckPredicate, 0, 236, 109, // Skip to: 45878
-/* 17738 */ MCD_OPC_CheckField, 21, 1, 1, 230, 109, // Skip to: 45878
-/* 17744 */ MCD_OPC_Decode, 149, 19, 102, // Opcode: UADDW2vvv_4s8h
-/* 17748 */ MCD_OPC_FilterValue, 5, 75, 0, // Skip to: 17827
-/* 17752 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 17755 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17773
-/* 17759 */ MCD_OPC_CheckPredicate, 0, 211, 109, // Skip to: 45878
-/* 17763 */ MCD_OPC_CheckField, 21, 1, 1, 205, 109, // Skip to: 45878
-/* 17769 */ MCD_OPC_Decode, 173, 15, 78, // Opcode: SRHADDvvv_4H
-/* 17773 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17791
-/* 17777 */ MCD_OPC_CheckPredicate, 0, 193, 109, // Skip to: 45878
-/* 17781 */ MCD_OPC_CheckField, 21, 1, 1, 187, 109, // Skip to: 45878
-/* 17787 */ MCD_OPC_Decode, 218, 20, 78, // Opcode: URHADDvvv_4H
-/* 17791 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17809
-/* 17795 */ MCD_OPC_CheckPredicate, 0, 175, 109, // Skip to: 45878
-/* 17799 */ MCD_OPC_CheckField, 21, 1, 1, 169, 109, // Skip to: 45878
-/* 17805 */ MCD_OPC_Decode, 176, 15, 102, // Opcode: SRHADDvvv_8H
-/* 17809 */ MCD_OPC_FilterValue, 3, 161, 109, // Skip to: 45878
-/* 17813 */ MCD_OPC_CheckPredicate, 0, 157, 109, // Skip to: 45878
-/* 17817 */ MCD_OPC_CheckField, 21, 1, 1, 151, 109, // Skip to: 45878
-/* 17823 */ MCD_OPC_Decode, 221, 20, 102, // Opcode: URHADDvvv_8H
-/* 17827 */ MCD_OPC_FilterValue, 6, 39, 0, // Skip to: 17870
-/* 17831 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 17834 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17852
-/* 17838 */ MCD_OPC_CheckPredicate, 0, 132, 109, // Skip to: 45878
-/* 17842 */ MCD_OPC_CheckField, 21, 1, 0, 126, 109, // Skip to: 45878
-/* 17848 */ MCD_OPC_Decode, 180, 21, 78, // Opcode: UZP1vvv_4h
-/* 17852 */ MCD_OPC_FilterValue, 2, 118, 109, // Skip to: 45878
-/* 17856 */ MCD_OPC_CheckPredicate, 0, 114, 109, // Skip to: 45878
-/* 17860 */ MCD_OPC_CheckField, 21, 1, 0, 108, 109, // Skip to: 45878
-/* 17866 */ MCD_OPC_Decode, 183, 21, 102, // Opcode: UZP1vvv_8h
-/* 17870 */ MCD_OPC_FilterValue, 7, 75, 0, // Skip to: 17949
-/* 17874 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 17877 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17895
-/* 17881 */ MCD_OPC_CheckPredicate, 0, 89, 109, // Skip to: 45878
-/* 17885 */ MCD_OPC_CheckField, 21, 1, 1, 83, 109, // Skip to: 45878
-/* 17891 */ MCD_OPC_Decode, 216, 1, 78, // Opcode: BICvvv_8B
-/* 17895 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17913
-/* 17899 */ MCD_OPC_CheckPredicate, 0, 71, 109, // Skip to: 45878
-/* 17903 */ MCD_OPC_CheckField, 21, 1, 1, 65, 109, // Skip to: 45878
-/* 17909 */ MCD_OPC_Decode, 234, 1, 98, // Opcode: BSLvvv_8B
-/* 17913 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17931
-/* 17917 */ MCD_OPC_CheckPredicate, 0, 53, 109, // Skip to: 45878
-/* 17921 */ MCD_OPC_CheckField, 21, 1, 1, 47, 109, // Skip to: 45878
-/* 17927 */ MCD_OPC_Decode, 215, 1, 102, // Opcode: BICvvv_16B
-/* 17931 */ MCD_OPC_FilterValue, 3, 39, 109, // Skip to: 45878
-/* 17935 */ MCD_OPC_CheckPredicate, 0, 35, 109, // Skip to: 45878
-/* 17939 */ MCD_OPC_CheckField, 21, 1, 1, 29, 109, // Skip to: 45878
-/* 17945 */ MCD_OPC_Decode, 233, 1, 110, // Opcode: BSLvvv_16B
-/* 17949 */ MCD_OPC_FilterValue, 8, 75, 0, // Skip to: 18028
-/* 17953 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 17956 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17974
-/* 17960 */ MCD_OPC_CheckPredicate, 0, 10, 109, // Skip to: 45878
-/* 17964 */ MCD_OPC_CheckField, 21, 1, 1, 4, 109, // Skip to: 45878
-/* 17970 */ MCD_OPC_Decode, 243, 15, 74, // Opcode: SSUBLvvv_4s4h
-/* 17974 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17992
-/* 17978 */ MCD_OPC_CheckPredicate, 0, 248, 108, // Skip to: 45878
-/* 17982 */ MCD_OPC_CheckField, 21, 1, 1, 242, 108, // Skip to: 45878
-/* 17988 */ MCD_OPC_Decode, 165, 21, 74, // Opcode: USUBLvvv_4s4h
-/* 17992 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18010
-/* 17996 */ MCD_OPC_CheckPredicate, 0, 230, 108, // Skip to: 45878
-/* 18000 */ MCD_OPC_CheckField, 21, 1, 1, 224, 108, // Skip to: 45878
-/* 18006 */ MCD_OPC_Decode, 240, 15, 102, // Opcode: SSUBL2vvv_4s8h
-/* 18010 */ MCD_OPC_FilterValue, 3, 216, 108, // Skip to: 45878
-/* 18014 */ MCD_OPC_CheckPredicate, 0, 212, 108, // Skip to: 45878
-/* 18018 */ MCD_OPC_CheckField, 21, 1, 1, 206, 108, // Skip to: 45878
-/* 18024 */ MCD_OPC_Decode, 162, 21, 102, // Opcode: USUBL2vvv_4s8h
-/* 18028 */ MCD_OPC_FilterValue, 9, 75, 0, // Skip to: 18107
-/* 18032 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 18035 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18053
-/* 18039 */ MCD_OPC_CheckPredicate, 0, 187, 108, // Skip to: 45878
-/* 18043 */ MCD_OPC_CheckField, 21, 1, 1, 181, 108, // Skip to: 45878
-/* 18049 */ MCD_OPC_Decode, 142, 13, 78, // Opcode: SHSUBvvv_4H
-/* 18053 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18071
-/* 18057 */ MCD_OPC_CheckPredicate, 0, 169, 108, // Skip to: 45878
-/* 18061 */ MCD_OPC_CheckField, 21, 1, 1, 163, 108, // Skip to: 45878
-/* 18067 */ MCD_OPC_Decode, 185, 19, 78, // Opcode: UHSUBvvv_4H
-/* 18071 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18089
-/* 18075 */ MCD_OPC_CheckPredicate, 0, 151, 108, // Skip to: 45878
-/* 18079 */ MCD_OPC_CheckField, 21, 1, 1, 145, 108, // Skip to: 45878
-/* 18085 */ MCD_OPC_Decode, 145, 13, 102, // Opcode: SHSUBvvv_8H
-/* 18089 */ MCD_OPC_FilterValue, 3, 137, 108, // Skip to: 45878
-/* 18093 */ MCD_OPC_CheckPredicate, 0, 133, 108, // Skip to: 45878
-/* 18097 */ MCD_OPC_CheckField, 21, 1, 1, 127, 108, // Skip to: 45878
-/* 18103 */ MCD_OPC_Decode, 188, 19, 102, // Opcode: UHSUBvvv_8H
-/* 18107 */ MCD_OPC_FilterValue, 10, 165, 0, // Skip to: 18276
-/* 18111 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 18114 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 18164
-/* 18118 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 18121 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18133
-/* 18125 */ MCD_OPC_CheckPredicate, 0, 101, 108, // Skip to: 45878
-/* 18129 */ MCD_OPC_Decode, 210, 18, 78, // Opcode: TRN1vvv_4h
-/* 18133 */ MCD_OPC_FilterValue, 1, 93, 108, // Skip to: 45878
-/* 18137 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 18140 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18152
-/* 18144 */ MCD_OPC_CheckPredicate, 0, 82, 108, // Skip to: 45878
-/* 18148 */ MCD_OPC_Decode, 187, 12, 79, // Opcode: SADDLP4h2s
-/* 18152 */ MCD_OPC_FilterValue, 1, 74, 108, // Skip to: 45878
-/* 18156 */ MCD_OPC_CheckPredicate, 0, 70, 108, // Skip to: 45878
-/* 18160 */ MCD_OPC_Decode, 205, 21, 84, // Opcode: XTN4s4h
-/* 18164 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 18195
-/* 18168 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 18171 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18183
-/* 18175 */ MCD_OPC_CheckPredicate, 0, 51, 108, // Skip to: 45878
-/* 18179 */ MCD_OPC_Decode, 136, 19, 79, // Opcode: UADDLP4h2s
-/* 18183 */ MCD_OPC_FilterValue, 33, 43, 108, // Skip to: 45878
-/* 18187 */ MCD_OPC_CheckPredicate, 0, 39, 108, // Skip to: 45878
-/* 18191 */ MCD_OPC_Decode, 164, 15, 84, // Opcode: SQXTUN4s4h
-/* 18195 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 18245
-/* 18199 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 18202 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18214
-/* 18206 */ MCD_OPC_CheckPredicate, 0, 20, 108, // Skip to: 45878
-/* 18210 */ MCD_OPC_Decode, 213, 18, 102, // Opcode: TRN1vvv_8h
-/* 18214 */ MCD_OPC_FilterValue, 1, 12, 108, // Skip to: 45878
-/* 18218 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 18221 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18233
-/* 18225 */ MCD_OPC_CheckPredicate, 0, 1, 108, // Skip to: 45878
-/* 18229 */ MCD_OPC_Decode, 190, 12, 107, // Opcode: SADDLP8h4s
-/* 18233 */ MCD_OPC_FilterValue, 1, 249, 107, // Skip to: 45878
-/* 18237 */ MCD_OPC_CheckPredicate, 0, 245, 107, // Skip to: 45878
-/* 18241 */ MCD_OPC_Decode, 206, 21, 116, // Opcode: XTN4s8h
-/* 18245 */ MCD_OPC_FilterValue, 3, 237, 107, // Skip to: 45878
-/* 18249 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 18252 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18264
-/* 18256 */ MCD_OPC_CheckPredicate, 0, 226, 107, // Skip to: 45878
-/* 18260 */ MCD_OPC_Decode, 139, 19, 107, // Opcode: UADDLP8h4s
-/* 18264 */ MCD_OPC_FilterValue, 33, 218, 107, // Skip to: 45878
-/* 18268 */ MCD_OPC_CheckPredicate, 0, 214, 107, // Skip to: 45878
-/* 18272 */ MCD_OPC_Decode, 165, 15, 116, // Opcode: SQXTUN4s8h
-/* 18276 */ MCD_OPC_FilterValue, 11, 75, 0, // Skip to: 18355
-/* 18280 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 18283 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18301
-/* 18287 */ MCD_OPC_CheckPredicate, 0, 195, 107, // Skip to: 45878
-/* 18291 */ MCD_OPC_CheckField, 21, 1, 1, 189, 107, // Skip to: 45878
-/* 18297 */ MCD_OPC_Decode, 149, 15, 78, // Opcode: SQSUBvvv_4H
-/* 18301 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18319
-/* 18305 */ MCD_OPC_CheckPredicate, 0, 177, 107, // Skip to: 45878
-/* 18309 */ MCD_OPC_CheckField, 21, 1, 1, 171, 107, // Skip to: 45878
-/* 18315 */ MCD_OPC_Decode, 201, 20, 78, // Opcode: UQSUBvvv_4H
-/* 18319 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18337
-/* 18323 */ MCD_OPC_CheckPredicate, 0, 159, 107, // Skip to: 45878
-/* 18327 */ MCD_OPC_CheckField, 21, 1, 1, 153, 107, // Skip to: 45878
-/* 18333 */ MCD_OPC_Decode, 152, 15, 102, // Opcode: SQSUBvvv_8H
-/* 18337 */ MCD_OPC_FilterValue, 3, 145, 107, // Skip to: 45878
-/* 18341 */ MCD_OPC_CheckPredicate, 0, 141, 107, // Skip to: 45878
-/* 18345 */ MCD_OPC_CheckField, 21, 1, 1, 135, 107, // Skip to: 45878
-/* 18351 */ MCD_OPC_Decode, 204, 20, 102, // Opcode: UQSUBvvv_8H
-/* 18355 */ MCD_OPC_FilterValue, 12, 75, 0, // Skip to: 18434
-/* 18359 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 18362 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18380
-/* 18366 */ MCD_OPC_CheckPredicate, 0, 116, 107, // Skip to: 45878
-/* 18370 */ MCD_OPC_CheckField, 21, 1, 1, 110, 107, // Skip to: 45878
-/* 18376 */ MCD_OPC_Decode, 249, 15, 82, // Opcode: SSUBWvvv_4s4h
-/* 18380 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18398
-/* 18384 */ MCD_OPC_CheckPredicate, 0, 98, 107, // Skip to: 45878
-/* 18388 */ MCD_OPC_CheckField, 21, 1, 1, 92, 107, // Skip to: 45878
-/* 18394 */ MCD_OPC_Decode, 171, 21, 82, // Opcode: USUBWvvv_4s4h
-/* 18398 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18416
-/* 18402 */ MCD_OPC_CheckPredicate, 0, 80, 107, // Skip to: 45878
-/* 18406 */ MCD_OPC_CheckField, 21, 1, 1, 74, 107, // Skip to: 45878
-/* 18412 */ MCD_OPC_Decode, 246, 15, 102, // Opcode: SSUBW2vvv_4s8h
-/* 18416 */ MCD_OPC_FilterValue, 3, 66, 107, // Skip to: 45878
-/* 18420 */ MCD_OPC_CheckPredicate, 0, 62, 107, // Skip to: 45878
-/* 18424 */ MCD_OPC_CheckField, 21, 1, 1, 56, 107, // Skip to: 45878
-/* 18430 */ MCD_OPC_Decode, 168, 21, 102, // Opcode: USUBW2vvv_4s8h
-/* 18434 */ MCD_OPC_FilterValue, 13, 75, 0, // Skip to: 18513
-/* 18438 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 18441 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18459
-/* 18445 */ MCD_OPC_CheckPredicate, 0, 37, 107, // Skip to: 45878
-/* 18449 */ MCD_OPC_CheckField, 21, 1, 1, 31, 107, // Skip to: 45878
-/* 18455 */ MCD_OPC_Decode, 182, 2, 78, // Opcode: CMGTvvv_4H
-/* 18459 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18477
-/* 18463 */ MCD_OPC_CheckPredicate, 0, 19, 107, // Skip to: 45878
-/* 18467 */ MCD_OPC_CheckField, 21, 1, 1, 13, 107, // Skip to: 45878
-/* 18473 */ MCD_OPC_Decode, 190, 2, 78, // Opcode: CMHIvvv_4H
-/* 18477 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18495
-/* 18481 */ MCD_OPC_CheckPredicate, 0, 1, 107, // Skip to: 45878
-/* 18485 */ MCD_OPC_CheckField, 21, 1, 1, 251, 106, // Skip to: 45878
-/* 18491 */ MCD_OPC_Decode, 185, 2, 102, // Opcode: CMGTvvv_8H
-/* 18495 */ MCD_OPC_FilterValue, 3, 243, 106, // Skip to: 45878
-/* 18499 */ MCD_OPC_CheckPredicate, 0, 239, 106, // Skip to: 45878
-/* 18503 */ MCD_OPC_CheckField, 21, 1, 1, 233, 106, // Skip to: 45878
-/* 18509 */ MCD_OPC_Decode, 193, 2, 102, // Opcode: CMHIvvv_8H
-/* 18513 */ MCD_OPC_FilterValue, 14, 193, 0, // Skip to: 18710
-/* 18517 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 18520 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 18571
-/* 18524 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 18527 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18539
-/* 18531 */ MCD_OPC_CheckPredicate, 0, 207, 106, // Skip to: 45878
-/* 18535 */ MCD_OPC_Decode, 212, 21, 78, // Opcode: ZIP1vvv_4h
-/* 18539 */ MCD_OPC_FilterValue, 1, 199, 106, // Skip to: 45878
-/* 18543 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 18546 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18558
-/* 18550 */ MCD_OPC_CheckPredicate, 0, 188, 106, // Skip to: 45878
-/* 18554 */ MCD_OPC_Decode, 163, 18, 88, // Opcode: SUQADD4h
-/* 18558 */ MCD_OPC_FilterValue, 16, 180, 106, // Skip to: 45878
-/* 18562 */ MCD_OPC_CheckPredicate, 0, 176, 106, // Skip to: 45878
-/* 18566 */ MCD_OPC_Decode, 194, 12, 134, 1, // Opcode: SADDLV_1s4h
-/* 18571 */ MCD_OPC_FilterValue, 1, 40, 0, // Skip to: 18615
-/* 18575 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 18578 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18590
-/* 18582 */ MCD_OPC_CheckPredicate, 0, 156, 106, // Skip to: 45878
-/* 18586 */ MCD_OPC_Decode, 145, 21, 88, // Opcode: USQADD4h
-/* 18590 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 18602
-/* 18594 */ MCD_OPC_CheckPredicate, 0, 144, 106, // Skip to: 45878
-/* 18598 */ MCD_OPC_Decode, 250, 12, 101, // Opcode: SHLL4h4s
-/* 18602 */ MCD_OPC_FilterValue, 48, 136, 106, // Skip to: 45878
-/* 18606 */ MCD_OPC_CheckPredicate, 0, 132, 106, // Skip to: 45878
-/* 18610 */ MCD_OPC_Decode, 143, 19, 134, 1, // Opcode: UADDLV_1s4h
-/* 18615 */ MCD_OPC_FilterValue, 2, 47, 0, // Skip to: 18666
-/* 18619 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 18622 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18634
-/* 18626 */ MCD_OPC_CheckPredicate, 0, 112, 106, // Skip to: 45878
-/* 18630 */ MCD_OPC_Decode, 215, 21, 102, // Opcode: ZIP1vvv_8h
-/* 18634 */ MCD_OPC_FilterValue, 1, 104, 106, // Skip to: 45878
-/* 18638 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 18641 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18653
-/* 18645 */ MCD_OPC_CheckPredicate, 0, 93, 106, // Skip to: 45878
-/* 18649 */ MCD_OPC_Decode, 166, 18, 116, // Opcode: SUQADD8h
-/* 18653 */ MCD_OPC_FilterValue, 16, 85, 106, // Skip to: 45878
-/* 18657 */ MCD_OPC_CheckPredicate, 0, 81, 106, // Skip to: 45878
-/* 18661 */ MCD_OPC_Decode, 195, 12, 129, 1, // Opcode: SADDLV_1s8h
-/* 18666 */ MCD_OPC_FilterValue, 3, 72, 106, // Skip to: 45878
-/* 18670 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 18673 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18685
-/* 18677 */ MCD_OPC_CheckPredicate, 0, 61, 106, // Skip to: 45878
-/* 18681 */ MCD_OPC_Decode, 148, 21, 116, // Opcode: USQADD8h
-/* 18685 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 18697
-/* 18689 */ MCD_OPC_CheckPredicate, 0, 49, 106, // Skip to: 45878
-/* 18693 */ MCD_OPC_Decode, 253, 12, 101, // Opcode: SHLL8h4s
-/* 18697 */ MCD_OPC_FilterValue, 48, 41, 106, // Skip to: 45878
-/* 18701 */ MCD_OPC_CheckPredicate, 0, 37, 106, // Skip to: 45878
-/* 18705 */ MCD_OPC_Decode, 144, 19, 129, 1, // Opcode: UADDLV_1s8h
-/* 18710 */ MCD_OPC_FilterValue, 15, 75, 0, // Skip to: 18789
-/* 18714 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 18717 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18735
-/* 18721 */ MCD_OPC_CheckPredicate, 0, 17, 106, // Skip to: 45878
-/* 18725 */ MCD_OPC_CheckField, 21, 1, 1, 11, 106, // Skip to: 45878
-/* 18731 */ MCD_OPC_Decode, 166, 2, 78, // Opcode: CMGEvvv_4H
-/* 18735 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18753
-/* 18739 */ MCD_OPC_CheckPredicate, 0, 255, 105, // Skip to: 45878
-/* 18743 */ MCD_OPC_CheckField, 21, 1, 1, 249, 105, // Skip to: 45878
-/* 18749 */ MCD_OPC_Decode, 198, 2, 78, // Opcode: CMHSvvv_4H
-/* 18753 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18771
-/* 18757 */ MCD_OPC_CheckPredicate, 0, 237, 105, // Skip to: 45878
-/* 18761 */ MCD_OPC_CheckField, 21, 1, 1, 231, 105, // Skip to: 45878
-/* 18767 */ MCD_OPC_Decode, 169, 2, 102, // Opcode: CMGEvvv_8H
-/* 18771 */ MCD_OPC_FilterValue, 3, 223, 105, // Skip to: 45878
-/* 18775 */ MCD_OPC_CheckPredicate, 0, 219, 105, // Skip to: 45878
-/* 18779 */ MCD_OPC_CheckField, 21, 1, 1, 213, 105, // Skip to: 45878
-/* 18785 */ MCD_OPC_Decode, 201, 2, 102, // Opcode: CMHSvvv_8H
-/* 18789 */ MCD_OPC_FilterValue, 16, 73, 0, // Skip to: 18866
-/* 18793 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 18796 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 18813
-/* 18800 */ MCD_OPC_CheckPredicate, 0, 194, 105, // Skip to: 45878
-/* 18804 */ MCD_OPC_CheckField, 21, 1, 1, 188, 105, // Skip to: 45878
-/* 18810 */ MCD_OPC_Decode, 35, 92, // Opcode: ADDHNvvv_4h4s
-/* 18813 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18831
-/* 18817 */ MCD_OPC_CheckPredicate, 0, 177, 105, // Skip to: 45878
-/* 18821 */ MCD_OPC_CheckField, 21, 1, 1, 171, 105, // Skip to: 45878
-/* 18827 */ MCD_OPC_Decode, 241, 11, 92, // Opcode: RADDHNvvv_4h4s
-/* 18831 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 18848
-/* 18835 */ MCD_OPC_CheckPredicate, 0, 159, 105, // Skip to: 45878
-/* 18839 */ MCD_OPC_CheckField, 21, 1, 1, 153, 105, // Skip to: 45878
-/* 18845 */ MCD_OPC_Decode, 33, 110, // Opcode: ADDHN2vvv_8h4s
-/* 18848 */ MCD_OPC_FilterValue, 3, 146, 105, // Skip to: 45878
-/* 18852 */ MCD_OPC_CheckPredicate, 0, 142, 105, // Skip to: 45878
-/* 18856 */ MCD_OPC_CheckField, 21, 1, 1, 136, 105, // Skip to: 45878
-/* 18862 */ MCD_OPC_Decode, 239, 11, 110, // Opcode: RADDHN2vvv_8h4s
-/* 18866 */ MCD_OPC_FilterValue, 17, 75, 0, // Skip to: 18945
-/* 18870 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 18873 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18891
-/* 18877 */ MCD_OPC_CheckPredicate, 0, 117, 105, // Skip to: 45878
-/* 18881 */ MCD_OPC_CheckField, 21, 1, 1, 111, 105, // Skip to: 45878
-/* 18887 */ MCD_OPC_Decode, 219, 15, 78, // Opcode: SSHLvvv_4H
-/* 18891 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18909
-/* 18895 */ MCD_OPC_CheckPredicate, 0, 99, 105, // Skip to: 45878
-/* 18899 */ MCD_OPC_CheckField, 21, 1, 1, 93, 105, // Skip to: 45878
-/* 18905 */ MCD_OPC_Decode, 130, 21, 78, // Opcode: USHLvvv_4H
-/* 18909 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18927
-/* 18913 */ MCD_OPC_CheckPredicate, 0, 81, 105, // Skip to: 45878
-/* 18917 */ MCD_OPC_CheckField, 21, 1, 1, 75, 105, // Skip to: 45878
-/* 18923 */ MCD_OPC_Decode, 222, 15, 102, // Opcode: SSHLvvv_8H
-/* 18927 */ MCD_OPC_FilterValue, 3, 67, 105, // Skip to: 45878
-/* 18931 */ MCD_OPC_CheckPredicate, 0, 63, 105, // Skip to: 45878
-/* 18935 */ MCD_OPC_CheckField, 21, 1, 1, 57, 105, // Skip to: 45878
-/* 18941 */ MCD_OPC_Decode, 133, 21, 102, // Opcode: USHLvvv_8H
-/* 18945 */ MCD_OPC_FilterValue, 18, 127, 0, // Skip to: 19076
-/* 18949 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 18952 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 18983
-/* 18956 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 18959 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18971
-/* 18963 */ MCD_OPC_CheckPredicate, 0, 31, 105, // Skip to: 45878
-/* 18967 */ MCD_OPC_Decode, 252, 1, 79, // Opcode: CLS4h
-/* 18971 */ MCD_OPC_FilterValue, 33, 23, 105, // Skip to: 45878
-/* 18975 */ MCD_OPC_CheckPredicate, 0, 19, 105, // Skip to: 45878
-/* 18979 */ MCD_OPC_Decode, 155, 15, 84, // Opcode: SQXTN4s4h
-/* 18983 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 19014
-/* 18987 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 18990 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19002
-/* 18994 */ MCD_OPC_CheckPredicate, 0, 0, 105, // Skip to: 45878
-/* 18998 */ MCD_OPC_Decode, 132, 2, 79, // Opcode: CLZ4h
-/* 19002 */ MCD_OPC_FilterValue, 33, 248, 104, // Skip to: 45878
-/* 19006 */ MCD_OPC_CheckPredicate, 0, 244, 104, // Skip to: 45878
-/* 19010 */ MCD_OPC_Decode, 207, 20, 84, // Opcode: UQXTN4s4h
-/* 19014 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 19045
-/* 19018 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 19021 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19033
-/* 19025 */ MCD_OPC_CheckPredicate, 0, 225, 104, // Skip to: 45878
-/* 19029 */ MCD_OPC_Decode, 255, 1, 107, // Opcode: CLS8h
-/* 19033 */ MCD_OPC_FilterValue, 33, 217, 104, // Skip to: 45878
-/* 19037 */ MCD_OPC_CheckPredicate, 0, 213, 104, // Skip to: 45878
-/* 19041 */ MCD_OPC_Decode, 156, 15, 116, // Opcode: SQXTN4s8h
-/* 19045 */ MCD_OPC_FilterValue, 3, 205, 104, // Skip to: 45878
-/* 19049 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 19052 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19064
-/* 19056 */ MCD_OPC_CheckPredicate, 0, 194, 104, // Skip to: 45878
-/* 19060 */ MCD_OPC_Decode, 135, 2, 107, // Opcode: CLZ8h
-/* 19064 */ MCD_OPC_FilterValue, 33, 186, 104, // Skip to: 45878
-/* 19068 */ MCD_OPC_CheckPredicate, 0, 182, 104, // Skip to: 45878
-/* 19072 */ MCD_OPC_Decode, 208, 20, 116, // Opcode: UQXTN4s8h
-/* 19076 */ MCD_OPC_FilterValue, 19, 75, 0, // Skip to: 19155
-/* 19080 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19083 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19101
-/* 19087 */ MCD_OPC_CheckPredicate, 0, 163, 104, // Skip to: 45878
-/* 19091 */ MCD_OPC_CheckField, 21, 1, 1, 157, 104, // Skip to: 45878
-/* 19097 */ MCD_OPC_Decode, 254, 14, 78, // Opcode: SQSHLvvv_4H
-/* 19101 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19119
-/* 19105 */ MCD_OPC_CheckPredicate, 0, 145, 104, // Skip to: 45878
-/* 19109 */ MCD_OPC_CheckField, 21, 1, 1, 139, 104, // Skip to: 45878
-/* 19115 */ MCD_OPC_Decode, 181, 20, 78, // Opcode: UQSHLvvv_4H
-/* 19119 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19137
-/* 19123 */ MCD_OPC_CheckPredicate, 0, 127, 104, // Skip to: 45878
-/* 19127 */ MCD_OPC_CheckField, 21, 1, 1, 121, 104, // Skip to: 45878
-/* 19133 */ MCD_OPC_Decode, 129, 15, 102, // Opcode: SQSHLvvv_8H
-/* 19137 */ MCD_OPC_FilterValue, 3, 113, 104, // Skip to: 45878
-/* 19141 */ MCD_OPC_CheckPredicate, 0, 109, 104, // Skip to: 45878
-/* 19145 */ MCD_OPC_CheckField, 21, 1, 1, 103, 104, // Skip to: 45878
-/* 19151 */ MCD_OPC_Decode, 184, 20, 102, // Opcode: UQSHLvvv_8H
-/* 19155 */ MCD_OPC_FilterValue, 20, 75, 0, // Skip to: 19234
-/* 19159 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19162 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19180
-/* 19166 */ MCD_OPC_CheckPredicate, 0, 84, 104, // Skip to: 45878
-/* 19170 */ MCD_OPC_CheckField, 21, 1, 1, 78, 104, // Skip to: 45878
-/* 19176 */ MCD_OPC_Decode, 156, 12, 94, // Opcode: SABALvvv_4s4h
-/* 19180 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19198
-/* 19184 */ MCD_OPC_CheckPredicate, 0, 66, 104, // Skip to: 45878
-/* 19188 */ MCD_OPC_CheckField, 21, 1, 1, 60, 104, // Skip to: 45878
-/* 19194 */ MCD_OPC_Decode, 233, 18, 94, // Opcode: UABALvvv_4s4h
-/* 19198 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19216
-/* 19202 */ MCD_OPC_CheckPredicate, 0, 48, 104, // Skip to: 45878
-/* 19206 */ MCD_OPC_CheckField, 21, 1, 1, 42, 104, // Skip to: 45878
-/* 19212 */ MCD_OPC_Decode, 153, 12, 110, // Opcode: SABAL2vvv_4s4h
-/* 19216 */ MCD_OPC_FilterValue, 3, 34, 104, // Skip to: 45878
-/* 19220 */ MCD_OPC_CheckPredicate, 0, 30, 104, // Skip to: 45878
-/* 19224 */ MCD_OPC_CheckField, 21, 1, 1, 24, 104, // Skip to: 45878
-/* 19230 */ MCD_OPC_Decode, 230, 18, 110, // Opcode: UABAL2vvv_4s4h
-/* 19234 */ MCD_OPC_FilterValue, 21, 75, 0, // Skip to: 19313
-/* 19238 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19241 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19259
-/* 19245 */ MCD_OPC_CheckPredicate, 0, 5, 104, // Skip to: 45878
-/* 19249 */ MCD_OPC_CheckField, 21, 1, 1, 255, 103, // Skip to: 45878
-/* 19255 */ MCD_OPC_Decode, 189, 15, 78, // Opcode: SRSHLvvv_4H
-/* 19259 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19277
-/* 19263 */ MCD_OPC_CheckPredicate, 0, 243, 103, // Skip to: 45878
-/* 19267 */ MCD_OPC_CheckField, 21, 1, 1, 237, 103, // Skip to: 45878
-/* 19273 */ MCD_OPC_Decode, 226, 20, 78, // Opcode: URSHLvvv_4H
-/* 19277 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19295
-/* 19281 */ MCD_OPC_CheckPredicate, 0, 225, 103, // Skip to: 45878
-/* 19285 */ MCD_OPC_CheckField, 21, 1, 1, 219, 103, // Skip to: 45878
-/* 19291 */ MCD_OPC_Decode, 192, 15, 102, // Opcode: SRSHLvvv_8H
-/* 19295 */ MCD_OPC_FilterValue, 3, 211, 103, // Skip to: 45878
-/* 19299 */ MCD_OPC_CheckPredicate, 0, 207, 103, // Skip to: 45878
-/* 19303 */ MCD_OPC_CheckField, 21, 1, 1, 201, 103, // Skip to: 45878
-/* 19309 */ MCD_OPC_Decode, 229, 20, 102, // Opcode: URSHLvvv_8H
-/* 19313 */ MCD_OPC_FilterValue, 22, 75, 0, // Skip to: 19392
-/* 19317 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19320 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19338
-/* 19324 */ MCD_OPC_CheckPredicate, 0, 182, 103, // Skip to: 45878
-/* 19328 */ MCD_OPC_CheckField, 21, 1, 0, 176, 103, // Skip to: 45878
-/* 19334 */ MCD_OPC_Decode, 187, 21, 78, // Opcode: UZP2vvv_4h
-/* 19338 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19356
-/* 19342 */ MCD_OPC_CheckPredicate, 0, 164, 103, // Skip to: 45878
-/* 19346 */ MCD_OPC_CheckField, 16, 6, 32, 158, 103, // Skip to: 45878
-/* 19352 */ MCD_OPC_Decode, 244, 11, 79, // Opcode: RBIT8b
-/* 19356 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19374
-/* 19360 */ MCD_OPC_CheckPredicate, 0, 146, 103, // Skip to: 45878
-/* 19364 */ MCD_OPC_CheckField, 21, 1, 0, 140, 103, // Skip to: 45878
-/* 19370 */ MCD_OPC_Decode, 190, 21, 102, // Opcode: UZP2vvv_8h
-/* 19374 */ MCD_OPC_FilterValue, 3, 132, 103, // Skip to: 45878
-/* 19378 */ MCD_OPC_CheckPredicate, 0, 128, 103, // Skip to: 45878
-/* 19382 */ MCD_OPC_CheckField, 16, 6, 32, 122, 103, // Skip to: 45878
-/* 19388 */ MCD_OPC_Decode, 243, 11, 107, // Opcode: RBIT16b
-/* 19392 */ MCD_OPC_FilterValue, 23, 75, 0, // Skip to: 19471
-/* 19396 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19399 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19417
-/* 19403 */ MCD_OPC_CheckPredicate, 0, 103, 103, // Skip to: 45878
-/* 19407 */ MCD_OPC_CheckField, 21, 1, 1, 97, 103, // Skip to: 45878
-/* 19413 */ MCD_OPC_Decode, 209, 14, 78, // Opcode: SQRSHLvvv_4H
-/* 19417 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19435
-/* 19421 */ MCD_OPC_CheckPredicate, 0, 85, 103, // Skip to: 45878
-/* 19425 */ MCD_OPC_CheckField, 21, 1, 1, 79, 103, // Skip to: 45878
-/* 19431 */ MCD_OPC_Decode, 150, 20, 78, // Opcode: UQRSHLvvv_4H
-/* 19435 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19453
-/* 19439 */ MCD_OPC_CheckPredicate, 0, 67, 103, // Skip to: 45878
-/* 19443 */ MCD_OPC_CheckField, 21, 1, 1, 61, 103, // Skip to: 45878
-/* 19449 */ MCD_OPC_Decode, 212, 14, 102, // Opcode: SQRSHLvvv_8H
-/* 19453 */ MCD_OPC_FilterValue, 3, 53, 103, // Skip to: 45878
-/* 19457 */ MCD_OPC_CheckPredicate, 0, 49, 103, // Skip to: 45878
-/* 19461 */ MCD_OPC_CheckField, 21, 1, 1, 43, 103, // Skip to: 45878
-/* 19467 */ MCD_OPC_Decode, 153, 20, 102, // Opcode: UQRSHLvvv_8H
-/* 19471 */ MCD_OPC_FilterValue, 24, 75, 0, // Skip to: 19550
-/* 19475 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19478 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19496
-/* 19482 */ MCD_OPC_CheckPredicate, 0, 24, 103, // Skip to: 45878
-/* 19486 */ MCD_OPC_CheckField, 21, 1, 1, 18, 103, // Skip to: 45878
-/* 19492 */ MCD_OPC_Decode, 222, 17, 92, // Opcode: SUBHNvvv_4h4s
-/* 19496 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19514
-/* 19500 */ MCD_OPC_CheckPredicate, 0, 6, 103, // Skip to: 45878
-/* 19504 */ MCD_OPC_CheckField, 21, 1, 1, 0, 103, // Skip to: 45878
-/* 19510 */ MCD_OPC_Decode, 150, 12, 92, // Opcode: RSUBHNvvv_4h4s
-/* 19514 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19532
-/* 19518 */ MCD_OPC_CheckPredicate, 0, 244, 102, // Skip to: 45878
-/* 19522 */ MCD_OPC_CheckField, 21, 1, 1, 238, 102, // Skip to: 45878
-/* 19528 */ MCD_OPC_Decode, 220, 17, 110, // Opcode: SUBHN2vvv_8h4s
-/* 19532 */ MCD_OPC_FilterValue, 3, 230, 102, // Skip to: 45878
-/* 19536 */ MCD_OPC_CheckPredicate, 0, 226, 102, // Skip to: 45878
-/* 19540 */ MCD_OPC_CheckField, 21, 1, 1, 220, 102, // Skip to: 45878
-/* 19546 */ MCD_OPC_Decode, 148, 12, 110, // Opcode: RSUBHN2vvv_8h4s
-/* 19550 */ MCD_OPC_FilterValue, 25, 75, 0, // Skip to: 19629
-/* 19554 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19557 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19575
-/* 19561 */ MCD_OPC_CheckPredicate, 0, 201, 102, // Skip to: 45878
-/* 19565 */ MCD_OPC_CheckField, 21, 1, 1, 195, 102, // Skip to: 45878
-/* 19571 */ MCD_OPC_Decode, 168, 13, 78, // Opcode: SMAXvvv_4H
-/* 19575 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19593
-/* 19579 */ MCD_OPC_CheckPredicate, 0, 183, 102, // Skip to: 45878
-/* 19583 */ MCD_OPC_CheckField, 21, 1, 1, 177, 102, // Skip to: 45878
-/* 19589 */ MCD_OPC_Decode, 203, 19, 78, // Opcode: UMAXvvv_4H
-/* 19593 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19611
-/* 19597 */ MCD_OPC_CheckPredicate, 0, 165, 102, // Skip to: 45878
-/* 19601 */ MCD_OPC_CheckField, 21, 1, 1, 159, 102, // Skip to: 45878
-/* 19607 */ MCD_OPC_Decode, 171, 13, 102, // Opcode: SMAXvvv_8H
-/* 19611 */ MCD_OPC_FilterValue, 3, 151, 102, // Skip to: 45878
-/* 19615 */ MCD_OPC_CheckPredicate, 0, 147, 102, // Skip to: 45878
-/* 19619 */ MCD_OPC_CheckField, 21, 1, 1, 141, 102, // Skip to: 45878
-/* 19625 */ MCD_OPC_Decode, 206, 19, 102, // Opcode: UMAXvvv_8H
-/* 19629 */ MCD_OPC_FilterValue, 26, 165, 0, // Skip to: 19798
-/* 19633 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19636 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 19686
-/* 19640 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 19643 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 19655
-/* 19647 */ MCD_OPC_CheckPredicate, 0, 115, 102, // Skip to: 45878
-/* 19651 */ MCD_OPC_Decode, 217, 18, 78, // Opcode: TRN2vvv_4h
-/* 19655 */ MCD_OPC_FilterValue, 1, 107, 102, // Skip to: 45878
-/* 19659 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 19662 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 19674
-/* 19666 */ MCD_OPC_CheckPredicate, 0, 96, 102, // Skip to: 45878
-/* 19670 */ MCD_OPC_Decode, 178, 12, 88, // Opcode: SADALP4h2s
-/* 19674 */ MCD_OPC_FilterValue, 1, 88, 102, // Skip to: 45878
-/* 19678 */ MCD_OPC_CheckPredicate, 0, 84, 102, // Skip to: 45878
-/* 19682 */ MCD_OPC_Decode, 207, 4, 84, // Opcode: FCVTN2d2s
-/* 19686 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 19717
-/* 19690 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 19693 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19705
-/* 19697 */ MCD_OPC_CheckPredicate, 0, 65, 102, // Skip to: 45878
-/* 19701 */ MCD_OPC_Decode, 255, 18, 88, // Opcode: UADALP4h2s
-/* 19705 */ MCD_OPC_FilterValue, 33, 57, 102, // Skip to: 45878
-/* 19709 */ MCD_OPC_CheckPredicate, 0, 53, 102, // Skip to: 45878
-/* 19713 */ MCD_OPC_Decode, 248, 4, 84, // Opcode: FCVTXN2d2s
-/* 19717 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 19767
-/* 19721 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 19724 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 19736
-/* 19728 */ MCD_OPC_CheckPredicate, 0, 34, 102, // Skip to: 45878
-/* 19732 */ MCD_OPC_Decode, 220, 18, 102, // Opcode: TRN2vvv_8h
-/* 19736 */ MCD_OPC_FilterValue, 1, 26, 102, // Skip to: 45878
-/* 19740 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 19743 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 19755
-/* 19747 */ MCD_OPC_CheckPredicate, 0, 15, 102, // Skip to: 45878
-/* 19751 */ MCD_OPC_Decode, 181, 12, 116, // Opcode: SADALP8h4s
-/* 19755 */ MCD_OPC_FilterValue, 1, 7, 102, // Skip to: 45878
-/* 19759 */ MCD_OPC_CheckPredicate, 0, 3, 102, // Skip to: 45878
-/* 19763 */ MCD_OPC_Decode, 208, 4, 116, // Opcode: FCVTN2d4s
-/* 19767 */ MCD_OPC_FilterValue, 3, 251, 101, // Skip to: 45878
-/* 19771 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 19774 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19786
-/* 19778 */ MCD_OPC_CheckPredicate, 0, 240, 101, // Skip to: 45878
-/* 19782 */ MCD_OPC_Decode, 130, 19, 116, // Opcode: UADALP8h4s
-/* 19786 */ MCD_OPC_FilterValue, 33, 232, 101, // Skip to: 45878
-/* 19790 */ MCD_OPC_CheckPredicate, 0, 228, 101, // Skip to: 45878
-/* 19794 */ MCD_OPC_Decode, 249, 4, 116, // Opcode: FCVTXN2d4s
-/* 19798 */ MCD_OPC_FilterValue, 27, 75, 0, // Skip to: 19877
-/* 19802 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19805 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19823
-/* 19809 */ MCD_OPC_CheckPredicate, 0, 209, 101, // Skip to: 45878
-/* 19813 */ MCD_OPC_CheckField, 21, 1, 1, 203, 101, // Skip to: 45878
-/* 19819 */ MCD_OPC_Decode, 186, 13, 78, // Opcode: SMINvvv_4H
-/* 19823 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19841
-/* 19827 */ MCD_OPC_CheckPredicate, 0, 191, 101, // Skip to: 45878
-/* 19831 */ MCD_OPC_CheckField, 21, 1, 1, 185, 101, // Skip to: 45878
-/* 19837 */ MCD_OPC_Decode, 220, 19, 78, // Opcode: UMINvvv_4H
-/* 19841 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19859
-/* 19845 */ MCD_OPC_CheckPredicate, 0, 173, 101, // Skip to: 45878
-/* 19849 */ MCD_OPC_CheckField, 21, 1, 1, 167, 101, // Skip to: 45878
-/* 19855 */ MCD_OPC_Decode, 189, 13, 102, // Opcode: SMINvvv_8H
-/* 19859 */ MCD_OPC_FilterValue, 3, 159, 101, // Skip to: 45878
-/* 19863 */ MCD_OPC_CheckPredicate, 0, 155, 101, // Skip to: 45878
-/* 19867 */ MCD_OPC_CheckField, 21, 1, 1, 149, 101, // Skip to: 45878
-/* 19873 */ MCD_OPC_Decode, 223, 19, 102, // Opcode: UMINvvv_8H
-/* 19877 */ MCD_OPC_FilterValue, 28, 75, 0, // Skip to: 19956
-/* 19881 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19884 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19902
-/* 19888 */ MCD_OPC_CheckPredicate, 0, 130, 101, // Skip to: 45878
-/* 19892 */ MCD_OPC_CheckField, 21, 1, 1, 124, 101, // Skip to: 45878
-/* 19898 */ MCD_OPC_Decode, 168, 12, 74, // Opcode: SABDLvvv_4s4h
-/* 19902 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19920
-/* 19906 */ MCD_OPC_CheckPredicate, 0, 112, 101, // Skip to: 45878
-/* 19910 */ MCD_OPC_CheckField, 21, 1, 1, 106, 101, // Skip to: 45878
-/* 19916 */ MCD_OPC_Decode, 245, 18, 74, // Opcode: UABDLvvv_4s4h
-/* 19920 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19938
-/* 19924 */ MCD_OPC_CheckPredicate, 0, 94, 101, // Skip to: 45878
-/* 19928 */ MCD_OPC_CheckField, 21, 1, 1, 88, 101, // Skip to: 45878
-/* 19934 */ MCD_OPC_Decode, 165, 12, 102, // Opcode: SABDL2vvv_4s4h
-/* 19938 */ MCD_OPC_FilterValue, 3, 80, 101, // Skip to: 45878
-/* 19942 */ MCD_OPC_CheckPredicate, 0, 76, 101, // Skip to: 45878
-/* 19946 */ MCD_OPC_CheckField, 21, 1, 1, 70, 101, // Skip to: 45878
-/* 19952 */ MCD_OPC_Decode, 242, 18, 102, // Opcode: UABDL2vvv_4s4h
-/* 19956 */ MCD_OPC_FilterValue, 29, 75, 0, // Skip to: 20035
-/* 19960 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 19963 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19981
-/* 19967 */ MCD_OPC_CheckPredicate, 0, 51, 101, // Skip to: 45878
-/* 19971 */ MCD_OPC_CheckField, 21, 1, 1, 45, 101, // Skip to: 45878
-/* 19977 */ MCD_OPC_Decode, 172, 12, 78, // Opcode: SABDvvv_4H
-/* 19981 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19999
-/* 19985 */ MCD_OPC_CheckPredicate, 0, 33, 101, // Skip to: 45878
-/* 19989 */ MCD_OPC_CheckField, 21, 1, 1, 27, 101, // Skip to: 45878
-/* 19995 */ MCD_OPC_Decode, 249, 18, 78, // Opcode: UABDvvv_4H
-/* 19999 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20017
-/* 20003 */ MCD_OPC_CheckPredicate, 0, 15, 101, // Skip to: 45878
-/* 20007 */ MCD_OPC_CheckField, 21, 1, 1, 9, 101, // Skip to: 45878
-/* 20013 */ MCD_OPC_Decode, 175, 12, 102, // Opcode: SABDvvv_8H
-/* 20017 */ MCD_OPC_FilterValue, 3, 1, 101, // Skip to: 45878
-/* 20021 */ MCD_OPC_CheckPredicate, 0, 253, 100, // Skip to: 45878
-/* 20025 */ MCD_OPC_CheckField, 21, 1, 1, 247, 100, // Skip to: 45878
-/* 20031 */ MCD_OPC_Decode, 252, 18, 102, // Opcode: UABDvvv_8H
-/* 20035 */ MCD_OPC_FilterValue, 30, 139, 0, // Skip to: 20178
-/* 20039 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20042 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 20092
-/* 20046 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 20049 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 20061
-/* 20053 */ MCD_OPC_CheckPredicate, 0, 221, 100, // Skip to: 45878
-/* 20057 */ MCD_OPC_Decode, 219, 21, 78, // Opcode: ZIP2vvv_4h
-/* 20061 */ MCD_OPC_FilterValue, 1, 213, 100, // Skip to: 45878
-/* 20065 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 20068 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 20080
-/* 20072 */ MCD_OPC_CheckPredicate, 0, 202, 100, // Skip to: 45878
-/* 20076 */ MCD_OPC_Decode, 230, 13, 79, // Opcode: SQABS4h
-/* 20080 */ MCD_OPC_FilterValue, 1, 194, 100, // Skip to: 45878
-/* 20084 */ MCD_OPC_CheckPredicate, 0, 190, 100, // Skip to: 45878
-/* 20088 */ MCD_OPC_Decode, 185, 4, 97, // Opcode: FCVTL2s2d
-/* 20092 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20110
-/* 20096 */ MCD_OPC_CheckPredicate, 0, 178, 100, // Skip to: 45878
-/* 20100 */ MCD_OPC_CheckField, 16, 6, 32, 172, 100, // Skip to: 45878
-/* 20106 */ MCD_OPC_Decode, 180, 14, 79, // Opcode: SQNEG4h
-/* 20110 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 20160
-/* 20114 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 20117 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 20129
-/* 20121 */ MCD_OPC_CheckPredicate, 0, 153, 100, // Skip to: 45878
-/* 20125 */ MCD_OPC_Decode, 222, 21, 102, // Opcode: ZIP2vvv_8h
-/* 20129 */ MCD_OPC_FilterValue, 1, 145, 100, // Skip to: 45878
-/* 20133 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 20136 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 20148
-/* 20140 */ MCD_OPC_CheckPredicate, 0, 134, 100, // Skip to: 45878
-/* 20144 */ MCD_OPC_Decode, 233, 13, 107, // Opcode: SQABS8h
-/* 20148 */ MCD_OPC_FilterValue, 1, 126, 100, // Skip to: 45878
-/* 20152 */ MCD_OPC_CheckPredicate, 0, 122, 100, // Skip to: 45878
-/* 20156 */ MCD_OPC_Decode, 187, 4, 107, // Opcode: FCVTL4s2d
-/* 20160 */ MCD_OPC_FilterValue, 3, 114, 100, // Skip to: 45878
-/* 20164 */ MCD_OPC_CheckPredicate, 0, 110, 100, // Skip to: 45878
-/* 20168 */ MCD_OPC_CheckField, 16, 6, 32, 104, 100, // Skip to: 45878
-/* 20174 */ MCD_OPC_Decode, 183, 14, 107, // Opcode: SQNEG8h
-/* 20178 */ MCD_OPC_FilterValue, 31, 75, 0, // Skip to: 20257
-/* 20182 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20185 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20203
-/* 20189 */ MCD_OPC_CheckPredicate, 0, 85, 100, // Skip to: 45878
-/* 20193 */ MCD_OPC_CheckField, 21, 1, 1, 79, 100, // Skip to: 45878
-/* 20199 */ MCD_OPC_Decode, 160, 12, 98, // Opcode: SABAvvv_4H
-/* 20203 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20221
-/* 20207 */ MCD_OPC_CheckPredicate, 0, 67, 100, // Skip to: 45878
-/* 20211 */ MCD_OPC_CheckField, 21, 1, 1, 61, 100, // Skip to: 45878
-/* 20217 */ MCD_OPC_Decode, 237, 18, 98, // Opcode: UABAvvv_4H
-/* 20221 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20239
-/* 20225 */ MCD_OPC_CheckPredicate, 0, 49, 100, // Skip to: 45878
-/* 20229 */ MCD_OPC_CheckField, 21, 1, 1, 43, 100, // Skip to: 45878
-/* 20235 */ MCD_OPC_Decode, 163, 12, 110, // Opcode: SABAvvv_8H
-/* 20239 */ MCD_OPC_FilterValue, 3, 35, 100, // Skip to: 45878
-/* 20243 */ MCD_OPC_CheckPredicate, 0, 31, 100, // Skip to: 45878
-/* 20247 */ MCD_OPC_CheckField, 21, 1, 1, 25, 100, // Skip to: 45878
-/* 20253 */ MCD_OPC_Decode, 240, 18, 110, // Opcode: UABAvvv_8H
-/* 20257 */ MCD_OPC_FilterValue, 32, 75, 0, // Skip to: 20336
-/* 20261 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20264 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20282
-/* 20268 */ MCD_OPC_CheckPredicate, 0, 6, 100, // Skip to: 45878
-/* 20272 */ MCD_OPC_CheckField, 21, 1, 1, 0, 100, // Skip to: 45878
-/* 20278 */ MCD_OPC_Decode, 198, 13, 94, // Opcode: SMLALvvv_4s4h
-/* 20282 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20300
-/* 20286 */ MCD_OPC_CheckPredicate, 0, 244, 99, // Skip to: 45878
-/* 20290 */ MCD_OPC_CheckField, 21, 1, 1, 238, 99, // Skip to: 45878
-/* 20296 */ MCD_OPC_Decode, 232, 19, 94, // Opcode: UMLALvvv_4s4h
-/* 20300 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20318
-/* 20304 */ MCD_OPC_CheckPredicate, 0, 226, 99, // Skip to: 45878
-/* 20308 */ MCD_OPC_CheckField, 21, 1, 1, 220, 99, // Skip to: 45878
-/* 20314 */ MCD_OPC_Decode, 191, 13, 110, // Opcode: SMLAL2vvv_4s8h
-/* 20318 */ MCD_OPC_FilterValue, 3, 212, 99, // Skip to: 45878
-/* 20322 */ MCD_OPC_CheckPredicate, 0, 208, 99, // Skip to: 45878
-/* 20326 */ MCD_OPC_CheckField, 21, 1, 1, 202, 99, // Skip to: 45878
-/* 20332 */ MCD_OPC_Decode, 225, 19, 110, // Opcode: UMLAL2vvv_4s8h
-/* 20336 */ MCD_OPC_FilterValue, 33, 73, 0, // Skip to: 20413
-/* 20340 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20343 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 20360
-/* 20347 */ MCD_OPC_CheckPredicate, 0, 183, 99, // Skip to: 45878
-/* 20351 */ MCD_OPC_CheckField, 21, 1, 1, 177, 99, // Skip to: 45878
-/* 20357 */ MCD_OPC_Decode, 76, 78, // Opcode: ADDvvv_4H
-/* 20360 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20378
-/* 20364 */ MCD_OPC_CheckPredicate, 0, 166, 99, // Skip to: 45878
-/* 20368 */ MCD_OPC_CheckField, 21, 1, 1, 160, 99, // Skip to: 45878
-/* 20374 */ MCD_OPC_Decode, 250, 17, 78, // Opcode: SUBvvv_4H
-/* 20378 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 20395
-/* 20382 */ MCD_OPC_CheckPredicate, 0, 148, 99, // Skip to: 45878
-/* 20386 */ MCD_OPC_CheckField, 21, 1, 1, 142, 99, // Skip to: 45878
-/* 20392 */ MCD_OPC_Decode, 79, 102, // Opcode: ADDvvv_8H
-/* 20395 */ MCD_OPC_FilterValue, 3, 135, 99, // Skip to: 45878
-/* 20399 */ MCD_OPC_CheckPredicate, 0, 131, 99, // Skip to: 45878
-/* 20403 */ MCD_OPC_CheckField, 21, 1, 1, 125, 99, // Skip to: 45878
-/* 20409 */ MCD_OPC_Decode, 253, 17, 102, // Opcode: SUBvvv_8H
-/* 20413 */ MCD_OPC_FilterValue, 34, 101, 0, // Skip to: 20518
-/* 20417 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20420 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20438
-/* 20424 */ MCD_OPC_CheckPredicate, 0, 106, 99, // Skip to: 45878
-/* 20428 */ MCD_OPC_CheckField, 16, 6, 32, 100, 99, // Skip to: 45878
-/* 20434 */ MCD_OPC_Decode, 175, 2, 79, // Opcode: CMGTvvi_4H
-/* 20438 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20456
-/* 20442 */ MCD_OPC_CheckPredicate, 0, 88, 99, // Skip to: 45878
-/* 20446 */ MCD_OPC_CheckField, 16, 6, 32, 82, 99, // Skip to: 45878
-/* 20452 */ MCD_OPC_Decode, 159, 2, 79, // Opcode: CMGEvvi_4H
-/* 20456 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 20487
-/* 20460 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 20463 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20475
-/* 20467 */ MCD_OPC_CheckPredicate, 0, 63, 99, // Skip to: 45878
-/* 20471 */ MCD_OPC_Decode, 178, 2, 107, // Opcode: CMGTvvi_8H
-/* 20475 */ MCD_OPC_FilterValue, 33, 55, 99, // Skip to: 45878
-/* 20479 */ MCD_OPC_CheckPredicate, 0, 51, 99, // Skip to: 45878
-/* 20483 */ MCD_OPC_Decode, 170, 6, 107, // Opcode: FRINTN_2d
-/* 20487 */ MCD_OPC_FilterValue, 3, 43, 99, // Skip to: 45878
-/* 20491 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 20494 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20506
-/* 20498 */ MCD_OPC_CheckPredicate, 0, 32, 99, // Skip to: 45878
-/* 20502 */ MCD_OPC_Decode, 162, 2, 107, // Opcode: CMGEvvi_8H
-/* 20506 */ MCD_OPC_FilterValue, 33, 24, 99, // Skip to: 45878
-/* 20510 */ MCD_OPC_CheckPredicate, 0, 20, 99, // Skip to: 45878
-/* 20514 */ MCD_OPC_Decode, 155, 6, 107, // Opcode: FRINTA_2d
-/* 20518 */ MCD_OPC_FilterValue, 35, 75, 0, // Skip to: 20597
-/* 20522 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20525 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20543
-/* 20529 */ MCD_OPC_CheckPredicate, 0, 1, 99, // Skip to: 45878
-/* 20533 */ MCD_OPC_CheckField, 21, 1, 1, 251, 98, // Skip to: 45878
-/* 20539 */ MCD_OPC_Decode, 138, 3, 78, // Opcode: CMTSTvvv_4H
-/* 20543 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20561
-/* 20547 */ MCD_OPC_CheckPredicate, 0, 239, 98, // Skip to: 45878
-/* 20551 */ MCD_OPC_CheckField, 21, 1, 1, 233, 98, // Skip to: 45878
-/* 20557 */ MCD_OPC_Decode, 150, 2, 78, // Opcode: CMEQvvv_4H
-/* 20561 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20579
-/* 20565 */ MCD_OPC_CheckPredicate, 0, 221, 98, // Skip to: 45878
-/* 20569 */ MCD_OPC_CheckField, 21, 1, 1, 215, 98, // Skip to: 45878
-/* 20575 */ MCD_OPC_Decode, 141, 3, 102, // Opcode: CMTSTvvv_8H
-/* 20579 */ MCD_OPC_FilterValue, 3, 207, 98, // Skip to: 45878
-/* 20583 */ MCD_OPC_CheckPredicate, 0, 203, 98, // Skip to: 45878
-/* 20587 */ MCD_OPC_CheckField, 21, 1, 1, 197, 98, // Skip to: 45878
-/* 20593 */ MCD_OPC_Decode, 153, 2, 102, // Opcode: CMEQvvv_8H
-/* 20597 */ MCD_OPC_FilterValue, 36, 39, 0, // Skip to: 20640
-/* 20601 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20604 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20622
-/* 20608 */ MCD_OPC_CheckPredicate, 0, 178, 98, // Skip to: 45878
-/* 20612 */ MCD_OPC_CheckField, 21, 1, 1, 172, 98, // Skip to: 45878
-/* 20618 */ MCD_OPC_Decode, 134, 14, 94, // Opcode: SQDMLALvvv_4s4h
-/* 20622 */ MCD_OPC_FilterValue, 2, 164, 98, // Skip to: 45878
-/* 20626 */ MCD_OPC_CheckPredicate, 0, 160, 98, // Skip to: 45878
-/* 20630 */ MCD_OPC_CheckField, 21, 1, 1, 154, 98, // Skip to: 45878
-/* 20636 */ MCD_OPC_Decode, 250, 13, 110, // Opcode: SQDMLAL2vvv_4s8h
-/* 20640 */ MCD_OPC_FilterValue, 37, 75, 0, // Skip to: 20719
-/* 20644 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20647 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20665
-/* 20651 */ MCD_OPC_CheckPredicate, 0, 135, 98, // Skip to: 45878
-/* 20655 */ MCD_OPC_CheckField, 21, 1, 1, 129, 98, // Skip to: 45878
-/* 20661 */ MCD_OPC_Decode, 247, 10, 98, // Opcode: MLAvvv_4H
-/* 20665 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20683
-/* 20669 */ MCD_OPC_CheckPredicate, 0, 117, 98, // Skip to: 45878
-/* 20673 */ MCD_OPC_CheckField, 21, 1, 1, 111, 98, // Skip to: 45878
-/* 20679 */ MCD_OPC_Decode, 129, 11, 98, // Opcode: MLSvvv_4H
-/* 20683 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20701
-/* 20687 */ MCD_OPC_CheckPredicate, 0, 99, 98, // Skip to: 45878
-/* 20691 */ MCD_OPC_CheckField, 21, 1, 1, 93, 98, // Skip to: 45878
-/* 20697 */ MCD_OPC_Decode, 250, 10, 110, // Opcode: MLAvvv_8H
-/* 20701 */ MCD_OPC_FilterValue, 3, 85, 98, // Skip to: 45878
-/* 20705 */ MCD_OPC_CheckPredicate, 0, 81, 98, // Skip to: 45878
-/* 20709 */ MCD_OPC_CheckField, 21, 1, 1, 75, 98, // Skip to: 45878
-/* 20715 */ MCD_OPC_Decode, 132, 11, 110, // Opcode: MLSvvv_8H
-/* 20719 */ MCD_OPC_FilterValue, 38, 101, 0, // Skip to: 20824
-/* 20723 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20726 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20744
-/* 20730 */ MCD_OPC_CheckPredicate, 0, 56, 98, // Skip to: 45878
-/* 20734 */ MCD_OPC_CheckField, 16, 6, 32, 50, 98, // Skip to: 45878
-/* 20740 */ MCD_OPC_Decode, 143, 2, 79, // Opcode: CMEQvvi_4H
-/* 20744 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20762
-/* 20748 */ MCD_OPC_CheckPredicate, 0, 38, 98, // Skip to: 45878
-/* 20752 */ MCD_OPC_CheckField, 16, 6, 32, 32, 98, // Skip to: 45878
-/* 20758 */ MCD_OPC_Decode, 206, 2, 79, // Opcode: CMLEvvi_4H
-/* 20762 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 20793
-/* 20766 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 20769 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20781
-/* 20773 */ MCD_OPC_CheckPredicate, 0, 13, 98, // Skip to: 45878
-/* 20777 */ MCD_OPC_Decode, 146, 2, 107, // Opcode: CMEQvvi_8H
-/* 20781 */ MCD_OPC_FilterValue, 33, 5, 98, // Skip to: 45878
-/* 20785 */ MCD_OPC_CheckPredicate, 0, 1, 98, // Skip to: 45878
-/* 20789 */ MCD_OPC_Decode, 165, 6, 107, // Opcode: FRINTM_2d
-/* 20793 */ MCD_OPC_FilterValue, 3, 249, 97, // Skip to: 45878
-/* 20797 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 20800 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20812
-/* 20804 */ MCD_OPC_CheckPredicate, 0, 238, 97, // Skip to: 45878
-/* 20808 */ MCD_OPC_Decode, 209, 2, 107, // Opcode: CMLEvvi_8H
-/* 20812 */ MCD_OPC_FilterValue, 33, 230, 97, // Skip to: 45878
-/* 20816 */ MCD_OPC_CheckPredicate, 0, 226, 97, // Skip to: 45878
-/* 20820 */ MCD_OPC_Decode, 180, 6, 107, // Opcode: FRINTX_2d
-/* 20824 */ MCD_OPC_FilterValue, 39, 39, 0, // Skip to: 20867
-/* 20828 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20831 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20849
-/* 20835 */ MCD_OPC_CheckPredicate, 0, 207, 97, // Skip to: 45878
-/* 20839 */ MCD_OPC_CheckField, 21, 1, 1, 201, 97, // Skip to: 45878
-/* 20845 */ MCD_OPC_Decode, 160, 11, 78, // Opcode: MULvvv_4H
-/* 20849 */ MCD_OPC_FilterValue, 2, 193, 97, // Skip to: 45878
-/* 20853 */ MCD_OPC_CheckPredicate, 0, 189, 97, // Skip to: 45878
-/* 20857 */ MCD_OPC_CheckField, 21, 1, 1, 183, 97, // Skip to: 45878
-/* 20863 */ MCD_OPC_Decode, 163, 11, 102, // Opcode: MULvvv_8H
-/* 20867 */ MCD_OPC_FilterValue, 40, 75, 0, // Skip to: 20946
-/* 20871 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20874 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20892
-/* 20878 */ MCD_OPC_CheckPredicate, 0, 164, 97, // Skip to: 45878
-/* 20882 */ MCD_OPC_CheckField, 21, 1, 1, 158, 97, // Skip to: 45878
-/* 20888 */ MCD_OPC_Decode, 208, 13, 94, // Opcode: SMLSLvvv_4s4h
-/* 20892 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20910
-/* 20896 */ MCD_OPC_CheckPredicate, 0, 146, 97, // Skip to: 45878
-/* 20900 */ MCD_OPC_CheckField, 21, 1, 1, 140, 97, // Skip to: 45878
-/* 20906 */ MCD_OPC_Decode, 242, 19, 94, // Opcode: UMLSLvvv_4s4h
-/* 20910 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20928
-/* 20914 */ MCD_OPC_CheckPredicate, 0, 128, 97, // Skip to: 45878
-/* 20918 */ MCD_OPC_CheckField, 21, 1, 1, 122, 97, // Skip to: 45878
-/* 20924 */ MCD_OPC_Decode, 201, 13, 110, // Opcode: SMLSL2vvv_4s8h
-/* 20928 */ MCD_OPC_FilterValue, 3, 114, 97, // Skip to: 45878
-/* 20932 */ MCD_OPC_CheckPredicate, 0, 110, 97, // Skip to: 45878
-/* 20936 */ MCD_OPC_CheckField, 21, 1, 1, 104, 97, // Skip to: 45878
-/* 20942 */ MCD_OPC_Decode, 235, 19, 110, // Opcode: UMLSL2vvv_4s8h
-/* 20946 */ MCD_OPC_FilterValue, 41, 75, 0, // Skip to: 21025
-/* 20950 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 20953 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20971
-/* 20957 */ MCD_OPC_CheckPredicate, 0, 85, 97, // Skip to: 45878
-/* 20961 */ MCD_OPC_CheckField, 21, 1, 1, 79, 97, // Skip to: 45878
-/* 20967 */ MCD_OPC_Decode, 157, 13, 78, // Opcode: SMAXPvvv_4H
-/* 20971 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20989
-/* 20975 */ MCD_OPC_CheckPredicate, 0, 67, 97, // Skip to: 45878
-/* 20979 */ MCD_OPC_CheckField, 21, 1, 1, 61, 97, // Skip to: 45878
-/* 20985 */ MCD_OPC_Decode, 192, 19, 78, // Opcode: UMAXPvvv_4H
-/* 20989 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21007
-/* 20993 */ MCD_OPC_CheckPredicate, 0, 49, 97, // Skip to: 45878
-/* 20997 */ MCD_OPC_CheckField, 21, 1, 1, 43, 97, // Skip to: 45878
-/* 21003 */ MCD_OPC_Decode, 160, 13, 102, // Opcode: SMAXPvvv_8H
-/* 21007 */ MCD_OPC_FilterValue, 3, 35, 97, // Skip to: 45878
-/* 21011 */ MCD_OPC_CheckPredicate, 0, 31, 97, // Skip to: 45878
-/* 21015 */ MCD_OPC_CheckField, 21, 1, 1, 25, 97, // Skip to: 45878
-/* 21021 */ MCD_OPC_Decode, 195, 19, 102, // Opcode: UMAXPvvv_8H
-/* 21025 */ MCD_OPC_FilterValue, 42, 175, 0, // Skip to: 21204
-/* 21029 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 21032 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 21063
-/* 21036 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21039 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 21051
-/* 21043 */ MCD_OPC_CheckPredicate, 0, 255, 96, // Skip to: 45878
-/* 21047 */ MCD_OPC_Decode, 214, 2, 79, // Opcode: CMLTvvi_4H
-/* 21051 */ MCD_OPC_FilterValue, 2, 247, 96, // Skip to: 45878
-/* 21055 */ MCD_OPC_CheckPredicate, 0, 243, 96, // Skip to: 45878
-/* 21059 */ MCD_OPC_Decode, 217, 2, 107, // Opcode: CMLTvvi_8H
-/* 21063 */ MCD_OPC_FilterValue, 33, 27, 0, // Skip to: 21094
-/* 21067 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21070 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 21082
-/* 21074 */ MCD_OPC_CheckPredicate, 0, 224, 96, // Skip to: 45878
-/* 21078 */ MCD_OPC_Decode, 211, 4, 107, // Opcode: FCVTNS_2d
-/* 21082 */ MCD_OPC_FilterValue, 3, 216, 96, // Skip to: 45878
-/* 21086 */ MCD_OPC_CheckPredicate, 0, 212, 96, // Skip to: 45878
-/* 21090 */ MCD_OPC_Decode, 220, 4, 107, // Opcode: FCVTNU_2d
-/* 21094 */ MCD_OPC_FilterValue, 48, 51, 0, // Skip to: 21149
-/* 21098 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21101 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 21113
-/* 21105 */ MCD_OPC_CheckPredicate, 0, 193, 96, // Skip to: 45878
-/* 21109 */ MCD_OPC_Decode, 163, 13, 89, // Opcode: SMAXV_1h4h
-/* 21113 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 21125
-/* 21117 */ MCD_OPC_CheckPredicate, 0, 181, 96, // Skip to: 45878
-/* 21121 */ MCD_OPC_Decode, 198, 19, 89, // Opcode: UMAXV_1h4h
-/* 21125 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 21137
-/* 21129 */ MCD_OPC_CheckPredicate, 0, 169, 96, // Skip to: 45878
-/* 21133 */ MCD_OPC_Decode, 164, 13, 121, // Opcode: SMAXV_1h8h
-/* 21137 */ MCD_OPC_FilterValue, 3, 161, 96, // Skip to: 45878
-/* 21141 */ MCD_OPC_CheckPredicate, 0, 157, 96, // Skip to: 45878
-/* 21145 */ MCD_OPC_Decode, 199, 19, 121, // Opcode: UMAXV_1h8h
-/* 21149 */ MCD_OPC_FilterValue, 49, 149, 96, // Skip to: 45878
-/* 21153 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21156 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 21168
-/* 21160 */ MCD_OPC_CheckPredicate, 0, 138, 96, // Skip to: 45878
-/* 21164 */ MCD_OPC_Decode, 181, 13, 89, // Opcode: SMINV_1h4h
-/* 21168 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 21180
-/* 21172 */ MCD_OPC_CheckPredicate, 0, 126, 96, // Skip to: 45878
-/* 21176 */ MCD_OPC_Decode, 215, 19, 89, // Opcode: UMINV_1h4h
-/* 21180 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 21192
-/* 21184 */ MCD_OPC_CheckPredicate, 0, 114, 96, // Skip to: 45878
-/* 21188 */ MCD_OPC_Decode, 182, 13, 121, // Opcode: SMINV_1h8h
-/* 21192 */ MCD_OPC_FilterValue, 3, 106, 96, // Skip to: 45878
-/* 21196 */ MCD_OPC_CheckPredicate, 0, 102, 96, // Skip to: 45878
-/* 21200 */ MCD_OPC_Decode, 216, 19, 121, // Opcode: UMINV_1h8h
-/* 21204 */ MCD_OPC_FilterValue, 43, 75, 0, // Skip to: 21283
-/* 21208 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21211 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21229
-/* 21215 */ MCD_OPC_CheckPredicate, 0, 83, 96, // Skip to: 45878
-/* 21219 */ MCD_OPC_CheckField, 21, 1, 1, 77, 96, // Skip to: 45878
-/* 21225 */ MCD_OPC_Decode, 175, 13, 78, // Opcode: SMINPvvv_4H
-/* 21229 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21247
-/* 21233 */ MCD_OPC_CheckPredicate, 0, 65, 96, // Skip to: 45878
-/* 21237 */ MCD_OPC_CheckField, 21, 1, 1, 59, 96, // Skip to: 45878
-/* 21243 */ MCD_OPC_Decode, 209, 19, 78, // Opcode: UMINPvvv_4H
-/* 21247 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21265
-/* 21251 */ MCD_OPC_CheckPredicate, 0, 47, 96, // Skip to: 45878
-/* 21255 */ MCD_OPC_CheckField, 21, 1, 1, 41, 96, // Skip to: 45878
-/* 21261 */ MCD_OPC_Decode, 178, 13, 102, // Opcode: SMINPvvv_8H
-/* 21265 */ MCD_OPC_FilterValue, 3, 33, 96, // Skip to: 45878
-/* 21269 */ MCD_OPC_CheckPredicate, 0, 29, 96, // Skip to: 45878
-/* 21273 */ MCD_OPC_CheckField, 21, 1, 1, 23, 96, // Skip to: 45878
-/* 21279 */ MCD_OPC_Decode, 212, 19, 102, // Opcode: UMINPvvv_8H
-/* 21283 */ MCD_OPC_FilterValue, 44, 39, 0, // Skip to: 21326
+/* 2504 */ MCD_OPC_CheckPredicate, 0, 17, 149, // Skip to: 40669
+/* 2508 */ MCD_OPC_CheckField, 21, 1, 0, 11, 149, // Skip to: 40669
+/* 2514 */ MCD_OPC_Decode, 172, 14, 12, // Opcode: ST4Fourv8b_POST
+/* 2518 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 2536
+/* 2522 */ MCD_OPC_CheckPredicate, 0, 255, 148, // Skip to: 40669
+/* 2526 */ MCD_OPC_CheckField, 21, 1, 0, 249, 148, // Skip to: 40669
+/* 2532 */ MCD_OPC_Decode, 168, 14, 12, // Opcode: ST4Fourv4h_POST
+/* 2536 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 2554
+/* 2540 */ MCD_OPC_CheckPredicate, 0, 237, 148, // Skip to: 40669
+/* 2544 */ MCD_OPC_CheckField, 21, 1, 0, 231, 148, // Skip to: 40669
+/* 2550 */ MCD_OPC_Decode, 166, 14, 12, // Opcode: ST4Fourv2s_POST
+/* 2554 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 2572
+/* 2558 */ MCD_OPC_CheckPredicate, 0, 219, 148, // Skip to: 40669
+/* 2562 */ MCD_OPC_CheckField, 21, 1, 0, 213, 148, // Skip to: 40669
+/* 2568 */ MCD_OPC_Decode, 186, 13, 12, // Opcode: ST1Fourv8b_POST
+/* 2572 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 2590
+/* 2576 */ MCD_OPC_CheckPredicate, 0, 201, 148, // Skip to: 40669
+/* 2580 */ MCD_OPC_CheckField, 21, 1, 0, 195, 148, // Skip to: 40669
+/* 2586 */ MCD_OPC_Decode, 182, 13, 12, // Opcode: ST1Fourv4h_POST
+/* 2590 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 2608
+/* 2594 */ MCD_OPC_CheckPredicate, 0, 183, 148, // Skip to: 40669
+/* 2598 */ MCD_OPC_CheckField, 21, 1, 0, 177, 148, // Skip to: 40669
+/* 2604 */ MCD_OPC_Decode, 180, 13, 12, // Opcode: ST1Fourv2s_POST
+/* 2608 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 2626
+/* 2612 */ MCD_OPC_CheckPredicate, 0, 165, 148, // Skip to: 40669
+/* 2616 */ MCD_OPC_CheckField, 21, 1, 0, 159, 148, // Skip to: 40669
+/* 2622 */ MCD_OPC_Decode, 176, 13, 12, // Opcode: ST1Fourv1d_POST
+/* 2626 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 2644
+/* 2630 */ MCD_OPC_CheckPredicate, 0, 147, 148, // Skip to: 40669
+/* 2634 */ MCD_OPC_CheckField, 21, 1, 0, 141, 148, // Skip to: 40669
+/* 2640 */ MCD_OPC_Decode, 150, 14, 13, // Opcode: ST3Threev8b_POST
+/* 2644 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 2662
+/* 2648 */ MCD_OPC_CheckPredicate, 0, 129, 148, // Skip to: 40669
+/* 2652 */ MCD_OPC_CheckField, 21, 1, 0, 123, 148, // Skip to: 40669
+/* 2658 */ MCD_OPC_Decode, 146, 14, 13, // Opcode: ST3Threev4h_POST
+/* 2662 */ MCD_OPC_FilterValue, 18, 14, 0, // Skip to: 2680
+/* 2666 */ MCD_OPC_CheckPredicate, 0, 111, 148, // Skip to: 40669
+/* 2670 */ MCD_OPC_CheckField, 21, 1, 0, 105, 148, // Skip to: 40669
+/* 2676 */ MCD_OPC_Decode, 144, 14, 13, // Opcode: ST3Threev2s_POST
+/* 2680 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 2698
+/* 2684 */ MCD_OPC_CheckPredicate, 0, 93, 148, // Skip to: 40669
+/* 2688 */ MCD_OPC_CheckField, 21, 1, 0, 87, 148, // Skip to: 40669
+/* 2694 */ MCD_OPC_Decode, 218, 13, 13, // Opcode: ST1Threev8b_POST
+/* 2698 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 2716
+/* 2702 */ MCD_OPC_CheckPredicate, 0, 75, 148, // Skip to: 40669
+/* 2706 */ MCD_OPC_CheckField, 21, 1, 0, 69, 148, // Skip to: 40669
+/* 2712 */ MCD_OPC_Decode, 214, 13, 13, // Opcode: ST1Threev4h_POST
+/* 2716 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 2734
+/* 2720 */ MCD_OPC_CheckPredicate, 0, 57, 148, // Skip to: 40669
+/* 2724 */ MCD_OPC_CheckField, 21, 1, 0, 51, 148, // Skip to: 40669
+/* 2730 */ MCD_OPC_Decode, 212, 13, 13, // Opcode: ST1Threev2s_POST
+/* 2734 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 2752
+/* 2738 */ MCD_OPC_CheckPredicate, 0, 39, 148, // Skip to: 40669
+/* 2742 */ MCD_OPC_CheckField, 21, 1, 0, 33, 148, // Skip to: 40669
+/* 2748 */ MCD_OPC_Decode, 208, 13, 13, // Opcode: ST1Threev1d_POST
+/* 2752 */ MCD_OPC_FilterValue, 28, 14, 0, // Skip to: 2770
+/* 2756 */ MCD_OPC_CheckPredicate, 0, 21, 148, // Skip to: 40669
+/* 2760 */ MCD_OPC_CheckField, 21, 1, 0, 15, 148, // Skip to: 40669
+/* 2766 */ MCD_OPC_Decode, 202, 13, 14, // Opcode: ST1Onev8b_POST
+/* 2770 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 2788
+/* 2774 */ MCD_OPC_CheckPredicate, 0, 3, 148, // Skip to: 40669
+/* 2778 */ MCD_OPC_CheckField, 21, 1, 0, 253, 147, // Skip to: 40669
+/* 2784 */ MCD_OPC_Decode, 198, 13, 14, // Opcode: ST1Onev4h_POST
+/* 2788 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 2806
+/* 2792 */ MCD_OPC_CheckPredicate, 0, 241, 147, // Skip to: 40669
+/* 2796 */ MCD_OPC_CheckField, 21, 1, 0, 235, 147, // Skip to: 40669
+/* 2802 */ MCD_OPC_Decode, 196, 13, 14, // Opcode: ST1Onev2s_POST
+/* 2806 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 2824
+/* 2810 */ MCD_OPC_CheckPredicate, 0, 223, 147, // Skip to: 40669
+/* 2814 */ MCD_OPC_CheckField, 21, 1, 0, 217, 147, // Skip to: 40669
+/* 2820 */ MCD_OPC_Decode, 192, 13, 14, // Opcode: ST1Onev1d_POST
+/* 2824 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 2842
+/* 2828 */ MCD_OPC_CheckPredicate, 0, 205, 147, // Skip to: 40669
+/* 2832 */ MCD_OPC_CheckField, 21, 1, 0, 199, 147, // Skip to: 40669
+/* 2838 */ MCD_OPC_Decode, 128, 14, 15, // Opcode: ST2Twov8b_POST
+/* 2842 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 2860
+/* 2846 */ MCD_OPC_CheckPredicate, 0, 187, 147, // Skip to: 40669
+/* 2850 */ MCD_OPC_CheckField, 21, 1, 0, 181, 147, // Skip to: 40669
+/* 2856 */ MCD_OPC_Decode, 252, 13, 15, // Opcode: ST2Twov4h_POST
+/* 2860 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 2878
+/* 2864 */ MCD_OPC_CheckPredicate, 0, 169, 147, // Skip to: 40669
+/* 2868 */ MCD_OPC_CheckField, 21, 1, 0, 163, 147, // Skip to: 40669
+/* 2874 */ MCD_OPC_Decode, 250, 13, 15, // Opcode: ST2Twov2s_POST
+/* 2878 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 2896
+/* 2882 */ MCD_OPC_CheckPredicate, 0, 151, 147, // Skip to: 40669
+/* 2886 */ MCD_OPC_CheckField, 21, 1, 0, 145, 147, // Skip to: 40669
+/* 2892 */ MCD_OPC_Decode, 234, 13, 15, // Opcode: ST1Twov8b_POST
+/* 2896 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 2914
+/* 2900 */ MCD_OPC_CheckPredicate, 0, 133, 147, // Skip to: 40669
+/* 2904 */ MCD_OPC_CheckField, 21, 1, 0, 127, 147, // Skip to: 40669
+/* 2910 */ MCD_OPC_Decode, 230, 13, 15, // Opcode: ST1Twov4h_POST
+/* 2914 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 2932
+/* 2918 */ MCD_OPC_CheckPredicate, 0, 115, 147, // Skip to: 40669
+/* 2922 */ MCD_OPC_CheckField, 21, 1, 0, 109, 147, // Skip to: 40669
+/* 2928 */ MCD_OPC_Decode, 228, 13, 15, // Opcode: ST1Twov2s_POST
+/* 2932 */ MCD_OPC_FilterValue, 43, 101, 147, // Skip to: 40669
+/* 2936 */ MCD_OPC_CheckPredicate, 0, 97, 147, // Skip to: 40669
+/* 2940 */ MCD_OPC_CheckField, 21, 1, 0, 91, 147, // Skip to: 40669
+/* 2946 */ MCD_OPC_Decode, 224, 13, 15, // Opcode: ST1Twov1d_POST
+/* 2950 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 2958
+/* 2954 */ MCD_OPC_Decode, 205, 14, 3, // Opcode: STPSpost
+/* 2958 */ MCD_OPC_FilterValue, 2, 251, 1, // Skip to: 3469
+/* 2962 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 2965 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 2983
+/* 2969 */ MCD_OPC_CheckPredicate, 0, 64, 147, // Skip to: 40669
+/* 2973 */ MCD_OPC_CheckField, 21, 1, 0, 58, 147, // Skip to: 40669
+/* 2979 */ MCD_OPC_Decode, 162, 14, 16, // Opcode: ST4Fourv16b_POST
+/* 2983 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 3001
+/* 2987 */ MCD_OPC_CheckPredicate, 0, 46, 147, // Skip to: 40669
+/* 2991 */ MCD_OPC_CheckField, 21, 1, 0, 40, 147, // Skip to: 40669
+/* 2997 */ MCD_OPC_Decode, 174, 14, 16, // Opcode: ST4Fourv8h_POST
+/* 3001 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 3019
+/* 3005 */ MCD_OPC_CheckPredicate, 0, 28, 147, // Skip to: 40669
+/* 3009 */ MCD_OPC_CheckField, 21, 1, 0, 22, 147, // Skip to: 40669
+/* 3015 */ MCD_OPC_Decode, 170, 14, 16, // Opcode: ST4Fourv4s_POST
+/* 3019 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 3037
+/* 3023 */ MCD_OPC_CheckPredicate, 0, 10, 147, // Skip to: 40669
+/* 3027 */ MCD_OPC_CheckField, 21, 1, 0, 4, 147, // Skip to: 40669
+/* 3033 */ MCD_OPC_Decode, 164, 14, 16, // Opcode: ST4Fourv2d_POST
+/* 3037 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 3055
+/* 3041 */ MCD_OPC_CheckPredicate, 0, 248, 146, // Skip to: 40669
+/* 3045 */ MCD_OPC_CheckField, 21, 1, 0, 242, 146, // Skip to: 40669
+/* 3051 */ MCD_OPC_Decode, 174, 13, 16, // Opcode: ST1Fourv16b_POST
+/* 3055 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 3073
+/* 3059 */ MCD_OPC_CheckPredicate, 0, 230, 146, // Skip to: 40669
+/* 3063 */ MCD_OPC_CheckField, 21, 1, 0, 224, 146, // Skip to: 40669
+/* 3069 */ MCD_OPC_Decode, 188, 13, 16, // Opcode: ST1Fourv8h_POST
+/* 3073 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 3091
+/* 3077 */ MCD_OPC_CheckPredicate, 0, 212, 146, // Skip to: 40669
+/* 3081 */ MCD_OPC_CheckField, 21, 1, 0, 206, 146, // Skip to: 40669
+/* 3087 */ MCD_OPC_Decode, 184, 13, 16, // Opcode: ST1Fourv4s_POST
+/* 3091 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 3109
+/* 3095 */ MCD_OPC_CheckPredicate, 0, 194, 146, // Skip to: 40669
+/* 3099 */ MCD_OPC_CheckField, 21, 1, 0, 188, 146, // Skip to: 40669
+/* 3105 */ MCD_OPC_Decode, 178, 13, 16, // Opcode: ST1Fourv2d_POST
+/* 3109 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 3127
+/* 3113 */ MCD_OPC_CheckPredicate, 0, 176, 146, // Skip to: 40669
+/* 3117 */ MCD_OPC_CheckField, 21, 1, 0, 170, 146, // Skip to: 40669
+/* 3123 */ MCD_OPC_Decode, 140, 14, 17, // Opcode: ST3Threev16b_POST
+/* 3127 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 3145
+/* 3131 */ MCD_OPC_CheckPredicate, 0, 158, 146, // Skip to: 40669
+/* 3135 */ MCD_OPC_CheckField, 21, 1, 0, 152, 146, // Skip to: 40669
+/* 3141 */ MCD_OPC_Decode, 152, 14, 17, // Opcode: ST3Threev8h_POST
+/* 3145 */ MCD_OPC_FilterValue, 18, 14, 0, // Skip to: 3163
+/* 3149 */ MCD_OPC_CheckPredicate, 0, 140, 146, // Skip to: 40669
+/* 3153 */ MCD_OPC_CheckField, 21, 1, 0, 134, 146, // Skip to: 40669
+/* 3159 */ MCD_OPC_Decode, 148, 14, 17, // Opcode: ST3Threev4s_POST
+/* 3163 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 3181
+/* 3167 */ MCD_OPC_CheckPredicate, 0, 122, 146, // Skip to: 40669
+/* 3171 */ MCD_OPC_CheckField, 21, 1, 0, 116, 146, // Skip to: 40669
+/* 3177 */ MCD_OPC_Decode, 142, 14, 17, // Opcode: ST3Threev2d_POST
+/* 3181 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 3199
+/* 3185 */ MCD_OPC_CheckPredicate, 0, 104, 146, // Skip to: 40669
+/* 3189 */ MCD_OPC_CheckField, 21, 1, 0, 98, 146, // Skip to: 40669
+/* 3195 */ MCD_OPC_Decode, 206, 13, 17, // Opcode: ST1Threev16b_POST
+/* 3199 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 3217
+/* 3203 */ MCD_OPC_CheckPredicate, 0, 86, 146, // Skip to: 40669
+/* 3207 */ MCD_OPC_CheckField, 21, 1, 0, 80, 146, // Skip to: 40669
+/* 3213 */ MCD_OPC_Decode, 220, 13, 17, // Opcode: ST1Threev8h_POST
+/* 3217 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 3235
+/* 3221 */ MCD_OPC_CheckPredicate, 0, 68, 146, // Skip to: 40669
+/* 3225 */ MCD_OPC_CheckField, 21, 1, 0, 62, 146, // Skip to: 40669
+/* 3231 */ MCD_OPC_Decode, 216, 13, 17, // Opcode: ST1Threev4s_POST
+/* 3235 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 3253
+/* 3239 */ MCD_OPC_CheckPredicate, 0, 50, 146, // Skip to: 40669
+/* 3243 */ MCD_OPC_CheckField, 21, 1, 0, 44, 146, // Skip to: 40669
+/* 3249 */ MCD_OPC_Decode, 210, 13, 17, // Opcode: ST1Threev2d_POST
+/* 3253 */ MCD_OPC_FilterValue, 28, 14, 0, // Skip to: 3271
+/* 3257 */ MCD_OPC_CheckPredicate, 0, 32, 146, // Skip to: 40669
+/* 3261 */ MCD_OPC_CheckField, 21, 1, 0, 26, 146, // Skip to: 40669
+/* 3267 */ MCD_OPC_Decode, 190, 13, 18, // Opcode: ST1Onev16b_POST
+/* 3271 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 3289
+/* 3275 */ MCD_OPC_CheckPredicate, 0, 14, 146, // Skip to: 40669
+/* 3279 */ MCD_OPC_CheckField, 21, 1, 0, 8, 146, // Skip to: 40669
+/* 3285 */ MCD_OPC_Decode, 204, 13, 18, // Opcode: ST1Onev8h_POST
+/* 3289 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 3307
+/* 3293 */ MCD_OPC_CheckPredicate, 0, 252, 145, // Skip to: 40669
+/* 3297 */ MCD_OPC_CheckField, 21, 1, 0, 246, 145, // Skip to: 40669
+/* 3303 */ MCD_OPC_Decode, 200, 13, 18, // Opcode: ST1Onev4s_POST
+/* 3307 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 3325
+/* 3311 */ MCD_OPC_CheckPredicate, 0, 234, 145, // Skip to: 40669
+/* 3315 */ MCD_OPC_CheckField, 21, 1, 0, 228, 145, // Skip to: 40669
+/* 3321 */ MCD_OPC_Decode, 194, 13, 18, // Opcode: ST1Onev2d_POST
+/* 3325 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 3343
+/* 3329 */ MCD_OPC_CheckPredicate, 0, 216, 145, // Skip to: 40669
+/* 3333 */ MCD_OPC_CheckField, 21, 1, 0, 210, 145, // Skip to: 40669
+/* 3339 */ MCD_OPC_Decode, 246, 13, 19, // Opcode: ST2Twov16b_POST
+/* 3343 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 3361
+/* 3347 */ MCD_OPC_CheckPredicate, 0, 198, 145, // Skip to: 40669
+/* 3351 */ MCD_OPC_CheckField, 21, 1, 0, 192, 145, // Skip to: 40669
+/* 3357 */ MCD_OPC_Decode, 130, 14, 19, // Opcode: ST2Twov8h_POST
+/* 3361 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 3379
+/* 3365 */ MCD_OPC_CheckPredicate, 0, 180, 145, // Skip to: 40669
+/* 3369 */ MCD_OPC_CheckField, 21, 1, 0, 174, 145, // Skip to: 40669
+/* 3375 */ MCD_OPC_Decode, 254, 13, 19, // Opcode: ST2Twov4s_POST
+/* 3379 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 3397
+/* 3383 */ MCD_OPC_CheckPredicate, 0, 162, 145, // Skip to: 40669
+/* 3387 */ MCD_OPC_CheckField, 21, 1, 0, 156, 145, // Skip to: 40669
+/* 3393 */ MCD_OPC_Decode, 248, 13, 19, // Opcode: ST2Twov2d_POST
+/* 3397 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 3415
+/* 3401 */ MCD_OPC_CheckPredicate, 0, 144, 145, // Skip to: 40669
+/* 3405 */ MCD_OPC_CheckField, 21, 1, 0, 138, 145, // Skip to: 40669
+/* 3411 */ MCD_OPC_Decode, 222, 13, 19, // Opcode: ST1Twov16b_POST
+/* 3415 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 3433
+/* 3419 */ MCD_OPC_CheckPredicate, 0, 126, 145, // Skip to: 40669
+/* 3423 */ MCD_OPC_CheckField, 21, 1, 0, 120, 145, // Skip to: 40669
+/* 3429 */ MCD_OPC_Decode, 236, 13, 19, // Opcode: ST1Twov8h_POST
+/* 3433 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 3451
+/* 3437 */ MCD_OPC_CheckPredicate, 0, 108, 145, // Skip to: 40669
+/* 3441 */ MCD_OPC_CheckField, 21, 1, 0, 102, 145, // Skip to: 40669
+/* 3447 */ MCD_OPC_Decode, 232, 13, 19, // Opcode: ST1Twov4s_POST
+/* 3451 */ MCD_OPC_FilterValue, 43, 94, 145, // Skip to: 40669
+/* 3455 */ MCD_OPC_CheckPredicate, 0, 90, 145, // Skip to: 40669
+/* 3459 */ MCD_OPC_CheckField, 21, 1, 0, 84, 145, // Skip to: 40669
+/* 3465 */ MCD_OPC_Decode, 226, 13, 19, // Opcode: ST1Twov2d_POST
+/* 3469 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 3477
+/* 3473 */ MCD_OPC_Decode, 199, 14, 3, // Opcode: STPDpost
+/* 3477 */ MCD_OPC_FilterValue, 5, 68, 145, // Skip to: 40669
+/* 3481 */ MCD_OPC_Decode, 202, 14, 3, // Opcode: STPQpost
+/* 3485 */ MCD_OPC_FilterValue, 3, 227, 3, // Skip to: 4484
+/* 3489 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 3492 */ MCD_OPC_FilterValue, 0, 197, 1, // Skip to: 3949
+/* 3496 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 3499 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 3517
+/* 3503 */ MCD_OPC_CheckPredicate, 0, 42, 145, // Skip to: 40669
+/* 3507 */ MCD_OPC_CheckField, 21, 1, 0, 36, 145, // Skip to: 40669
+/* 3513 */ MCD_OPC_Decode, 136, 7, 12, // Opcode: LD4Fourv8b_POST
+/* 3517 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 3535
+/* 3521 */ MCD_OPC_CheckPredicate, 0, 24, 145, // Skip to: 40669
+/* 3525 */ MCD_OPC_CheckField, 21, 1, 0, 18, 145, // Skip to: 40669
+/* 3531 */ MCD_OPC_Decode, 132, 7, 12, // Opcode: LD4Fourv4h_POST
+/* 3535 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 3553
+/* 3539 */ MCD_OPC_CheckPredicate, 0, 6, 145, // Skip to: 40669
+/* 3543 */ MCD_OPC_CheckField, 21, 1, 0, 0, 145, // Skip to: 40669
+/* 3549 */ MCD_OPC_Decode, 130, 7, 12, // Opcode: LD4Fourv2s_POST
+/* 3553 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 3571
+/* 3557 */ MCD_OPC_CheckPredicate, 0, 244, 144, // Skip to: 40669
+/* 3561 */ MCD_OPC_CheckField, 21, 1, 0, 238, 144, // Skip to: 40669
+/* 3567 */ MCD_OPC_Decode, 230, 5, 12, // Opcode: LD1Fourv8b_POST
+/* 3571 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 3589
+/* 3575 */ MCD_OPC_CheckPredicate, 0, 226, 144, // Skip to: 40669
+/* 3579 */ MCD_OPC_CheckField, 21, 1, 0, 220, 144, // Skip to: 40669
+/* 3585 */ MCD_OPC_Decode, 226, 5, 12, // Opcode: LD1Fourv4h_POST
+/* 3589 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 3607
+/* 3593 */ MCD_OPC_CheckPredicate, 0, 208, 144, // Skip to: 40669
+/* 3597 */ MCD_OPC_CheckField, 21, 1, 0, 202, 144, // Skip to: 40669
+/* 3603 */ MCD_OPC_Decode, 224, 5, 12, // Opcode: LD1Fourv2s_POST
+/* 3607 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 3625
+/* 3611 */ MCD_OPC_CheckPredicate, 0, 190, 144, // Skip to: 40669
+/* 3615 */ MCD_OPC_CheckField, 21, 1, 0, 184, 144, // Skip to: 40669
+/* 3621 */ MCD_OPC_Decode, 220, 5, 12, // Opcode: LD1Fourv1d_POST
+/* 3625 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 3643
+/* 3629 */ MCD_OPC_CheckPredicate, 0, 172, 144, // Skip to: 40669
+/* 3633 */ MCD_OPC_CheckField, 21, 1, 0, 166, 144, // Skip to: 40669
+/* 3639 */ MCD_OPC_Decode, 242, 6, 13, // Opcode: LD3Threev8b_POST
+/* 3643 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 3661
+/* 3647 */ MCD_OPC_CheckPredicate, 0, 154, 144, // Skip to: 40669
+/* 3651 */ MCD_OPC_CheckField, 21, 1, 0, 148, 144, // Skip to: 40669
+/* 3657 */ MCD_OPC_Decode, 238, 6, 13, // Opcode: LD3Threev4h_POST
+/* 3661 */ MCD_OPC_FilterValue, 18, 14, 0, // Skip to: 3679
+/* 3665 */ MCD_OPC_CheckPredicate, 0, 136, 144, // Skip to: 40669
+/* 3669 */ MCD_OPC_CheckField, 21, 1, 0, 130, 144, // Skip to: 40669
+/* 3675 */ MCD_OPC_Decode, 236, 6, 13, // Opcode: LD3Threev2s_POST
+/* 3679 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 3697
+/* 3683 */ MCD_OPC_CheckPredicate, 0, 118, 144, // Skip to: 40669
+/* 3687 */ MCD_OPC_CheckField, 21, 1, 0, 112, 144, // Skip to: 40669
+/* 3693 */ MCD_OPC_Decode, 150, 6, 13, // Opcode: LD1Threev8b_POST
+/* 3697 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 3715
+/* 3701 */ MCD_OPC_CheckPredicate, 0, 100, 144, // Skip to: 40669
+/* 3705 */ MCD_OPC_CheckField, 21, 1, 0, 94, 144, // Skip to: 40669
+/* 3711 */ MCD_OPC_Decode, 146, 6, 13, // Opcode: LD1Threev4h_POST
+/* 3715 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 3733
+/* 3719 */ MCD_OPC_CheckPredicate, 0, 82, 144, // Skip to: 40669
+/* 3723 */ MCD_OPC_CheckField, 21, 1, 0, 76, 144, // Skip to: 40669
+/* 3729 */ MCD_OPC_Decode, 144, 6, 13, // Opcode: LD1Threev2s_POST
+/* 3733 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 3751
+/* 3737 */ MCD_OPC_CheckPredicate, 0, 64, 144, // Skip to: 40669
+/* 3741 */ MCD_OPC_CheckField, 21, 1, 0, 58, 144, // Skip to: 40669
+/* 3747 */ MCD_OPC_Decode, 140, 6, 13, // Opcode: LD1Threev1d_POST
+/* 3751 */ MCD_OPC_FilterValue, 28, 14, 0, // Skip to: 3769
+/* 3755 */ MCD_OPC_CheckPredicate, 0, 46, 144, // Skip to: 40669
+/* 3759 */ MCD_OPC_CheckField, 21, 1, 0, 40, 144, // Skip to: 40669
+/* 3765 */ MCD_OPC_Decode, 246, 5, 14, // Opcode: LD1Onev8b_POST
+/* 3769 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 3787
+/* 3773 */ MCD_OPC_CheckPredicate, 0, 28, 144, // Skip to: 40669
+/* 3777 */ MCD_OPC_CheckField, 21, 1, 0, 22, 144, // Skip to: 40669
+/* 3783 */ MCD_OPC_Decode, 242, 5, 14, // Opcode: LD1Onev4h_POST
+/* 3787 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 3805
+/* 3791 */ MCD_OPC_CheckPredicate, 0, 10, 144, // Skip to: 40669
+/* 3795 */ MCD_OPC_CheckField, 21, 1, 0, 4, 144, // Skip to: 40669
+/* 3801 */ MCD_OPC_Decode, 240, 5, 14, // Opcode: LD1Onev2s_POST
+/* 3805 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 3823
+/* 3809 */ MCD_OPC_CheckPredicate, 0, 248, 143, // Skip to: 40669
+/* 3813 */ MCD_OPC_CheckField, 21, 1, 0, 242, 143, // Skip to: 40669
+/* 3819 */ MCD_OPC_Decode, 236, 5, 14, // Opcode: LD1Onev1d_POST
+/* 3823 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 3841
+/* 3827 */ MCD_OPC_CheckPredicate, 0, 230, 143, // Skip to: 40669
+/* 3831 */ MCD_OPC_CheckField, 21, 1, 0, 224, 143, // Skip to: 40669
+/* 3837 */ MCD_OPC_Decode, 204, 6, 15, // Opcode: LD2Twov8b_POST
+/* 3841 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 3859
+/* 3845 */ MCD_OPC_CheckPredicate, 0, 212, 143, // Skip to: 40669
+/* 3849 */ MCD_OPC_CheckField, 21, 1, 0, 206, 143, // Skip to: 40669
+/* 3855 */ MCD_OPC_Decode, 200, 6, 15, // Opcode: LD2Twov4h_POST
+/* 3859 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 3877
+/* 3863 */ MCD_OPC_CheckPredicate, 0, 194, 143, // Skip to: 40669
+/* 3867 */ MCD_OPC_CheckField, 21, 1, 0, 188, 143, // Skip to: 40669
+/* 3873 */ MCD_OPC_Decode, 198, 6, 15, // Opcode: LD2Twov2s_POST
+/* 3877 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 3895
+/* 3881 */ MCD_OPC_CheckPredicate, 0, 176, 143, // Skip to: 40669
+/* 3885 */ MCD_OPC_CheckField, 21, 1, 0, 170, 143, // Skip to: 40669
+/* 3891 */ MCD_OPC_Decode, 166, 6, 15, // Opcode: LD1Twov8b_POST
+/* 3895 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 3913
+/* 3899 */ MCD_OPC_CheckPredicate, 0, 158, 143, // Skip to: 40669
+/* 3903 */ MCD_OPC_CheckField, 21, 1, 0, 152, 143, // Skip to: 40669
+/* 3909 */ MCD_OPC_Decode, 162, 6, 15, // Opcode: LD1Twov4h_POST
+/* 3913 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 3931
+/* 3917 */ MCD_OPC_CheckPredicate, 0, 140, 143, // Skip to: 40669
+/* 3921 */ MCD_OPC_CheckField, 21, 1, 0, 134, 143, // Skip to: 40669
+/* 3927 */ MCD_OPC_Decode, 160, 6, 15, // Opcode: LD1Twov2s_POST
+/* 3931 */ MCD_OPC_FilterValue, 43, 126, 143, // Skip to: 40669
+/* 3935 */ MCD_OPC_CheckPredicate, 0, 122, 143, // Skip to: 40669
+/* 3939 */ MCD_OPC_CheckField, 21, 1, 0, 116, 143, // Skip to: 40669
+/* 3945 */ MCD_OPC_Decode, 156, 6, 15, // Opcode: LD1Twov1d_POST
+/* 3949 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 3957
+/* 3953 */ MCD_OPC_Decode, 188, 7, 3, // Opcode: LDPSpost
+/* 3957 */ MCD_OPC_FilterValue, 2, 251, 1, // Skip to: 4468
+/* 3961 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 3964 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 3982
+/* 3968 */ MCD_OPC_CheckPredicate, 0, 89, 143, // Skip to: 40669
+/* 3972 */ MCD_OPC_CheckField, 21, 1, 0, 83, 143, // Skip to: 40669
+/* 3978 */ MCD_OPC_Decode, 254, 6, 16, // Opcode: LD4Fourv16b_POST
+/* 3982 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 4000
+/* 3986 */ MCD_OPC_CheckPredicate, 0, 71, 143, // Skip to: 40669
+/* 3990 */ MCD_OPC_CheckField, 21, 1, 0, 65, 143, // Skip to: 40669
+/* 3996 */ MCD_OPC_Decode, 138, 7, 16, // Opcode: LD4Fourv8h_POST
+/* 4000 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 4018
+/* 4004 */ MCD_OPC_CheckPredicate, 0, 53, 143, // Skip to: 40669
+/* 4008 */ MCD_OPC_CheckField, 21, 1, 0, 47, 143, // Skip to: 40669
+/* 4014 */ MCD_OPC_Decode, 134, 7, 16, // Opcode: LD4Fourv4s_POST
+/* 4018 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 4036
+/* 4022 */ MCD_OPC_CheckPredicate, 0, 35, 143, // Skip to: 40669
+/* 4026 */ MCD_OPC_CheckField, 21, 1, 0, 29, 143, // Skip to: 40669
+/* 4032 */ MCD_OPC_Decode, 128, 7, 16, // Opcode: LD4Fourv2d_POST
+/* 4036 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 4054
+/* 4040 */ MCD_OPC_CheckPredicate, 0, 17, 143, // Skip to: 40669
+/* 4044 */ MCD_OPC_CheckField, 21, 1, 0, 11, 143, // Skip to: 40669
+/* 4050 */ MCD_OPC_Decode, 218, 5, 16, // Opcode: LD1Fourv16b_POST
+/* 4054 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 4072
+/* 4058 */ MCD_OPC_CheckPredicate, 0, 255, 142, // Skip to: 40669
+/* 4062 */ MCD_OPC_CheckField, 21, 1, 0, 249, 142, // Skip to: 40669
+/* 4068 */ MCD_OPC_Decode, 232, 5, 16, // Opcode: LD1Fourv8h_POST
+/* 4072 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 4090
+/* 4076 */ MCD_OPC_CheckPredicate, 0, 237, 142, // Skip to: 40669
+/* 4080 */ MCD_OPC_CheckField, 21, 1, 0, 231, 142, // Skip to: 40669
+/* 4086 */ MCD_OPC_Decode, 228, 5, 16, // Opcode: LD1Fourv4s_POST
+/* 4090 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 4108
+/* 4094 */ MCD_OPC_CheckPredicate, 0, 219, 142, // Skip to: 40669
+/* 4098 */ MCD_OPC_CheckField, 21, 1, 0, 213, 142, // Skip to: 40669
+/* 4104 */ MCD_OPC_Decode, 222, 5, 16, // Opcode: LD1Fourv2d_POST
+/* 4108 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 4126
+/* 4112 */ MCD_OPC_CheckPredicate, 0, 201, 142, // Skip to: 40669
+/* 4116 */ MCD_OPC_CheckField, 21, 1, 0, 195, 142, // Skip to: 40669
+/* 4122 */ MCD_OPC_Decode, 232, 6, 17, // Opcode: LD3Threev16b_POST
+/* 4126 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 4144
+/* 4130 */ MCD_OPC_CheckPredicate, 0, 183, 142, // Skip to: 40669
+/* 4134 */ MCD_OPC_CheckField, 21, 1, 0, 177, 142, // Skip to: 40669
+/* 4140 */ MCD_OPC_Decode, 244, 6, 17, // Opcode: LD3Threev8h_POST
+/* 4144 */ MCD_OPC_FilterValue, 18, 14, 0, // Skip to: 4162
+/* 4148 */ MCD_OPC_CheckPredicate, 0, 165, 142, // Skip to: 40669
+/* 4152 */ MCD_OPC_CheckField, 21, 1, 0, 159, 142, // Skip to: 40669
+/* 4158 */ MCD_OPC_Decode, 240, 6, 17, // Opcode: LD3Threev4s_POST
+/* 4162 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 4180
+/* 4166 */ MCD_OPC_CheckPredicate, 0, 147, 142, // Skip to: 40669
+/* 4170 */ MCD_OPC_CheckField, 21, 1, 0, 141, 142, // Skip to: 40669
+/* 4176 */ MCD_OPC_Decode, 234, 6, 17, // Opcode: LD3Threev2d_POST
+/* 4180 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 4198
+/* 4184 */ MCD_OPC_CheckPredicate, 0, 129, 142, // Skip to: 40669
+/* 4188 */ MCD_OPC_CheckField, 21, 1, 0, 123, 142, // Skip to: 40669
+/* 4194 */ MCD_OPC_Decode, 138, 6, 17, // Opcode: LD1Threev16b_POST
+/* 4198 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 4216
+/* 4202 */ MCD_OPC_CheckPredicate, 0, 111, 142, // Skip to: 40669
+/* 4206 */ MCD_OPC_CheckField, 21, 1, 0, 105, 142, // Skip to: 40669
+/* 4212 */ MCD_OPC_Decode, 152, 6, 17, // Opcode: LD1Threev8h_POST
+/* 4216 */ MCD_OPC_FilterValue, 26, 14, 0, // Skip to: 4234
+/* 4220 */ MCD_OPC_CheckPredicate, 0, 93, 142, // Skip to: 40669
+/* 4224 */ MCD_OPC_CheckField, 21, 1, 0, 87, 142, // Skip to: 40669
+/* 4230 */ MCD_OPC_Decode, 148, 6, 17, // Opcode: LD1Threev4s_POST
+/* 4234 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 4252
+/* 4238 */ MCD_OPC_CheckPredicate, 0, 75, 142, // Skip to: 40669
+/* 4242 */ MCD_OPC_CheckField, 21, 1, 0, 69, 142, // Skip to: 40669
+/* 4248 */ MCD_OPC_Decode, 142, 6, 17, // Opcode: LD1Threev2d_POST
+/* 4252 */ MCD_OPC_FilterValue, 28, 14, 0, // Skip to: 4270
+/* 4256 */ MCD_OPC_CheckPredicate, 0, 57, 142, // Skip to: 40669
+/* 4260 */ MCD_OPC_CheckField, 21, 1, 0, 51, 142, // Skip to: 40669
+/* 4266 */ MCD_OPC_Decode, 234, 5, 18, // Opcode: LD1Onev16b_POST
+/* 4270 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 4288
+/* 4274 */ MCD_OPC_CheckPredicate, 0, 39, 142, // Skip to: 40669
+/* 4278 */ MCD_OPC_CheckField, 21, 1, 0, 33, 142, // Skip to: 40669
+/* 4284 */ MCD_OPC_Decode, 248, 5, 18, // Opcode: LD1Onev8h_POST
+/* 4288 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 4306
+/* 4292 */ MCD_OPC_CheckPredicate, 0, 21, 142, // Skip to: 40669
+/* 4296 */ MCD_OPC_CheckField, 21, 1, 0, 15, 142, // Skip to: 40669
+/* 4302 */ MCD_OPC_Decode, 244, 5, 18, // Opcode: LD1Onev4s_POST
+/* 4306 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 4324
+/* 4310 */ MCD_OPC_CheckPredicate, 0, 3, 142, // Skip to: 40669
+/* 4314 */ MCD_OPC_CheckField, 21, 1, 0, 253, 141, // Skip to: 40669
+/* 4320 */ MCD_OPC_Decode, 238, 5, 18, // Opcode: LD1Onev2d_POST
+/* 4324 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 4342
+/* 4328 */ MCD_OPC_CheckPredicate, 0, 241, 141, // Skip to: 40669
+/* 4332 */ MCD_OPC_CheckField, 21, 1, 0, 235, 141, // Skip to: 40669
+/* 4338 */ MCD_OPC_Decode, 194, 6, 19, // Opcode: LD2Twov16b_POST
+/* 4342 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 4360
+/* 4346 */ MCD_OPC_CheckPredicate, 0, 223, 141, // Skip to: 40669
+/* 4350 */ MCD_OPC_CheckField, 21, 1, 0, 217, 141, // Skip to: 40669
+/* 4356 */ MCD_OPC_Decode, 206, 6, 19, // Opcode: LD2Twov8h_POST
+/* 4360 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 4378
+/* 4364 */ MCD_OPC_CheckPredicate, 0, 205, 141, // Skip to: 40669
+/* 4368 */ MCD_OPC_CheckField, 21, 1, 0, 199, 141, // Skip to: 40669
+/* 4374 */ MCD_OPC_Decode, 202, 6, 19, // Opcode: LD2Twov4s_POST
+/* 4378 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 4396
+/* 4382 */ MCD_OPC_CheckPredicate, 0, 187, 141, // Skip to: 40669
+/* 4386 */ MCD_OPC_CheckField, 21, 1, 0, 181, 141, // Skip to: 40669
+/* 4392 */ MCD_OPC_Decode, 196, 6, 19, // Opcode: LD2Twov2d_POST
+/* 4396 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 4414
+/* 4400 */ MCD_OPC_CheckPredicate, 0, 169, 141, // Skip to: 40669
+/* 4404 */ MCD_OPC_CheckField, 21, 1, 0, 163, 141, // Skip to: 40669
+/* 4410 */ MCD_OPC_Decode, 154, 6, 19, // Opcode: LD1Twov16b_POST
+/* 4414 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 4432
+/* 4418 */ MCD_OPC_CheckPredicate, 0, 151, 141, // Skip to: 40669
+/* 4422 */ MCD_OPC_CheckField, 21, 1, 0, 145, 141, // Skip to: 40669
+/* 4428 */ MCD_OPC_Decode, 168, 6, 19, // Opcode: LD1Twov8h_POST
+/* 4432 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 4450
+/* 4436 */ MCD_OPC_CheckPredicate, 0, 133, 141, // Skip to: 40669
+/* 4440 */ MCD_OPC_CheckField, 21, 1, 0, 127, 141, // Skip to: 40669
+/* 4446 */ MCD_OPC_Decode, 164, 6, 19, // Opcode: LD1Twov4s_POST
+/* 4450 */ MCD_OPC_FilterValue, 43, 119, 141, // Skip to: 40669
+/* 4454 */ MCD_OPC_CheckPredicate, 0, 115, 141, // Skip to: 40669
+/* 4458 */ MCD_OPC_CheckField, 21, 1, 0, 109, 141, // Skip to: 40669
+/* 4464 */ MCD_OPC_Decode, 158, 6, 19, // Opcode: LD1Twov2d_POST
+/* 4468 */ MCD_OPC_FilterValue, 3, 4, 0, // Skip to: 4476
+/* 4472 */ MCD_OPC_Decode, 179, 7, 3, // Opcode: LDPDpost
+/* 4476 */ MCD_OPC_FilterValue, 5, 93, 141, // Skip to: 40669
+/* 4480 */ MCD_OPC_Decode, 182, 7, 3, // Opcode: LDPQpost
+/* 4484 */ MCD_OPC_FilterValue, 4, 155, 1, // Skip to: 4899
+/* 4488 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ...
+/* 4491 */ MCD_OPC_FilterValue, 0, 117, 1, // Skip to: 4868
+/* 4495 */ MCD_OPC_ExtractField, 13, 9, // Inst{21-13} ...
+/* 4498 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4516
+/* 4502 */ MCD_OPC_CheckPredicate, 0, 67, 141, // Skip to: 40669
+/* 4506 */ MCD_OPC_CheckField, 31, 1, 0, 61, 141, // Skip to: 40669
+/* 4512 */ MCD_OPC_Decode, 243, 13, 20, // Opcode: ST1i8
+/* 4516 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 4534
+/* 4520 */ MCD_OPC_CheckPredicate, 0, 49, 141, // Skip to: 40669
+/* 4524 */ MCD_OPC_CheckField, 31, 1, 0, 43, 141, // Skip to: 40669
+/* 4530 */ MCD_OPC_Decode, 159, 14, 21, // Opcode: ST3i8
+/* 4534 */ MCD_OPC_FilterValue, 2, 20, 0, // Skip to: 4558
+/* 4538 */ MCD_OPC_CheckPredicate, 0, 31, 141, // Skip to: 40669
+/* 4542 */ MCD_OPC_CheckField, 31, 1, 0, 25, 141, // Skip to: 40669
+/* 4548 */ MCD_OPC_CheckField, 10, 1, 0, 19, 141, // Skip to: 40669
+/* 4554 */ MCD_OPC_Decode, 237, 13, 22, // Opcode: ST1i16
+/* 4558 */ MCD_OPC_FilterValue, 3, 20, 0, // Skip to: 4582
+/* 4562 */ MCD_OPC_CheckPredicate, 0, 7, 141, // Skip to: 40669
+/* 4566 */ MCD_OPC_CheckField, 31, 1, 0, 1, 141, // Skip to: 40669
+/* 4572 */ MCD_OPC_CheckField, 10, 1, 0, 251, 140, // Skip to: 40669
+/* 4578 */ MCD_OPC_Decode, 153, 14, 23, // Opcode: ST3i16
+/* 4582 */ MCD_OPC_FilterValue, 4, 45, 0, // Skip to: 4631
+/* 4586 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 4589 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4607
+/* 4593 */ MCD_OPC_CheckPredicate, 0, 232, 140, // Skip to: 40669
+/* 4597 */ MCD_OPC_CheckField, 31, 1, 0, 226, 140, // Skip to: 40669
+/* 4603 */ MCD_OPC_Decode, 239, 13, 24, // Opcode: ST1i32
+/* 4607 */ MCD_OPC_FilterValue, 1, 218, 140, // Skip to: 40669
+/* 4611 */ MCD_OPC_CheckPredicate, 0, 214, 140, // Skip to: 40669
+/* 4615 */ MCD_OPC_CheckField, 31, 1, 0, 208, 140, // Skip to: 40669
+/* 4621 */ MCD_OPC_CheckField, 12, 1, 0, 202, 140, // Skip to: 40669
+/* 4627 */ MCD_OPC_Decode, 241, 13, 25, // Opcode: ST1i64
+/* 4631 */ MCD_OPC_FilterValue, 5, 45, 0, // Skip to: 4680
+/* 4635 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 4638 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4656
+/* 4642 */ MCD_OPC_CheckPredicate, 0, 183, 140, // Skip to: 40669
+/* 4646 */ MCD_OPC_CheckField, 31, 1, 0, 177, 140, // Skip to: 40669
+/* 4652 */ MCD_OPC_Decode, 155, 14, 26, // Opcode: ST3i32
+/* 4656 */ MCD_OPC_FilterValue, 1, 169, 140, // Skip to: 40669
+/* 4660 */ MCD_OPC_CheckPredicate, 0, 165, 140, // Skip to: 40669
+/* 4664 */ MCD_OPC_CheckField, 31, 1, 0, 159, 140, // Skip to: 40669
+/* 4670 */ MCD_OPC_CheckField, 12, 1, 0, 153, 140, // Skip to: 40669
+/* 4676 */ MCD_OPC_Decode, 157, 14, 27, // Opcode: ST3i64
+/* 4680 */ MCD_OPC_FilterValue, 128, 2, 14, 0, // Skip to: 4699
+/* 4685 */ MCD_OPC_CheckPredicate, 0, 140, 140, // Skip to: 40669
+/* 4689 */ MCD_OPC_CheckField, 31, 1, 0, 134, 140, // Skip to: 40669
+/* 4695 */ MCD_OPC_Decode, 137, 14, 28, // Opcode: ST2i8
+/* 4699 */ MCD_OPC_FilterValue, 129, 2, 14, 0, // Skip to: 4718
+/* 4704 */ MCD_OPC_CheckPredicate, 0, 121, 140, // Skip to: 40669
+/* 4708 */ MCD_OPC_CheckField, 31, 1, 0, 115, 140, // Skip to: 40669
+/* 4714 */ MCD_OPC_Decode, 181, 14, 29, // Opcode: ST4i8
+/* 4718 */ MCD_OPC_FilterValue, 130, 2, 20, 0, // Skip to: 4743
+/* 4723 */ MCD_OPC_CheckPredicate, 0, 102, 140, // Skip to: 40669
+/* 4727 */ MCD_OPC_CheckField, 31, 1, 0, 96, 140, // Skip to: 40669
+/* 4733 */ MCD_OPC_CheckField, 10, 1, 0, 90, 140, // Skip to: 40669
+/* 4739 */ MCD_OPC_Decode, 131, 14, 30, // Opcode: ST2i16
+/* 4743 */ MCD_OPC_FilterValue, 131, 2, 20, 0, // Skip to: 4768
+/* 4748 */ MCD_OPC_CheckPredicate, 0, 77, 140, // Skip to: 40669
+/* 4752 */ MCD_OPC_CheckField, 31, 1, 0, 71, 140, // Skip to: 40669
+/* 4758 */ MCD_OPC_CheckField, 10, 1, 0, 65, 140, // Skip to: 40669
+/* 4764 */ MCD_OPC_Decode, 175, 14, 31, // Opcode: ST4i16
+/* 4768 */ MCD_OPC_FilterValue, 132, 2, 45, 0, // Skip to: 4818
+/* 4773 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 4776 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4794
+/* 4780 */ MCD_OPC_CheckPredicate, 0, 45, 140, // Skip to: 40669
+/* 4784 */ MCD_OPC_CheckField, 31, 1, 0, 39, 140, // Skip to: 40669
+/* 4790 */ MCD_OPC_Decode, 133, 14, 32, // Opcode: ST2i32
+/* 4794 */ MCD_OPC_FilterValue, 1, 31, 140, // Skip to: 40669
+/* 4798 */ MCD_OPC_CheckPredicate, 0, 27, 140, // Skip to: 40669
+/* 4802 */ MCD_OPC_CheckField, 31, 1, 0, 21, 140, // Skip to: 40669
+/* 4808 */ MCD_OPC_CheckField, 12, 1, 0, 15, 140, // Skip to: 40669
+/* 4814 */ MCD_OPC_Decode, 135, 14, 33, // Opcode: ST2i64
+/* 4818 */ MCD_OPC_FilterValue, 133, 2, 6, 140, // Skip to: 40669
+/* 4823 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 4826 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4844
+/* 4830 */ MCD_OPC_CheckPredicate, 0, 251, 139, // Skip to: 40669
+/* 4834 */ MCD_OPC_CheckField, 31, 1, 0, 245, 139, // Skip to: 40669
+/* 4840 */ MCD_OPC_Decode, 177, 14, 34, // Opcode: ST4i32
+/* 4844 */ MCD_OPC_FilterValue, 1, 237, 139, // Skip to: 40669
+/* 4848 */ MCD_OPC_CheckPredicate, 0, 233, 139, // Skip to: 40669
+/* 4852 */ MCD_OPC_CheckField, 31, 1, 0, 227, 139, // Skip to: 40669
+/* 4858 */ MCD_OPC_CheckField, 12, 1, 0, 221, 139, // Skip to: 40669
+/* 4864 */ MCD_OPC_Decode, 179, 14, 35, // Opcode: ST4i64
+/* 4868 */ MCD_OPC_FilterValue, 1, 213, 139, // Skip to: 40669
+/* 4872 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 4875 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 4883
+/* 4879 */ MCD_OPC_Decode, 204, 14, 3, // Opcode: STPSi
+/* 4883 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 4891
+/* 4887 */ MCD_OPC_Decode, 198, 14, 3, // Opcode: STPDi
+/* 4891 */ MCD_OPC_FilterValue, 2, 190, 139, // Skip to: 40669
+/* 4895 */ MCD_OPC_Decode, 201, 14, 3, // Opcode: STPQi
+/* 4899 */ MCD_OPC_FilterValue, 5, 169, 3, // Skip to: 5840
+/* 4903 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ...
+/* 4906 */ MCD_OPC_FilterValue, 0, 131, 3, // Skip to: 5809
+/* 4910 */ MCD_OPC_ExtractField, 13, 9, // Inst{21-13} ...
+/* 4913 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 4931
+/* 4917 */ MCD_OPC_CheckPredicate, 0, 164, 139, // Skip to: 40669
+/* 4921 */ MCD_OPC_CheckField, 31, 1, 0, 158, 139, // Skip to: 40669
+/* 4927 */ MCD_OPC_Decode, 175, 6, 36, // Opcode: LD1i8
+/* 4931 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 4949
+/* 4935 */ MCD_OPC_CheckPredicate, 0, 146, 139, // Skip to: 40669
+/* 4939 */ MCD_OPC_CheckField, 31, 1, 0, 140, 139, // Skip to: 40669
+/* 4945 */ MCD_OPC_Decode, 251, 6, 37, // Opcode: LD3i8
+/* 4949 */ MCD_OPC_FilterValue, 2, 20, 0, // Skip to: 4973
+/* 4953 */ MCD_OPC_CheckPredicate, 0, 128, 139, // Skip to: 40669
+/* 4957 */ MCD_OPC_CheckField, 31, 1, 0, 122, 139, // Skip to: 40669
+/* 4963 */ MCD_OPC_CheckField, 10, 1, 0, 116, 139, // Skip to: 40669
+/* 4969 */ MCD_OPC_Decode, 169, 6, 38, // Opcode: LD1i16
+/* 4973 */ MCD_OPC_FilterValue, 3, 20, 0, // Skip to: 4997
+/* 4977 */ MCD_OPC_CheckPredicate, 0, 104, 139, // Skip to: 40669
+/* 4981 */ MCD_OPC_CheckField, 31, 1, 0, 98, 139, // Skip to: 40669
+/* 4987 */ MCD_OPC_CheckField, 10, 1, 0, 92, 139, // Skip to: 40669
+/* 4993 */ MCD_OPC_Decode, 245, 6, 39, // Opcode: LD3i16
+/* 4997 */ MCD_OPC_FilterValue, 4, 45, 0, // Skip to: 5046
+/* 5001 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 5004 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5022
+/* 5008 */ MCD_OPC_CheckPredicate, 0, 73, 139, // Skip to: 40669
+/* 5012 */ MCD_OPC_CheckField, 31, 1, 0, 67, 139, // Skip to: 40669
+/* 5018 */ MCD_OPC_Decode, 171, 6, 40, // Opcode: LD1i32
+/* 5022 */ MCD_OPC_FilterValue, 1, 59, 139, // Skip to: 40669
+/* 5026 */ MCD_OPC_CheckPredicate, 0, 55, 139, // Skip to: 40669
+/* 5030 */ MCD_OPC_CheckField, 31, 1, 0, 49, 139, // Skip to: 40669
+/* 5036 */ MCD_OPC_CheckField, 12, 1, 0, 43, 139, // Skip to: 40669
+/* 5042 */ MCD_OPC_Decode, 173, 6, 41, // Opcode: LD1i64
+/* 5046 */ MCD_OPC_FilterValue, 5, 45, 0, // Skip to: 5095
+/* 5050 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 5053 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5071
+/* 5057 */ MCD_OPC_CheckPredicate, 0, 24, 139, // Skip to: 40669
+/* 5061 */ MCD_OPC_CheckField, 31, 1, 0, 18, 139, // Skip to: 40669
+/* 5067 */ MCD_OPC_Decode, 247, 6, 42, // Opcode: LD3i32
+/* 5071 */ MCD_OPC_FilterValue, 1, 10, 139, // Skip to: 40669
+/* 5075 */ MCD_OPC_CheckPredicate, 0, 6, 139, // Skip to: 40669
+/* 5079 */ MCD_OPC_CheckField, 31, 1, 0, 0, 139, // Skip to: 40669
+/* 5085 */ MCD_OPC_CheckField, 12, 1, 0, 250, 138, // Skip to: 40669
+/* 5091 */ MCD_OPC_Decode, 249, 6, 43, // Opcode: LD3i64
+/* 5095 */ MCD_OPC_FilterValue, 6, 127, 0, // Skip to: 5226
+/* 5099 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
+/* 5102 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5133
+/* 5106 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5109 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5121
+/* 5113 */ MCD_OPC_CheckPredicate, 0, 224, 138, // Skip to: 40669
+/* 5117 */ MCD_OPC_Decode, 133, 6, 6, // Opcode: LD1Rv8b
+/* 5121 */ MCD_OPC_FilterValue, 1, 216, 138, // Skip to: 40669
+/* 5125 */ MCD_OPC_CheckPredicate, 0, 212, 138, // Skip to: 40669
+/* 5129 */ MCD_OPC_Decode, 249, 5, 10, // Opcode: LD1Rv16b
+/* 5133 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 5164
+/* 5137 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5140 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5152
+/* 5144 */ MCD_OPC_CheckPredicate, 0, 193, 138, // Skip to: 40669
+/* 5148 */ MCD_OPC_Decode, 129, 6, 6, // Opcode: LD1Rv4h
+/* 5152 */ MCD_OPC_FilterValue, 1, 185, 138, // Skip to: 40669
+/* 5156 */ MCD_OPC_CheckPredicate, 0, 181, 138, // Skip to: 40669
+/* 5160 */ MCD_OPC_Decode, 135, 6, 10, // Opcode: LD1Rv8h
+/* 5164 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 5195
+/* 5168 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5171 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5183
+/* 5175 */ MCD_OPC_CheckPredicate, 0, 162, 138, // Skip to: 40669
+/* 5179 */ MCD_OPC_Decode, 255, 5, 6, // Opcode: LD1Rv2s
+/* 5183 */ MCD_OPC_FilterValue, 1, 154, 138, // Skip to: 40669
+/* 5187 */ MCD_OPC_CheckPredicate, 0, 150, 138, // Skip to: 40669
+/* 5191 */ MCD_OPC_Decode, 131, 6, 10, // Opcode: LD1Rv4s
+/* 5195 */ MCD_OPC_FilterValue, 3, 142, 138, // Skip to: 40669
+/* 5199 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5202 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5214
+/* 5206 */ MCD_OPC_CheckPredicate, 0, 131, 138, // Skip to: 40669
+/* 5210 */ MCD_OPC_Decode, 251, 5, 6, // Opcode: LD1Rv1d
+/* 5214 */ MCD_OPC_FilterValue, 1, 123, 138, // Skip to: 40669
+/* 5218 */ MCD_OPC_CheckPredicate, 0, 119, 138, // Skip to: 40669
+/* 5222 */ MCD_OPC_Decode, 253, 5, 10, // Opcode: LD1Rv2d
+/* 5226 */ MCD_OPC_FilterValue, 7, 127, 0, // Skip to: 5357
+/* 5230 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
+/* 5233 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5264
+/* 5237 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5240 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5252
+/* 5244 */ MCD_OPC_CheckPredicate, 0, 93, 138, // Skip to: 40669
+/* 5248 */ MCD_OPC_Decode, 227, 6, 5, // Opcode: LD3Rv8b
+/* 5252 */ MCD_OPC_FilterValue, 1, 85, 138, // Skip to: 40669
+/* 5256 */ MCD_OPC_CheckPredicate, 0, 81, 138, // Skip to: 40669
+/* 5260 */ MCD_OPC_Decode, 215, 6, 9, // Opcode: LD3Rv16b
+/* 5264 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 5295
+/* 5268 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5271 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5283
+/* 5275 */ MCD_OPC_CheckPredicate, 0, 62, 138, // Skip to: 40669
+/* 5279 */ MCD_OPC_Decode, 223, 6, 5, // Opcode: LD3Rv4h
+/* 5283 */ MCD_OPC_FilterValue, 1, 54, 138, // Skip to: 40669
+/* 5287 */ MCD_OPC_CheckPredicate, 0, 50, 138, // Skip to: 40669
+/* 5291 */ MCD_OPC_Decode, 229, 6, 9, // Opcode: LD3Rv8h
+/* 5295 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 5326
+/* 5299 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5302 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5314
+/* 5306 */ MCD_OPC_CheckPredicate, 0, 31, 138, // Skip to: 40669
+/* 5310 */ MCD_OPC_Decode, 221, 6, 5, // Opcode: LD3Rv2s
+/* 5314 */ MCD_OPC_FilterValue, 1, 23, 138, // Skip to: 40669
+/* 5318 */ MCD_OPC_CheckPredicate, 0, 19, 138, // Skip to: 40669
+/* 5322 */ MCD_OPC_Decode, 225, 6, 9, // Opcode: LD3Rv4s
+/* 5326 */ MCD_OPC_FilterValue, 3, 11, 138, // Skip to: 40669
+/* 5330 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5333 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5345
+/* 5337 */ MCD_OPC_CheckPredicate, 0, 0, 138, // Skip to: 40669
+/* 5341 */ MCD_OPC_Decode, 217, 6, 5, // Opcode: LD3Rv1d
+/* 5345 */ MCD_OPC_FilterValue, 1, 248, 137, // Skip to: 40669
+/* 5349 */ MCD_OPC_CheckPredicate, 0, 244, 137, // Skip to: 40669
+/* 5353 */ MCD_OPC_Decode, 219, 6, 9, // Opcode: LD3Rv2d
+/* 5357 */ MCD_OPC_FilterValue, 128, 2, 14, 0, // Skip to: 5376
+/* 5362 */ MCD_OPC_CheckPredicate, 0, 231, 137, // Skip to: 40669
+/* 5366 */ MCD_OPC_CheckField, 31, 1, 0, 225, 137, // Skip to: 40669
+/* 5372 */ MCD_OPC_Decode, 213, 6, 44, // Opcode: LD2i8
+/* 5376 */ MCD_OPC_FilterValue, 129, 2, 14, 0, // Skip to: 5395
+/* 5381 */ MCD_OPC_CheckPredicate, 0, 212, 137, // Skip to: 40669
+/* 5385 */ MCD_OPC_CheckField, 31, 1, 0, 206, 137, // Skip to: 40669
+/* 5391 */ MCD_OPC_Decode, 161, 7, 45, // Opcode: LD4i8
+/* 5395 */ MCD_OPC_FilterValue, 130, 2, 20, 0, // Skip to: 5420
+/* 5400 */ MCD_OPC_CheckPredicate, 0, 193, 137, // Skip to: 40669
+/* 5404 */ MCD_OPC_CheckField, 31, 1, 0, 187, 137, // Skip to: 40669
+/* 5410 */ MCD_OPC_CheckField, 10, 1, 0, 181, 137, // Skip to: 40669
+/* 5416 */ MCD_OPC_Decode, 207, 6, 46, // Opcode: LD2i16
+/* 5420 */ MCD_OPC_FilterValue, 131, 2, 20, 0, // Skip to: 5445
+/* 5425 */ MCD_OPC_CheckPredicate, 0, 168, 137, // Skip to: 40669
+/* 5429 */ MCD_OPC_CheckField, 31, 1, 0, 162, 137, // Skip to: 40669
+/* 5435 */ MCD_OPC_CheckField, 10, 1, 0, 156, 137, // Skip to: 40669
+/* 5441 */ MCD_OPC_Decode, 155, 7, 47, // Opcode: LD4i16
+/* 5445 */ MCD_OPC_FilterValue, 132, 2, 45, 0, // Skip to: 5495
+/* 5450 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 5453 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5471
+/* 5457 */ MCD_OPC_CheckPredicate, 0, 136, 137, // Skip to: 40669
+/* 5461 */ MCD_OPC_CheckField, 31, 1, 0, 130, 137, // Skip to: 40669
+/* 5467 */ MCD_OPC_Decode, 209, 6, 48, // Opcode: LD2i32
+/* 5471 */ MCD_OPC_FilterValue, 1, 122, 137, // Skip to: 40669
+/* 5475 */ MCD_OPC_CheckPredicate, 0, 118, 137, // Skip to: 40669
+/* 5479 */ MCD_OPC_CheckField, 31, 1, 0, 112, 137, // Skip to: 40669
+/* 5485 */ MCD_OPC_CheckField, 12, 1, 0, 106, 137, // Skip to: 40669
+/* 5491 */ MCD_OPC_Decode, 211, 6, 49, // Opcode: LD2i64
+/* 5495 */ MCD_OPC_FilterValue, 133, 2, 45, 0, // Skip to: 5545
+/* 5500 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 5503 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5521
+/* 5507 */ MCD_OPC_CheckPredicate, 0, 86, 137, // Skip to: 40669
+/* 5511 */ MCD_OPC_CheckField, 31, 1, 0, 80, 137, // Skip to: 40669
+/* 5517 */ MCD_OPC_Decode, 157, 7, 50, // Opcode: LD4i32
+/* 5521 */ MCD_OPC_FilterValue, 1, 72, 137, // Skip to: 40669
+/* 5525 */ MCD_OPC_CheckPredicate, 0, 68, 137, // Skip to: 40669
+/* 5529 */ MCD_OPC_CheckField, 31, 1, 0, 62, 137, // Skip to: 40669
+/* 5535 */ MCD_OPC_CheckField, 12, 1, 0, 56, 137, // Skip to: 40669
+/* 5541 */ MCD_OPC_Decode, 159, 7, 51, // Opcode: LD4i64
+/* 5545 */ MCD_OPC_FilterValue, 134, 2, 127, 0, // Skip to: 5677
+/* 5550 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
+/* 5553 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5584
+/* 5557 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5560 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5572
+/* 5564 */ MCD_OPC_CheckPredicate, 0, 29, 137, // Skip to: 40669
+/* 5568 */ MCD_OPC_Decode, 189, 6, 7, // Opcode: LD2Rv8b
+/* 5572 */ MCD_OPC_FilterValue, 1, 21, 137, // Skip to: 40669
+/* 5576 */ MCD_OPC_CheckPredicate, 0, 17, 137, // Skip to: 40669
+/* 5580 */ MCD_OPC_Decode, 177, 6, 11, // Opcode: LD2Rv16b
+/* 5584 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 5615
+/* 5588 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5591 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5603
+/* 5595 */ MCD_OPC_CheckPredicate, 0, 254, 136, // Skip to: 40669
+/* 5599 */ MCD_OPC_Decode, 185, 6, 7, // Opcode: LD2Rv4h
+/* 5603 */ MCD_OPC_FilterValue, 1, 246, 136, // Skip to: 40669
+/* 5607 */ MCD_OPC_CheckPredicate, 0, 242, 136, // Skip to: 40669
+/* 5611 */ MCD_OPC_Decode, 191, 6, 11, // Opcode: LD2Rv8h
+/* 5615 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 5646
+/* 5619 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5622 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5634
+/* 5626 */ MCD_OPC_CheckPredicate, 0, 223, 136, // Skip to: 40669
+/* 5630 */ MCD_OPC_Decode, 183, 6, 7, // Opcode: LD2Rv2s
+/* 5634 */ MCD_OPC_FilterValue, 1, 215, 136, // Skip to: 40669
+/* 5638 */ MCD_OPC_CheckPredicate, 0, 211, 136, // Skip to: 40669
+/* 5642 */ MCD_OPC_Decode, 187, 6, 11, // Opcode: LD2Rv4s
+/* 5646 */ MCD_OPC_FilterValue, 3, 203, 136, // Skip to: 40669
+/* 5650 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5653 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5665
+/* 5657 */ MCD_OPC_CheckPredicate, 0, 192, 136, // Skip to: 40669
+/* 5661 */ MCD_OPC_Decode, 179, 6, 7, // Opcode: LD2Rv1d
+/* 5665 */ MCD_OPC_FilterValue, 1, 184, 136, // Skip to: 40669
+/* 5669 */ MCD_OPC_CheckPredicate, 0, 180, 136, // Skip to: 40669
+/* 5673 */ MCD_OPC_Decode, 181, 6, 11, // Opcode: LD2Rv2d
+/* 5677 */ MCD_OPC_FilterValue, 135, 2, 171, 136, // Skip to: 40669
+/* 5682 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
+/* 5685 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 5716
+/* 5689 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5692 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5704
+/* 5696 */ MCD_OPC_CheckPredicate, 0, 153, 136, // Skip to: 40669
+/* 5700 */ MCD_OPC_Decode, 151, 7, 4, // Opcode: LD4Rv8b
+/* 5704 */ MCD_OPC_FilterValue, 1, 145, 136, // Skip to: 40669
+/* 5708 */ MCD_OPC_CheckPredicate, 0, 141, 136, // Skip to: 40669
+/* 5712 */ MCD_OPC_Decode, 139, 7, 8, // Opcode: LD4Rv16b
+/* 5716 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 5747
+/* 5720 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5723 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5735
+/* 5727 */ MCD_OPC_CheckPredicate, 0, 122, 136, // Skip to: 40669
+/* 5731 */ MCD_OPC_Decode, 147, 7, 4, // Opcode: LD4Rv4h
+/* 5735 */ MCD_OPC_FilterValue, 1, 114, 136, // Skip to: 40669
+/* 5739 */ MCD_OPC_CheckPredicate, 0, 110, 136, // Skip to: 40669
+/* 5743 */ MCD_OPC_Decode, 153, 7, 8, // Opcode: LD4Rv8h
+/* 5747 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 5778
+/* 5751 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5754 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5766
+/* 5758 */ MCD_OPC_CheckPredicate, 0, 91, 136, // Skip to: 40669
+/* 5762 */ MCD_OPC_Decode, 145, 7, 4, // Opcode: LD4Rv2s
+/* 5766 */ MCD_OPC_FilterValue, 1, 83, 136, // Skip to: 40669
+/* 5770 */ MCD_OPC_CheckPredicate, 0, 79, 136, // Skip to: 40669
+/* 5774 */ MCD_OPC_Decode, 149, 7, 8, // Opcode: LD4Rv4s
+/* 5778 */ MCD_OPC_FilterValue, 3, 71, 136, // Skip to: 40669
+/* 5782 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5785 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 5797
+/* 5789 */ MCD_OPC_CheckPredicate, 0, 60, 136, // Skip to: 40669
+/* 5793 */ MCD_OPC_Decode, 141, 7, 4, // Opcode: LD4Rv1d
+/* 5797 */ MCD_OPC_FilterValue, 1, 52, 136, // Skip to: 40669
+/* 5801 */ MCD_OPC_CheckPredicate, 0, 48, 136, // Skip to: 40669
+/* 5805 */ MCD_OPC_Decode, 143, 7, 8, // Opcode: LD4Rv2d
+/* 5809 */ MCD_OPC_FilterValue, 1, 40, 136, // Skip to: 40669
+/* 5813 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 5816 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 5824
+/* 5820 */ MCD_OPC_Decode, 187, 7, 3, // Opcode: LDPSi
+/* 5824 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 5832
+/* 5828 */ MCD_OPC_Decode, 178, 7, 3, // Opcode: LDPDi
+/* 5832 */ MCD_OPC_FilterValue, 2, 17, 136, // Skip to: 40669
+/* 5836 */ MCD_OPC_Decode, 181, 7, 3, // Opcode: LDPQi
+/* 5840 */ MCD_OPC_FilterValue, 6, 191, 1, // Skip to: 6291
+/* 5844 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ...
+/* 5847 */ MCD_OPC_FilterValue, 0, 153, 1, // Skip to: 6260
+/* 5851 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
+/* 5854 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 5897
+/* 5858 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 5861 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5879
+/* 5865 */ MCD_OPC_CheckPredicate, 0, 240, 135, // Skip to: 40669
+/* 5869 */ MCD_OPC_CheckField, 31, 1, 0, 234, 135, // Skip to: 40669
+/* 5875 */ MCD_OPC_Decode, 244, 13, 52, // Opcode: ST1i8_POST
+/* 5879 */ MCD_OPC_FilterValue, 1, 226, 135, // Skip to: 40669
+/* 5883 */ MCD_OPC_CheckPredicate, 0, 222, 135, // Skip to: 40669
+/* 5887 */ MCD_OPC_CheckField, 31, 1, 0, 216, 135, // Skip to: 40669
+/* 5893 */ MCD_OPC_Decode, 138, 14, 53, // Opcode: ST2i8_POST
+/* 5897 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 5940
+/* 5901 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 5904 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 5922
+/* 5908 */ MCD_OPC_CheckPredicate, 0, 197, 135, // Skip to: 40669
+/* 5912 */ MCD_OPC_CheckField, 31, 1, 0, 191, 135, // Skip to: 40669
+/* 5918 */ MCD_OPC_Decode, 160, 14, 54, // Opcode: ST3i8_POST
+/* 5922 */ MCD_OPC_FilterValue, 1, 183, 135, // Skip to: 40669
+/* 5926 */ MCD_OPC_CheckPredicate, 0, 179, 135, // Skip to: 40669
+/* 5930 */ MCD_OPC_CheckField, 31, 1, 0, 173, 135, // Skip to: 40669
+/* 5936 */ MCD_OPC_Decode, 182, 14, 55, // Opcode: ST4i8_POST
+/* 5940 */ MCD_OPC_FilterValue, 2, 51, 0, // Skip to: 5995
+/* 5944 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 5947 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 5971
+/* 5951 */ MCD_OPC_CheckPredicate, 0, 154, 135, // Skip to: 40669
+/* 5955 */ MCD_OPC_CheckField, 31, 1, 0, 148, 135, // Skip to: 40669
+/* 5961 */ MCD_OPC_CheckField, 10, 1, 0, 142, 135, // Skip to: 40669
+/* 5967 */ MCD_OPC_Decode, 238, 13, 56, // Opcode: ST1i16_POST
+/* 5971 */ MCD_OPC_FilterValue, 1, 134, 135, // Skip to: 40669
+/* 5975 */ MCD_OPC_CheckPredicate, 0, 130, 135, // Skip to: 40669
+/* 5979 */ MCD_OPC_CheckField, 31, 1, 0, 124, 135, // Skip to: 40669
+/* 5985 */ MCD_OPC_CheckField, 10, 1, 0, 118, 135, // Skip to: 40669
+/* 5991 */ MCD_OPC_Decode, 132, 14, 57, // Opcode: ST2i16_POST
+/* 5995 */ MCD_OPC_FilterValue, 3, 51, 0, // Skip to: 6050
+/* 5999 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6002 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6026
+/* 6006 */ MCD_OPC_CheckPredicate, 0, 99, 135, // Skip to: 40669
+/* 6010 */ MCD_OPC_CheckField, 31, 1, 0, 93, 135, // Skip to: 40669
+/* 6016 */ MCD_OPC_CheckField, 10, 1, 0, 87, 135, // Skip to: 40669
+/* 6022 */ MCD_OPC_Decode, 154, 14, 58, // Opcode: ST3i16_POST
+/* 6026 */ MCD_OPC_FilterValue, 1, 79, 135, // Skip to: 40669
+/* 6030 */ MCD_OPC_CheckPredicate, 0, 75, 135, // Skip to: 40669
+/* 6034 */ MCD_OPC_CheckField, 31, 1, 0, 69, 135, // Skip to: 40669
+/* 6040 */ MCD_OPC_CheckField, 10, 1, 0, 63, 135, // Skip to: 40669
+/* 6046 */ MCD_OPC_Decode, 176, 14, 59, // Opcode: ST4i16_POST
+/* 6050 */ MCD_OPC_FilterValue, 4, 101, 0, // Skip to: 6155
+/* 6054 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 6057 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6100
+/* 6061 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6064 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6082
+/* 6068 */ MCD_OPC_CheckPredicate, 0, 37, 135, // Skip to: 40669
+/* 6072 */ MCD_OPC_CheckField, 31, 1, 0, 31, 135, // Skip to: 40669
+/* 6078 */ MCD_OPC_Decode, 240, 13, 60, // Opcode: ST1i32_POST
+/* 6082 */ MCD_OPC_FilterValue, 1, 23, 135, // Skip to: 40669
+/* 6086 */ MCD_OPC_CheckPredicate, 0, 19, 135, // Skip to: 40669
+/* 6090 */ MCD_OPC_CheckField, 31, 1, 0, 13, 135, // Skip to: 40669
+/* 6096 */ MCD_OPC_Decode, 134, 14, 61, // Opcode: ST2i32_POST
+/* 6100 */ MCD_OPC_FilterValue, 1, 5, 135, // Skip to: 40669
+/* 6104 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6107 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6131
+/* 6111 */ MCD_OPC_CheckPredicate, 0, 250, 134, // Skip to: 40669
+/* 6115 */ MCD_OPC_CheckField, 31, 1, 0, 244, 134, // Skip to: 40669
+/* 6121 */ MCD_OPC_CheckField, 12, 1, 0, 238, 134, // Skip to: 40669
+/* 6127 */ MCD_OPC_Decode, 242, 13, 62, // Opcode: ST1i64_POST
+/* 6131 */ MCD_OPC_FilterValue, 1, 230, 134, // Skip to: 40669
+/* 6135 */ MCD_OPC_CheckPredicate, 0, 226, 134, // Skip to: 40669
+/* 6139 */ MCD_OPC_CheckField, 31, 1, 0, 220, 134, // Skip to: 40669
+/* 6145 */ MCD_OPC_CheckField, 12, 1, 0, 214, 134, // Skip to: 40669
+/* 6151 */ MCD_OPC_Decode, 136, 14, 63, // Opcode: ST2i64_POST
+/* 6155 */ MCD_OPC_FilterValue, 5, 206, 134, // Skip to: 40669
+/* 6159 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 6162 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6205
+/* 6166 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6169 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6187
+/* 6173 */ MCD_OPC_CheckPredicate, 0, 188, 134, // Skip to: 40669
+/* 6177 */ MCD_OPC_CheckField, 31, 1, 0, 182, 134, // Skip to: 40669
+/* 6183 */ MCD_OPC_Decode, 156, 14, 64, // Opcode: ST3i32_POST
+/* 6187 */ MCD_OPC_FilterValue, 1, 174, 134, // Skip to: 40669
+/* 6191 */ MCD_OPC_CheckPredicate, 0, 170, 134, // Skip to: 40669
+/* 6195 */ MCD_OPC_CheckField, 31, 1, 0, 164, 134, // Skip to: 40669
+/* 6201 */ MCD_OPC_Decode, 178, 14, 65, // Opcode: ST4i32_POST
+/* 6205 */ MCD_OPC_FilterValue, 1, 156, 134, // Skip to: 40669
+/* 6209 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6212 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6236
+/* 6216 */ MCD_OPC_CheckPredicate, 0, 145, 134, // Skip to: 40669
+/* 6220 */ MCD_OPC_CheckField, 31, 1, 0, 139, 134, // Skip to: 40669
+/* 6226 */ MCD_OPC_CheckField, 12, 1, 0, 133, 134, // Skip to: 40669
+/* 6232 */ MCD_OPC_Decode, 158, 14, 66, // Opcode: ST3i64_POST
+/* 6236 */ MCD_OPC_FilterValue, 1, 125, 134, // Skip to: 40669
+/* 6240 */ MCD_OPC_CheckPredicate, 0, 121, 134, // Skip to: 40669
+/* 6244 */ MCD_OPC_CheckField, 31, 1, 0, 115, 134, // Skip to: 40669
+/* 6250 */ MCD_OPC_CheckField, 12, 1, 0, 109, 134, // Skip to: 40669
+/* 6256 */ MCD_OPC_Decode, 180, 14, 67, // Opcode: ST4i64_POST
+/* 6260 */ MCD_OPC_FilterValue, 1, 101, 134, // Skip to: 40669
+/* 6264 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 6267 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 6275
+/* 6271 */ MCD_OPC_Decode, 206, 14, 3, // Opcode: STPSpre
+/* 6275 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 6283
+/* 6279 */ MCD_OPC_Decode, 200, 14, 3, // Opcode: STPDpre
+/* 6283 */ MCD_OPC_FilterValue, 2, 78, 134, // Skip to: 40669
+/* 6287 */ MCD_OPC_Decode, 203, 14, 3, // Opcode: STPQpre
+/* 6291 */ MCD_OPC_FilterValue, 7, 245, 3, // Skip to: 7308
+/* 6295 */ MCD_OPC_ExtractField, 29, 1, // Inst{29} ...
+/* 6298 */ MCD_OPC_FilterValue, 0, 207, 3, // Skip to: 7277
+/* 6302 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
+/* 6305 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6348
+/* 6309 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6312 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6330
+/* 6316 */ MCD_OPC_CheckPredicate, 0, 45, 134, // Skip to: 40669
+/* 6320 */ MCD_OPC_CheckField, 31, 1, 0, 39, 134, // Skip to: 40669
+/* 6326 */ MCD_OPC_Decode, 176, 6, 68, // Opcode: LD1i8_POST
+/* 6330 */ MCD_OPC_FilterValue, 1, 31, 134, // Skip to: 40669
+/* 6334 */ MCD_OPC_CheckPredicate, 0, 27, 134, // Skip to: 40669
+/* 6338 */ MCD_OPC_CheckField, 31, 1, 0, 21, 134, // Skip to: 40669
+/* 6344 */ MCD_OPC_Decode, 214, 6, 69, // Opcode: LD2i8_POST
+/* 6348 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 6391
+/* 6352 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6355 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6373
+/* 6359 */ MCD_OPC_CheckPredicate, 0, 2, 134, // Skip to: 40669
+/* 6363 */ MCD_OPC_CheckField, 31, 1, 0, 252, 133, // Skip to: 40669
+/* 6369 */ MCD_OPC_Decode, 252, 6, 70, // Opcode: LD3i8_POST
+/* 6373 */ MCD_OPC_FilterValue, 1, 244, 133, // Skip to: 40669
+/* 6377 */ MCD_OPC_CheckPredicate, 0, 240, 133, // Skip to: 40669
+/* 6381 */ MCD_OPC_CheckField, 31, 1, 0, 234, 133, // Skip to: 40669
+/* 6387 */ MCD_OPC_Decode, 162, 7, 71, // Opcode: LD4i8_POST
+/* 6391 */ MCD_OPC_FilterValue, 2, 51, 0, // Skip to: 6446
+/* 6395 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6398 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6422
+/* 6402 */ MCD_OPC_CheckPredicate, 0, 215, 133, // Skip to: 40669
+/* 6406 */ MCD_OPC_CheckField, 31, 1, 0, 209, 133, // Skip to: 40669
+/* 6412 */ MCD_OPC_CheckField, 10, 1, 0, 203, 133, // Skip to: 40669
+/* 6418 */ MCD_OPC_Decode, 170, 6, 72, // Opcode: LD1i16_POST
+/* 6422 */ MCD_OPC_FilterValue, 1, 195, 133, // Skip to: 40669
+/* 6426 */ MCD_OPC_CheckPredicate, 0, 191, 133, // Skip to: 40669
+/* 6430 */ MCD_OPC_CheckField, 31, 1, 0, 185, 133, // Skip to: 40669
+/* 6436 */ MCD_OPC_CheckField, 10, 1, 0, 179, 133, // Skip to: 40669
+/* 6442 */ MCD_OPC_Decode, 208, 6, 73, // Opcode: LD2i16_POST
+/* 6446 */ MCD_OPC_FilterValue, 3, 51, 0, // Skip to: 6501
+/* 6450 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6453 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6477
+/* 6457 */ MCD_OPC_CheckPredicate, 0, 160, 133, // Skip to: 40669
+/* 6461 */ MCD_OPC_CheckField, 31, 1, 0, 154, 133, // Skip to: 40669
+/* 6467 */ MCD_OPC_CheckField, 10, 1, 0, 148, 133, // Skip to: 40669
+/* 6473 */ MCD_OPC_Decode, 246, 6, 74, // Opcode: LD3i16_POST
+/* 6477 */ MCD_OPC_FilterValue, 1, 140, 133, // Skip to: 40669
+/* 6481 */ MCD_OPC_CheckPredicate, 0, 136, 133, // Skip to: 40669
+/* 6485 */ MCD_OPC_CheckField, 31, 1, 0, 130, 133, // Skip to: 40669
+/* 6491 */ MCD_OPC_CheckField, 10, 1, 0, 124, 133, // Skip to: 40669
+/* 6497 */ MCD_OPC_Decode, 156, 7, 75, // Opcode: LD4i16_POST
+/* 6501 */ MCD_OPC_FilterValue, 4, 101, 0, // Skip to: 6606
+/* 6505 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 6508 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6551
+/* 6512 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6515 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6533
+/* 6519 */ MCD_OPC_CheckPredicate, 0, 98, 133, // Skip to: 40669
+/* 6523 */ MCD_OPC_CheckField, 31, 1, 0, 92, 133, // Skip to: 40669
+/* 6529 */ MCD_OPC_Decode, 172, 6, 76, // Opcode: LD1i32_POST
+/* 6533 */ MCD_OPC_FilterValue, 1, 84, 133, // Skip to: 40669
+/* 6537 */ MCD_OPC_CheckPredicate, 0, 80, 133, // Skip to: 40669
+/* 6541 */ MCD_OPC_CheckField, 31, 1, 0, 74, 133, // Skip to: 40669
+/* 6547 */ MCD_OPC_Decode, 210, 6, 77, // Opcode: LD2i32_POST
+/* 6551 */ MCD_OPC_FilterValue, 1, 66, 133, // Skip to: 40669
+/* 6555 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6558 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6582
+/* 6562 */ MCD_OPC_CheckPredicate, 0, 55, 133, // Skip to: 40669
+/* 6566 */ MCD_OPC_CheckField, 31, 1, 0, 49, 133, // Skip to: 40669
+/* 6572 */ MCD_OPC_CheckField, 12, 1, 0, 43, 133, // Skip to: 40669
+/* 6578 */ MCD_OPC_Decode, 174, 6, 78, // Opcode: LD1i64_POST
+/* 6582 */ MCD_OPC_FilterValue, 1, 35, 133, // Skip to: 40669
+/* 6586 */ MCD_OPC_CheckPredicate, 0, 31, 133, // Skip to: 40669
+/* 6590 */ MCD_OPC_CheckField, 31, 1, 0, 25, 133, // Skip to: 40669
+/* 6596 */ MCD_OPC_CheckField, 12, 1, 0, 19, 133, // Skip to: 40669
+/* 6602 */ MCD_OPC_Decode, 212, 6, 79, // Opcode: LD2i64_POST
+/* 6606 */ MCD_OPC_FilterValue, 5, 101, 0, // Skip to: 6711
+/* 6610 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 6613 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 6656
+/* 6617 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6620 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 6638
+/* 6624 */ MCD_OPC_CheckPredicate, 0, 249, 132, // Skip to: 40669
+/* 6628 */ MCD_OPC_CheckField, 31, 1, 0, 243, 132, // Skip to: 40669
+/* 6634 */ MCD_OPC_Decode, 248, 6, 80, // Opcode: LD3i32_POST
+/* 6638 */ MCD_OPC_FilterValue, 1, 235, 132, // Skip to: 40669
+/* 6642 */ MCD_OPC_CheckPredicate, 0, 231, 132, // Skip to: 40669
+/* 6646 */ MCD_OPC_CheckField, 31, 1, 0, 225, 132, // Skip to: 40669
+/* 6652 */ MCD_OPC_Decode, 158, 7, 81, // Opcode: LD4i32_POST
+/* 6656 */ MCD_OPC_FilterValue, 1, 217, 132, // Skip to: 40669
+/* 6660 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6663 */ MCD_OPC_FilterValue, 0, 20, 0, // Skip to: 6687
+/* 6667 */ MCD_OPC_CheckPredicate, 0, 206, 132, // Skip to: 40669
+/* 6671 */ MCD_OPC_CheckField, 31, 1, 0, 200, 132, // Skip to: 40669
+/* 6677 */ MCD_OPC_CheckField, 12, 1, 0, 194, 132, // Skip to: 40669
+/* 6683 */ MCD_OPC_Decode, 250, 6, 82, // Opcode: LD3i64_POST
+/* 6687 */ MCD_OPC_FilterValue, 1, 186, 132, // Skip to: 40669
+/* 6691 */ MCD_OPC_CheckPredicate, 0, 182, 132, // Skip to: 40669
+/* 6695 */ MCD_OPC_CheckField, 31, 1, 0, 176, 132, // Skip to: 40669
+/* 6701 */ MCD_OPC_CheckField, 12, 1, 0, 170, 132, // Skip to: 40669
+/* 6707 */ MCD_OPC_Decode, 160, 7, 83, // Opcode: LD4i64_POST
+/* 6711 */ MCD_OPC_FilterValue, 6, 23, 1, // Skip to: 6994
+/* 6715 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
+/* 6718 */ MCD_OPC_FilterValue, 0, 65, 0, // Skip to: 6787
+/* 6722 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6725 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 6756
+/* 6729 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 6732 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6744
+/* 6736 */ MCD_OPC_CheckPredicate, 0, 137, 132, // Skip to: 40669
+/* 6740 */ MCD_OPC_Decode, 134, 6, 14, // Opcode: LD1Rv8b_POST
+/* 6744 */ MCD_OPC_FilterValue, 1, 129, 132, // Skip to: 40669
+/* 6748 */ MCD_OPC_CheckPredicate, 0, 125, 132, // Skip to: 40669
+/* 6752 */ MCD_OPC_Decode, 250, 5, 18, // Opcode: LD1Rv16b_POST
+/* 6756 */ MCD_OPC_FilterValue, 1, 117, 132, // Skip to: 40669
+/* 6760 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 6763 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6775
+/* 6767 */ MCD_OPC_CheckPredicate, 0, 106, 132, // Skip to: 40669
+/* 6771 */ MCD_OPC_Decode, 190, 6, 15, // Opcode: LD2Rv8b_POST
+/* 6775 */ MCD_OPC_FilterValue, 1, 98, 132, // Skip to: 40669
+/* 6779 */ MCD_OPC_CheckPredicate, 0, 94, 132, // Skip to: 40669
+/* 6783 */ MCD_OPC_Decode, 178, 6, 19, // Opcode: LD2Rv16b_POST
+/* 6787 */ MCD_OPC_FilterValue, 1, 65, 0, // Skip to: 6856
+/* 6791 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6794 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 6825
+/* 6798 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 6801 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6813
+/* 6805 */ MCD_OPC_CheckPredicate, 0, 68, 132, // Skip to: 40669
+/* 6809 */ MCD_OPC_Decode, 130, 6, 14, // Opcode: LD1Rv4h_POST
+/* 6813 */ MCD_OPC_FilterValue, 1, 60, 132, // Skip to: 40669
+/* 6817 */ MCD_OPC_CheckPredicate, 0, 56, 132, // Skip to: 40669
+/* 6821 */ MCD_OPC_Decode, 136, 6, 18, // Opcode: LD1Rv8h_POST
+/* 6825 */ MCD_OPC_FilterValue, 1, 48, 132, // Skip to: 40669
+/* 6829 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 6832 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6844
+/* 6836 */ MCD_OPC_CheckPredicate, 0, 37, 132, // Skip to: 40669
+/* 6840 */ MCD_OPC_Decode, 186, 6, 15, // Opcode: LD2Rv4h_POST
+/* 6844 */ MCD_OPC_FilterValue, 1, 29, 132, // Skip to: 40669
+/* 6848 */ MCD_OPC_CheckPredicate, 0, 25, 132, // Skip to: 40669
+/* 6852 */ MCD_OPC_Decode, 192, 6, 19, // Opcode: LD2Rv8h_POST
+/* 6856 */ MCD_OPC_FilterValue, 2, 65, 0, // Skip to: 6925
+/* 6860 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6863 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 6894
+/* 6867 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 6870 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6882
+/* 6874 */ MCD_OPC_CheckPredicate, 0, 255, 131, // Skip to: 40669
+/* 6878 */ MCD_OPC_Decode, 128, 6, 14, // Opcode: LD1Rv2s_POST
+/* 6882 */ MCD_OPC_FilterValue, 1, 247, 131, // Skip to: 40669
+/* 6886 */ MCD_OPC_CheckPredicate, 0, 243, 131, // Skip to: 40669
+/* 6890 */ MCD_OPC_Decode, 132, 6, 18, // Opcode: LD1Rv4s_POST
+/* 6894 */ MCD_OPC_FilterValue, 1, 235, 131, // Skip to: 40669
+/* 6898 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 6901 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6913
+/* 6905 */ MCD_OPC_CheckPredicate, 0, 224, 131, // Skip to: 40669
+/* 6909 */ MCD_OPC_Decode, 184, 6, 15, // Opcode: LD2Rv2s_POST
+/* 6913 */ MCD_OPC_FilterValue, 1, 216, 131, // Skip to: 40669
+/* 6917 */ MCD_OPC_CheckPredicate, 0, 212, 131, // Skip to: 40669
+/* 6921 */ MCD_OPC_Decode, 188, 6, 19, // Opcode: LD2Rv4s_POST
+/* 6925 */ MCD_OPC_FilterValue, 3, 204, 131, // Skip to: 40669
+/* 6929 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 6932 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 6963
+/* 6936 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 6939 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6951
+/* 6943 */ MCD_OPC_CheckPredicate, 0, 186, 131, // Skip to: 40669
+/* 6947 */ MCD_OPC_Decode, 252, 5, 14, // Opcode: LD1Rv1d_POST
+/* 6951 */ MCD_OPC_FilterValue, 1, 178, 131, // Skip to: 40669
+/* 6955 */ MCD_OPC_CheckPredicate, 0, 174, 131, // Skip to: 40669
+/* 6959 */ MCD_OPC_Decode, 254, 5, 18, // Opcode: LD1Rv2d_POST
+/* 6963 */ MCD_OPC_FilterValue, 1, 166, 131, // Skip to: 40669
+/* 6967 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 6970 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 6982
+/* 6974 */ MCD_OPC_CheckPredicate, 0, 155, 131, // Skip to: 40669
+/* 6978 */ MCD_OPC_Decode, 180, 6, 15, // Opcode: LD2Rv1d_POST
+/* 6982 */ MCD_OPC_FilterValue, 1, 147, 131, // Skip to: 40669
+/* 6986 */ MCD_OPC_CheckPredicate, 0, 143, 131, // Skip to: 40669
+/* 6990 */ MCD_OPC_Decode, 182, 6, 19, // Opcode: LD2Rv2d_POST
+/* 6994 */ MCD_OPC_FilterValue, 7, 135, 131, // Skip to: 40669
+/* 6998 */ MCD_OPC_ExtractField, 10, 3, // Inst{12-10} ...
+/* 7001 */ MCD_OPC_FilterValue, 0, 65, 0, // Skip to: 7070
+/* 7005 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7008 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 7039
+/* 7012 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 7015 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7027
+/* 7019 */ MCD_OPC_CheckPredicate, 0, 110, 131, // Skip to: 40669
+/* 7023 */ MCD_OPC_Decode, 228, 6, 13, // Opcode: LD3Rv8b_POST
+/* 7027 */ MCD_OPC_FilterValue, 1, 102, 131, // Skip to: 40669
+/* 7031 */ MCD_OPC_CheckPredicate, 0, 98, 131, // Skip to: 40669
+/* 7035 */ MCD_OPC_Decode, 216, 6, 17, // Opcode: LD3Rv16b_POST
+/* 7039 */ MCD_OPC_FilterValue, 1, 90, 131, // Skip to: 40669
+/* 7043 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 7046 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7058
+/* 7050 */ MCD_OPC_CheckPredicate, 0, 79, 131, // Skip to: 40669
+/* 7054 */ MCD_OPC_Decode, 152, 7, 12, // Opcode: LD4Rv8b_POST
+/* 7058 */ MCD_OPC_FilterValue, 1, 71, 131, // Skip to: 40669
+/* 7062 */ MCD_OPC_CheckPredicate, 0, 67, 131, // Skip to: 40669
+/* 7066 */ MCD_OPC_Decode, 140, 7, 16, // Opcode: LD4Rv16b_POST
+/* 7070 */ MCD_OPC_FilterValue, 1, 65, 0, // Skip to: 7139
+/* 7074 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7077 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 7108
+/* 7081 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 7084 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7096
+/* 7088 */ MCD_OPC_CheckPredicate, 0, 41, 131, // Skip to: 40669
+/* 7092 */ MCD_OPC_Decode, 224, 6, 13, // Opcode: LD3Rv4h_POST
+/* 7096 */ MCD_OPC_FilterValue, 1, 33, 131, // Skip to: 40669
+/* 7100 */ MCD_OPC_CheckPredicate, 0, 29, 131, // Skip to: 40669
+/* 7104 */ MCD_OPC_Decode, 230, 6, 17, // Opcode: LD3Rv8h_POST
+/* 7108 */ MCD_OPC_FilterValue, 1, 21, 131, // Skip to: 40669
+/* 7112 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 7115 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7127
+/* 7119 */ MCD_OPC_CheckPredicate, 0, 10, 131, // Skip to: 40669
+/* 7123 */ MCD_OPC_Decode, 148, 7, 12, // Opcode: LD4Rv4h_POST
+/* 7127 */ MCD_OPC_FilterValue, 1, 2, 131, // Skip to: 40669
+/* 7131 */ MCD_OPC_CheckPredicate, 0, 254, 130, // Skip to: 40669
+/* 7135 */ MCD_OPC_Decode, 154, 7, 16, // Opcode: LD4Rv8h_POST
+/* 7139 */ MCD_OPC_FilterValue, 2, 65, 0, // Skip to: 7208
+/* 7143 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7146 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 7177
+/* 7150 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 7153 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7165
+/* 7157 */ MCD_OPC_CheckPredicate, 0, 228, 130, // Skip to: 40669
+/* 7161 */ MCD_OPC_Decode, 222, 6, 13, // Opcode: LD3Rv2s_POST
+/* 7165 */ MCD_OPC_FilterValue, 1, 220, 130, // Skip to: 40669
+/* 7169 */ MCD_OPC_CheckPredicate, 0, 216, 130, // Skip to: 40669
+/* 7173 */ MCD_OPC_Decode, 226, 6, 17, // Opcode: LD3Rv4s_POST
+/* 7177 */ MCD_OPC_FilterValue, 1, 208, 130, // Skip to: 40669
+/* 7181 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 7184 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7196
+/* 7188 */ MCD_OPC_CheckPredicate, 0, 197, 130, // Skip to: 40669
+/* 7192 */ MCD_OPC_Decode, 146, 7, 12, // Opcode: LD4Rv2s_POST
+/* 7196 */ MCD_OPC_FilterValue, 1, 189, 130, // Skip to: 40669
+/* 7200 */ MCD_OPC_CheckPredicate, 0, 185, 130, // Skip to: 40669
+/* 7204 */ MCD_OPC_Decode, 150, 7, 16, // Opcode: LD4Rv4s_POST
+/* 7208 */ MCD_OPC_FilterValue, 3, 177, 130, // Skip to: 40669
+/* 7212 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7215 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 7246
+/* 7219 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 7222 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7234
+/* 7226 */ MCD_OPC_CheckPredicate, 0, 159, 130, // Skip to: 40669
+/* 7230 */ MCD_OPC_Decode, 218, 6, 13, // Opcode: LD3Rv1d_POST
+/* 7234 */ MCD_OPC_FilterValue, 1, 151, 130, // Skip to: 40669
+/* 7238 */ MCD_OPC_CheckPredicate, 0, 147, 130, // Skip to: 40669
+/* 7242 */ MCD_OPC_Decode, 220, 6, 17, // Opcode: LD3Rv2d_POST
+/* 7246 */ MCD_OPC_FilterValue, 1, 139, 130, // Skip to: 40669
+/* 7250 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 7253 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7265
+/* 7257 */ MCD_OPC_CheckPredicate, 0, 128, 130, // Skip to: 40669
+/* 7261 */ MCD_OPC_Decode, 142, 7, 12, // Opcode: LD4Rv1d_POST
+/* 7265 */ MCD_OPC_FilterValue, 1, 120, 130, // Skip to: 40669
+/* 7269 */ MCD_OPC_CheckPredicate, 0, 116, 130, // Skip to: 40669
+/* 7273 */ MCD_OPC_Decode, 144, 7, 16, // Opcode: LD4Rv2d_POST
+/* 7277 */ MCD_OPC_FilterValue, 1, 108, 130, // Skip to: 40669
+/* 7281 */ MCD_OPC_ExtractField, 30, 2, // Inst{31-30} ...
+/* 7284 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 7292
+/* 7288 */ MCD_OPC_Decode, 189, 7, 3, // Opcode: LDPSpre
+/* 7292 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 7300
+/* 7296 */ MCD_OPC_Decode, 180, 7, 3, // Opcode: LDPDpre
+/* 7300 */ MCD_OPC_FilterValue, 2, 85, 130, // Skip to: 40669
+/* 7304 */ MCD_OPC_Decode, 183, 7, 3, // Opcode: LDPQpre
+/* 7308 */ MCD_OPC_FilterValue, 8, 171, 21, // Skip to: 12859
+/* 7312 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 7315 */ MCD_OPC_FilterValue, 0, 36, 6, // Skip to: 8891
+/* 7319 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 7322 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 7353
+/* 7326 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7329 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7341
+/* 7333 */ MCD_OPC_CheckPredicate, 0, 52, 130, // Skip to: 40669
+/* 7337 */ MCD_OPC_Decode, 200, 15, 84, // Opcode: TBLv8i8One
+/* 7341 */ MCD_OPC_FilterValue, 1, 44, 130, // Skip to: 40669
+/* 7345 */ MCD_OPC_CheckPredicate, 0, 40, 130, // Skip to: 40669
+/* 7349 */ MCD_OPC_Decode, 245, 9, 85, // Opcode: SADDLv8i8_v8i16
+/* 7353 */ MCD_OPC_FilterValue, 1, 71, 0, // Skip to: 7428
+/* 7357 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7360 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 7416
+/* 7364 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
+/* 7367 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 7404
+/* 7371 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
+/* 7374 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 7392
+/* 7378 */ MCD_OPC_CheckPredicate, 0, 7, 130, // Skip to: 40669
+/* 7382 */ MCD_OPC_CheckField, 18, 1, 1, 1, 130, // Skip to: 40669
+/* 7388 */ MCD_OPC_Decode, 149, 2, 86, // Opcode: DUPv2i32lane
+/* 7392 */ MCD_OPC_FilterValue, 1, 249, 129, // Skip to: 40669
+/* 7396 */ MCD_OPC_CheckPredicate, 0, 245, 129, // Skip to: 40669
+/* 7400 */ MCD_OPC_Decode, 153, 2, 87, // Opcode: DUPv4i16lane
+/* 7404 */ MCD_OPC_FilterValue, 1, 237, 129, // Skip to: 40669
+/* 7408 */ MCD_OPC_CheckPredicate, 0, 233, 129, // Skip to: 40669
+/* 7412 */ MCD_OPC_Decode, 159, 2, 88, // Opcode: DUPv8i8lane
+/* 7416 */ MCD_OPC_FilterValue, 1, 225, 129, // Skip to: 40669
+/* 7420 */ MCD_OPC_CheckPredicate, 0, 221, 129, // Skip to: 40669
+/* 7424 */ MCD_OPC_Decode, 167, 10, 89, // Opcode: SHADDv8i8
+/* 7428 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 7446
+/* 7432 */ MCD_OPC_CheckPredicate, 0, 209, 129, // Skip to: 40669
+/* 7436 */ MCD_OPC_CheckField, 16, 6, 32, 203, 129, // Skip to: 40669
+/* 7442 */ MCD_OPC_Decode, 182, 9, 90, // Opcode: REV64v8i8
+/* 7446 */ MCD_OPC_FilterValue, 3, 58, 0, // Skip to: 7508
+/* 7450 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7453 */ MCD_OPC_FilterValue, 0, 39, 0, // Skip to: 7496
+/* 7457 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 7460 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 7472
+/* 7464 */ MCD_OPC_CheckPredicate, 0, 177, 129, // Skip to: 40669
+/* 7468 */ MCD_OPC_Decode, 158, 2, 91, // Opcode: DUPv8i8gpr
+/* 7472 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 7484
+/* 7476 */ MCD_OPC_CheckPredicate, 0, 165, 129, // Skip to: 40669
+/* 7480 */ MCD_OPC_Decode, 152, 2, 91, // Opcode: DUPv4i16gpr
+/* 7484 */ MCD_OPC_FilterValue, 4, 157, 129, // Skip to: 40669
+/* 7488 */ MCD_OPC_CheckPredicate, 0, 153, 129, // Skip to: 40669
+/* 7492 */ MCD_OPC_Decode, 148, 2, 91, // Opcode: DUPv2i32gpr
+/* 7496 */ MCD_OPC_FilterValue, 1, 145, 129, // Skip to: 40669
+/* 7500 */ MCD_OPC_CheckPredicate, 0, 141, 129, // Skip to: 40669
+/* 7504 */ MCD_OPC_Decode, 168, 11, 89, // Opcode: SQADDv8i8
+/* 7508 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 7539
+/* 7512 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7515 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7527
+/* 7519 */ MCD_OPC_CheckPredicate, 0, 122, 129, // Skip to: 40669
+/* 7523 */ MCD_OPC_Decode, 210, 15, 92, // Opcode: TBXv8i8One
+/* 7527 */ MCD_OPC_FilterValue, 1, 114, 129, // Skip to: 40669
+/* 7531 */ MCD_OPC_CheckPredicate, 0, 110, 129, // Skip to: 40669
+/* 7535 */ MCD_OPC_Decode, 251, 9, 93, // Opcode: SADDWv8i8_v8i16
+/* 7539 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 7557
+/* 7543 */ MCD_OPC_CheckPredicate, 0, 98, 129, // Skip to: 40669
+/* 7547 */ MCD_OPC_CheckField, 21, 1, 1, 92, 129, // Skip to: 40669
+/* 7553 */ MCD_OPC_Decode, 226, 12, 89, // Opcode: SRHADDv8i8
+/* 7557 */ MCD_OPC_FilterValue, 6, 33, 0, // Skip to: 7594
+/* 7561 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7564 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7576
+/* 7568 */ MCD_OPC_CheckPredicate, 0, 73, 129, // Skip to: 40669
+/* 7572 */ MCD_OPC_Decode, 184, 18, 89, // Opcode: UZP1v8i8
+/* 7576 */ MCD_OPC_FilterValue, 1, 65, 129, // Skip to: 40669
+/* 7580 */ MCD_OPC_CheckPredicate, 0, 61, 129, // Skip to: 40669
+/* 7584 */ MCD_OPC_CheckField, 16, 5, 0, 55, 129, // Skip to: 40669
+/* 7590 */ MCD_OPC_Decode, 171, 9, 90, // Opcode: REV16v8i8
+/* 7594 */ MCD_OPC_FilterValue, 7, 13, 0, // Skip to: 7611
+/* 7598 */ MCD_OPC_CheckPredicate, 0, 43, 129, // Skip to: 40669
+/* 7602 */ MCD_OPC_CheckField, 21, 1, 1, 37, 129, // Skip to: 40669
+/* 7608 */ MCD_OPC_Decode, 98, 89, // Opcode: ANDv8i8
+/* 7611 */ MCD_OPC_FilterValue, 8, 27, 0, // Skip to: 7642
+/* 7615 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7618 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7630
+/* 7622 */ MCD_OPC_CheckPredicate, 0, 19, 129, // Skip to: 40669
+/* 7626 */ MCD_OPC_Decode, 202, 15, 94, // Opcode: TBLv8i8Two
+/* 7630 */ MCD_OPC_FilterValue, 1, 11, 129, // Skip to: 40669
+/* 7634 */ MCD_OPC_CheckPredicate, 0, 7, 129, // Skip to: 40669
+/* 7638 */ MCD_OPC_Decode, 166, 13, 85, // Opcode: SSUBLv8i8_v8i16
+/* 7642 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 7660
+/* 7646 */ MCD_OPC_CheckPredicate, 0, 251, 128, // Skip to: 40669
+/* 7650 */ MCD_OPC_CheckField, 21, 1, 1, 245, 128, // Skip to: 40669
+/* 7656 */ MCD_OPC_Decode, 193, 10, 89, // Opcode: SHSUBv8i8
+/* 7660 */ MCD_OPC_FilterValue, 10, 46, 0, // Skip to: 7710
+/* 7664 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7667 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7679
+/* 7671 */ MCD_OPC_CheckPredicate, 0, 226, 128, // Skip to: 40669
+/* 7675 */ MCD_OPC_Decode, 225, 15, 89, // Opcode: TRN1v8i8
+/* 7679 */ MCD_OPC_FilterValue, 1, 218, 128, // Skip to: 40669
+/* 7683 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 7686 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7698
+/* 7690 */ MCD_OPC_CheckPredicate, 0, 207, 128, // Skip to: 40669
+/* 7694 */ MCD_OPC_Decode, 234, 9, 90, // Opcode: SADDLPv8i8_v4i16
+/* 7698 */ MCD_OPC_FilterValue, 1, 199, 128, // Skip to: 40669
+/* 7702 */ MCD_OPC_CheckPredicate, 0, 195, 128, // Skip to: 40669
+/* 7706 */ MCD_OPC_Decode, 197, 18, 95, // Opcode: XTNv8i8
+/* 7710 */ MCD_OPC_FilterValue, 11, 52, 0, // Skip to: 7766
+/* 7714 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7717 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 7754
+/* 7721 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
+/* 7724 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 7742
+/* 7728 */ MCD_OPC_CheckPredicate, 0, 169, 128, // Skip to: 40669
+/* 7732 */ MCD_OPC_CheckField, 17, 1, 1, 163, 128, // Skip to: 40669
+/* 7738 */ MCD_OPC_Decode, 130, 11, 96, // Opcode: SMOVvi16to32
+/* 7742 */ MCD_OPC_FilterValue, 1, 155, 128, // Skip to: 40669
+/* 7746 */ MCD_OPC_CheckPredicate, 0, 151, 128, // Skip to: 40669
+/* 7750 */ MCD_OPC_Decode, 133, 11, 97, // Opcode: SMOVvi8to32
+/* 7754 */ MCD_OPC_FilterValue, 1, 143, 128, // Skip to: 40669
+/* 7758 */ MCD_OPC_CheckPredicate, 0, 139, 128, // Skip to: 40669
+/* 7762 */ MCD_OPC_Decode, 202, 12, 89, // Opcode: SQSUBv8i8
+/* 7766 */ MCD_OPC_FilterValue, 12, 27, 0, // Skip to: 7797
+/* 7770 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7773 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7785
+/* 7777 */ MCD_OPC_CheckPredicate, 0, 120, 128, // Skip to: 40669
+/* 7781 */ MCD_OPC_Decode, 212, 15, 98, // Opcode: TBXv8i8Two
+/* 7785 */ MCD_OPC_FilterValue, 1, 112, 128, // Skip to: 40669
+/* 7789 */ MCD_OPC_CheckPredicate, 0, 108, 128, // Skip to: 40669
+/* 7793 */ MCD_OPC_Decode, 172, 13, 93, // Opcode: SSUBWv8i8_v8i16
+/* 7797 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 7815
+/* 7801 */ MCD_OPC_CheckPredicate, 0, 96, 128, // Skip to: 40669
+/* 7805 */ MCD_OPC_CheckField, 21, 1, 1, 90, 128, // Skip to: 40669
+/* 7811 */ MCD_OPC_Decode, 204, 1, 89, // Opcode: CMGTv8i8
+/* 7815 */ MCD_OPC_FilterValue, 14, 46, 0, // Skip to: 7865
+/* 7819 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7822 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7834
+/* 7826 */ MCD_OPC_CheckPredicate, 0, 71, 128, // Skip to: 40669
+/* 7830 */ MCD_OPC_Decode, 204, 18, 89, // Opcode: ZIP1v8i8
+/* 7834 */ MCD_OPC_FilterValue, 1, 63, 128, // Skip to: 40669
+/* 7838 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 7841 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7853
+/* 7845 */ MCD_OPC_CheckPredicate, 0, 52, 128, // Skip to: 40669
+/* 7849 */ MCD_OPC_Decode, 191, 15, 99, // Opcode: SUQADDv8i8
+/* 7853 */ MCD_OPC_FilterValue, 16, 44, 128, // Skip to: 40669
+/* 7857 */ MCD_OPC_CheckPredicate, 0, 40, 128, // Skip to: 40669
+/* 7861 */ MCD_OPC_Decode, 239, 9, 100, // Opcode: SADDLVv8i8v
+/* 7865 */ MCD_OPC_FilterValue, 15, 71, 0, // Skip to: 7940
+/* 7869 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7872 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 7928
+/* 7876 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
+/* 7879 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 7916
+/* 7883 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
+/* 7886 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 7904
+/* 7890 */ MCD_OPC_CheckPredicate, 0, 7, 128, // Skip to: 40669
+/* 7894 */ MCD_OPC_CheckField, 18, 1, 1, 1, 128, // Skip to: 40669
+/* 7900 */ MCD_OPC_Decode, 250, 16, 101, // Opcode: UMOVvi32
+/* 7904 */ MCD_OPC_FilterValue, 1, 249, 127, // Skip to: 40669
+/* 7908 */ MCD_OPC_CheckPredicate, 0, 245, 127, // Skip to: 40669
+/* 7912 */ MCD_OPC_Decode, 249, 16, 96, // Opcode: UMOVvi16
+/* 7916 */ MCD_OPC_FilterValue, 1, 237, 127, // Skip to: 40669
+/* 7920 */ MCD_OPC_CheckPredicate, 0, 233, 127, // Skip to: 40669
+/* 7924 */ MCD_OPC_Decode, 252, 16, 97, // Opcode: UMOVvi8
+/* 7928 */ MCD_OPC_FilterValue, 1, 225, 127, // Skip to: 40669
+/* 7932 */ MCD_OPC_CheckPredicate, 0, 221, 127, // Skip to: 40669
+/* 7936 */ MCD_OPC_Decode, 188, 1, 89, // Opcode: CMGEv8i8
+/* 7940 */ MCD_OPC_FilterValue, 16, 26, 0, // Skip to: 7970
+/* 7944 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 7947 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 7959
+/* 7951 */ MCD_OPC_CheckPredicate, 0, 202, 127, // Skip to: 40669
+/* 7955 */ MCD_OPC_Decode, 201, 15, 102, // Opcode: TBLv8i8Three
+/* 7959 */ MCD_OPC_FilterValue, 1, 194, 127, // Skip to: 40669
+/* 7963 */ MCD_OPC_CheckPredicate, 0, 190, 127, // Skip to: 40669
+/* 7967 */ MCD_OPC_Decode, 37, 103, // Opcode: ADDHNv8i16_v8i8
+/* 7970 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 7988
+/* 7974 */ MCD_OPC_CheckPredicate, 0, 179, 127, // Skip to: 40669
+/* 7978 */ MCD_OPC_CheckField, 21, 1, 1, 173, 127, // Skip to: 40669
+/* 7984 */ MCD_OPC_Decode, 144, 13, 89, // Opcode: SSHLv8i8
+/* 7988 */ MCD_OPC_FilterValue, 18, 27, 0, // Skip to: 8019
+/* 7992 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 7995 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 8007
+/* 7999 */ MCD_OPC_CheckPredicate, 0, 154, 127, // Skip to: 40669
+/* 8003 */ MCD_OPC_Decode, 149, 1, 90, // Opcode: CLSv8i8
+/* 8007 */ MCD_OPC_FilterValue, 33, 146, 127, // Skip to: 40669
+/* 8011 */ MCD_OPC_CheckPredicate, 0, 142, 127, // Skip to: 40669
+/* 8015 */ MCD_OPC_Decode, 211, 12, 95, // Opcode: SQXTNv8i8
+/* 8019 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 8037
+/* 8023 */ MCD_OPC_CheckPredicate, 0, 130, 127, // Skip to: 40669
+/* 8027 */ MCD_OPC_CheckField, 21, 1, 1, 124, 127, // Skip to: 40669
+/* 8033 */ MCD_OPC_Decode, 172, 12, 89, // Opcode: SQSHLv8i8
+/* 8037 */ MCD_OPC_FilterValue, 20, 27, 0, // Skip to: 8068
+/* 8041 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 8044 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8056
+/* 8048 */ MCD_OPC_CheckPredicate, 0, 105, 127, // Skip to: 40669
+/* 8052 */ MCD_OPC_Decode, 211, 15, 104, // Opcode: TBXv8i8Three
+/* 8056 */ MCD_OPC_FilterValue, 1, 97, 127, // Skip to: 40669
+/* 8060 */ MCD_OPC_CheckPredicate, 0, 93, 127, // Skip to: 40669
+/* 8064 */ MCD_OPC_Decode, 204, 9, 105, // Opcode: SABALv8i8_v8i16
+/* 8068 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 8086
+/* 8072 */ MCD_OPC_CheckPredicate, 0, 81, 127, // Skip to: 40669
+/* 8076 */ MCD_OPC_CheckField, 21, 1, 1, 75, 127, // Skip to: 40669
+/* 8082 */ MCD_OPC_Decode, 242, 12, 89, // Opcode: SRSHLv8i8
+/* 8086 */ MCD_OPC_FilterValue, 22, 33, 0, // Skip to: 8123
+/* 8090 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 8093 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8105
+/* 8097 */ MCD_OPC_CheckPredicate, 0, 56, 127, // Skip to: 40669
+/* 8101 */ MCD_OPC_Decode, 191, 18, 89, // Opcode: UZP2v8i8
+/* 8105 */ MCD_OPC_FilterValue, 1, 48, 127, // Skip to: 40669
+/* 8109 */ MCD_OPC_CheckPredicate, 0, 44, 127, // Skip to: 40669
+/* 8113 */ MCD_OPC_CheckField, 16, 5, 0, 38, 127, // Skip to: 40669
+/* 8119 */ MCD_OPC_Decode, 247, 1, 90, // Opcode: CNTv8i8
+/* 8123 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 8141
+/* 8127 */ MCD_OPC_CheckPredicate, 0, 26, 127, // Skip to: 40669
+/* 8131 */ MCD_OPC_CheckField, 21, 1, 1, 20, 127, // Skip to: 40669
+/* 8137 */ MCD_OPC_Decode, 250, 11, 89, // Opcode: SQRSHLv8i8
+/* 8141 */ MCD_OPC_FilterValue, 24, 27, 0, // Skip to: 8172
+/* 8145 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 8148 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8160
+/* 8152 */ MCD_OPC_CheckPredicate, 0, 1, 127, // Skip to: 40669
+/* 8156 */ MCD_OPC_Decode, 199, 15, 106, // Opcode: TBLv8i8Four
+/* 8160 */ MCD_OPC_FilterValue, 1, 249, 126, // Skip to: 40669
+/* 8164 */ MCD_OPC_CheckPredicate, 0, 245, 126, // Skip to: 40669
+/* 8168 */ MCD_OPC_Decode, 154, 15, 103, // Opcode: SUBHNv8i16_v8i8
+/* 8172 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 8190
+/* 8176 */ MCD_OPC_CheckPredicate, 0, 233, 126, // Skip to: 40669
+/* 8180 */ MCD_OPC_CheckField, 21, 1, 1, 227, 126, // Skip to: 40669
+/* 8186 */ MCD_OPC_Decode, 219, 10, 89, // Opcode: SMAXv8i8
+/* 8190 */ MCD_OPC_FilterValue, 26, 46, 0, // Skip to: 8240
+/* 8194 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 8197 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8209
+/* 8201 */ MCD_OPC_CheckPredicate, 0, 208, 126, // Skip to: 40669
+/* 8205 */ MCD_OPC_Decode, 232, 15, 89, // Opcode: TRN2v8i8
+/* 8209 */ MCD_OPC_FilterValue, 1, 200, 126, // Skip to: 40669
+/* 8213 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 8216 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8228
+/* 8220 */ MCD_OPC_CheckPredicate, 0, 189, 126, // Skip to: 40669
+/* 8224 */ MCD_OPC_Decode, 228, 9, 99, // Opcode: SADALPv8i8_v4i16
+/* 8228 */ MCD_OPC_FilterValue, 1, 181, 126, // Skip to: 40669
+/* 8232 */ MCD_OPC_CheckPredicate, 0, 177, 126, // Skip to: 40669
+/* 8236 */ MCD_OPC_Decode, 197, 3, 95, // Opcode: FCVTNv4i16
+/* 8240 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 8258
+/* 8244 */ MCD_OPC_CheckPredicate, 0, 165, 126, // Skip to: 40669
+/* 8248 */ MCD_OPC_CheckField, 21, 1, 1, 159, 126, // Skip to: 40669
+/* 8254 */ MCD_OPC_Decode, 237, 10, 89, // Opcode: SMINv8i8
+/* 8258 */ MCD_OPC_FilterValue, 28, 27, 0, // Skip to: 8289
+/* 8262 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 8265 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8277
+/* 8269 */ MCD_OPC_CheckPredicate, 0, 140, 126, // Skip to: 40669
+/* 8273 */ MCD_OPC_Decode, 209, 15, 107, // Opcode: TBXv8i8Four
+/* 8277 */ MCD_OPC_FilterValue, 1, 132, 126, // Skip to: 40669
+/* 8281 */ MCD_OPC_CheckPredicate, 0, 128, 126, // Skip to: 40669
+/* 8285 */ MCD_OPC_Decode, 216, 9, 85, // Opcode: SABDLv8i8_v8i16
+/* 8289 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 8307
+/* 8293 */ MCD_OPC_CheckPredicate, 0, 116, 126, // Skip to: 40669
+/* 8297 */ MCD_OPC_CheckField, 21, 1, 1, 110, 126, // Skip to: 40669
+/* 8303 */ MCD_OPC_Decode, 222, 9, 89, // Opcode: SABDv8i8
+/* 8307 */ MCD_OPC_FilterValue, 30, 46, 0, // Skip to: 8357
+/* 8311 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 8314 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8326
+/* 8318 */ MCD_OPC_CheckPredicate, 0, 91, 126, // Skip to: 40669
+/* 8322 */ MCD_OPC_Decode, 211, 18, 89, // Opcode: ZIP2v8i8
+/* 8326 */ MCD_OPC_FilterValue, 1, 83, 126, // Skip to: 40669
+/* 8330 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 8333 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8345
+/* 8337 */ MCD_OPC_CheckPredicate, 0, 72, 126, // Skip to: 40669
+/* 8341 */ MCD_OPC_Decode, 157, 11, 90, // Opcode: SQABSv8i8
+/* 8345 */ MCD_OPC_FilterValue, 1, 64, 126, // Skip to: 40669
+/* 8349 */ MCD_OPC_CheckPredicate, 0, 60, 126, // Skip to: 40669
+/* 8353 */ MCD_OPC_Decode, 157, 3, 108, // Opcode: FCVTLv4i16
+/* 8357 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 8375
+/* 8361 */ MCD_OPC_CheckPredicate, 0, 48, 126, // Skip to: 40669
+/* 8365 */ MCD_OPC_CheckField, 21, 1, 1, 42, 126, // Skip to: 40669
+/* 8371 */ MCD_OPC_Decode, 210, 9, 109, // Opcode: SABAv8i8
+/* 8375 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 8393
+/* 8379 */ MCD_OPC_CheckPredicate, 0, 30, 126, // Skip to: 40669
+/* 8383 */ MCD_OPC_CheckField, 21, 1, 1, 24, 126, // Skip to: 40669
+/* 8389 */ MCD_OPC_Decode, 247, 10, 105, // Opcode: SMLALv8i8_v8i16
+/* 8393 */ MCD_OPC_FilterValue, 33, 13, 0, // Skip to: 8410
+/* 8397 */ MCD_OPC_CheckPredicate, 0, 12, 126, // Skip to: 40669
+/* 8401 */ MCD_OPC_CheckField, 21, 1, 1, 6, 126, // Skip to: 40669
+/* 8407 */ MCD_OPC_Decode, 76, 89, // Opcode: ADDv8i8
+/* 8410 */ MCD_OPC_FilterValue, 34, 27, 0, // Skip to: 8441
+/* 8414 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 8417 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 8429
+/* 8421 */ MCD_OPC_CheckPredicate, 0, 244, 125, // Skip to: 40669
+/* 8425 */ MCD_OPC_Decode, 205, 1, 90, // Opcode: CMGTv8i8rz
+/* 8429 */ MCD_OPC_FilterValue, 33, 236, 125, // Skip to: 40669
+/* 8433 */ MCD_OPC_CheckPredicate, 0, 232, 125, // Skip to: 40669
+/* 8437 */ MCD_OPC_Decode, 167, 5, 90, // Opcode: FRINTNv2f32
+/* 8441 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 8459
+/* 8445 */ MCD_OPC_CheckPredicate, 0, 220, 125, // Skip to: 40669
+/* 8449 */ MCD_OPC_CheckField, 21, 1, 1, 214, 125, // Skip to: 40669
+/* 8455 */ MCD_OPC_Decode, 245, 1, 89, // Opcode: CMTSTv8i8
+/* 8459 */ MCD_OPC_FilterValue, 37, 14, 0, // Skip to: 8477
+/* 8463 */ MCD_OPC_CheckPredicate, 0, 202, 125, // Skip to: 40669
+/* 8467 */ MCD_OPC_CheckField, 21, 1, 1, 196, 125, // Skip to: 40669
+/* 8473 */ MCD_OPC_Decode, 189, 8, 109, // Opcode: MLAv8i8
+/* 8477 */ MCD_OPC_FilterValue, 38, 27, 0, // Skip to: 8508
+/* 8481 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 8484 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 8496
+/* 8488 */ MCD_OPC_CheckPredicate, 0, 177, 125, // Skip to: 40669
+/* 8492 */ MCD_OPC_Decode, 173, 1, 90, // Opcode: CMEQv8i8rz
+/* 8496 */ MCD_OPC_FilterValue, 33, 169, 125, // Skip to: 40669
+/* 8500 */ MCD_OPC_CheckPredicate, 0, 165, 125, // Skip to: 40669
+/* 8504 */ MCD_OPC_Decode, 162, 5, 90, // Opcode: FRINTMv2f32
+/* 8508 */ MCD_OPC_FilterValue, 39, 14, 0, // Skip to: 8526
+/* 8512 */ MCD_OPC_CheckPredicate, 0, 153, 125, // Skip to: 40669
+/* 8516 */ MCD_OPC_CheckField, 21, 1, 1, 147, 125, // Skip to: 40669
+/* 8522 */ MCD_OPC_Decode, 238, 8, 89, // Opcode: MULv8i8
+/* 8526 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 8544
+/* 8530 */ MCD_OPC_CheckPredicate, 0, 135, 125, // Skip to: 40669
+/* 8534 */ MCD_OPC_CheckField, 21, 1, 1, 129, 125, // Skip to: 40669
+/* 8540 */ MCD_OPC_Decode, 129, 11, 105, // Opcode: SMLSLv8i8_v8i16
+/* 8544 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 8562
+/* 8548 */ MCD_OPC_CheckPredicate, 0, 117, 125, // Skip to: 40669
+/* 8552 */ MCD_OPC_CheckField, 21, 1, 1, 111, 125, // Skip to: 40669
+/* 8558 */ MCD_OPC_Decode, 208, 10, 89, // Opcode: SMAXPv8i8
+/* 8562 */ MCD_OPC_FilterValue, 42, 51, 0, // Skip to: 8617
+/* 8566 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 8569 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 8581
+/* 8573 */ MCD_OPC_CheckPredicate, 0, 92, 125, // Skip to: 40669
+/* 8577 */ MCD_OPC_Decode, 237, 1, 90, // Opcode: CMLTv8i8rz
+/* 8581 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 8593
+/* 8585 */ MCD_OPC_CheckPredicate, 0, 80, 125, // Skip to: 40669
+/* 8589 */ MCD_OPC_Decode, 184, 3, 90, // Opcode: FCVTNSv2f32
+/* 8593 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 8605
+/* 8597 */ MCD_OPC_CheckPredicate, 0, 68, 125, // Skip to: 40669
+/* 8601 */ MCD_OPC_Decode, 213, 10, 110, // Opcode: SMAXVv8i8v
+/* 8605 */ MCD_OPC_FilterValue, 49, 60, 125, // Skip to: 40669
+/* 8609 */ MCD_OPC_CheckPredicate, 0, 56, 125, // Skip to: 40669
+/* 8613 */ MCD_OPC_Decode, 231, 10, 110, // Opcode: SMINVv8i8v
+/* 8617 */ MCD_OPC_FilterValue, 43, 14, 0, // Skip to: 8635
+/* 8621 */ MCD_OPC_CheckPredicate, 0, 44, 125, // Skip to: 40669
+/* 8625 */ MCD_OPC_CheckField, 21, 1, 1, 38, 125, // Skip to: 40669
+/* 8631 */ MCD_OPC_Decode, 226, 10, 89, // Opcode: SMINPv8i8
+/* 8635 */ MCD_OPC_FilterValue, 46, 37, 0, // Skip to: 8676
+/* 8639 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 8642 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 8653
+/* 8646 */ MCD_OPC_CheckPredicate, 0, 19, 125, // Skip to: 40669
+/* 8650 */ MCD_OPC_Decode, 27, 90, // Opcode: ABSv8i8
+/* 8653 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 8665
+/* 8657 */ MCD_OPC_CheckPredicate, 0, 8, 125, // Skip to: 40669
+/* 8661 */ MCD_OPC_Decode, 166, 3, 90, // Opcode: FCVTMSv2f32
+/* 8665 */ MCD_OPC_FilterValue, 49, 0, 125, // Skip to: 40669
+/* 8669 */ MCD_OPC_CheckPredicate, 0, 252, 124, // Skip to: 40669
+/* 8673 */ MCD_OPC_Decode, 59, 110, // Opcode: ADDVv8i8v
+/* 8676 */ MCD_OPC_FilterValue, 47, 13, 0, // Skip to: 8693
+/* 8680 */ MCD_OPC_CheckPredicate, 0, 241, 124, // Skip to: 40669
+/* 8684 */ MCD_OPC_CheckField, 21, 1, 1, 235, 124, // Skip to: 40669
+/* 8690 */ MCD_OPC_Decode, 45, 89, // Opcode: ADDPv8i8
+/* 8693 */ MCD_OPC_FilterValue, 48, 14, 0, // Skip to: 8711
+/* 8697 */ MCD_OPC_CheckPredicate, 0, 224, 124, // Skip to: 40669
+/* 8701 */ MCD_OPC_CheckField, 21, 1, 1, 218, 124, // Skip to: 40669
+/* 8707 */ MCD_OPC_Decode, 146, 11, 85, // Opcode: SMULLv8i8_v8i16
+/* 8711 */ MCD_OPC_FilterValue, 49, 14, 0, // Skip to: 8729
+/* 8715 */ MCD_OPC_CheckPredicate, 0, 206, 124, // Skip to: 40669
+/* 8719 */ MCD_OPC_CheckField, 21, 1, 1, 200, 124, // Skip to: 40669
+/* 8725 */ MCD_OPC_Decode, 169, 4, 89, // Opcode: FMAXNMv2f32
+/* 8729 */ MCD_OPC_FilterValue, 50, 14, 0, // Skip to: 8747
+/* 8733 */ MCD_OPC_CheckPredicate, 0, 188, 124, // Skip to: 40669
+/* 8737 */ MCD_OPC_CheckField, 16, 6, 33, 182, 124, // Skip to: 40669
+/* 8743 */ MCD_OPC_Decode, 140, 3, 90, // Opcode: FCVTASv2f32
+/* 8747 */ MCD_OPC_FilterValue, 51, 14, 0, // Skip to: 8765
+/* 8751 */ MCD_OPC_CheckPredicate, 0, 170, 124, // Skip to: 40669
+/* 8755 */ MCD_OPC_CheckField, 21, 1, 1, 164, 124, // Skip to: 40669
+/* 8761 */ MCD_OPC_Decode, 206, 4, 109, // Opcode: FMLAv2f32
+/* 8765 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 8783
+/* 8769 */ MCD_OPC_CheckPredicate, 0, 152, 124, // Skip to: 40669
+/* 8773 */ MCD_OPC_CheckField, 21, 1, 1, 146, 124, // Skip to: 40669
+/* 8779 */ MCD_OPC_Decode, 205, 2, 89, // Opcode: FADDv2f32
+/* 8783 */ MCD_OPC_FilterValue, 54, 14, 0, // Skip to: 8801
+/* 8787 */ MCD_OPC_CheckPredicate, 0, 134, 124, // Skip to: 40669
+/* 8791 */ MCD_OPC_CheckField, 16, 6, 33, 128, 124, // Skip to: 40669
+/* 8797 */ MCD_OPC_Decode, 142, 10, 90, // Opcode: SCVTFv2f32
+/* 8801 */ MCD_OPC_FilterValue, 55, 14, 0, // Skip to: 8819
+/* 8805 */ MCD_OPC_CheckPredicate, 0, 116, 124, // Skip to: 40669
+/* 8809 */ MCD_OPC_CheckField, 21, 1, 1, 110, 124, // Skip to: 40669
+/* 8815 */ MCD_OPC_Decode, 241, 4, 89, // Opcode: FMULXv2f32
+/* 8819 */ MCD_OPC_FilterValue, 56, 14, 0, // Skip to: 8837
+/* 8823 */ MCD_OPC_CheckPredicate, 0, 98, 124, // Skip to: 40669
+/* 8827 */ MCD_OPC_CheckField, 21, 1, 1, 92, 124, // Skip to: 40669
+/* 8833 */ MCD_OPC_Decode, 148, 9, 85, // Opcode: PMULLv8i8
+/* 8837 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 8855
+/* 8841 */ MCD_OPC_CheckPredicate, 0, 80, 124, // Skip to: 40669
+/* 8845 */ MCD_OPC_CheckField, 21, 1, 1, 74, 124, // Skip to: 40669
+/* 8851 */ MCD_OPC_Decode, 216, 2, 89, // Opcode: FCMEQv2f32
+/* 8855 */ MCD_OPC_FilterValue, 61, 14, 0, // Skip to: 8873
+/* 8859 */ MCD_OPC_CheckPredicate, 0, 62, 124, // Skip to: 40669
+/* 8863 */ MCD_OPC_CheckField, 21, 1, 1, 56, 124, // Skip to: 40669
+/* 8869 */ MCD_OPC_Decode, 179, 4, 89, // Opcode: FMAXv2f32
+/* 8873 */ MCD_OPC_FilterValue, 63, 48, 124, // Skip to: 40669
+/* 8877 */ MCD_OPC_CheckPredicate, 0, 44, 124, // Skip to: 40669
+/* 8881 */ MCD_OPC_CheckField, 21, 1, 1, 38, 124, // Skip to: 40669
+/* 8887 */ MCD_OPC_Decode, 145, 5, 89, // Opcode: FRECPSv2f32
+/* 8891 */ MCD_OPC_FilterValue, 1, 85, 4, // Skip to: 10004
+/* 8895 */ MCD_OPC_ExtractField, 14, 2, // Inst{15-14} ...
+/* 8898 */ MCD_OPC_FilterValue, 0, 64, 1, // Skip to: 9222
+/* 8902 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 8905 */ MCD_OPC_FilterValue, 0, 162, 0, // Skip to: 9071
+/* 8909 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 8912 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8924
+/* 8916 */ MCD_OPC_CheckPredicate, 0, 5, 124, // Skip to: 40669
+/* 8920 */ MCD_OPC_Decode, 176, 2, 111, // Opcode: EXTv8i8
+/* 8924 */ MCD_OPC_FilterValue, 1, 253, 123, // Skip to: 40669
+/* 8928 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ...
+/* 8931 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 8943
+/* 8935 */ MCD_OPC_CheckPredicate, 0, 242, 123, // Skip to: 40669
+/* 8939 */ MCD_OPC_Decode, 151, 16, 85, // Opcode: UADDLv8i8_v8i16
+/* 8943 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 8961
+/* 8947 */ MCD_OPC_CheckPredicate, 0, 230, 123, // Skip to: 40669
+/* 8951 */ MCD_OPC_CheckField, 16, 5, 0, 224, 123, // Skip to: 40669
+/* 8957 */ MCD_OPC_Decode, 176, 9, 90, // Opcode: REV32v8i8
+/* 8961 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 8973
+/* 8965 */ MCD_OPC_CheckPredicate, 0, 212, 123, // Skip to: 40669
+/* 8969 */ MCD_OPC_Decode, 157, 16, 93, // Opcode: UADDWv8i8_v8i16
+/* 8973 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 8985
+/* 8977 */ MCD_OPC_CheckPredicate, 0, 200, 123, // Skip to: 40669
+/* 8981 */ MCD_OPC_Decode, 171, 18, 85, // Opcode: USUBLv8i8_v8i16
+/* 8985 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 9016
+/* 8989 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 8992 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9004
+/* 8996 */ MCD_OPC_CheckPredicate, 0, 181, 123, // Skip to: 40669
+/* 9000 */ MCD_OPC_Decode, 140, 16, 90, // Opcode: UADDLPv8i8_v4i16
+/* 9004 */ MCD_OPC_FilterValue, 1, 173, 123, // Skip to: 40669
+/* 9008 */ MCD_OPC_CheckPredicate, 0, 169, 123, // Skip to: 40669
+/* 9012 */ MCD_OPC_Decode, 220, 12, 95, // Opcode: SQXTUNv8i8
+/* 9016 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 9028
+/* 9020 */ MCD_OPC_CheckPredicate, 0, 157, 123, // Skip to: 40669
+/* 9024 */ MCD_OPC_Decode, 177, 18, 93, // Opcode: USUBWv8i8_v8i16
+/* 9028 */ MCD_OPC_FilterValue, 7, 149, 123, // Skip to: 40669
+/* 9032 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 9035 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 9047
+/* 9039 */ MCD_OPC_CheckPredicate, 0, 138, 123, // Skip to: 40669
+/* 9043 */ MCD_OPC_Decode, 157, 18, 99, // Opcode: USQADDv8i8
+/* 9047 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 9059
+/* 9051 */ MCD_OPC_CheckPredicate, 0, 126, 123, // Skip to: 40669
+/* 9055 */ MCD_OPC_Decode, 173, 10, 108, // Opcode: SHLLv8i8
+/* 9059 */ MCD_OPC_FilterValue, 16, 118, 123, // Skip to: 40669
+/* 9063 */ MCD_OPC_CheckPredicate, 0, 114, 123, // Skip to: 40669
+/* 9067 */ MCD_OPC_Decode, 145, 16, 100, // Opcode: UADDLVv8i8v
+/* 9071 */ MCD_OPC_FilterValue, 1, 106, 123, // Skip to: 40669
+/* 9075 */ MCD_OPC_ExtractField, 11, 3, // Inst{13-11} ...
+/* 9078 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 9096
+/* 9082 */ MCD_OPC_CheckPredicate, 0, 95, 123, // Skip to: 40669
+/* 9086 */ MCD_OPC_CheckField, 21, 1, 1, 89, 123, // Skip to: 40669
+/* 9092 */ MCD_OPC_Decode, 187, 16, 89, // Opcode: UHADDv8i8
+/* 9096 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 9114
+/* 9100 */ MCD_OPC_CheckPredicate, 0, 77, 123, // Skip to: 40669
+/* 9104 */ MCD_OPC_CheckField, 21, 1, 1, 71, 123, // Skip to: 40669
+/* 9110 */ MCD_OPC_Decode, 147, 17, 89, // Opcode: UQADDv8i8
+/* 9114 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 9132
+/* 9118 */ MCD_OPC_CheckPredicate, 0, 59, 123, // Skip to: 40669
+/* 9122 */ MCD_OPC_CheckField, 21, 1, 1, 53, 123, // Skip to: 40669
+/* 9128 */ MCD_OPC_Decode, 226, 17, 89, // Opcode: URHADDv8i8
+/* 9132 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 9150
+/* 9136 */ MCD_OPC_CheckPredicate, 0, 41, 123, // Skip to: 40669
+/* 9140 */ MCD_OPC_CheckField, 21, 1, 1, 35, 123, // Skip to: 40669
+/* 9146 */ MCD_OPC_Decode, 171, 2, 89, // Opcode: EORv8i8
+/* 9150 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 9168
+/* 9154 */ MCD_OPC_CheckPredicate, 0, 23, 123, // Skip to: 40669
+/* 9158 */ MCD_OPC_CheckField, 21, 1, 1, 17, 123, // Skip to: 40669
+/* 9164 */ MCD_OPC_Decode, 193, 16, 89, // Opcode: UHSUBv8i8
+/* 9168 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 9186
+/* 9172 */ MCD_OPC_CheckPredicate, 0, 5, 123, // Skip to: 40669
+/* 9176 */ MCD_OPC_CheckField, 21, 1, 1, 255, 122, // Skip to: 40669
+/* 9182 */ MCD_OPC_Decode, 209, 17, 89, // Opcode: UQSUBv8i8
+/* 9186 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 9204
+/* 9190 */ MCD_OPC_CheckPredicate, 0, 243, 122, // Skip to: 40669
+/* 9194 */ MCD_OPC_CheckField, 21, 1, 1, 237, 122, // Skip to: 40669
+/* 9200 */ MCD_OPC_Decode, 213, 1, 89, // Opcode: CMHIv8i8
+/* 9204 */ MCD_OPC_FilterValue, 7, 229, 122, // Skip to: 40669
+/* 9208 */ MCD_OPC_CheckPredicate, 0, 225, 122, // Skip to: 40669
+/* 9212 */ MCD_OPC_CheckField, 21, 1, 1, 219, 122, // Skip to: 40669
+/* 9218 */ MCD_OPC_Decode, 221, 1, 89, // Opcode: CMHSv8i8
+/* 9222 */ MCD_OPC_FilterValue, 1, 48, 1, // Skip to: 9530
+/* 9226 */ MCD_OPC_ExtractField, 10, 4, // Inst{13-10} ...
+/* 9229 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 9247
+/* 9233 */ MCD_OPC_CheckPredicate, 0, 200, 122, // Skip to: 40669
+/* 9237 */ MCD_OPC_CheckField, 21, 1, 1, 194, 122, // Skip to: 40669
+/* 9243 */ MCD_OPC_Decode, 161, 9, 103, // Opcode: RADDHNv8i16_v8i8
+/* 9247 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 9265
+/* 9251 */ MCD_OPC_CheckPredicate, 0, 182, 122, // Skip to: 40669
+/* 9255 */ MCD_OPC_CheckField, 21, 1, 1, 176, 122, // Skip to: 40669
+/* 9261 */ MCD_OPC_Decode, 138, 18, 89, // Opcode: USHLv8i8
+/* 9265 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 9296
+/* 9269 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 9272 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 9284
+/* 9276 */ MCD_OPC_CheckPredicate, 0, 157, 122, // Skip to: 40669
+/* 9280 */ MCD_OPC_Decode, 157, 1, 90, // Opcode: CLZv8i8
+/* 9284 */ MCD_OPC_FilterValue, 33, 149, 122, // Skip to: 40669
+/* 9288 */ MCD_OPC_CheckPredicate, 0, 145, 122, // Skip to: 40669
+/* 9292 */ MCD_OPC_Decode, 218, 17, 95, // Opcode: UQXTNv8i8
+/* 9296 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 9314
+/* 9300 */ MCD_OPC_CheckPredicate, 0, 133, 122, // Skip to: 40669
+/* 9304 */ MCD_OPC_CheckField, 21, 1, 1, 127, 122, // Skip to: 40669
+/* 9310 */ MCD_OPC_Decode, 188, 17, 89, // Opcode: UQSHLv8i8
+/* 9314 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 9332
+/* 9318 */ MCD_OPC_CheckPredicate, 0, 115, 122, // Skip to: 40669
+/* 9322 */ MCD_OPC_CheckField, 21, 1, 1, 109, 122, // Skip to: 40669
+/* 9328 */ MCD_OPC_Decode, 238, 15, 105, // Opcode: UABALv8i8_v8i16
+/* 9332 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 9350
+/* 9336 */ MCD_OPC_CheckPredicate, 0, 97, 122, // Skip to: 40669
+/* 9340 */ MCD_OPC_CheckField, 21, 1, 1, 91, 122, // Skip to: 40669
+/* 9346 */ MCD_OPC_Decode, 234, 17, 89, // Opcode: URSHLv8i8
+/* 9350 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 9368
+/* 9354 */ MCD_OPC_CheckPredicate, 0, 79, 122, // Skip to: 40669
+/* 9358 */ MCD_OPC_CheckField, 16, 6, 32, 73, 122, // Skip to: 40669
+/* 9364 */ MCD_OPC_Decode, 254, 8, 90, // Opcode: NOTv8i8
+/* 9368 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 9386
+/* 9372 */ MCD_OPC_CheckPredicate, 0, 61, 122, // Skip to: 40669
+/* 9376 */ MCD_OPC_CheckField, 21, 1, 1, 55, 122, // Skip to: 40669
+/* 9382 */ MCD_OPC_Decode, 158, 17, 89, // Opcode: UQRSHLv8i8
+/* 9386 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 9404
+/* 9390 */ MCD_OPC_CheckPredicate, 0, 43, 122, // Skip to: 40669
+/* 9394 */ MCD_OPC_CheckField, 21, 1, 1, 37, 122, // Skip to: 40669
+/* 9400 */ MCD_OPC_Decode, 198, 9, 103, // Opcode: RSUBHNv8i16_v8i8
+/* 9404 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 9422
+/* 9408 */ MCD_OPC_CheckPredicate, 0, 25, 122, // Skip to: 40669
+/* 9412 */ MCD_OPC_CheckField, 21, 1, 1, 19, 122, // Skip to: 40669
+/* 9418 */ MCD_OPC_Decode, 211, 16, 89, // Opcode: UMAXv8i8
+/* 9422 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 9440
+/* 9426 */ MCD_OPC_CheckPredicate, 0, 7, 122, // Skip to: 40669
+/* 9430 */ MCD_OPC_CheckField, 16, 6, 32, 1, 122, // Skip to: 40669
+/* 9436 */ MCD_OPC_Decode, 134, 16, 99, // Opcode: UADALPv8i8_v4i16
+/* 9440 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 9458
+/* 9444 */ MCD_OPC_CheckPredicate, 0, 245, 121, // Skip to: 40669
+/* 9448 */ MCD_OPC_CheckField, 21, 1, 1, 239, 121, // Skip to: 40669
+/* 9454 */ MCD_OPC_Decode, 228, 16, 89, // Opcode: UMINv8i8
+/* 9458 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 9476
+/* 9462 */ MCD_OPC_CheckPredicate, 0, 227, 121, // Skip to: 40669
+/* 9466 */ MCD_OPC_CheckField, 21, 1, 1, 221, 121, // Skip to: 40669
+/* 9472 */ MCD_OPC_Decode, 250, 15, 85, // Opcode: UABDLv8i8_v8i16
+/* 9476 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 9494
+/* 9480 */ MCD_OPC_CheckPredicate, 0, 209, 121, // Skip to: 40669
+/* 9484 */ MCD_OPC_CheckField, 21, 1, 1, 203, 121, // Skip to: 40669
+/* 9490 */ MCD_OPC_Decode, 128, 16, 89, // Opcode: UABDv8i8
+/* 9494 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 9512
+/* 9498 */ MCD_OPC_CheckPredicate, 0, 191, 121, // Skip to: 40669
+/* 9502 */ MCD_OPC_CheckField, 16, 6, 32, 185, 121, // Skip to: 40669
+/* 9508 */ MCD_OPC_Decode, 227, 11, 90, // Opcode: SQNEGv8i8
+/* 9512 */ MCD_OPC_FilterValue, 15, 177, 121, // Skip to: 40669
+/* 9516 */ MCD_OPC_CheckPredicate, 0, 173, 121, // Skip to: 40669
+/* 9520 */ MCD_OPC_CheckField, 21, 1, 1, 167, 121, // Skip to: 40669
+/* 9526 */ MCD_OPC_Decode, 244, 15, 109, // Opcode: UABAv8i8
+/* 9530 */ MCD_OPC_FilterValue, 2, 27, 1, // Skip to: 9817
+/* 9534 */ MCD_OPC_ExtractField, 10, 4, // Inst{13-10} ...
+/* 9537 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 9555
+/* 9541 */ MCD_OPC_CheckPredicate, 0, 148, 121, // Skip to: 40669
+/* 9545 */ MCD_OPC_CheckField, 21, 1, 1, 142, 121, // Skip to: 40669
+/* 9551 */ MCD_OPC_Decode, 238, 16, 105, // Opcode: UMLALv8i8_v8i16
+/* 9555 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 9573
+/* 9559 */ MCD_OPC_CheckPredicate, 0, 130, 121, // Skip to: 40669
+/* 9563 */ MCD_OPC_CheckField, 21, 1, 1, 124, 121, // Skip to: 40669
+/* 9569 */ MCD_OPC_Decode, 180, 15, 89, // Opcode: SUBv8i8
+/* 9573 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 9604
+/* 9577 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 9580 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 9592
+/* 9584 */ MCD_OPC_CheckPredicate, 0, 105, 121, // Skip to: 40669
+/* 9588 */ MCD_OPC_Decode, 189, 1, 90, // Opcode: CMGEv8i8rz
+/* 9592 */ MCD_OPC_FilterValue, 33, 97, 121, // Skip to: 40669
+/* 9596 */ MCD_OPC_CheckPredicate, 0, 93, 121, // Skip to: 40669
+/* 9600 */ MCD_OPC_Decode, 152, 5, 90, // Opcode: FRINTAv2f32
+/* 9604 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 9622
+/* 9608 */ MCD_OPC_CheckPredicate, 0, 81, 121, // Skip to: 40669
+/* 9612 */ MCD_OPC_CheckField, 21, 1, 1, 75, 121, // Skip to: 40669
+/* 9618 */ MCD_OPC_Decode, 172, 1, 89, // Opcode: CMEQv8i8
+/* 9622 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 9640
+/* 9626 */ MCD_OPC_CheckPredicate, 0, 63, 121, // Skip to: 40669
+/* 9630 */ MCD_OPC_CheckField, 21, 1, 1, 57, 121, // Skip to: 40669
+/* 9636 */ MCD_OPC_Decode, 199, 8, 109, // Opcode: MLSv8i8
+/* 9640 */ MCD_OPC_FilterValue, 6, 27, 0, // Skip to: 9671
+/* 9644 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 9647 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 9659
+/* 9651 */ MCD_OPC_CheckPredicate, 0, 38, 121, // Skip to: 40669
+/* 9655 */ MCD_OPC_Decode, 229, 1, 90, // Opcode: CMLEv8i8rz
+/* 9659 */ MCD_OPC_FilterValue, 33, 30, 121, // Skip to: 40669
+/* 9663 */ MCD_OPC_CheckPredicate, 0, 26, 121, // Skip to: 40669
+/* 9667 */ MCD_OPC_Decode, 177, 5, 90, // Opcode: FRINTXv2f32
+/* 9671 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 9689
+/* 9675 */ MCD_OPC_CheckPredicate, 0, 14, 121, // Skip to: 40669
+/* 9679 */ MCD_OPC_CheckField, 21, 1, 1, 8, 121, // Skip to: 40669
+/* 9685 */ MCD_OPC_Decode, 150, 9, 89, // Opcode: PMULv8i8
+/* 9689 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 9707
+/* 9693 */ MCD_OPC_CheckPredicate, 0, 252, 120, // Skip to: 40669
+/* 9697 */ MCD_OPC_CheckField, 21, 1, 1, 246, 120, // Skip to: 40669
+/* 9703 */ MCD_OPC_Decode, 248, 16, 105, // Opcode: UMLSLv8i8_v8i16
+/* 9707 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 9725
+/* 9711 */ MCD_OPC_CheckPredicate, 0, 234, 120, // Skip to: 40669
+/* 9715 */ MCD_OPC_CheckField, 21, 1, 1, 228, 120, // Skip to: 40669
+/* 9721 */ MCD_OPC_Decode, 200, 16, 89, // Opcode: UMAXPv8i8
+/* 9725 */ MCD_OPC_FilterValue, 10, 39, 0, // Skip to: 9768
+/* 9729 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 9732 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 9744
+/* 9736 */ MCD_OPC_CheckPredicate, 0, 209, 120, // Skip to: 40669
+/* 9740 */ MCD_OPC_Decode, 193, 3, 90, // Opcode: FCVTNUv2f32
+/* 9744 */ MCD_OPC_FilterValue, 48, 8, 0, // Skip to: 9756
+/* 9748 */ MCD_OPC_CheckPredicate, 0, 197, 120, // Skip to: 40669
+/* 9752 */ MCD_OPC_Decode, 205, 16, 110, // Opcode: UMAXVv8i8v
+/* 9756 */ MCD_OPC_FilterValue, 49, 189, 120, // Skip to: 40669
+/* 9760 */ MCD_OPC_CheckPredicate, 0, 185, 120, // Skip to: 40669
+/* 9764 */ MCD_OPC_Decode, 222, 16, 110, // Opcode: UMINVv8i8v
+/* 9768 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 9786
+/* 9772 */ MCD_OPC_CheckPredicate, 0, 173, 120, // Skip to: 40669
+/* 9776 */ MCD_OPC_CheckField, 21, 1, 1, 167, 120, // Skip to: 40669
+/* 9782 */ MCD_OPC_Decode, 217, 16, 89, // Opcode: UMINPv8i8
+/* 9786 */ MCD_OPC_FilterValue, 14, 159, 120, // Skip to: 40669
+/* 9790 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 9793 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 9805
+/* 9797 */ MCD_OPC_CheckPredicate, 0, 148, 120, // Skip to: 40669
+/* 9801 */ MCD_OPC_Decode, 252, 8, 90, // Opcode: NEGv8i8
+/* 9805 */ MCD_OPC_FilterValue, 33, 140, 120, // Skip to: 40669
+/* 9809 */ MCD_OPC_CheckPredicate, 0, 136, 120, // Skip to: 40669
+/* 9813 */ MCD_OPC_Decode, 175, 3, 90, // Opcode: FCVTMUv2f32
+/* 9817 */ MCD_OPC_FilterValue, 3, 128, 120, // Skip to: 40669
+/* 9821 */ MCD_OPC_ExtractField, 10, 4, // Inst{13-10} ...
+/* 9824 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 9842
+/* 9828 */ MCD_OPC_CheckPredicate, 0, 117, 120, // Skip to: 40669
+/* 9832 */ MCD_OPC_CheckField, 21, 1, 1, 111, 120, // Skip to: 40669
+/* 9838 */ MCD_OPC_Decode, 136, 17, 85, // Opcode: UMULLv8i8_v8i16
+/* 9842 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 9860
+/* 9846 */ MCD_OPC_CheckPredicate, 0, 99, 120, // Skip to: 40669
+/* 9850 */ MCD_OPC_CheckField, 21, 1, 1, 93, 120, // Skip to: 40669
+/* 9856 */ MCD_OPC_Decode, 162, 4, 89, // Opcode: FMAXNMPv2f32
+/* 9860 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 9878
+/* 9864 */ MCD_OPC_CheckPredicate, 0, 81, 120, // Skip to: 40669
+/* 9868 */ MCD_OPC_CheckField, 16, 6, 33, 75, 120, // Skip to: 40669
+/* 9874 */ MCD_OPC_Decode, 149, 3, 90, // Opcode: FCVTAUv2f32
+/* 9878 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 9896
+/* 9882 */ MCD_OPC_CheckPredicate, 0, 63, 120, // Skip to: 40669
+/* 9886 */ MCD_OPC_CheckField, 21, 1, 1, 57, 120, // Skip to: 40669
+/* 9892 */ MCD_OPC_Decode, 199, 2, 89, // Opcode: FADDPv2f32
+/* 9896 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 9914
+/* 9900 */ MCD_OPC_CheckPredicate, 0, 45, 120, // Skip to: 40669
+/* 9904 */ MCD_OPC_CheckField, 16, 6, 33, 39, 120, // Skip to: 40669
+/* 9910 */ MCD_OPC_Decode, 172, 16, 90, // Opcode: UCVTFv2f32
+/* 9914 */ MCD_OPC_FilterValue, 7, 14, 0, // Skip to: 9932
+/* 9918 */ MCD_OPC_CheckPredicate, 0, 27, 120, // Skip to: 40669
+/* 9922 */ MCD_OPC_CheckField, 21, 1, 1, 21, 120, // Skip to: 40669
+/* 9928 */ MCD_OPC_Decode, 249, 4, 89, // Opcode: FMULv2f32
+/* 9932 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 9950
+/* 9936 */ MCD_OPC_CheckPredicate, 0, 9, 120, // Skip to: 40669
+/* 9940 */ MCD_OPC_CheckField, 21, 1, 1, 3, 120, // Skip to: 40669
+/* 9946 */ MCD_OPC_Decode, 226, 2, 89, // Opcode: FCMGEv2f32
+/* 9950 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 9968
+/* 9954 */ MCD_OPC_CheckPredicate, 0, 247, 119, // Skip to: 40669
+/* 9958 */ MCD_OPC_CheckField, 21, 1, 1, 241, 119, // Skip to: 40669
+/* 9964 */ MCD_OPC_Decode, 190, 2, 89, // Opcode: FACGEv2f32
+/* 9968 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 9986
+/* 9972 */ MCD_OPC_CheckPredicate, 0, 229, 119, // Skip to: 40669
+/* 9976 */ MCD_OPC_CheckField, 21, 1, 1, 223, 119, // Skip to: 40669
+/* 9982 */ MCD_OPC_Decode, 172, 4, 89, // Opcode: FMAXPv2f32
+/* 9986 */ MCD_OPC_FilterValue, 15, 215, 119, // Skip to: 40669
+/* 9990 */ MCD_OPC_CheckPredicate, 0, 211, 119, // Skip to: 40669
+/* 9994 */ MCD_OPC_CheckField, 21, 1, 1, 205, 119, // Skip to: 40669
+/* 10000 */ MCD_OPC_Decode, 155, 4, 89, // Opcode: FDIVv2f32
+/* 10004 */ MCD_OPC_FilterValue, 2, 181, 6, // Skip to: 11725
+/* 10008 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 10011 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 10042
+/* 10015 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10018 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10030
+/* 10022 */ MCD_OPC_CheckPredicate, 0, 179, 119, // Skip to: 40669
+/* 10026 */ MCD_OPC_Decode, 196, 15, 112, // Opcode: TBLv16i8One
+/* 10030 */ MCD_OPC_FilterValue, 1, 171, 119, // Skip to: 40669
+/* 10034 */ MCD_OPC_CheckPredicate, 0, 167, 119, // Skip to: 40669
+/* 10038 */ MCD_OPC_Decode, 240, 9, 112, // Opcode: SADDLv16i8_v8i16
+/* 10042 */ MCD_OPC_FilterValue, 1, 90, 0, // Skip to: 10136
+/* 10046 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10049 */ MCD_OPC_FilterValue, 0, 71, 0, // Skip to: 10124
+/* 10053 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
+/* 10056 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 10112
+/* 10060 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
+/* 10063 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 10100
+/* 10067 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ...
+/* 10070 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 10088
+/* 10074 */ MCD_OPC_CheckPredicate, 0, 127, 119, // Skip to: 40669
+/* 10078 */ MCD_OPC_CheckField, 19, 1, 1, 121, 119, // Skip to: 40669
+/* 10084 */ MCD_OPC_Decode, 151, 2, 113, // Opcode: DUPv2i64lane
+/* 10088 */ MCD_OPC_FilterValue, 1, 113, 119, // Skip to: 40669
+/* 10092 */ MCD_OPC_CheckPredicate, 0, 109, 119, // Skip to: 40669
+/* 10096 */ MCD_OPC_Decode, 155, 2, 114, // Opcode: DUPv4i32lane
+/* 10100 */ MCD_OPC_FilterValue, 1, 101, 119, // Skip to: 40669
+/* 10104 */ MCD_OPC_CheckPredicate, 0, 97, 119, // Skip to: 40669
+/* 10108 */ MCD_OPC_Decode, 157, 2, 115, // Opcode: DUPv8i16lane
+/* 10112 */ MCD_OPC_FilterValue, 1, 89, 119, // Skip to: 40669
+/* 10116 */ MCD_OPC_CheckPredicate, 0, 85, 119, // Skip to: 40669
+/* 10120 */ MCD_OPC_Decode, 147, 2, 116, // Opcode: DUPv16i8lane
+/* 10124 */ MCD_OPC_FilterValue, 1, 77, 119, // Skip to: 40669
+/* 10128 */ MCD_OPC_CheckPredicate, 0, 73, 119, // Skip to: 40669
+/* 10132 */ MCD_OPC_Decode, 162, 10, 112, // Opcode: SHADDv16i8
+/* 10136 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 10154
+/* 10140 */ MCD_OPC_CheckPredicate, 0, 61, 119, // Skip to: 40669
+/* 10144 */ MCD_OPC_CheckField, 16, 6, 32, 55, 119, // Skip to: 40669
+/* 10150 */ MCD_OPC_Decode, 177, 9, 117, // Opcode: REV64v16i8
+/* 10154 */ MCD_OPC_FilterValue, 3, 70, 0, // Skip to: 10228
+/* 10158 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10161 */ MCD_OPC_FilterValue, 0, 51, 0, // Skip to: 10216
+/* 10165 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 10168 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 10180
+/* 10172 */ MCD_OPC_CheckPredicate, 0, 29, 119, // Skip to: 40669
+/* 10176 */ MCD_OPC_Decode, 146, 2, 118, // Opcode: DUPv16i8gpr
+/* 10180 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 10192
+/* 10184 */ MCD_OPC_CheckPredicate, 0, 17, 119, // Skip to: 40669
+/* 10188 */ MCD_OPC_Decode, 156, 2, 118, // Opcode: DUPv8i16gpr
+/* 10192 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 10204
+/* 10196 */ MCD_OPC_CheckPredicate, 0, 5, 119, // Skip to: 40669
+/* 10200 */ MCD_OPC_Decode, 154, 2, 118, // Opcode: DUPv4i32gpr
+/* 10204 */ MCD_OPC_FilterValue, 8, 253, 118, // Skip to: 40669
+/* 10208 */ MCD_OPC_CheckPredicate, 0, 249, 118, // Skip to: 40669
+/* 10212 */ MCD_OPC_Decode, 150, 2, 119, // Opcode: DUPv2i64gpr
+/* 10216 */ MCD_OPC_FilterValue, 1, 241, 118, // Skip to: 40669
+/* 10220 */ MCD_OPC_CheckPredicate, 0, 237, 118, // Skip to: 40669
+/* 10224 */ MCD_OPC_Decode, 158, 11, 112, // Opcode: SQADDv16i8
+/* 10228 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 10259
+/* 10232 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10235 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10247
+/* 10239 */ MCD_OPC_CheckPredicate, 0, 218, 118, // Skip to: 40669
+/* 10243 */ MCD_OPC_Decode, 206, 15, 120, // Opcode: TBXv16i8One
+/* 10247 */ MCD_OPC_FilterValue, 1, 210, 118, // Skip to: 40669
+/* 10251 */ MCD_OPC_CheckPredicate, 0, 206, 118, // Skip to: 40669
+/* 10255 */ MCD_OPC_Decode, 246, 9, 112, // Opcode: SADDWv16i8_v8i16
+/* 10259 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 10277
+/* 10263 */ MCD_OPC_CheckPredicate, 0, 194, 118, // Skip to: 40669
+/* 10267 */ MCD_OPC_CheckField, 21, 1, 1, 188, 118, // Skip to: 40669
+/* 10273 */ MCD_OPC_Decode, 221, 12, 112, // Opcode: SRHADDv16i8
+/* 10277 */ MCD_OPC_FilterValue, 6, 33, 0, // Skip to: 10314
+/* 10281 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10284 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10296
+/* 10288 */ MCD_OPC_CheckPredicate, 0, 169, 118, // Skip to: 40669
+/* 10292 */ MCD_OPC_Decode, 178, 18, 112, // Opcode: UZP1v16i8
+/* 10296 */ MCD_OPC_FilterValue, 1, 161, 118, // Skip to: 40669
+/* 10300 */ MCD_OPC_CheckPredicate, 0, 157, 118, // Skip to: 40669
+/* 10304 */ MCD_OPC_CheckField, 16, 5, 0, 151, 118, // Skip to: 40669
+/* 10310 */ MCD_OPC_Decode, 170, 9, 117, // Opcode: REV16v16i8
+/* 10314 */ MCD_OPC_FilterValue, 7, 89, 0, // Skip to: 10407
+/* 10318 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10321 */ MCD_OPC_FilterValue, 0, 71, 0, // Skip to: 10396
+/* 10325 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
+/* 10328 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 10384
+/* 10332 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
+/* 10335 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 10372
+/* 10339 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ...
+/* 10342 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 10360
+/* 10346 */ MCD_OPC_CheckPredicate, 0, 111, 118, // Skip to: 40669
+/* 10350 */ MCD_OPC_CheckField, 19, 1, 1, 105, 118, // Skip to: 40669
+/* 10356 */ MCD_OPC_Decode, 212, 5, 121, // Opcode: INSvi64gpr
+/* 10360 */ MCD_OPC_FilterValue, 1, 97, 118, // Skip to: 40669
+/* 10364 */ MCD_OPC_CheckPredicate, 0, 93, 118, // Skip to: 40669
+/* 10368 */ MCD_OPC_Decode, 210, 5, 122, // Opcode: INSvi32gpr
+/* 10372 */ MCD_OPC_FilterValue, 1, 85, 118, // Skip to: 40669
+/* 10376 */ MCD_OPC_CheckPredicate, 0, 81, 118, // Skip to: 40669
+/* 10380 */ MCD_OPC_Decode, 208, 5, 123, // Opcode: INSvi16gpr
+/* 10384 */ MCD_OPC_FilterValue, 1, 73, 118, // Skip to: 40669
+/* 10388 */ MCD_OPC_CheckPredicate, 0, 69, 118, // Skip to: 40669
+/* 10392 */ MCD_OPC_Decode, 214, 5, 124, // Opcode: INSvi8gpr
+/* 10396 */ MCD_OPC_FilterValue, 1, 61, 118, // Skip to: 40669
+/* 10400 */ MCD_OPC_CheckPredicate, 0, 57, 118, // Skip to: 40669
+/* 10404 */ MCD_OPC_Decode, 97, 112, // Opcode: ANDv16i8
+/* 10407 */ MCD_OPC_FilterValue, 8, 27, 0, // Skip to: 10438
+/* 10411 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10414 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10426
+/* 10418 */ MCD_OPC_CheckPredicate, 0, 39, 118, // Skip to: 40669
+/* 10422 */ MCD_OPC_Decode, 198, 15, 125, // Opcode: TBLv16i8Two
+/* 10426 */ MCD_OPC_FilterValue, 1, 31, 118, // Skip to: 40669
+/* 10430 */ MCD_OPC_CheckPredicate, 0, 27, 118, // Skip to: 40669
+/* 10434 */ MCD_OPC_Decode, 161, 13, 112, // Opcode: SSUBLv16i8_v8i16
+/* 10438 */ MCD_OPC_FilterValue, 9, 14, 0, // Skip to: 10456
+/* 10442 */ MCD_OPC_CheckPredicate, 0, 15, 118, // Skip to: 40669
+/* 10446 */ MCD_OPC_CheckField, 21, 1, 1, 9, 118, // Skip to: 40669
+/* 10452 */ MCD_OPC_Decode, 188, 10, 112, // Opcode: SHSUBv16i8
+/* 10456 */ MCD_OPC_FilterValue, 10, 46, 0, // Skip to: 10506
+/* 10460 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10463 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10475
+/* 10467 */ MCD_OPC_CheckPredicate, 0, 246, 117, // Skip to: 40669
+/* 10471 */ MCD_OPC_Decode, 219, 15, 112, // Opcode: TRN1v16i8
+/* 10475 */ MCD_OPC_FilterValue, 1, 238, 117, // Skip to: 40669
+/* 10479 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 10482 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10494
+/* 10486 */ MCD_OPC_CheckPredicate, 0, 227, 117, // Skip to: 40669
+/* 10490 */ MCD_OPC_Decode, 229, 9, 117, // Opcode: SADDLPv16i8_v8i16
+/* 10494 */ MCD_OPC_FilterValue, 1, 219, 117, // Skip to: 40669
+/* 10498 */ MCD_OPC_CheckPredicate, 0, 215, 117, // Skip to: 40669
+/* 10502 */ MCD_OPC_Decode, 192, 18, 126, // Opcode: XTNv16i8
+/* 10506 */ MCD_OPC_FilterValue, 11, 73, 0, // Skip to: 10583
+/* 10510 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10513 */ MCD_OPC_FilterValue, 0, 54, 0, // Skip to: 10571
+/* 10517 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
+/* 10520 */ MCD_OPC_FilterValue, 0, 34, 0, // Skip to: 10558
+/* 10524 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
+/* 10527 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 10545
+/* 10531 */ MCD_OPC_CheckPredicate, 0, 182, 117, // Skip to: 40669
+/* 10535 */ MCD_OPC_CheckField, 18, 1, 1, 176, 117, // Skip to: 40669
+/* 10541 */ MCD_OPC_Decode, 132, 11, 127, // Opcode: SMOVvi32to64
+/* 10545 */ MCD_OPC_FilterValue, 1, 168, 117, // Skip to: 40669
+/* 10549 */ MCD_OPC_CheckPredicate, 0, 164, 117, // Skip to: 40669
+/* 10553 */ MCD_OPC_Decode, 131, 11, 128, 1, // Opcode: SMOVvi16to64
+/* 10558 */ MCD_OPC_FilterValue, 1, 155, 117, // Skip to: 40669
+/* 10562 */ MCD_OPC_CheckPredicate, 0, 151, 117, // Skip to: 40669
+/* 10566 */ MCD_OPC_Decode, 134, 11, 129, 1, // Opcode: SMOVvi8to64
+/* 10571 */ MCD_OPC_FilterValue, 1, 142, 117, // Skip to: 40669
+/* 10575 */ MCD_OPC_CheckPredicate, 0, 138, 117, // Skip to: 40669
+/* 10579 */ MCD_OPC_Decode, 192, 12, 112, // Opcode: SQSUBv16i8
+/* 10583 */ MCD_OPC_FilterValue, 12, 28, 0, // Skip to: 10615
+/* 10587 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10590 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10603
+/* 10594 */ MCD_OPC_CheckPredicate, 0, 119, 117, // Skip to: 40669
+/* 10598 */ MCD_OPC_Decode, 208, 15, 130, 1, // Opcode: TBXv16i8Two
+/* 10603 */ MCD_OPC_FilterValue, 1, 110, 117, // Skip to: 40669
+/* 10607 */ MCD_OPC_CheckPredicate, 0, 106, 117, // Skip to: 40669
+/* 10611 */ MCD_OPC_Decode, 167, 13, 112, // Opcode: SSUBWv16i8_v8i16
+/* 10615 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 10633
+/* 10619 */ MCD_OPC_CheckPredicate, 0, 94, 117, // Skip to: 40669
+/* 10623 */ MCD_OPC_CheckField, 21, 1, 1, 88, 117, // Skip to: 40669
+/* 10629 */ MCD_OPC_Decode, 190, 1, 112, // Opcode: CMGTv16i8
+/* 10633 */ MCD_OPC_FilterValue, 14, 47, 0, // Skip to: 10684
+/* 10637 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10640 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10652
+/* 10644 */ MCD_OPC_CheckPredicate, 0, 69, 117, // Skip to: 40669
+/* 10648 */ MCD_OPC_Decode, 198, 18, 112, // Opcode: ZIP1v16i8
+/* 10652 */ MCD_OPC_FilterValue, 1, 61, 117, // Skip to: 40669
+/* 10656 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 10659 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10671
+/* 10663 */ MCD_OPC_CheckPredicate, 0, 50, 117, // Skip to: 40669
+/* 10667 */ MCD_OPC_Decode, 181, 15, 126, // Opcode: SUQADDv16i8
+/* 10671 */ MCD_OPC_FilterValue, 16, 42, 117, // Skip to: 40669
+/* 10675 */ MCD_OPC_CheckPredicate, 0, 38, 117, // Skip to: 40669
+/* 10679 */ MCD_OPC_Decode, 235, 9, 131, 1, // Opcode: SADDLVv16i8v
+/* 10684 */ MCD_OPC_FilterValue, 15, 34, 0, // Skip to: 10722
+/* 10688 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10691 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 10710
+/* 10695 */ MCD_OPC_CheckPredicate, 0, 18, 117, // Skip to: 40669
+/* 10699 */ MCD_OPC_CheckField, 16, 4, 8, 12, 117, // Skip to: 40669
+/* 10705 */ MCD_OPC_Decode, 251, 16, 132, 1, // Opcode: UMOVvi64
+/* 10710 */ MCD_OPC_FilterValue, 1, 3, 117, // Skip to: 40669
+/* 10714 */ MCD_OPC_CheckPredicate, 0, 255, 116, // Skip to: 40669
+/* 10718 */ MCD_OPC_Decode, 174, 1, 112, // Opcode: CMGEv16i8
+/* 10722 */ MCD_OPC_FilterValue, 16, 27, 0, // Skip to: 10753
+/* 10726 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10729 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10742
+/* 10733 */ MCD_OPC_CheckPredicate, 0, 236, 116, // Skip to: 40669
+/* 10737 */ MCD_OPC_Decode, 197, 15, 133, 1, // Opcode: TBLv16i8Three
+/* 10742 */ MCD_OPC_FilterValue, 1, 227, 116, // Skip to: 40669
+/* 10746 */ MCD_OPC_CheckPredicate, 0, 223, 116, // Skip to: 40669
+/* 10750 */ MCD_OPC_Decode, 36, 120, // Opcode: ADDHNv8i16_v16i8
+/* 10753 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 10771
+/* 10757 */ MCD_OPC_CheckPredicate, 0, 212, 116, // Skip to: 40669
+/* 10761 */ MCD_OPC_CheckField, 21, 1, 1, 206, 116, // Skip to: 40669
+/* 10767 */ MCD_OPC_Decode, 137, 13, 112, // Opcode: SSHLv16i8
+/* 10771 */ MCD_OPC_FilterValue, 18, 38, 0, // Skip to: 10813
+/* 10775 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 10778 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 10790
+/* 10782 */ MCD_OPC_CheckPredicate, 0, 187, 116, // Skip to: 40669
+/* 10786 */ MCD_OPC_Decode, 144, 1, 117, // Opcode: CLSv16i8
+/* 10790 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 10802
+/* 10794 */ MCD_OPC_CheckPredicate, 0, 175, 116, // Skip to: 40669
+/* 10798 */ MCD_OPC_Decode, 203, 12, 126, // Opcode: SQXTNv16i8
+/* 10802 */ MCD_OPC_FilterValue, 40, 167, 116, // Skip to: 40669
+/* 10806 */ MCD_OPC_CheckPredicate, 1, 163, 116, // Skip to: 40669
+/* 10810 */ MCD_OPC_Decode, 82, 126, // Opcode: AESErr
+/* 10813 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 10831
+/* 10817 */ MCD_OPC_CheckPredicate, 0, 152, 116, // Skip to: 40669
+/* 10821 */ MCD_OPC_CheckField, 21, 1, 1, 146, 116, // Skip to: 40669
+/* 10827 */ MCD_OPC_Decode, 156, 12, 112, // Opcode: SQSHLv16i8
+/* 10831 */ MCD_OPC_FilterValue, 20, 28, 0, // Skip to: 10863
+/* 10835 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10838 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10851
+/* 10842 */ MCD_OPC_CheckPredicate, 0, 127, 116, // Skip to: 40669
+/* 10846 */ MCD_OPC_Decode, 207, 15, 134, 1, // Opcode: TBXv16i8Three
+/* 10851 */ MCD_OPC_FilterValue, 1, 118, 116, // Skip to: 40669
+/* 10855 */ MCD_OPC_CheckPredicate, 0, 114, 116, // Skip to: 40669
+/* 10859 */ MCD_OPC_Decode, 199, 9, 120, // Opcode: SABALv16i8_v8i16
+/* 10863 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 10881
+/* 10867 */ MCD_OPC_CheckPredicate, 0, 102, 116, // Skip to: 40669
+/* 10871 */ MCD_OPC_CheckField, 21, 1, 1, 96, 116, // Skip to: 40669
+/* 10877 */ MCD_OPC_Decode, 235, 12, 112, // Opcode: SRSHLv16i8
+/* 10881 */ MCD_OPC_FilterValue, 22, 45, 0, // Skip to: 10930
+/* 10885 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10888 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10900
+/* 10892 */ MCD_OPC_CheckPredicate, 0, 77, 116, // Skip to: 40669
+/* 10896 */ MCD_OPC_Decode, 185, 18, 112, // Opcode: UZP2v16i8
+/* 10900 */ MCD_OPC_FilterValue, 1, 69, 116, // Skip to: 40669
+/* 10904 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 10907 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 10919
+/* 10911 */ MCD_OPC_CheckPredicate, 0, 58, 116, // Skip to: 40669
+/* 10915 */ MCD_OPC_Decode, 246, 1, 117, // Opcode: CNTv16i8
+/* 10919 */ MCD_OPC_FilterValue, 8, 50, 116, // Skip to: 40669
+/* 10923 */ MCD_OPC_CheckPredicate, 1, 46, 116, // Skip to: 40669
+/* 10927 */ MCD_OPC_Decode, 81, 126, // Opcode: AESDrr
+/* 10930 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 10948
+/* 10934 */ MCD_OPC_CheckPredicate, 0, 35, 116, // Skip to: 40669
+/* 10938 */ MCD_OPC_CheckField, 21, 1, 1, 29, 116, // Skip to: 40669
+/* 10944 */ MCD_OPC_Decode, 240, 11, 112, // Opcode: SQRSHLv16i8
+/* 10948 */ MCD_OPC_FilterValue, 24, 28, 0, // Skip to: 10980
+/* 10952 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 10955 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 10968
+/* 10959 */ MCD_OPC_CheckPredicate, 0, 10, 116, // Skip to: 40669
+/* 10963 */ MCD_OPC_Decode, 195, 15, 135, 1, // Opcode: TBLv16i8Four
+/* 10968 */ MCD_OPC_FilterValue, 1, 1, 116, // Skip to: 40669
+/* 10972 */ MCD_OPC_CheckPredicate, 0, 253, 115, // Skip to: 40669
+/* 10976 */ MCD_OPC_Decode, 153, 15, 120, // Opcode: SUBHNv8i16_v16i8
+/* 10980 */ MCD_OPC_FilterValue, 25, 14, 0, // Skip to: 10998
+/* 10984 */ MCD_OPC_CheckPredicate, 0, 241, 115, // Skip to: 40669
+/* 10988 */ MCD_OPC_CheckField, 21, 1, 1, 235, 115, // Skip to: 40669
+/* 10994 */ MCD_OPC_Decode, 214, 10, 112, // Opcode: SMAXv16i8
+/* 10998 */ MCD_OPC_FilterValue, 26, 57, 0, // Skip to: 11059
+/* 11002 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 11005 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11017
+/* 11009 */ MCD_OPC_CheckPredicate, 0, 216, 115, // Skip to: 40669
+/* 11013 */ MCD_OPC_Decode, 226, 15, 112, // Opcode: TRN2v16i8
+/* 11017 */ MCD_OPC_FilterValue, 1, 208, 115, // Skip to: 40669
+/* 11021 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 11024 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11036
+/* 11028 */ MCD_OPC_CheckPredicate, 0, 197, 115, // Skip to: 40669
+/* 11032 */ MCD_OPC_Decode, 223, 9, 126, // Opcode: SADALPv16i8_v8i16
+/* 11036 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 11048
+/* 11040 */ MCD_OPC_CheckPredicate, 0, 185, 115, // Skip to: 40669
+/* 11044 */ MCD_OPC_Decode, 199, 3, 126, // Opcode: FCVTNv8i16
+/* 11048 */ MCD_OPC_FilterValue, 8, 177, 115, // Skip to: 40669
+/* 11052 */ MCD_OPC_CheckPredicate, 1, 173, 115, // Skip to: 40669
+/* 11056 */ MCD_OPC_Decode, 84, 117, // Opcode: AESMCrr
+/* 11059 */ MCD_OPC_FilterValue, 27, 14, 0, // Skip to: 11077
+/* 11063 */ MCD_OPC_CheckPredicate, 0, 162, 115, // Skip to: 40669
+/* 11067 */ MCD_OPC_CheckField, 21, 1, 1, 156, 115, // Skip to: 40669
+/* 11073 */ MCD_OPC_Decode, 232, 10, 112, // Opcode: SMINv16i8
+/* 11077 */ MCD_OPC_FilterValue, 28, 28, 0, // Skip to: 11109
+/* 11081 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 11084 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 11097
+/* 11088 */ MCD_OPC_CheckPredicate, 0, 137, 115, // Skip to: 40669
+/* 11092 */ MCD_OPC_Decode, 205, 15, 136, 1, // Opcode: TBXv16i8Four
+/* 11097 */ MCD_OPC_FilterValue, 1, 128, 115, // Skip to: 40669
+/* 11101 */ MCD_OPC_CheckPredicate, 0, 124, 115, // Skip to: 40669
+/* 11105 */ MCD_OPC_Decode, 211, 9, 112, // Opcode: SABDLv16i8_v8i16
+/* 11109 */ MCD_OPC_FilterValue, 29, 14, 0, // Skip to: 11127
+/* 11113 */ MCD_OPC_CheckPredicate, 0, 112, 115, // Skip to: 40669
+/* 11117 */ MCD_OPC_CheckField, 21, 1, 1, 106, 115, // Skip to: 40669
+/* 11123 */ MCD_OPC_Decode, 217, 9, 112, // Opcode: SABDv16i8
+/* 11127 */ MCD_OPC_FilterValue, 30, 57, 0, // Skip to: 11188
+/* 11131 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 11134 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11146
+/* 11138 */ MCD_OPC_CheckPredicate, 0, 87, 115, // Skip to: 40669
+/* 11142 */ MCD_OPC_Decode, 205, 18, 112, // Opcode: ZIP2v16i8
+/* 11146 */ MCD_OPC_FilterValue, 1, 79, 115, // Skip to: 40669
+/* 11150 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 11153 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11165
+/* 11157 */ MCD_OPC_CheckPredicate, 0, 68, 115, // Skip to: 40669
+/* 11161 */ MCD_OPC_Decode, 147, 11, 117, // Opcode: SQABSv16i8
+/* 11165 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 11177
+/* 11169 */ MCD_OPC_CheckPredicate, 0, 56, 115, // Skip to: 40669
+/* 11173 */ MCD_OPC_Decode, 159, 3, 117, // Opcode: FCVTLv8i16
+/* 11177 */ MCD_OPC_FilterValue, 8, 48, 115, // Skip to: 40669
+/* 11181 */ MCD_OPC_CheckPredicate, 1, 44, 115, // Skip to: 40669
+/* 11185 */ MCD_OPC_Decode, 83, 117, // Opcode: AESIMCrr
+/* 11188 */ MCD_OPC_FilterValue, 31, 14, 0, // Skip to: 11206
+/* 11192 */ MCD_OPC_CheckPredicate, 0, 33, 115, // Skip to: 40669
+/* 11196 */ MCD_OPC_CheckField, 21, 1, 1, 27, 115, // Skip to: 40669
+/* 11202 */ MCD_OPC_Decode, 205, 9, 120, // Opcode: SABAv16i8
+/* 11206 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 11224
+/* 11210 */ MCD_OPC_CheckPredicate, 0, 15, 115, // Skip to: 40669
+/* 11214 */ MCD_OPC_CheckField, 21, 1, 1, 9, 115, // Skip to: 40669
+/* 11220 */ MCD_OPC_Decode, 238, 10, 120, // Opcode: SMLALv16i8_v8i16
+/* 11224 */ MCD_OPC_FilterValue, 33, 13, 0, // Skip to: 11241
+/* 11228 */ MCD_OPC_CheckPredicate, 0, 253, 114, // Skip to: 40669
+/* 11232 */ MCD_OPC_CheckField, 21, 1, 1, 247, 114, // Skip to: 40669
+/* 11238 */ MCD_OPC_Decode, 69, 112, // Opcode: ADDv16i8
+/* 11241 */ MCD_OPC_FilterValue, 34, 27, 0, // Skip to: 11272
+/* 11245 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 11248 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 11260
+/* 11252 */ MCD_OPC_CheckPredicate, 0, 229, 114, // Skip to: 40669
+/* 11256 */ MCD_OPC_Decode, 191, 1, 117, // Opcode: CMGTv16i8rz
+/* 11260 */ MCD_OPC_FilterValue, 33, 221, 114, // Skip to: 40669
+/* 11264 */ MCD_OPC_CheckPredicate, 0, 217, 114, // Skip to: 40669
+/* 11268 */ MCD_OPC_Decode, 169, 5, 117, // Opcode: FRINTNv4f32
+/* 11272 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 11290
+/* 11276 */ MCD_OPC_CheckPredicate, 0, 205, 114, // Skip to: 40669
+/* 11280 */ MCD_OPC_CheckField, 21, 1, 1, 199, 114, // Skip to: 40669
+/* 11286 */ MCD_OPC_Decode, 238, 1, 112, // Opcode: CMTSTv16i8
+/* 11290 */ MCD_OPC_FilterValue, 37, 14, 0, // Skip to: 11308
+/* 11294 */ MCD_OPC_CheckPredicate, 0, 187, 114, // Skip to: 40669
+/* 11298 */ MCD_OPC_CheckField, 21, 1, 1, 181, 114, // Skip to: 40669
+/* 11304 */ MCD_OPC_Decode, 180, 8, 120, // Opcode: MLAv16i8
+/* 11308 */ MCD_OPC_FilterValue, 38, 27, 0, // Skip to: 11339
+/* 11312 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 11315 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 11327
+/* 11319 */ MCD_OPC_CheckPredicate, 0, 162, 114, // Skip to: 40669
+/* 11323 */ MCD_OPC_Decode, 159, 1, 117, // Opcode: CMEQv16i8rz
+/* 11327 */ MCD_OPC_FilterValue, 33, 154, 114, // Skip to: 40669
+/* 11331 */ MCD_OPC_CheckPredicate, 0, 150, 114, // Skip to: 40669
+/* 11335 */ MCD_OPC_Decode, 164, 5, 117, // Opcode: FRINTMv4f32
+/* 11339 */ MCD_OPC_FilterValue, 39, 14, 0, // Skip to: 11357
+/* 11343 */ MCD_OPC_CheckPredicate, 0, 138, 114, // Skip to: 40669
+/* 11347 */ MCD_OPC_CheckField, 21, 1, 1, 132, 114, // Skip to: 40669
+/* 11353 */ MCD_OPC_Decode, 229, 8, 112, // Opcode: MULv16i8
+/* 11357 */ MCD_OPC_FilterValue, 40, 14, 0, // Skip to: 11375
+/* 11361 */ MCD_OPC_CheckPredicate, 0, 120, 114, // Skip to: 40669
+/* 11365 */ MCD_OPC_CheckField, 21, 1, 1, 114, 114, // Skip to: 40669
+/* 11371 */ MCD_OPC_Decode, 248, 10, 120, // Opcode: SMLSLv16i8_v8i16
+/* 11375 */ MCD_OPC_FilterValue, 41, 14, 0, // Skip to: 11393
+/* 11379 */ MCD_OPC_CheckPredicate, 0, 102, 114, // Skip to: 40669
+/* 11383 */ MCD_OPC_CheckField, 21, 1, 1, 96, 114, // Skip to: 40669
+/* 11389 */ MCD_OPC_Decode, 203, 10, 112, // Opcode: SMAXPv16i8
+/* 11393 */ MCD_OPC_FilterValue, 42, 53, 0, // Skip to: 11450
+/* 11397 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 11400 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 11412
+/* 11404 */ MCD_OPC_CheckPredicate, 0, 77, 114, // Skip to: 40669
+/* 11408 */ MCD_OPC_Decode, 230, 1, 117, // Opcode: CMLTv16i8rz
+/* 11412 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 11424
+/* 11416 */ MCD_OPC_CheckPredicate, 0, 65, 114, // Skip to: 40669
+/* 11420 */ MCD_OPC_Decode, 186, 3, 117, // Opcode: FCVTNSv4f32
+/* 11424 */ MCD_OPC_FilterValue, 48, 9, 0, // Skip to: 11437
+/* 11428 */ MCD_OPC_CheckPredicate, 0, 53, 114, // Skip to: 40669
+/* 11432 */ MCD_OPC_Decode, 209, 10, 137, 1, // Opcode: SMAXVv16i8v
+/* 11437 */ MCD_OPC_FilterValue, 49, 44, 114, // Skip to: 40669
+/* 11441 */ MCD_OPC_CheckPredicate, 0, 40, 114, // Skip to: 40669
+/* 11445 */ MCD_OPC_Decode, 227, 10, 137, 1, // Opcode: SMINVv16i8v
+/* 11450 */ MCD_OPC_FilterValue, 43, 14, 0, // Skip to: 11468
+/* 11454 */ MCD_OPC_CheckPredicate, 0, 27, 114, // Skip to: 40669
+/* 11458 */ MCD_OPC_CheckField, 21, 1, 1, 21, 114, // Skip to: 40669
+/* 11464 */ MCD_OPC_Decode, 221, 10, 112, // Opcode: SMINPv16i8
+/* 11468 */ MCD_OPC_FilterValue, 46, 38, 0, // Skip to: 11510
+/* 11472 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 11475 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 11486
+/* 11479 */ MCD_OPC_CheckPredicate, 0, 2, 114, // Skip to: 40669
+/* 11483 */ MCD_OPC_Decode, 20, 117, // Opcode: ABSv16i8
+/* 11486 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 11498
+/* 11490 */ MCD_OPC_CheckPredicate, 0, 247, 113, // Skip to: 40669
+/* 11494 */ MCD_OPC_Decode, 168, 3, 117, // Opcode: FCVTMSv4f32
+/* 11498 */ MCD_OPC_FilterValue, 49, 239, 113, // Skip to: 40669
+/* 11502 */ MCD_OPC_CheckPredicate, 0, 235, 113, // Skip to: 40669
+/* 11506 */ MCD_OPC_Decode, 55, 137, 1, // Opcode: ADDVv16i8v
+/* 11510 */ MCD_OPC_FilterValue, 47, 13, 0, // Skip to: 11527
+/* 11514 */ MCD_OPC_CheckPredicate, 0, 223, 113, // Skip to: 40669
+/* 11518 */ MCD_OPC_CheckField, 21, 1, 1, 217, 113, // Skip to: 40669
+/* 11524 */ MCD_OPC_Decode, 38, 112, // Opcode: ADDPv16i8
+/* 11527 */ MCD_OPC_FilterValue, 48, 14, 0, // Skip to: 11545
+/* 11531 */ MCD_OPC_CheckPredicate, 0, 206, 113, // Skip to: 40669
+/* 11535 */ MCD_OPC_CheckField, 21, 1, 1, 200, 113, // Skip to: 40669
+/* 11541 */ MCD_OPC_Decode, 137, 11, 112, // Opcode: SMULLv16i8_v8i16
+/* 11545 */ MCD_OPC_FilterValue, 49, 14, 0, // Skip to: 11563
+/* 11549 */ MCD_OPC_CheckPredicate, 0, 188, 113, // Skip to: 40669
+/* 11553 */ MCD_OPC_CheckField, 21, 1, 1, 182, 113, // Skip to: 40669
+/* 11559 */ MCD_OPC_Decode, 171, 4, 112, // Opcode: FMAXNMv4f32
+/* 11563 */ MCD_OPC_FilterValue, 50, 14, 0, // Skip to: 11581
+/* 11567 */ MCD_OPC_CheckPredicate, 0, 170, 113, // Skip to: 40669
+/* 11571 */ MCD_OPC_CheckField, 16, 6, 33, 164, 113, // Skip to: 40669
+/* 11577 */ MCD_OPC_Decode, 142, 3, 117, // Opcode: FCVTASv4f32
+/* 11581 */ MCD_OPC_FilterValue, 51, 14, 0, // Skip to: 11599
+/* 11585 */ MCD_OPC_CheckPredicate, 0, 152, 113, // Skip to: 40669
+/* 11589 */ MCD_OPC_CheckField, 21, 1, 1, 146, 113, // Skip to: 40669
+/* 11595 */ MCD_OPC_Decode, 210, 4, 120, // Opcode: FMLAv4f32
+/* 11599 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 11617
+/* 11603 */ MCD_OPC_CheckPredicate, 0, 134, 113, // Skip to: 40669
+/* 11607 */ MCD_OPC_CheckField, 21, 1, 1, 128, 113, // Skip to: 40669
+/* 11613 */ MCD_OPC_Decode, 207, 2, 112, // Opcode: FADDv4f32
+/* 11617 */ MCD_OPC_FilterValue, 54, 14, 0, // Skip to: 11635
+/* 11621 */ MCD_OPC_CheckPredicate, 0, 116, 113, // Skip to: 40669
+/* 11625 */ MCD_OPC_CheckField, 16, 6, 33, 110, 113, // Skip to: 40669
+/* 11631 */ MCD_OPC_Decode, 146, 10, 117, // Opcode: SCVTFv4f32
+/* 11635 */ MCD_OPC_FilterValue, 55, 14, 0, // Skip to: 11653
+/* 11639 */ MCD_OPC_CheckPredicate, 0, 98, 113, // Skip to: 40669
+/* 11643 */ MCD_OPC_CheckField, 21, 1, 1, 92, 113, // Skip to: 40669
+/* 11649 */ MCD_OPC_Decode, 245, 4, 112, // Opcode: FMULXv4f32
+/* 11653 */ MCD_OPC_FilterValue, 56, 14, 0, // Skip to: 11671
+/* 11657 */ MCD_OPC_CheckPredicate, 0, 80, 113, // Skip to: 40669
+/* 11661 */ MCD_OPC_CheckField, 21, 1, 1, 74, 113, // Skip to: 40669
+/* 11667 */ MCD_OPC_Decode, 145, 9, 112, // Opcode: PMULLv16i8
+/* 11671 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 11689
+/* 11675 */ MCD_OPC_CheckPredicate, 0, 62, 113, // Skip to: 40669
+/* 11679 */ MCD_OPC_CheckField, 21, 1, 1, 56, 113, // Skip to: 40669
+/* 11685 */ MCD_OPC_Decode, 220, 2, 112, // Opcode: FCMEQv4f32
+/* 11689 */ MCD_OPC_FilterValue, 61, 14, 0, // Skip to: 11707
+/* 11693 */ MCD_OPC_CheckPredicate, 0, 44, 113, // Skip to: 40669
+/* 11697 */ MCD_OPC_CheckField, 21, 1, 1, 38, 113, // Skip to: 40669
+/* 11703 */ MCD_OPC_Decode, 181, 4, 112, // Opcode: FMAXv4f32
+/* 11707 */ MCD_OPC_FilterValue, 63, 30, 113, // Skip to: 40669
+/* 11711 */ MCD_OPC_CheckPredicate, 0, 26, 113, // Skip to: 40669
+/* 11715 */ MCD_OPC_CheckField, 21, 1, 1, 20, 113, // Skip to: 40669
+/* 11721 */ MCD_OPC_Decode, 147, 5, 112, // Opcode: FRECPSv4f32
+/* 11725 */ MCD_OPC_FilterValue, 3, 12, 113, // Skip to: 40669
+/* 11729 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 11732 */ MCD_OPC_FilterValue, 0, 60, 2, // Skip to: 12308
+/* 11736 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 11739 */ MCD_OPC_FilterValue, 0, 41, 1, // Skip to: 12040
+/* 11743 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 11746 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 11759
+/* 11750 */ MCD_OPC_CheckPredicate, 0, 243, 112, // Skip to: 40669
+/* 11754 */ MCD_OPC_Decode, 175, 2, 138, 1, // Opcode: EXTv16i8
+/* 11759 */ MCD_OPC_FilterValue, 1, 234, 112, // Skip to: 40669
+/* 11763 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ...
+/* 11766 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11778
+/* 11770 */ MCD_OPC_CheckPredicate, 0, 223, 112, // Skip to: 40669
+/* 11774 */ MCD_OPC_Decode, 146, 16, 112, // Opcode: UADDLv16i8_v8i16
+/* 11778 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 11796
+/* 11782 */ MCD_OPC_CheckPredicate, 0, 211, 112, // Skip to: 40669
+/* 11786 */ MCD_OPC_CheckField, 16, 5, 0, 205, 112, // Skip to: 40669
+/* 11792 */ MCD_OPC_Decode, 173, 9, 117, // Opcode: REV32v16i8
+/* 11796 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 11808
+/* 11800 */ MCD_OPC_CheckPredicate, 0, 193, 112, // Skip to: 40669
+/* 11804 */ MCD_OPC_Decode, 152, 16, 112, // Opcode: UADDWv16i8_v8i16
+/* 11808 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 11820
+/* 11812 */ MCD_OPC_CheckPredicate, 0, 181, 112, // Skip to: 40669
+/* 11816 */ MCD_OPC_Decode, 166, 18, 112, // Opcode: USUBLv16i8_v8i16
+/* 11820 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 11851
+/* 11824 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 11827 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11839
+/* 11831 */ MCD_OPC_CheckPredicate, 0, 162, 112, // Skip to: 40669
+/* 11835 */ MCD_OPC_Decode, 135, 16, 117, // Opcode: UADDLPv16i8_v8i16
+/* 11839 */ MCD_OPC_FilterValue, 1, 154, 112, // Skip to: 40669
+/* 11843 */ MCD_OPC_CheckPredicate, 0, 150, 112, // Skip to: 40669
+/* 11847 */ MCD_OPC_Decode, 212, 12, 126, // Opcode: SQXTUNv16i8
+/* 11851 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 11863
+/* 11855 */ MCD_OPC_CheckPredicate, 0, 138, 112, // Skip to: 40669
+/* 11859 */ MCD_OPC_Decode, 172, 18, 112, // Opcode: USUBWv16i8_v8i16
+/* 11863 */ MCD_OPC_FilterValue, 7, 40, 0, // Skip to: 11907
+/* 11867 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 11870 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11882
+/* 11874 */ MCD_OPC_CheckPredicate, 0, 119, 112, // Skip to: 40669
+/* 11878 */ MCD_OPC_Decode, 147, 18, 126, // Opcode: USQADDv16i8
+/* 11882 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 11894
+/* 11886 */ MCD_OPC_CheckPredicate, 0, 107, 112, // Skip to: 40669
+/* 11890 */ MCD_OPC_Decode, 168, 10, 117, // Opcode: SHLLv16i8
+/* 11894 */ MCD_OPC_FilterValue, 16, 99, 112, // Skip to: 40669
+/* 11898 */ MCD_OPC_CheckPredicate, 0, 95, 112, // Skip to: 40669
+/* 11902 */ MCD_OPC_Decode, 141, 16, 131, 1, // Opcode: UADDLVv16i8v
+/* 11907 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 11919
+/* 11911 */ MCD_OPC_CheckPredicate, 0, 82, 112, // Skip to: 40669
+/* 11915 */ MCD_OPC_Decode, 160, 9, 120, // Opcode: RADDHNv8i16_v16i8
+/* 11919 */ MCD_OPC_FilterValue, 9, 27, 0, // Skip to: 11950
+/* 11923 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 11926 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 11938
+/* 11930 */ MCD_OPC_CheckPredicate, 0, 63, 112, // Skip to: 40669
+/* 11934 */ MCD_OPC_Decode, 152, 1, 117, // Opcode: CLZv16i8
+/* 11938 */ MCD_OPC_FilterValue, 1, 55, 112, // Skip to: 40669
+/* 11942 */ MCD_OPC_CheckPredicate, 0, 51, 112, // Skip to: 40669
+/* 11946 */ MCD_OPC_Decode, 210, 17, 126, // Opcode: UQXTNv16i8
+/* 11950 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 11962
+/* 11954 */ MCD_OPC_CheckPredicate, 0, 39, 112, // Skip to: 40669
+/* 11958 */ MCD_OPC_Decode, 233, 15, 120, // Opcode: UABALv16i8_v8i16
+/* 11962 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 11980
+/* 11966 */ MCD_OPC_CheckPredicate, 0, 27, 112, // Skip to: 40669
+/* 11970 */ MCD_OPC_CheckField, 16, 5, 0, 21, 112, // Skip to: 40669
+/* 11976 */ MCD_OPC_Decode, 253, 8, 117, // Opcode: NOTv16i8
+/* 11980 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 11992
+/* 11984 */ MCD_OPC_CheckPredicate, 0, 9, 112, // Skip to: 40669
+/* 11988 */ MCD_OPC_Decode, 197, 9, 120, // Opcode: RSUBHNv8i16_v16i8
+/* 11992 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 12010
+/* 11996 */ MCD_OPC_CheckPredicate, 0, 253, 111, // Skip to: 40669
+/* 12000 */ MCD_OPC_CheckField, 16, 5, 0, 247, 111, // Skip to: 40669
+/* 12006 */ MCD_OPC_Decode, 129, 16, 126, // Opcode: UADALPv16i8_v8i16
+/* 12010 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 12022
+/* 12014 */ MCD_OPC_CheckPredicate, 0, 235, 111, // Skip to: 40669
+/* 12018 */ MCD_OPC_Decode, 245, 15, 112, // Opcode: UABDLv16i8_v8i16
+/* 12022 */ MCD_OPC_FilterValue, 15, 227, 111, // Skip to: 40669
+/* 12026 */ MCD_OPC_CheckPredicate, 0, 223, 111, // Skip to: 40669
+/* 12030 */ MCD_OPC_CheckField, 16, 5, 0, 217, 111, // Skip to: 40669
+/* 12036 */ MCD_OPC_Decode, 217, 11, 117, // Opcode: SQNEGv16i8
+/* 12040 */ MCD_OPC_FilterValue, 1, 209, 111, // Skip to: 40669
+/* 12044 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ...
+/* 12047 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12065
+/* 12051 */ MCD_OPC_CheckPredicate, 0, 198, 111, // Skip to: 40669
+/* 12055 */ MCD_OPC_CheckField, 21, 1, 1, 192, 111, // Skip to: 40669
+/* 12061 */ MCD_OPC_Decode, 229, 16, 120, // Opcode: UMLALv16i8_v8i16
+/* 12065 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 12096
+/* 12069 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 12072 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 12084
+/* 12076 */ MCD_OPC_CheckPredicate, 0, 173, 111, // Skip to: 40669
+/* 12080 */ MCD_OPC_Decode, 175, 1, 117, // Opcode: CMGEv16i8rz
+/* 12084 */ MCD_OPC_FilterValue, 33, 165, 111, // Skip to: 40669
+/* 12088 */ MCD_OPC_CheckPredicate, 0, 161, 111, // Skip to: 40669
+/* 12092 */ MCD_OPC_Decode, 154, 5, 117, // Opcode: FRINTAv4f32
+/* 12096 */ MCD_OPC_FilterValue, 3, 27, 0, // Skip to: 12127
+/* 12100 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 12103 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 12115
+/* 12107 */ MCD_OPC_CheckPredicate, 0, 142, 111, // Skip to: 40669
+/* 12111 */ MCD_OPC_Decode, 222, 1, 117, // Opcode: CMLEv16i8rz
+/* 12115 */ MCD_OPC_FilterValue, 33, 134, 111, // Skip to: 40669
+/* 12119 */ MCD_OPC_CheckPredicate, 0, 130, 111, // Skip to: 40669
+/* 12123 */ MCD_OPC_Decode, 179, 5, 117, // Opcode: FRINTXv4f32
+/* 12127 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 12145
+/* 12131 */ MCD_OPC_CheckPredicate, 0, 118, 111, // Skip to: 40669
+/* 12135 */ MCD_OPC_CheckField, 21, 1, 1, 112, 111, // Skip to: 40669
+/* 12141 */ MCD_OPC_Decode, 239, 16, 120, // Opcode: UMLSLv16i8_v8i16
+/* 12145 */ MCD_OPC_FilterValue, 5, 41, 0, // Skip to: 12190
+/* 12149 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 12152 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 12164
+/* 12156 */ MCD_OPC_CheckPredicate, 0, 93, 111, // Skip to: 40669
+/* 12160 */ MCD_OPC_Decode, 195, 3, 117, // Opcode: FCVTNUv4f32
+/* 12164 */ MCD_OPC_FilterValue, 48, 9, 0, // Skip to: 12177
+/* 12168 */ MCD_OPC_CheckPredicate, 0, 81, 111, // Skip to: 40669
+/* 12172 */ MCD_OPC_Decode, 201, 16, 137, 1, // Opcode: UMAXVv16i8v
+/* 12177 */ MCD_OPC_FilterValue, 49, 72, 111, // Skip to: 40669
+/* 12181 */ MCD_OPC_CheckPredicate, 0, 68, 111, // Skip to: 40669
+/* 12185 */ MCD_OPC_Decode, 218, 16, 137, 1, // Opcode: UMINVv16i8v
+/* 12190 */ MCD_OPC_FilterValue, 7, 27, 0, // Skip to: 12221
+/* 12194 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 12197 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 12209
+/* 12201 */ MCD_OPC_CheckPredicate, 0, 48, 111, // Skip to: 40669
+/* 12205 */ MCD_OPC_Decode, 245, 8, 117, // Opcode: NEGv16i8
+/* 12209 */ MCD_OPC_FilterValue, 33, 40, 111, // Skip to: 40669
+/* 12213 */ MCD_OPC_CheckPredicate, 0, 36, 111, // Skip to: 40669
+/* 12217 */ MCD_OPC_Decode, 177, 3, 117, // Opcode: FCVTMUv4f32
+/* 12221 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 12239
+/* 12225 */ MCD_OPC_CheckPredicate, 0, 24, 111, // Skip to: 40669
+/* 12229 */ MCD_OPC_CheckField, 21, 1, 1, 18, 111, // Skip to: 40669
+/* 12235 */ MCD_OPC_Decode, 255, 16, 112, // Opcode: UMULLv16i8_v8i16
+/* 12239 */ MCD_OPC_FilterValue, 9, 28, 0, // Skip to: 12271
+/* 12243 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 12246 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 12258
+/* 12250 */ MCD_OPC_CheckPredicate, 0, 255, 110, // Skip to: 40669
+/* 12254 */ MCD_OPC_Decode, 151, 3, 117, // Opcode: FCVTAUv4f32
+/* 12258 */ MCD_OPC_FilterValue, 48, 247, 110, // Skip to: 40669
+/* 12262 */ MCD_OPC_CheckPredicate, 0, 243, 110, // Skip to: 40669
+/* 12266 */ MCD_OPC_Decode, 168, 4, 139, 1, // Opcode: FMAXNMVv4i32v
+/* 12271 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 12289
+/* 12275 */ MCD_OPC_CheckPredicate, 0, 230, 110, // Skip to: 40669
+/* 12279 */ MCD_OPC_CheckField, 16, 6, 33, 224, 110, // Skip to: 40669
+/* 12285 */ MCD_OPC_Decode, 176, 16, 117, // Opcode: UCVTFv4f32
+/* 12289 */ MCD_OPC_FilterValue, 15, 216, 110, // Skip to: 40669
+/* 12293 */ MCD_OPC_CheckPredicate, 0, 212, 110, // Skip to: 40669
+/* 12297 */ MCD_OPC_CheckField, 16, 6, 48, 206, 110, // Skip to: 40669
+/* 12303 */ MCD_OPC_Decode, 178, 4, 139, 1, // Opcode: FMAXVv4i32v
+/* 12308 */ MCD_OPC_FilterValue, 1, 197, 110, // Skip to: 40669
+/* 12312 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 12315 */ MCD_OPC_FilterValue, 0, 43, 1, // Skip to: 12618
+/* 12319 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 12322 */ MCD_OPC_FilterValue, 0, 93, 0, // Skip to: 12419
+/* 12326 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
+/* 12329 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 12406
+/* 12333 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
+/* 12336 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 12387
+/* 12340 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ...
+/* 12343 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 12368
+/* 12347 */ MCD_OPC_CheckPredicate, 0, 158, 110, // Skip to: 40669
+/* 12351 */ MCD_OPC_CheckField, 19, 1, 1, 152, 110, // Skip to: 40669
+/* 12357 */ MCD_OPC_CheckField, 11, 3, 0, 146, 110, // Skip to: 40669
+/* 12363 */ MCD_OPC_Decode, 213, 5, 140, 1, // Opcode: INSvi64lane
+/* 12368 */ MCD_OPC_FilterValue, 1, 137, 110, // Skip to: 40669
+/* 12372 */ MCD_OPC_CheckPredicate, 0, 133, 110, // Skip to: 40669
+/* 12376 */ MCD_OPC_CheckField, 11, 2, 0, 127, 110, // Skip to: 40669
+/* 12382 */ MCD_OPC_Decode, 211, 5, 141, 1, // Opcode: INSvi32lane
+/* 12387 */ MCD_OPC_FilterValue, 1, 118, 110, // Skip to: 40669
+/* 12391 */ MCD_OPC_CheckPredicate, 0, 114, 110, // Skip to: 40669
+/* 12395 */ MCD_OPC_CheckField, 11, 1, 0, 108, 110, // Skip to: 40669
+/* 12401 */ MCD_OPC_Decode, 209, 5, 142, 1, // Opcode: INSvi16lane
+/* 12406 */ MCD_OPC_FilterValue, 1, 99, 110, // Skip to: 40669
+/* 12410 */ MCD_OPC_CheckPredicate, 0, 95, 110, // Skip to: 40669
+/* 12414 */ MCD_OPC_Decode, 215, 5, 143, 1, // Opcode: INSvi8lane
+/* 12419 */ MCD_OPC_FilterValue, 1, 86, 110, // Skip to: 40669
+/* 12423 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ...
+/* 12426 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 12438
+/* 12430 */ MCD_OPC_CheckPredicate, 0, 75, 110, // Skip to: 40669
+/* 12434 */ MCD_OPC_Decode, 182, 16, 112, // Opcode: UHADDv16i8
+/* 12438 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 12450
+/* 12442 */ MCD_OPC_CheckPredicate, 0, 63, 110, // Skip to: 40669
+/* 12446 */ MCD_OPC_Decode, 137, 17, 112, // Opcode: UQADDv16i8
+/* 12450 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 12462
+/* 12454 */ MCD_OPC_CheckPredicate, 0, 51, 110, // Skip to: 40669
+/* 12458 */ MCD_OPC_Decode, 221, 17, 112, // Opcode: URHADDv16i8
+/* 12462 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 12474
+/* 12466 */ MCD_OPC_CheckPredicate, 0, 39, 110, // Skip to: 40669
+/* 12470 */ MCD_OPC_Decode, 170, 2, 112, // Opcode: EORv16i8
+/* 12474 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 12486
+/* 12478 */ MCD_OPC_CheckPredicate, 0, 27, 110, // Skip to: 40669
+/* 12482 */ MCD_OPC_Decode, 188, 16, 112, // Opcode: UHSUBv16i8
+/* 12486 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 12498
+/* 12490 */ MCD_OPC_CheckPredicate, 0, 15, 110, // Skip to: 40669
+/* 12494 */ MCD_OPC_Decode, 199, 17, 112, // Opcode: UQSUBv16i8
+/* 12498 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 12510
+/* 12502 */ MCD_OPC_CheckPredicate, 0, 3, 110, // Skip to: 40669
+/* 12506 */ MCD_OPC_Decode, 206, 1, 112, // Opcode: CMHIv16i8
+/* 12510 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 12522
+/* 12514 */ MCD_OPC_CheckPredicate, 0, 247, 109, // Skip to: 40669
+/* 12518 */ MCD_OPC_Decode, 214, 1, 112, // Opcode: CMHSv16i8
+/* 12522 */ MCD_OPC_FilterValue, 8, 8, 0, // Skip to: 12534
+/* 12526 */ MCD_OPC_CheckPredicate, 0, 235, 109, // Skip to: 40669
+/* 12530 */ MCD_OPC_Decode, 131, 18, 112, // Opcode: USHLv16i8
+/* 12534 */ MCD_OPC_FilterValue, 9, 8, 0, // Skip to: 12546
+/* 12538 */ MCD_OPC_CheckPredicate, 0, 223, 109, // Skip to: 40669
+/* 12542 */ MCD_OPC_Decode, 172, 17, 112, // Opcode: UQSHLv16i8
+/* 12546 */ MCD_OPC_FilterValue, 10, 8, 0, // Skip to: 12558
+/* 12550 */ MCD_OPC_CheckPredicate, 0, 211, 109, // Skip to: 40669
+/* 12554 */ MCD_OPC_Decode, 227, 17, 112, // Opcode: URSHLv16i8
+/* 12558 */ MCD_OPC_FilterValue, 11, 8, 0, // Skip to: 12570
+/* 12562 */ MCD_OPC_CheckPredicate, 0, 199, 109, // Skip to: 40669
+/* 12566 */ MCD_OPC_Decode, 148, 17, 112, // Opcode: UQRSHLv16i8
+/* 12570 */ MCD_OPC_FilterValue, 12, 8, 0, // Skip to: 12582
+/* 12574 */ MCD_OPC_CheckPredicate, 0, 187, 109, // Skip to: 40669
+/* 12578 */ MCD_OPC_Decode, 206, 16, 112, // Opcode: UMAXv16i8
+/* 12582 */ MCD_OPC_FilterValue, 13, 8, 0, // Skip to: 12594
+/* 12586 */ MCD_OPC_CheckPredicate, 0, 175, 109, // Skip to: 40669
+/* 12590 */ MCD_OPC_Decode, 223, 16, 112, // Opcode: UMINv16i8
+/* 12594 */ MCD_OPC_FilterValue, 14, 8, 0, // Skip to: 12606
+/* 12598 */ MCD_OPC_CheckPredicate, 0, 163, 109, // Skip to: 40669
+/* 12602 */ MCD_OPC_Decode, 251, 15, 112, // Opcode: UABDv16i8
+/* 12606 */ MCD_OPC_FilterValue, 15, 155, 109, // Skip to: 40669
+/* 12610 */ MCD_OPC_CheckPredicate, 0, 151, 109, // Skip to: 40669
+/* 12614 */ MCD_OPC_Decode, 239, 15, 120, // Opcode: UABAv16i8
+/* 12618 */ MCD_OPC_FilterValue, 1, 143, 109, // Skip to: 40669
+/* 12622 */ MCD_OPC_ExtractField, 11, 4, // Inst{14-11} ...
+/* 12625 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12643
+/* 12629 */ MCD_OPC_CheckPredicate, 0, 132, 109, // Skip to: 40669
+/* 12633 */ MCD_OPC_CheckField, 21, 1, 1, 126, 109, // Skip to: 40669
+/* 12639 */ MCD_OPC_Decode, 173, 15, 112, // Opcode: SUBv16i8
+/* 12643 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 12661
+/* 12647 */ MCD_OPC_CheckPredicate, 0, 114, 109, // Skip to: 40669
+/* 12651 */ MCD_OPC_CheckField, 21, 1, 1, 108, 109, // Skip to: 40669
+/* 12657 */ MCD_OPC_Decode, 158, 1, 112, // Opcode: CMEQv16i8
+/* 12661 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 12679
+/* 12665 */ MCD_OPC_CheckPredicate, 0, 96, 109, // Skip to: 40669
+/* 12669 */ MCD_OPC_CheckField, 21, 1, 1, 90, 109, // Skip to: 40669
+/* 12675 */ MCD_OPC_Decode, 190, 8, 120, // Opcode: MLSv16i8
+/* 12679 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 12697
+/* 12683 */ MCD_OPC_CheckPredicate, 0, 78, 109, // Skip to: 40669
+/* 12687 */ MCD_OPC_CheckField, 21, 1, 1, 72, 109, // Skip to: 40669
+/* 12693 */ MCD_OPC_Decode, 149, 9, 112, // Opcode: PMULv16i8
+/* 12697 */ MCD_OPC_FilterValue, 4, 14, 0, // Skip to: 12715
+/* 12701 */ MCD_OPC_CheckPredicate, 0, 60, 109, // Skip to: 40669
+/* 12705 */ MCD_OPC_CheckField, 21, 1, 1, 54, 109, // Skip to: 40669
+/* 12711 */ MCD_OPC_Decode, 195, 16, 112, // Opcode: UMAXPv16i8
+/* 12715 */ MCD_OPC_FilterValue, 5, 14, 0, // Skip to: 12733
+/* 12719 */ MCD_OPC_CheckPredicate, 0, 42, 109, // Skip to: 40669
+/* 12723 */ MCD_OPC_CheckField, 21, 1, 1, 36, 109, // Skip to: 40669
+/* 12729 */ MCD_OPC_Decode, 212, 16, 112, // Opcode: UMINPv16i8
+/* 12733 */ MCD_OPC_FilterValue, 8, 14, 0, // Skip to: 12751
+/* 12737 */ MCD_OPC_CheckPredicate, 0, 24, 109, // Skip to: 40669
+/* 12741 */ MCD_OPC_CheckField, 21, 1, 1, 18, 109, // Skip to: 40669
+/* 12747 */ MCD_OPC_Decode, 166, 4, 112, // Opcode: FMAXNMPv4f32
+/* 12751 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 12769
+/* 12755 */ MCD_OPC_CheckPredicate, 0, 6, 109, // Skip to: 40669
+/* 12759 */ MCD_OPC_CheckField, 21, 1, 1, 0, 109, // Skip to: 40669
+/* 12765 */ MCD_OPC_Decode, 203, 2, 112, // Opcode: FADDPv4f32
+/* 12769 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 12787
+/* 12773 */ MCD_OPC_CheckPredicate, 0, 244, 108, // Skip to: 40669
+/* 12777 */ MCD_OPC_CheckField, 21, 1, 1, 238, 108, // Skip to: 40669
+/* 12783 */ MCD_OPC_Decode, 253, 4, 112, // Opcode: FMULv4f32
+/* 12787 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 12805
+/* 12791 */ MCD_OPC_CheckPredicate, 0, 226, 108, // Skip to: 40669
+/* 12795 */ MCD_OPC_CheckField, 21, 1, 1, 220, 108, // Skip to: 40669
+/* 12801 */ MCD_OPC_Decode, 230, 2, 112, // Opcode: FCMGEv4f32
+/* 12805 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 12823
+/* 12809 */ MCD_OPC_CheckPredicate, 0, 208, 108, // Skip to: 40669
+/* 12813 */ MCD_OPC_CheckField, 21, 1, 1, 202, 108, // Skip to: 40669
+/* 12819 */ MCD_OPC_Decode, 192, 2, 112, // Opcode: FACGEv4f32
+/* 12823 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 12841
+/* 12827 */ MCD_OPC_CheckPredicate, 0, 190, 108, // Skip to: 40669
+/* 12831 */ MCD_OPC_CheckField, 21, 1, 1, 184, 108, // Skip to: 40669
+/* 12837 */ MCD_OPC_Decode, 176, 4, 112, // Opcode: FMAXPv4f32
+/* 12841 */ MCD_OPC_FilterValue, 15, 176, 108, // Skip to: 40669
+/* 12845 */ MCD_OPC_CheckPredicate, 0, 172, 108, // Skip to: 40669
+/* 12849 */ MCD_OPC_CheckField, 21, 1, 1, 166, 108, // Skip to: 40669
+/* 12855 */ MCD_OPC_Decode, 157, 4, 112, // Opcode: FDIVv4f32
+/* 12859 */ MCD_OPC_FilterValue, 9, 129, 18, // Skip to: 17600
+/* 12863 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 12866 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 12945
+/* 12870 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 12873 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12891
+/* 12877 */ MCD_OPC_CheckPredicate, 0, 140, 108, // Skip to: 40669
+/* 12881 */ MCD_OPC_CheckField, 21, 1, 1, 134, 108, // Skip to: 40669
+/* 12887 */ MCD_OPC_Decode, 242, 9, 85, // Opcode: SADDLv4i16_v4i32
+/* 12891 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 12909
+/* 12895 */ MCD_OPC_CheckPredicate, 0, 122, 108, // Skip to: 40669
+/* 12899 */ MCD_OPC_CheckField, 21, 1, 1, 116, 108, // Skip to: 40669
+/* 12905 */ MCD_OPC_Decode, 148, 16, 85, // Opcode: UADDLv4i16_v4i32
+/* 12909 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 12927
+/* 12913 */ MCD_OPC_CheckPredicate, 0, 104, 108, // Skip to: 40669
+/* 12917 */ MCD_OPC_CheckField, 21, 1, 1, 98, 108, // Skip to: 40669
+/* 12923 */ MCD_OPC_Decode, 244, 9, 112, // Opcode: SADDLv8i16_v4i32
+/* 12927 */ MCD_OPC_FilterValue, 3, 90, 108, // Skip to: 40669
+/* 12931 */ MCD_OPC_CheckPredicate, 0, 86, 108, // Skip to: 40669
+/* 12935 */ MCD_OPC_CheckField, 21, 1, 1, 80, 108, // Skip to: 40669
+/* 12941 */ MCD_OPC_Decode, 150, 16, 112, // Opcode: UADDLv8i16_v4i32
+/* 12945 */ MCD_OPC_FilterValue, 1, 75, 0, // Skip to: 13024
+/* 12949 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 12952 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 12970
+/* 12956 */ MCD_OPC_CheckPredicate, 0, 61, 108, // Skip to: 40669
+/* 12960 */ MCD_OPC_CheckField, 21, 1, 1, 55, 108, // Skip to: 40669
+/* 12966 */ MCD_OPC_Decode, 164, 10, 89, // Opcode: SHADDv4i16
+/* 12970 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 12988
+/* 12974 */ MCD_OPC_CheckPredicate, 0, 43, 108, // Skip to: 40669
+/* 12978 */ MCD_OPC_CheckField, 21, 1, 1, 37, 108, // Skip to: 40669
+/* 12984 */ MCD_OPC_Decode, 184, 16, 89, // Opcode: UHADDv4i16
+/* 12988 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13006
+/* 12992 */ MCD_OPC_CheckPredicate, 0, 25, 108, // Skip to: 40669
+/* 12996 */ MCD_OPC_CheckField, 21, 1, 1, 19, 108, // Skip to: 40669
+/* 13002 */ MCD_OPC_Decode, 166, 10, 112, // Opcode: SHADDv8i16
+/* 13006 */ MCD_OPC_FilterValue, 3, 11, 108, // Skip to: 40669
+/* 13010 */ MCD_OPC_CheckPredicate, 0, 7, 108, // Skip to: 40669
+/* 13014 */ MCD_OPC_CheckField, 21, 1, 1, 1, 108, // Skip to: 40669
+/* 13020 */ MCD_OPC_Decode, 186, 16, 112, // Opcode: UHADDv8i16
+/* 13024 */ MCD_OPC_FilterValue, 2, 75, 0, // Skip to: 13103
+/* 13028 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13031 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13049
+/* 13035 */ MCD_OPC_CheckPredicate, 0, 238, 107, // Skip to: 40669
+/* 13039 */ MCD_OPC_CheckField, 16, 6, 32, 232, 107, // Skip to: 40669
+/* 13045 */ MCD_OPC_Decode, 179, 9, 90, // Opcode: REV64v4i16
+/* 13049 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13067
+/* 13053 */ MCD_OPC_CheckPredicate, 0, 220, 107, // Skip to: 40669
+/* 13057 */ MCD_OPC_CheckField, 16, 6, 32, 214, 107, // Skip to: 40669
+/* 13063 */ MCD_OPC_Decode, 174, 9, 90, // Opcode: REV32v4i16
+/* 13067 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13085
+/* 13071 */ MCD_OPC_CheckPredicate, 0, 202, 107, // Skip to: 40669
+/* 13075 */ MCD_OPC_CheckField, 16, 6, 32, 196, 107, // Skip to: 40669
+/* 13081 */ MCD_OPC_Decode, 181, 9, 117, // Opcode: REV64v8i16
+/* 13085 */ MCD_OPC_FilterValue, 3, 188, 107, // Skip to: 40669
+/* 13089 */ MCD_OPC_CheckPredicate, 0, 184, 107, // Skip to: 40669
+/* 13093 */ MCD_OPC_CheckField, 16, 6, 32, 178, 107, // Skip to: 40669
+/* 13099 */ MCD_OPC_Decode, 175, 9, 117, // Opcode: REV32v8i16
+/* 13103 */ MCD_OPC_FilterValue, 3, 75, 0, // Skip to: 13182
+/* 13107 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13110 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13128
+/* 13114 */ MCD_OPC_CheckPredicate, 0, 159, 107, // Skip to: 40669
+/* 13118 */ MCD_OPC_CheckField, 21, 1, 1, 153, 107, // Skip to: 40669
+/* 13124 */ MCD_OPC_Decode, 165, 11, 89, // Opcode: SQADDv4i16
+/* 13128 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13146
+/* 13132 */ MCD_OPC_CheckPredicate, 0, 141, 107, // Skip to: 40669
+/* 13136 */ MCD_OPC_CheckField, 21, 1, 1, 135, 107, // Skip to: 40669
+/* 13142 */ MCD_OPC_Decode, 144, 17, 89, // Opcode: UQADDv4i16
+/* 13146 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13164
+/* 13150 */ MCD_OPC_CheckPredicate, 0, 123, 107, // Skip to: 40669
+/* 13154 */ MCD_OPC_CheckField, 21, 1, 1, 117, 107, // Skip to: 40669
+/* 13160 */ MCD_OPC_Decode, 167, 11, 112, // Opcode: SQADDv8i16
+/* 13164 */ MCD_OPC_FilterValue, 3, 109, 107, // Skip to: 40669
+/* 13168 */ MCD_OPC_CheckPredicate, 0, 105, 107, // Skip to: 40669
+/* 13172 */ MCD_OPC_CheckField, 21, 1, 1, 99, 107, // Skip to: 40669
+/* 13178 */ MCD_OPC_Decode, 146, 17, 112, // Opcode: UQADDv8i16
+/* 13182 */ MCD_OPC_FilterValue, 4, 75, 0, // Skip to: 13261
+/* 13186 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13189 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13207
+/* 13193 */ MCD_OPC_CheckPredicate, 0, 80, 107, // Skip to: 40669
+/* 13197 */ MCD_OPC_CheckField, 21, 1, 1, 74, 107, // Skip to: 40669
+/* 13203 */ MCD_OPC_Decode, 248, 9, 93, // Opcode: SADDWv4i16_v4i32
+/* 13207 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13225
+/* 13211 */ MCD_OPC_CheckPredicate, 0, 62, 107, // Skip to: 40669
+/* 13215 */ MCD_OPC_CheckField, 21, 1, 1, 56, 107, // Skip to: 40669
+/* 13221 */ MCD_OPC_Decode, 154, 16, 93, // Opcode: UADDWv4i16_v4i32
+/* 13225 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13243
+/* 13229 */ MCD_OPC_CheckPredicate, 0, 44, 107, // Skip to: 40669
+/* 13233 */ MCD_OPC_CheckField, 21, 1, 1, 38, 107, // Skip to: 40669
+/* 13239 */ MCD_OPC_Decode, 250, 9, 112, // Opcode: SADDWv8i16_v4i32
+/* 13243 */ MCD_OPC_FilterValue, 3, 30, 107, // Skip to: 40669
+/* 13247 */ MCD_OPC_CheckPredicate, 0, 26, 107, // Skip to: 40669
+/* 13251 */ MCD_OPC_CheckField, 21, 1, 1, 20, 107, // Skip to: 40669
+/* 13257 */ MCD_OPC_Decode, 156, 16, 112, // Opcode: UADDWv8i16_v4i32
+/* 13261 */ MCD_OPC_FilterValue, 5, 75, 0, // Skip to: 13340
+/* 13265 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13268 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13286
+/* 13272 */ MCD_OPC_CheckPredicate, 0, 1, 107, // Skip to: 40669
+/* 13276 */ MCD_OPC_CheckField, 21, 1, 1, 251, 106, // Skip to: 40669
+/* 13282 */ MCD_OPC_Decode, 223, 12, 89, // Opcode: SRHADDv4i16
+/* 13286 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13304
+/* 13290 */ MCD_OPC_CheckPredicate, 0, 239, 106, // Skip to: 40669
+/* 13294 */ MCD_OPC_CheckField, 21, 1, 1, 233, 106, // Skip to: 40669
+/* 13300 */ MCD_OPC_Decode, 223, 17, 89, // Opcode: URHADDv4i16
+/* 13304 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13322
+/* 13308 */ MCD_OPC_CheckPredicate, 0, 221, 106, // Skip to: 40669
+/* 13312 */ MCD_OPC_CheckField, 21, 1, 1, 215, 106, // Skip to: 40669
+/* 13318 */ MCD_OPC_Decode, 225, 12, 112, // Opcode: SRHADDv8i16
+/* 13322 */ MCD_OPC_FilterValue, 3, 207, 106, // Skip to: 40669
+/* 13326 */ MCD_OPC_CheckPredicate, 0, 203, 106, // Skip to: 40669
+/* 13330 */ MCD_OPC_CheckField, 21, 1, 1, 197, 106, // Skip to: 40669
+/* 13336 */ MCD_OPC_Decode, 225, 17, 112, // Opcode: URHADDv8i16
+/* 13340 */ MCD_OPC_FilterValue, 6, 39, 0, // Skip to: 13383
+/* 13344 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13347 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13365
+/* 13351 */ MCD_OPC_CheckPredicate, 0, 178, 106, // Skip to: 40669
+/* 13355 */ MCD_OPC_CheckField, 21, 1, 0, 172, 106, // Skip to: 40669
+/* 13361 */ MCD_OPC_Decode, 181, 18, 89, // Opcode: UZP1v4i16
+/* 13365 */ MCD_OPC_FilterValue, 2, 164, 106, // Skip to: 40669
+/* 13369 */ MCD_OPC_CheckPredicate, 0, 160, 106, // Skip to: 40669
+/* 13373 */ MCD_OPC_CheckField, 21, 1, 0, 154, 106, // Skip to: 40669
+/* 13379 */ MCD_OPC_Decode, 183, 18, 112, // Opcode: UZP1v8i16
+/* 13383 */ MCD_OPC_FilterValue, 7, 71, 0, // Skip to: 13458
+/* 13387 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13390 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 13407
+/* 13394 */ MCD_OPC_CheckPredicate, 0, 135, 106, // Skip to: 40669
+/* 13398 */ MCD_OPC_CheckField, 21, 1, 1, 129, 106, // Skip to: 40669
+/* 13404 */ MCD_OPC_Decode, 117, 89, // Opcode: BICv8i8
+/* 13407 */ MCD_OPC_FilterValue, 1, 13, 0, // Skip to: 13424
+/* 13411 */ MCD_OPC_CheckPredicate, 0, 118, 106, // Skip to: 40669
+/* 13415 */ MCD_OPC_CheckField, 21, 1, 1, 112, 106, // Skip to: 40669
+/* 13421 */ MCD_OPC_Decode, 127, 109, // Opcode: BSLv8i8
+/* 13424 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 13441
+/* 13428 */ MCD_OPC_CheckPredicate, 0, 101, 106, // Skip to: 40669
+/* 13432 */ MCD_OPC_CheckField, 21, 1, 1, 95, 106, // Skip to: 40669
+/* 13438 */ MCD_OPC_Decode, 112, 112, // Opcode: BICv16i8
+/* 13441 */ MCD_OPC_FilterValue, 3, 88, 106, // Skip to: 40669
+/* 13445 */ MCD_OPC_CheckPredicate, 0, 84, 106, // Skip to: 40669
+/* 13449 */ MCD_OPC_CheckField, 21, 1, 1, 78, 106, // Skip to: 40669
+/* 13455 */ MCD_OPC_Decode, 126, 120, // Opcode: BSLv16i8
+/* 13458 */ MCD_OPC_FilterValue, 8, 75, 0, // Skip to: 13537
+/* 13462 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13465 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13483
+/* 13469 */ MCD_OPC_CheckPredicate, 0, 60, 106, // Skip to: 40669
+/* 13473 */ MCD_OPC_CheckField, 21, 1, 1, 54, 106, // Skip to: 40669
+/* 13479 */ MCD_OPC_Decode, 163, 13, 85, // Opcode: SSUBLv4i16_v4i32
+/* 13483 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13501
+/* 13487 */ MCD_OPC_CheckPredicate, 0, 42, 106, // Skip to: 40669
+/* 13491 */ MCD_OPC_CheckField, 21, 1, 1, 36, 106, // Skip to: 40669
+/* 13497 */ MCD_OPC_Decode, 168, 18, 85, // Opcode: USUBLv4i16_v4i32
+/* 13501 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13519
+/* 13505 */ MCD_OPC_CheckPredicate, 0, 24, 106, // Skip to: 40669
+/* 13509 */ MCD_OPC_CheckField, 21, 1, 1, 18, 106, // Skip to: 40669
+/* 13515 */ MCD_OPC_Decode, 165, 13, 112, // Opcode: SSUBLv8i16_v4i32
+/* 13519 */ MCD_OPC_FilterValue, 3, 10, 106, // Skip to: 40669
+/* 13523 */ MCD_OPC_CheckPredicate, 0, 6, 106, // Skip to: 40669
+/* 13527 */ MCD_OPC_CheckField, 21, 1, 1, 0, 106, // Skip to: 40669
+/* 13533 */ MCD_OPC_Decode, 170, 18, 112, // Opcode: USUBLv8i16_v4i32
+/* 13537 */ MCD_OPC_FilterValue, 9, 75, 0, // Skip to: 13616
+/* 13541 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13544 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13562
+/* 13548 */ MCD_OPC_CheckPredicate, 0, 237, 105, // Skip to: 40669
+/* 13552 */ MCD_OPC_CheckField, 21, 1, 1, 231, 105, // Skip to: 40669
+/* 13558 */ MCD_OPC_Decode, 190, 10, 89, // Opcode: SHSUBv4i16
+/* 13562 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13580
+/* 13566 */ MCD_OPC_CheckPredicate, 0, 219, 105, // Skip to: 40669
+/* 13570 */ MCD_OPC_CheckField, 21, 1, 1, 213, 105, // Skip to: 40669
+/* 13576 */ MCD_OPC_Decode, 190, 16, 89, // Opcode: UHSUBv4i16
+/* 13580 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13598
+/* 13584 */ MCD_OPC_CheckPredicate, 0, 201, 105, // Skip to: 40669
+/* 13588 */ MCD_OPC_CheckField, 21, 1, 1, 195, 105, // Skip to: 40669
+/* 13594 */ MCD_OPC_Decode, 192, 10, 112, // Opcode: SHSUBv8i16
+/* 13598 */ MCD_OPC_FilterValue, 3, 187, 105, // Skip to: 40669
+/* 13602 */ MCD_OPC_CheckPredicate, 0, 183, 105, // Skip to: 40669
+/* 13606 */ MCD_OPC_CheckField, 21, 1, 1, 177, 105, // Skip to: 40669
+/* 13612 */ MCD_OPC_Decode, 192, 16, 112, // Opcode: UHSUBv8i16
+/* 13616 */ MCD_OPC_FilterValue, 10, 165, 0, // Skip to: 13785
+/* 13620 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13623 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 13673
+/* 13627 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 13630 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13642
+/* 13634 */ MCD_OPC_CheckPredicate, 0, 151, 105, // Skip to: 40669
+/* 13638 */ MCD_OPC_Decode, 222, 15, 89, // Opcode: TRN1v4i16
+/* 13642 */ MCD_OPC_FilterValue, 1, 143, 105, // Skip to: 40669
+/* 13646 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 13649 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13661
+/* 13653 */ MCD_OPC_CheckPredicate, 0, 132, 105, // Skip to: 40669
+/* 13657 */ MCD_OPC_Decode, 231, 9, 90, // Opcode: SADDLPv4i16_v2i32
+/* 13661 */ MCD_OPC_FilterValue, 1, 124, 105, // Skip to: 40669
+/* 13665 */ MCD_OPC_CheckPredicate, 0, 120, 105, // Skip to: 40669
+/* 13669 */ MCD_OPC_Decode, 194, 18, 95, // Opcode: XTNv4i16
+/* 13673 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 13704
+/* 13677 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 13680 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 13692
+/* 13684 */ MCD_OPC_CheckPredicate, 0, 101, 105, // Skip to: 40669
+/* 13688 */ MCD_OPC_Decode, 137, 16, 90, // Opcode: UADDLPv4i16_v2i32
+/* 13692 */ MCD_OPC_FilterValue, 33, 93, 105, // Skip to: 40669
+/* 13696 */ MCD_OPC_CheckPredicate, 0, 89, 105, // Skip to: 40669
+/* 13700 */ MCD_OPC_Decode, 217, 12, 95, // Opcode: SQXTUNv4i16
+/* 13704 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 13754
+/* 13708 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 13711 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13723
+/* 13715 */ MCD_OPC_CheckPredicate, 0, 70, 105, // Skip to: 40669
+/* 13719 */ MCD_OPC_Decode, 224, 15, 112, // Opcode: TRN1v8i16
+/* 13723 */ MCD_OPC_FilterValue, 1, 62, 105, // Skip to: 40669
+/* 13727 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 13730 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 13742
+/* 13734 */ MCD_OPC_CheckPredicate, 0, 51, 105, // Skip to: 40669
+/* 13738 */ MCD_OPC_Decode, 233, 9, 117, // Opcode: SADDLPv8i16_v4i32
+/* 13742 */ MCD_OPC_FilterValue, 1, 43, 105, // Skip to: 40669
+/* 13746 */ MCD_OPC_CheckPredicate, 0, 39, 105, // Skip to: 40669
+/* 13750 */ MCD_OPC_Decode, 196, 18, 126, // Opcode: XTNv8i16
+/* 13754 */ MCD_OPC_FilterValue, 3, 31, 105, // Skip to: 40669
+/* 13758 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 13761 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 13773
+/* 13765 */ MCD_OPC_CheckPredicate, 0, 20, 105, // Skip to: 40669
+/* 13769 */ MCD_OPC_Decode, 139, 16, 117, // Opcode: UADDLPv8i16_v4i32
+/* 13773 */ MCD_OPC_FilterValue, 33, 12, 105, // Skip to: 40669
+/* 13777 */ MCD_OPC_CheckPredicate, 0, 8, 105, // Skip to: 40669
+/* 13781 */ MCD_OPC_Decode, 219, 12, 126, // Opcode: SQXTUNv8i16
+/* 13785 */ MCD_OPC_FilterValue, 11, 75, 0, // Skip to: 13864
+/* 13789 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13792 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13810
+/* 13796 */ MCD_OPC_CheckPredicate, 0, 245, 104, // Skip to: 40669
+/* 13800 */ MCD_OPC_CheckField, 21, 1, 1, 239, 104, // Skip to: 40669
+/* 13806 */ MCD_OPC_Decode, 199, 12, 89, // Opcode: SQSUBv4i16
+/* 13810 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13828
+/* 13814 */ MCD_OPC_CheckPredicate, 0, 227, 104, // Skip to: 40669
+/* 13818 */ MCD_OPC_CheckField, 21, 1, 1, 221, 104, // Skip to: 40669
+/* 13824 */ MCD_OPC_Decode, 206, 17, 89, // Opcode: UQSUBv4i16
+/* 13828 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13846
+/* 13832 */ MCD_OPC_CheckPredicate, 0, 209, 104, // Skip to: 40669
+/* 13836 */ MCD_OPC_CheckField, 21, 1, 1, 203, 104, // Skip to: 40669
+/* 13842 */ MCD_OPC_Decode, 201, 12, 112, // Opcode: SQSUBv8i16
+/* 13846 */ MCD_OPC_FilterValue, 3, 195, 104, // Skip to: 40669
+/* 13850 */ MCD_OPC_CheckPredicate, 0, 191, 104, // Skip to: 40669
+/* 13854 */ MCD_OPC_CheckField, 21, 1, 1, 185, 104, // Skip to: 40669
+/* 13860 */ MCD_OPC_Decode, 208, 17, 112, // Opcode: UQSUBv8i16
+/* 13864 */ MCD_OPC_FilterValue, 12, 75, 0, // Skip to: 13943
+/* 13868 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13871 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13889
+/* 13875 */ MCD_OPC_CheckPredicate, 0, 166, 104, // Skip to: 40669
+/* 13879 */ MCD_OPC_CheckField, 21, 1, 1, 160, 104, // Skip to: 40669
+/* 13885 */ MCD_OPC_Decode, 169, 13, 93, // Opcode: SSUBWv4i16_v4i32
+/* 13889 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13907
+/* 13893 */ MCD_OPC_CheckPredicate, 0, 148, 104, // Skip to: 40669
+/* 13897 */ MCD_OPC_CheckField, 21, 1, 1, 142, 104, // Skip to: 40669
+/* 13903 */ MCD_OPC_Decode, 174, 18, 93, // Opcode: USUBWv4i16_v4i32
+/* 13907 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 13925
+/* 13911 */ MCD_OPC_CheckPredicate, 0, 130, 104, // Skip to: 40669
+/* 13915 */ MCD_OPC_CheckField, 21, 1, 1, 124, 104, // Skip to: 40669
+/* 13921 */ MCD_OPC_Decode, 171, 13, 112, // Opcode: SSUBWv8i16_v4i32
+/* 13925 */ MCD_OPC_FilterValue, 3, 116, 104, // Skip to: 40669
+/* 13929 */ MCD_OPC_CheckPredicate, 0, 112, 104, // Skip to: 40669
+/* 13933 */ MCD_OPC_CheckField, 21, 1, 1, 106, 104, // Skip to: 40669
+/* 13939 */ MCD_OPC_Decode, 176, 18, 112, // Opcode: USUBWv8i16_v4i32
+/* 13943 */ MCD_OPC_FilterValue, 13, 75, 0, // Skip to: 14022
+/* 13947 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 13950 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 13968
+/* 13954 */ MCD_OPC_CheckPredicate, 0, 87, 104, // Skip to: 40669
+/* 13958 */ MCD_OPC_CheckField, 21, 1, 1, 81, 104, // Skip to: 40669
+/* 13964 */ MCD_OPC_Decode, 198, 1, 89, // Opcode: CMGTv4i16
+/* 13968 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 13986
+/* 13972 */ MCD_OPC_CheckPredicate, 0, 69, 104, // Skip to: 40669
+/* 13976 */ MCD_OPC_CheckField, 21, 1, 1, 63, 104, // Skip to: 40669
+/* 13982 */ MCD_OPC_Decode, 210, 1, 89, // Opcode: CMHIv4i16
+/* 13986 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14004
+/* 13990 */ MCD_OPC_CheckPredicate, 0, 51, 104, // Skip to: 40669
+/* 13994 */ MCD_OPC_CheckField, 21, 1, 1, 45, 104, // Skip to: 40669
+/* 14000 */ MCD_OPC_Decode, 202, 1, 112, // Opcode: CMGTv8i16
+/* 14004 */ MCD_OPC_FilterValue, 3, 37, 104, // Skip to: 40669
+/* 14008 */ MCD_OPC_CheckPredicate, 0, 33, 104, // Skip to: 40669
+/* 14012 */ MCD_OPC_CheckField, 21, 1, 1, 27, 104, // Skip to: 40669
+/* 14018 */ MCD_OPC_Decode, 212, 1, 112, // Opcode: CMHIv8i16
+/* 14022 */ MCD_OPC_FilterValue, 14, 193, 0, // Skip to: 14219
+/* 14026 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14029 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 14080
+/* 14033 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 14036 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14048
+/* 14040 */ MCD_OPC_CheckPredicate, 0, 1, 104, // Skip to: 40669
+/* 14044 */ MCD_OPC_Decode, 201, 18, 89, // Opcode: ZIP1v4i16
+/* 14048 */ MCD_OPC_FilterValue, 1, 249, 103, // Skip to: 40669
+/* 14052 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 14055 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14067
+/* 14059 */ MCD_OPC_CheckPredicate, 0, 238, 103, // Skip to: 40669
+/* 14063 */ MCD_OPC_Decode, 188, 15, 99, // Opcode: SUQADDv4i16
+/* 14067 */ MCD_OPC_FilterValue, 16, 230, 103, // Skip to: 40669
+/* 14071 */ MCD_OPC_CheckPredicate, 0, 226, 103, // Skip to: 40669
+/* 14075 */ MCD_OPC_Decode, 236, 9, 144, 1, // Opcode: SADDLVv4i16v
+/* 14080 */ MCD_OPC_FilterValue, 1, 40, 0, // Skip to: 14124
+/* 14084 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 14087 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14099
+/* 14091 */ MCD_OPC_CheckPredicate, 0, 206, 103, // Skip to: 40669
+/* 14095 */ MCD_OPC_Decode, 154, 18, 99, // Opcode: USQADDv4i16
+/* 14099 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 14111
+/* 14103 */ MCD_OPC_CheckPredicate, 0, 194, 103, // Skip to: 40669
+/* 14107 */ MCD_OPC_Decode, 170, 10, 108, // Opcode: SHLLv4i16
+/* 14111 */ MCD_OPC_FilterValue, 48, 186, 103, // Skip to: 40669
+/* 14115 */ MCD_OPC_CheckPredicate, 0, 182, 103, // Skip to: 40669
+/* 14119 */ MCD_OPC_Decode, 142, 16, 144, 1, // Opcode: UADDLVv4i16v
+/* 14124 */ MCD_OPC_FilterValue, 2, 47, 0, // Skip to: 14175
+/* 14128 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 14131 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14143
+/* 14135 */ MCD_OPC_CheckPredicate, 0, 162, 103, // Skip to: 40669
+/* 14139 */ MCD_OPC_Decode, 203, 18, 112, // Opcode: ZIP1v8i16
+/* 14143 */ MCD_OPC_FilterValue, 1, 154, 103, // Skip to: 40669
+/* 14147 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 14150 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 14162
+/* 14154 */ MCD_OPC_CheckPredicate, 0, 143, 103, // Skip to: 40669
+/* 14158 */ MCD_OPC_Decode, 190, 15, 126, // Opcode: SUQADDv8i16
+/* 14162 */ MCD_OPC_FilterValue, 16, 135, 103, // Skip to: 40669
+/* 14166 */ MCD_OPC_CheckPredicate, 0, 131, 103, // Skip to: 40669
+/* 14170 */ MCD_OPC_Decode, 238, 9, 139, 1, // Opcode: SADDLVv8i16v
+/* 14175 */ MCD_OPC_FilterValue, 3, 122, 103, // Skip to: 40669
+/* 14179 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 14182 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14194
+/* 14186 */ MCD_OPC_CheckPredicate, 0, 111, 103, // Skip to: 40669
+/* 14190 */ MCD_OPC_Decode, 156, 18, 126, // Opcode: USQADDv8i16
+/* 14194 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 14206
+/* 14198 */ MCD_OPC_CheckPredicate, 0, 99, 103, // Skip to: 40669
+/* 14202 */ MCD_OPC_Decode, 172, 10, 117, // Opcode: SHLLv8i16
+/* 14206 */ MCD_OPC_FilterValue, 48, 91, 103, // Skip to: 40669
+/* 14210 */ MCD_OPC_CheckPredicate, 0, 87, 103, // Skip to: 40669
+/* 14214 */ MCD_OPC_Decode, 144, 16, 139, 1, // Opcode: UADDLVv8i16v
+/* 14219 */ MCD_OPC_FilterValue, 15, 75, 0, // Skip to: 14298
+/* 14223 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14226 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14244
+/* 14230 */ MCD_OPC_CheckPredicate, 0, 67, 103, // Skip to: 40669
+/* 14234 */ MCD_OPC_CheckField, 21, 1, 1, 61, 103, // Skip to: 40669
+/* 14240 */ MCD_OPC_Decode, 182, 1, 89, // Opcode: CMGEv4i16
+/* 14244 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14262
+/* 14248 */ MCD_OPC_CheckPredicate, 0, 49, 103, // Skip to: 40669
+/* 14252 */ MCD_OPC_CheckField, 21, 1, 1, 43, 103, // Skip to: 40669
+/* 14258 */ MCD_OPC_Decode, 218, 1, 89, // Opcode: CMHSv4i16
+/* 14262 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14280
+/* 14266 */ MCD_OPC_CheckPredicate, 0, 31, 103, // Skip to: 40669
+/* 14270 */ MCD_OPC_CheckField, 21, 1, 1, 25, 103, // Skip to: 40669
+/* 14276 */ MCD_OPC_Decode, 186, 1, 112, // Opcode: CMGEv8i16
+/* 14280 */ MCD_OPC_FilterValue, 3, 17, 103, // Skip to: 40669
+/* 14284 */ MCD_OPC_CheckPredicate, 0, 13, 103, // Skip to: 40669
+/* 14288 */ MCD_OPC_CheckField, 21, 1, 1, 7, 103, // Skip to: 40669
+/* 14294 */ MCD_OPC_Decode, 220, 1, 112, // Opcode: CMHSv8i16
+/* 14298 */ MCD_OPC_FilterValue, 16, 73, 0, // Skip to: 14375
+/* 14302 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14305 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 14322
+/* 14309 */ MCD_OPC_CheckPredicate, 0, 244, 102, // Skip to: 40669
+/* 14313 */ MCD_OPC_CheckField, 21, 1, 1, 238, 102, // Skip to: 40669
+/* 14319 */ MCD_OPC_Decode, 34, 103, // Opcode: ADDHNv4i32_v4i16
+/* 14322 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14340
+/* 14326 */ MCD_OPC_CheckPredicate, 0, 227, 102, // Skip to: 40669
+/* 14330 */ MCD_OPC_CheckField, 21, 1, 1, 221, 102, // Skip to: 40669
+/* 14336 */ MCD_OPC_Decode, 158, 9, 103, // Opcode: RADDHNv4i32_v4i16
+/* 14340 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 14357
+/* 14344 */ MCD_OPC_CheckPredicate, 0, 209, 102, // Skip to: 40669
+/* 14348 */ MCD_OPC_CheckField, 21, 1, 1, 203, 102, // Skip to: 40669
+/* 14354 */ MCD_OPC_Decode, 35, 120, // Opcode: ADDHNv4i32_v8i16
+/* 14357 */ MCD_OPC_FilterValue, 3, 196, 102, // Skip to: 40669
+/* 14361 */ MCD_OPC_CheckPredicate, 0, 192, 102, // Skip to: 40669
+/* 14365 */ MCD_OPC_CheckField, 21, 1, 1, 186, 102, // Skip to: 40669
+/* 14371 */ MCD_OPC_Decode, 159, 9, 120, // Opcode: RADDHNv4i32_v8i16
+/* 14375 */ MCD_OPC_FilterValue, 17, 75, 0, // Skip to: 14454
+/* 14379 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14382 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14400
+/* 14386 */ MCD_OPC_CheckPredicate, 0, 167, 102, // Skip to: 40669
+/* 14390 */ MCD_OPC_CheckField, 21, 1, 1, 161, 102, // Skip to: 40669
+/* 14396 */ MCD_OPC_Decode, 141, 13, 89, // Opcode: SSHLv4i16
+/* 14400 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14418
+/* 14404 */ MCD_OPC_CheckPredicate, 0, 149, 102, // Skip to: 40669
+/* 14408 */ MCD_OPC_CheckField, 21, 1, 1, 143, 102, // Skip to: 40669
+/* 14414 */ MCD_OPC_Decode, 135, 18, 89, // Opcode: USHLv4i16
+/* 14418 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14436
+/* 14422 */ MCD_OPC_CheckPredicate, 0, 131, 102, // Skip to: 40669
+/* 14426 */ MCD_OPC_CheckField, 21, 1, 1, 125, 102, // Skip to: 40669
+/* 14432 */ MCD_OPC_Decode, 143, 13, 112, // Opcode: SSHLv8i16
+/* 14436 */ MCD_OPC_FilterValue, 3, 117, 102, // Skip to: 40669
+/* 14440 */ MCD_OPC_CheckPredicate, 0, 113, 102, // Skip to: 40669
+/* 14444 */ MCD_OPC_CheckField, 21, 1, 1, 107, 102, // Skip to: 40669
+/* 14450 */ MCD_OPC_Decode, 137, 18, 112, // Opcode: USHLv8i16
+/* 14454 */ MCD_OPC_FilterValue, 18, 127, 0, // Skip to: 14585
+/* 14458 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14461 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 14492
+/* 14465 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 14468 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14480
+/* 14472 */ MCD_OPC_CheckPredicate, 0, 81, 102, // Skip to: 40669
+/* 14476 */ MCD_OPC_Decode, 146, 1, 90, // Opcode: CLSv4i16
+/* 14480 */ MCD_OPC_FilterValue, 33, 73, 102, // Skip to: 40669
+/* 14484 */ MCD_OPC_CheckPredicate, 0, 69, 102, // Skip to: 40669
+/* 14488 */ MCD_OPC_Decode, 208, 12, 95, // Opcode: SQXTNv4i16
+/* 14492 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 14523
+/* 14496 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 14499 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14511
+/* 14503 */ MCD_OPC_CheckPredicate, 0, 50, 102, // Skip to: 40669
+/* 14507 */ MCD_OPC_Decode, 154, 1, 90, // Opcode: CLZv4i16
+/* 14511 */ MCD_OPC_FilterValue, 33, 42, 102, // Skip to: 40669
+/* 14515 */ MCD_OPC_CheckPredicate, 0, 38, 102, // Skip to: 40669
+/* 14519 */ MCD_OPC_Decode, 215, 17, 95, // Opcode: UQXTNv4i16
+/* 14523 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 14554
+/* 14527 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 14530 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14542
+/* 14534 */ MCD_OPC_CheckPredicate, 0, 19, 102, // Skip to: 40669
+/* 14538 */ MCD_OPC_Decode, 148, 1, 117, // Opcode: CLSv8i16
+/* 14542 */ MCD_OPC_FilterValue, 33, 11, 102, // Skip to: 40669
+/* 14546 */ MCD_OPC_CheckPredicate, 0, 7, 102, // Skip to: 40669
+/* 14550 */ MCD_OPC_Decode, 210, 12, 126, // Opcode: SQXTNv8i16
+/* 14554 */ MCD_OPC_FilterValue, 3, 255, 101, // Skip to: 40669
+/* 14558 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 14561 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 14573
+/* 14565 */ MCD_OPC_CheckPredicate, 0, 244, 101, // Skip to: 40669
+/* 14569 */ MCD_OPC_Decode, 156, 1, 117, // Opcode: CLZv8i16
+/* 14573 */ MCD_OPC_FilterValue, 33, 236, 101, // Skip to: 40669
+/* 14577 */ MCD_OPC_CheckPredicate, 0, 232, 101, // Skip to: 40669
+/* 14581 */ MCD_OPC_Decode, 217, 17, 126, // Opcode: UQXTNv8i16
+/* 14585 */ MCD_OPC_FilterValue, 19, 75, 0, // Skip to: 14664
+/* 14589 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14592 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14610
+/* 14596 */ MCD_OPC_CheckPredicate, 0, 213, 101, // Skip to: 40669
+/* 14600 */ MCD_OPC_CheckField, 21, 1, 1, 207, 101, // Skip to: 40669
+/* 14606 */ MCD_OPC_Decode, 166, 12, 89, // Opcode: SQSHLv4i16
+/* 14610 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14628
+/* 14614 */ MCD_OPC_CheckPredicate, 0, 195, 101, // Skip to: 40669
+/* 14618 */ MCD_OPC_CheckField, 21, 1, 1, 189, 101, // Skip to: 40669
+/* 14624 */ MCD_OPC_Decode, 182, 17, 89, // Opcode: UQSHLv4i16
+/* 14628 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14646
+/* 14632 */ MCD_OPC_CheckPredicate, 0, 177, 101, // Skip to: 40669
+/* 14636 */ MCD_OPC_CheckField, 21, 1, 1, 171, 101, // Skip to: 40669
+/* 14642 */ MCD_OPC_Decode, 170, 12, 112, // Opcode: SQSHLv8i16
+/* 14646 */ MCD_OPC_FilterValue, 3, 163, 101, // Skip to: 40669
+/* 14650 */ MCD_OPC_CheckPredicate, 0, 159, 101, // Skip to: 40669
+/* 14654 */ MCD_OPC_CheckField, 21, 1, 1, 153, 101, // Skip to: 40669
+/* 14660 */ MCD_OPC_Decode, 186, 17, 112, // Opcode: UQSHLv8i16
+/* 14664 */ MCD_OPC_FilterValue, 20, 75, 0, // Skip to: 14743
+/* 14668 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14671 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14689
+/* 14675 */ MCD_OPC_CheckPredicate, 0, 134, 101, // Skip to: 40669
+/* 14679 */ MCD_OPC_CheckField, 21, 1, 1, 128, 101, // Skip to: 40669
+/* 14685 */ MCD_OPC_Decode, 201, 9, 105, // Opcode: SABALv4i16_v4i32
+/* 14689 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14707
+/* 14693 */ MCD_OPC_CheckPredicate, 0, 116, 101, // Skip to: 40669
+/* 14697 */ MCD_OPC_CheckField, 21, 1, 1, 110, 101, // Skip to: 40669
+/* 14703 */ MCD_OPC_Decode, 235, 15, 105, // Opcode: UABALv4i16_v4i32
+/* 14707 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14725
+/* 14711 */ MCD_OPC_CheckPredicate, 0, 98, 101, // Skip to: 40669
+/* 14715 */ MCD_OPC_CheckField, 21, 1, 1, 92, 101, // Skip to: 40669
+/* 14721 */ MCD_OPC_Decode, 203, 9, 120, // Opcode: SABALv8i16_v4i32
+/* 14725 */ MCD_OPC_FilterValue, 3, 84, 101, // Skip to: 40669
+/* 14729 */ MCD_OPC_CheckPredicate, 0, 80, 101, // Skip to: 40669
+/* 14733 */ MCD_OPC_CheckField, 21, 1, 1, 74, 101, // Skip to: 40669
+/* 14739 */ MCD_OPC_Decode, 237, 15, 120, // Opcode: UABALv8i16_v4i32
+/* 14743 */ MCD_OPC_FilterValue, 21, 75, 0, // Skip to: 14822
+/* 14747 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14750 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14768
+/* 14754 */ MCD_OPC_CheckPredicate, 0, 55, 101, // Skip to: 40669
+/* 14758 */ MCD_OPC_CheckField, 21, 1, 1, 49, 101, // Skip to: 40669
+/* 14764 */ MCD_OPC_Decode, 239, 12, 89, // Opcode: SRSHLv4i16
+/* 14768 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14786
+/* 14772 */ MCD_OPC_CheckPredicate, 0, 37, 101, // Skip to: 40669
+/* 14776 */ MCD_OPC_CheckField, 21, 1, 1, 31, 101, // Skip to: 40669
+/* 14782 */ MCD_OPC_Decode, 231, 17, 89, // Opcode: URSHLv4i16
+/* 14786 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14804
+/* 14790 */ MCD_OPC_CheckPredicate, 0, 19, 101, // Skip to: 40669
+/* 14794 */ MCD_OPC_CheckField, 21, 1, 1, 13, 101, // Skip to: 40669
+/* 14800 */ MCD_OPC_Decode, 241, 12, 112, // Opcode: SRSHLv8i16
+/* 14804 */ MCD_OPC_FilterValue, 3, 5, 101, // Skip to: 40669
+/* 14808 */ MCD_OPC_CheckPredicate, 0, 1, 101, // Skip to: 40669
+/* 14812 */ MCD_OPC_CheckField, 21, 1, 1, 251, 100, // Skip to: 40669
+/* 14818 */ MCD_OPC_Decode, 233, 17, 112, // Opcode: URSHLv8i16
+/* 14822 */ MCD_OPC_FilterValue, 22, 75, 0, // Skip to: 14901
+/* 14826 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14829 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14847
+/* 14833 */ MCD_OPC_CheckPredicate, 0, 232, 100, // Skip to: 40669
+/* 14837 */ MCD_OPC_CheckField, 21, 1, 0, 226, 100, // Skip to: 40669
+/* 14843 */ MCD_OPC_Decode, 188, 18, 89, // Opcode: UZP2v4i16
+/* 14847 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14865
+/* 14851 */ MCD_OPC_CheckPredicate, 0, 214, 100, // Skip to: 40669
+/* 14855 */ MCD_OPC_CheckField, 16, 6, 32, 208, 100, // Skip to: 40669
+/* 14861 */ MCD_OPC_Decode, 165, 9, 90, // Opcode: RBITv8i8
+/* 14865 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14883
+/* 14869 */ MCD_OPC_CheckPredicate, 0, 196, 100, // Skip to: 40669
+/* 14873 */ MCD_OPC_CheckField, 21, 1, 0, 190, 100, // Skip to: 40669
+/* 14879 */ MCD_OPC_Decode, 190, 18, 112, // Opcode: UZP2v8i16
+/* 14883 */ MCD_OPC_FilterValue, 3, 182, 100, // Skip to: 40669
+/* 14887 */ MCD_OPC_CheckPredicate, 0, 178, 100, // Skip to: 40669
+/* 14891 */ MCD_OPC_CheckField, 16, 6, 32, 172, 100, // Skip to: 40669
+/* 14897 */ MCD_OPC_Decode, 164, 9, 117, // Opcode: RBITv16i8
+/* 14901 */ MCD_OPC_FilterValue, 23, 75, 0, // Skip to: 14980
+/* 14905 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14908 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 14926
+/* 14912 */ MCD_OPC_CheckPredicate, 0, 153, 100, // Skip to: 40669
+/* 14916 */ MCD_OPC_CheckField, 21, 1, 1, 147, 100, // Skip to: 40669
+/* 14922 */ MCD_OPC_Decode, 247, 11, 89, // Opcode: SQRSHLv4i16
+/* 14926 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 14944
+/* 14930 */ MCD_OPC_CheckPredicate, 0, 135, 100, // Skip to: 40669
+/* 14934 */ MCD_OPC_CheckField, 21, 1, 1, 129, 100, // Skip to: 40669
+/* 14940 */ MCD_OPC_Decode, 155, 17, 89, // Opcode: UQRSHLv4i16
+/* 14944 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 14962
+/* 14948 */ MCD_OPC_CheckPredicate, 0, 117, 100, // Skip to: 40669
+/* 14952 */ MCD_OPC_CheckField, 21, 1, 1, 111, 100, // Skip to: 40669
+/* 14958 */ MCD_OPC_Decode, 249, 11, 112, // Opcode: SQRSHLv8i16
+/* 14962 */ MCD_OPC_FilterValue, 3, 103, 100, // Skip to: 40669
+/* 14966 */ MCD_OPC_CheckPredicate, 0, 99, 100, // Skip to: 40669
+/* 14970 */ MCD_OPC_CheckField, 21, 1, 1, 93, 100, // Skip to: 40669
+/* 14976 */ MCD_OPC_Decode, 157, 17, 112, // Opcode: UQRSHLv8i16
+/* 14980 */ MCD_OPC_FilterValue, 24, 75, 0, // Skip to: 15059
+/* 14984 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 14987 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15005
+/* 14991 */ MCD_OPC_CheckPredicate, 0, 74, 100, // Skip to: 40669
+/* 14995 */ MCD_OPC_CheckField, 21, 1, 1, 68, 100, // Skip to: 40669
+/* 15001 */ MCD_OPC_Decode, 151, 15, 103, // Opcode: SUBHNv4i32_v4i16
+/* 15005 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15023
+/* 15009 */ MCD_OPC_CheckPredicate, 0, 56, 100, // Skip to: 40669
+/* 15013 */ MCD_OPC_CheckField, 21, 1, 1, 50, 100, // Skip to: 40669
+/* 15019 */ MCD_OPC_Decode, 195, 9, 103, // Opcode: RSUBHNv4i32_v4i16
+/* 15023 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15041
+/* 15027 */ MCD_OPC_CheckPredicate, 0, 38, 100, // Skip to: 40669
+/* 15031 */ MCD_OPC_CheckField, 21, 1, 1, 32, 100, // Skip to: 40669
+/* 15037 */ MCD_OPC_Decode, 152, 15, 120, // Opcode: SUBHNv4i32_v8i16
+/* 15041 */ MCD_OPC_FilterValue, 3, 24, 100, // Skip to: 40669
+/* 15045 */ MCD_OPC_CheckPredicate, 0, 20, 100, // Skip to: 40669
+/* 15049 */ MCD_OPC_CheckField, 21, 1, 1, 14, 100, // Skip to: 40669
+/* 15055 */ MCD_OPC_Decode, 196, 9, 120, // Opcode: RSUBHNv4i32_v8i16
+/* 15059 */ MCD_OPC_FilterValue, 25, 75, 0, // Skip to: 15138
+/* 15063 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 15066 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15084
+/* 15070 */ MCD_OPC_CheckPredicate, 0, 251, 99, // Skip to: 40669
+/* 15074 */ MCD_OPC_CheckField, 21, 1, 1, 245, 99, // Skip to: 40669
+/* 15080 */ MCD_OPC_Decode, 216, 10, 89, // Opcode: SMAXv4i16
+/* 15084 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15102
+/* 15088 */ MCD_OPC_CheckPredicate, 0, 233, 99, // Skip to: 40669
+/* 15092 */ MCD_OPC_CheckField, 21, 1, 1, 227, 99, // Skip to: 40669
+/* 15098 */ MCD_OPC_Decode, 208, 16, 89, // Opcode: UMAXv4i16
+/* 15102 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15120
+/* 15106 */ MCD_OPC_CheckPredicate, 0, 215, 99, // Skip to: 40669
+/* 15110 */ MCD_OPC_CheckField, 21, 1, 1, 209, 99, // Skip to: 40669
+/* 15116 */ MCD_OPC_Decode, 218, 10, 112, // Opcode: SMAXv8i16
+/* 15120 */ MCD_OPC_FilterValue, 3, 201, 99, // Skip to: 40669
+/* 15124 */ MCD_OPC_CheckPredicate, 0, 197, 99, // Skip to: 40669
+/* 15128 */ MCD_OPC_CheckField, 21, 1, 1, 191, 99, // Skip to: 40669
+/* 15134 */ MCD_OPC_Decode, 210, 16, 112, // Opcode: UMAXv8i16
+/* 15138 */ MCD_OPC_FilterValue, 26, 165, 0, // Skip to: 15307
+/* 15142 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 15145 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 15195
+/* 15149 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 15152 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15164
+/* 15156 */ MCD_OPC_CheckPredicate, 0, 165, 99, // Skip to: 40669
+/* 15160 */ MCD_OPC_Decode, 229, 15, 89, // Opcode: TRN2v4i16
+/* 15164 */ MCD_OPC_FilterValue, 1, 157, 99, // Skip to: 40669
+/* 15168 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 15171 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15183
+/* 15175 */ MCD_OPC_CheckPredicate, 0, 146, 99, // Skip to: 40669
+/* 15179 */ MCD_OPC_Decode, 225, 9, 99, // Opcode: SADALPv4i16_v2i32
+/* 15183 */ MCD_OPC_FilterValue, 1, 138, 99, // Skip to: 40669
+/* 15187 */ MCD_OPC_CheckPredicate, 0, 134, 99, // Skip to: 40669
+/* 15191 */ MCD_OPC_Decode, 196, 3, 95, // Opcode: FCVTNv2i32
+/* 15195 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 15226
+/* 15199 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 15202 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 15214
+/* 15206 */ MCD_OPC_CheckPredicate, 0, 115, 99, // Skip to: 40669
+/* 15210 */ MCD_OPC_Decode, 131, 16, 99, // Opcode: UADALPv4i16_v2i32
+/* 15214 */ MCD_OPC_FilterValue, 33, 107, 99, // Skip to: 40669
+/* 15218 */ MCD_OPC_CheckPredicate, 0, 103, 99, // Skip to: 40669
+/* 15222 */ MCD_OPC_Decode, 221, 3, 95, // Opcode: FCVTXNv2f32
+/* 15226 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 15276
+/* 15230 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 15233 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15245
+/* 15237 */ MCD_OPC_CheckPredicate, 0, 84, 99, // Skip to: 40669
+/* 15241 */ MCD_OPC_Decode, 231, 15, 112, // Opcode: TRN2v8i16
+/* 15245 */ MCD_OPC_FilterValue, 1, 76, 99, // Skip to: 40669
+/* 15249 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 15252 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15264
+/* 15256 */ MCD_OPC_CheckPredicate, 0, 65, 99, // Skip to: 40669
+/* 15260 */ MCD_OPC_Decode, 227, 9, 126, // Opcode: SADALPv8i16_v4i32
+/* 15264 */ MCD_OPC_FilterValue, 1, 57, 99, // Skip to: 40669
+/* 15268 */ MCD_OPC_CheckPredicate, 0, 53, 99, // Skip to: 40669
+/* 15272 */ MCD_OPC_Decode, 198, 3, 126, // Opcode: FCVTNv4i32
+/* 15276 */ MCD_OPC_FilterValue, 3, 45, 99, // Skip to: 40669
+/* 15280 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 15283 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 15295
+/* 15287 */ MCD_OPC_CheckPredicate, 0, 34, 99, // Skip to: 40669
+/* 15291 */ MCD_OPC_Decode, 133, 16, 126, // Opcode: UADALPv8i16_v4i32
+/* 15295 */ MCD_OPC_FilterValue, 33, 26, 99, // Skip to: 40669
+/* 15299 */ MCD_OPC_CheckPredicate, 0, 22, 99, // Skip to: 40669
+/* 15303 */ MCD_OPC_Decode, 222, 3, 126, // Opcode: FCVTXNv4f32
+/* 15307 */ MCD_OPC_FilterValue, 27, 75, 0, // Skip to: 15386
+/* 15311 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 15314 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15332
+/* 15318 */ MCD_OPC_CheckPredicate, 0, 3, 99, // Skip to: 40669
+/* 15322 */ MCD_OPC_CheckField, 21, 1, 1, 253, 98, // Skip to: 40669
+/* 15328 */ MCD_OPC_Decode, 234, 10, 89, // Opcode: SMINv4i16
+/* 15332 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15350
+/* 15336 */ MCD_OPC_CheckPredicate, 0, 241, 98, // Skip to: 40669
+/* 15340 */ MCD_OPC_CheckField, 21, 1, 1, 235, 98, // Skip to: 40669
+/* 15346 */ MCD_OPC_Decode, 225, 16, 89, // Opcode: UMINv4i16
+/* 15350 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15368
+/* 15354 */ MCD_OPC_CheckPredicate, 0, 223, 98, // Skip to: 40669
+/* 15358 */ MCD_OPC_CheckField, 21, 1, 1, 217, 98, // Skip to: 40669
+/* 15364 */ MCD_OPC_Decode, 236, 10, 112, // Opcode: SMINv8i16
+/* 15368 */ MCD_OPC_FilterValue, 3, 209, 98, // Skip to: 40669
+/* 15372 */ MCD_OPC_CheckPredicate, 0, 205, 98, // Skip to: 40669
+/* 15376 */ MCD_OPC_CheckField, 21, 1, 1, 199, 98, // Skip to: 40669
+/* 15382 */ MCD_OPC_Decode, 227, 16, 112, // Opcode: UMINv8i16
+/* 15386 */ MCD_OPC_FilterValue, 28, 75, 0, // Skip to: 15465
+/* 15390 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 15393 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15411
+/* 15397 */ MCD_OPC_CheckPredicate, 0, 180, 98, // Skip to: 40669
+/* 15401 */ MCD_OPC_CheckField, 21, 1, 1, 174, 98, // Skip to: 40669
+/* 15407 */ MCD_OPC_Decode, 213, 9, 85, // Opcode: SABDLv4i16_v4i32
+/* 15411 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15429
+/* 15415 */ MCD_OPC_CheckPredicate, 0, 162, 98, // Skip to: 40669
+/* 15419 */ MCD_OPC_CheckField, 21, 1, 1, 156, 98, // Skip to: 40669
+/* 15425 */ MCD_OPC_Decode, 247, 15, 85, // Opcode: UABDLv4i16_v4i32
+/* 15429 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15447
+/* 15433 */ MCD_OPC_CheckPredicate, 0, 144, 98, // Skip to: 40669
+/* 15437 */ MCD_OPC_CheckField, 21, 1, 1, 138, 98, // Skip to: 40669
+/* 15443 */ MCD_OPC_Decode, 215, 9, 112, // Opcode: SABDLv8i16_v4i32
+/* 15447 */ MCD_OPC_FilterValue, 3, 130, 98, // Skip to: 40669
+/* 15451 */ MCD_OPC_CheckPredicate, 0, 126, 98, // Skip to: 40669
+/* 15455 */ MCD_OPC_CheckField, 21, 1, 1, 120, 98, // Skip to: 40669
+/* 15461 */ MCD_OPC_Decode, 249, 15, 112, // Opcode: UABDLv8i16_v4i32
+/* 15465 */ MCD_OPC_FilterValue, 29, 75, 0, // Skip to: 15544
+/* 15469 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 15472 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15490
+/* 15476 */ MCD_OPC_CheckPredicate, 0, 101, 98, // Skip to: 40669
+/* 15480 */ MCD_OPC_CheckField, 21, 1, 1, 95, 98, // Skip to: 40669
+/* 15486 */ MCD_OPC_Decode, 219, 9, 89, // Opcode: SABDv4i16
+/* 15490 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15508
+/* 15494 */ MCD_OPC_CheckPredicate, 0, 83, 98, // Skip to: 40669
+/* 15498 */ MCD_OPC_CheckField, 21, 1, 1, 77, 98, // Skip to: 40669
+/* 15504 */ MCD_OPC_Decode, 253, 15, 89, // Opcode: UABDv4i16
+/* 15508 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15526
+/* 15512 */ MCD_OPC_CheckPredicate, 0, 65, 98, // Skip to: 40669
+/* 15516 */ MCD_OPC_CheckField, 21, 1, 1, 59, 98, // Skip to: 40669
+/* 15522 */ MCD_OPC_Decode, 221, 9, 112, // Opcode: SABDv8i16
+/* 15526 */ MCD_OPC_FilterValue, 3, 51, 98, // Skip to: 40669
+/* 15530 */ MCD_OPC_CheckPredicate, 0, 47, 98, // Skip to: 40669
+/* 15534 */ MCD_OPC_CheckField, 21, 1, 1, 41, 98, // Skip to: 40669
+/* 15540 */ MCD_OPC_Decode, 255, 15, 112, // Opcode: UABDv8i16
+/* 15544 */ MCD_OPC_FilterValue, 30, 139, 0, // Skip to: 15687
+/* 15548 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 15551 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 15601
+/* 15555 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 15558 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15570
+/* 15562 */ MCD_OPC_CheckPredicate, 0, 15, 98, // Skip to: 40669
+/* 15566 */ MCD_OPC_Decode, 208, 18, 89, // Opcode: ZIP2v4i16
+/* 15570 */ MCD_OPC_FilterValue, 1, 7, 98, // Skip to: 40669
+/* 15574 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 15577 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15589
+/* 15581 */ MCD_OPC_CheckPredicate, 0, 252, 97, // Skip to: 40669
+/* 15585 */ MCD_OPC_Decode, 154, 11, 90, // Opcode: SQABSv4i16
+/* 15589 */ MCD_OPC_FilterValue, 1, 244, 97, // Skip to: 40669
+/* 15593 */ MCD_OPC_CheckPredicate, 0, 240, 97, // Skip to: 40669
+/* 15597 */ MCD_OPC_Decode, 156, 3, 108, // Opcode: FCVTLv2i32
+/* 15601 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15619
+/* 15605 */ MCD_OPC_CheckPredicate, 0, 228, 97, // Skip to: 40669
+/* 15609 */ MCD_OPC_CheckField, 16, 6, 32, 222, 97, // Skip to: 40669
+/* 15615 */ MCD_OPC_Decode, 224, 11, 90, // Opcode: SQNEGv4i16
+/* 15619 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 15669
+/* 15623 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 15626 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15638
+/* 15630 */ MCD_OPC_CheckPredicate, 0, 203, 97, // Skip to: 40669
+/* 15634 */ MCD_OPC_Decode, 210, 18, 112, // Opcode: ZIP2v8i16
+/* 15638 */ MCD_OPC_FilterValue, 1, 195, 97, // Skip to: 40669
+/* 15642 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 15645 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 15657
+/* 15649 */ MCD_OPC_CheckPredicate, 0, 184, 97, // Skip to: 40669
+/* 15653 */ MCD_OPC_Decode, 156, 11, 117, // Opcode: SQABSv8i16
+/* 15657 */ MCD_OPC_FilterValue, 1, 176, 97, // Skip to: 40669
+/* 15661 */ MCD_OPC_CheckPredicate, 0, 172, 97, // Skip to: 40669
+/* 15665 */ MCD_OPC_Decode, 158, 3, 117, // Opcode: FCVTLv4i32
+/* 15669 */ MCD_OPC_FilterValue, 3, 164, 97, // Skip to: 40669
+/* 15673 */ MCD_OPC_CheckPredicate, 0, 160, 97, // Skip to: 40669
+/* 15677 */ MCD_OPC_CheckField, 16, 6, 32, 154, 97, // Skip to: 40669
+/* 15683 */ MCD_OPC_Decode, 226, 11, 117, // Opcode: SQNEGv8i16
+/* 15687 */ MCD_OPC_FilterValue, 31, 75, 0, // Skip to: 15766
+/* 15691 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 15694 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15712
+/* 15698 */ MCD_OPC_CheckPredicate, 0, 135, 97, // Skip to: 40669
+/* 15702 */ MCD_OPC_CheckField, 21, 1, 1, 129, 97, // Skip to: 40669
+/* 15708 */ MCD_OPC_Decode, 207, 9, 109, // Opcode: SABAv4i16
+/* 15712 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15730
+/* 15716 */ MCD_OPC_CheckPredicate, 0, 117, 97, // Skip to: 40669
+/* 15720 */ MCD_OPC_CheckField, 21, 1, 1, 111, 97, // Skip to: 40669
+/* 15726 */ MCD_OPC_Decode, 241, 15, 109, // Opcode: UABAv4i16
+/* 15730 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15748
+/* 15734 */ MCD_OPC_CheckPredicate, 0, 99, 97, // Skip to: 40669
+/* 15738 */ MCD_OPC_CheckField, 21, 1, 1, 93, 97, // Skip to: 40669
+/* 15744 */ MCD_OPC_Decode, 209, 9, 120, // Opcode: SABAv8i16
+/* 15748 */ MCD_OPC_FilterValue, 3, 85, 97, // Skip to: 40669
+/* 15752 */ MCD_OPC_CheckPredicate, 0, 81, 97, // Skip to: 40669
+/* 15756 */ MCD_OPC_CheckField, 21, 1, 1, 75, 97, // Skip to: 40669
+/* 15762 */ MCD_OPC_Decode, 243, 15, 120, // Opcode: UABAv8i16
+/* 15766 */ MCD_OPC_FilterValue, 32, 75, 0, // Skip to: 15845
+/* 15770 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 15773 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15791
+/* 15777 */ MCD_OPC_CheckPredicate, 0, 56, 97, // Skip to: 40669
+/* 15781 */ MCD_OPC_CheckField, 21, 1, 1, 50, 97, // Skip to: 40669
+/* 15787 */ MCD_OPC_Decode, 242, 10, 105, // Opcode: SMLALv4i16_v4i32
+/* 15791 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15809
+/* 15795 */ MCD_OPC_CheckPredicate, 0, 38, 97, // Skip to: 40669
+/* 15799 */ MCD_OPC_CheckField, 21, 1, 1, 32, 97, // Skip to: 40669
+/* 15805 */ MCD_OPC_Decode, 233, 16, 105, // Opcode: UMLALv4i16_v4i32
+/* 15809 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 15827
+/* 15813 */ MCD_OPC_CheckPredicate, 0, 20, 97, // Skip to: 40669
+/* 15817 */ MCD_OPC_CheckField, 21, 1, 1, 14, 97, // Skip to: 40669
+/* 15823 */ MCD_OPC_Decode, 246, 10, 120, // Opcode: SMLALv8i16_v4i32
+/* 15827 */ MCD_OPC_FilterValue, 3, 6, 97, // Skip to: 40669
+/* 15831 */ MCD_OPC_CheckPredicate, 0, 2, 97, // Skip to: 40669
+/* 15835 */ MCD_OPC_CheckField, 21, 1, 1, 252, 96, // Skip to: 40669
+/* 15841 */ MCD_OPC_Decode, 237, 16, 120, // Opcode: UMLALv8i16_v4i32
+/* 15845 */ MCD_OPC_FilterValue, 33, 73, 0, // Skip to: 15922
+/* 15849 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 15852 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 15869
+/* 15856 */ MCD_OPC_CheckPredicate, 0, 233, 96, // Skip to: 40669
+/* 15860 */ MCD_OPC_CheckField, 21, 1, 1, 227, 96, // Skip to: 40669
+/* 15866 */ MCD_OPC_Decode, 73, 89, // Opcode: ADDv4i16
+/* 15869 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15887
+/* 15873 */ MCD_OPC_CheckPredicate, 0, 216, 96, // Skip to: 40669
+/* 15877 */ MCD_OPC_CheckField, 21, 1, 1, 210, 96, // Skip to: 40669
+/* 15883 */ MCD_OPC_Decode, 177, 15, 89, // Opcode: SUBv4i16
+/* 15887 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 15904
+/* 15891 */ MCD_OPC_CheckPredicate, 0, 198, 96, // Skip to: 40669
+/* 15895 */ MCD_OPC_CheckField, 21, 1, 1, 192, 96, // Skip to: 40669
+/* 15901 */ MCD_OPC_Decode, 75, 112, // Opcode: ADDv8i16
+/* 15904 */ MCD_OPC_FilterValue, 3, 185, 96, // Skip to: 40669
+/* 15908 */ MCD_OPC_CheckPredicate, 0, 181, 96, // Skip to: 40669
+/* 15912 */ MCD_OPC_CheckField, 21, 1, 1, 175, 96, // Skip to: 40669
+/* 15918 */ MCD_OPC_Decode, 179, 15, 112, // Opcode: SUBv8i16
+/* 15922 */ MCD_OPC_FilterValue, 34, 101, 0, // Skip to: 16027
+/* 15926 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 15929 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 15947
+/* 15933 */ MCD_OPC_CheckPredicate, 0, 156, 96, // Skip to: 40669
+/* 15937 */ MCD_OPC_CheckField, 16, 6, 32, 150, 96, // Skip to: 40669
+/* 15943 */ MCD_OPC_Decode, 199, 1, 90, // Opcode: CMGTv4i16rz
+/* 15947 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 15965
+/* 15951 */ MCD_OPC_CheckPredicate, 0, 138, 96, // Skip to: 40669
+/* 15955 */ MCD_OPC_CheckField, 16, 6, 32, 132, 96, // Skip to: 40669
+/* 15961 */ MCD_OPC_Decode, 183, 1, 90, // Opcode: CMGEv4i16rz
+/* 15965 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 15996
+/* 15969 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 15972 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 15984
+/* 15976 */ MCD_OPC_CheckPredicate, 0, 113, 96, // Skip to: 40669
+/* 15980 */ MCD_OPC_Decode, 203, 1, 117, // Opcode: CMGTv8i16rz
+/* 15984 */ MCD_OPC_FilterValue, 33, 105, 96, // Skip to: 40669
+/* 15988 */ MCD_OPC_CheckPredicate, 0, 101, 96, // Skip to: 40669
+/* 15992 */ MCD_OPC_Decode, 168, 5, 117, // Opcode: FRINTNv2f64
+/* 15996 */ MCD_OPC_FilterValue, 3, 93, 96, // Skip to: 40669
+/* 16000 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 16003 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 16015
+/* 16007 */ MCD_OPC_CheckPredicate, 0, 82, 96, // Skip to: 40669
+/* 16011 */ MCD_OPC_Decode, 187, 1, 117, // Opcode: CMGEv8i16rz
+/* 16015 */ MCD_OPC_FilterValue, 33, 74, 96, // Skip to: 40669
+/* 16019 */ MCD_OPC_CheckPredicate, 0, 70, 96, // Skip to: 40669
+/* 16023 */ MCD_OPC_Decode, 153, 5, 117, // Opcode: FRINTAv2f64
+/* 16027 */ MCD_OPC_FilterValue, 35, 75, 0, // Skip to: 16106
+/* 16031 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16034 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16052
+/* 16038 */ MCD_OPC_CheckPredicate, 0, 51, 96, // Skip to: 40669
+/* 16042 */ MCD_OPC_CheckField, 21, 1, 1, 45, 96, // Skip to: 40669
+/* 16048 */ MCD_OPC_Decode, 242, 1, 89, // Opcode: CMTSTv4i16
+/* 16052 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16070
+/* 16056 */ MCD_OPC_CheckPredicate, 0, 33, 96, // Skip to: 40669
+/* 16060 */ MCD_OPC_CheckField, 21, 1, 1, 27, 96, // Skip to: 40669
+/* 16066 */ MCD_OPC_Decode, 166, 1, 89, // Opcode: CMEQv4i16
+/* 16070 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16088
+/* 16074 */ MCD_OPC_CheckPredicate, 0, 15, 96, // Skip to: 40669
+/* 16078 */ MCD_OPC_CheckField, 21, 1, 1, 9, 96, // Skip to: 40669
+/* 16084 */ MCD_OPC_Decode, 244, 1, 112, // Opcode: CMTSTv8i16
+/* 16088 */ MCD_OPC_FilterValue, 3, 1, 96, // Skip to: 40669
+/* 16092 */ MCD_OPC_CheckPredicate, 0, 253, 95, // Skip to: 40669
+/* 16096 */ MCD_OPC_CheckField, 21, 1, 1, 247, 95, // Skip to: 40669
+/* 16102 */ MCD_OPC_Decode, 170, 1, 112, // Opcode: CMEQv8i16
+/* 16106 */ MCD_OPC_FilterValue, 36, 39, 0, // Skip to: 16149
+/* 16110 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16113 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16131
+/* 16117 */ MCD_OPC_CheckPredicate, 0, 228, 95, // Skip to: 40669
+/* 16121 */ MCD_OPC_CheckField, 21, 1, 1, 222, 95, // Skip to: 40669
+/* 16127 */ MCD_OPC_Decode, 176, 11, 105, // Opcode: SQDMLALv4i16_v4i32
+/* 16131 */ MCD_OPC_FilterValue, 2, 214, 95, // Skip to: 40669
+/* 16135 */ MCD_OPC_CheckPredicate, 0, 210, 95, // Skip to: 40669
+/* 16139 */ MCD_OPC_CheckField, 21, 1, 1, 204, 95, // Skip to: 40669
+/* 16145 */ MCD_OPC_Decode, 180, 11, 120, // Opcode: SQDMLALv8i16_v4i32
+/* 16149 */ MCD_OPC_FilterValue, 37, 75, 0, // Skip to: 16228
+/* 16153 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16156 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16174
+/* 16160 */ MCD_OPC_CheckPredicate, 0, 185, 95, // Skip to: 40669
+/* 16164 */ MCD_OPC_CheckField, 21, 1, 1, 179, 95, // Skip to: 40669
+/* 16170 */ MCD_OPC_Decode, 183, 8, 109, // Opcode: MLAv4i16
+/* 16174 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16192
+/* 16178 */ MCD_OPC_CheckPredicate, 0, 167, 95, // Skip to: 40669
+/* 16182 */ MCD_OPC_CheckField, 21, 1, 1, 161, 95, // Skip to: 40669
+/* 16188 */ MCD_OPC_Decode, 193, 8, 109, // Opcode: MLSv4i16
+/* 16192 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16210
+/* 16196 */ MCD_OPC_CheckPredicate, 0, 149, 95, // Skip to: 40669
+/* 16200 */ MCD_OPC_CheckField, 21, 1, 1, 143, 95, // Skip to: 40669
+/* 16206 */ MCD_OPC_Decode, 187, 8, 120, // Opcode: MLAv8i16
+/* 16210 */ MCD_OPC_FilterValue, 3, 135, 95, // Skip to: 40669
+/* 16214 */ MCD_OPC_CheckPredicate, 0, 131, 95, // Skip to: 40669
+/* 16218 */ MCD_OPC_CheckField, 21, 1, 1, 125, 95, // Skip to: 40669
+/* 16224 */ MCD_OPC_Decode, 197, 8, 120, // Opcode: MLSv8i16
+/* 16228 */ MCD_OPC_FilterValue, 38, 101, 0, // Skip to: 16333
+/* 16232 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16235 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16253
+/* 16239 */ MCD_OPC_CheckPredicate, 0, 106, 95, // Skip to: 40669
+/* 16243 */ MCD_OPC_CheckField, 16, 6, 32, 100, 95, // Skip to: 40669
+/* 16249 */ MCD_OPC_Decode, 167, 1, 90, // Opcode: CMEQv4i16rz
+/* 16253 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16271
+/* 16257 */ MCD_OPC_CheckPredicate, 0, 88, 95, // Skip to: 40669
+/* 16261 */ MCD_OPC_CheckField, 16, 6, 32, 82, 95, // Skip to: 40669
+/* 16267 */ MCD_OPC_Decode, 226, 1, 90, // Opcode: CMLEv4i16rz
+/* 16271 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 16302
+/* 16275 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 16278 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 16290
+/* 16282 */ MCD_OPC_CheckPredicate, 0, 63, 95, // Skip to: 40669
+/* 16286 */ MCD_OPC_Decode, 171, 1, 117, // Opcode: CMEQv8i16rz
+/* 16290 */ MCD_OPC_FilterValue, 33, 55, 95, // Skip to: 40669
+/* 16294 */ MCD_OPC_CheckPredicate, 0, 51, 95, // Skip to: 40669
+/* 16298 */ MCD_OPC_Decode, 163, 5, 117, // Opcode: FRINTMv2f64
+/* 16302 */ MCD_OPC_FilterValue, 3, 43, 95, // Skip to: 40669
+/* 16306 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 16309 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 16321
+/* 16313 */ MCD_OPC_CheckPredicate, 0, 32, 95, // Skip to: 40669
+/* 16317 */ MCD_OPC_Decode, 228, 1, 117, // Opcode: CMLEv8i16rz
+/* 16321 */ MCD_OPC_FilterValue, 33, 24, 95, // Skip to: 40669
+/* 16325 */ MCD_OPC_CheckPredicate, 0, 20, 95, // Skip to: 40669
+/* 16329 */ MCD_OPC_Decode, 178, 5, 117, // Opcode: FRINTXv2f64
+/* 16333 */ MCD_OPC_FilterValue, 39, 39, 0, // Skip to: 16376
+/* 16337 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16340 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16358
+/* 16344 */ MCD_OPC_CheckPredicate, 0, 1, 95, // Skip to: 40669
+/* 16348 */ MCD_OPC_CheckField, 21, 1, 1, 251, 94, // Skip to: 40669
+/* 16354 */ MCD_OPC_Decode, 232, 8, 89, // Opcode: MULv4i16
+/* 16358 */ MCD_OPC_FilterValue, 2, 243, 94, // Skip to: 40669
+/* 16362 */ MCD_OPC_CheckPredicate, 0, 239, 94, // Skip to: 40669
+/* 16366 */ MCD_OPC_CheckField, 21, 1, 1, 233, 94, // Skip to: 40669
+/* 16372 */ MCD_OPC_Decode, 236, 8, 112, // Opcode: MULv8i16
+/* 16376 */ MCD_OPC_FilterValue, 40, 75, 0, // Skip to: 16455
+/* 16380 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16383 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16401
+/* 16387 */ MCD_OPC_CheckPredicate, 0, 214, 94, // Skip to: 40669
+/* 16391 */ MCD_OPC_CheckField, 21, 1, 1, 208, 94, // Skip to: 40669
+/* 16397 */ MCD_OPC_Decode, 252, 10, 105, // Opcode: SMLSLv4i16_v4i32
+/* 16401 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16419
+/* 16405 */ MCD_OPC_CheckPredicate, 0, 196, 94, // Skip to: 40669
+/* 16409 */ MCD_OPC_CheckField, 21, 1, 1, 190, 94, // Skip to: 40669
+/* 16415 */ MCD_OPC_Decode, 243, 16, 105, // Opcode: UMLSLv4i16_v4i32
+/* 16419 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16437
+/* 16423 */ MCD_OPC_CheckPredicate, 0, 178, 94, // Skip to: 40669
+/* 16427 */ MCD_OPC_CheckField, 21, 1, 1, 172, 94, // Skip to: 40669
+/* 16433 */ MCD_OPC_Decode, 128, 11, 120, // Opcode: SMLSLv8i16_v4i32
+/* 16437 */ MCD_OPC_FilterValue, 3, 164, 94, // Skip to: 40669
+/* 16441 */ MCD_OPC_CheckPredicate, 0, 160, 94, // Skip to: 40669
+/* 16445 */ MCD_OPC_CheckField, 21, 1, 1, 154, 94, // Skip to: 40669
+/* 16451 */ MCD_OPC_Decode, 247, 16, 120, // Opcode: UMLSLv8i16_v4i32
+/* 16455 */ MCD_OPC_FilterValue, 41, 75, 0, // Skip to: 16534
+/* 16459 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16462 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16480
+/* 16466 */ MCD_OPC_CheckPredicate, 0, 135, 94, // Skip to: 40669
+/* 16470 */ MCD_OPC_CheckField, 21, 1, 1, 129, 94, // Skip to: 40669
+/* 16476 */ MCD_OPC_Decode, 205, 10, 89, // Opcode: SMAXPv4i16
+/* 16480 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16498
+/* 16484 */ MCD_OPC_CheckPredicate, 0, 117, 94, // Skip to: 40669
+/* 16488 */ MCD_OPC_CheckField, 21, 1, 1, 111, 94, // Skip to: 40669
+/* 16494 */ MCD_OPC_Decode, 197, 16, 89, // Opcode: UMAXPv4i16
+/* 16498 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16516
+/* 16502 */ MCD_OPC_CheckPredicate, 0, 99, 94, // Skip to: 40669
+/* 16506 */ MCD_OPC_CheckField, 21, 1, 1, 93, 94, // Skip to: 40669
+/* 16512 */ MCD_OPC_Decode, 207, 10, 112, // Opcode: SMAXPv8i16
+/* 16516 */ MCD_OPC_FilterValue, 3, 85, 94, // Skip to: 40669
+/* 16520 */ MCD_OPC_CheckPredicate, 0, 81, 94, // Skip to: 40669
+/* 16524 */ MCD_OPC_CheckField, 21, 1, 1, 75, 94, // Skip to: 40669
+/* 16530 */ MCD_OPC_Decode, 199, 16, 112, // Opcode: UMAXPv8i16
+/* 16534 */ MCD_OPC_FilterValue, 42, 179, 0, // Skip to: 16717
+/* 16538 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 16541 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 16572
+/* 16545 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16548 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16560
+/* 16552 */ MCD_OPC_CheckPredicate, 0, 49, 94, // Skip to: 40669
+/* 16556 */ MCD_OPC_Decode, 234, 1, 90, // Opcode: CMLTv4i16rz
+/* 16560 */ MCD_OPC_FilterValue, 2, 41, 94, // Skip to: 40669
+/* 16564 */ MCD_OPC_CheckPredicate, 0, 37, 94, // Skip to: 40669
+/* 16568 */ MCD_OPC_Decode, 236, 1, 117, // Opcode: CMLTv8i16rz
+/* 16572 */ MCD_OPC_FilterValue, 33, 27, 0, // Skip to: 16603
+/* 16576 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16579 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 16591
+/* 16583 */ MCD_OPC_CheckPredicate, 0, 18, 94, // Skip to: 40669
+/* 16587 */ MCD_OPC_Decode, 185, 3, 117, // Opcode: FCVTNSv2f64
+/* 16591 */ MCD_OPC_FilterValue, 3, 10, 94, // Skip to: 40669
+/* 16595 */ MCD_OPC_CheckPredicate, 0, 6, 94, // Skip to: 40669
+/* 16599 */ MCD_OPC_Decode, 194, 3, 117, // Opcode: FCVTNUv2f64
+/* 16603 */ MCD_OPC_FilterValue, 48, 53, 0, // Skip to: 16660
+/* 16607 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16610 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16622
+/* 16614 */ MCD_OPC_CheckPredicate, 0, 243, 93, // Skip to: 40669
+/* 16618 */ MCD_OPC_Decode, 210, 10, 100, // Opcode: SMAXVv4i16v
+/* 16622 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 16634
+/* 16626 */ MCD_OPC_CheckPredicate, 0, 231, 93, // Skip to: 40669
+/* 16630 */ MCD_OPC_Decode, 202, 16, 100, // Opcode: UMAXVv4i16v
+/* 16634 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 16647
+/* 16638 */ MCD_OPC_CheckPredicate, 0, 219, 93, // Skip to: 40669
+/* 16642 */ MCD_OPC_Decode, 212, 10, 131, 1, // Opcode: SMAXVv8i16v
+/* 16647 */ MCD_OPC_FilterValue, 3, 210, 93, // Skip to: 40669
+/* 16651 */ MCD_OPC_CheckPredicate, 0, 206, 93, // Skip to: 40669
+/* 16655 */ MCD_OPC_Decode, 204, 16, 131, 1, // Opcode: UMAXVv8i16v
+/* 16660 */ MCD_OPC_FilterValue, 49, 197, 93, // Skip to: 40669
+/* 16664 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16667 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 16679
+/* 16671 */ MCD_OPC_CheckPredicate, 0, 186, 93, // Skip to: 40669
+/* 16675 */ MCD_OPC_Decode, 228, 10, 100, // Opcode: SMINVv4i16v
+/* 16679 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 16691
+/* 16683 */ MCD_OPC_CheckPredicate, 0, 174, 93, // Skip to: 40669
+/* 16687 */ MCD_OPC_Decode, 219, 16, 100, // Opcode: UMINVv4i16v
+/* 16691 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 16704
+/* 16695 */ MCD_OPC_CheckPredicate, 0, 162, 93, // Skip to: 40669
+/* 16699 */ MCD_OPC_Decode, 230, 10, 131, 1, // Opcode: SMINVv8i16v
+/* 16704 */ MCD_OPC_FilterValue, 3, 153, 93, // Skip to: 40669
+/* 16708 */ MCD_OPC_CheckPredicate, 0, 149, 93, // Skip to: 40669
+/* 16712 */ MCD_OPC_Decode, 221, 16, 131, 1, // Opcode: UMINVv8i16v
+/* 16717 */ MCD_OPC_FilterValue, 43, 75, 0, // Skip to: 16796
+/* 16721 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16724 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16742
+/* 16728 */ MCD_OPC_CheckPredicate, 0, 129, 93, // Skip to: 40669
+/* 16732 */ MCD_OPC_CheckField, 21, 1, 1, 123, 93, // Skip to: 40669
+/* 16738 */ MCD_OPC_Decode, 223, 10, 89, // Opcode: SMINPv4i16
+/* 16742 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16760
+/* 16746 */ MCD_OPC_CheckPredicate, 0, 111, 93, // Skip to: 40669
+/* 16750 */ MCD_OPC_CheckField, 21, 1, 1, 105, 93, // Skip to: 40669
+/* 16756 */ MCD_OPC_Decode, 214, 16, 89, // Opcode: UMINPv4i16
+/* 16760 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16778
+/* 16764 */ MCD_OPC_CheckPredicate, 0, 93, 93, // Skip to: 40669
+/* 16768 */ MCD_OPC_CheckField, 21, 1, 1, 87, 93, // Skip to: 40669
+/* 16774 */ MCD_OPC_Decode, 225, 10, 112, // Opcode: SMINPv8i16
+/* 16778 */ MCD_OPC_FilterValue, 3, 79, 93, // Skip to: 40669
+/* 16782 */ MCD_OPC_CheckPredicate, 0, 75, 93, // Skip to: 40669
+/* 16786 */ MCD_OPC_CheckField, 21, 1, 1, 69, 93, // Skip to: 40669
+/* 16792 */ MCD_OPC_Decode, 216, 16, 112, // Opcode: UMINPv8i16
+/* 16796 */ MCD_OPC_FilterValue, 44, 39, 0, // Skip to: 16839
+/* 16800 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16803 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16821
+/* 16807 */ MCD_OPC_CheckPredicate, 0, 50, 93, // Skip to: 40669
+/* 16811 */ MCD_OPC_CheckField, 21, 1, 1, 44, 93, // Skip to: 40669
+/* 16817 */ MCD_OPC_Decode, 188, 11, 105, // Opcode: SQDMLSLv4i16_v4i32
+/* 16821 */ MCD_OPC_FilterValue, 2, 36, 93, // Skip to: 40669
+/* 16825 */ MCD_OPC_CheckPredicate, 0, 32, 93, // Skip to: 40669
+/* 16829 */ MCD_OPC_CheckField, 21, 1, 1, 26, 93, // Skip to: 40669
+/* 16835 */ MCD_OPC_Decode, 192, 11, 120, // Opcode: SQDMLSLv8i16_v4i32
+/* 16839 */ MCD_OPC_FilterValue, 45, 75, 0, // Skip to: 16918
+/* 16843 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16846 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 16864
+/* 16850 */ MCD_OPC_CheckPredicate, 0, 7, 93, // Skip to: 40669
+/* 16854 */ MCD_OPC_CheckField, 21, 1, 1, 1, 93, // Skip to: 40669
+/* 16860 */ MCD_OPC_Decode, 199, 11, 89, // Opcode: SQDMULHv4i16
+/* 16864 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16882
+/* 16868 */ MCD_OPC_CheckPredicate, 0, 245, 92, // Skip to: 40669
+/* 16872 */ MCD_OPC_CheckField, 21, 1, 1, 239, 92, // Skip to: 40669
+/* 16878 */ MCD_OPC_Decode, 234, 11, 89, // Opcode: SQRDMULHv4i16
+/* 16882 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 16900
+/* 16886 */ MCD_OPC_CheckPredicate, 0, 227, 92, // Skip to: 40669
+/* 16890 */ MCD_OPC_CheckField, 21, 1, 1, 221, 92, // Skip to: 40669
+/* 16896 */ MCD_OPC_Decode, 203, 11, 112, // Opcode: SQDMULHv8i16
+/* 16900 */ MCD_OPC_FilterValue, 3, 213, 92, // Skip to: 40669
+/* 16904 */ MCD_OPC_CheckPredicate, 0, 209, 92, // Skip to: 40669
+/* 16908 */ MCD_OPC_CheckField, 21, 1, 1, 203, 92, // Skip to: 40669
+/* 16914 */ MCD_OPC_Decode, 238, 11, 112, // Opcode: SQRDMULHv8i16
+/* 16918 */ MCD_OPC_FilterValue, 46, 123, 0, // Skip to: 17045
+/* 16922 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 16925 */ MCD_OPC_FilterValue, 0, 25, 0, // Skip to: 16954
+/* 16929 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 16932 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 16943
+/* 16936 */ MCD_OPC_CheckPredicate, 0, 177, 92, // Skip to: 40669
+/* 16940 */ MCD_OPC_Decode, 24, 90, // Opcode: ABSv4i16
+/* 16943 */ MCD_OPC_FilterValue, 49, 170, 92, // Skip to: 40669
+/* 16947 */ MCD_OPC_CheckPredicate, 0, 166, 92, // Skip to: 40669
+/* 16951 */ MCD_OPC_Decode, 56, 100, // Opcode: ADDVv4i16v
+/* 16954 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 16972
+/* 16958 */ MCD_OPC_CheckPredicate, 0, 155, 92, // Skip to: 40669
+/* 16962 */ MCD_OPC_CheckField, 16, 6, 32, 149, 92, // Skip to: 40669
+/* 16968 */ MCD_OPC_Decode, 249, 8, 90, // Opcode: NEGv4i16
+/* 16972 */ MCD_OPC_FilterValue, 2, 38, 0, // Skip to: 17014
+/* 16976 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 16979 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 16990
+/* 16983 */ MCD_OPC_CheckPredicate, 0, 130, 92, // Skip to: 40669
+/* 16987 */ MCD_OPC_Decode, 26, 117, // Opcode: ABSv8i16
+/* 16990 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 17002
+/* 16994 */ MCD_OPC_CheckPredicate, 0, 119, 92, // Skip to: 40669
+/* 16998 */ MCD_OPC_Decode, 167, 3, 117, // Opcode: FCVTMSv2f64
+/* 17002 */ MCD_OPC_FilterValue, 49, 111, 92, // Skip to: 40669
+/* 17006 */ MCD_OPC_CheckPredicate, 0, 107, 92, // Skip to: 40669
+/* 17010 */ MCD_OPC_Decode, 58, 131, 1, // Opcode: ADDVv8i16v
+/* 17014 */ MCD_OPC_FilterValue, 3, 99, 92, // Skip to: 40669
+/* 17018 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 17021 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 17033
+/* 17025 */ MCD_OPC_CheckPredicate, 0, 88, 92, // Skip to: 40669
+/* 17029 */ MCD_OPC_Decode, 251, 8, 117, // Opcode: NEGv8i16
+/* 17033 */ MCD_OPC_FilterValue, 33, 80, 92, // Skip to: 40669
+/* 17037 */ MCD_OPC_CheckPredicate, 0, 76, 92, // Skip to: 40669
+/* 17041 */ MCD_OPC_Decode, 176, 3, 117, // Opcode: FCVTMUv2f64
+/* 17045 */ MCD_OPC_FilterValue, 47, 37, 0, // Skip to: 17086
+/* 17049 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17052 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 17069
+/* 17056 */ MCD_OPC_CheckPredicate, 0, 57, 92, // Skip to: 40669
+/* 17060 */ MCD_OPC_CheckField, 21, 1, 1, 51, 92, // Skip to: 40669
+/* 17066 */ MCD_OPC_Decode, 42, 89, // Opcode: ADDPv4i16
+/* 17069 */ MCD_OPC_FilterValue, 2, 44, 92, // Skip to: 40669
+/* 17073 */ MCD_OPC_CheckPredicate, 0, 40, 92, // Skip to: 40669
+/* 17077 */ MCD_OPC_CheckField, 21, 1, 1, 34, 92, // Skip to: 40669
+/* 17083 */ MCD_OPC_Decode, 44, 112, // Opcode: ADDPv8i16
+/* 17086 */ MCD_OPC_FilterValue, 48, 75, 0, // Skip to: 17165
+/* 17090 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17093 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17111
+/* 17097 */ MCD_OPC_CheckPredicate, 0, 16, 92, // Skip to: 40669
+/* 17101 */ MCD_OPC_CheckField, 21, 1, 1, 10, 92, // Skip to: 40669
+/* 17107 */ MCD_OPC_Decode, 141, 11, 85, // Opcode: SMULLv4i16_v4i32
+/* 17111 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17129
+/* 17115 */ MCD_OPC_CheckPredicate, 0, 254, 91, // Skip to: 40669
+/* 17119 */ MCD_OPC_CheckField, 21, 1, 1, 248, 91, // Skip to: 40669
+/* 17125 */ MCD_OPC_Decode, 131, 17, 85, // Opcode: UMULLv4i16_v4i32
+/* 17129 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17147
+/* 17133 */ MCD_OPC_CheckPredicate, 0, 236, 91, // Skip to: 40669
+/* 17137 */ MCD_OPC_CheckField, 21, 1, 1, 230, 91, // Skip to: 40669
+/* 17143 */ MCD_OPC_Decode, 145, 11, 112, // Opcode: SMULLv8i16_v4i32
+/* 17147 */ MCD_OPC_FilterValue, 3, 222, 91, // Skip to: 40669
+/* 17151 */ MCD_OPC_CheckPredicate, 0, 218, 91, // Skip to: 40669
+/* 17155 */ MCD_OPC_CheckField, 21, 1, 1, 212, 91, // Skip to: 40669
+/* 17161 */ MCD_OPC_Decode, 135, 17, 112, // Opcode: UMULLv8i16_v4i32
+/* 17165 */ MCD_OPC_FilterValue, 49, 39, 0, // Skip to: 17208
+/* 17169 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17172 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17190
+/* 17176 */ MCD_OPC_CheckPredicate, 0, 193, 91, // Skip to: 40669
+/* 17180 */ MCD_OPC_CheckField, 21, 1, 1, 187, 91, // Skip to: 40669
+/* 17186 */ MCD_OPC_Decode, 170, 4, 112, // Opcode: FMAXNMv2f64
+/* 17190 */ MCD_OPC_FilterValue, 3, 179, 91, // Skip to: 40669
+/* 17194 */ MCD_OPC_CheckPredicate, 0, 175, 91, // Skip to: 40669
+/* 17198 */ MCD_OPC_CheckField, 21, 1, 1, 169, 91, // Skip to: 40669
+/* 17204 */ MCD_OPC_Decode, 163, 4, 112, // Opcode: FMAXNMPv2f64
+/* 17208 */ MCD_OPC_FilterValue, 50, 39, 0, // Skip to: 17251
+/* 17212 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17215 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17233
+/* 17219 */ MCD_OPC_CheckPredicate, 0, 150, 91, // Skip to: 40669
+/* 17223 */ MCD_OPC_CheckField, 16, 6, 33, 144, 91, // Skip to: 40669
+/* 17229 */ MCD_OPC_Decode, 141, 3, 117, // Opcode: FCVTASv2f64
+/* 17233 */ MCD_OPC_FilterValue, 3, 136, 91, // Skip to: 40669
+/* 17237 */ MCD_OPC_CheckPredicate, 0, 132, 91, // Skip to: 40669
+/* 17241 */ MCD_OPC_CheckField, 16, 6, 33, 126, 91, // Skip to: 40669
+/* 17247 */ MCD_OPC_Decode, 150, 3, 117, // Opcode: FCVTAUv2f64
+/* 17251 */ MCD_OPC_FilterValue, 51, 20, 0, // Skip to: 17275
+/* 17255 */ MCD_OPC_CheckPredicate, 0, 114, 91, // Skip to: 40669
+/* 17259 */ MCD_OPC_CheckField, 29, 3, 2, 108, 91, // Skip to: 40669
+/* 17265 */ MCD_OPC_CheckField, 21, 1, 1, 102, 91, // Skip to: 40669
+/* 17271 */ MCD_OPC_Decode, 207, 4, 120, // Opcode: FMLAv2f64
+/* 17275 */ MCD_OPC_FilterValue, 52, 39, 0, // Skip to: 17318
+/* 17279 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17282 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17300
+/* 17286 */ MCD_OPC_CheckPredicate, 0, 83, 91, // Skip to: 40669
+/* 17290 */ MCD_OPC_CheckField, 21, 1, 1, 77, 91, // Skip to: 40669
+/* 17296 */ MCD_OPC_Decode, 212, 11, 85, // Opcode: SQDMULLv4i16_v4i32
+/* 17300 */ MCD_OPC_FilterValue, 2, 69, 91, // Skip to: 40669
+/* 17304 */ MCD_OPC_CheckPredicate, 0, 65, 91, // Skip to: 40669
+/* 17308 */ MCD_OPC_CheckField, 21, 1, 1, 59, 91, // Skip to: 40669
+/* 17314 */ MCD_OPC_Decode, 216, 11, 112, // Opcode: SQDMULLv8i16_v4i32
+/* 17318 */ MCD_OPC_FilterValue, 53, 39, 0, // Skip to: 17361
+/* 17322 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17325 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17343
+/* 17329 */ MCD_OPC_CheckPredicate, 0, 40, 91, // Skip to: 40669
+/* 17333 */ MCD_OPC_CheckField, 21, 1, 1, 34, 91, // Skip to: 40669
+/* 17339 */ MCD_OPC_Decode, 206, 2, 112, // Opcode: FADDv2f64
+/* 17343 */ MCD_OPC_FilterValue, 3, 26, 91, // Skip to: 40669
+/* 17347 */ MCD_OPC_CheckPredicate, 0, 22, 91, // Skip to: 40669
+/* 17351 */ MCD_OPC_CheckField, 21, 1, 1, 16, 91, // Skip to: 40669
+/* 17357 */ MCD_OPC_Decode, 200, 2, 112, // Opcode: FADDPv2f64
+/* 17361 */ MCD_OPC_FilterValue, 54, 39, 0, // Skip to: 17404
+/* 17365 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17368 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17386
+/* 17372 */ MCD_OPC_CheckPredicate, 0, 253, 90, // Skip to: 40669
+/* 17376 */ MCD_OPC_CheckField, 16, 6, 33, 247, 90, // Skip to: 40669
+/* 17382 */ MCD_OPC_Decode, 143, 10, 117, // Opcode: SCVTFv2f64
+/* 17386 */ MCD_OPC_FilterValue, 3, 239, 90, // Skip to: 40669
+/* 17390 */ MCD_OPC_CheckPredicate, 0, 235, 90, // Skip to: 40669
+/* 17394 */ MCD_OPC_CheckField, 16, 6, 33, 229, 90, // Skip to: 40669
+/* 17400 */ MCD_OPC_Decode, 173, 16, 117, // Opcode: UCVTFv2f64
+/* 17404 */ MCD_OPC_FilterValue, 55, 39, 0, // Skip to: 17447
+/* 17408 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17411 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17429
+/* 17415 */ MCD_OPC_CheckPredicate, 0, 210, 90, // Skip to: 40669
+/* 17419 */ MCD_OPC_CheckField, 21, 1, 1, 204, 90, // Skip to: 40669
+/* 17425 */ MCD_OPC_Decode, 242, 4, 112, // Opcode: FMULXv2f64
+/* 17429 */ MCD_OPC_FilterValue, 3, 196, 90, // Skip to: 40669
+/* 17433 */ MCD_OPC_CheckPredicate, 0, 192, 90, // Skip to: 40669
+/* 17437 */ MCD_OPC_CheckField, 21, 1, 1, 186, 90, // Skip to: 40669
+/* 17443 */ MCD_OPC_Decode, 250, 4, 112, // Opcode: FMULv2f64
+/* 17447 */ MCD_OPC_FilterValue, 57, 39, 0, // Skip to: 17490
+/* 17451 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17454 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17472
+/* 17458 */ MCD_OPC_CheckPredicate, 0, 167, 90, // Skip to: 40669
+/* 17462 */ MCD_OPC_CheckField, 21, 1, 1, 161, 90, // Skip to: 40669
+/* 17468 */ MCD_OPC_Decode, 217, 2, 112, // Opcode: FCMEQv2f64
+/* 17472 */ MCD_OPC_FilterValue, 3, 153, 90, // Skip to: 40669
+/* 17476 */ MCD_OPC_CheckPredicate, 0, 149, 90, // Skip to: 40669
+/* 17480 */ MCD_OPC_CheckField, 21, 1, 1, 143, 90, // Skip to: 40669
+/* 17486 */ MCD_OPC_Decode, 227, 2, 112, // Opcode: FCMGEv2f64
+/* 17490 */ MCD_OPC_FilterValue, 59, 20, 0, // Skip to: 17514
+/* 17494 */ MCD_OPC_CheckPredicate, 0, 131, 90, // Skip to: 40669
+/* 17498 */ MCD_OPC_CheckField, 29, 3, 3, 125, 90, // Skip to: 40669
+/* 17504 */ MCD_OPC_CheckField, 21, 1, 1, 119, 90, // Skip to: 40669
+/* 17510 */ MCD_OPC_Decode, 191, 2, 112, // Opcode: FACGEv2f64
+/* 17514 */ MCD_OPC_FilterValue, 61, 39, 0, // Skip to: 17557
+/* 17518 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17521 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17539
+/* 17525 */ MCD_OPC_CheckPredicate, 0, 100, 90, // Skip to: 40669
+/* 17529 */ MCD_OPC_CheckField, 21, 1, 1, 94, 90, // Skip to: 40669
+/* 17535 */ MCD_OPC_Decode, 180, 4, 112, // Opcode: FMAXv2f64
+/* 17539 */ MCD_OPC_FilterValue, 3, 86, 90, // Skip to: 40669
+/* 17543 */ MCD_OPC_CheckPredicate, 0, 82, 90, // Skip to: 40669
+/* 17547 */ MCD_OPC_CheckField, 21, 1, 1, 76, 90, // Skip to: 40669
+/* 17553 */ MCD_OPC_Decode, 173, 4, 112, // Opcode: FMAXPv2f64
+/* 17557 */ MCD_OPC_FilterValue, 63, 68, 90, // Skip to: 40669
+/* 17561 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17564 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17582
+/* 17568 */ MCD_OPC_CheckPredicate, 0, 57, 90, // Skip to: 40669
+/* 17572 */ MCD_OPC_CheckField, 21, 1, 1, 51, 90, // Skip to: 40669
+/* 17578 */ MCD_OPC_Decode, 146, 5, 112, // Opcode: FRECPSv2f64
+/* 17582 */ MCD_OPC_FilterValue, 3, 43, 90, // Skip to: 40669
+/* 17586 */ MCD_OPC_CheckPredicate, 0, 39, 90, // Skip to: 40669
+/* 17590 */ MCD_OPC_CheckField, 21, 1, 1, 33, 90, // Skip to: 40669
+/* 17596 */ MCD_OPC_Decode, 156, 4, 112, // Opcode: FDIVv2f64
+/* 17600 */ MCD_OPC_FilterValue, 10, 165, 19, // Skip to: 22633
+/* 17604 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 17607 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 17686
+/* 17611 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17614 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17632
+/* 17618 */ MCD_OPC_CheckPredicate, 0, 7, 90, // Skip to: 40669
+/* 17622 */ MCD_OPC_CheckField, 21, 1, 1, 1, 90, // Skip to: 40669
+/* 17628 */ MCD_OPC_Decode, 241, 9, 85, // Opcode: SADDLv2i32_v2i64
+/* 17632 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17650
+/* 17636 */ MCD_OPC_CheckPredicate, 0, 245, 89, // Skip to: 40669
+/* 17640 */ MCD_OPC_CheckField, 21, 1, 1, 239, 89, // Skip to: 40669
+/* 17646 */ MCD_OPC_Decode, 147, 16, 85, // Opcode: UADDLv2i32_v2i64
+/* 17650 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17668
+/* 17654 */ MCD_OPC_CheckPredicate, 0, 227, 89, // Skip to: 40669
+/* 17658 */ MCD_OPC_CheckField, 21, 1, 1, 221, 89, // Skip to: 40669
+/* 17664 */ MCD_OPC_Decode, 243, 9, 112, // Opcode: SADDLv4i32_v2i64
+/* 17668 */ MCD_OPC_FilterValue, 3, 213, 89, // Skip to: 40669
+/* 17672 */ MCD_OPC_CheckPredicate, 0, 209, 89, // Skip to: 40669
+/* 17676 */ MCD_OPC_CheckField, 21, 1, 1, 203, 89, // Skip to: 40669
+/* 17682 */ MCD_OPC_Decode, 149, 16, 112, // Opcode: UADDLv4i32_v2i64
+/* 17686 */ MCD_OPC_FilterValue, 1, 75, 0, // Skip to: 17765
+/* 17690 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17693 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17711
+/* 17697 */ MCD_OPC_CheckPredicate, 0, 184, 89, // Skip to: 40669
+/* 17701 */ MCD_OPC_CheckField, 21, 1, 1, 178, 89, // Skip to: 40669
+/* 17707 */ MCD_OPC_Decode, 163, 10, 89, // Opcode: SHADDv2i32
+/* 17711 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17729
+/* 17715 */ MCD_OPC_CheckPredicate, 0, 166, 89, // Skip to: 40669
+/* 17719 */ MCD_OPC_CheckField, 21, 1, 1, 160, 89, // Skip to: 40669
+/* 17725 */ MCD_OPC_Decode, 183, 16, 89, // Opcode: UHADDv2i32
+/* 17729 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17747
+/* 17733 */ MCD_OPC_CheckPredicate, 0, 148, 89, // Skip to: 40669
+/* 17737 */ MCD_OPC_CheckField, 21, 1, 1, 142, 89, // Skip to: 40669
+/* 17743 */ MCD_OPC_Decode, 165, 10, 112, // Opcode: SHADDv4i32
+/* 17747 */ MCD_OPC_FilterValue, 3, 134, 89, // Skip to: 40669
+/* 17751 */ MCD_OPC_CheckPredicate, 0, 130, 89, // Skip to: 40669
+/* 17755 */ MCD_OPC_CheckField, 21, 1, 1, 124, 89, // Skip to: 40669
+/* 17761 */ MCD_OPC_Decode, 185, 16, 112, // Opcode: UHADDv4i32
+/* 17765 */ MCD_OPC_FilterValue, 2, 39, 0, // Skip to: 17808
+/* 17769 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17772 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17790
+/* 17776 */ MCD_OPC_CheckPredicate, 0, 105, 89, // Skip to: 40669
+/* 17780 */ MCD_OPC_CheckField, 16, 6, 32, 99, 89, // Skip to: 40669
+/* 17786 */ MCD_OPC_Decode, 178, 9, 90, // Opcode: REV64v2i32
+/* 17790 */ MCD_OPC_FilterValue, 2, 91, 89, // Skip to: 40669
+/* 17794 */ MCD_OPC_CheckPredicate, 0, 87, 89, // Skip to: 40669
+/* 17798 */ MCD_OPC_CheckField, 16, 6, 32, 81, 89, // Skip to: 40669
+/* 17804 */ MCD_OPC_Decode, 180, 9, 117, // Opcode: REV64v4i32
+/* 17808 */ MCD_OPC_FilterValue, 3, 75, 0, // Skip to: 17887
+/* 17812 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17815 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17833
+/* 17819 */ MCD_OPC_CheckPredicate, 0, 62, 89, // Skip to: 40669
+/* 17823 */ MCD_OPC_CheckField, 21, 1, 1, 56, 89, // Skip to: 40669
+/* 17829 */ MCD_OPC_Decode, 163, 11, 89, // Opcode: SQADDv2i32
+/* 17833 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17851
+/* 17837 */ MCD_OPC_CheckPredicate, 0, 44, 89, // Skip to: 40669
+/* 17841 */ MCD_OPC_CheckField, 21, 1, 1, 38, 89, // Skip to: 40669
+/* 17847 */ MCD_OPC_Decode, 142, 17, 89, // Opcode: UQADDv2i32
+/* 17851 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17869
+/* 17855 */ MCD_OPC_CheckPredicate, 0, 26, 89, // Skip to: 40669
+/* 17859 */ MCD_OPC_CheckField, 21, 1, 1, 20, 89, // Skip to: 40669
+/* 17865 */ MCD_OPC_Decode, 166, 11, 112, // Opcode: SQADDv4i32
+/* 17869 */ MCD_OPC_FilterValue, 3, 12, 89, // Skip to: 40669
+/* 17873 */ MCD_OPC_CheckPredicate, 0, 8, 89, // Skip to: 40669
+/* 17877 */ MCD_OPC_CheckField, 21, 1, 1, 2, 89, // Skip to: 40669
+/* 17883 */ MCD_OPC_Decode, 145, 17, 112, // Opcode: UQADDv4i32
+/* 17887 */ MCD_OPC_FilterValue, 4, 75, 0, // Skip to: 17966
+/* 17891 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17894 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17912
+/* 17898 */ MCD_OPC_CheckPredicate, 0, 239, 88, // Skip to: 40669
+/* 17902 */ MCD_OPC_CheckField, 21, 1, 1, 233, 88, // Skip to: 40669
+/* 17908 */ MCD_OPC_Decode, 247, 9, 93, // Opcode: SADDWv2i32_v2i64
+/* 17912 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 17930
+/* 17916 */ MCD_OPC_CheckPredicate, 0, 221, 88, // Skip to: 40669
+/* 17920 */ MCD_OPC_CheckField, 21, 1, 1, 215, 88, // Skip to: 40669
+/* 17926 */ MCD_OPC_Decode, 153, 16, 93, // Opcode: UADDWv2i32_v2i64
+/* 17930 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 17948
+/* 17934 */ MCD_OPC_CheckPredicate, 0, 203, 88, // Skip to: 40669
+/* 17938 */ MCD_OPC_CheckField, 21, 1, 1, 197, 88, // Skip to: 40669
+/* 17944 */ MCD_OPC_Decode, 249, 9, 112, // Opcode: SADDWv4i32_v2i64
+/* 17948 */ MCD_OPC_FilterValue, 3, 189, 88, // Skip to: 40669
+/* 17952 */ MCD_OPC_CheckPredicate, 0, 185, 88, // Skip to: 40669
+/* 17956 */ MCD_OPC_CheckField, 21, 1, 1, 179, 88, // Skip to: 40669
+/* 17962 */ MCD_OPC_Decode, 155, 16, 112, // Opcode: UADDWv4i32_v2i64
+/* 17966 */ MCD_OPC_FilterValue, 5, 75, 0, // Skip to: 18045
+/* 17970 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 17973 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 17991
+/* 17977 */ MCD_OPC_CheckPredicate, 0, 160, 88, // Skip to: 40669
+/* 17981 */ MCD_OPC_CheckField, 21, 1, 1, 154, 88, // Skip to: 40669
+/* 17987 */ MCD_OPC_Decode, 222, 12, 89, // Opcode: SRHADDv2i32
+/* 17991 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18009
+/* 17995 */ MCD_OPC_CheckPredicate, 0, 142, 88, // Skip to: 40669
+/* 17999 */ MCD_OPC_CheckField, 21, 1, 1, 136, 88, // Skip to: 40669
+/* 18005 */ MCD_OPC_Decode, 222, 17, 89, // Opcode: URHADDv2i32
+/* 18009 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18027
+/* 18013 */ MCD_OPC_CheckPredicate, 0, 124, 88, // Skip to: 40669
+/* 18017 */ MCD_OPC_CheckField, 21, 1, 1, 118, 88, // Skip to: 40669
+/* 18023 */ MCD_OPC_Decode, 224, 12, 112, // Opcode: SRHADDv4i32
+/* 18027 */ MCD_OPC_FilterValue, 3, 110, 88, // Skip to: 40669
+/* 18031 */ MCD_OPC_CheckPredicate, 0, 106, 88, // Skip to: 40669
+/* 18035 */ MCD_OPC_CheckField, 21, 1, 1, 100, 88, // Skip to: 40669
+/* 18041 */ MCD_OPC_Decode, 224, 17, 112, // Opcode: URHADDv4i32
+/* 18045 */ MCD_OPC_FilterValue, 6, 39, 0, // Skip to: 18088
+/* 18049 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18052 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18070
+/* 18056 */ MCD_OPC_CheckPredicate, 0, 81, 88, // Skip to: 40669
+/* 18060 */ MCD_OPC_CheckField, 21, 1, 0, 75, 88, // Skip to: 40669
+/* 18066 */ MCD_OPC_Decode, 179, 18, 89, // Opcode: UZP1v2i32
+/* 18070 */ MCD_OPC_FilterValue, 2, 67, 88, // Skip to: 40669
+/* 18074 */ MCD_OPC_CheckPredicate, 0, 63, 88, // Skip to: 40669
+/* 18078 */ MCD_OPC_CheckField, 21, 1, 0, 57, 88, // Skip to: 40669
+/* 18084 */ MCD_OPC_Decode, 182, 18, 112, // Opcode: UZP1v4i32
+/* 18088 */ MCD_OPC_FilterValue, 7, 73, 0, // Skip to: 18165
+/* 18092 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18095 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18113
+/* 18099 */ MCD_OPC_CheckPredicate, 0, 38, 88, // Skip to: 40669
+/* 18103 */ MCD_OPC_CheckField, 21, 1, 1, 32, 88, // Skip to: 40669
+/* 18109 */ MCD_OPC_Decode, 144, 9, 89, // Opcode: ORRv8i8
+/* 18113 */ MCD_OPC_FilterValue, 1, 13, 0, // Skip to: 18130
+/* 18117 */ MCD_OPC_CheckPredicate, 0, 20, 88, // Skip to: 40669
+/* 18121 */ MCD_OPC_CheckField, 21, 1, 1, 14, 88, // Skip to: 40669
+/* 18127 */ MCD_OPC_Decode, 121, 109, // Opcode: BITv8i8
+/* 18130 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18148
+/* 18134 */ MCD_OPC_CheckPredicate, 0, 3, 88, // Skip to: 40669
+/* 18138 */ MCD_OPC_CheckField, 21, 1, 1, 253, 87, // Skip to: 40669
+/* 18144 */ MCD_OPC_Decode, 139, 9, 112, // Opcode: ORRv16i8
+/* 18148 */ MCD_OPC_FilterValue, 3, 245, 87, // Skip to: 40669
+/* 18152 */ MCD_OPC_CheckPredicate, 0, 241, 87, // Skip to: 40669
+/* 18156 */ MCD_OPC_CheckField, 21, 1, 1, 235, 87, // Skip to: 40669
+/* 18162 */ MCD_OPC_Decode, 120, 120, // Opcode: BITv16i8
+/* 18165 */ MCD_OPC_FilterValue, 8, 75, 0, // Skip to: 18244
+/* 18169 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18172 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18190
+/* 18176 */ MCD_OPC_CheckPredicate, 0, 217, 87, // Skip to: 40669
+/* 18180 */ MCD_OPC_CheckField, 21, 1, 1, 211, 87, // Skip to: 40669
+/* 18186 */ MCD_OPC_Decode, 162, 13, 85, // Opcode: SSUBLv2i32_v2i64
+/* 18190 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18208
+/* 18194 */ MCD_OPC_CheckPredicate, 0, 199, 87, // Skip to: 40669
+/* 18198 */ MCD_OPC_CheckField, 21, 1, 1, 193, 87, // Skip to: 40669
+/* 18204 */ MCD_OPC_Decode, 167, 18, 85, // Opcode: USUBLv2i32_v2i64
+/* 18208 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18226
+/* 18212 */ MCD_OPC_CheckPredicate, 0, 181, 87, // Skip to: 40669
+/* 18216 */ MCD_OPC_CheckField, 21, 1, 1, 175, 87, // Skip to: 40669
+/* 18222 */ MCD_OPC_Decode, 164, 13, 112, // Opcode: SSUBLv4i32_v2i64
+/* 18226 */ MCD_OPC_FilterValue, 3, 167, 87, // Skip to: 40669
+/* 18230 */ MCD_OPC_CheckPredicate, 0, 163, 87, // Skip to: 40669
+/* 18234 */ MCD_OPC_CheckField, 21, 1, 1, 157, 87, // Skip to: 40669
+/* 18240 */ MCD_OPC_Decode, 169, 18, 112, // Opcode: USUBLv4i32_v2i64
+/* 18244 */ MCD_OPC_FilterValue, 9, 75, 0, // Skip to: 18323
+/* 18248 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18251 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18269
+/* 18255 */ MCD_OPC_CheckPredicate, 0, 138, 87, // Skip to: 40669
+/* 18259 */ MCD_OPC_CheckField, 21, 1, 1, 132, 87, // Skip to: 40669
+/* 18265 */ MCD_OPC_Decode, 189, 10, 89, // Opcode: SHSUBv2i32
+/* 18269 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18287
+/* 18273 */ MCD_OPC_CheckPredicate, 0, 120, 87, // Skip to: 40669
+/* 18277 */ MCD_OPC_CheckField, 21, 1, 1, 114, 87, // Skip to: 40669
+/* 18283 */ MCD_OPC_Decode, 189, 16, 89, // Opcode: UHSUBv2i32
+/* 18287 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18305
+/* 18291 */ MCD_OPC_CheckPredicate, 0, 102, 87, // Skip to: 40669
+/* 18295 */ MCD_OPC_CheckField, 21, 1, 1, 96, 87, // Skip to: 40669
+/* 18301 */ MCD_OPC_Decode, 191, 10, 112, // Opcode: SHSUBv4i32
+/* 18305 */ MCD_OPC_FilterValue, 3, 88, 87, // Skip to: 40669
+/* 18309 */ MCD_OPC_CheckPredicate, 0, 84, 87, // Skip to: 40669
+/* 18313 */ MCD_OPC_CheckField, 21, 1, 1, 78, 87, // Skip to: 40669
+/* 18319 */ MCD_OPC_Decode, 191, 16, 112, // Opcode: UHSUBv4i32
+/* 18323 */ MCD_OPC_FilterValue, 10, 165, 0, // Skip to: 18492
+/* 18327 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18330 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 18380
+/* 18334 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 18337 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18349
+/* 18341 */ MCD_OPC_CheckPredicate, 0, 52, 87, // Skip to: 40669
+/* 18345 */ MCD_OPC_Decode, 220, 15, 89, // Opcode: TRN1v2i32
+/* 18349 */ MCD_OPC_FilterValue, 1, 44, 87, // Skip to: 40669
+/* 18353 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 18356 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18368
+/* 18360 */ MCD_OPC_CheckPredicate, 0, 33, 87, // Skip to: 40669
+/* 18364 */ MCD_OPC_Decode, 230, 9, 90, // Opcode: SADDLPv2i32_v1i64
+/* 18368 */ MCD_OPC_FilterValue, 1, 25, 87, // Skip to: 40669
+/* 18372 */ MCD_OPC_CheckPredicate, 0, 21, 87, // Skip to: 40669
+/* 18376 */ MCD_OPC_Decode, 193, 18, 95, // Opcode: XTNv2i32
+/* 18380 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 18411
+/* 18384 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 18387 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18399
+/* 18391 */ MCD_OPC_CheckPredicate, 0, 2, 87, // Skip to: 40669
+/* 18395 */ MCD_OPC_Decode, 136, 16, 90, // Opcode: UADDLPv2i32_v1i64
+/* 18399 */ MCD_OPC_FilterValue, 33, 250, 86, // Skip to: 40669
+/* 18403 */ MCD_OPC_CheckPredicate, 0, 246, 86, // Skip to: 40669
+/* 18407 */ MCD_OPC_Decode, 216, 12, 95, // Opcode: SQXTUNv2i32
+/* 18411 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 18461
+/* 18415 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 18418 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18430
+/* 18422 */ MCD_OPC_CheckPredicate, 0, 227, 86, // Skip to: 40669
+/* 18426 */ MCD_OPC_Decode, 223, 15, 112, // Opcode: TRN1v4i32
+/* 18430 */ MCD_OPC_FilterValue, 1, 219, 86, // Skip to: 40669
+/* 18434 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 18437 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18449
+/* 18441 */ MCD_OPC_CheckPredicate, 0, 208, 86, // Skip to: 40669
+/* 18445 */ MCD_OPC_Decode, 232, 9, 117, // Opcode: SADDLPv4i32_v2i64
+/* 18449 */ MCD_OPC_FilterValue, 1, 200, 86, // Skip to: 40669
+/* 18453 */ MCD_OPC_CheckPredicate, 0, 196, 86, // Skip to: 40669
+/* 18457 */ MCD_OPC_Decode, 195, 18, 126, // Opcode: XTNv4i32
+/* 18461 */ MCD_OPC_FilterValue, 3, 188, 86, // Skip to: 40669
+/* 18465 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 18468 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18480
+/* 18472 */ MCD_OPC_CheckPredicate, 0, 177, 86, // Skip to: 40669
+/* 18476 */ MCD_OPC_Decode, 138, 16, 117, // Opcode: UADDLPv4i32_v2i64
+/* 18480 */ MCD_OPC_FilterValue, 33, 169, 86, // Skip to: 40669
+/* 18484 */ MCD_OPC_CheckPredicate, 0, 165, 86, // Skip to: 40669
+/* 18488 */ MCD_OPC_Decode, 218, 12, 126, // Opcode: SQXTUNv4i32
+/* 18492 */ MCD_OPC_FilterValue, 11, 75, 0, // Skip to: 18571
+/* 18496 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18499 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18517
+/* 18503 */ MCD_OPC_CheckPredicate, 0, 146, 86, // Skip to: 40669
+/* 18507 */ MCD_OPC_CheckField, 21, 1, 1, 140, 86, // Skip to: 40669
+/* 18513 */ MCD_OPC_Decode, 197, 12, 89, // Opcode: SQSUBv2i32
+/* 18517 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18535
+/* 18521 */ MCD_OPC_CheckPredicate, 0, 128, 86, // Skip to: 40669
+/* 18525 */ MCD_OPC_CheckField, 21, 1, 1, 122, 86, // Skip to: 40669
+/* 18531 */ MCD_OPC_Decode, 204, 17, 89, // Opcode: UQSUBv2i32
+/* 18535 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18553
+/* 18539 */ MCD_OPC_CheckPredicate, 0, 110, 86, // Skip to: 40669
+/* 18543 */ MCD_OPC_CheckField, 21, 1, 1, 104, 86, // Skip to: 40669
+/* 18549 */ MCD_OPC_Decode, 200, 12, 112, // Opcode: SQSUBv4i32
+/* 18553 */ MCD_OPC_FilterValue, 3, 96, 86, // Skip to: 40669
+/* 18557 */ MCD_OPC_CheckPredicate, 0, 92, 86, // Skip to: 40669
+/* 18561 */ MCD_OPC_CheckField, 21, 1, 1, 86, 86, // Skip to: 40669
+/* 18567 */ MCD_OPC_Decode, 207, 17, 112, // Opcode: UQSUBv4i32
+/* 18571 */ MCD_OPC_FilterValue, 12, 75, 0, // Skip to: 18650
+/* 18575 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18578 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18596
+/* 18582 */ MCD_OPC_CheckPredicate, 0, 67, 86, // Skip to: 40669
+/* 18586 */ MCD_OPC_CheckField, 21, 1, 1, 61, 86, // Skip to: 40669
+/* 18592 */ MCD_OPC_Decode, 168, 13, 93, // Opcode: SSUBWv2i32_v2i64
+/* 18596 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18614
+/* 18600 */ MCD_OPC_CheckPredicate, 0, 49, 86, // Skip to: 40669
+/* 18604 */ MCD_OPC_CheckField, 21, 1, 1, 43, 86, // Skip to: 40669
+/* 18610 */ MCD_OPC_Decode, 173, 18, 93, // Opcode: USUBWv2i32_v2i64
+/* 18614 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18632
+/* 18618 */ MCD_OPC_CheckPredicate, 0, 31, 86, // Skip to: 40669
+/* 18622 */ MCD_OPC_CheckField, 21, 1, 1, 25, 86, // Skip to: 40669
+/* 18628 */ MCD_OPC_Decode, 170, 13, 112, // Opcode: SSUBWv4i32_v2i64
+/* 18632 */ MCD_OPC_FilterValue, 3, 17, 86, // Skip to: 40669
+/* 18636 */ MCD_OPC_CheckPredicate, 0, 13, 86, // Skip to: 40669
+/* 18640 */ MCD_OPC_CheckField, 21, 1, 1, 7, 86, // Skip to: 40669
+/* 18646 */ MCD_OPC_Decode, 175, 18, 112, // Opcode: USUBWv4i32_v2i64
+/* 18650 */ MCD_OPC_FilterValue, 13, 75, 0, // Skip to: 18729
+/* 18654 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18657 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18675
+/* 18661 */ MCD_OPC_CheckPredicate, 0, 244, 85, // Skip to: 40669
+/* 18665 */ MCD_OPC_CheckField, 21, 1, 1, 238, 85, // Skip to: 40669
+/* 18671 */ MCD_OPC_Decode, 194, 1, 89, // Opcode: CMGTv2i32
+/* 18675 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18693
+/* 18679 */ MCD_OPC_CheckPredicate, 0, 226, 85, // Skip to: 40669
+/* 18683 */ MCD_OPC_CheckField, 21, 1, 1, 220, 85, // Skip to: 40669
+/* 18689 */ MCD_OPC_Decode, 208, 1, 89, // Opcode: CMHIv2i32
+/* 18693 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18711
+/* 18697 */ MCD_OPC_CheckPredicate, 0, 208, 85, // Skip to: 40669
+/* 18701 */ MCD_OPC_CheckField, 21, 1, 1, 202, 85, // Skip to: 40669
+/* 18707 */ MCD_OPC_Decode, 200, 1, 112, // Opcode: CMGTv4i32
+/* 18711 */ MCD_OPC_FilterValue, 3, 194, 85, // Skip to: 40669
+/* 18715 */ MCD_OPC_CheckPredicate, 0, 190, 85, // Skip to: 40669
+/* 18719 */ MCD_OPC_CheckField, 21, 1, 1, 184, 85, // Skip to: 40669
+/* 18725 */ MCD_OPC_Decode, 211, 1, 112, // Opcode: CMHIv4i32
+/* 18729 */ MCD_OPC_FilterValue, 14, 164, 0, // Skip to: 18897
+/* 18733 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18736 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 18773
+/* 18740 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 18743 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18755
+/* 18747 */ MCD_OPC_CheckPredicate, 0, 158, 85, // Skip to: 40669
+/* 18751 */ MCD_OPC_Decode, 199, 18, 89, // Opcode: ZIP1v2i32
+/* 18755 */ MCD_OPC_FilterValue, 1, 150, 85, // Skip to: 40669
+/* 18759 */ MCD_OPC_CheckPredicate, 0, 146, 85, // Skip to: 40669
+/* 18763 */ MCD_OPC_CheckField, 16, 5, 0, 140, 85, // Skip to: 40669
+/* 18769 */ MCD_OPC_Decode, 186, 15, 99, // Opcode: SUQADDv2i32
+/* 18773 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 18804
+/* 18777 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 18780 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18792
+/* 18784 */ MCD_OPC_CheckPredicate, 0, 121, 85, // Skip to: 40669
+/* 18788 */ MCD_OPC_Decode, 152, 18, 99, // Opcode: USQADDv2i32
+/* 18792 */ MCD_OPC_FilterValue, 33, 113, 85, // Skip to: 40669
+/* 18796 */ MCD_OPC_CheckPredicate, 0, 109, 85, // Skip to: 40669
+/* 18800 */ MCD_OPC_Decode, 169, 10, 108, // Opcode: SHLLv2i32
+/* 18804 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 18854
+/* 18808 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 18811 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18823
+/* 18815 */ MCD_OPC_CheckPredicate, 0, 90, 85, // Skip to: 40669
+/* 18819 */ MCD_OPC_Decode, 202, 18, 112, // Opcode: ZIP1v4i32
+/* 18823 */ MCD_OPC_FilterValue, 1, 82, 85, // Skip to: 40669
+/* 18827 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 18830 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 18842
+/* 18834 */ MCD_OPC_CheckPredicate, 0, 71, 85, // Skip to: 40669
+/* 18838 */ MCD_OPC_Decode, 189, 15, 126, // Opcode: SUQADDv4i32
+/* 18842 */ MCD_OPC_FilterValue, 16, 63, 85, // Skip to: 40669
+/* 18846 */ MCD_OPC_CheckPredicate, 0, 59, 85, // Skip to: 40669
+/* 18850 */ MCD_OPC_Decode, 237, 9, 95, // Opcode: SADDLVv4i32v
+/* 18854 */ MCD_OPC_FilterValue, 3, 51, 85, // Skip to: 40669
+/* 18858 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 18861 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 18873
+/* 18865 */ MCD_OPC_CheckPredicate, 0, 40, 85, // Skip to: 40669
+/* 18869 */ MCD_OPC_Decode, 155, 18, 126, // Opcode: USQADDv4i32
+/* 18873 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 18885
+/* 18877 */ MCD_OPC_CheckPredicate, 0, 28, 85, // Skip to: 40669
+/* 18881 */ MCD_OPC_Decode, 171, 10, 117, // Opcode: SHLLv4i32
+/* 18885 */ MCD_OPC_FilterValue, 48, 20, 85, // Skip to: 40669
+/* 18889 */ MCD_OPC_CheckPredicate, 0, 16, 85, // Skip to: 40669
+/* 18893 */ MCD_OPC_Decode, 143, 16, 95, // Opcode: UADDLVv4i32v
+/* 18897 */ MCD_OPC_FilterValue, 15, 75, 0, // Skip to: 18976
+/* 18901 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18904 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 18922
+/* 18908 */ MCD_OPC_CheckPredicate, 0, 253, 84, // Skip to: 40669
+/* 18912 */ MCD_OPC_CheckField, 21, 1, 1, 247, 84, // Skip to: 40669
+/* 18918 */ MCD_OPC_Decode, 178, 1, 89, // Opcode: CMGEv2i32
+/* 18922 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 18940
+/* 18926 */ MCD_OPC_CheckPredicate, 0, 235, 84, // Skip to: 40669
+/* 18930 */ MCD_OPC_CheckField, 21, 1, 1, 229, 84, // Skip to: 40669
+/* 18936 */ MCD_OPC_Decode, 216, 1, 89, // Opcode: CMHSv2i32
+/* 18940 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 18958
+/* 18944 */ MCD_OPC_CheckPredicate, 0, 217, 84, // Skip to: 40669
+/* 18948 */ MCD_OPC_CheckField, 21, 1, 1, 211, 84, // Skip to: 40669
+/* 18954 */ MCD_OPC_Decode, 184, 1, 112, // Opcode: CMGEv4i32
+/* 18958 */ MCD_OPC_FilterValue, 3, 203, 84, // Skip to: 40669
+/* 18962 */ MCD_OPC_CheckPredicate, 0, 199, 84, // Skip to: 40669
+/* 18966 */ MCD_OPC_CheckField, 21, 1, 1, 193, 84, // Skip to: 40669
+/* 18972 */ MCD_OPC_Decode, 219, 1, 112, // Opcode: CMHSv4i32
+/* 18976 */ MCD_OPC_FilterValue, 16, 73, 0, // Skip to: 19053
+/* 18980 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 18983 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 19000
+/* 18987 */ MCD_OPC_CheckPredicate, 0, 174, 84, // Skip to: 40669
+/* 18991 */ MCD_OPC_CheckField, 21, 1, 1, 168, 84, // Skip to: 40669
+/* 18997 */ MCD_OPC_Decode, 32, 103, // Opcode: ADDHNv2i64_v2i32
+/* 19000 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19018
+/* 19004 */ MCD_OPC_CheckPredicate, 0, 157, 84, // Skip to: 40669
+/* 19008 */ MCD_OPC_CheckField, 21, 1, 1, 151, 84, // Skip to: 40669
+/* 19014 */ MCD_OPC_Decode, 156, 9, 103, // Opcode: RADDHNv2i64_v2i32
+/* 19018 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 19035
+/* 19022 */ MCD_OPC_CheckPredicate, 0, 139, 84, // Skip to: 40669
+/* 19026 */ MCD_OPC_CheckField, 21, 1, 1, 133, 84, // Skip to: 40669
+/* 19032 */ MCD_OPC_Decode, 33, 120, // Opcode: ADDHNv2i64_v4i32
+/* 19035 */ MCD_OPC_FilterValue, 3, 126, 84, // Skip to: 40669
+/* 19039 */ MCD_OPC_CheckPredicate, 0, 122, 84, // Skip to: 40669
+/* 19043 */ MCD_OPC_CheckField, 21, 1, 1, 116, 84, // Skip to: 40669
+/* 19049 */ MCD_OPC_Decode, 157, 9, 120, // Opcode: RADDHNv2i64_v4i32
+/* 19053 */ MCD_OPC_FilterValue, 17, 75, 0, // Skip to: 19132
+/* 19057 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19060 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19078
+/* 19064 */ MCD_OPC_CheckPredicate, 0, 97, 84, // Skip to: 40669
+/* 19068 */ MCD_OPC_CheckField, 21, 1, 1, 91, 84, // Skip to: 40669
+/* 19074 */ MCD_OPC_Decode, 139, 13, 89, // Opcode: SSHLv2i32
+/* 19078 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19096
+/* 19082 */ MCD_OPC_CheckPredicate, 0, 79, 84, // Skip to: 40669
+/* 19086 */ MCD_OPC_CheckField, 21, 1, 1, 73, 84, // Skip to: 40669
+/* 19092 */ MCD_OPC_Decode, 133, 18, 89, // Opcode: USHLv2i32
+/* 19096 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19114
+/* 19100 */ MCD_OPC_CheckPredicate, 0, 61, 84, // Skip to: 40669
+/* 19104 */ MCD_OPC_CheckField, 21, 1, 1, 55, 84, // Skip to: 40669
+/* 19110 */ MCD_OPC_Decode, 142, 13, 112, // Opcode: SSHLv4i32
+/* 19114 */ MCD_OPC_FilterValue, 3, 47, 84, // Skip to: 40669
+/* 19118 */ MCD_OPC_CheckPredicate, 0, 43, 84, // Skip to: 40669
+/* 19122 */ MCD_OPC_CheckField, 21, 1, 1, 37, 84, // Skip to: 40669
+/* 19128 */ MCD_OPC_Decode, 136, 18, 112, // Opcode: USHLv4i32
+/* 19132 */ MCD_OPC_FilterValue, 18, 127, 0, // Skip to: 19263
+/* 19136 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19139 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 19170
+/* 19143 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 19146 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19158
+/* 19150 */ MCD_OPC_CheckPredicate, 0, 11, 84, // Skip to: 40669
+/* 19154 */ MCD_OPC_Decode, 145, 1, 90, // Opcode: CLSv2i32
+/* 19158 */ MCD_OPC_FilterValue, 33, 3, 84, // Skip to: 40669
+/* 19162 */ MCD_OPC_CheckPredicate, 0, 255, 83, // Skip to: 40669
+/* 19166 */ MCD_OPC_Decode, 207, 12, 95, // Opcode: SQXTNv2i32
+/* 19170 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 19201
+/* 19174 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 19177 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19189
+/* 19181 */ MCD_OPC_CheckPredicate, 0, 236, 83, // Skip to: 40669
+/* 19185 */ MCD_OPC_Decode, 153, 1, 90, // Opcode: CLZv2i32
+/* 19189 */ MCD_OPC_FilterValue, 33, 228, 83, // Skip to: 40669
+/* 19193 */ MCD_OPC_CheckPredicate, 0, 224, 83, // Skip to: 40669
+/* 19197 */ MCD_OPC_Decode, 214, 17, 95, // Opcode: UQXTNv2i32
+/* 19201 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 19232
+/* 19205 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 19208 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19220
+/* 19212 */ MCD_OPC_CheckPredicate, 0, 205, 83, // Skip to: 40669
+/* 19216 */ MCD_OPC_Decode, 147, 1, 117, // Opcode: CLSv4i32
+/* 19220 */ MCD_OPC_FilterValue, 33, 197, 83, // Skip to: 40669
+/* 19224 */ MCD_OPC_CheckPredicate, 0, 193, 83, // Skip to: 40669
+/* 19228 */ MCD_OPC_Decode, 209, 12, 126, // Opcode: SQXTNv4i32
+/* 19232 */ MCD_OPC_FilterValue, 3, 185, 83, // Skip to: 40669
+/* 19236 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 19239 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 19251
+/* 19243 */ MCD_OPC_CheckPredicate, 0, 174, 83, // Skip to: 40669
+/* 19247 */ MCD_OPC_Decode, 155, 1, 117, // Opcode: CLZv4i32
+/* 19251 */ MCD_OPC_FilterValue, 33, 166, 83, // Skip to: 40669
+/* 19255 */ MCD_OPC_CheckPredicate, 0, 162, 83, // Skip to: 40669
+/* 19259 */ MCD_OPC_Decode, 216, 17, 126, // Opcode: UQXTNv4i32
+/* 19263 */ MCD_OPC_FilterValue, 19, 75, 0, // Skip to: 19342
+/* 19267 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19270 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19288
+/* 19274 */ MCD_OPC_CheckPredicate, 0, 143, 83, // Skip to: 40669
+/* 19278 */ MCD_OPC_CheckField, 21, 1, 1, 137, 83, // Skip to: 40669
+/* 19284 */ MCD_OPC_Decode, 162, 12, 89, // Opcode: SQSHLv2i32
+/* 19288 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19306
+/* 19292 */ MCD_OPC_CheckPredicate, 0, 125, 83, // Skip to: 40669
+/* 19296 */ MCD_OPC_CheckField, 21, 1, 1, 119, 83, // Skip to: 40669
+/* 19302 */ MCD_OPC_Decode, 178, 17, 89, // Opcode: UQSHLv2i32
+/* 19306 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19324
+/* 19310 */ MCD_OPC_CheckPredicate, 0, 107, 83, // Skip to: 40669
+/* 19314 */ MCD_OPC_CheckField, 21, 1, 1, 101, 83, // Skip to: 40669
+/* 19320 */ MCD_OPC_Decode, 168, 12, 112, // Opcode: SQSHLv4i32
+/* 19324 */ MCD_OPC_FilterValue, 3, 93, 83, // Skip to: 40669
+/* 19328 */ MCD_OPC_CheckPredicate, 0, 89, 83, // Skip to: 40669
+/* 19332 */ MCD_OPC_CheckField, 21, 1, 1, 83, 83, // Skip to: 40669
+/* 19338 */ MCD_OPC_Decode, 184, 17, 112, // Opcode: UQSHLv4i32
+/* 19342 */ MCD_OPC_FilterValue, 20, 75, 0, // Skip to: 19421
+/* 19346 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19349 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19367
+/* 19353 */ MCD_OPC_CheckPredicate, 0, 64, 83, // Skip to: 40669
+/* 19357 */ MCD_OPC_CheckField, 21, 1, 1, 58, 83, // Skip to: 40669
+/* 19363 */ MCD_OPC_Decode, 200, 9, 105, // Opcode: SABALv2i32_v2i64
+/* 19367 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19385
+/* 19371 */ MCD_OPC_CheckPredicate, 0, 46, 83, // Skip to: 40669
+/* 19375 */ MCD_OPC_CheckField, 21, 1, 1, 40, 83, // Skip to: 40669
+/* 19381 */ MCD_OPC_Decode, 234, 15, 105, // Opcode: UABALv2i32_v2i64
+/* 19385 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19403
+/* 19389 */ MCD_OPC_CheckPredicate, 0, 28, 83, // Skip to: 40669
+/* 19393 */ MCD_OPC_CheckField, 21, 1, 1, 22, 83, // Skip to: 40669
+/* 19399 */ MCD_OPC_Decode, 202, 9, 120, // Opcode: SABALv4i32_v2i64
+/* 19403 */ MCD_OPC_FilterValue, 3, 14, 83, // Skip to: 40669
+/* 19407 */ MCD_OPC_CheckPredicate, 0, 10, 83, // Skip to: 40669
+/* 19411 */ MCD_OPC_CheckField, 21, 1, 1, 4, 83, // Skip to: 40669
+/* 19417 */ MCD_OPC_Decode, 236, 15, 120, // Opcode: UABALv4i32_v2i64
+/* 19421 */ MCD_OPC_FilterValue, 21, 75, 0, // Skip to: 19500
+/* 19425 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19428 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19446
+/* 19432 */ MCD_OPC_CheckPredicate, 0, 241, 82, // Skip to: 40669
+/* 19436 */ MCD_OPC_CheckField, 21, 1, 1, 235, 82, // Skip to: 40669
+/* 19442 */ MCD_OPC_Decode, 237, 12, 89, // Opcode: SRSHLv2i32
+/* 19446 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19464
+/* 19450 */ MCD_OPC_CheckPredicate, 0, 223, 82, // Skip to: 40669
+/* 19454 */ MCD_OPC_CheckField, 21, 1, 1, 217, 82, // Skip to: 40669
+/* 19460 */ MCD_OPC_Decode, 229, 17, 89, // Opcode: URSHLv2i32
+/* 19464 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19482
+/* 19468 */ MCD_OPC_CheckPredicate, 0, 205, 82, // Skip to: 40669
+/* 19472 */ MCD_OPC_CheckField, 21, 1, 1, 199, 82, // Skip to: 40669
+/* 19478 */ MCD_OPC_Decode, 240, 12, 112, // Opcode: SRSHLv4i32
+/* 19482 */ MCD_OPC_FilterValue, 3, 191, 82, // Skip to: 40669
+/* 19486 */ MCD_OPC_CheckPredicate, 0, 187, 82, // Skip to: 40669
+/* 19490 */ MCD_OPC_CheckField, 21, 1, 1, 181, 82, // Skip to: 40669
+/* 19496 */ MCD_OPC_Decode, 232, 17, 112, // Opcode: URSHLv4i32
+/* 19500 */ MCD_OPC_FilterValue, 22, 39, 0, // Skip to: 19543
+/* 19504 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19507 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19525
+/* 19511 */ MCD_OPC_CheckPredicate, 0, 162, 82, // Skip to: 40669
+/* 19515 */ MCD_OPC_CheckField, 21, 1, 0, 156, 82, // Skip to: 40669
+/* 19521 */ MCD_OPC_Decode, 186, 18, 89, // Opcode: UZP2v2i32
+/* 19525 */ MCD_OPC_FilterValue, 2, 148, 82, // Skip to: 40669
+/* 19529 */ MCD_OPC_CheckPredicate, 0, 144, 82, // Skip to: 40669
+/* 19533 */ MCD_OPC_CheckField, 21, 1, 0, 138, 82, // Skip to: 40669
+/* 19539 */ MCD_OPC_Decode, 189, 18, 112, // Opcode: UZP2v4i32
+/* 19543 */ MCD_OPC_FilterValue, 23, 75, 0, // Skip to: 19622
+/* 19547 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19550 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19568
+/* 19554 */ MCD_OPC_CheckPredicate, 0, 119, 82, // Skip to: 40669
+/* 19558 */ MCD_OPC_CheckField, 21, 1, 1, 113, 82, // Skip to: 40669
+/* 19564 */ MCD_OPC_Decode, 245, 11, 89, // Opcode: SQRSHLv2i32
+/* 19568 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19586
+/* 19572 */ MCD_OPC_CheckPredicate, 0, 101, 82, // Skip to: 40669
+/* 19576 */ MCD_OPC_CheckField, 21, 1, 1, 95, 82, // Skip to: 40669
+/* 19582 */ MCD_OPC_Decode, 153, 17, 89, // Opcode: UQRSHLv2i32
+/* 19586 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19604
+/* 19590 */ MCD_OPC_CheckPredicate, 0, 83, 82, // Skip to: 40669
+/* 19594 */ MCD_OPC_CheckField, 21, 1, 1, 77, 82, // Skip to: 40669
+/* 19600 */ MCD_OPC_Decode, 248, 11, 112, // Opcode: SQRSHLv4i32
+/* 19604 */ MCD_OPC_FilterValue, 3, 69, 82, // Skip to: 40669
+/* 19608 */ MCD_OPC_CheckPredicate, 0, 65, 82, // Skip to: 40669
+/* 19612 */ MCD_OPC_CheckField, 21, 1, 1, 59, 82, // Skip to: 40669
+/* 19618 */ MCD_OPC_Decode, 156, 17, 112, // Opcode: UQRSHLv4i32
+/* 19622 */ MCD_OPC_FilterValue, 24, 75, 0, // Skip to: 19701
+/* 19626 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19629 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19647
+/* 19633 */ MCD_OPC_CheckPredicate, 0, 40, 82, // Skip to: 40669
+/* 19637 */ MCD_OPC_CheckField, 21, 1, 1, 34, 82, // Skip to: 40669
+/* 19643 */ MCD_OPC_Decode, 149, 15, 103, // Opcode: SUBHNv2i64_v2i32
+/* 19647 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19665
+/* 19651 */ MCD_OPC_CheckPredicate, 0, 22, 82, // Skip to: 40669
+/* 19655 */ MCD_OPC_CheckField, 21, 1, 1, 16, 82, // Skip to: 40669
+/* 19661 */ MCD_OPC_Decode, 193, 9, 103, // Opcode: RSUBHNv2i64_v2i32
+/* 19665 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19683
+/* 19669 */ MCD_OPC_CheckPredicate, 0, 4, 82, // Skip to: 40669
+/* 19673 */ MCD_OPC_CheckField, 21, 1, 1, 254, 81, // Skip to: 40669
+/* 19679 */ MCD_OPC_Decode, 150, 15, 120, // Opcode: SUBHNv2i64_v4i32
+/* 19683 */ MCD_OPC_FilterValue, 3, 246, 81, // Skip to: 40669
+/* 19687 */ MCD_OPC_CheckPredicate, 0, 242, 81, // Skip to: 40669
+/* 19691 */ MCD_OPC_CheckField, 21, 1, 1, 236, 81, // Skip to: 40669
+/* 19697 */ MCD_OPC_Decode, 194, 9, 120, // Opcode: RSUBHNv2i64_v4i32
+/* 19701 */ MCD_OPC_FilterValue, 25, 75, 0, // Skip to: 19780
+/* 19705 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19708 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19726
+/* 19712 */ MCD_OPC_CheckPredicate, 0, 217, 81, // Skip to: 40669
+/* 19716 */ MCD_OPC_CheckField, 21, 1, 1, 211, 81, // Skip to: 40669
+/* 19722 */ MCD_OPC_Decode, 215, 10, 89, // Opcode: SMAXv2i32
+/* 19726 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19744
+/* 19730 */ MCD_OPC_CheckPredicate, 0, 199, 81, // Skip to: 40669
+/* 19734 */ MCD_OPC_CheckField, 21, 1, 1, 193, 81, // Skip to: 40669
+/* 19740 */ MCD_OPC_Decode, 207, 16, 89, // Opcode: UMAXv2i32
+/* 19744 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19762
+/* 19748 */ MCD_OPC_CheckPredicate, 0, 181, 81, // Skip to: 40669
+/* 19752 */ MCD_OPC_CheckField, 21, 1, 1, 175, 81, // Skip to: 40669
+/* 19758 */ MCD_OPC_Decode, 217, 10, 112, // Opcode: SMAXv4i32
+/* 19762 */ MCD_OPC_FilterValue, 3, 167, 81, // Skip to: 40669
+/* 19766 */ MCD_OPC_CheckPredicate, 0, 163, 81, // Skip to: 40669
+/* 19770 */ MCD_OPC_CheckField, 21, 1, 1, 157, 81, // Skip to: 40669
+/* 19776 */ MCD_OPC_Decode, 209, 16, 112, // Opcode: UMAXv4i32
+/* 19780 */ MCD_OPC_FilterValue, 26, 113, 0, // Skip to: 19897
+/* 19784 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19787 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 19824
+/* 19791 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 19794 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 19806
+/* 19798 */ MCD_OPC_CheckPredicate, 0, 131, 81, // Skip to: 40669
+/* 19802 */ MCD_OPC_Decode, 227, 15, 89, // Opcode: TRN2v2i32
+/* 19806 */ MCD_OPC_FilterValue, 1, 123, 81, // Skip to: 40669
+/* 19810 */ MCD_OPC_CheckPredicate, 0, 119, 81, // Skip to: 40669
+/* 19814 */ MCD_OPC_CheckField, 16, 5, 0, 113, 81, // Skip to: 40669
+/* 19820 */ MCD_OPC_Decode, 224, 9, 99, // Opcode: SADALPv2i32_v1i64
+/* 19824 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19842
+/* 19828 */ MCD_OPC_CheckPredicate, 0, 101, 81, // Skip to: 40669
+/* 19832 */ MCD_OPC_CheckField, 16, 6, 32, 95, 81, // Skip to: 40669
+/* 19838 */ MCD_OPC_Decode, 130, 16, 99, // Opcode: UADALPv2i32_v1i64
+/* 19842 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 19879
+/* 19846 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 19849 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 19861
+/* 19853 */ MCD_OPC_CheckPredicate, 0, 76, 81, // Skip to: 40669
+/* 19857 */ MCD_OPC_Decode, 230, 15, 112, // Opcode: TRN2v4i32
+/* 19861 */ MCD_OPC_FilterValue, 1, 68, 81, // Skip to: 40669
+/* 19865 */ MCD_OPC_CheckPredicate, 0, 64, 81, // Skip to: 40669
+/* 19869 */ MCD_OPC_CheckField, 16, 5, 0, 58, 81, // Skip to: 40669
+/* 19875 */ MCD_OPC_Decode, 226, 9, 126, // Opcode: SADALPv4i32_v2i64
+/* 19879 */ MCD_OPC_FilterValue, 3, 50, 81, // Skip to: 40669
+/* 19883 */ MCD_OPC_CheckPredicate, 0, 46, 81, // Skip to: 40669
+/* 19887 */ MCD_OPC_CheckField, 16, 6, 32, 40, 81, // Skip to: 40669
+/* 19893 */ MCD_OPC_Decode, 132, 16, 126, // Opcode: UADALPv4i32_v2i64
+/* 19897 */ MCD_OPC_FilterValue, 27, 75, 0, // Skip to: 19976
+/* 19901 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19904 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 19922
+/* 19908 */ MCD_OPC_CheckPredicate, 0, 21, 81, // Skip to: 40669
+/* 19912 */ MCD_OPC_CheckField, 21, 1, 1, 15, 81, // Skip to: 40669
+/* 19918 */ MCD_OPC_Decode, 233, 10, 89, // Opcode: SMINv2i32
+/* 19922 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 19940
+/* 19926 */ MCD_OPC_CheckPredicate, 0, 3, 81, // Skip to: 40669
+/* 19930 */ MCD_OPC_CheckField, 21, 1, 1, 253, 80, // Skip to: 40669
+/* 19936 */ MCD_OPC_Decode, 224, 16, 89, // Opcode: UMINv2i32
+/* 19940 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 19958
+/* 19944 */ MCD_OPC_CheckPredicate, 0, 241, 80, // Skip to: 40669
+/* 19948 */ MCD_OPC_CheckField, 21, 1, 1, 235, 80, // Skip to: 40669
+/* 19954 */ MCD_OPC_Decode, 235, 10, 112, // Opcode: SMINv4i32
+/* 19958 */ MCD_OPC_FilterValue, 3, 227, 80, // Skip to: 40669
+/* 19962 */ MCD_OPC_CheckPredicate, 0, 223, 80, // Skip to: 40669
+/* 19966 */ MCD_OPC_CheckField, 21, 1, 1, 217, 80, // Skip to: 40669
+/* 19972 */ MCD_OPC_Decode, 226, 16, 112, // Opcode: UMINv4i32
+/* 19976 */ MCD_OPC_FilterValue, 28, 75, 0, // Skip to: 20055
+/* 19980 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 19983 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20001
+/* 19987 */ MCD_OPC_CheckPredicate, 0, 198, 80, // Skip to: 40669
+/* 19991 */ MCD_OPC_CheckField, 21, 1, 1, 192, 80, // Skip to: 40669
+/* 19997 */ MCD_OPC_Decode, 212, 9, 85, // Opcode: SABDLv2i32_v2i64
+/* 20001 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20019
+/* 20005 */ MCD_OPC_CheckPredicate, 0, 180, 80, // Skip to: 40669
+/* 20009 */ MCD_OPC_CheckField, 21, 1, 1, 174, 80, // Skip to: 40669
+/* 20015 */ MCD_OPC_Decode, 246, 15, 85, // Opcode: UABDLv2i32_v2i64
+/* 20019 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20037
+/* 20023 */ MCD_OPC_CheckPredicate, 0, 162, 80, // Skip to: 40669
+/* 20027 */ MCD_OPC_CheckField, 21, 1, 1, 156, 80, // Skip to: 40669
+/* 20033 */ MCD_OPC_Decode, 214, 9, 112, // Opcode: SABDLv4i32_v2i64
+/* 20037 */ MCD_OPC_FilterValue, 3, 148, 80, // Skip to: 40669
+/* 20041 */ MCD_OPC_CheckPredicate, 0, 144, 80, // Skip to: 40669
+/* 20045 */ MCD_OPC_CheckField, 21, 1, 1, 138, 80, // Skip to: 40669
+/* 20051 */ MCD_OPC_Decode, 248, 15, 112, // Opcode: UABDLv4i32_v2i64
+/* 20055 */ MCD_OPC_FilterValue, 29, 75, 0, // Skip to: 20134
+/* 20059 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20062 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20080
+/* 20066 */ MCD_OPC_CheckPredicate, 0, 119, 80, // Skip to: 40669
+/* 20070 */ MCD_OPC_CheckField, 21, 1, 1, 113, 80, // Skip to: 40669
+/* 20076 */ MCD_OPC_Decode, 218, 9, 89, // Opcode: SABDv2i32
+/* 20080 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20098
+/* 20084 */ MCD_OPC_CheckPredicate, 0, 101, 80, // Skip to: 40669
+/* 20088 */ MCD_OPC_CheckField, 21, 1, 1, 95, 80, // Skip to: 40669
+/* 20094 */ MCD_OPC_Decode, 252, 15, 89, // Opcode: UABDv2i32
+/* 20098 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20116
+/* 20102 */ MCD_OPC_CheckPredicate, 0, 83, 80, // Skip to: 40669
+/* 20106 */ MCD_OPC_CheckField, 21, 1, 1, 77, 80, // Skip to: 40669
+/* 20112 */ MCD_OPC_Decode, 220, 9, 112, // Opcode: SABDv4i32
+/* 20116 */ MCD_OPC_FilterValue, 3, 69, 80, // Skip to: 40669
+/* 20120 */ MCD_OPC_CheckPredicate, 0, 65, 80, // Skip to: 40669
+/* 20124 */ MCD_OPC_CheckField, 21, 1, 1, 59, 80, // Skip to: 40669
+/* 20130 */ MCD_OPC_Decode, 254, 15, 112, // Opcode: UABDv4i32
+/* 20134 */ MCD_OPC_FilterValue, 30, 113, 0, // Skip to: 20251
+/* 20138 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20141 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 20178
+/* 20145 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 20148 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 20160
+/* 20152 */ MCD_OPC_CheckPredicate, 0, 33, 80, // Skip to: 40669
+/* 20156 */ MCD_OPC_Decode, 206, 18, 89, // Opcode: ZIP2v2i32
+/* 20160 */ MCD_OPC_FilterValue, 1, 25, 80, // Skip to: 40669
+/* 20164 */ MCD_OPC_CheckPredicate, 0, 21, 80, // Skip to: 40669
+/* 20168 */ MCD_OPC_CheckField, 16, 5, 0, 15, 80, // Skip to: 40669
+/* 20174 */ MCD_OPC_Decode, 152, 11, 90, // Opcode: SQABSv2i32
+/* 20178 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20196
+/* 20182 */ MCD_OPC_CheckPredicate, 0, 3, 80, // Skip to: 40669
+/* 20186 */ MCD_OPC_CheckField, 16, 6, 32, 253, 79, // Skip to: 40669
+/* 20192 */ MCD_OPC_Decode, 222, 11, 90, // Opcode: SQNEGv2i32
+/* 20196 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 20233
+/* 20200 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 20203 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 20215
+/* 20207 */ MCD_OPC_CheckPredicate, 0, 234, 79, // Skip to: 40669
+/* 20211 */ MCD_OPC_Decode, 209, 18, 112, // Opcode: ZIP2v4i32
+/* 20215 */ MCD_OPC_FilterValue, 1, 226, 79, // Skip to: 40669
+/* 20219 */ MCD_OPC_CheckPredicate, 0, 222, 79, // Skip to: 40669
+/* 20223 */ MCD_OPC_CheckField, 16, 5, 0, 216, 79, // Skip to: 40669
+/* 20229 */ MCD_OPC_Decode, 155, 11, 117, // Opcode: SQABSv4i32
+/* 20233 */ MCD_OPC_FilterValue, 3, 208, 79, // Skip to: 40669
+/* 20237 */ MCD_OPC_CheckPredicate, 0, 204, 79, // Skip to: 40669
+/* 20241 */ MCD_OPC_CheckField, 16, 6, 32, 198, 79, // Skip to: 40669
+/* 20247 */ MCD_OPC_Decode, 225, 11, 117, // Opcode: SQNEGv4i32
+/* 20251 */ MCD_OPC_FilterValue, 31, 75, 0, // Skip to: 20330
+/* 20255 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20258 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20276
+/* 20262 */ MCD_OPC_CheckPredicate, 0, 179, 79, // Skip to: 40669
+/* 20266 */ MCD_OPC_CheckField, 21, 1, 1, 173, 79, // Skip to: 40669
+/* 20272 */ MCD_OPC_Decode, 206, 9, 109, // Opcode: SABAv2i32
+/* 20276 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20294
+/* 20280 */ MCD_OPC_CheckPredicate, 0, 161, 79, // Skip to: 40669
+/* 20284 */ MCD_OPC_CheckField, 21, 1, 1, 155, 79, // Skip to: 40669
+/* 20290 */ MCD_OPC_Decode, 240, 15, 109, // Opcode: UABAv2i32
+/* 20294 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20312
+/* 20298 */ MCD_OPC_CheckPredicate, 0, 143, 79, // Skip to: 40669
+/* 20302 */ MCD_OPC_CheckField, 21, 1, 1, 137, 79, // Skip to: 40669
+/* 20308 */ MCD_OPC_Decode, 208, 9, 120, // Opcode: SABAv4i32
+/* 20312 */ MCD_OPC_FilterValue, 3, 129, 79, // Skip to: 40669
+/* 20316 */ MCD_OPC_CheckPredicate, 0, 125, 79, // Skip to: 40669
+/* 20320 */ MCD_OPC_CheckField, 21, 1, 1, 119, 79, // Skip to: 40669
+/* 20326 */ MCD_OPC_Decode, 242, 15, 120, // Opcode: UABAv4i32
+/* 20330 */ MCD_OPC_FilterValue, 32, 75, 0, // Skip to: 20409
+/* 20334 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20337 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20355
+/* 20341 */ MCD_OPC_CheckPredicate, 0, 100, 79, // Skip to: 40669
+/* 20345 */ MCD_OPC_CheckField, 21, 1, 1, 94, 79, // Skip to: 40669
+/* 20351 */ MCD_OPC_Decode, 240, 10, 105, // Opcode: SMLALv2i32_v2i64
+/* 20355 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20373
+/* 20359 */ MCD_OPC_CheckPredicate, 0, 82, 79, // Skip to: 40669
+/* 20363 */ MCD_OPC_CheckField, 21, 1, 1, 76, 79, // Skip to: 40669
+/* 20369 */ MCD_OPC_Decode, 231, 16, 105, // Opcode: UMLALv2i32_v2i64
+/* 20373 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20391
+/* 20377 */ MCD_OPC_CheckPredicate, 0, 64, 79, // Skip to: 40669
+/* 20381 */ MCD_OPC_CheckField, 21, 1, 1, 58, 79, // Skip to: 40669
+/* 20387 */ MCD_OPC_Decode, 244, 10, 120, // Opcode: SMLALv4i32_v2i64
+/* 20391 */ MCD_OPC_FilterValue, 3, 50, 79, // Skip to: 40669
+/* 20395 */ MCD_OPC_CheckPredicate, 0, 46, 79, // Skip to: 40669
+/* 20399 */ MCD_OPC_CheckField, 21, 1, 1, 40, 79, // Skip to: 40669
+/* 20405 */ MCD_OPC_Decode, 235, 16, 120, // Opcode: UMLALv4i32_v2i64
+/* 20409 */ MCD_OPC_FilterValue, 33, 73, 0, // Skip to: 20486
+/* 20413 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20416 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 20433
+/* 20420 */ MCD_OPC_CheckPredicate, 0, 21, 79, // Skip to: 40669
+/* 20424 */ MCD_OPC_CheckField, 21, 1, 1, 15, 79, // Skip to: 40669
+/* 20430 */ MCD_OPC_Decode, 71, 89, // Opcode: ADDv2i32
+/* 20433 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20451
+/* 20437 */ MCD_OPC_CheckPredicate, 0, 4, 79, // Skip to: 40669
+/* 20441 */ MCD_OPC_CheckField, 21, 1, 1, 254, 78, // Skip to: 40669
+/* 20447 */ MCD_OPC_Decode, 175, 15, 89, // Opcode: SUBv2i32
+/* 20451 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 20468
+/* 20455 */ MCD_OPC_CheckPredicate, 0, 242, 78, // Skip to: 40669
+/* 20459 */ MCD_OPC_CheckField, 21, 1, 1, 236, 78, // Skip to: 40669
+/* 20465 */ MCD_OPC_Decode, 74, 112, // Opcode: ADDv4i32
+/* 20468 */ MCD_OPC_FilterValue, 3, 229, 78, // Skip to: 40669
+/* 20472 */ MCD_OPC_CheckPredicate, 0, 225, 78, // Skip to: 40669
+/* 20476 */ MCD_OPC_CheckField, 21, 1, 1, 219, 78, // Skip to: 40669
+/* 20482 */ MCD_OPC_Decode, 178, 15, 112, // Opcode: SUBv4i32
+/* 20486 */ MCD_OPC_FilterValue, 34, 101, 0, // Skip to: 20591
+/* 20490 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20493 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 20524
+/* 20497 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 20500 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20512
+/* 20504 */ MCD_OPC_CheckPredicate, 0, 193, 78, // Skip to: 40669
+/* 20508 */ MCD_OPC_Decode, 195, 1, 90, // Opcode: CMGTv2i32rz
+/* 20512 */ MCD_OPC_FilterValue, 33, 185, 78, // Skip to: 40669
+/* 20516 */ MCD_OPC_CheckPredicate, 0, 181, 78, // Skip to: 40669
+/* 20520 */ MCD_OPC_Decode, 172, 5, 90, // Opcode: FRINTPv2f32
+/* 20524 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20542
+/* 20528 */ MCD_OPC_CheckPredicate, 0, 169, 78, // Skip to: 40669
+/* 20532 */ MCD_OPC_CheckField, 16, 6, 32, 163, 78, // Skip to: 40669
+/* 20538 */ MCD_OPC_Decode, 179, 1, 90, // Opcode: CMGEv2i32rz
+/* 20542 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 20573
+/* 20546 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 20549 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20561
+/* 20553 */ MCD_OPC_CheckPredicate, 0, 144, 78, // Skip to: 40669
+/* 20557 */ MCD_OPC_Decode, 201, 1, 117, // Opcode: CMGTv4i32rz
+/* 20561 */ MCD_OPC_FilterValue, 33, 136, 78, // Skip to: 40669
+/* 20565 */ MCD_OPC_CheckPredicate, 0, 132, 78, // Skip to: 40669
+/* 20569 */ MCD_OPC_Decode, 174, 5, 117, // Opcode: FRINTPv4f32
+/* 20573 */ MCD_OPC_FilterValue, 3, 124, 78, // Skip to: 40669
+/* 20577 */ MCD_OPC_CheckPredicate, 0, 120, 78, // Skip to: 40669
+/* 20581 */ MCD_OPC_CheckField, 16, 6, 32, 114, 78, // Skip to: 40669
+/* 20587 */ MCD_OPC_Decode, 185, 1, 117, // Opcode: CMGEv4i32rz
+/* 20591 */ MCD_OPC_FilterValue, 35, 75, 0, // Skip to: 20670
+/* 20595 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20598 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20616
+/* 20602 */ MCD_OPC_CheckPredicate, 0, 95, 78, // Skip to: 40669
+/* 20606 */ MCD_OPC_CheckField, 21, 1, 1, 89, 78, // Skip to: 40669
+/* 20612 */ MCD_OPC_Decode, 240, 1, 89, // Opcode: CMTSTv2i32
+/* 20616 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20634
+/* 20620 */ MCD_OPC_CheckPredicate, 0, 77, 78, // Skip to: 40669
+/* 20624 */ MCD_OPC_CheckField, 21, 1, 1, 71, 78, // Skip to: 40669
+/* 20630 */ MCD_OPC_Decode, 162, 1, 89, // Opcode: CMEQv2i32
+/* 20634 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20652
+/* 20638 */ MCD_OPC_CheckPredicate, 0, 59, 78, // Skip to: 40669
+/* 20642 */ MCD_OPC_CheckField, 21, 1, 1, 53, 78, // Skip to: 40669
+/* 20648 */ MCD_OPC_Decode, 243, 1, 112, // Opcode: CMTSTv4i32
+/* 20652 */ MCD_OPC_FilterValue, 3, 45, 78, // Skip to: 40669
+/* 20656 */ MCD_OPC_CheckPredicate, 0, 41, 78, // Skip to: 40669
+/* 20660 */ MCD_OPC_CheckField, 21, 1, 1, 35, 78, // Skip to: 40669
+/* 20666 */ MCD_OPC_Decode, 168, 1, 112, // Opcode: CMEQv4i32
+/* 20670 */ MCD_OPC_FilterValue, 36, 39, 0, // Skip to: 20713
+/* 20674 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20677 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20695
+/* 20681 */ MCD_OPC_CheckPredicate, 0, 16, 78, // Skip to: 40669
+/* 20685 */ MCD_OPC_CheckField, 21, 1, 1, 10, 78, // Skip to: 40669
+/* 20691 */ MCD_OPC_Decode, 174, 11, 105, // Opcode: SQDMLALv2i32_v2i64
+/* 20695 */ MCD_OPC_FilterValue, 2, 2, 78, // Skip to: 40669
+/* 20699 */ MCD_OPC_CheckPredicate, 0, 254, 77, // Skip to: 40669
+/* 20703 */ MCD_OPC_CheckField, 21, 1, 1, 248, 77, // Skip to: 40669
+/* 20709 */ MCD_OPC_Decode, 178, 11, 120, // Opcode: SQDMLALv4i32_v2i64
+/* 20713 */ MCD_OPC_FilterValue, 37, 75, 0, // Skip to: 20792
+/* 20717 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20720 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20738
+/* 20724 */ MCD_OPC_CheckPredicate, 0, 229, 77, // Skip to: 40669
+/* 20728 */ MCD_OPC_CheckField, 21, 1, 1, 223, 77, // Skip to: 40669
+/* 20734 */ MCD_OPC_Decode, 181, 8, 109, // Opcode: MLAv2i32
+/* 20738 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 20756
+/* 20742 */ MCD_OPC_CheckPredicate, 0, 211, 77, // Skip to: 40669
+/* 20746 */ MCD_OPC_CheckField, 21, 1, 1, 205, 77, // Skip to: 40669
+/* 20752 */ MCD_OPC_Decode, 191, 8, 109, // Opcode: MLSv2i32
+/* 20756 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 20774
+/* 20760 */ MCD_OPC_CheckPredicate, 0, 193, 77, // Skip to: 40669
+/* 20764 */ MCD_OPC_CheckField, 21, 1, 1, 187, 77, // Skip to: 40669
+/* 20770 */ MCD_OPC_Decode, 185, 8, 120, // Opcode: MLAv4i32
+/* 20774 */ MCD_OPC_FilterValue, 3, 179, 77, // Skip to: 40669
+/* 20778 */ MCD_OPC_CheckPredicate, 0, 175, 77, // Skip to: 40669
+/* 20782 */ MCD_OPC_CheckField, 21, 1, 1, 169, 77, // Skip to: 40669
+/* 20788 */ MCD_OPC_Decode, 195, 8, 120, // Opcode: MLSv4i32
+/* 20792 */ MCD_OPC_FilterValue, 38, 127, 0, // Skip to: 20923
+/* 20796 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20799 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 20830
+/* 20803 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 20806 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20818
+/* 20810 */ MCD_OPC_CheckPredicate, 0, 143, 77, // Skip to: 40669
+/* 20814 */ MCD_OPC_Decode, 163, 1, 90, // Opcode: CMEQv2i32rz
+/* 20818 */ MCD_OPC_FilterValue, 33, 135, 77, // Skip to: 40669
+/* 20822 */ MCD_OPC_CheckPredicate, 0, 131, 77, // Skip to: 40669
+/* 20826 */ MCD_OPC_Decode, 182, 5, 90, // Opcode: FRINTZv2f32
+/* 20830 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 20861
+/* 20834 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 20837 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20849
+/* 20841 */ MCD_OPC_CheckPredicate, 0, 112, 77, // Skip to: 40669
+/* 20845 */ MCD_OPC_Decode, 224, 1, 90, // Opcode: CMLEv2i32rz
+/* 20849 */ MCD_OPC_FilterValue, 33, 104, 77, // Skip to: 40669
+/* 20853 */ MCD_OPC_CheckPredicate, 0, 100, 77, // Skip to: 40669
+/* 20857 */ MCD_OPC_Decode, 157, 5, 90, // Opcode: FRINTIv2f32
+/* 20861 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 20892
+/* 20865 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 20868 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20880
+/* 20872 */ MCD_OPC_CheckPredicate, 0, 81, 77, // Skip to: 40669
+/* 20876 */ MCD_OPC_Decode, 169, 1, 117, // Opcode: CMEQv4i32rz
+/* 20880 */ MCD_OPC_FilterValue, 33, 73, 77, // Skip to: 40669
+/* 20884 */ MCD_OPC_CheckPredicate, 0, 69, 77, // Skip to: 40669
+/* 20888 */ MCD_OPC_Decode, 184, 5, 117, // Opcode: FRINTZv4f32
+/* 20892 */ MCD_OPC_FilterValue, 3, 61, 77, // Skip to: 40669
+/* 20896 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 20899 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 20911
+/* 20903 */ MCD_OPC_CheckPredicate, 0, 50, 77, // Skip to: 40669
+/* 20907 */ MCD_OPC_Decode, 227, 1, 117, // Opcode: CMLEv4i32rz
+/* 20911 */ MCD_OPC_FilterValue, 33, 42, 77, // Skip to: 40669
+/* 20915 */ MCD_OPC_CheckPredicate, 0, 38, 77, // Skip to: 40669
+/* 20919 */ MCD_OPC_Decode, 159, 5, 117, // Opcode: FRINTIv4f32
+/* 20923 */ MCD_OPC_FilterValue, 39, 39, 0, // Skip to: 20966
+/* 20927 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20930 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20948
+/* 20934 */ MCD_OPC_CheckPredicate, 0, 19, 77, // Skip to: 40669
+/* 20938 */ MCD_OPC_CheckField, 21, 1, 1, 13, 77, // Skip to: 40669
+/* 20944 */ MCD_OPC_Decode, 230, 8, 89, // Opcode: MULv2i32
+/* 20948 */ MCD_OPC_FilterValue, 2, 5, 77, // Skip to: 40669
+/* 20952 */ MCD_OPC_CheckPredicate, 0, 1, 77, // Skip to: 40669
+/* 20956 */ MCD_OPC_CheckField, 21, 1, 1, 251, 76, // Skip to: 40669
+/* 20962 */ MCD_OPC_Decode, 234, 8, 112, // Opcode: MULv4i32
+/* 20966 */ MCD_OPC_FilterValue, 40, 75, 0, // Skip to: 21045
+/* 20970 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 20973 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 20991
+/* 20977 */ MCD_OPC_CheckPredicate, 0, 232, 76, // Skip to: 40669
+/* 20981 */ MCD_OPC_CheckField, 21, 1, 1, 226, 76, // Skip to: 40669
+/* 20987 */ MCD_OPC_Decode, 250, 10, 105, // Opcode: SMLSLv2i32_v2i64
+/* 20991 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21009
+/* 20995 */ MCD_OPC_CheckPredicate, 0, 214, 76, // Skip to: 40669
+/* 20999 */ MCD_OPC_CheckField, 21, 1, 1, 208, 76, // Skip to: 40669
+/* 21005 */ MCD_OPC_Decode, 241, 16, 105, // Opcode: UMLSLv2i32_v2i64
+/* 21009 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21027
+/* 21013 */ MCD_OPC_CheckPredicate, 0, 196, 76, // Skip to: 40669
+/* 21017 */ MCD_OPC_CheckField, 21, 1, 1, 190, 76, // Skip to: 40669
+/* 21023 */ MCD_OPC_Decode, 254, 10, 120, // Opcode: SMLSLv4i32_v2i64
+/* 21027 */ MCD_OPC_FilterValue, 3, 182, 76, // Skip to: 40669
+/* 21031 */ MCD_OPC_CheckPredicate, 0, 178, 76, // Skip to: 40669
+/* 21035 */ MCD_OPC_CheckField, 21, 1, 1, 172, 76, // Skip to: 40669
+/* 21041 */ MCD_OPC_Decode, 245, 16, 120, // Opcode: UMLSLv4i32_v2i64
+/* 21045 */ MCD_OPC_FilterValue, 41, 75, 0, // Skip to: 21124
+/* 21049 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21052 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21070
+/* 21056 */ MCD_OPC_CheckPredicate, 0, 153, 76, // Skip to: 40669
+/* 21060 */ MCD_OPC_CheckField, 21, 1, 1, 147, 76, // Skip to: 40669
+/* 21066 */ MCD_OPC_Decode, 204, 10, 89, // Opcode: SMAXPv2i32
+/* 21070 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21088
+/* 21074 */ MCD_OPC_CheckPredicate, 0, 135, 76, // Skip to: 40669
+/* 21078 */ MCD_OPC_CheckField, 21, 1, 1, 129, 76, // Skip to: 40669
+/* 21084 */ MCD_OPC_Decode, 196, 16, 89, // Opcode: UMAXPv2i32
+/* 21088 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21106
+/* 21092 */ MCD_OPC_CheckPredicate, 0, 117, 76, // Skip to: 40669
+/* 21096 */ MCD_OPC_CheckField, 21, 1, 1, 111, 76, // Skip to: 40669
+/* 21102 */ MCD_OPC_Decode, 206, 10, 112, // Opcode: SMAXPv4i32
+/* 21106 */ MCD_OPC_FilterValue, 3, 103, 76, // Skip to: 40669
+/* 21110 */ MCD_OPC_CheckPredicate, 0, 99, 76, // Skip to: 40669
+/* 21114 */ MCD_OPC_CheckField, 21, 1, 1, 93, 76, // Skip to: 40669
+/* 21120 */ MCD_OPC_Decode, 198, 16, 112, // Opcode: UMAXPv4i32
+/* 21124 */ MCD_OPC_FilterValue, 42, 155, 0, // Skip to: 21283
+/* 21128 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 21131 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 21162
+/* 21135 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21138 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 21150
+/* 21142 */ MCD_OPC_CheckPredicate, 0, 67, 76, // Skip to: 40669
+/* 21146 */ MCD_OPC_Decode, 232, 1, 90, // Opcode: CMLTv2i32rz
+/* 21150 */ MCD_OPC_FilterValue, 2, 59, 76, // Skip to: 40669
+/* 21154 */ MCD_OPC_CheckPredicate, 0, 55, 76, // Skip to: 40669
+/* 21158 */ MCD_OPC_Decode, 235, 1, 117, // Opcode: CMLTv4i32rz
+/* 21162 */ MCD_OPC_FilterValue, 33, 51, 0, // Skip to: 21217
+/* 21166 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21169 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 21181
+/* 21173 */ MCD_OPC_CheckPredicate, 0, 36, 76, // Skip to: 40669
+/* 21177 */ MCD_OPC_Decode, 206, 3, 90, // Opcode: FCVTPSv2f32
+/* 21181 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 21193
+/* 21185 */ MCD_OPC_CheckPredicate, 0, 24, 76, // Skip to: 40669
+/* 21189 */ MCD_OPC_Decode, 215, 3, 90, // Opcode: FCVTPUv2f32
+/* 21193 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 21205
+/* 21197 */ MCD_OPC_CheckPredicate, 0, 12, 76, // Skip to: 40669
+/* 21201 */ MCD_OPC_Decode, 208, 3, 117, // Opcode: FCVTPSv4f32
+/* 21205 */ MCD_OPC_FilterValue, 3, 4, 76, // Skip to: 40669
+/* 21209 */ MCD_OPC_CheckPredicate, 0, 0, 76, // Skip to: 40669
+/* 21213 */ MCD_OPC_Decode, 217, 3, 117, // Opcode: FCVTPUv4f32
+/* 21217 */ MCD_OPC_FilterValue, 48, 29, 0, // Skip to: 21250
+/* 21221 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21224 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 21237
+/* 21228 */ MCD_OPC_CheckPredicate, 0, 237, 75, // Skip to: 40669
+/* 21232 */ MCD_OPC_Decode, 211, 10, 139, 1, // Opcode: SMAXVv4i32v
+/* 21237 */ MCD_OPC_FilterValue, 3, 228, 75, // Skip to: 40669
+/* 21241 */ MCD_OPC_CheckPredicate, 0, 224, 75, // Skip to: 40669
+/* 21245 */ MCD_OPC_Decode, 203, 16, 139, 1, // Opcode: UMAXVv4i32v
+/* 21250 */ MCD_OPC_FilterValue, 49, 215, 75, // Skip to: 40669
+/* 21254 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21257 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 21270
+/* 21261 */ MCD_OPC_CheckPredicate, 0, 204, 75, // Skip to: 40669
+/* 21265 */ MCD_OPC_Decode, 229, 10, 139, 1, // Opcode: SMINVv4i32v
+/* 21270 */ MCD_OPC_FilterValue, 3, 195, 75, // Skip to: 40669
+/* 21274 */ MCD_OPC_CheckPredicate, 0, 191, 75, // Skip to: 40669
+/* 21278 */ MCD_OPC_Decode, 220, 16, 139, 1, // Opcode: UMINVv4i32v
+/* 21283 */ MCD_OPC_FilterValue, 43, 75, 0, // Skip to: 21362
/* 21287 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
/* 21290 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21308
-/* 21294 */ MCD_OPC_CheckPredicate, 0, 4, 96, // Skip to: 45878
-/* 21298 */ MCD_OPC_CheckField, 21, 1, 1, 254, 95, // Skip to: 45878
-/* 21304 */ MCD_OPC_Decode, 148, 14, 94, // Opcode: SQDMLSLvvv_4s4h
-/* 21308 */ MCD_OPC_FilterValue, 2, 246, 95, // Skip to: 45878
-/* 21312 */ MCD_OPC_CheckPredicate, 0, 242, 95, // Skip to: 45878
-/* 21316 */ MCD_OPC_CheckField, 21, 1, 1, 236, 95, // Skip to: 45878
-/* 21322 */ MCD_OPC_Decode, 136, 14, 110, // Opcode: SQDMLSL2vvv_4s8h
-/* 21326 */ MCD_OPC_FilterValue, 45, 75, 0, // Skip to: 21405
-/* 21330 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21333 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21351
-/* 21337 */ MCD_OPC_CheckPredicate, 0, 217, 95, // Skip to: 45878
-/* 21341 */ MCD_OPC_CheckField, 21, 1, 1, 211, 95, // Skip to: 45878
-/* 21347 */ MCD_OPC_Decode, 160, 14, 78, // Opcode: SQDMULHvvv_4H
-/* 21351 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21369
-/* 21355 */ MCD_OPC_CheckPredicate, 0, 199, 95, // Skip to: 45878
-/* 21359 */ MCD_OPC_CheckField, 21, 1, 1, 193, 95, // Skip to: 45878
-/* 21365 */ MCD_OPC_Decode, 199, 14, 78, // Opcode: SQRDMULHvvv_4H
-/* 21369 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21387
-/* 21373 */ MCD_OPC_CheckPredicate, 0, 181, 95, // Skip to: 45878
-/* 21377 */ MCD_OPC_CheckField, 21, 1, 1, 175, 95, // Skip to: 45878
-/* 21383 */ MCD_OPC_Decode, 162, 14, 102, // Opcode: SQDMULHvvv_8H
-/* 21387 */ MCD_OPC_FilterValue, 3, 167, 95, // Skip to: 45878
-/* 21391 */ MCD_OPC_CheckPredicate, 0, 163, 95, // Skip to: 45878
-/* 21395 */ MCD_OPC_CheckField, 21, 1, 1, 157, 95, // Skip to: 45878
-/* 21401 */ MCD_OPC_Decode, 201, 14, 102, // Opcode: SQRDMULHvvv_8H
-/* 21405 */ MCD_OPC_FilterValue, 46, 122, 0, // Skip to: 21531
+/* 21294 */ MCD_OPC_CheckPredicate, 0, 171, 75, // Skip to: 40669
+/* 21298 */ MCD_OPC_CheckField, 21, 1, 1, 165, 75, // Skip to: 40669
+/* 21304 */ MCD_OPC_Decode, 222, 10, 89, // Opcode: SMINPv2i32
+/* 21308 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21326
+/* 21312 */ MCD_OPC_CheckPredicate, 0, 153, 75, // Skip to: 40669
+/* 21316 */ MCD_OPC_CheckField, 21, 1, 1, 147, 75, // Skip to: 40669
+/* 21322 */ MCD_OPC_Decode, 213, 16, 89, // Opcode: UMINPv2i32
+/* 21326 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21344
+/* 21330 */ MCD_OPC_CheckPredicate, 0, 135, 75, // Skip to: 40669
+/* 21334 */ MCD_OPC_CheckField, 21, 1, 1, 129, 75, // Skip to: 40669
+/* 21340 */ MCD_OPC_Decode, 224, 10, 112, // Opcode: SMINPv4i32
+/* 21344 */ MCD_OPC_FilterValue, 3, 121, 75, // Skip to: 40669
+/* 21348 */ MCD_OPC_CheckPredicate, 0, 117, 75, // Skip to: 40669
+/* 21352 */ MCD_OPC_CheckField, 21, 1, 1, 111, 75, // Skip to: 40669
+/* 21358 */ MCD_OPC_Decode, 215, 16, 112, // Opcode: UMINPv4i32
+/* 21362 */ MCD_OPC_FilterValue, 44, 39, 0, // Skip to: 21405
+/* 21366 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21369 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21387
+/* 21373 */ MCD_OPC_CheckPredicate, 0, 92, 75, // Skip to: 40669
+/* 21377 */ MCD_OPC_CheckField, 21, 1, 1, 86, 75, // Skip to: 40669
+/* 21383 */ MCD_OPC_Decode, 186, 11, 105, // Opcode: SQDMLSLv2i32_v2i64
+/* 21387 */ MCD_OPC_FilterValue, 2, 78, 75, // Skip to: 40669
+/* 21391 */ MCD_OPC_CheckPredicate, 0, 74, 75, // Skip to: 40669
+/* 21395 */ MCD_OPC_CheckField, 21, 1, 1, 68, 75, // Skip to: 40669
+/* 21401 */ MCD_OPC_Decode, 190, 11, 120, // Opcode: SQDMLSLv4i32_v2i64
+/* 21405 */ MCD_OPC_FilterValue, 45, 75, 0, // Skip to: 21484
/* 21409 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21412 */ MCD_OPC_FilterValue, 0, 25, 0, // Skip to: 21441
-/* 21416 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 21419 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 21430
-/* 21423 */ MCD_OPC_CheckPredicate, 0, 131, 95, // Skip to: 45878
-/* 21427 */ MCD_OPC_Decode, 22, 79, // Opcode: ABS4h
-/* 21430 */ MCD_OPC_FilterValue, 49, 124, 95, // Skip to: 45878
-/* 21434 */ MCD_OPC_CheckPredicate, 0, 120, 95, // Skip to: 45878
-/* 21438 */ MCD_OPC_Decode, 69, 89, // Opcode: ADDV_1h4h
-/* 21441 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21459
-/* 21445 */ MCD_OPC_CheckPredicate, 0, 109, 95, // Skip to: 45878
-/* 21449 */ MCD_OPC_CheckField, 16, 6, 32, 103, 95, // Skip to: 45878
-/* 21455 */ MCD_OPC_Decode, 181, 11, 79, // Opcode: NEG4h
-/* 21459 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 21500
-/* 21463 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 21466 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 21477
-/* 21470 */ MCD_OPC_CheckPredicate, 0, 84, 95, // Skip to: 45878
-/* 21474 */ MCD_OPC_Decode, 25, 107, // Opcode: ABS8h
-/* 21477 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 21489
-/* 21481 */ MCD_OPC_CheckPredicate, 0, 73, 95, // Skip to: 45878
-/* 21485 */ MCD_OPC_Decode, 189, 4, 107, // Opcode: FCVTMS_2d
-/* 21489 */ MCD_OPC_FilterValue, 49, 65, 95, // Skip to: 45878
-/* 21493 */ MCD_OPC_CheckPredicate, 0, 61, 95, // Skip to: 45878
-/* 21497 */ MCD_OPC_Decode, 70, 121, // Opcode: ADDV_1h8h
-/* 21500 */ MCD_OPC_FilterValue, 3, 54, 95, // Skip to: 45878
-/* 21504 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 21507 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21519
-/* 21511 */ MCD_OPC_CheckPredicate, 0, 43, 95, // Skip to: 45878
-/* 21515 */ MCD_OPC_Decode, 184, 11, 107, // Opcode: NEG8h
-/* 21519 */ MCD_OPC_FilterValue, 33, 35, 95, // Skip to: 45878
-/* 21523 */ MCD_OPC_CheckPredicate, 0, 31, 95, // Skip to: 45878
-/* 21527 */ MCD_OPC_Decode, 198, 4, 107, // Opcode: FCVTMU_2d
-/* 21531 */ MCD_OPC_FilterValue, 47, 37, 0, // Skip to: 21572
-/* 21535 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21538 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 21555
-/* 21542 */ MCD_OPC_CheckPredicate, 0, 12, 95, // Skip to: 45878
-/* 21546 */ MCD_OPC_CheckField, 21, 1, 1, 6, 95, // Skip to: 45878
-/* 21552 */ MCD_OPC_Decode, 40, 78, // Opcode: ADDP_4H
-/* 21555 */ MCD_OPC_FilterValue, 2, 255, 94, // Skip to: 45878
-/* 21559 */ MCD_OPC_CheckPredicate, 0, 251, 94, // Skip to: 45878
-/* 21563 */ MCD_OPC_CheckField, 21, 1, 1, 245, 94, // Skip to: 45878
-/* 21569 */ MCD_OPC_Decode, 43, 102, // Opcode: ADDP_8H
-/* 21572 */ MCD_OPC_FilterValue, 48, 75, 0, // Skip to: 21651
-/* 21576 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21579 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21597
-/* 21583 */ MCD_OPC_CheckPredicate, 0, 227, 94, // Skip to: 45878
-/* 21587 */ MCD_OPC_CheckField, 21, 1, 1, 221, 94, // Skip to: 45878
-/* 21593 */ MCD_OPC_Decode, 225, 13, 74, // Opcode: SMULLvvv_4s4h
-/* 21597 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21615
-/* 21601 */ MCD_OPC_CheckPredicate, 0, 209, 94, // Skip to: 45878
-/* 21605 */ MCD_OPC_CheckField, 21, 1, 1, 203, 94, // Skip to: 45878
-/* 21611 */ MCD_OPC_Decode, 130, 20, 74, // Opcode: UMULLvvv_4s4h
-/* 21615 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21633
-/* 21619 */ MCD_OPC_CheckPredicate, 0, 191, 94, // Skip to: 45878
-/* 21623 */ MCD_OPC_CheckField, 21, 1, 1, 185, 94, // Skip to: 45878
-/* 21629 */ MCD_OPC_Decode, 218, 13, 102, // Opcode: SMULL2vvv_4s8h
-/* 21633 */ MCD_OPC_FilterValue, 3, 177, 94, // Skip to: 45878
-/* 21637 */ MCD_OPC_CheckPredicate, 0, 173, 94, // Skip to: 45878
-/* 21641 */ MCD_OPC_CheckField, 21, 1, 1, 167, 94, // Skip to: 45878
-/* 21647 */ MCD_OPC_Decode, 251, 19, 102, // Opcode: UMULL2vvv_4s8h
-/* 21651 */ MCD_OPC_FilterValue, 49, 39, 0, // Skip to: 21694
-/* 21655 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21658 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21676
-/* 21662 */ MCD_OPC_CheckPredicate, 0, 148, 94, // Skip to: 45878
-/* 21666 */ MCD_OPC_CheckField, 21, 1, 1, 142, 94, // Skip to: 45878
-/* 21672 */ MCD_OPC_Decode, 173, 5, 102, // Opcode: FMAXNMvvv_2D
-/* 21676 */ MCD_OPC_FilterValue, 3, 134, 94, // Skip to: 45878
-/* 21680 */ MCD_OPC_CheckPredicate, 0, 130, 94, // Skip to: 45878
-/* 21684 */ MCD_OPC_CheckField, 21, 1, 1, 124, 94, // Skip to: 45878
-/* 21690 */ MCD_OPC_Decode, 167, 5, 102, // Opcode: FMAXNMPvvv_2D
-/* 21694 */ MCD_OPC_FilterValue, 50, 39, 0, // Skip to: 21737
-/* 21698 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21701 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21719
-/* 21705 */ MCD_OPC_CheckPredicate, 0, 105, 94, // Skip to: 45878
-/* 21709 */ MCD_OPC_CheckField, 16, 6, 33, 99, 94, // Skip to: 45878
-/* 21715 */ MCD_OPC_Decode, 167, 4, 107, // Opcode: FCVTAS_2d
-/* 21719 */ MCD_OPC_FilterValue, 3, 91, 94, // Skip to: 45878
-/* 21723 */ MCD_OPC_CheckPredicate, 0, 87, 94, // Skip to: 45878
-/* 21727 */ MCD_OPC_CheckField, 16, 6, 33, 81, 94, // Skip to: 45878
-/* 21733 */ MCD_OPC_Decode, 176, 4, 107, // Opcode: FCVTAU_2d
-/* 21737 */ MCD_OPC_FilterValue, 51, 20, 0, // Skip to: 21761
-/* 21741 */ MCD_OPC_CheckPredicate, 0, 69, 94, // Skip to: 45878
-/* 21745 */ MCD_OPC_CheckField, 29, 3, 2, 63, 94, // Skip to: 45878
-/* 21751 */ MCD_OPC_CheckField, 21, 1, 1, 57, 94, // Skip to: 45878
-/* 21757 */ MCD_OPC_Decode, 214, 5, 110, // Opcode: FMLAvvv_2D
-/* 21761 */ MCD_OPC_FilterValue, 52, 39, 0, // Skip to: 21804
-/* 21765 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21768 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21786
-/* 21772 */ MCD_OPC_CheckPredicate, 0, 38, 94, // Skip to: 45878
-/* 21776 */ MCD_OPC_CheckField, 21, 1, 1, 32, 94, // Skip to: 45878
-/* 21782 */ MCD_OPC_Decode, 176, 14, 74, // Opcode: SQDMULLvvv_4s4h
-/* 21786 */ MCD_OPC_FilterValue, 2, 24, 94, // Skip to: 45878
-/* 21790 */ MCD_OPC_CheckPredicate, 0, 20, 94, // Skip to: 45878
-/* 21794 */ MCD_OPC_CheckField, 21, 1, 1, 14, 94, // Skip to: 45878
-/* 21800 */ MCD_OPC_Decode, 164, 14, 102, // Opcode: SQDMULL2vvv_4s8h
-/* 21804 */ MCD_OPC_FilterValue, 53, 39, 0, // Skip to: 21847
-/* 21808 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21811 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21829
-/* 21815 */ MCD_OPC_CheckPredicate, 0, 251, 93, // Skip to: 45878
-/* 21819 */ MCD_OPC_CheckField, 21, 1, 1, 245, 93, // Skip to: 45878
-/* 21825 */ MCD_OPC_Decode, 238, 3, 102, // Opcode: FADDvvv_2D
-/* 21829 */ MCD_OPC_FilterValue, 3, 237, 93, // Skip to: 45878
-/* 21833 */ MCD_OPC_CheckPredicate, 0, 233, 93, // Skip to: 45878
-/* 21837 */ MCD_OPC_CheckField, 21, 1, 1, 227, 93, // Skip to: 45878
-/* 21843 */ MCD_OPC_Decode, 231, 3, 102, // Opcode: FADDP_2D
-/* 21847 */ MCD_OPC_FilterValue, 54, 39, 0, // Skip to: 21890
-/* 21851 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21854 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21872
-/* 21858 */ MCD_OPC_CheckPredicate, 0, 208, 93, // Skip to: 45878
-/* 21862 */ MCD_OPC_CheckField, 16, 6, 33, 202, 93, // Skip to: 45878
-/* 21868 */ MCD_OPC_Decode, 215, 12, 107, // Opcode: SCVTF_2d
-/* 21872 */ MCD_OPC_FilterValue, 3, 194, 93, // Skip to: 45878
-/* 21876 */ MCD_OPC_CheckPredicate, 0, 190, 93, // Skip to: 45878
-/* 21880 */ MCD_OPC_CheckField, 16, 6, 33, 184, 93, // Skip to: 45878
-/* 21886 */ MCD_OPC_Decode, 160, 19, 107, // Opcode: UCVTF_2d
-/* 21890 */ MCD_OPC_FilterValue, 55, 39, 0, // Skip to: 21933
-/* 21894 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21897 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21915
-/* 21901 */ MCD_OPC_CheckPredicate, 0, 165, 93, // Skip to: 45878
-/* 21905 */ MCD_OPC_CheckField, 21, 1, 1, 159, 93, // Skip to: 45878
-/* 21911 */ MCD_OPC_Decode, 247, 5, 102, // Opcode: FMULXvvv_2D
-/* 21915 */ MCD_OPC_FilterValue, 3, 151, 93, // Skip to: 45878
-/* 21919 */ MCD_OPC_CheckPredicate, 0, 147, 93, // Skip to: 45878
-/* 21923 */ MCD_OPC_CheckField, 21, 1, 1, 141, 93, // Skip to: 45878
-/* 21929 */ MCD_OPC_Decode, 129, 6, 102, // Opcode: FMULvvv_2D
-/* 21933 */ MCD_OPC_FilterValue, 57, 39, 0, // Skip to: 21976
-/* 21937 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 21940 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21958
-/* 21944 */ MCD_OPC_CheckPredicate, 0, 122, 93, // Skip to: 45878
-/* 21948 */ MCD_OPC_CheckField, 21, 1, 1, 116, 93, // Skip to: 45878
-/* 21954 */ MCD_OPC_Decode, 252, 3, 102, // Opcode: FCMEQvvv_2D
-/* 21958 */ MCD_OPC_FilterValue, 3, 108, 93, // Skip to: 45878
-/* 21962 */ MCD_OPC_CheckPredicate, 0, 104, 93, // Skip to: 45878
-/* 21966 */ MCD_OPC_CheckField, 21, 1, 1, 98, 93, // Skip to: 45878
-/* 21972 */ MCD_OPC_Decode, 134, 4, 102, // Opcode: FCMGEvvv_2D
-/* 21976 */ MCD_OPC_FilterValue, 59, 20, 0, // Skip to: 22000
-/* 21980 */ MCD_OPC_CheckPredicate, 0, 86, 93, // Skip to: 45878
-/* 21984 */ MCD_OPC_CheckField, 29, 3, 3, 80, 93, // Skip to: 45878
-/* 21990 */ MCD_OPC_CheckField, 21, 1, 1, 74, 93, // Skip to: 45878
-/* 21996 */ MCD_OPC_Decode, 223, 3, 102, // Opcode: FACGEvvv_2D
-/* 22000 */ MCD_OPC_FilterValue, 61, 39, 0, // Skip to: 22043
-/* 22004 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22007 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22025
-/* 22011 */ MCD_OPC_CheckPredicate, 0, 55, 93, // Skip to: 45878
-/* 22015 */ MCD_OPC_CheckField, 21, 1, 1, 49, 93, // Skip to: 45878
-/* 22021 */ MCD_OPC_Decode, 184, 5, 102, // Opcode: FMAXvvv_2D
-/* 22025 */ MCD_OPC_FilterValue, 3, 41, 93, // Skip to: 45878
-/* 22029 */ MCD_OPC_CheckPredicate, 0, 37, 93, // Skip to: 45878
-/* 22033 */ MCD_OPC_CheckField, 21, 1, 1, 31, 93, // Skip to: 45878
-/* 22039 */ MCD_OPC_Decode, 178, 5, 102, // Opcode: FMAXPvvv_2D
-/* 22043 */ MCD_OPC_FilterValue, 63, 23, 93, // Skip to: 45878
-/* 22047 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22050 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22068
-/* 22054 */ MCD_OPC_CheckPredicate, 0, 12, 93, // Skip to: 45878
-/* 22058 */ MCD_OPC_CheckField, 21, 1, 1, 6, 93, // Skip to: 45878
-/* 22064 */ MCD_OPC_Decode, 150, 6, 102, // Opcode: FRECPSvvv_2D
-/* 22068 */ MCD_OPC_FilterValue, 3, 254, 92, // Skip to: 45878
-/* 22072 */ MCD_OPC_CheckPredicate, 0, 250, 92, // Skip to: 45878
-/* 22076 */ MCD_OPC_CheckField, 21, 1, 1, 244, 92, // Skip to: 45878
-/* 22082 */ MCD_OPC_Decode, 160, 5, 102, // Opcode: FDIVvvv_2D
-/* 22086 */ MCD_OPC_FilterValue, 10, 167, 19, // Skip to: 27121
-/* 22090 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 22093 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 22172
-/* 22097 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22100 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22118
-/* 22104 */ MCD_OPC_CheckPredicate, 0, 218, 92, // Skip to: 45878
-/* 22108 */ MCD_OPC_CheckField, 21, 1, 1, 212, 92, // Skip to: 45878
-/* 22114 */ MCD_OPC_Decode, 196, 12, 74, // Opcode: SADDLvvv_2d2s
-/* 22118 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22136
-/* 22122 */ MCD_OPC_CheckPredicate, 0, 200, 92, // Skip to: 45878
-/* 22126 */ MCD_OPC_CheckField, 21, 1, 1, 194, 92, // Skip to: 45878
-/* 22132 */ MCD_OPC_Decode, 145, 19, 74, // Opcode: UADDLvvv_2d2s
-/* 22136 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22154
-/* 22140 */ MCD_OPC_CheckPredicate, 0, 182, 92, // Skip to: 45878
-/* 22144 */ MCD_OPC_CheckField, 21, 1, 1, 176, 92, // Skip to: 45878
-/* 22150 */ MCD_OPC_Decode, 182, 12, 102, // Opcode: SADDL2vvv_2d4s
-/* 22154 */ MCD_OPC_FilterValue, 3, 168, 92, // Skip to: 45878
-/* 22158 */ MCD_OPC_CheckPredicate, 0, 164, 92, // Skip to: 45878
-/* 22162 */ MCD_OPC_CheckField, 21, 1, 1, 158, 92, // Skip to: 45878
-/* 22168 */ MCD_OPC_Decode, 131, 19, 102, // Opcode: UADDL2vvv_2d4s
-/* 22172 */ MCD_OPC_FilterValue, 1, 75, 0, // Skip to: 22251
-/* 22176 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22179 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22197
-/* 22183 */ MCD_OPC_CheckPredicate, 0, 139, 92, // Skip to: 45878
-/* 22187 */ MCD_OPC_CheckField, 21, 1, 1, 133, 92, // Skip to: 45878
-/* 22193 */ MCD_OPC_Decode, 243, 12, 78, // Opcode: SHADDvvv_2S
-/* 22197 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22215
-/* 22201 */ MCD_OPC_CheckPredicate, 0, 121, 92, // Skip to: 45878
-/* 22205 */ MCD_OPC_CheckField, 21, 1, 1, 115, 92, // Skip to: 45878
-/* 22211 */ MCD_OPC_Decode, 178, 19, 78, // Opcode: UHADDvvv_2S
-/* 22215 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22233
-/* 22219 */ MCD_OPC_CheckPredicate, 0, 103, 92, // Skip to: 45878
-/* 22223 */ MCD_OPC_CheckField, 21, 1, 1, 97, 92, // Skip to: 45878
-/* 22229 */ MCD_OPC_Decode, 245, 12, 102, // Opcode: SHADDvvv_4S
-/* 22233 */ MCD_OPC_FilterValue, 3, 89, 92, // Skip to: 45878
-/* 22237 */ MCD_OPC_CheckPredicate, 0, 85, 92, // Skip to: 45878
-/* 22241 */ MCD_OPC_CheckField, 21, 1, 1, 79, 92, // Skip to: 45878
-/* 22247 */ MCD_OPC_Decode, 180, 19, 102, // Opcode: UHADDvvv_4S
-/* 22251 */ MCD_OPC_FilterValue, 2, 39, 0, // Skip to: 22294
-/* 22255 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22258 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22276
-/* 22262 */ MCD_OPC_CheckPredicate, 0, 60, 92, // Skip to: 45878
-/* 22266 */ MCD_OPC_CheckField, 16, 6, 32, 54, 92, // Skip to: 45878
-/* 22272 */ MCD_OPC_Decode, 131, 12, 79, // Opcode: REV64_2s
-/* 22276 */ MCD_OPC_FilterValue, 2, 46, 92, // Skip to: 45878
-/* 22280 */ MCD_OPC_CheckPredicate, 0, 42, 92, // Skip to: 45878
-/* 22284 */ MCD_OPC_CheckField, 16, 6, 32, 36, 92, // Skip to: 45878
-/* 22290 */ MCD_OPC_Decode, 133, 12, 107, // Opcode: REV64_4s
-/* 22294 */ MCD_OPC_FilterValue, 3, 75, 0, // Skip to: 22373
-/* 22298 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22301 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22319
-/* 22305 */ MCD_OPC_CheckPredicate, 0, 17, 92, // Skip to: 45878
-/* 22309 */ MCD_OPC_CheckField, 21, 1, 1, 11, 92, // Skip to: 45878
-/* 22315 */ MCD_OPC_Decode, 244, 13, 78, // Opcode: SQADDvvv_2S
-/* 22319 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22337
-/* 22323 */ MCD_OPC_CheckPredicate, 0, 255, 91, // Skip to: 45878
-/* 22327 */ MCD_OPC_CheckField, 21, 1, 1, 249, 91, // Skip to: 45878
-/* 22333 */ MCD_OPC_Decode, 138, 20, 78, // Opcode: UQADDvvv_2S
-/* 22337 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22355
-/* 22341 */ MCD_OPC_CheckPredicate, 0, 237, 91, // Skip to: 45878
-/* 22345 */ MCD_OPC_CheckField, 21, 1, 1, 231, 91, // Skip to: 45878
-/* 22351 */ MCD_OPC_Decode, 246, 13, 102, // Opcode: SQADDvvv_4S
-/* 22355 */ MCD_OPC_FilterValue, 3, 223, 91, // Skip to: 45878
-/* 22359 */ MCD_OPC_CheckPredicate, 0, 219, 91, // Skip to: 45878
-/* 22363 */ MCD_OPC_CheckField, 21, 1, 1, 213, 91, // Skip to: 45878
-/* 22369 */ MCD_OPC_Decode, 140, 20, 102, // Opcode: UQADDvvv_4S
-/* 22373 */ MCD_OPC_FilterValue, 4, 75, 0, // Skip to: 22452
-/* 22377 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22380 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22398
-/* 22384 */ MCD_OPC_CheckPredicate, 0, 194, 91, // Skip to: 45878
-/* 22388 */ MCD_OPC_CheckField, 21, 1, 1, 188, 91, // Skip to: 45878
-/* 22394 */ MCD_OPC_Decode, 202, 12, 82, // Opcode: SADDWvvv_2d2s
-/* 22398 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22416
-/* 22402 */ MCD_OPC_CheckPredicate, 0, 176, 91, // Skip to: 45878
-/* 22406 */ MCD_OPC_CheckField, 21, 1, 1, 170, 91, // Skip to: 45878
-/* 22412 */ MCD_OPC_Decode, 151, 19, 82, // Opcode: UADDWvvv_2d2s
-/* 22416 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22434
-/* 22420 */ MCD_OPC_CheckPredicate, 0, 158, 91, // Skip to: 45878
-/* 22424 */ MCD_OPC_CheckField, 21, 1, 1, 152, 91, // Skip to: 45878
-/* 22430 */ MCD_OPC_Decode, 199, 12, 102, // Opcode: SADDW2vvv_2d4s
-/* 22434 */ MCD_OPC_FilterValue, 3, 144, 91, // Skip to: 45878
-/* 22438 */ MCD_OPC_CheckPredicate, 0, 140, 91, // Skip to: 45878
-/* 22442 */ MCD_OPC_CheckField, 21, 1, 1, 134, 91, // Skip to: 45878
-/* 22448 */ MCD_OPC_Decode, 148, 19, 102, // Opcode: UADDW2vvv_2d4s
-/* 22452 */ MCD_OPC_FilterValue, 5, 75, 0, // Skip to: 22531
-/* 22456 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22459 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22477
-/* 22463 */ MCD_OPC_CheckPredicate, 0, 115, 91, // Skip to: 45878
-/* 22467 */ MCD_OPC_CheckField, 21, 1, 1, 109, 91, // Skip to: 45878
-/* 22473 */ MCD_OPC_Decode, 172, 15, 78, // Opcode: SRHADDvvv_2S
-/* 22477 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22495
-/* 22481 */ MCD_OPC_CheckPredicate, 0, 97, 91, // Skip to: 45878
-/* 22485 */ MCD_OPC_CheckField, 21, 1, 1, 91, 91, // Skip to: 45878
-/* 22491 */ MCD_OPC_Decode, 217, 20, 78, // Opcode: URHADDvvv_2S
-/* 22495 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22513
-/* 22499 */ MCD_OPC_CheckPredicate, 0, 79, 91, // Skip to: 45878
-/* 22503 */ MCD_OPC_CheckField, 21, 1, 1, 73, 91, // Skip to: 45878
-/* 22509 */ MCD_OPC_Decode, 174, 15, 102, // Opcode: SRHADDvvv_4S
-/* 22513 */ MCD_OPC_FilterValue, 3, 65, 91, // Skip to: 45878
-/* 22517 */ MCD_OPC_CheckPredicate, 0, 61, 91, // Skip to: 45878
-/* 22521 */ MCD_OPC_CheckField, 21, 1, 1, 55, 91, // Skip to: 45878
-/* 22527 */ MCD_OPC_Decode, 219, 20, 102, // Opcode: URHADDvvv_4S
-/* 22531 */ MCD_OPC_FilterValue, 6, 39, 0, // Skip to: 22574
-/* 22535 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22538 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22556
-/* 22542 */ MCD_OPC_CheckPredicate, 0, 36, 91, // Skip to: 45878
-/* 22546 */ MCD_OPC_CheckField, 21, 1, 0, 30, 91, // Skip to: 45878
-/* 22552 */ MCD_OPC_Decode, 179, 21, 78, // Opcode: UZP1vvv_2s
-/* 22556 */ MCD_OPC_FilterValue, 2, 22, 91, // Skip to: 45878
-/* 22560 */ MCD_OPC_CheckPredicate, 0, 18, 91, // Skip to: 45878
-/* 22564 */ MCD_OPC_CheckField, 21, 1, 0, 12, 91, // Skip to: 45878
-/* 22570 */ MCD_OPC_Decode, 181, 21, 102, // Opcode: UZP1vvv_4s
-/* 22574 */ MCD_OPC_FilterValue, 7, 75, 0, // Skip to: 22653
-/* 22578 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22581 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22599
-/* 22585 */ MCD_OPC_CheckPredicate, 0, 249, 90, // Skip to: 45878
-/* 22589 */ MCD_OPC_CheckField, 21, 1, 1, 243, 90, // Skip to: 45878
-/* 22595 */ MCD_OPC_Decode, 203, 11, 78, // Opcode: ORRvvv_8B
-/* 22599 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22617
-/* 22603 */ MCD_OPC_CheckPredicate, 0, 231, 90, // Skip to: 45878
-/* 22607 */ MCD_OPC_CheckField, 21, 1, 1, 225, 90, // Skip to: 45878
-/* 22613 */ MCD_OPC_Decode, 228, 1, 98, // Opcode: BITvvv_8B
-/* 22617 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22635
-/* 22621 */ MCD_OPC_CheckPredicate, 0, 213, 90, // Skip to: 45878
-/* 22625 */ MCD_OPC_CheckField, 21, 1, 1, 207, 90, // Skip to: 45878
-/* 22631 */ MCD_OPC_Decode, 202, 11, 102, // Opcode: ORRvvv_16B
-/* 22635 */ MCD_OPC_FilterValue, 3, 199, 90, // Skip to: 45878
-/* 22639 */ MCD_OPC_CheckPredicate, 0, 195, 90, // Skip to: 45878
-/* 22643 */ MCD_OPC_CheckField, 21, 1, 1, 189, 90, // Skip to: 45878
-/* 22649 */ MCD_OPC_Decode, 227, 1, 110, // Opcode: BITvvv_16B
-/* 22653 */ MCD_OPC_FilterValue, 8, 75, 0, // Skip to: 22732
-/* 22657 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22660 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22678
-/* 22664 */ MCD_OPC_CheckPredicate, 0, 170, 90, // Skip to: 45878
-/* 22668 */ MCD_OPC_CheckField, 21, 1, 1, 164, 90, // Skip to: 45878
-/* 22674 */ MCD_OPC_Decode, 242, 15, 74, // Opcode: SSUBLvvv_2d2s
-/* 22678 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22696
-/* 22682 */ MCD_OPC_CheckPredicate, 0, 152, 90, // Skip to: 45878
-/* 22686 */ MCD_OPC_CheckField, 21, 1, 1, 146, 90, // Skip to: 45878
-/* 22692 */ MCD_OPC_Decode, 164, 21, 74, // Opcode: USUBLvvv_2d2s
-/* 22696 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22714
-/* 22700 */ MCD_OPC_CheckPredicate, 0, 134, 90, // Skip to: 45878
-/* 22704 */ MCD_OPC_CheckField, 21, 1, 1, 128, 90, // Skip to: 45878
-/* 22710 */ MCD_OPC_Decode, 239, 15, 102, // Opcode: SSUBL2vvv_2d4s
-/* 22714 */ MCD_OPC_FilterValue, 3, 120, 90, // Skip to: 45878
-/* 22718 */ MCD_OPC_CheckPredicate, 0, 116, 90, // Skip to: 45878
-/* 22722 */ MCD_OPC_CheckField, 21, 1, 1, 110, 90, // Skip to: 45878
-/* 22728 */ MCD_OPC_Decode, 161, 21, 102, // Opcode: USUBL2vvv_2d4s
-/* 22732 */ MCD_OPC_FilterValue, 9, 75, 0, // Skip to: 22811
-/* 22736 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22739 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22757
-/* 22743 */ MCD_OPC_CheckPredicate, 0, 91, 90, // Skip to: 45878
-/* 22747 */ MCD_OPC_CheckField, 21, 1, 1, 85, 90, // Skip to: 45878
-/* 22753 */ MCD_OPC_Decode, 141, 13, 78, // Opcode: SHSUBvvv_2S
-/* 22757 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22775
-/* 22761 */ MCD_OPC_CheckPredicate, 0, 73, 90, // Skip to: 45878
-/* 22765 */ MCD_OPC_CheckField, 21, 1, 1, 67, 90, // Skip to: 45878
-/* 22771 */ MCD_OPC_Decode, 184, 19, 78, // Opcode: UHSUBvvv_2S
-/* 22775 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22793
-/* 22779 */ MCD_OPC_CheckPredicate, 0, 55, 90, // Skip to: 45878
-/* 22783 */ MCD_OPC_CheckField, 21, 1, 1, 49, 90, // Skip to: 45878
-/* 22789 */ MCD_OPC_Decode, 143, 13, 102, // Opcode: SHSUBvvv_4S
-/* 22793 */ MCD_OPC_FilterValue, 3, 41, 90, // Skip to: 45878
-/* 22797 */ MCD_OPC_CheckPredicate, 0, 37, 90, // Skip to: 45878
-/* 22801 */ MCD_OPC_CheckField, 21, 1, 1, 31, 90, // Skip to: 45878
-/* 22807 */ MCD_OPC_Decode, 186, 19, 102, // Opcode: UHSUBvvv_4S
-/* 22811 */ MCD_OPC_FilterValue, 10, 165, 0, // Skip to: 22980
-/* 22815 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22818 */ MCD_OPC_FilterValue, 0, 46, 0, // Skip to: 22868
-/* 22822 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 22825 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 22837
-/* 22829 */ MCD_OPC_CheckPredicate, 0, 5, 90, // Skip to: 45878
-/* 22833 */ MCD_OPC_Decode, 209, 18, 78, // Opcode: TRN1vvv_2s
-/* 22837 */ MCD_OPC_FilterValue, 1, 253, 89, // Skip to: 45878
-/* 22841 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 22844 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 22856
-/* 22848 */ MCD_OPC_CheckPredicate, 0, 242, 89, // Skip to: 45878
-/* 22852 */ MCD_OPC_Decode, 186, 12, 79, // Opcode: SADDLP2s1d
-/* 22856 */ MCD_OPC_FilterValue, 1, 234, 89, // Skip to: 45878
-/* 22860 */ MCD_OPC_CheckPredicate, 0, 230, 89, // Skip to: 45878
-/* 22864 */ MCD_OPC_Decode, 203, 21, 84, // Opcode: XTN2d2s
-/* 22868 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 22899
-/* 22872 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 22875 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22887
-/* 22879 */ MCD_OPC_CheckPredicate, 0, 211, 89, // Skip to: 45878
-/* 22883 */ MCD_OPC_Decode, 135, 19, 79, // Opcode: UADDLP2s1d
-/* 22887 */ MCD_OPC_FilterValue, 33, 203, 89, // Skip to: 45878
-/* 22891 */ MCD_OPC_CheckPredicate, 0, 199, 89, // Skip to: 45878
-/* 22895 */ MCD_OPC_Decode, 162, 15, 84, // Opcode: SQXTUN2d2s
-/* 22899 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 22949
-/* 22903 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 22906 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 22918
-/* 22910 */ MCD_OPC_CheckPredicate, 0, 180, 89, // Skip to: 45878
-/* 22914 */ MCD_OPC_Decode, 211, 18, 102, // Opcode: TRN1vvv_4s
-/* 22918 */ MCD_OPC_FilterValue, 1, 172, 89, // Skip to: 45878
-/* 22922 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 22925 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 22937
-/* 22929 */ MCD_OPC_CheckPredicate, 0, 161, 89, // Skip to: 45878
-/* 22933 */ MCD_OPC_Decode, 188, 12, 107, // Opcode: SADDLP4s2d
-/* 22937 */ MCD_OPC_FilterValue, 1, 153, 89, // Skip to: 45878
-/* 22941 */ MCD_OPC_CheckPredicate, 0, 149, 89, // Skip to: 45878
-/* 22945 */ MCD_OPC_Decode, 204, 21, 116, // Opcode: XTN2d4s
-/* 22949 */ MCD_OPC_FilterValue, 3, 141, 89, // Skip to: 45878
-/* 22953 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 22956 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22968
-/* 22960 */ MCD_OPC_CheckPredicate, 0, 130, 89, // Skip to: 45878
-/* 22964 */ MCD_OPC_Decode, 137, 19, 107, // Opcode: UADDLP4s2d
-/* 22968 */ MCD_OPC_FilterValue, 33, 122, 89, // Skip to: 45878
-/* 22972 */ MCD_OPC_CheckPredicate, 0, 118, 89, // Skip to: 45878
-/* 22976 */ MCD_OPC_Decode, 163, 15, 116, // Opcode: SQXTUN2d4s
-/* 22980 */ MCD_OPC_FilterValue, 11, 75, 0, // Skip to: 23059
-/* 22984 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 22987 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23005
-/* 22991 */ MCD_OPC_CheckPredicate, 0, 99, 89, // Skip to: 45878
-/* 22995 */ MCD_OPC_CheckField, 21, 1, 1, 93, 89, // Skip to: 45878
-/* 23001 */ MCD_OPC_Decode, 148, 15, 78, // Opcode: SQSUBvvv_2S
-/* 23005 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 23023
-/* 23009 */ MCD_OPC_CheckPredicate, 0, 81, 89, // Skip to: 45878
-/* 23013 */ MCD_OPC_CheckField, 21, 1, 1, 75, 89, // Skip to: 45878
-/* 23019 */ MCD_OPC_Decode, 200, 20, 78, // Opcode: UQSUBvvv_2S
-/* 23023 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23041
-/* 23027 */ MCD_OPC_CheckPredicate, 0, 63, 89, // Skip to: 45878
-/* 23031 */ MCD_OPC_CheckField, 21, 1, 1, 57, 89, // Skip to: 45878
-/* 23037 */ MCD_OPC_Decode, 150, 15, 102, // Opcode: SQSUBvvv_4S
-/* 23041 */ MCD_OPC_FilterValue, 3, 49, 89, // Skip to: 45878
-/* 23045 */ MCD_OPC_CheckPredicate, 0, 45, 89, // Skip to: 45878
-/* 23049 */ MCD_OPC_CheckField, 21, 1, 1, 39, 89, // Skip to: 45878
-/* 23055 */ MCD_OPC_Decode, 202, 20, 102, // Opcode: UQSUBvvv_4S
-/* 23059 */ MCD_OPC_FilterValue, 12, 75, 0, // Skip to: 23138
-/* 23063 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23066 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23084
-/* 23070 */ MCD_OPC_CheckPredicate, 0, 20, 89, // Skip to: 45878
-/* 23074 */ MCD_OPC_CheckField, 21, 1, 1, 14, 89, // Skip to: 45878
-/* 23080 */ MCD_OPC_Decode, 248, 15, 82, // Opcode: SSUBWvvv_2d2s
-/* 23084 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 23102
-/* 23088 */ MCD_OPC_CheckPredicate, 0, 2, 89, // Skip to: 45878
-/* 23092 */ MCD_OPC_CheckField, 21, 1, 1, 252, 88, // Skip to: 45878
-/* 23098 */ MCD_OPC_Decode, 170, 21, 82, // Opcode: USUBWvvv_2d2s
-/* 23102 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23120
-/* 23106 */ MCD_OPC_CheckPredicate, 0, 240, 88, // Skip to: 45878
-/* 23110 */ MCD_OPC_CheckField, 21, 1, 1, 234, 88, // Skip to: 45878
-/* 23116 */ MCD_OPC_Decode, 245, 15, 102, // Opcode: SSUBW2vvv_2d4s
-/* 23120 */ MCD_OPC_FilterValue, 3, 226, 88, // Skip to: 45878
-/* 23124 */ MCD_OPC_CheckPredicate, 0, 222, 88, // Skip to: 45878
-/* 23128 */ MCD_OPC_CheckField, 21, 1, 1, 216, 88, // Skip to: 45878
-/* 23134 */ MCD_OPC_Decode, 167, 21, 102, // Opcode: USUBW2vvv_2d4s
-/* 23138 */ MCD_OPC_FilterValue, 13, 75, 0, // Skip to: 23217
-/* 23142 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23145 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23163
-/* 23149 */ MCD_OPC_CheckPredicate, 0, 197, 88, // Skip to: 45878
-/* 23153 */ MCD_OPC_CheckField, 21, 1, 1, 191, 88, // Skip to: 45878
-/* 23159 */ MCD_OPC_Decode, 181, 2, 78, // Opcode: CMGTvvv_2S
-/* 23163 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 23181
-/* 23167 */ MCD_OPC_CheckPredicate, 0, 179, 88, // Skip to: 45878
-/* 23171 */ MCD_OPC_CheckField, 21, 1, 1, 173, 88, // Skip to: 45878
-/* 23177 */ MCD_OPC_Decode, 189, 2, 78, // Opcode: CMHIvvv_2S
-/* 23181 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23199
-/* 23185 */ MCD_OPC_CheckPredicate, 0, 161, 88, // Skip to: 45878
-/* 23189 */ MCD_OPC_CheckField, 21, 1, 1, 155, 88, // Skip to: 45878
-/* 23195 */ MCD_OPC_Decode, 183, 2, 102, // Opcode: CMGTvvv_4S
-/* 23199 */ MCD_OPC_FilterValue, 3, 147, 88, // Skip to: 45878
-/* 23203 */ MCD_OPC_CheckPredicate, 0, 143, 88, // Skip to: 45878
-/* 23207 */ MCD_OPC_CheckField, 21, 1, 1, 137, 88, // Skip to: 45878
-/* 23213 */ MCD_OPC_Decode, 191, 2, 102, // Opcode: CMHIvvv_4S
-/* 23217 */ MCD_OPC_FilterValue, 14, 164, 0, // Skip to: 23385
-/* 23221 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23224 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 23261
-/* 23228 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 23231 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 23243
-/* 23235 */ MCD_OPC_CheckPredicate, 0, 111, 88, // Skip to: 45878
-/* 23239 */ MCD_OPC_Decode, 211, 21, 78, // Opcode: ZIP1vvv_2s
-/* 23243 */ MCD_OPC_FilterValue, 1, 103, 88, // Skip to: 45878
-/* 23247 */ MCD_OPC_CheckPredicate, 0, 99, 88, // Skip to: 45878
-/* 23251 */ MCD_OPC_CheckField, 16, 5, 0, 93, 88, // Skip to: 45878
-/* 23257 */ MCD_OPC_Decode, 162, 18, 88, // Opcode: SUQADD2s
-/* 23261 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 23292
-/* 23265 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 23268 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 23280
-/* 23272 */ MCD_OPC_CheckPredicate, 0, 74, 88, // Skip to: 45878
-/* 23276 */ MCD_OPC_Decode, 144, 21, 88, // Opcode: USQADD2s
-/* 23280 */ MCD_OPC_FilterValue, 33, 66, 88, // Skip to: 45878
-/* 23284 */ MCD_OPC_CheckPredicate, 0, 62, 88, // Skip to: 45878
-/* 23288 */ MCD_OPC_Decode, 249, 12, 101, // Opcode: SHLL2s2d
-/* 23292 */ MCD_OPC_FilterValue, 2, 46, 0, // Skip to: 23342
-/* 23296 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 23299 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 23311
-/* 23303 */ MCD_OPC_CheckPredicate, 0, 43, 88, // Skip to: 45878
-/* 23307 */ MCD_OPC_Decode, 213, 21, 102, // Opcode: ZIP1vvv_4s
-/* 23311 */ MCD_OPC_FilterValue, 1, 35, 88, // Skip to: 45878
-/* 23315 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 23318 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 23330
-/* 23322 */ MCD_OPC_CheckPredicate, 0, 24, 88, // Skip to: 45878
-/* 23326 */ MCD_OPC_Decode, 164, 18, 116, // Opcode: SUQADD4s
-/* 23330 */ MCD_OPC_FilterValue, 16, 16, 88, // Skip to: 45878
-/* 23334 */ MCD_OPC_CheckPredicate, 0, 12, 88, // Skip to: 45878
-/* 23338 */ MCD_OPC_Decode, 191, 12, 84, // Opcode: SADDLV_1d4s
-/* 23342 */ MCD_OPC_FilterValue, 3, 4, 88, // Skip to: 45878
-/* 23346 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 23349 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 23361
-/* 23353 */ MCD_OPC_CheckPredicate, 0, 249, 87, // Skip to: 45878
-/* 23357 */ MCD_OPC_Decode, 146, 21, 116, // Opcode: USQADD4s
-/* 23361 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 23373
-/* 23365 */ MCD_OPC_CheckPredicate, 0, 237, 87, // Skip to: 45878
-/* 23369 */ MCD_OPC_Decode, 251, 12, 101, // Opcode: SHLL4s2d
-/* 23373 */ MCD_OPC_FilterValue, 48, 229, 87, // Skip to: 45878
-/* 23377 */ MCD_OPC_CheckPredicate, 0, 225, 87, // Skip to: 45878
-/* 23381 */ MCD_OPC_Decode, 140, 19, 84, // Opcode: UADDLV_1d4s
-/* 23385 */ MCD_OPC_FilterValue, 15, 75, 0, // Skip to: 23464
-/* 23389 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23392 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23410
-/* 23396 */ MCD_OPC_CheckPredicate, 0, 206, 87, // Skip to: 45878
-/* 23400 */ MCD_OPC_CheckField, 21, 1, 1, 200, 87, // Skip to: 45878
-/* 23406 */ MCD_OPC_Decode, 165, 2, 78, // Opcode: CMGEvvv_2S
-/* 23410 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 23428
-/* 23414 */ MCD_OPC_CheckPredicate, 0, 188, 87, // Skip to: 45878
-/* 23418 */ MCD_OPC_CheckField, 21, 1, 1, 182, 87, // Skip to: 45878
-/* 23424 */ MCD_OPC_Decode, 197, 2, 78, // Opcode: CMHSvvv_2S
-/* 23428 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23446
-/* 23432 */ MCD_OPC_CheckPredicate, 0, 170, 87, // Skip to: 45878
-/* 23436 */ MCD_OPC_CheckField, 21, 1, 1, 164, 87, // Skip to: 45878
-/* 23442 */ MCD_OPC_Decode, 167, 2, 102, // Opcode: CMGEvvv_4S
-/* 23446 */ MCD_OPC_FilterValue, 3, 156, 87, // Skip to: 45878
-/* 23450 */ MCD_OPC_CheckPredicate, 0, 152, 87, // Skip to: 45878
-/* 23454 */ MCD_OPC_CheckField, 21, 1, 1, 146, 87, // Skip to: 45878
-/* 23460 */ MCD_OPC_Decode, 199, 2, 102, // Opcode: CMHSvvv_4S
-/* 23464 */ MCD_OPC_FilterValue, 16, 73, 0, // Skip to: 23541
-/* 23468 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23471 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 23488
-/* 23475 */ MCD_OPC_CheckPredicate, 0, 127, 87, // Skip to: 45878
-/* 23479 */ MCD_OPC_CheckField, 21, 1, 1, 121, 87, // Skip to: 45878
-/* 23485 */ MCD_OPC_Decode, 34, 92, // Opcode: ADDHNvvv_2s2d
-/* 23488 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 23506
-/* 23492 */ MCD_OPC_CheckPredicate, 0, 110, 87, // Skip to: 45878
-/* 23496 */ MCD_OPC_CheckField, 21, 1, 1, 104, 87, // Skip to: 45878
-/* 23502 */ MCD_OPC_Decode, 240, 11, 92, // Opcode: RADDHNvvv_2s2d
-/* 23506 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 23523
-/* 23510 */ MCD_OPC_CheckPredicate, 0, 92, 87, // Skip to: 45878
-/* 23514 */ MCD_OPC_CheckField, 21, 1, 1, 86, 87, // Skip to: 45878
-/* 23520 */ MCD_OPC_Decode, 32, 110, // Opcode: ADDHN2vvv_4s2d
-/* 23523 */ MCD_OPC_FilterValue, 3, 79, 87, // Skip to: 45878
-/* 23527 */ MCD_OPC_CheckPredicate, 0, 75, 87, // Skip to: 45878
-/* 23531 */ MCD_OPC_CheckField, 21, 1, 1, 69, 87, // Skip to: 45878
-/* 23537 */ MCD_OPC_Decode, 238, 11, 110, // Opcode: RADDHN2vvv_4s2d
-/* 23541 */ MCD_OPC_FilterValue, 17, 75, 0, // Skip to: 23620
-/* 23545 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23548 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23566
-/* 23552 */ MCD_OPC_CheckPredicate, 0, 50, 87, // Skip to: 45878
-/* 23556 */ MCD_OPC_CheckField, 21, 1, 1, 44, 87, // Skip to: 45878
-/* 23562 */ MCD_OPC_Decode, 218, 15, 78, // Opcode: SSHLvvv_2S
-/* 23566 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 23584
-/* 23570 */ MCD_OPC_CheckPredicate, 0, 32, 87, // Skip to: 45878
-/* 23574 */ MCD_OPC_CheckField, 21, 1, 1, 26, 87, // Skip to: 45878
-/* 23580 */ MCD_OPC_Decode, 129, 21, 78, // Opcode: USHLvvv_2S
-/* 23584 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23602
-/* 23588 */ MCD_OPC_CheckPredicate, 0, 14, 87, // Skip to: 45878
-/* 23592 */ MCD_OPC_CheckField, 21, 1, 1, 8, 87, // Skip to: 45878
-/* 23598 */ MCD_OPC_Decode, 220, 15, 102, // Opcode: SSHLvvv_4S
-/* 23602 */ MCD_OPC_FilterValue, 3, 0, 87, // Skip to: 45878
-/* 23606 */ MCD_OPC_CheckPredicate, 0, 252, 86, // Skip to: 45878
-/* 23610 */ MCD_OPC_CheckField, 21, 1, 1, 246, 86, // Skip to: 45878
-/* 23616 */ MCD_OPC_Decode, 131, 21, 102, // Opcode: USHLvvv_4S
-/* 23620 */ MCD_OPC_FilterValue, 18, 127, 0, // Skip to: 23751
-/* 23624 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23627 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 23658
-/* 23631 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 23634 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 23646
-/* 23638 */ MCD_OPC_CheckPredicate, 0, 220, 86, // Skip to: 45878
-/* 23642 */ MCD_OPC_Decode, 251, 1, 79, // Opcode: CLS2s
-/* 23646 */ MCD_OPC_FilterValue, 33, 212, 86, // Skip to: 45878
-/* 23650 */ MCD_OPC_CheckPredicate, 0, 208, 86, // Skip to: 45878
-/* 23654 */ MCD_OPC_Decode, 153, 15, 84, // Opcode: SQXTN2d2s
-/* 23658 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 23689
-/* 23662 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 23665 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 23677
-/* 23669 */ MCD_OPC_CheckPredicate, 0, 189, 86, // Skip to: 45878
-/* 23673 */ MCD_OPC_Decode, 131, 2, 79, // Opcode: CLZ2s
-/* 23677 */ MCD_OPC_FilterValue, 33, 181, 86, // Skip to: 45878
-/* 23681 */ MCD_OPC_CheckPredicate, 0, 177, 86, // Skip to: 45878
-/* 23685 */ MCD_OPC_Decode, 205, 20, 84, // Opcode: UQXTN2d2s
-/* 23689 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 23720
-/* 23693 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 23696 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 23708
-/* 23700 */ MCD_OPC_CheckPredicate, 0, 158, 86, // Skip to: 45878
-/* 23704 */ MCD_OPC_Decode, 253, 1, 107, // Opcode: CLS4s
-/* 23708 */ MCD_OPC_FilterValue, 33, 150, 86, // Skip to: 45878
-/* 23712 */ MCD_OPC_CheckPredicate, 0, 146, 86, // Skip to: 45878
-/* 23716 */ MCD_OPC_Decode, 154, 15, 116, // Opcode: SQXTN2d4s
-/* 23720 */ MCD_OPC_FilterValue, 3, 138, 86, // Skip to: 45878
-/* 23724 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 23727 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 23739
-/* 23731 */ MCD_OPC_CheckPredicate, 0, 127, 86, // Skip to: 45878
-/* 23735 */ MCD_OPC_Decode, 133, 2, 107, // Opcode: CLZ4s
-/* 23739 */ MCD_OPC_FilterValue, 33, 119, 86, // Skip to: 45878
-/* 23743 */ MCD_OPC_CheckPredicate, 0, 115, 86, // Skip to: 45878
-/* 23747 */ MCD_OPC_Decode, 206, 20, 116, // Opcode: UQXTN2d4s
-/* 23751 */ MCD_OPC_FilterValue, 19, 75, 0, // Skip to: 23830
-/* 23755 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23758 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23776
-/* 23762 */ MCD_OPC_CheckPredicate, 0, 96, 86, // Skip to: 45878
-/* 23766 */ MCD_OPC_CheckField, 21, 1, 1, 90, 86, // Skip to: 45878
-/* 23772 */ MCD_OPC_Decode, 253, 14, 78, // Opcode: SQSHLvvv_2S
-/* 23776 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 23794
-/* 23780 */ MCD_OPC_CheckPredicate, 0, 78, 86, // Skip to: 45878
-/* 23784 */ MCD_OPC_CheckField, 21, 1, 1, 72, 86, // Skip to: 45878
-/* 23790 */ MCD_OPC_Decode, 180, 20, 78, // Opcode: UQSHLvvv_2S
-/* 23794 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23812
-/* 23798 */ MCD_OPC_CheckPredicate, 0, 60, 86, // Skip to: 45878
-/* 23802 */ MCD_OPC_CheckField, 21, 1, 1, 54, 86, // Skip to: 45878
-/* 23808 */ MCD_OPC_Decode, 255, 14, 102, // Opcode: SQSHLvvv_4S
-/* 23812 */ MCD_OPC_FilterValue, 3, 46, 86, // Skip to: 45878
-/* 23816 */ MCD_OPC_CheckPredicate, 0, 42, 86, // Skip to: 45878
-/* 23820 */ MCD_OPC_CheckField, 21, 1, 1, 36, 86, // Skip to: 45878
-/* 23826 */ MCD_OPC_Decode, 182, 20, 102, // Opcode: UQSHLvvv_4S
-/* 23830 */ MCD_OPC_FilterValue, 20, 75, 0, // Skip to: 23909
-/* 23834 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23837 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23855
-/* 23841 */ MCD_OPC_CheckPredicate, 0, 17, 86, // Skip to: 45878
-/* 23845 */ MCD_OPC_CheckField, 21, 1, 1, 11, 86, // Skip to: 45878
-/* 23851 */ MCD_OPC_Decode, 155, 12, 94, // Opcode: SABALvvv_2d2s
-/* 23855 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 23873
-/* 23859 */ MCD_OPC_CheckPredicate, 0, 255, 85, // Skip to: 45878
-/* 23863 */ MCD_OPC_CheckField, 21, 1, 1, 249, 85, // Skip to: 45878
-/* 23869 */ MCD_OPC_Decode, 232, 18, 94, // Opcode: UABALvvv_2d2s
-/* 23873 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23891
-/* 23877 */ MCD_OPC_CheckPredicate, 0, 237, 85, // Skip to: 45878
-/* 23881 */ MCD_OPC_CheckField, 21, 1, 1, 231, 85, // Skip to: 45878
-/* 23887 */ MCD_OPC_Decode, 152, 12, 110, // Opcode: SABAL2vvv_2d2s
-/* 23891 */ MCD_OPC_FilterValue, 3, 223, 85, // Skip to: 45878
-/* 23895 */ MCD_OPC_CheckPredicate, 0, 219, 85, // Skip to: 45878
-/* 23899 */ MCD_OPC_CheckField, 21, 1, 1, 213, 85, // Skip to: 45878
-/* 23905 */ MCD_OPC_Decode, 229, 18, 110, // Opcode: UABAL2vvv_2d2s
-/* 23909 */ MCD_OPC_FilterValue, 21, 75, 0, // Skip to: 23988
-/* 23913 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23916 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23934
-/* 23920 */ MCD_OPC_CheckPredicate, 0, 194, 85, // Skip to: 45878
-/* 23924 */ MCD_OPC_CheckField, 21, 1, 1, 188, 85, // Skip to: 45878
-/* 23930 */ MCD_OPC_Decode, 188, 15, 78, // Opcode: SRSHLvvv_2S
-/* 23934 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 23952
-/* 23938 */ MCD_OPC_CheckPredicate, 0, 176, 85, // Skip to: 45878
-/* 23942 */ MCD_OPC_CheckField, 21, 1, 1, 170, 85, // Skip to: 45878
-/* 23948 */ MCD_OPC_Decode, 225, 20, 78, // Opcode: URSHLvvv_2S
-/* 23952 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23970
-/* 23956 */ MCD_OPC_CheckPredicate, 0, 158, 85, // Skip to: 45878
-/* 23960 */ MCD_OPC_CheckField, 21, 1, 1, 152, 85, // Skip to: 45878
-/* 23966 */ MCD_OPC_Decode, 190, 15, 102, // Opcode: SRSHLvvv_4S
-/* 23970 */ MCD_OPC_FilterValue, 3, 144, 85, // Skip to: 45878
-/* 23974 */ MCD_OPC_CheckPredicate, 0, 140, 85, // Skip to: 45878
-/* 23978 */ MCD_OPC_CheckField, 21, 1, 1, 134, 85, // Skip to: 45878
-/* 23984 */ MCD_OPC_Decode, 227, 20, 102, // Opcode: URSHLvvv_4S
-/* 23988 */ MCD_OPC_FilterValue, 22, 39, 0, // Skip to: 24031
-/* 23992 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 23995 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 24013
-/* 23999 */ MCD_OPC_CheckPredicate, 0, 115, 85, // Skip to: 45878
-/* 24003 */ MCD_OPC_CheckField, 21, 1, 0, 109, 85, // Skip to: 45878
-/* 24009 */ MCD_OPC_Decode, 186, 21, 78, // Opcode: UZP2vvv_2s
-/* 24013 */ MCD_OPC_FilterValue, 2, 101, 85, // Skip to: 45878
-/* 24017 */ MCD_OPC_CheckPredicate, 0, 97, 85, // Skip to: 45878
-/* 24021 */ MCD_OPC_CheckField, 21, 1, 0, 91, 85, // Skip to: 45878
-/* 24027 */ MCD_OPC_Decode, 188, 21, 102, // Opcode: UZP2vvv_4s
-/* 24031 */ MCD_OPC_FilterValue, 23, 75, 0, // Skip to: 24110
-/* 24035 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24038 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 24056
-/* 24042 */ MCD_OPC_CheckPredicate, 0, 72, 85, // Skip to: 45878
-/* 24046 */ MCD_OPC_CheckField, 21, 1, 1, 66, 85, // Skip to: 45878
-/* 24052 */ MCD_OPC_Decode, 208, 14, 78, // Opcode: SQRSHLvvv_2S
-/* 24056 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24074
-/* 24060 */ MCD_OPC_CheckPredicate, 0, 54, 85, // Skip to: 45878
-/* 24064 */ MCD_OPC_CheckField, 21, 1, 1, 48, 85, // Skip to: 45878
-/* 24070 */ MCD_OPC_Decode, 149, 20, 78, // Opcode: UQRSHLvvv_2S
-/* 24074 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 24092
-/* 24078 */ MCD_OPC_CheckPredicate, 0, 36, 85, // Skip to: 45878
-/* 24082 */ MCD_OPC_CheckField, 21, 1, 1, 30, 85, // Skip to: 45878
-/* 24088 */ MCD_OPC_Decode, 210, 14, 102, // Opcode: SQRSHLvvv_4S
-/* 24092 */ MCD_OPC_FilterValue, 3, 22, 85, // Skip to: 45878
-/* 24096 */ MCD_OPC_CheckPredicate, 0, 18, 85, // Skip to: 45878
-/* 24100 */ MCD_OPC_CheckField, 21, 1, 1, 12, 85, // Skip to: 45878
-/* 24106 */ MCD_OPC_Decode, 151, 20, 102, // Opcode: UQRSHLvvv_4S
-/* 24110 */ MCD_OPC_FilterValue, 24, 75, 0, // Skip to: 24189
+/* 21412 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21430
+/* 21416 */ MCD_OPC_CheckPredicate, 0, 49, 75, // Skip to: 40669
+/* 21420 */ MCD_OPC_CheckField, 21, 1, 1, 43, 75, // Skip to: 40669
+/* 21426 */ MCD_OPC_Decode, 197, 11, 89, // Opcode: SQDMULHv2i32
+/* 21430 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21448
+/* 21434 */ MCD_OPC_CheckPredicate, 0, 31, 75, // Skip to: 40669
+/* 21438 */ MCD_OPC_CheckField, 21, 1, 1, 25, 75, // Skip to: 40669
+/* 21444 */ MCD_OPC_Decode, 232, 11, 89, // Opcode: SQRDMULHv2i32
+/* 21448 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21466
+/* 21452 */ MCD_OPC_CheckPredicate, 0, 13, 75, // Skip to: 40669
+/* 21456 */ MCD_OPC_CheckField, 21, 1, 1, 7, 75, // Skip to: 40669
+/* 21462 */ MCD_OPC_Decode, 201, 11, 112, // Opcode: SQDMULHv4i32
+/* 21466 */ MCD_OPC_FilterValue, 3, 255, 74, // Skip to: 40669
+/* 21470 */ MCD_OPC_CheckPredicate, 0, 251, 74, // Skip to: 40669
+/* 21474 */ MCD_OPC_CheckField, 21, 1, 1, 245, 74, // Skip to: 40669
+/* 21480 */ MCD_OPC_Decode, 236, 11, 112, // Opcode: SQRDMULHv4i32
+/* 21484 */ MCD_OPC_FilterValue, 46, 137, 0, // Skip to: 21625
+/* 21488 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21491 */ MCD_OPC_FilterValue, 0, 26, 0, // Skip to: 21521
+/* 21495 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 21498 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 21509
+/* 21502 */ MCD_OPC_CheckPredicate, 0, 219, 74, // Skip to: 40669
+/* 21506 */ MCD_OPC_Decode, 22, 90, // Opcode: ABSv2i32
+/* 21509 */ MCD_OPC_FilterValue, 33, 212, 74, // Skip to: 40669
+/* 21513 */ MCD_OPC_CheckPredicate, 0, 208, 74, // Skip to: 40669
+/* 21517 */ MCD_OPC_Decode, 246, 3, 90, // Opcode: FCVTZSv2f32
+/* 21521 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 21552
+/* 21525 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 21528 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21540
+/* 21532 */ MCD_OPC_CheckPredicate, 0, 189, 74, // Skip to: 40669
+/* 21536 */ MCD_OPC_Decode, 247, 8, 90, // Opcode: NEGv2i32
+/* 21540 */ MCD_OPC_FilterValue, 33, 181, 74, // Skip to: 40669
+/* 21544 */ MCD_OPC_CheckPredicate, 0, 177, 74, // Skip to: 40669
+/* 21548 */ MCD_OPC_Decode, 147, 4, 90, // Opcode: FCVTZUv2f32
+/* 21552 */ MCD_OPC_FilterValue, 2, 38, 0, // Skip to: 21594
+/* 21556 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 21559 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 21570
+/* 21563 */ MCD_OPC_CheckPredicate, 0, 158, 74, // Skip to: 40669
+/* 21567 */ MCD_OPC_Decode, 25, 117, // Opcode: ABSv4i32
+/* 21570 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 21582
+/* 21574 */ MCD_OPC_CheckPredicate, 0, 147, 74, // Skip to: 40669
+/* 21578 */ MCD_OPC_Decode, 250, 3, 117, // Opcode: FCVTZSv4f32
+/* 21582 */ MCD_OPC_FilterValue, 49, 139, 74, // Skip to: 40669
+/* 21586 */ MCD_OPC_CheckPredicate, 0, 135, 74, // Skip to: 40669
+/* 21590 */ MCD_OPC_Decode, 57, 139, 1, // Opcode: ADDVv4i32v
+/* 21594 */ MCD_OPC_FilterValue, 3, 127, 74, // Skip to: 40669
+/* 21598 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 21601 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21613
+/* 21605 */ MCD_OPC_CheckPredicate, 0, 116, 74, // Skip to: 40669
+/* 21609 */ MCD_OPC_Decode, 250, 8, 117, // Opcode: NEGv4i32
+/* 21613 */ MCD_OPC_FilterValue, 33, 108, 74, // Skip to: 40669
+/* 21617 */ MCD_OPC_CheckPredicate, 0, 104, 74, // Skip to: 40669
+/* 21621 */ MCD_OPC_Decode, 151, 4, 117, // Opcode: FCVTZUv4f32
+/* 21625 */ MCD_OPC_FilterValue, 47, 37, 0, // Skip to: 21666
+/* 21629 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21632 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 21649
+/* 21636 */ MCD_OPC_CheckPredicate, 0, 85, 74, // Skip to: 40669
+/* 21640 */ MCD_OPC_CheckField, 21, 1, 1, 79, 74, // Skip to: 40669
+/* 21646 */ MCD_OPC_Decode, 39, 89, // Opcode: ADDPv2i32
+/* 21649 */ MCD_OPC_FilterValue, 2, 72, 74, // Skip to: 40669
+/* 21653 */ MCD_OPC_CheckPredicate, 0, 68, 74, // Skip to: 40669
+/* 21657 */ MCD_OPC_CheckField, 21, 1, 1, 62, 74, // Skip to: 40669
+/* 21663 */ MCD_OPC_Decode, 43, 112, // Opcode: ADDPv4i32
+/* 21666 */ MCD_OPC_FilterValue, 48, 75, 0, // Skip to: 21745
+/* 21670 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21673 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21691
+/* 21677 */ MCD_OPC_CheckPredicate, 0, 44, 74, // Skip to: 40669
+/* 21681 */ MCD_OPC_CheckField, 21, 1, 1, 38, 74, // Skip to: 40669
+/* 21687 */ MCD_OPC_Decode, 139, 11, 85, // Opcode: SMULLv2i32_v2i64
+/* 21691 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21709
+/* 21695 */ MCD_OPC_CheckPredicate, 0, 26, 74, // Skip to: 40669
+/* 21699 */ MCD_OPC_CheckField, 21, 1, 1, 20, 74, // Skip to: 40669
+/* 21705 */ MCD_OPC_Decode, 129, 17, 85, // Opcode: UMULLv2i32_v2i64
+/* 21709 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21727
+/* 21713 */ MCD_OPC_CheckPredicate, 0, 8, 74, // Skip to: 40669
+/* 21717 */ MCD_OPC_CheckField, 21, 1, 1, 2, 74, // Skip to: 40669
+/* 21723 */ MCD_OPC_Decode, 143, 11, 112, // Opcode: SMULLv4i32_v2i64
+/* 21727 */ MCD_OPC_FilterValue, 3, 250, 73, // Skip to: 40669
+/* 21731 */ MCD_OPC_CheckPredicate, 0, 246, 73, // Skip to: 40669
+/* 21735 */ MCD_OPC_CheckField, 21, 1, 1, 240, 73, // Skip to: 40669
+/* 21741 */ MCD_OPC_Decode, 133, 17, 112, // Opcode: UMULLv4i32_v2i64
+/* 21745 */ MCD_OPC_FilterValue, 49, 75, 0, // Skip to: 21824
+/* 21749 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21752 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21770
+/* 21756 */ MCD_OPC_CheckPredicate, 0, 221, 73, // Skip to: 40669
+/* 21760 */ MCD_OPC_CheckField, 21, 1, 1, 215, 73, // Skip to: 40669
+/* 21766 */ MCD_OPC_Decode, 191, 4, 89, // Opcode: FMINNMv2f32
+/* 21770 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 21788
+/* 21774 */ MCD_OPC_CheckPredicate, 0, 203, 73, // Skip to: 40669
+/* 21778 */ MCD_OPC_CheckField, 21, 1, 1, 197, 73, // Skip to: 40669
+/* 21784 */ MCD_OPC_Decode, 184, 4, 89, // Opcode: FMINNMPv2f32
+/* 21788 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 21806
+/* 21792 */ MCD_OPC_CheckPredicate, 0, 185, 73, // Skip to: 40669
+/* 21796 */ MCD_OPC_CheckField, 21, 1, 1, 179, 73, // Skip to: 40669
+/* 21802 */ MCD_OPC_Decode, 193, 4, 112, // Opcode: FMINNMv4f32
+/* 21806 */ MCD_OPC_FilterValue, 3, 171, 73, // Skip to: 40669
+/* 21810 */ MCD_OPC_CheckPredicate, 0, 167, 73, // Skip to: 40669
+/* 21814 */ MCD_OPC_CheckField, 21, 1, 1, 161, 73, // Skip to: 40669
+/* 21820 */ MCD_OPC_Decode, 188, 4, 112, // Opcode: FMINNMPv4f32
+/* 21824 */ MCD_OPC_FilterValue, 50, 140, 0, // Skip to: 21968
+/* 21828 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21831 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 21862
+/* 21835 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 21838 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21850
+/* 21842 */ MCD_OPC_CheckPredicate, 0, 135, 73, // Skip to: 40669
+/* 21846 */ MCD_OPC_Decode, 238, 2, 90, // Opcode: FCMGTv2i32rz
+/* 21850 */ MCD_OPC_FilterValue, 33, 127, 73, // Skip to: 40669
+/* 21854 */ MCD_OPC_CheckPredicate, 0, 123, 73, // Skip to: 40669
+/* 21858 */ MCD_OPC_Decode, 219, 17, 90, // Opcode: URECPEv2i32
+/* 21862 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 21893
+/* 21866 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 21869 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21881
+/* 21873 */ MCD_OPC_CheckPredicate, 0, 104, 73, // Skip to: 40669
+/* 21877 */ MCD_OPC_Decode, 228, 2, 90, // Opcode: FCMGEv2i32rz
+/* 21881 */ MCD_OPC_FilterValue, 33, 96, 73, // Skip to: 40669
+/* 21885 */ MCD_OPC_CheckPredicate, 0, 92, 73, // Skip to: 40669
+/* 21889 */ MCD_OPC_Decode, 243, 17, 90, // Opcode: URSQRTEv2i32
+/* 21893 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 21924
+/* 21897 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 21900 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21912
+/* 21904 */ MCD_OPC_CheckPredicate, 0, 73, 73, // Skip to: 40669
+/* 21908 */ MCD_OPC_Decode, 241, 2, 117, // Opcode: FCMGTv4i32rz
+/* 21912 */ MCD_OPC_FilterValue, 33, 65, 73, // Skip to: 40669
+/* 21916 */ MCD_OPC_CheckPredicate, 0, 61, 73, // Skip to: 40669
+/* 21920 */ MCD_OPC_Decode, 220, 17, 117, // Opcode: URECPEv4i32
+/* 21924 */ MCD_OPC_FilterValue, 3, 53, 73, // Skip to: 40669
+/* 21928 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 21931 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 21943
+/* 21935 */ MCD_OPC_CheckPredicate, 0, 42, 73, // Skip to: 40669
+/* 21939 */ MCD_OPC_Decode, 231, 2, 117, // Opcode: FCMGEv4i32rz
+/* 21943 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 21955
+/* 21947 */ MCD_OPC_CheckPredicate, 0, 30, 73, // Skip to: 40669
+/* 21951 */ MCD_OPC_Decode, 244, 17, 117, // Opcode: URSQRTEv4i32
+/* 21955 */ MCD_OPC_FilterValue, 48, 22, 73, // Skip to: 40669
+/* 21959 */ MCD_OPC_CheckPredicate, 0, 18, 73, // Skip to: 40669
+/* 21963 */ MCD_OPC_Decode, 190, 4, 139, 1, // Opcode: FMINNMVv4i32v
+/* 21968 */ MCD_OPC_FilterValue, 51, 39, 0, // Skip to: 22011
+/* 21972 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 21975 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 21993
+/* 21979 */ MCD_OPC_CheckPredicate, 0, 254, 72, // Skip to: 40669
+/* 21983 */ MCD_OPC_CheckField, 21, 1, 1, 248, 72, // Skip to: 40669
+/* 21989 */ MCD_OPC_Decode, 214, 4, 109, // Opcode: FMLSv2f32
+/* 21993 */ MCD_OPC_FilterValue, 2, 240, 72, // Skip to: 40669
+/* 21997 */ MCD_OPC_CheckPredicate, 0, 236, 72, // Skip to: 40669
+/* 22001 */ MCD_OPC_CheckField, 21, 1, 1, 230, 72, // Skip to: 40669
+/* 22007 */ MCD_OPC_Decode, 218, 4, 120, // Opcode: FMLSv4f32
+/* 22011 */ MCD_OPC_FilterValue, 52, 39, 0, // Skip to: 22054
+/* 22015 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22018 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22036
+/* 22022 */ MCD_OPC_CheckPredicate, 0, 211, 72, // Skip to: 40669
+/* 22026 */ MCD_OPC_CheckField, 21, 1, 1, 205, 72, // Skip to: 40669
+/* 22032 */ MCD_OPC_Decode, 210, 11, 85, // Opcode: SQDMULLv2i32_v2i64
+/* 22036 */ MCD_OPC_FilterValue, 2, 197, 72, // Skip to: 40669
+/* 22040 */ MCD_OPC_CheckPredicate, 0, 193, 72, // Skip to: 40669
+/* 22044 */ MCD_OPC_CheckField, 21, 1, 1, 187, 72, // Skip to: 40669
+/* 22050 */ MCD_OPC_Decode, 214, 11, 112, // Opcode: SQDMULLv4i32_v2i64
+/* 22054 */ MCD_OPC_FilterValue, 53, 75, 0, // Skip to: 22133
+/* 22058 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22061 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22079
+/* 22065 */ MCD_OPC_CheckPredicate, 0, 168, 72, // Skip to: 40669
+/* 22069 */ MCD_OPC_CheckField, 21, 1, 1, 162, 72, // Skip to: 40669
+/* 22075 */ MCD_OPC_Decode, 202, 5, 89, // Opcode: FSUBv2f32
+/* 22079 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22097
+/* 22083 */ MCD_OPC_CheckPredicate, 0, 150, 72, // Skip to: 40669
+/* 22087 */ MCD_OPC_CheckField, 21, 1, 1, 144, 72, // Skip to: 40669
+/* 22093 */ MCD_OPC_Decode, 180, 2, 89, // Opcode: FABDv2f32
+/* 22097 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22115
+/* 22101 */ MCD_OPC_CheckPredicate, 0, 132, 72, // Skip to: 40669
+/* 22105 */ MCD_OPC_CheckField, 21, 1, 1, 126, 72, // Skip to: 40669
+/* 22111 */ MCD_OPC_Decode, 204, 5, 112, // Opcode: FSUBv4f32
+/* 22115 */ MCD_OPC_FilterValue, 3, 118, 72, // Skip to: 40669
+/* 22119 */ MCD_OPC_CheckPredicate, 0, 114, 72, // Skip to: 40669
+/* 22123 */ MCD_OPC_CheckField, 21, 1, 1, 108, 72, // Skip to: 40669
+/* 22129 */ MCD_OPC_Decode, 182, 2, 112, // Opcode: FABDv4f32
+/* 22133 */ MCD_OPC_FilterValue, 54, 127, 0, // Skip to: 22264
+/* 22137 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22140 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 22171
+/* 22144 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 22147 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22159
+/* 22151 */ MCD_OPC_CheckPredicate, 0, 82, 72, // Skip to: 40669
+/* 22155 */ MCD_OPC_Decode, 218, 2, 90, // Opcode: FCMEQv2i32rz
+/* 22159 */ MCD_OPC_FilterValue, 33, 74, 72, // Skip to: 40669
+/* 22163 */ MCD_OPC_CheckPredicate, 0, 70, 72, // Skip to: 40669
+/* 22167 */ MCD_OPC_Decode, 140, 5, 90, // Opcode: FRECPEv2f32
+/* 22171 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 22202
+/* 22175 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 22178 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22190
+/* 22182 */ MCD_OPC_CheckPredicate, 0, 51, 72, // Skip to: 40669
+/* 22186 */ MCD_OPC_Decode, 244, 2, 90, // Opcode: FCMLEv2i32rz
+/* 22190 */ MCD_OPC_FilterValue, 33, 43, 72, // Skip to: 40669
+/* 22194 */ MCD_OPC_CheckPredicate, 0, 39, 72, // Skip to: 40669
+/* 22198 */ MCD_OPC_Decode, 187, 5, 90, // Opcode: FRSQRTEv2f32
+/* 22202 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 22233
+/* 22206 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 22209 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22221
+/* 22213 */ MCD_OPC_CheckPredicate, 0, 20, 72, // Skip to: 40669
+/* 22217 */ MCD_OPC_Decode, 221, 2, 117, // Opcode: FCMEQv4i32rz
+/* 22221 */ MCD_OPC_FilterValue, 33, 12, 72, // Skip to: 40669
+/* 22225 */ MCD_OPC_CheckPredicate, 0, 8, 72, // Skip to: 40669
+/* 22229 */ MCD_OPC_Decode, 142, 5, 117, // Opcode: FRECPEv4f32
+/* 22233 */ MCD_OPC_FilterValue, 3, 0, 72, // Skip to: 40669
+/* 22237 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 22240 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22252
+/* 22244 */ MCD_OPC_CheckPredicate, 0, 245, 71, // Skip to: 40669
+/* 22248 */ MCD_OPC_Decode, 246, 2, 117, // Opcode: FCMLEv4i32rz
+/* 22252 */ MCD_OPC_FilterValue, 33, 237, 71, // Skip to: 40669
+/* 22256 */ MCD_OPC_CheckPredicate, 0, 233, 71, // Skip to: 40669
+/* 22260 */ MCD_OPC_Decode, 189, 5, 117, // Opcode: FRSQRTEv4f32
+/* 22264 */ MCD_OPC_FilterValue, 57, 39, 0, // Skip to: 22307
+/* 22268 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22271 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22289
+/* 22275 */ MCD_OPC_CheckPredicate, 0, 214, 71, // Skip to: 40669
+/* 22279 */ MCD_OPC_CheckField, 21, 1, 1, 208, 71, // Skip to: 40669
+/* 22285 */ MCD_OPC_Decode, 236, 2, 89, // Opcode: FCMGTv2f32
+/* 22289 */ MCD_OPC_FilterValue, 3, 200, 71, // Skip to: 40669
+/* 22293 */ MCD_OPC_CheckPredicate, 0, 196, 71, // Skip to: 40669
+/* 22297 */ MCD_OPC_CheckField, 21, 1, 1, 190, 71, // Skip to: 40669
+/* 22303 */ MCD_OPC_Decode, 240, 2, 112, // Opcode: FCMGTv4f32
+/* 22307 */ MCD_OPC_FilterValue, 58, 39, 0, // Skip to: 22350
+/* 22311 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22314 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22332
+/* 22318 */ MCD_OPC_CheckPredicate, 0, 171, 71, // Skip to: 40669
+/* 22322 */ MCD_OPC_CheckField, 16, 6, 32, 165, 71, // Skip to: 40669
+/* 22328 */ MCD_OPC_Decode, 249, 2, 90, // Opcode: FCMLTv2i32rz
+/* 22332 */ MCD_OPC_FilterValue, 2, 157, 71, // Skip to: 40669
+/* 22336 */ MCD_OPC_CheckPredicate, 0, 153, 71, // Skip to: 40669
+/* 22340 */ MCD_OPC_CheckField, 16, 6, 32, 147, 71, // Skip to: 40669
+/* 22346 */ MCD_OPC_Decode, 251, 2, 117, // Opcode: FCMLTv4i32rz
+/* 22350 */ MCD_OPC_FilterValue, 59, 39, 0, // Skip to: 22393
+/* 22354 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22357 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22375
+/* 22361 */ MCD_OPC_CheckPredicate, 0, 128, 71, // Skip to: 40669
+/* 22365 */ MCD_OPC_CheckField, 21, 1, 1, 122, 71, // Skip to: 40669
+/* 22371 */ MCD_OPC_Decode, 195, 2, 89, // Opcode: FACGTv2f32
+/* 22375 */ MCD_OPC_FilterValue, 3, 114, 71, // Skip to: 40669
+/* 22379 */ MCD_OPC_CheckPredicate, 0, 110, 71, // Skip to: 40669
+/* 22383 */ MCD_OPC_CheckField, 21, 1, 1, 104, 71, // Skip to: 40669
+/* 22389 */ MCD_OPC_Decode, 197, 2, 112, // Opcode: FACGTv4f32
+/* 22393 */ MCD_OPC_FilterValue, 61, 75, 0, // Skip to: 22472
+/* 22397 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22400 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22418
+/* 22404 */ MCD_OPC_CheckPredicate, 0, 85, 71, // Skip to: 40669
+/* 22408 */ MCD_OPC_CheckField, 21, 1, 1, 79, 71, // Skip to: 40669
+/* 22414 */ MCD_OPC_Decode, 201, 4, 89, // Opcode: FMINv2f32
+/* 22418 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 22436
+/* 22422 */ MCD_OPC_CheckPredicate, 0, 67, 71, // Skip to: 40669
+/* 22426 */ MCD_OPC_CheckField, 21, 1, 1, 61, 71, // Skip to: 40669
+/* 22432 */ MCD_OPC_Decode, 194, 4, 89, // Opcode: FMINPv2f32
+/* 22436 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22454
+/* 22440 */ MCD_OPC_CheckPredicate, 0, 49, 71, // Skip to: 40669
+/* 22444 */ MCD_OPC_CheckField, 21, 1, 1, 43, 71, // Skip to: 40669
+/* 22450 */ MCD_OPC_Decode, 203, 4, 112, // Opcode: FMINv4f32
+/* 22454 */ MCD_OPC_FilterValue, 3, 35, 71, // Skip to: 40669
+/* 22458 */ MCD_OPC_CheckPredicate, 0, 31, 71, // Skip to: 40669
+/* 22462 */ MCD_OPC_CheckField, 21, 1, 1, 25, 71, // Skip to: 40669
+/* 22468 */ MCD_OPC_Decode, 198, 4, 112, // Opcode: FMINPv4f32
+/* 22472 */ MCD_OPC_FilterValue, 62, 114, 0, // Skip to: 22590
+/* 22476 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22479 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22497
+/* 22483 */ MCD_OPC_CheckPredicate, 0, 6, 71, // Skip to: 40669
+/* 22487 */ MCD_OPC_CheckField, 16, 6, 32, 0, 71, // Skip to: 40669
+/* 22493 */ MCD_OPC_Decode, 185, 2, 90, // Opcode: FABSv2f32
+/* 22497 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 22528
+/* 22501 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 22504 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22516
+/* 22508 */ MCD_OPC_CheckPredicate, 0, 237, 70, // Skip to: 40669
+/* 22512 */ MCD_OPC_Decode, 129, 5, 90, // Opcode: FNEGv2f32
+/* 22516 */ MCD_OPC_FilterValue, 33, 229, 70, // Skip to: 40669
+/* 22520 */ MCD_OPC_CheckPredicate, 0, 225, 70, // Skip to: 40669
+/* 22524 */ MCD_OPC_Decode, 197, 5, 90, // Opcode: FSQRTv2f32
+/* 22528 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22546
+/* 22532 */ MCD_OPC_CheckPredicate, 0, 213, 70, // Skip to: 40669
+/* 22536 */ MCD_OPC_CheckField, 16, 6, 32, 207, 70, // Skip to: 40669
+/* 22542 */ MCD_OPC_Decode, 187, 2, 117, // Opcode: FABSv4f32
+/* 22546 */ MCD_OPC_FilterValue, 3, 199, 70, // Skip to: 40669
+/* 22550 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 22553 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 22565
+/* 22557 */ MCD_OPC_CheckPredicate, 0, 188, 70, // Skip to: 40669
+/* 22561 */ MCD_OPC_Decode, 131, 5, 117, // Opcode: FNEGv4f32
+/* 22565 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 22577
+/* 22569 */ MCD_OPC_CheckPredicate, 0, 176, 70, // Skip to: 40669
+/* 22573 */ MCD_OPC_Decode, 199, 5, 117, // Opcode: FSQRTv4f32
+/* 22577 */ MCD_OPC_FilterValue, 48, 168, 70, // Skip to: 40669
+/* 22581 */ MCD_OPC_CheckPredicate, 0, 164, 70, // Skip to: 40669
+/* 22585 */ MCD_OPC_Decode, 200, 4, 139, 1, // Opcode: FMINVv4i32v
+/* 22590 */ MCD_OPC_FilterValue, 63, 155, 70, // Skip to: 40669
+/* 22594 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22597 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22615
+/* 22601 */ MCD_OPC_CheckPredicate, 0, 144, 70, // Skip to: 40669
+/* 22605 */ MCD_OPC_CheckField, 21, 1, 1, 138, 70, // Skip to: 40669
+/* 22611 */ MCD_OPC_Decode, 192, 5, 89, // Opcode: FRSQRTSv2f32
+/* 22615 */ MCD_OPC_FilterValue, 2, 130, 70, // Skip to: 40669
+/* 22619 */ MCD_OPC_CheckPredicate, 0, 126, 70, // Skip to: 40669
+/* 22623 */ MCD_OPC_CheckField, 21, 1, 1, 120, 70, // Skip to: 40669
+/* 22629 */ MCD_OPC_Decode, 194, 5, 112, // Opcode: FRSQRTSv4f32
+/* 22633 */ MCD_OPC_FilterValue, 11, 193, 5, // Skip to: 24110
+/* 22637 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 22640 */ MCD_OPC_FilterValue, 3, 39, 0, // Skip to: 22683
+/* 22644 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22647 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22665
+/* 22651 */ MCD_OPC_CheckPredicate, 0, 94, 70, // Skip to: 40669
+/* 22655 */ MCD_OPC_CheckField, 21, 1, 1, 88, 70, // Skip to: 40669
+/* 22661 */ MCD_OPC_Decode, 164, 11, 112, // Opcode: SQADDv2i64
+/* 22665 */ MCD_OPC_FilterValue, 3, 80, 70, // Skip to: 40669
+/* 22669 */ MCD_OPC_CheckPredicate, 0, 76, 70, // Skip to: 40669
+/* 22673 */ MCD_OPC_CheckField, 21, 1, 1, 70, 70, // Skip to: 40669
+/* 22679 */ MCD_OPC_Decode, 143, 17, 112, // Opcode: UQADDv2i64
+/* 22683 */ MCD_OPC_FilterValue, 6, 20, 0, // Skip to: 22707
+/* 22687 */ MCD_OPC_CheckPredicate, 0, 58, 70, // Skip to: 40669
+/* 22691 */ MCD_OPC_CheckField, 29, 3, 2, 52, 70, // Skip to: 40669
+/* 22697 */ MCD_OPC_CheckField, 21, 1, 0, 46, 70, // Skip to: 40669
+/* 22703 */ MCD_OPC_Decode, 180, 18, 112, // Opcode: UZP1v2i64
+/* 22707 */ MCD_OPC_FilterValue, 7, 73, 0, // Skip to: 22784
+/* 22711 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22714 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22732
+/* 22718 */ MCD_OPC_CheckPredicate, 0, 27, 70, // Skip to: 40669
+/* 22722 */ MCD_OPC_CheckField, 21, 1, 1, 21, 70, // Skip to: 40669
+/* 22728 */ MCD_OPC_Decode, 132, 9, 89, // Opcode: ORNv8i8
+/* 22732 */ MCD_OPC_FilterValue, 1, 13, 0, // Skip to: 22749
+/* 22736 */ MCD_OPC_CheckPredicate, 0, 9, 70, // Skip to: 40669
+/* 22740 */ MCD_OPC_CheckField, 21, 1, 1, 3, 70, // Skip to: 40669
+/* 22746 */ MCD_OPC_Decode, 119, 89, // Opcode: BIFv8i8
+/* 22749 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22767
+/* 22753 */ MCD_OPC_CheckPredicate, 0, 248, 69, // Skip to: 40669
+/* 22757 */ MCD_OPC_CheckField, 21, 1, 1, 242, 69, // Skip to: 40669
+/* 22763 */ MCD_OPC_Decode, 131, 9, 112, // Opcode: ORNv16i8
+/* 22767 */ MCD_OPC_FilterValue, 3, 234, 69, // Skip to: 40669
+/* 22771 */ MCD_OPC_CheckPredicate, 0, 230, 69, // Skip to: 40669
+/* 22775 */ MCD_OPC_CheckField, 21, 1, 1, 224, 69, // Skip to: 40669
+/* 22781 */ MCD_OPC_Decode, 118, 112, // Opcode: BIFv16i8
+/* 22784 */ MCD_OPC_FilterValue, 10, 20, 0, // Skip to: 22808
+/* 22788 */ MCD_OPC_CheckPredicate, 0, 213, 69, // Skip to: 40669
+/* 22792 */ MCD_OPC_CheckField, 29, 3, 2, 207, 69, // Skip to: 40669
+/* 22798 */ MCD_OPC_CheckField, 21, 1, 0, 201, 69, // Skip to: 40669
+/* 22804 */ MCD_OPC_Decode, 221, 15, 112, // Opcode: TRN1v2i64
+/* 22808 */ MCD_OPC_FilterValue, 11, 39, 0, // Skip to: 22851
+/* 22812 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22815 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22833
+/* 22819 */ MCD_OPC_CheckPredicate, 0, 182, 69, // Skip to: 40669
+/* 22823 */ MCD_OPC_CheckField, 21, 1, 1, 176, 69, // Skip to: 40669
+/* 22829 */ MCD_OPC_Decode, 198, 12, 112, // Opcode: SQSUBv2i64
+/* 22833 */ MCD_OPC_FilterValue, 3, 168, 69, // Skip to: 40669
+/* 22837 */ MCD_OPC_CheckPredicate, 0, 164, 69, // Skip to: 40669
+/* 22841 */ MCD_OPC_CheckField, 21, 1, 1, 158, 69, // Skip to: 40669
+/* 22847 */ MCD_OPC_Decode, 205, 17, 112, // Opcode: UQSUBv2i64
+/* 22851 */ MCD_OPC_FilterValue, 13, 39, 0, // Skip to: 22894
+/* 22855 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22858 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22876
+/* 22862 */ MCD_OPC_CheckPredicate, 0, 139, 69, // Skip to: 40669
+/* 22866 */ MCD_OPC_CheckField, 21, 1, 1, 133, 69, // Skip to: 40669
+/* 22872 */ MCD_OPC_Decode, 196, 1, 112, // Opcode: CMGTv2i64
+/* 22876 */ MCD_OPC_FilterValue, 3, 125, 69, // Skip to: 40669
+/* 22880 */ MCD_OPC_CheckPredicate, 0, 121, 69, // Skip to: 40669
+/* 22884 */ MCD_OPC_CheckField, 21, 1, 1, 115, 69, // Skip to: 40669
+/* 22890 */ MCD_OPC_Decode, 209, 1, 112, // Opcode: CMHIv2i64
+/* 22894 */ MCD_OPC_FilterValue, 14, 64, 0, // Skip to: 22962
+/* 22898 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 22901 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 22919
+/* 22905 */ MCD_OPC_CheckPredicate, 0, 96, 69, // Skip to: 40669
+/* 22909 */ MCD_OPC_CheckField, 29, 3, 2, 90, 69, // Skip to: 40669
+/* 22915 */ MCD_OPC_Decode, 200, 18, 112, // Opcode: ZIP1v2i64
+/* 22919 */ MCD_OPC_FilterValue, 1, 82, 69, // Skip to: 40669
+/* 22923 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22926 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22944
+/* 22930 */ MCD_OPC_CheckPredicate, 0, 71, 69, // Skip to: 40669
+/* 22934 */ MCD_OPC_CheckField, 16, 5, 0, 65, 69, // Skip to: 40669
+/* 22940 */ MCD_OPC_Decode, 187, 15, 126, // Opcode: SUQADDv2i64
+/* 22944 */ MCD_OPC_FilterValue, 3, 57, 69, // Skip to: 40669
+/* 22948 */ MCD_OPC_CheckPredicate, 0, 53, 69, // Skip to: 40669
+/* 22952 */ MCD_OPC_CheckField, 16, 5, 0, 47, 69, // Skip to: 40669
+/* 22958 */ MCD_OPC_Decode, 153, 18, 126, // Opcode: USQADDv2i64
+/* 22962 */ MCD_OPC_FilterValue, 15, 39, 0, // Skip to: 23005
+/* 22966 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 22969 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 22987
+/* 22973 */ MCD_OPC_CheckPredicate, 0, 28, 69, // Skip to: 40669
+/* 22977 */ MCD_OPC_CheckField, 21, 1, 1, 22, 69, // Skip to: 40669
+/* 22983 */ MCD_OPC_Decode, 180, 1, 112, // Opcode: CMGEv2i64
+/* 22987 */ MCD_OPC_FilterValue, 3, 14, 69, // Skip to: 40669
+/* 22991 */ MCD_OPC_CheckPredicate, 0, 10, 69, // Skip to: 40669
+/* 22995 */ MCD_OPC_CheckField, 21, 1, 1, 4, 69, // Skip to: 40669
+/* 23001 */ MCD_OPC_Decode, 217, 1, 112, // Opcode: CMHSv2i64
+/* 23005 */ MCD_OPC_FilterValue, 17, 39, 0, // Skip to: 23048
+/* 23009 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23012 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23030
+/* 23016 */ MCD_OPC_CheckPredicate, 0, 241, 68, // Skip to: 40669
+/* 23020 */ MCD_OPC_CheckField, 21, 1, 1, 235, 68, // Skip to: 40669
+/* 23026 */ MCD_OPC_Decode, 140, 13, 112, // Opcode: SSHLv2i64
+/* 23030 */ MCD_OPC_FilterValue, 3, 227, 68, // Skip to: 40669
+/* 23034 */ MCD_OPC_CheckPredicate, 0, 223, 68, // Skip to: 40669
+/* 23038 */ MCD_OPC_CheckField, 21, 1, 1, 217, 68, // Skip to: 40669
+/* 23044 */ MCD_OPC_Decode, 134, 18, 112, // Opcode: USHLv2i64
+/* 23048 */ MCD_OPC_FilterValue, 19, 39, 0, // Skip to: 23091
+/* 23052 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23055 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23073
+/* 23059 */ MCD_OPC_CheckPredicate, 0, 198, 68, // Skip to: 40669
+/* 23063 */ MCD_OPC_CheckField, 21, 1, 1, 192, 68, // Skip to: 40669
+/* 23069 */ MCD_OPC_Decode, 164, 12, 112, // Opcode: SQSHLv2i64
+/* 23073 */ MCD_OPC_FilterValue, 3, 184, 68, // Skip to: 40669
+/* 23077 */ MCD_OPC_CheckPredicate, 0, 180, 68, // Skip to: 40669
+/* 23081 */ MCD_OPC_CheckField, 21, 1, 1, 174, 68, // Skip to: 40669
+/* 23087 */ MCD_OPC_Decode, 180, 17, 112, // Opcode: UQSHLv2i64
+/* 23091 */ MCD_OPC_FilterValue, 21, 39, 0, // Skip to: 23134
+/* 23095 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23098 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23116
+/* 23102 */ MCD_OPC_CheckPredicate, 0, 155, 68, // Skip to: 40669
+/* 23106 */ MCD_OPC_CheckField, 21, 1, 1, 149, 68, // Skip to: 40669
+/* 23112 */ MCD_OPC_Decode, 238, 12, 112, // Opcode: SRSHLv2i64
+/* 23116 */ MCD_OPC_FilterValue, 3, 141, 68, // Skip to: 40669
+/* 23120 */ MCD_OPC_CheckPredicate, 0, 137, 68, // Skip to: 40669
+/* 23124 */ MCD_OPC_CheckField, 21, 1, 1, 131, 68, // Skip to: 40669
+/* 23130 */ MCD_OPC_Decode, 230, 17, 112, // Opcode: URSHLv2i64
+/* 23134 */ MCD_OPC_FilterValue, 22, 20, 0, // Skip to: 23158
+/* 23138 */ MCD_OPC_CheckPredicate, 0, 119, 68, // Skip to: 40669
+/* 23142 */ MCD_OPC_CheckField, 29, 3, 2, 113, 68, // Skip to: 40669
+/* 23148 */ MCD_OPC_CheckField, 21, 1, 0, 107, 68, // Skip to: 40669
+/* 23154 */ MCD_OPC_Decode, 187, 18, 112, // Opcode: UZP2v2i64
+/* 23158 */ MCD_OPC_FilterValue, 23, 39, 0, // Skip to: 23201
+/* 23162 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23165 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23183
+/* 23169 */ MCD_OPC_CheckPredicate, 0, 88, 68, // Skip to: 40669
+/* 23173 */ MCD_OPC_CheckField, 21, 1, 1, 82, 68, // Skip to: 40669
+/* 23179 */ MCD_OPC_Decode, 246, 11, 112, // Opcode: SQRSHLv2i64
+/* 23183 */ MCD_OPC_FilterValue, 3, 74, 68, // Skip to: 40669
+/* 23187 */ MCD_OPC_CheckPredicate, 0, 70, 68, // Skip to: 40669
+/* 23191 */ MCD_OPC_CheckField, 21, 1, 1, 64, 68, // Skip to: 40669
+/* 23197 */ MCD_OPC_Decode, 154, 17, 112, // Opcode: UQRSHLv2i64
+/* 23201 */ MCD_OPC_FilterValue, 26, 20, 0, // Skip to: 23225
+/* 23205 */ MCD_OPC_CheckPredicate, 0, 52, 68, // Skip to: 40669
+/* 23209 */ MCD_OPC_CheckField, 29, 3, 2, 46, 68, // Skip to: 40669
+/* 23215 */ MCD_OPC_CheckField, 21, 1, 0, 40, 68, // Skip to: 40669
+/* 23221 */ MCD_OPC_Decode, 228, 15, 112, // Opcode: TRN2v2i64
+/* 23225 */ MCD_OPC_FilterValue, 30, 64, 0, // Skip to: 23293
+/* 23229 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 23232 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23250
+/* 23236 */ MCD_OPC_CheckPredicate, 0, 21, 68, // Skip to: 40669
+/* 23240 */ MCD_OPC_CheckField, 29, 3, 2, 15, 68, // Skip to: 40669
+/* 23246 */ MCD_OPC_Decode, 207, 18, 112, // Opcode: ZIP2v2i64
+/* 23250 */ MCD_OPC_FilterValue, 1, 7, 68, // Skip to: 40669
+/* 23254 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23257 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23275
+/* 23261 */ MCD_OPC_CheckPredicate, 0, 252, 67, // Skip to: 40669
+/* 23265 */ MCD_OPC_CheckField, 16, 5, 0, 246, 67, // Skip to: 40669
+/* 23271 */ MCD_OPC_Decode, 153, 11, 117, // Opcode: SQABSv2i64
+/* 23275 */ MCD_OPC_FilterValue, 3, 238, 67, // Skip to: 40669
+/* 23279 */ MCD_OPC_CheckPredicate, 0, 234, 67, // Skip to: 40669
+/* 23283 */ MCD_OPC_CheckField, 16, 5, 0, 228, 67, // Skip to: 40669
+/* 23289 */ MCD_OPC_Decode, 223, 11, 117, // Opcode: SQNEGv2i64
+/* 23293 */ MCD_OPC_FilterValue, 33, 38, 0, // Skip to: 23335
+/* 23297 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23300 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 23317
+/* 23304 */ MCD_OPC_CheckPredicate, 0, 209, 67, // Skip to: 40669
+/* 23308 */ MCD_OPC_CheckField, 21, 1, 1, 203, 67, // Skip to: 40669
+/* 23314 */ MCD_OPC_Decode, 72, 112, // Opcode: ADDv2i64
+/* 23317 */ MCD_OPC_FilterValue, 3, 196, 67, // Skip to: 40669
+/* 23321 */ MCD_OPC_CheckPredicate, 0, 192, 67, // Skip to: 40669
+/* 23325 */ MCD_OPC_CheckField, 21, 1, 1, 186, 67, // Skip to: 40669
+/* 23331 */ MCD_OPC_Decode, 176, 15, 112, // Opcode: SUBv2i64
+/* 23335 */ MCD_OPC_FilterValue, 34, 52, 0, // Skip to: 23391
+/* 23339 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 23342 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 23373
+/* 23346 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23349 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23361
+/* 23353 */ MCD_OPC_CheckPredicate, 0, 160, 67, // Skip to: 40669
+/* 23357 */ MCD_OPC_Decode, 197, 1, 117, // Opcode: CMGTv2i64rz
+/* 23361 */ MCD_OPC_FilterValue, 3, 152, 67, // Skip to: 40669
+/* 23365 */ MCD_OPC_CheckPredicate, 0, 148, 67, // Skip to: 40669
+/* 23369 */ MCD_OPC_Decode, 181, 1, 117, // Opcode: CMGEv2i64rz
+/* 23373 */ MCD_OPC_FilterValue, 33, 140, 67, // Skip to: 40669
+/* 23377 */ MCD_OPC_CheckPredicate, 0, 136, 67, // Skip to: 40669
+/* 23381 */ MCD_OPC_CheckField, 29, 3, 2, 130, 67, // Skip to: 40669
+/* 23387 */ MCD_OPC_Decode, 173, 5, 117, // Opcode: FRINTPv2f64
+/* 23391 */ MCD_OPC_FilterValue, 35, 39, 0, // Skip to: 23434
+/* 23395 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23398 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23416
+/* 23402 */ MCD_OPC_CheckPredicate, 0, 111, 67, // Skip to: 40669
+/* 23406 */ MCD_OPC_CheckField, 21, 1, 1, 105, 67, // Skip to: 40669
+/* 23412 */ MCD_OPC_Decode, 241, 1, 112, // Opcode: CMTSTv2i64
+/* 23416 */ MCD_OPC_FilterValue, 3, 97, 67, // Skip to: 40669
+/* 23420 */ MCD_OPC_CheckPredicate, 0, 93, 67, // Skip to: 40669
+/* 23424 */ MCD_OPC_CheckField, 21, 1, 1, 87, 67, // Skip to: 40669
+/* 23430 */ MCD_OPC_Decode, 164, 1, 112, // Opcode: CMEQv2i64
+/* 23434 */ MCD_OPC_FilterValue, 38, 65, 0, // Skip to: 23503
+/* 23438 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 23441 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 23472
+/* 23445 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23448 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23460
+/* 23452 */ MCD_OPC_CheckPredicate, 0, 61, 67, // Skip to: 40669
+/* 23456 */ MCD_OPC_Decode, 165, 1, 117, // Opcode: CMEQv2i64rz
+/* 23460 */ MCD_OPC_FilterValue, 3, 53, 67, // Skip to: 40669
+/* 23464 */ MCD_OPC_CheckPredicate, 0, 49, 67, // Skip to: 40669
+/* 23468 */ MCD_OPC_Decode, 225, 1, 117, // Opcode: CMLEv2i64rz
+/* 23472 */ MCD_OPC_FilterValue, 33, 41, 67, // Skip to: 40669
+/* 23476 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23479 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23491
+/* 23483 */ MCD_OPC_CheckPredicate, 0, 30, 67, // Skip to: 40669
+/* 23487 */ MCD_OPC_Decode, 183, 5, 117, // Opcode: FRINTZv2f64
+/* 23491 */ MCD_OPC_FilterValue, 3, 22, 67, // Skip to: 40669
+/* 23495 */ MCD_OPC_CheckPredicate, 0, 18, 67, // Skip to: 40669
+/* 23499 */ MCD_OPC_Decode, 158, 5, 117, // Opcode: FRINTIv2f64
+/* 23503 */ MCD_OPC_FilterValue, 42, 52, 0, // Skip to: 23559
+/* 23507 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 23510 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 23528
+/* 23514 */ MCD_OPC_CheckPredicate, 0, 255, 66, // Skip to: 40669
+/* 23518 */ MCD_OPC_CheckField, 29, 3, 2, 249, 66, // Skip to: 40669
+/* 23524 */ MCD_OPC_Decode, 233, 1, 117, // Opcode: CMLTv2i64rz
+/* 23528 */ MCD_OPC_FilterValue, 33, 241, 66, // Skip to: 40669
+/* 23532 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23535 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23547
+/* 23539 */ MCD_OPC_CheckPredicate, 0, 230, 66, // Skip to: 40669
+/* 23543 */ MCD_OPC_Decode, 207, 3, 117, // Opcode: FCVTPSv2f64
+/* 23547 */ MCD_OPC_FilterValue, 3, 222, 66, // Skip to: 40669
+/* 23551 */ MCD_OPC_CheckPredicate, 0, 218, 66, // Skip to: 40669
+/* 23555 */ MCD_OPC_Decode, 216, 3, 117, // Opcode: FCVTPUv2f64
+/* 23559 */ MCD_OPC_FilterValue, 46, 64, 0, // Skip to: 23627
+/* 23563 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 23566 */ MCD_OPC_FilterValue, 32, 26, 0, // Skip to: 23596
+/* 23570 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23573 */ MCD_OPC_FilterValue, 2, 7, 0, // Skip to: 23584
+/* 23577 */ MCD_OPC_CheckPredicate, 0, 192, 66, // Skip to: 40669
+/* 23581 */ MCD_OPC_Decode, 23, 117, // Opcode: ABSv2i64
+/* 23584 */ MCD_OPC_FilterValue, 3, 185, 66, // Skip to: 40669
+/* 23588 */ MCD_OPC_CheckPredicate, 0, 181, 66, // Skip to: 40669
+/* 23592 */ MCD_OPC_Decode, 248, 8, 117, // Opcode: NEGv2i64
+/* 23596 */ MCD_OPC_FilterValue, 33, 173, 66, // Skip to: 40669
+/* 23600 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23603 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23615
+/* 23607 */ MCD_OPC_CheckPredicate, 0, 162, 66, // Skip to: 40669
+/* 23611 */ MCD_OPC_Decode, 247, 3, 117, // Opcode: FCVTZSv2f64
+/* 23615 */ MCD_OPC_FilterValue, 3, 154, 66, // Skip to: 40669
+/* 23619 */ MCD_OPC_CheckPredicate, 0, 150, 66, // Skip to: 40669
+/* 23623 */ MCD_OPC_Decode, 148, 4, 117, // Opcode: FCVTZUv2f64
+/* 23627 */ MCD_OPC_FilterValue, 47, 19, 0, // Skip to: 23650
+/* 23631 */ MCD_OPC_CheckPredicate, 0, 138, 66, // Skip to: 40669
+/* 23635 */ MCD_OPC_CheckField, 29, 3, 2, 132, 66, // Skip to: 40669
+/* 23641 */ MCD_OPC_CheckField, 21, 1, 1, 126, 66, // Skip to: 40669
+/* 23647 */ MCD_OPC_Decode, 40, 112, // Opcode: ADDPv2i64
+/* 23650 */ MCD_OPC_FilterValue, 49, 39, 0, // Skip to: 23693
+/* 23654 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23657 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23675
+/* 23661 */ MCD_OPC_CheckPredicate, 0, 108, 66, // Skip to: 40669
+/* 23665 */ MCD_OPC_CheckField, 21, 1, 1, 102, 66, // Skip to: 40669
+/* 23671 */ MCD_OPC_Decode, 192, 4, 112, // Opcode: FMINNMv2f64
+/* 23675 */ MCD_OPC_FilterValue, 3, 94, 66, // Skip to: 40669
+/* 23679 */ MCD_OPC_CheckPredicate, 0, 90, 66, // Skip to: 40669
+/* 23683 */ MCD_OPC_CheckField, 21, 1, 1, 84, 66, // Skip to: 40669
+/* 23689 */ MCD_OPC_Decode, 185, 4, 112, // Opcode: FMINNMPv2f64
+/* 23693 */ MCD_OPC_FilterValue, 50, 39, 0, // Skip to: 23736
+/* 23697 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23700 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23718
+/* 23704 */ MCD_OPC_CheckPredicate, 0, 65, 66, // Skip to: 40669
+/* 23708 */ MCD_OPC_CheckField, 16, 6, 32, 59, 66, // Skip to: 40669
+/* 23714 */ MCD_OPC_Decode, 239, 2, 117, // Opcode: FCMGTv2i64rz
+/* 23718 */ MCD_OPC_FilterValue, 3, 51, 66, // Skip to: 40669
+/* 23722 */ MCD_OPC_CheckPredicate, 0, 47, 66, // Skip to: 40669
+/* 23726 */ MCD_OPC_CheckField, 16, 6, 32, 41, 66, // Skip to: 40669
+/* 23732 */ MCD_OPC_Decode, 229, 2, 117, // Opcode: FCMGEv2i64rz
+/* 23736 */ MCD_OPC_FilterValue, 51, 20, 0, // Skip to: 23760
+/* 23740 */ MCD_OPC_CheckPredicate, 0, 29, 66, // Skip to: 40669
+/* 23744 */ MCD_OPC_CheckField, 29, 3, 2, 23, 66, // Skip to: 40669
+/* 23750 */ MCD_OPC_CheckField, 21, 1, 1, 17, 66, // Skip to: 40669
+/* 23756 */ MCD_OPC_Decode, 215, 4, 120, // Opcode: FMLSv2f64
+/* 23760 */ MCD_OPC_FilterValue, 53, 39, 0, // Skip to: 23803
+/* 23764 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23767 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 23785
+/* 23771 */ MCD_OPC_CheckPredicate, 0, 254, 65, // Skip to: 40669
+/* 23775 */ MCD_OPC_CheckField, 21, 1, 1, 248, 65, // Skip to: 40669
+/* 23781 */ MCD_OPC_Decode, 203, 5, 112, // Opcode: FSUBv2f64
+/* 23785 */ MCD_OPC_FilterValue, 3, 240, 65, // Skip to: 40669
+/* 23789 */ MCD_OPC_CheckPredicate, 0, 236, 65, // Skip to: 40669
+/* 23793 */ MCD_OPC_CheckField, 21, 1, 1, 230, 65, // Skip to: 40669
+/* 23799 */ MCD_OPC_Decode, 181, 2, 112, // Opcode: FABDv2f64
+/* 23803 */ MCD_OPC_FilterValue, 54, 65, 0, // Skip to: 23872
+/* 23807 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 23810 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 23841
+/* 23814 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23817 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23829
+/* 23821 */ MCD_OPC_CheckPredicate, 0, 204, 65, // Skip to: 40669
+/* 23825 */ MCD_OPC_Decode, 219, 2, 117, // Opcode: FCMEQv2i64rz
+/* 23829 */ MCD_OPC_FilterValue, 3, 196, 65, // Skip to: 40669
+/* 23833 */ MCD_OPC_CheckPredicate, 0, 192, 65, // Skip to: 40669
+/* 23837 */ MCD_OPC_Decode, 245, 2, 117, // Opcode: FCMLEv2i64rz
+/* 23841 */ MCD_OPC_FilterValue, 33, 184, 65, // Skip to: 40669
+/* 23845 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23848 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 23860
+/* 23852 */ MCD_OPC_CheckPredicate, 0, 173, 65, // Skip to: 40669
+/* 23856 */ MCD_OPC_Decode, 141, 5, 117, // Opcode: FRECPEv2f64
+/* 23860 */ MCD_OPC_FilterValue, 3, 165, 65, // Skip to: 40669
+/* 23864 */ MCD_OPC_CheckPredicate, 0, 161, 65, // Skip to: 40669
+/* 23868 */ MCD_OPC_Decode, 188, 5, 117, // Opcode: FRSQRTEv2f64
+/* 23872 */ MCD_OPC_FilterValue, 56, 39, 0, // Skip to: 23915
+/* 23876 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23879 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 23897
+/* 23883 */ MCD_OPC_CheckPredicate, 1, 142, 65, // Skip to: 40669
+/* 23887 */ MCD_OPC_CheckField, 21, 1, 1, 136, 65, // Skip to: 40669
+/* 23893 */ MCD_OPC_Decode, 146, 9, 85, // Opcode: PMULLv1i64
+/* 23897 */ MCD_OPC_FilterValue, 2, 128, 65, // Skip to: 40669
+/* 23901 */ MCD_OPC_CheckPredicate, 1, 124, 65, // Skip to: 40669
+/* 23905 */ MCD_OPC_CheckField, 21, 1, 1, 118, 65, // Skip to: 40669
+/* 23911 */ MCD_OPC_Decode, 147, 9, 112, // Opcode: PMULLv2i64
+/* 23915 */ MCD_OPC_FilterValue, 57, 20, 0, // Skip to: 23939
+/* 23919 */ MCD_OPC_CheckPredicate, 0, 106, 65, // Skip to: 40669
+/* 23923 */ MCD_OPC_CheckField, 29, 3, 3, 100, 65, // Skip to: 40669
+/* 23929 */ MCD_OPC_CheckField, 21, 1, 1, 94, 65, // Skip to: 40669
+/* 23935 */ MCD_OPC_Decode, 237, 2, 112, // Opcode: FCMGTv2f64
+/* 23939 */ MCD_OPC_FilterValue, 58, 20, 0, // Skip to: 23963
+/* 23943 */ MCD_OPC_CheckPredicate, 0, 82, 65, // Skip to: 40669
+/* 23947 */ MCD_OPC_CheckField, 29, 3, 2, 76, 65, // Skip to: 40669
+/* 23953 */ MCD_OPC_CheckField, 16, 6, 32, 70, 65, // Skip to: 40669
+/* 23959 */ MCD_OPC_Decode, 250, 2, 117, // Opcode: FCMLTv2i64rz
+/* 23963 */ MCD_OPC_FilterValue, 59, 20, 0, // Skip to: 23987
+/* 23967 */ MCD_OPC_CheckPredicate, 0, 58, 65, // Skip to: 40669
+/* 23971 */ MCD_OPC_CheckField, 29, 3, 3, 52, 65, // Skip to: 40669
+/* 23977 */ MCD_OPC_CheckField, 21, 1, 1, 46, 65, // Skip to: 40669
+/* 23983 */ MCD_OPC_Decode, 196, 2, 112, // Opcode: FACGTv2f64
+/* 23987 */ MCD_OPC_FilterValue, 61, 39, 0, // Skip to: 24030
+/* 23991 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 23994 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 24012
+/* 23998 */ MCD_OPC_CheckPredicate, 0, 27, 65, // Skip to: 40669
+/* 24002 */ MCD_OPC_CheckField, 21, 1, 1, 21, 65, // Skip to: 40669
+/* 24008 */ MCD_OPC_Decode, 202, 4, 112, // Opcode: FMINv2f64
+/* 24012 */ MCD_OPC_FilterValue, 3, 13, 65, // Skip to: 40669
+/* 24016 */ MCD_OPC_CheckPredicate, 0, 9, 65, // Skip to: 40669
+/* 24020 */ MCD_OPC_CheckField, 21, 1, 1, 3, 65, // Skip to: 40669
+/* 24026 */ MCD_OPC_Decode, 195, 4, 112, // Opcode: FMINPv2f64
+/* 24030 */ MCD_OPC_FilterValue, 62, 52, 0, // Skip to: 24086
+/* 24034 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 24037 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 24068
+/* 24041 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 24044 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 24056
+/* 24048 */ MCD_OPC_CheckPredicate, 0, 233, 64, // Skip to: 40669
+/* 24052 */ MCD_OPC_Decode, 186, 2, 117, // Opcode: FABSv2f64
+/* 24056 */ MCD_OPC_FilterValue, 3, 225, 64, // Skip to: 40669
+/* 24060 */ MCD_OPC_CheckPredicate, 0, 221, 64, // Skip to: 40669
+/* 24064 */ MCD_OPC_Decode, 130, 5, 117, // Opcode: FNEGv2f64
+/* 24068 */ MCD_OPC_FilterValue, 33, 213, 64, // Skip to: 40669
+/* 24072 */ MCD_OPC_CheckPredicate, 0, 209, 64, // Skip to: 40669
+/* 24076 */ MCD_OPC_CheckField, 29, 3, 3, 203, 64, // Skip to: 40669
+/* 24082 */ MCD_OPC_Decode, 198, 5, 117, // Opcode: FSQRTv2f64
+/* 24086 */ MCD_OPC_FilterValue, 63, 195, 64, // Skip to: 40669
+/* 24090 */ MCD_OPC_CheckPredicate, 0, 191, 64, // Skip to: 40669
+/* 24094 */ MCD_OPC_CheckField, 29, 3, 2, 185, 64, // Skip to: 40669
+/* 24100 */ MCD_OPC_CheckField, 21, 1, 1, 179, 64, // Skip to: 40669
+/* 24106 */ MCD_OPC_Decode, 193, 5, 112, // Opcode: FRSQRTSv2f64
+/* 24110 */ MCD_OPC_FilterValue, 12, 165, 13, // Skip to: 27607
/* 24114 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24117 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 24135
-/* 24121 */ MCD_OPC_CheckPredicate, 0, 249, 84, // Skip to: 45878
-/* 24125 */ MCD_OPC_CheckField, 21, 1, 1, 243, 84, // Skip to: 45878
-/* 24131 */ MCD_OPC_Decode, 221, 17, 92, // Opcode: SUBHNvvv_2s2d
-/* 24135 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24153
-/* 24139 */ MCD_OPC_CheckPredicate, 0, 231, 84, // Skip to: 45878
-/* 24143 */ MCD_OPC_CheckField, 21, 1, 1, 225, 84, // Skip to: 45878
-/* 24149 */ MCD_OPC_Decode, 149, 12, 92, // Opcode: RSUBHNvvv_2s2d
-/* 24153 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 24171
-/* 24157 */ MCD_OPC_CheckPredicate, 0, 213, 84, // Skip to: 45878
-/* 24161 */ MCD_OPC_CheckField, 21, 1, 1, 207, 84, // Skip to: 45878
-/* 24167 */ MCD_OPC_Decode, 219, 17, 110, // Opcode: SUBHN2vvv_4s2d
-/* 24171 */ MCD_OPC_FilterValue, 3, 199, 84, // Skip to: 45878
-/* 24175 */ MCD_OPC_CheckPredicate, 0, 195, 84, // Skip to: 45878
-/* 24179 */ MCD_OPC_CheckField, 21, 1, 1, 189, 84, // Skip to: 45878
-/* 24185 */ MCD_OPC_Decode, 147, 12, 110, // Opcode: RSUBHN2vvv_4s2d
-/* 24189 */ MCD_OPC_FilterValue, 25, 75, 0, // Skip to: 24268
-/* 24193 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24196 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 24214
-/* 24200 */ MCD_OPC_CheckPredicate, 0, 170, 84, // Skip to: 45878
-/* 24204 */ MCD_OPC_CheckField, 21, 1, 1, 164, 84, // Skip to: 45878
-/* 24210 */ MCD_OPC_Decode, 167, 13, 78, // Opcode: SMAXvvv_2S
-/* 24214 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24232
-/* 24218 */ MCD_OPC_CheckPredicate, 0, 152, 84, // Skip to: 45878
-/* 24222 */ MCD_OPC_CheckField, 21, 1, 1, 146, 84, // Skip to: 45878
-/* 24228 */ MCD_OPC_Decode, 202, 19, 78, // Opcode: UMAXvvv_2S
-/* 24232 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 24250
-/* 24236 */ MCD_OPC_CheckPredicate, 0, 134, 84, // Skip to: 45878
-/* 24240 */ MCD_OPC_CheckField, 21, 1, 1, 128, 84, // Skip to: 45878
-/* 24246 */ MCD_OPC_Decode, 169, 13, 102, // Opcode: SMAXvvv_4S
-/* 24250 */ MCD_OPC_FilterValue, 3, 120, 84, // Skip to: 45878
-/* 24254 */ MCD_OPC_CheckPredicate, 0, 116, 84, // Skip to: 45878
-/* 24258 */ MCD_OPC_CheckField, 21, 1, 1, 110, 84, // Skip to: 45878
-/* 24264 */ MCD_OPC_Decode, 204, 19, 102, // Opcode: UMAXvvv_4S
-/* 24268 */ MCD_OPC_FilterValue, 26, 113, 0, // Skip to: 24385
-/* 24272 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24275 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 24312
-/* 24279 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 24282 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 24294
-/* 24286 */ MCD_OPC_CheckPredicate, 0, 84, 84, // Skip to: 45878
-/* 24290 */ MCD_OPC_Decode, 216, 18, 78, // Opcode: TRN2vvv_2s
-/* 24294 */ MCD_OPC_FilterValue, 1, 76, 84, // Skip to: 45878
-/* 24298 */ MCD_OPC_CheckPredicate, 0, 72, 84, // Skip to: 45878
-/* 24302 */ MCD_OPC_CheckField, 16, 5, 0, 66, 84, // Skip to: 45878
-/* 24308 */ MCD_OPC_Decode, 177, 12, 88, // Opcode: SADALP2s1d
-/* 24312 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24330
-/* 24316 */ MCD_OPC_CheckPredicate, 0, 54, 84, // Skip to: 45878
-/* 24320 */ MCD_OPC_CheckField, 16, 6, 32, 48, 84, // Skip to: 45878
-/* 24326 */ MCD_OPC_Decode, 254, 18, 88, // Opcode: UADALP2s1d
-/* 24330 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 24367
-/* 24334 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 24337 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 24349
-/* 24341 */ MCD_OPC_CheckPredicate, 0, 29, 84, // Skip to: 45878
-/* 24345 */ MCD_OPC_Decode, 218, 18, 102, // Opcode: TRN2vvv_4s
-/* 24349 */ MCD_OPC_FilterValue, 1, 21, 84, // Skip to: 45878
-/* 24353 */ MCD_OPC_CheckPredicate, 0, 17, 84, // Skip to: 45878
-/* 24357 */ MCD_OPC_CheckField, 16, 5, 0, 11, 84, // Skip to: 45878
-/* 24363 */ MCD_OPC_Decode, 179, 12, 116, // Opcode: SADALP4s2d
-/* 24367 */ MCD_OPC_FilterValue, 3, 3, 84, // Skip to: 45878
-/* 24371 */ MCD_OPC_CheckPredicate, 0, 255, 83, // Skip to: 45878
-/* 24375 */ MCD_OPC_CheckField, 16, 6, 32, 249, 83, // Skip to: 45878
-/* 24381 */ MCD_OPC_Decode, 128, 19, 116, // Opcode: UADALP4s2d
-/* 24385 */ MCD_OPC_FilterValue, 27, 75, 0, // Skip to: 24464
-/* 24389 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24392 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 24410
-/* 24396 */ MCD_OPC_CheckPredicate, 0, 230, 83, // Skip to: 45878
-/* 24400 */ MCD_OPC_CheckField, 21, 1, 1, 224, 83, // Skip to: 45878
-/* 24406 */ MCD_OPC_Decode, 185, 13, 78, // Opcode: SMINvvv_2S
-/* 24410 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24428
-/* 24414 */ MCD_OPC_CheckPredicate, 0, 212, 83, // Skip to: 45878
-/* 24418 */ MCD_OPC_CheckField, 21, 1, 1, 206, 83, // Skip to: 45878
-/* 24424 */ MCD_OPC_Decode, 219, 19, 78, // Opcode: UMINvvv_2S
-/* 24428 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 24446
-/* 24432 */ MCD_OPC_CheckPredicate, 0, 194, 83, // Skip to: 45878
-/* 24436 */ MCD_OPC_CheckField, 21, 1, 1, 188, 83, // Skip to: 45878
-/* 24442 */ MCD_OPC_Decode, 187, 13, 102, // Opcode: SMINvvv_4S
-/* 24446 */ MCD_OPC_FilterValue, 3, 180, 83, // Skip to: 45878
-/* 24450 */ MCD_OPC_CheckPredicate, 0, 176, 83, // Skip to: 45878
-/* 24454 */ MCD_OPC_CheckField, 21, 1, 1, 170, 83, // Skip to: 45878
-/* 24460 */ MCD_OPC_Decode, 221, 19, 102, // Opcode: UMINvvv_4S
-/* 24464 */ MCD_OPC_FilterValue, 28, 75, 0, // Skip to: 24543
-/* 24468 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24471 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 24489
-/* 24475 */ MCD_OPC_CheckPredicate, 0, 151, 83, // Skip to: 45878
-/* 24479 */ MCD_OPC_CheckField, 21, 1, 1, 145, 83, // Skip to: 45878
-/* 24485 */ MCD_OPC_Decode, 167, 12, 74, // Opcode: SABDLvvv_2d2s
-/* 24489 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24507
-/* 24493 */ MCD_OPC_CheckPredicate, 0, 133, 83, // Skip to: 45878
-/* 24497 */ MCD_OPC_CheckField, 21, 1, 1, 127, 83, // Skip to: 45878
-/* 24503 */ MCD_OPC_Decode, 244, 18, 74, // Opcode: UABDLvvv_2d2s
-/* 24507 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 24525
-/* 24511 */ MCD_OPC_CheckPredicate, 0, 115, 83, // Skip to: 45878
-/* 24515 */ MCD_OPC_CheckField, 21, 1, 1, 109, 83, // Skip to: 45878
-/* 24521 */ MCD_OPC_Decode, 164, 12, 102, // Opcode: SABDL2vvv_2d2s
-/* 24525 */ MCD_OPC_FilterValue, 3, 101, 83, // Skip to: 45878
-/* 24529 */ MCD_OPC_CheckPredicate, 0, 97, 83, // Skip to: 45878
-/* 24533 */ MCD_OPC_CheckField, 21, 1, 1, 91, 83, // Skip to: 45878
-/* 24539 */ MCD_OPC_Decode, 241, 18, 102, // Opcode: UABDL2vvv_2d2s
-/* 24543 */ MCD_OPC_FilterValue, 29, 75, 0, // Skip to: 24622
-/* 24547 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24550 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 24568
-/* 24554 */ MCD_OPC_CheckPredicate, 0, 72, 83, // Skip to: 45878
-/* 24558 */ MCD_OPC_CheckField, 21, 1, 1, 66, 83, // Skip to: 45878
-/* 24564 */ MCD_OPC_Decode, 171, 12, 78, // Opcode: SABDvvv_2S
-/* 24568 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24586
-/* 24572 */ MCD_OPC_CheckPredicate, 0, 54, 83, // Skip to: 45878
-/* 24576 */ MCD_OPC_CheckField, 21, 1, 1, 48, 83, // Skip to: 45878
-/* 24582 */ MCD_OPC_Decode, 248, 18, 78, // Opcode: UABDvvv_2S
-/* 24586 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 24604
-/* 24590 */ MCD_OPC_CheckPredicate, 0, 36, 83, // Skip to: 45878
-/* 24594 */ MCD_OPC_CheckField, 21, 1, 1, 30, 83, // Skip to: 45878
-/* 24600 */ MCD_OPC_Decode, 173, 12, 102, // Opcode: SABDvvv_4S
-/* 24604 */ MCD_OPC_FilterValue, 3, 22, 83, // Skip to: 45878
-/* 24608 */ MCD_OPC_CheckPredicate, 0, 18, 83, // Skip to: 45878
-/* 24612 */ MCD_OPC_CheckField, 21, 1, 1, 12, 83, // Skip to: 45878
-/* 24618 */ MCD_OPC_Decode, 250, 18, 102, // Opcode: UABDvvv_4S
-/* 24622 */ MCD_OPC_FilterValue, 30, 113, 0, // Skip to: 24739
-/* 24626 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24629 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 24666
+/* 24117 */ MCD_OPC_FilterValue, 0, 66, 3, // Skip to: 24955
+/* 24121 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 24124 */ MCD_OPC_FilterValue, 1, 171, 2, // Skip to: 24811
+/* 24128 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 24131 */ MCD_OPC_FilterValue, 0, 91, 1, // Skip to: 24482
+/* 24135 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 24138 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 24271
+/* 24142 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 24145 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 24238
+/* 24149 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 24152 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 24205
+/* 24156 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 24159 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24172
+/* 24163 */ MCD_OPC_CheckPredicate, 0, 118, 64, // Skip to: 40669
+/* 24167 */ MCD_OPC_Decode, 203, 8, 145, 1, // Opcode: MOVIv2i32
+/* 24172 */ MCD_OPC_FilterValue, 1, 109, 64, // Skip to: 40669
+/* 24176 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 24179 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24192
+/* 24183 */ MCD_OPC_CheckPredicate, 0, 98, 64, // Skip to: 40669
+/* 24187 */ MCD_OPC_Decode, 152, 13, 146, 1, // Opcode: SSHRv8i8_shift
+/* 24192 */ MCD_OPC_FilterValue, 1, 89, 64, // Skip to: 40669
+/* 24196 */ MCD_OPC_CheckPredicate, 0, 85, 64, // Skip to: 40669
+/* 24200 */ MCD_OPC_Decode, 250, 12, 146, 1, // Opcode: SRSHRv8i8_shift
+/* 24205 */ MCD_OPC_FilterValue, 1, 76, 64, // Skip to: 40669
+/* 24209 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 24212 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24225
+/* 24216 */ MCD_OPC_CheckPredicate, 0, 65, 64, // Skip to: 40669
+/* 24220 */ MCD_OPC_Decode, 149, 13, 147, 1, // Opcode: SSHRv4i16_shift
+/* 24225 */ MCD_OPC_FilterValue, 1, 56, 64, // Skip to: 40669
+/* 24229 */ MCD_OPC_CheckPredicate, 0, 52, 64, // Skip to: 40669
+/* 24233 */ MCD_OPC_Decode, 247, 12, 147, 1, // Opcode: SRSHRv4i16_shift
+/* 24238 */ MCD_OPC_FilterValue, 1, 43, 64, // Skip to: 40669
+/* 24242 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 24245 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24258
+/* 24249 */ MCD_OPC_CheckPredicate, 0, 32, 64, // Skip to: 40669
+/* 24253 */ MCD_OPC_Decode, 147, 13, 148, 1, // Opcode: SSHRv2i32_shift
+/* 24258 */ MCD_OPC_FilterValue, 1, 23, 64, // Skip to: 40669
+/* 24262 */ MCD_OPC_CheckPredicate, 0, 19, 64, // Skip to: 40669
+/* 24266 */ MCD_OPC_Decode, 245, 12, 148, 1, // Opcode: SRSHRv2i32_shift
+/* 24271 */ MCD_OPC_FilterValue, 1, 10, 64, // Skip to: 40669
+/* 24275 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 24278 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 24423
+/* 24282 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 24285 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 24364
+/* 24289 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 24292 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24305
+/* 24296 */ MCD_OPC_CheckPredicate, 0, 241, 63, // Skip to: 40669
+/* 24300 */ MCD_OPC_Decode, 140, 9, 149, 1, // Opcode: ORRv2i32
+/* 24305 */ MCD_OPC_FilterValue, 1, 232, 63, // Skip to: 40669
+/* 24309 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 24312 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24325
+/* 24316 */ MCD_OPC_CheckPredicate, 0, 221, 63, // Skip to: 40669
+/* 24320 */ MCD_OPC_Decode, 160, 13, 150, 1, // Opcode: SSRAv8i8_shift
+/* 24325 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 24338
+/* 24329 */ MCD_OPC_CheckPredicate, 0, 208, 63, // Skip to: 40669
+/* 24333 */ MCD_OPC_Decode, 130, 13, 150, 1, // Opcode: SRSRAv8i8_shift
+/* 24338 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 24351
+/* 24342 */ MCD_OPC_CheckPredicate, 0, 195, 63, // Skip to: 40669
+/* 24346 */ MCD_OPC_Decode, 181, 10, 151, 1, // Opcode: SHLv8i8_shift
+/* 24351 */ MCD_OPC_FilterValue, 3, 186, 63, // Skip to: 40669
+/* 24355 */ MCD_OPC_CheckPredicate, 0, 182, 63, // Skip to: 40669
+/* 24359 */ MCD_OPC_Decode, 173, 12, 151, 1, // Opcode: SQSHLv8i8_shift
+/* 24364 */ MCD_OPC_FilterValue, 1, 173, 63, // Skip to: 40669
+/* 24368 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 24371 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24384
+/* 24375 */ MCD_OPC_CheckPredicate, 0, 162, 63, // Skip to: 40669
+/* 24379 */ MCD_OPC_Decode, 157, 13, 152, 1, // Opcode: SSRAv4i16_shift
+/* 24384 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 24397
+/* 24388 */ MCD_OPC_CheckPredicate, 0, 149, 63, // Skip to: 40669
+/* 24392 */ MCD_OPC_Decode, 255, 12, 152, 1, // Opcode: SRSRAv4i16_shift
+/* 24397 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 24410
+/* 24401 */ MCD_OPC_CheckPredicate, 0, 136, 63, // Skip to: 40669
+/* 24405 */ MCD_OPC_Decode, 178, 10, 153, 1, // Opcode: SHLv4i16_shift
+/* 24410 */ MCD_OPC_FilterValue, 3, 127, 63, // Skip to: 40669
+/* 24414 */ MCD_OPC_CheckPredicate, 0, 123, 63, // Skip to: 40669
+/* 24418 */ MCD_OPC_Decode, 167, 12, 153, 1, // Opcode: SQSHLv4i16_shift
+/* 24423 */ MCD_OPC_FilterValue, 1, 114, 63, // Skip to: 40669
+/* 24427 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 24430 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24443
+/* 24434 */ MCD_OPC_CheckPredicate, 0, 103, 63, // Skip to: 40669
+/* 24438 */ MCD_OPC_Decode, 155, 13, 154, 1, // Opcode: SSRAv2i32_shift
+/* 24443 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 24456
+/* 24447 */ MCD_OPC_CheckPredicate, 0, 90, 63, // Skip to: 40669
+/* 24451 */ MCD_OPC_Decode, 253, 12, 154, 1, // Opcode: SRSRAv2i32_shift
+/* 24456 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 24469
+/* 24460 */ MCD_OPC_CheckPredicate, 0, 77, 63, // Skip to: 40669
+/* 24464 */ MCD_OPC_Decode, 176, 10, 155, 1, // Opcode: SHLv2i32_shift
+/* 24469 */ MCD_OPC_FilterValue, 3, 68, 63, // Skip to: 40669
+/* 24473 */ MCD_OPC_CheckPredicate, 0, 64, 63, // Skip to: 40669
+/* 24477 */ MCD_OPC_Decode, 163, 12, 155, 1, // Opcode: SQSHLv2i32_shift
+/* 24482 */ MCD_OPC_FilterValue, 1, 55, 63, // Skip to: 40669
+/* 24486 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ...
+/* 24489 */ MCD_OPC_FilterValue, 0, 227, 0, // Skip to: 24720
+/* 24493 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 24496 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 24629
+/* 24500 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 24503 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 24596
+/* 24507 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 24510 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 24563
+/* 24514 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 24517 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24530
+/* 24521 */ MCD_OPC_CheckPredicate, 0, 16, 63, // Skip to: 40669
+/* 24525 */ MCD_OPC_Decode, 205, 8, 145, 1, // Opcode: MOVIv4i16
+/* 24530 */ MCD_OPC_FilterValue, 1, 7, 63, // Skip to: 40669
+/* 24534 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 24537 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24550
+/* 24541 */ MCD_OPC_CheckPredicate, 0, 252, 62, // Skip to: 40669
+/* 24545 */ MCD_OPC_Decode, 187, 10, 156, 1, // Opcode: SHRNv8i8_shift
+/* 24550 */ MCD_OPC_FilterValue, 1, 243, 62, // Skip to: 40669
+/* 24554 */ MCD_OPC_CheckPredicate, 0, 239, 62, // Skip to: 40669
+/* 24558 */ MCD_OPC_Decode, 136, 13, 157, 1, // Opcode: SSHLLv8i8_shift
+/* 24563 */ MCD_OPC_FilterValue, 1, 230, 62, // Skip to: 40669
+/* 24567 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 24570 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24583
+/* 24574 */ MCD_OPC_CheckPredicate, 0, 219, 62, // Skip to: 40669
+/* 24578 */ MCD_OPC_Decode, 184, 10, 158, 1, // Opcode: SHRNv4i16_shift
+/* 24583 */ MCD_OPC_FilterValue, 1, 210, 62, // Skip to: 40669
+/* 24587 */ MCD_OPC_CheckPredicate, 0, 206, 62, // Skip to: 40669
+/* 24591 */ MCD_OPC_Decode, 133, 13, 159, 1, // Opcode: SSHLLv4i16_shift
+/* 24596 */ MCD_OPC_FilterValue, 1, 197, 62, // Skip to: 40669
+/* 24600 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 24603 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24616
+/* 24607 */ MCD_OPC_CheckPredicate, 0, 186, 62, // Skip to: 40669
+/* 24611 */ MCD_OPC_Decode, 183, 10, 160, 1, // Opcode: SHRNv2i32_shift
+/* 24616 */ MCD_OPC_FilterValue, 1, 177, 62, // Skip to: 40669
+/* 24620 */ MCD_OPC_CheckPredicate, 0, 173, 62, // Skip to: 40669
+/* 24624 */ MCD_OPC_Decode, 132, 13, 161, 1, // Opcode: SSHLLv2i32_shift
+/* 24629 */ MCD_OPC_FilterValue, 1, 164, 62, // Skip to: 40669
/* 24633 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 24636 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 24648
-/* 24640 */ MCD_OPC_CheckPredicate, 0, 242, 82, // Skip to: 45878
-/* 24644 */ MCD_OPC_Decode, 218, 21, 78, // Opcode: ZIP2vvv_2s
-/* 24648 */ MCD_OPC_FilterValue, 1, 234, 82, // Skip to: 45878
-/* 24652 */ MCD_OPC_CheckPredicate, 0, 230, 82, // Skip to: 45878
-/* 24656 */ MCD_OPC_CheckField, 16, 5, 0, 224, 82, // Skip to: 45878
-/* 24662 */ MCD_OPC_Decode, 229, 13, 79, // Opcode: SQABS2s
-/* 24666 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24684
-/* 24670 */ MCD_OPC_CheckPredicate, 0, 212, 82, // Skip to: 45878
-/* 24674 */ MCD_OPC_CheckField, 16, 6, 32, 206, 82, // Skip to: 45878
-/* 24680 */ MCD_OPC_Decode, 179, 14, 79, // Opcode: SQNEG2s
-/* 24684 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 24721
-/* 24688 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 24691 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 24703
-/* 24695 */ MCD_OPC_CheckPredicate, 0, 187, 82, // Skip to: 45878
-/* 24699 */ MCD_OPC_Decode, 220, 21, 102, // Opcode: ZIP2vvv_4s
-/* 24703 */ MCD_OPC_FilterValue, 1, 179, 82, // Skip to: 45878
-/* 24707 */ MCD_OPC_CheckPredicate, 0, 175, 82, // Skip to: 45878
-/* 24711 */ MCD_OPC_CheckField, 16, 5, 0, 169, 82, // Skip to: 45878
-/* 24717 */ MCD_OPC_Decode, 231, 13, 107, // Opcode: SQABS4s
-/* 24721 */ MCD_OPC_FilterValue, 3, 161, 82, // Skip to: 45878
-/* 24725 */ MCD_OPC_CheckPredicate, 0, 157, 82, // Skip to: 45878
-/* 24729 */ MCD_OPC_CheckField, 16, 6, 32, 151, 82, // Skip to: 45878
-/* 24735 */ MCD_OPC_Decode, 181, 14, 107, // Opcode: SQNEG4s
-/* 24739 */ MCD_OPC_FilterValue, 31, 75, 0, // Skip to: 24818
-/* 24743 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24746 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 24764
-/* 24750 */ MCD_OPC_CheckPredicate, 0, 132, 82, // Skip to: 45878
-/* 24754 */ MCD_OPC_CheckField, 21, 1, 1, 126, 82, // Skip to: 45878
-/* 24760 */ MCD_OPC_Decode, 159, 12, 98, // Opcode: SABAvvv_2S
-/* 24764 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24782
-/* 24768 */ MCD_OPC_CheckPredicate, 0, 114, 82, // Skip to: 45878
-/* 24772 */ MCD_OPC_CheckField, 21, 1, 1, 108, 82, // Skip to: 45878
-/* 24778 */ MCD_OPC_Decode, 236, 18, 98, // Opcode: UABAvvv_2S
-/* 24782 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 24800
-/* 24786 */ MCD_OPC_CheckPredicate, 0, 96, 82, // Skip to: 45878
-/* 24790 */ MCD_OPC_CheckField, 21, 1, 1, 90, 82, // Skip to: 45878
-/* 24796 */ MCD_OPC_Decode, 161, 12, 110, // Opcode: SABAvvv_4S
-/* 24800 */ MCD_OPC_FilterValue, 3, 82, 82, // Skip to: 45878
-/* 24804 */ MCD_OPC_CheckPredicate, 0, 78, 82, // Skip to: 45878
-/* 24808 */ MCD_OPC_CheckField, 21, 1, 1, 72, 82, // Skip to: 45878
-/* 24814 */ MCD_OPC_Decode, 238, 18, 110, // Opcode: UABAvvv_4S
-/* 24818 */ MCD_OPC_FilterValue, 32, 75, 0, // Skip to: 24897
-/* 24822 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24825 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 24843
-/* 24829 */ MCD_OPC_CheckPredicate, 0, 53, 82, // Skip to: 45878
-/* 24833 */ MCD_OPC_CheckField, 21, 1, 1, 47, 82, // Skip to: 45878
-/* 24839 */ MCD_OPC_Decode, 197, 13, 94, // Opcode: SMLALvvv_2d2s
-/* 24843 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24861
-/* 24847 */ MCD_OPC_CheckPredicate, 0, 35, 82, // Skip to: 45878
-/* 24851 */ MCD_OPC_CheckField, 21, 1, 1, 29, 82, // Skip to: 45878
-/* 24857 */ MCD_OPC_Decode, 231, 19, 94, // Opcode: UMLALvvv_2d2s
-/* 24861 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 24879
-/* 24865 */ MCD_OPC_CheckPredicate, 0, 17, 82, // Skip to: 45878
-/* 24869 */ MCD_OPC_CheckField, 21, 1, 1, 11, 82, // Skip to: 45878
-/* 24875 */ MCD_OPC_Decode, 190, 13, 110, // Opcode: SMLAL2vvv_2d4s
-/* 24879 */ MCD_OPC_FilterValue, 3, 3, 82, // Skip to: 45878
-/* 24883 */ MCD_OPC_CheckPredicate, 0, 255, 81, // Skip to: 45878
-/* 24887 */ MCD_OPC_CheckField, 21, 1, 1, 249, 81, // Skip to: 45878
-/* 24893 */ MCD_OPC_Decode, 224, 19, 110, // Opcode: UMLAL2vvv_2d4s
-/* 24897 */ MCD_OPC_FilterValue, 33, 73, 0, // Skip to: 24974
-/* 24901 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24904 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 24921
-/* 24908 */ MCD_OPC_CheckPredicate, 0, 230, 81, // Skip to: 45878
-/* 24912 */ MCD_OPC_CheckField, 21, 1, 1, 224, 81, // Skip to: 45878
-/* 24918 */ MCD_OPC_Decode, 75, 78, // Opcode: ADDvvv_2S
-/* 24921 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 24939
-/* 24925 */ MCD_OPC_CheckPredicate, 0, 213, 81, // Skip to: 45878
-/* 24929 */ MCD_OPC_CheckField, 21, 1, 1, 207, 81, // Skip to: 45878
-/* 24935 */ MCD_OPC_Decode, 249, 17, 78, // Opcode: SUBvvv_2S
-/* 24939 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 24956
-/* 24943 */ MCD_OPC_CheckPredicate, 0, 195, 81, // Skip to: 45878
-/* 24947 */ MCD_OPC_CheckField, 21, 1, 1, 189, 81, // Skip to: 45878
-/* 24953 */ MCD_OPC_Decode, 77, 102, // Opcode: ADDvvv_4S
-/* 24956 */ MCD_OPC_FilterValue, 3, 182, 81, // Skip to: 45878
-/* 24960 */ MCD_OPC_CheckPredicate, 0, 178, 81, // Skip to: 45878
-/* 24964 */ MCD_OPC_CheckField, 21, 1, 1, 172, 81, // Skip to: 45878
-/* 24970 */ MCD_OPC_Decode, 251, 17, 102, // Opcode: SUBvvv_4S
-/* 24974 */ MCD_OPC_FilterValue, 34, 101, 0, // Skip to: 25079
-/* 24978 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 24981 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 25012
-/* 24985 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 24988 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 25000
-/* 24992 */ MCD_OPC_CheckPredicate, 0, 146, 81, // Skip to: 45878
-/* 24996 */ MCD_OPC_Decode, 174, 2, 79, // Opcode: CMGTvvi_2S
-/* 25000 */ MCD_OPC_FilterValue, 33, 138, 81, // Skip to: 45878
-/* 25004 */ MCD_OPC_CheckPredicate, 0, 134, 81, // Skip to: 45878
-/* 25008 */ MCD_OPC_Decode, 176, 6, 79, // Opcode: FRINTP_2s
-/* 25012 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 25030
-/* 25016 */ MCD_OPC_CheckPredicate, 0, 122, 81, // Skip to: 45878
-/* 25020 */ MCD_OPC_CheckField, 16, 6, 32, 116, 81, // Skip to: 45878
-/* 25026 */ MCD_OPC_Decode, 158, 2, 79, // Opcode: CMGEvvi_2S
-/* 25030 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 25061
-/* 25034 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 25037 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 25049
-/* 25041 */ MCD_OPC_CheckPredicate, 0, 97, 81, // Skip to: 45878
-/* 25045 */ MCD_OPC_Decode, 176, 2, 107, // Opcode: CMGTvvi_4S
-/* 25049 */ MCD_OPC_FilterValue, 33, 89, 81, // Skip to: 45878
-/* 25053 */ MCD_OPC_CheckPredicate, 0, 85, 81, // Skip to: 45878
-/* 25057 */ MCD_OPC_Decode, 177, 6, 107, // Opcode: FRINTP_4s
-/* 25061 */ MCD_OPC_FilterValue, 3, 77, 81, // Skip to: 45878
-/* 25065 */ MCD_OPC_CheckPredicate, 0, 73, 81, // Skip to: 45878
-/* 25069 */ MCD_OPC_CheckField, 16, 6, 32, 67, 81, // Skip to: 45878
-/* 25075 */ MCD_OPC_Decode, 160, 2, 107, // Opcode: CMGEvvi_4S
-/* 25079 */ MCD_OPC_FilterValue, 35, 75, 0, // Skip to: 25158
-/* 25083 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25086 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 25104
-/* 25090 */ MCD_OPC_CheckPredicate, 0, 48, 81, // Skip to: 45878
-/* 25094 */ MCD_OPC_CheckField, 21, 1, 1, 42, 81, // Skip to: 45878
-/* 25100 */ MCD_OPC_Decode, 137, 3, 78, // Opcode: CMTSTvvv_2S
-/* 25104 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 25122
-/* 25108 */ MCD_OPC_CheckPredicate, 0, 30, 81, // Skip to: 45878
-/* 25112 */ MCD_OPC_CheckField, 21, 1, 1, 24, 81, // Skip to: 45878
-/* 25118 */ MCD_OPC_Decode, 149, 2, 78, // Opcode: CMEQvvv_2S
-/* 25122 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 25140
-/* 25126 */ MCD_OPC_CheckPredicate, 0, 12, 81, // Skip to: 45878
-/* 25130 */ MCD_OPC_CheckField, 21, 1, 1, 6, 81, // Skip to: 45878
-/* 25136 */ MCD_OPC_Decode, 139, 3, 102, // Opcode: CMTSTvvv_4S
-/* 25140 */ MCD_OPC_FilterValue, 3, 254, 80, // Skip to: 45878
-/* 25144 */ MCD_OPC_CheckPredicate, 0, 250, 80, // Skip to: 45878
-/* 25148 */ MCD_OPC_CheckField, 21, 1, 1, 244, 80, // Skip to: 45878
-/* 25154 */ MCD_OPC_Decode, 151, 2, 102, // Opcode: CMEQvvv_4S
-/* 25158 */ MCD_OPC_FilterValue, 36, 39, 0, // Skip to: 25201
-/* 25162 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25165 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 25183
-/* 25169 */ MCD_OPC_CheckPredicate, 0, 225, 80, // Skip to: 45878
-/* 25173 */ MCD_OPC_CheckField, 21, 1, 1, 219, 80, // Skip to: 45878
-/* 25179 */ MCD_OPC_Decode, 133, 14, 94, // Opcode: SQDMLALvvv_2d2s
-/* 25183 */ MCD_OPC_FilterValue, 2, 211, 80, // Skip to: 45878
-/* 25187 */ MCD_OPC_CheckPredicate, 0, 207, 80, // Skip to: 45878
-/* 25191 */ MCD_OPC_CheckField, 21, 1, 1, 201, 80, // Skip to: 45878
-/* 25197 */ MCD_OPC_Decode, 249, 13, 110, // Opcode: SQDMLAL2vvv_2d4s
-/* 25201 */ MCD_OPC_FilterValue, 37, 75, 0, // Skip to: 25280
-/* 25205 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25208 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 25226
-/* 25212 */ MCD_OPC_CheckPredicate, 0, 182, 80, // Skip to: 45878
-/* 25216 */ MCD_OPC_CheckField, 21, 1, 1, 176, 80, // Skip to: 45878
-/* 25222 */ MCD_OPC_Decode, 246, 10, 98, // Opcode: MLAvvv_2S
-/* 25226 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 25244
-/* 25230 */ MCD_OPC_CheckPredicate, 0, 164, 80, // Skip to: 45878
-/* 25234 */ MCD_OPC_CheckField, 21, 1, 1, 158, 80, // Skip to: 45878
-/* 25240 */ MCD_OPC_Decode, 128, 11, 98, // Opcode: MLSvvv_2S
-/* 25244 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 25262
-/* 25248 */ MCD_OPC_CheckPredicate, 0, 146, 80, // Skip to: 45878
-/* 25252 */ MCD_OPC_CheckField, 21, 1, 1, 140, 80, // Skip to: 45878
-/* 25258 */ MCD_OPC_Decode, 248, 10, 110, // Opcode: MLAvvv_4S
-/* 25262 */ MCD_OPC_FilterValue, 3, 132, 80, // Skip to: 45878
-/* 25266 */ MCD_OPC_CheckPredicate, 0, 128, 80, // Skip to: 45878
-/* 25270 */ MCD_OPC_CheckField, 21, 1, 1, 122, 80, // Skip to: 45878
-/* 25276 */ MCD_OPC_Decode, 130, 11, 110, // Opcode: MLSvvv_4S
-/* 25280 */ MCD_OPC_FilterValue, 38, 127, 0, // Skip to: 25411
-/* 25284 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25287 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 25318
-/* 25291 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 25294 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 25306
-/* 25298 */ MCD_OPC_CheckPredicate, 0, 96, 80, // Skip to: 45878
-/* 25302 */ MCD_OPC_Decode, 142, 2, 79, // Opcode: CMEQvvi_2S
-/* 25306 */ MCD_OPC_FilterValue, 33, 88, 80, // Skip to: 45878
-/* 25310 */ MCD_OPC_CheckPredicate, 0, 84, 80, // Skip to: 45878
-/* 25314 */ MCD_OPC_Decode, 186, 6, 79, // Opcode: FRINTZ_2s
-/* 25318 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 25349
-/* 25322 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 25325 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 25337
-/* 25329 */ MCD_OPC_CheckPredicate, 0, 65, 80, // Skip to: 45878
-/* 25333 */ MCD_OPC_Decode, 205, 2, 79, // Opcode: CMLEvvi_2S
-/* 25337 */ MCD_OPC_FilterValue, 33, 57, 80, // Skip to: 45878
-/* 25341 */ MCD_OPC_CheckPredicate, 0, 53, 80, // Skip to: 45878
-/* 25345 */ MCD_OPC_Decode, 161, 6, 79, // Opcode: FRINTI_2s
-/* 25349 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 25380
-/* 25353 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 25356 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 25368
-/* 25360 */ MCD_OPC_CheckPredicate, 0, 34, 80, // Skip to: 45878
-/* 25364 */ MCD_OPC_Decode, 144, 2, 107, // Opcode: CMEQvvi_4S
-/* 25368 */ MCD_OPC_FilterValue, 33, 26, 80, // Skip to: 45878
-/* 25372 */ MCD_OPC_CheckPredicate, 0, 22, 80, // Skip to: 45878
-/* 25376 */ MCD_OPC_Decode, 187, 6, 107, // Opcode: FRINTZ_4s
-/* 25380 */ MCD_OPC_FilterValue, 3, 14, 80, // Skip to: 45878
-/* 25384 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 25387 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 25399
-/* 25391 */ MCD_OPC_CheckPredicate, 0, 3, 80, // Skip to: 45878
-/* 25395 */ MCD_OPC_Decode, 207, 2, 107, // Opcode: CMLEvvi_4S
-/* 25399 */ MCD_OPC_FilterValue, 33, 251, 79, // Skip to: 45878
-/* 25403 */ MCD_OPC_CheckPredicate, 0, 247, 79, // Skip to: 45878
-/* 25407 */ MCD_OPC_Decode, 162, 6, 107, // Opcode: FRINTI_4s
-/* 25411 */ MCD_OPC_FilterValue, 39, 39, 0, // Skip to: 25454
-/* 25415 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25418 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 25436
-/* 25422 */ MCD_OPC_CheckPredicate, 0, 228, 79, // Skip to: 45878
-/* 25426 */ MCD_OPC_CheckField, 21, 1, 1, 222, 79, // Skip to: 45878
-/* 25432 */ MCD_OPC_Decode, 159, 11, 78, // Opcode: MULvvv_2S
-/* 25436 */ MCD_OPC_FilterValue, 2, 214, 79, // Skip to: 45878
-/* 25440 */ MCD_OPC_CheckPredicate, 0, 210, 79, // Skip to: 45878
-/* 25444 */ MCD_OPC_CheckField, 21, 1, 1, 204, 79, // Skip to: 45878
-/* 25450 */ MCD_OPC_Decode, 161, 11, 102, // Opcode: MULvvv_4S
-/* 25454 */ MCD_OPC_FilterValue, 40, 75, 0, // Skip to: 25533
-/* 25458 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25461 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 25479
-/* 25465 */ MCD_OPC_CheckPredicate, 0, 185, 79, // Skip to: 45878
-/* 25469 */ MCD_OPC_CheckField, 21, 1, 1, 179, 79, // Skip to: 45878
-/* 25475 */ MCD_OPC_Decode, 207, 13, 94, // Opcode: SMLSLvvv_2d2s
-/* 25479 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 25497
-/* 25483 */ MCD_OPC_CheckPredicate, 0, 167, 79, // Skip to: 45878
-/* 25487 */ MCD_OPC_CheckField, 21, 1, 1, 161, 79, // Skip to: 45878
-/* 25493 */ MCD_OPC_Decode, 241, 19, 94, // Opcode: UMLSLvvv_2d2s
-/* 25497 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 25515
-/* 25501 */ MCD_OPC_CheckPredicate, 0, 149, 79, // Skip to: 45878
-/* 25505 */ MCD_OPC_CheckField, 21, 1, 1, 143, 79, // Skip to: 45878
-/* 25511 */ MCD_OPC_Decode, 200, 13, 110, // Opcode: SMLSL2vvv_2d4s
-/* 25515 */ MCD_OPC_FilterValue, 3, 135, 79, // Skip to: 45878
-/* 25519 */ MCD_OPC_CheckPredicate, 0, 131, 79, // Skip to: 45878
-/* 25523 */ MCD_OPC_CheckField, 21, 1, 1, 125, 79, // Skip to: 45878
-/* 25529 */ MCD_OPC_Decode, 234, 19, 110, // Opcode: UMLSL2vvv_2d4s
-/* 25533 */ MCD_OPC_FilterValue, 41, 75, 0, // Skip to: 25612
-/* 25537 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25540 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 25558
-/* 25544 */ MCD_OPC_CheckPredicate, 0, 106, 79, // Skip to: 45878
-/* 25548 */ MCD_OPC_CheckField, 21, 1, 1, 100, 79, // Skip to: 45878
-/* 25554 */ MCD_OPC_Decode, 156, 13, 78, // Opcode: SMAXPvvv_2S
-/* 25558 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 25576
-/* 25562 */ MCD_OPC_CheckPredicate, 0, 88, 79, // Skip to: 45878
-/* 25566 */ MCD_OPC_CheckField, 21, 1, 1, 82, 79, // Skip to: 45878
-/* 25572 */ MCD_OPC_Decode, 191, 19, 78, // Opcode: UMAXPvvv_2S
-/* 25576 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 25594
-/* 25580 */ MCD_OPC_CheckPredicate, 0, 70, 79, // Skip to: 45878
-/* 25584 */ MCD_OPC_CheckField, 21, 1, 1, 64, 79, // Skip to: 45878
-/* 25590 */ MCD_OPC_Decode, 158, 13, 102, // Opcode: SMAXPvvv_4S
-/* 25594 */ MCD_OPC_FilterValue, 3, 56, 79, // Skip to: 45878
-/* 25598 */ MCD_OPC_CheckPredicate, 0, 52, 79, // Skip to: 45878
-/* 25602 */ MCD_OPC_CheckField, 21, 1, 1, 46, 79, // Skip to: 45878
-/* 25608 */ MCD_OPC_Decode, 193, 19, 102, // Opcode: UMAXPvvv_4S
-/* 25612 */ MCD_OPC_FilterValue, 42, 155, 0, // Skip to: 25771
-/* 25616 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 25619 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 25650
-/* 25623 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25626 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 25638
-/* 25630 */ MCD_OPC_CheckPredicate, 0, 20, 79, // Skip to: 45878
-/* 25634 */ MCD_OPC_Decode, 213, 2, 79, // Opcode: CMLTvvi_2S
-/* 25638 */ MCD_OPC_FilterValue, 2, 12, 79, // Skip to: 45878
-/* 25642 */ MCD_OPC_CheckPredicate, 0, 8, 79, // Skip to: 45878
-/* 25646 */ MCD_OPC_Decode, 215, 2, 107, // Opcode: CMLTvvi_4S
-/* 25650 */ MCD_OPC_FilterValue, 33, 51, 0, // Skip to: 25705
-/* 25654 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25657 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 25669
-/* 25661 */ MCD_OPC_CheckPredicate, 0, 245, 78, // Skip to: 45878
-/* 25665 */ MCD_OPC_Decode, 230, 4, 79, // Opcode: FCVTPS_2s
-/* 25669 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 25681
-/* 25673 */ MCD_OPC_CheckPredicate, 0, 233, 78, // Skip to: 45878
-/* 25677 */ MCD_OPC_Decode, 239, 4, 79, // Opcode: FCVTPU_2s
-/* 25681 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 25693
-/* 25685 */ MCD_OPC_CheckPredicate, 0, 221, 78, // Skip to: 45878
-/* 25689 */ MCD_OPC_Decode, 231, 4, 107, // Opcode: FCVTPS_4s
-/* 25693 */ MCD_OPC_FilterValue, 3, 213, 78, // Skip to: 45878
-/* 25697 */ MCD_OPC_CheckPredicate, 0, 209, 78, // Skip to: 45878
-/* 25701 */ MCD_OPC_Decode, 240, 4, 107, // Opcode: FCVTPU_4s
-/* 25705 */ MCD_OPC_FilterValue, 48, 29, 0, // Skip to: 25738
-/* 25709 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25712 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25725
-/* 25716 */ MCD_OPC_CheckPredicate, 0, 190, 78, // Skip to: 45878
-/* 25720 */ MCD_OPC_Decode, 165, 13, 129, 1, // Opcode: SMAXV_1s4s
-/* 25725 */ MCD_OPC_FilterValue, 3, 181, 78, // Skip to: 45878
-/* 25729 */ MCD_OPC_CheckPredicate, 0, 177, 78, // Skip to: 45878
-/* 25733 */ MCD_OPC_Decode, 200, 19, 129, 1, // Opcode: UMAXV_1s4s
-/* 25738 */ MCD_OPC_FilterValue, 49, 168, 78, // Skip to: 45878
-/* 25742 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25745 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25758
-/* 25749 */ MCD_OPC_CheckPredicate, 0, 157, 78, // Skip to: 45878
-/* 25753 */ MCD_OPC_Decode, 183, 13, 129, 1, // Opcode: SMINV_1s4s
-/* 25758 */ MCD_OPC_FilterValue, 3, 148, 78, // Skip to: 45878
-/* 25762 */ MCD_OPC_CheckPredicate, 0, 144, 78, // Skip to: 45878
-/* 25766 */ MCD_OPC_Decode, 217, 19, 129, 1, // Opcode: UMINV_1s4s
-/* 25771 */ MCD_OPC_FilterValue, 43, 75, 0, // Skip to: 25850
-/* 25775 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25778 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 25796
-/* 25782 */ MCD_OPC_CheckPredicate, 0, 124, 78, // Skip to: 45878
-/* 25786 */ MCD_OPC_CheckField, 21, 1, 1, 118, 78, // Skip to: 45878
-/* 25792 */ MCD_OPC_Decode, 174, 13, 78, // Opcode: SMINPvvv_2S
-/* 25796 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 25814
-/* 25800 */ MCD_OPC_CheckPredicate, 0, 106, 78, // Skip to: 45878
-/* 25804 */ MCD_OPC_CheckField, 21, 1, 1, 100, 78, // Skip to: 45878
-/* 25810 */ MCD_OPC_Decode, 208, 19, 78, // Opcode: UMINPvvv_2S
-/* 25814 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 25832
-/* 25818 */ MCD_OPC_CheckPredicate, 0, 88, 78, // Skip to: 45878
-/* 25822 */ MCD_OPC_CheckField, 21, 1, 1, 82, 78, // Skip to: 45878
-/* 25828 */ MCD_OPC_Decode, 176, 13, 102, // Opcode: SMINPvvv_4S
-/* 25832 */ MCD_OPC_FilterValue, 3, 74, 78, // Skip to: 45878
-/* 25836 */ MCD_OPC_CheckPredicate, 0, 70, 78, // Skip to: 45878
-/* 25840 */ MCD_OPC_CheckField, 21, 1, 1, 64, 78, // Skip to: 45878
-/* 25846 */ MCD_OPC_Decode, 210, 19, 102, // Opcode: UMINPvvv_4S
-/* 25850 */ MCD_OPC_FilterValue, 44, 39, 0, // Skip to: 25893
-/* 25854 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25857 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 25875
-/* 25861 */ MCD_OPC_CheckPredicate, 0, 45, 78, // Skip to: 45878
-/* 25865 */ MCD_OPC_CheckField, 21, 1, 1, 39, 78, // Skip to: 45878
-/* 25871 */ MCD_OPC_Decode, 147, 14, 94, // Opcode: SQDMLSLvvv_2d2s
-/* 25875 */ MCD_OPC_FilterValue, 2, 31, 78, // Skip to: 45878
-/* 25879 */ MCD_OPC_CheckPredicate, 0, 27, 78, // Skip to: 45878
-/* 25883 */ MCD_OPC_CheckField, 21, 1, 1, 21, 78, // Skip to: 45878
-/* 25889 */ MCD_OPC_Decode, 135, 14, 110, // Opcode: SQDMLSL2vvv_2d4s
-/* 25893 */ MCD_OPC_FilterValue, 45, 75, 0, // Skip to: 25972
-/* 25897 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25900 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 25918
-/* 25904 */ MCD_OPC_CheckPredicate, 0, 2, 78, // Skip to: 45878
-/* 25908 */ MCD_OPC_CheckField, 21, 1, 1, 252, 77, // Skip to: 45878
-/* 25914 */ MCD_OPC_Decode, 159, 14, 78, // Opcode: SQDMULHvvv_2S
-/* 25918 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 25936
-/* 25922 */ MCD_OPC_CheckPredicate, 0, 240, 77, // Skip to: 45878
-/* 25926 */ MCD_OPC_CheckField, 21, 1, 1, 234, 77, // Skip to: 45878
-/* 25932 */ MCD_OPC_Decode, 198, 14, 78, // Opcode: SQRDMULHvvv_2S
-/* 25936 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 25954
-/* 25940 */ MCD_OPC_CheckPredicate, 0, 222, 77, // Skip to: 45878
-/* 25944 */ MCD_OPC_CheckField, 21, 1, 1, 216, 77, // Skip to: 45878
-/* 25950 */ MCD_OPC_Decode, 161, 14, 102, // Opcode: SQDMULHvvv_4S
-/* 25954 */ MCD_OPC_FilterValue, 3, 208, 77, // Skip to: 45878
-/* 25958 */ MCD_OPC_CheckPredicate, 0, 204, 77, // Skip to: 45878
-/* 25962 */ MCD_OPC_CheckField, 21, 1, 1, 198, 77, // Skip to: 45878
-/* 25968 */ MCD_OPC_Decode, 200, 14, 102, // Opcode: SQRDMULHvvv_4S
-/* 25972 */ MCD_OPC_FilterValue, 46, 137, 0, // Skip to: 26113
-/* 25976 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 25979 */ MCD_OPC_FilterValue, 0, 26, 0, // Skip to: 26009
-/* 25983 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 25986 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 25997
-/* 25990 */ MCD_OPC_CheckPredicate, 0, 172, 77, // Skip to: 45878
-/* 25994 */ MCD_OPC_Decode, 21, 79, // Opcode: ABS2s
-/* 25997 */ MCD_OPC_FilterValue, 33, 165, 77, // Skip to: 45878
-/* 26001 */ MCD_OPC_CheckPredicate, 0, 161, 77, // Skip to: 45878
-/* 26005 */ MCD_OPC_Decode, 251, 4, 79, // Opcode: FCVTZS_2s
-/* 26009 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 26040
-/* 26013 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26016 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 26028
-/* 26020 */ MCD_OPC_CheckPredicate, 0, 142, 77, // Skip to: 45878
-/* 26024 */ MCD_OPC_Decode, 180, 11, 79, // Opcode: NEG2s
-/* 26028 */ MCD_OPC_FilterValue, 33, 134, 77, // Skip to: 45878
-/* 26032 */ MCD_OPC_CheckPredicate, 0, 130, 77, // Skip to: 45878
-/* 26036 */ MCD_OPC_Decode, 138, 5, 79, // Opcode: FCVTZU_2s
-/* 26040 */ MCD_OPC_FilterValue, 2, 38, 0, // Skip to: 26082
-/* 26044 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26047 */ MCD_OPC_FilterValue, 32, 7, 0, // Skip to: 26058
-/* 26051 */ MCD_OPC_CheckPredicate, 0, 111, 77, // Skip to: 45878
-/* 26055 */ MCD_OPC_Decode, 23, 107, // Opcode: ABS4s
-/* 26058 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 26070
-/* 26062 */ MCD_OPC_CheckPredicate, 0, 100, 77, // Skip to: 45878
-/* 26066 */ MCD_OPC_Decode, 252, 4, 107, // Opcode: FCVTZS_4s
-/* 26070 */ MCD_OPC_FilterValue, 49, 92, 77, // Skip to: 45878
-/* 26074 */ MCD_OPC_CheckPredicate, 0, 88, 77, // Skip to: 45878
-/* 26078 */ MCD_OPC_Decode, 71, 129, 1, // Opcode: ADDV_1s4s
-/* 26082 */ MCD_OPC_FilterValue, 3, 80, 77, // Skip to: 45878
-/* 26086 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26089 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 26101
-/* 26093 */ MCD_OPC_CheckPredicate, 0, 69, 77, // Skip to: 45878
-/* 26097 */ MCD_OPC_Decode, 182, 11, 107, // Opcode: NEG4s
-/* 26101 */ MCD_OPC_FilterValue, 33, 61, 77, // Skip to: 45878
-/* 26105 */ MCD_OPC_CheckPredicate, 0, 57, 77, // Skip to: 45878
-/* 26109 */ MCD_OPC_Decode, 139, 5, 107, // Opcode: FCVTZU_4s
-/* 26113 */ MCD_OPC_FilterValue, 47, 37, 0, // Skip to: 26154
-/* 26117 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26120 */ MCD_OPC_FilterValue, 0, 13, 0, // Skip to: 26137
-/* 26124 */ MCD_OPC_CheckPredicate, 0, 38, 77, // Skip to: 45878
-/* 26128 */ MCD_OPC_CheckField, 21, 1, 1, 32, 77, // Skip to: 45878
-/* 26134 */ MCD_OPC_Decode, 39, 78, // Opcode: ADDP_2S
-/* 26137 */ MCD_OPC_FilterValue, 2, 25, 77, // Skip to: 45878
-/* 26141 */ MCD_OPC_CheckPredicate, 0, 21, 77, // Skip to: 45878
-/* 26145 */ MCD_OPC_CheckField, 21, 1, 1, 15, 77, // Skip to: 45878
-/* 26151 */ MCD_OPC_Decode, 41, 102, // Opcode: ADDP_4S
-/* 26154 */ MCD_OPC_FilterValue, 48, 75, 0, // Skip to: 26233
-/* 26158 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26161 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 26179
-/* 26165 */ MCD_OPC_CheckPredicate, 0, 253, 76, // Skip to: 45878
-/* 26169 */ MCD_OPC_CheckField, 21, 1, 1, 247, 76, // Skip to: 45878
-/* 26175 */ MCD_OPC_Decode, 224, 13, 74, // Opcode: SMULLvvv_2d2s
-/* 26179 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 26197
-/* 26183 */ MCD_OPC_CheckPredicate, 0, 235, 76, // Skip to: 45878
-/* 26187 */ MCD_OPC_CheckField, 21, 1, 1, 229, 76, // Skip to: 45878
-/* 26193 */ MCD_OPC_Decode, 129, 20, 74, // Opcode: UMULLvvv_2d2s
-/* 26197 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 26215
-/* 26201 */ MCD_OPC_CheckPredicate, 0, 217, 76, // Skip to: 45878
-/* 26205 */ MCD_OPC_CheckField, 21, 1, 1, 211, 76, // Skip to: 45878
-/* 26211 */ MCD_OPC_Decode, 217, 13, 102, // Opcode: SMULL2vvv_2d4s
-/* 26215 */ MCD_OPC_FilterValue, 3, 203, 76, // Skip to: 45878
-/* 26219 */ MCD_OPC_CheckPredicate, 0, 199, 76, // Skip to: 45878
-/* 26223 */ MCD_OPC_CheckField, 21, 1, 1, 193, 76, // Skip to: 45878
-/* 26229 */ MCD_OPC_Decode, 250, 19, 102, // Opcode: UMULL2vvv_2d4s
-/* 26233 */ MCD_OPC_FilterValue, 49, 75, 0, // Skip to: 26312
-/* 26237 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26240 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 26258
-/* 26244 */ MCD_OPC_CheckPredicate, 0, 174, 76, // Skip to: 45878
-/* 26248 */ MCD_OPC_CheckField, 21, 1, 1, 168, 76, // Skip to: 45878
-/* 26254 */ MCD_OPC_Decode, 196, 5, 78, // Opcode: FMINNMvvv_2S
-/* 26258 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 26276
-/* 26262 */ MCD_OPC_CheckPredicate, 0, 156, 76, // Skip to: 45878
-/* 26266 */ MCD_OPC_CheckField, 21, 1, 1, 150, 76, // Skip to: 45878
-/* 26272 */ MCD_OPC_Decode, 190, 5, 78, // Opcode: FMINNMPvvv_2S
-/* 26276 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 26294
-/* 26280 */ MCD_OPC_CheckPredicate, 0, 138, 76, // Skip to: 45878
-/* 26284 */ MCD_OPC_CheckField, 21, 1, 1, 132, 76, // Skip to: 45878
-/* 26290 */ MCD_OPC_Decode, 197, 5, 102, // Opcode: FMINNMvvv_4S
-/* 26294 */ MCD_OPC_FilterValue, 3, 124, 76, // Skip to: 45878
-/* 26298 */ MCD_OPC_CheckPredicate, 0, 120, 76, // Skip to: 45878
-/* 26302 */ MCD_OPC_CheckField, 21, 1, 1, 114, 76, // Skip to: 45878
-/* 26308 */ MCD_OPC_Decode, 191, 5, 102, // Opcode: FMINNMPvvv_4S
-/* 26312 */ MCD_OPC_FilterValue, 50, 140, 0, // Skip to: 26456
-/* 26316 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26319 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 26350
-/* 26323 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26326 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 26338
-/* 26330 */ MCD_OPC_CheckPredicate, 0, 88, 76, // Skip to: 45878
-/* 26334 */ MCD_OPC_Decode, 142, 4, 79, // Opcode: FCMGTvvi_2S
-/* 26338 */ MCD_OPC_FilterValue, 33, 80, 76, // Skip to: 45878
-/* 26342 */ MCD_OPC_CheckPredicate, 0, 76, 76, // Skip to: 45878
-/* 26346 */ MCD_OPC_Decode, 214, 20, 79, // Opcode: URECPE2s
-/* 26350 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 26381
-/* 26354 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26357 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 26369
-/* 26361 */ MCD_OPC_CheckPredicate, 0, 57, 76, // Skip to: 45878
-/* 26365 */ MCD_OPC_Decode, 132, 4, 79, // Opcode: FCMGEvvi_2S
-/* 26369 */ MCD_OPC_FilterValue, 33, 49, 76, // Skip to: 45878
-/* 26373 */ MCD_OPC_CheckPredicate, 0, 45, 76, // Skip to: 45878
-/* 26377 */ MCD_OPC_Decode, 238, 20, 79, // Opcode: URSQRTE2s
-/* 26381 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 26412
-/* 26385 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26388 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 26400
-/* 26392 */ MCD_OPC_CheckPredicate, 0, 26, 76, // Skip to: 45878
-/* 26396 */ MCD_OPC_Decode, 143, 4, 107, // Opcode: FCMGTvvi_4S
-/* 26400 */ MCD_OPC_FilterValue, 33, 18, 76, // Skip to: 45878
-/* 26404 */ MCD_OPC_CheckPredicate, 0, 14, 76, // Skip to: 45878
-/* 26408 */ MCD_OPC_Decode, 215, 20, 107, // Opcode: URECPE4s
-/* 26412 */ MCD_OPC_FilterValue, 3, 6, 76, // Skip to: 45878
-/* 26416 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26419 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 26431
-/* 26423 */ MCD_OPC_CheckPredicate, 0, 251, 75, // Skip to: 45878
-/* 26427 */ MCD_OPC_Decode, 133, 4, 107, // Opcode: FCMGEvvi_4S
-/* 26431 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 26443
-/* 26435 */ MCD_OPC_CheckPredicate, 0, 239, 75, // Skip to: 45878
-/* 26439 */ MCD_OPC_Decode, 239, 20, 107, // Opcode: URSQRTE4s
-/* 26443 */ MCD_OPC_FilterValue, 48, 231, 75, // Skip to: 45878
-/* 26447 */ MCD_OPC_CheckPredicate, 0, 227, 75, // Skip to: 45878
-/* 26451 */ MCD_OPC_Decode, 192, 5, 129, 1, // Opcode: FMINNMV_1s4s
-/* 26456 */ MCD_OPC_FilterValue, 51, 39, 0, // Skip to: 26499
-/* 26460 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26463 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 26481
-/* 26467 */ MCD_OPC_CheckPredicate, 0, 207, 75, // Skip to: 45878
-/* 26471 */ MCD_OPC_CheckField, 21, 1, 1, 201, 75, // Skip to: 45878
-/* 26477 */ MCD_OPC_Decode, 223, 5, 98, // Opcode: FMLSvvv_2S
-/* 26481 */ MCD_OPC_FilterValue, 2, 193, 75, // Skip to: 45878
-/* 26485 */ MCD_OPC_CheckPredicate, 0, 189, 75, // Skip to: 45878
-/* 26489 */ MCD_OPC_CheckField, 21, 1, 1, 183, 75, // Skip to: 45878
-/* 26495 */ MCD_OPC_Decode, 224, 5, 110, // Opcode: FMLSvvv_4S
-/* 26499 */ MCD_OPC_FilterValue, 52, 39, 0, // Skip to: 26542
-/* 26503 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26506 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 26524
-/* 26510 */ MCD_OPC_CheckPredicate, 0, 164, 75, // Skip to: 45878
-/* 26514 */ MCD_OPC_CheckField, 21, 1, 1, 158, 75, // Skip to: 45878
-/* 26520 */ MCD_OPC_Decode, 175, 14, 74, // Opcode: SQDMULLvvv_2d2s
-/* 26524 */ MCD_OPC_FilterValue, 2, 150, 75, // Skip to: 45878
-/* 26528 */ MCD_OPC_CheckPredicate, 0, 146, 75, // Skip to: 45878
-/* 26532 */ MCD_OPC_CheckField, 21, 1, 1, 140, 75, // Skip to: 45878
-/* 26538 */ MCD_OPC_Decode, 163, 14, 102, // Opcode: SQDMULL2vvv_2d4s
-/* 26542 */ MCD_OPC_FilterValue, 53, 75, 0, // Skip to: 26621
-/* 26546 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26549 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 26567
-/* 26553 */ MCD_OPC_CheckPredicate, 0, 121, 75, // Skip to: 45878
-/* 26557 */ MCD_OPC_CheckField, 21, 1, 1, 115, 75, // Skip to: 45878
-/* 26563 */ MCD_OPC_Decode, 208, 6, 78, // Opcode: FSUBvvv_2S
-/* 26567 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 26585
-/* 26571 */ MCD_OPC_CheckPredicate, 0, 103, 75, // Skip to: 45878
-/* 26575 */ MCD_OPC_CheckField, 21, 1, 1, 97, 75, // Skip to: 45878
-/* 26581 */ MCD_OPC_Decode, 214, 3, 78, // Opcode: FABDvvv_2S
-/* 26585 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 26603
-/* 26589 */ MCD_OPC_CheckPredicate, 0, 85, 75, // Skip to: 45878
-/* 26593 */ MCD_OPC_CheckField, 21, 1, 1, 79, 75, // Skip to: 45878
-/* 26599 */ MCD_OPC_Decode, 209, 6, 102, // Opcode: FSUBvvv_4S
-/* 26603 */ MCD_OPC_FilterValue, 3, 71, 75, // Skip to: 45878
-/* 26607 */ MCD_OPC_CheckPredicate, 0, 67, 75, // Skip to: 45878
-/* 26611 */ MCD_OPC_CheckField, 21, 1, 1, 61, 75, // Skip to: 45878
-/* 26617 */ MCD_OPC_Decode, 215, 3, 102, // Opcode: FABDvvv_4S
-/* 26621 */ MCD_OPC_FilterValue, 54, 127, 0, // Skip to: 26752
-/* 26625 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26628 */ MCD_OPC_FilterValue, 0, 27, 0, // Skip to: 26659
-/* 26632 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26635 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 26647
-/* 26639 */ MCD_OPC_CheckPredicate, 0, 35, 75, // Skip to: 45878
-/* 26643 */ MCD_OPC_Decode, 250, 3, 79, // Opcode: FCMEQvvi_2S
-/* 26647 */ MCD_OPC_FilterValue, 33, 27, 75, // Skip to: 45878
-/* 26651 */ MCD_OPC_CheckPredicate, 0, 23, 75, // Skip to: 45878
-/* 26655 */ MCD_OPC_Decode, 144, 6, 79, // Opcode: FRECPE_2s
-/* 26659 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 26690
-/* 26663 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26666 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 26678
-/* 26670 */ MCD_OPC_CheckPredicate, 0, 4, 75, // Skip to: 45878
-/* 26674 */ MCD_OPC_Decode, 150, 4, 79, // Opcode: FCMLEvvi_2S
-/* 26678 */ MCD_OPC_FilterValue, 33, 252, 74, // Skip to: 45878
-/* 26682 */ MCD_OPC_CheckPredicate, 0, 248, 74, // Skip to: 45878
-/* 26686 */ MCD_OPC_Decode, 191, 6, 79, // Opcode: FRSQRTE_2s
-/* 26690 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 26721
-/* 26694 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26697 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 26709
-/* 26701 */ MCD_OPC_CheckPredicate, 0, 229, 74, // Skip to: 45878
-/* 26705 */ MCD_OPC_Decode, 251, 3, 107, // Opcode: FCMEQvvi_4S
-/* 26709 */ MCD_OPC_FilterValue, 33, 221, 74, // Skip to: 45878
-/* 26713 */ MCD_OPC_CheckPredicate, 0, 217, 74, // Skip to: 45878
-/* 26717 */ MCD_OPC_Decode, 145, 6, 107, // Opcode: FRECPE_4s
-/* 26721 */ MCD_OPC_FilterValue, 3, 209, 74, // Skip to: 45878
-/* 26725 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26728 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 26740
-/* 26732 */ MCD_OPC_CheckPredicate, 0, 198, 74, // Skip to: 45878
-/* 26736 */ MCD_OPC_Decode, 151, 4, 107, // Opcode: FCMLEvvi_4S
-/* 26740 */ MCD_OPC_FilterValue, 33, 190, 74, // Skip to: 45878
-/* 26744 */ MCD_OPC_CheckPredicate, 0, 186, 74, // Skip to: 45878
-/* 26748 */ MCD_OPC_Decode, 192, 6, 107, // Opcode: FRSQRTE_4s
-/* 26752 */ MCD_OPC_FilterValue, 57, 39, 0, // Skip to: 26795
-/* 26756 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26759 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 26777
-/* 26763 */ MCD_OPC_CheckPredicate, 0, 167, 74, // Skip to: 45878
-/* 26767 */ MCD_OPC_CheckField, 21, 1, 1, 161, 74, // Skip to: 45878
-/* 26773 */ MCD_OPC_Decode, 145, 4, 78, // Opcode: FCMGTvvv_2S
-/* 26777 */ MCD_OPC_FilterValue, 3, 153, 74, // Skip to: 45878
-/* 26781 */ MCD_OPC_CheckPredicate, 0, 149, 74, // Skip to: 45878
-/* 26785 */ MCD_OPC_CheckField, 21, 1, 1, 143, 74, // Skip to: 45878
-/* 26791 */ MCD_OPC_Decode, 146, 4, 102, // Opcode: FCMGTvvv_4S
-/* 26795 */ MCD_OPC_FilterValue, 58, 39, 0, // Skip to: 26838
-/* 26799 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26802 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 26820
-/* 26806 */ MCD_OPC_CheckPredicate, 0, 124, 74, // Skip to: 45878
-/* 26810 */ MCD_OPC_CheckField, 16, 6, 32, 118, 74, // Skip to: 45878
-/* 26816 */ MCD_OPC_Decode, 155, 4, 79, // Opcode: FCMLTvvi_2S
-/* 26820 */ MCD_OPC_FilterValue, 2, 110, 74, // Skip to: 45878
-/* 26824 */ MCD_OPC_CheckPredicate, 0, 106, 74, // Skip to: 45878
-/* 26828 */ MCD_OPC_CheckField, 16, 6, 32, 100, 74, // Skip to: 45878
-/* 26834 */ MCD_OPC_Decode, 156, 4, 107, // Opcode: FCMLTvvi_4S
-/* 26838 */ MCD_OPC_FilterValue, 59, 39, 0, // Skip to: 26881
-/* 26842 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26845 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 26863
-/* 26849 */ MCD_OPC_CheckPredicate, 0, 81, 74, // Skip to: 45878
-/* 26853 */ MCD_OPC_CheckField, 21, 1, 1, 75, 74, // Skip to: 45878
-/* 26859 */ MCD_OPC_Decode, 229, 3, 78, // Opcode: FACGTvvv_2S
-/* 26863 */ MCD_OPC_FilterValue, 3, 67, 74, // Skip to: 45878
-/* 26867 */ MCD_OPC_CheckPredicate, 0, 63, 74, // Skip to: 45878
-/* 26871 */ MCD_OPC_CheckField, 21, 1, 1, 57, 74, // Skip to: 45878
-/* 26877 */ MCD_OPC_Decode, 230, 3, 102, // Opcode: FACGTvvv_4S
-/* 26881 */ MCD_OPC_FilterValue, 61, 75, 0, // Skip to: 26960
-/* 26885 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26888 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 26906
-/* 26892 */ MCD_OPC_CheckPredicate, 0, 38, 74, // Skip to: 45878
-/* 26896 */ MCD_OPC_CheckField, 21, 1, 1, 32, 74, // Skip to: 45878
-/* 26902 */ MCD_OPC_Decode, 207, 5, 78, // Opcode: FMINvvv_2S
-/* 26906 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 26924
-/* 26910 */ MCD_OPC_CheckPredicate, 0, 20, 74, // Skip to: 45878
-/* 26914 */ MCD_OPC_CheckField, 21, 1, 1, 14, 74, // Skip to: 45878
-/* 26920 */ MCD_OPC_Decode, 201, 5, 78, // Opcode: FMINPvvv_2S
-/* 26924 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 26942
-/* 26928 */ MCD_OPC_CheckPredicate, 0, 2, 74, // Skip to: 45878
-/* 26932 */ MCD_OPC_CheckField, 21, 1, 1, 252, 73, // Skip to: 45878
-/* 26938 */ MCD_OPC_Decode, 208, 5, 102, // Opcode: FMINvvv_4S
-/* 26942 */ MCD_OPC_FilterValue, 3, 244, 73, // Skip to: 45878
-/* 26946 */ MCD_OPC_CheckPredicate, 0, 240, 73, // Skip to: 45878
-/* 26950 */ MCD_OPC_CheckField, 21, 1, 1, 234, 73, // Skip to: 45878
-/* 26956 */ MCD_OPC_Decode, 202, 5, 102, // Opcode: FMINPvvv_4S
-/* 26960 */ MCD_OPC_FilterValue, 62, 114, 0, // Skip to: 27078
-/* 26964 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 26967 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 26985
-/* 26971 */ MCD_OPC_CheckPredicate, 0, 215, 73, // Skip to: 45878
-/* 26975 */ MCD_OPC_CheckField, 16, 6, 32, 209, 73, // Skip to: 45878
-/* 26981 */ MCD_OPC_Decode, 217, 3, 79, // Opcode: FABS2s
-/* 26985 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 27016
-/* 26989 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 26992 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 27004
-/* 26996 */ MCD_OPC_CheckPredicate, 0, 190, 73, // Skip to: 45878
-/* 27000 */ MCD_OPC_Decode, 133, 6, 79, // Opcode: FNEG2s
-/* 27004 */ MCD_OPC_FilterValue, 33, 182, 73, // Skip to: 45878
-/* 27008 */ MCD_OPC_CheckPredicate, 0, 178, 73, // Skip to: 45878
-/* 27012 */ MCD_OPC_Decode, 201, 6, 79, // Opcode: FSQRT_2s
-/* 27016 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27034
-/* 27020 */ MCD_OPC_CheckPredicate, 0, 166, 73, // Skip to: 45878
-/* 27024 */ MCD_OPC_CheckField, 16, 6, 32, 160, 73, // Skip to: 45878
-/* 27030 */ MCD_OPC_Decode, 218, 3, 107, // Opcode: FABS4s
-/* 27034 */ MCD_OPC_FilterValue, 3, 152, 73, // Skip to: 45878
-/* 27038 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 27041 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 27053
-/* 27045 */ MCD_OPC_CheckPredicate, 0, 141, 73, // Skip to: 45878
-/* 27049 */ MCD_OPC_Decode, 134, 6, 107, // Opcode: FNEG4s
-/* 27053 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 27065
-/* 27057 */ MCD_OPC_CheckPredicate, 0, 129, 73, // Skip to: 45878
-/* 27061 */ MCD_OPC_Decode, 202, 6, 107, // Opcode: FSQRT_4s
-/* 27065 */ MCD_OPC_FilterValue, 48, 121, 73, // Skip to: 45878
-/* 27069 */ MCD_OPC_CheckPredicate, 0, 117, 73, // Skip to: 45878
-/* 27073 */ MCD_OPC_Decode, 203, 5, 129, 1, // Opcode: FMINV_1s4s
-/* 27078 */ MCD_OPC_FilterValue, 63, 108, 73, // Skip to: 45878
-/* 27082 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27085 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 27103
-/* 27089 */ MCD_OPC_CheckPredicate, 0, 97, 73, // Skip to: 45878
-/* 27093 */ MCD_OPC_CheckField, 21, 1, 1, 91, 73, // Skip to: 45878
-/* 27099 */ MCD_OPC_Decode, 198, 6, 78, // Opcode: FRSQRTSvvv_2S
-/* 27103 */ MCD_OPC_FilterValue, 2, 83, 73, // Skip to: 45878
-/* 27107 */ MCD_OPC_CheckPredicate, 0, 79, 73, // Skip to: 45878
-/* 27111 */ MCD_OPC_CheckField, 21, 1, 1, 73, 73, // Skip to: 45878
-/* 27117 */ MCD_OPC_Decode, 199, 6, 102, // Opcode: FRSQRTSvvv_4S
-/* 27121 */ MCD_OPC_FilterValue, 11, 195, 5, // Skip to: 28600
-/* 27125 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 27128 */ MCD_OPC_FilterValue, 3, 39, 0, // Skip to: 27171
-/* 27132 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27135 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27153
-/* 27139 */ MCD_OPC_CheckPredicate, 0, 47, 73, // Skip to: 45878
-/* 27143 */ MCD_OPC_CheckField, 21, 1, 1, 41, 73, // Skip to: 45878
-/* 27149 */ MCD_OPC_Decode, 243, 13, 102, // Opcode: SQADDvvv_2D
-/* 27153 */ MCD_OPC_FilterValue, 3, 33, 73, // Skip to: 45878
-/* 27157 */ MCD_OPC_CheckPredicate, 0, 29, 73, // Skip to: 45878
-/* 27161 */ MCD_OPC_CheckField, 21, 1, 1, 23, 73, // Skip to: 45878
-/* 27167 */ MCD_OPC_Decode, 137, 20, 102, // Opcode: UQADDvvv_2D
-/* 27171 */ MCD_OPC_FilterValue, 6, 20, 0, // Skip to: 27195
-/* 27175 */ MCD_OPC_CheckPredicate, 0, 11, 73, // Skip to: 45878
-/* 27179 */ MCD_OPC_CheckField, 29, 3, 2, 5, 73, // Skip to: 45878
-/* 27185 */ MCD_OPC_CheckField, 21, 1, 0, 255, 72, // Skip to: 45878
-/* 27191 */ MCD_OPC_Decode, 178, 21, 102, // Opcode: UZP1vvv_2d
-/* 27195 */ MCD_OPC_FilterValue, 7, 75, 0, // Skip to: 27274
-/* 27199 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27202 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 27220
-/* 27206 */ MCD_OPC_CheckPredicate, 0, 236, 72, // Skip to: 45878
-/* 27210 */ MCD_OPC_CheckField, 21, 1, 1, 230, 72, // Skip to: 45878
-/* 27216 */ MCD_OPC_Decode, 189, 11, 78, // Opcode: ORNvvv_8B
-/* 27220 */ MCD_OPC_FilterValue, 1, 14, 0, // Skip to: 27238
-/* 27224 */ MCD_OPC_CheckPredicate, 0, 218, 72, // Skip to: 45878
-/* 27228 */ MCD_OPC_CheckField, 21, 1, 1, 212, 72, // Skip to: 45878
-/* 27234 */ MCD_OPC_Decode, 226, 1, 98, // Opcode: BIFvvv_8B
-/* 27238 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27256
-/* 27242 */ MCD_OPC_CheckPredicate, 0, 200, 72, // Skip to: 45878
-/* 27246 */ MCD_OPC_CheckField, 21, 1, 1, 194, 72, // Skip to: 45878
-/* 27252 */ MCD_OPC_Decode, 188, 11, 102, // Opcode: ORNvvv_16B
-/* 27256 */ MCD_OPC_FilterValue, 3, 186, 72, // Skip to: 45878
-/* 27260 */ MCD_OPC_CheckPredicate, 0, 182, 72, // Skip to: 45878
-/* 27264 */ MCD_OPC_CheckField, 21, 1, 1, 176, 72, // Skip to: 45878
-/* 27270 */ MCD_OPC_Decode, 225, 1, 110, // Opcode: BIFvvv_16B
-/* 27274 */ MCD_OPC_FilterValue, 10, 20, 0, // Skip to: 27298
-/* 27278 */ MCD_OPC_CheckPredicate, 0, 164, 72, // Skip to: 45878
-/* 27282 */ MCD_OPC_CheckField, 29, 3, 2, 158, 72, // Skip to: 45878
-/* 27288 */ MCD_OPC_CheckField, 21, 1, 0, 152, 72, // Skip to: 45878
-/* 27294 */ MCD_OPC_Decode, 208, 18, 102, // Opcode: TRN1vvv_2d
-/* 27298 */ MCD_OPC_FilterValue, 11, 39, 0, // Skip to: 27341
-/* 27302 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27305 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27323
-/* 27309 */ MCD_OPC_CheckPredicate, 0, 133, 72, // Skip to: 45878
-/* 27313 */ MCD_OPC_CheckField, 21, 1, 1, 127, 72, // Skip to: 45878
-/* 27319 */ MCD_OPC_Decode, 147, 15, 102, // Opcode: SQSUBvvv_2D
-/* 27323 */ MCD_OPC_FilterValue, 3, 119, 72, // Skip to: 45878
-/* 27327 */ MCD_OPC_CheckPredicate, 0, 115, 72, // Skip to: 45878
-/* 27331 */ MCD_OPC_CheckField, 21, 1, 1, 109, 72, // Skip to: 45878
-/* 27337 */ MCD_OPC_Decode, 199, 20, 102, // Opcode: UQSUBvvv_2D
-/* 27341 */ MCD_OPC_FilterValue, 13, 39, 0, // Skip to: 27384
-/* 27345 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27348 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27366
-/* 27352 */ MCD_OPC_CheckPredicate, 0, 90, 72, // Skip to: 45878
-/* 27356 */ MCD_OPC_CheckField, 21, 1, 1, 84, 72, // Skip to: 45878
-/* 27362 */ MCD_OPC_Decode, 180, 2, 102, // Opcode: CMGTvvv_2D
-/* 27366 */ MCD_OPC_FilterValue, 3, 76, 72, // Skip to: 45878
-/* 27370 */ MCD_OPC_CheckPredicate, 0, 72, 72, // Skip to: 45878
-/* 27374 */ MCD_OPC_CheckField, 21, 1, 1, 66, 72, // Skip to: 45878
-/* 27380 */ MCD_OPC_Decode, 188, 2, 102, // Opcode: CMHIvvv_2D
-/* 27384 */ MCD_OPC_FilterValue, 14, 64, 0, // Skip to: 27452
-/* 27388 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 27391 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 27409
-/* 27395 */ MCD_OPC_CheckPredicate, 0, 47, 72, // Skip to: 45878
-/* 27399 */ MCD_OPC_CheckField, 29, 3, 2, 41, 72, // Skip to: 45878
-/* 27405 */ MCD_OPC_Decode, 210, 21, 102, // Opcode: ZIP1vvv_2d
-/* 27409 */ MCD_OPC_FilterValue, 1, 33, 72, // Skip to: 45878
-/* 27413 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27416 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27434
-/* 27420 */ MCD_OPC_CheckPredicate, 0, 22, 72, // Skip to: 45878
-/* 27424 */ MCD_OPC_CheckField, 16, 5, 0, 16, 72, // Skip to: 45878
-/* 27430 */ MCD_OPC_Decode, 161, 18, 116, // Opcode: SUQADD2d
-/* 27434 */ MCD_OPC_FilterValue, 3, 8, 72, // Skip to: 45878
-/* 27438 */ MCD_OPC_CheckPredicate, 0, 4, 72, // Skip to: 45878
-/* 27442 */ MCD_OPC_CheckField, 16, 5, 0, 254, 71, // Skip to: 45878
-/* 27448 */ MCD_OPC_Decode, 143, 21, 116, // Opcode: USQADD2d
-/* 27452 */ MCD_OPC_FilterValue, 15, 39, 0, // Skip to: 27495
-/* 27456 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27459 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27477
-/* 27463 */ MCD_OPC_CheckPredicate, 0, 235, 71, // Skip to: 45878
-/* 27467 */ MCD_OPC_CheckField, 21, 1, 1, 229, 71, // Skip to: 45878
-/* 27473 */ MCD_OPC_Decode, 164, 2, 102, // Opcode: CMGEvvv_2D
-/* 27477 */ MCD_OPC_FilterValue, 3, 221, 71, // Skip to: 45878
-/* 27481 */ MCD_OPC_CheckPredicate, 0, 217, 71, // Skip to: 45878
-/* 27485 */ MCD_OPC_CheckField, 21, 1, 1, 211, 71, // Skip to: 45878
-/* 27491 */ MCD_OPC_Decode, 196, 2, 102, // Opcode: CMHSvvv_2D
-/* 27495 */ MCD_OPC_FilterValue, 17, 39, 0, // Skip to: 27538
-/* 27499 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27502 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27520
-/* 27506 */ MCD_OPC_CheckPredicate, 0, 192, 71, // Skip to: 45878
-/* 27510 */ MCD_OPC_CheckField, 21, 1, 1, 186, 71, // Skip to: 45878
-/* 27516 */ MCD_OPC_Decode, 217, 15, 102, // Opcode: SSHLvvv_2D
-/* 27520 */ MCD_OPC_FilterValue, 3, 178, 71, // Skip to: 45878
-/* 27524 */ MCD_OPC_CheckPredicate, 0, 174, 71, // Skip to: 45878
-/* 27528 */ MCD_OPC_CheckField, 21, 1, 1, 168, 71, // Skip to: 45878
-/* 27534 */ MCD_OPC_Decode, 128, 21, 102, // Opcode: USHLvvv_2D
-/* 27538 */ MCD_OPC_FilterValue, 19, 39, 0, // Skip to: 27581
-/* 27542 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27545 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27563
-/* 27549 */ MCD_OPC_CheckPredicate, 0, 149, 71, // Skip to: 45878
-/* 27553 */ MCD_OPC_CheckField, 21, 1, 1, 143, 71, // Skip to: 45878
-/* 27559 */ MCD_OPC_Decode, 252, 14, 102, // Opcode: SQSHLvvv_2D
-/* 27563 */ MCD_OPC_FilterValue, 3, 135, 71, // Skip to: 45878
-/* 27567 */ MCD_OPC_CheckPredicate, 0, 131, 71, // Skip to: 45878
-/* 27571 */ MCD_OPC_CheckField, 21, 1, 1, 125, 71, // Skip to: 45878
-/* 27577 */ MCD_OPC_Decode, 179, 20, 102, // Opcode: UQSHLvvv_2D
-/* 27581 */ MCD_OPC_FilterValue, 21, 39, 0, // Skip to: 27624
-/* 27585 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27588 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27606
-/* 27592 */ MCD_OPC_CheckPredicate, 0, 106, 71, // Skip to: 45878
-/* 27596 */ MCD_OPC_CheckField, 21, 1, 1, 100, 71, // Skip to: 45878
-/* 27602 */ MCD_OPC_Decode, 187, 15, 102, // Opcode: SRSHLvvv_2D
-/* 27606 */ MCD_OPC_FilterValue, 3, 92, 71, // Skip to: 45878
-/* 27610 */ MCD_OPC_CheckPredicate, 0, 88, 71, // Skip to: 45878
-/* 27614 */ MCD_OPC_CheckField, 21, 1, 1, 82, 71, // Skip to: 45878
-/* 27620 */ MCD_OPC_Decode, 224, 20, 102, // Opcode: URSHLvvv_2D
-/* 27624 */ MCD_OPC_FilterValue, 22, 20, 0, // Skip to: 27648
-/* 27628 */ MCD_OPC_CheckPredicate, 0, 70, 71, // Skip to: 45878
-/* 27632 */ MCD_OPC_CheckField, 29, 3, 2, 64, 71, // Skip to: 45878
-/* 27638 */ MCD_OPC_CheckField, 21, 1, 0, 58, 71, // Skip to: 45878
-/* 27644 */ MCD_OPC_Decode, 185, 21, 102, // Opcode: UZP2vvv_2d
-/* 27648 */ MCD_OPC_FilterValue, 23, 39, 0, // Skip to: 27691
-/* 27652 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27655 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27673
-/* 27659 */ MCD_OPC_CheckPredicate, 0, 39, 71, // Skip to: 45878
-/* 27663 */ MCD_OPC_CheckField, 21, 1, 1, 33, 71, // Skip to: 45878
-/* 27669 */ MCD_OPC_Decode, 207, 14, 102, // Opcode: SQRSHLvvv_2D
-/* 27673 */ MCD_OPC_FilterValue, 3, 25, 71, // Skip to: 45878
-/* 27677 */ MCD_OPC_CheckPredicate, 0, 21, 71, // Skip to: 45878
-/* 27681 */ MCD_OPC_CheckField, 21, 1, 1, 15, 71, // Skip to: 45878
-/* 27687 */ MCD_OPC_Decode, 148, 20, 102, // Opcode: UQRSHLvvv_2D
-/* 27691 */ MCD_OPC_FilterValue, 26, 20, 0, // Skip to: 27715
-/* 27695 */ MCD_OPC_CheckPredicate, 0, 3, 71, // Skip to: 45878
-/* 27699 */ MCD_OPC_CheckField, 29, 3, 2, 253, 70, // Skip to: 45878
-/* 27705 */ MCD_OPC_CheckField, 21, 1, 0, 247, 70, // Skip to: 45878
-/* 27711 */ MCD_OPC_Decode, 215, 18, 102, // Opcode: TRN2vvv_2d
-/* 27715 */ MCD_OPC_FilterValue, 30, 64, 0, // Skip to: 27783
-/* 27719 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 27722 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 27740
-/* 27726 */ MCD_OPC_CheckPredicate, 0, 228, 70, // Skip to: 45878
-/* 27730 */ MCD_OPC_CheckField, 29, 3, 2, 222, 70, // Skip to: 45878
-/* 27736 */ MCD_OPC_Decode, 217, 21, 102, // Opcode: ZIP2vvv_2d
-/* 27740 */ MCD_OPC_FilterValue, 1, 214, 70, // Skip to: 45878
-/* 27744 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27747 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27765
-/* 27751 */ MCD_OPC_CheckPredicate, 0, 203, 70, // Skip to: 45878
-/* 27755 */ MCD_OPC_CheckField, 16, 5, 0, 197, 70, // Skip to: 45878
-/* 27761 */ MCD_OPC_Decode, 228, 13, 107, // Opcode: SQABS2d
-/* 27765 */ MCD_OPC_FilterValue, 3, 189, 70, // Skip to: 45878
-/* 27769 */ MCD_OPC_CheckPredicate, 0, 185, 70, // Skip to: 45878
-/* 27773 */ MCD_OPC_CheckField, 16, 5, 0, 179, 70, // Skip to: 45878
-/* 27779 */ MCD_OPC_Decode, 178, 14, 107, // Opcode: SQNEG2d
-/* 27783 */ MCD_OPC_FilterValue, 33, 38, 0, // Skip to: 27825
-/* 27787 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27790 */ MCD_OPC_FilterValue, 2, 13, 0, // Skip to: 27807
-/* 27794 */ MCD_OPC_CheckPredicate, 0, 160, 70, // Skip to: 45878
-/* 27798 */ MCD_OPC_CheckField, 21, 1, 1, 154, 70, // Skip to: 45878
-/* 27804 */ MCD_OPC_Decode, 74, 102, // Opcode: ADDvvv_2D
-/* 27807 */ MCD_OPC_FilterValue, 3, 147, 70, // Skip to: 45878
-/* 27811 */ MCD_OPC_CheckPredicate, 0, 143, 70, // Skip to: 45878
-/* 27815 */ MCD_OPC_CheckField, 21, 1, 1, 137, 70, // Skip to: 45878
-/* 27821 */ MCD_OPC_Decode, 248, 17, 102, // Opcode: SUBvvv_2D
-/* 27825 */ MCD_OPC_FilterValue, 34, 52, 0, // Skip to: 27881
-/* 27829 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 27832 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 27863
-/* 27836 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27839 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 27851
-/* 27843 */ MCD_OPC_CheckPredicate, 0, 111, 70, // Skip to: 45878
-/* 27847 */ MCD_OPC_Decode, 173, 2, 107, // Opcode: CMGTvvi_2D
-/* 27851 */ MCD_OPC_FilterValue, 3, 103, 70, // Skip to: 45878
-/* 27855 */ MCD_OPC_CheckPredicate, 0, 99, 70, // Skip to: 45878
-/* 27859 */ MCD_OPC_Decode, 157, 2, 107, // Opcode: CMGEvvi_2D
-/* 27863 */ MCD_OPC_FilterValue, 33, 91, 70, // Skip to: 45878
-/* 27867 */ MCD_OPC_CheckPredicate, 0, 87, 70, // Skip to: 45878
-/* 27871 */ MCD_OPC_CheckField, 29, 3, 2, 81, 70, // Skip to: 45878
-/* 27877 */ MCD_OPC_Decode, 175, 6, 107, // Opcode: FRINTP_2d
-/* 27881 */ MCD_OPC_FilterValue, 35, 39, 0, // Skip to: 27924
-/* 27885 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27888 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 27906
-/* 27892 */ MCD_OPC_CheckPredicate, 0, 62, 70, // Skip to: 45878
-/* 27896 */ MCD_OPC_CheckField, 21, 1, 1, 56, 70, // Skip to: 45878
-/* 27902 */ MCD_OPC_Decode, 136, 3, 102, // Opcode: CMTSTvvv_2D
-/* 27906 */ MCD_OPC_FilterValue, 3, 48, 70, // Skip to: 45878
-/* 27910 */ MCD_OPC_CheckPredicate, 0, 44, 70, // Skip to: 45878
-/* 27914 */ MCD_OPC_CheckField, 21, 1, 1, 38, 70, // Skip to: 45878
-/* 27920 */ MCD_OPC_Decode, 148, 2, 102, // Opcode: CMEQvvv_2D
-/* 27924 */ MCD_OPC_FilterValue, 38, 65, 0, // Skip to: 27993
-/* 27928 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 27931 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 27962
-/* 27935 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27938 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 27950
-/* 27942 */ MCD_OPC_CheckPredicate, 0, 12, 70, // Skip to: 45878
-/* 27946 */ MCD_OPC_Decode, 141, 2, 107, // Opcode: CMEQvvi_2D
-/* 27950 */ MCD_OPC_FilterValue, 3, 4, 70, // Skip to: 45878
-/* 27954 */ MCD_OPC_CheckPredicate, 0, 0, 70, // Skip to: 45878
-/* 27958 */ MCD_OPC_Decode, 204, 2, 107, // Opcode: CMLEvvi_2D
-/* 27962 */ MCD_OPC_FilterValue, 33, 248, 69, // Skip to: 45878
-/* 27966 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 27969 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 27981
-/* 27973 */ MCD_OPC_CheckPredicate, 0, 237, 69, // Skip to: 45878
-/* 27977 */ MCD_OPC_Decode, 185, 6, 107, // Opcode: FRINTZ_2d
-/* 27981 */ MCD_OPC_FilterValue, 3, 229, 69, // Skip to: 45878
-/* 27985 */ MCD_OPC_CheckPredicate, 0, 225, 69, // Skip to: 45878
-/* 27989 */ MCD_OPC_Decode, 160, 6, 107, // Opcode: FRINTI_2d
-/* 27993 */ MCD_OPC_FilterValue, 42, 52, 0, // Skip to: 28049
-/* 27997 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 28000 */ MCD_OPC_FilterValue, 32, 14, 0, // Skip to: 28018
-/* 28004 */ MCD_OPC_CheckPredicate, 0, 206, 69, // Skip to: 45878
-/* 28008 */ MCD_OPC_CheckField, 29, 3, 2, 200, 69, // Skip to: 45878
-/* 28014 */ MCD_OPC_Decode, 212, 2, 107, // Opcode: CMLTvvi_2D
-/* 28018 */ MCD_OPC_FilterValue, 33, 192, 69, // Skip to: 45878
-/* 28022 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28025 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 28037
-/* 28029 */ MCD_OPC_CheckPredicate, 0, 181, 69, // Skip to: 45878
-/* 28033 */ MCD_OPC_Decode, 229, 4, 107, // Opcode: FCVTPS_2d
-/* 28037 */ MCD_OPC_FilterValue, 3, 173, 69, // Skip to: 45878
-/* 28041 */ MCD_OPC_CheckPredicate, 0, 169, 69, // Skip to: 45878
-/* 28045 */ MCD_OPC_Decode, 238, 4, 107, // Opcode: FCVTPU_2d
-/* 28049 */ MCD_OPC_FilterValue, 46, 64, 0, // Skip to: 28117
-/* 28053 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 28056 */ MCD_OPC_FilterValue, 32, 26, 0, // Skip to: 28086
-/* 28060 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28063 */ MCD_OPC_FilterValue, 2, 7, 0, // Skip to: 28074
-/* 28067 */ MCD_OPC_CheckPredicate, 0, 143, 69, // Skip to: 45878
-/* 28071 */ MCD_OPC_Decode, 20, 107, // Opcode: ABS2d
-/* 28074 */ MCD_OPC_FilterValue, 3, 136, 69, // Skip to: 45878
-/* 28078 */ MCD_OPC_CheckPredicate, 0, 132, 69, // Skip to: 45878
-/* 28082 */ MCD_OPC_Decode, 179, 11, 107, // Opcode: NEG2d
-/* 28086 */ MCD_OPC_FilterValue, 33, 124, 69, // Skip to: 45878
-/* 28090 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28093 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 28105
-/* 28097 */ MCD_OPC_CheckPredicate, 0, 113, 69, // Skip to: 45878
-/* 28101 */ MCD_OPC_Decode, 250, 4, 107, // Opcode: FCVTZS_2d
-/* 28105 */ MCD_OPC_FilterValue, 3, 105, 69, // Skip to: 45878
-/* 28109 */ MCD_OPC_CheckPredicate, 0, 101, 69, // Skip to: 45878
-/* 28113 */ MCD_OPC_Decode, 137, 5, 107, // Opcode: FCVTZU_2d
-/* 28117 */ MCD_OPC_FilterValue, 47, 19, 0, // Skip to: 28140
-/* 28121 */ MCD_OPC_CheckPredicate, 0, 89, 69, // Skip to: 45878
-/* 28125 */ MCD_OPC_CheckField, 29, 3, 2, 83, 69, // Skip to: 45878
-/* 28131 */ MCD_OPC_CheckField, 21, 1, 1, 77, 69, // Skip to: 45878
-/* 28137 */ MCD_OPC_Decode, 38, 102, // Opcode: ADDP_2D
-/* 28140 */ MCD_OPC_FilterValue, 49, 39, 0, // Skip to: 28183
-/* 28144 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28147 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 28165
-/* 28151 */ MCD_OPC_CheckPredicate, 0, 59, 69, // Skip to: 45878
-/* 28155 */ MCD_OPC_CheckField, 21, 1, 1, 53, 69, // Skip to: 45878
-/* 28161 */ MCD_OPC_Decode, 195, 5, 102, // Opcode: FMINNMvvv_2D
-/* 28165 */ MCD_OPC_FilterValue, 3, 45, 69, // Skip to: 45878
-/* 28169 */ MCD_OPC_CheckPredicate, 0, 41, 69, // Skip to: 45878
-/* 28173 */ MCD_OPC_CheckField, 21, 1, 1, 35, 69, // Skip to: 45878
-/* 28179 */ MCD_OPC_Decode, 189, 5, 102, // Opcode: FMINNMPvvv_2D
-/* 28183 */ MCD_OPC_FilterValue, 50, 39, 0, // Skip to: 28226
-/* 28187 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28190 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 28208
-/* 28194 */ MCD_OPC_CheckPredicate, 0, 16, 69, // Skip to: 45878
-/* 28198 */ MCD_OPC_CheckField, 16, 6, 32, 10, 69, // Skip to: 45878
-/* 28204 */ MCD_OPC_Decode, 141, 4, 107, // Opcode: FCMGTvvi_2D
-/* 28208 */ MCD_OPC_FilterValue, 3, 2, 69, // Skip to: 45878
-/* 28212 */ MCD_OPC_CheckPredicate, 0, 254, 68, // Skip to: 45878
-/* 28216 */ MCD_OPC_CheckField, 16, 6, 32, 248, 68, // Skip to: 45878
-/* 28222 */ MCD_OPC_Decode, 131, 4, 107, // Opcode: FCMGEvvi_2D
-/* 28226 */ MCD_OPC_FilterValue, 51, 20, 0, // Skip to: 28250
-/* 28230 */ MCD_OPC_CheckPredicate, 0, 236, 68, // Skip to: 45878
-/* 28234 */ MCD_OPC_CheckField, 29, 3, 2, 230, 68, // Skip to: 45878
-/* 28240 */ MCD_OPC_CheckField, 21, 1, 1, 224, 68, // Skip to: 45878
-/* 28246 */ MCD_OPC_Decode, 222, 5, 110, // Opcode: FMLSvvv_2D
-/* 28250 */ MCD_OPC_FilterValue, 53, 39, 0, // Skip to: 28293
-/* 28254 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28257 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 28275
-/* 28261 */ MCD_OPC_CheckPredicate, 0, 205, 68, // Skip to: 45878
-/* 28265 */ MCD_OPC_CheckField, 21, 1, 1, 199, 68, // Skip to: 45878
-/* 28271 */ MCD_OPC_Decode, 207, 6, 102, // Opcode: FSUBvvv_2D
-/* 28275 */ MCD_OPC_FilterValue, 3, 191, 68, // Skip to: 45878
-/* 28279 */ MCD_OPC_CheckPredicate, 0, 187, 68, // Skip to: 45878
-/* 28283 */ MCD_OPC_CheckField, 21, 1, 1, 181, 68, // Skip to: 45878
-/* 28289 */ MCD_OPC_Decode, 213, 3, 102, // Opcode: FABDvvv_2D
-/* 28293 */ MCD_OPC_FilterValue, 54, 65, 0, // Skip to: 28362
-/* 28297 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 28300 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 28331
-/* 28304 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28307 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 28319
-/* 28311 */ MCD_OPC_CheckPredicate, 0, 155, 68, // Skip to: 45878
-/* 28315 */ MCD_OPC_Decode, 249, 3, 107, // Opcode: FCMEQvvi_2D
-/* 28319 */ MCD_OPC_FilterValue, 3, 147, 68, // Skip to: 45878
-/* 28323 */ MCD_OPC_CheckPredicate, 0, 143, 68, // Skip to: 45878
-/* 28327 */ MCD_OPC_Decode, 149, 4, 107, // Opcode: FCMLEvvi_2D
-/* 28331 */ MCD_OPC_FilterValue, 33, 135, 68, // Skip to: 45878
-/* 28335 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28338 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 28350
-/* 28342 */ MCD_OPC_CheckPredicate, 0, 124, 68, // Skip to: 45878
-/* 28346 */ MCD_OPC_Decode, 143, 6, 107, // Opcode: FRECPE_2d
-/* 28350 */ MCD_OPC_FilterValue, 3, 116, 68, // Skip to: 45878
-/* 28354 */ MCD_OPC_CheckPredicate, 0, 112, 68, // Skip to: 45878
-/* 28358 */ MCD_OPC_Decode, 190, 6, 107, // Opcode: FRSQRTE_2d
-/* 28362 */ MCD_OPC_FilterValue, 56, 39, 0, // Skip to: 28405
-/* 28366 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28369 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 28387
-/* 28373 */ MCD_OPC_CheckPredicate, 0, 93, 68, // Skip to: 45878
-/* 28377 */ MCD_OPC_CheckField, 21, 1, 1, 87, 68, // Skip to: 45878
-/* 28383 */ MCD_OPC_Decode, 216, 11, 74, // Opcode: PMULLvvv_1q1d
-/* 28387 */ MCD_OPC_FilterValue, 2, 79, 68, // Skip to: 45878
-/* 28391 */ MCD_OPC_CheckPredicate, 0, 75, 68, // Skip to: 45878
-/* 28395 */ MCD_OPC_CheckField, 21, 1, 1, 69, 68, // Skip to: 45878
-/* 28401 */ MCD_OPC_Decode, 214, 11, 102, // Opcode: PMULL2vvv_1q2d
-/* 28405 */ MCD_OPC_FilterValue, 57, 20, 0, // Skip to: 28429
-/* 28409 */ MCD_OPC_CheckPredicate, 0, 57, 68, // Skip to: 45878
-/* 28413 */ MCD_OPC_CheckField, 29, 3, 3, 51, 68, // Skip to: 45878
-/* 28419 */ MCD_OPC_CheckField, 21, 1, 1, 45, 68, // Skip to: 45878
-/* 28425 */ MCD_OPC_Decode, 144, 4, 102, // Opcode: FCMGTvvv_2D
-/* 28429 */ MCD_OPC_FilterValue, 58, 20, 0, // Skip to: 28453
-/* 28433 */ MCD_OPC_CheckPredicate, 0, 33, 68, // Skip to: 45878
-/* 28437 */ MCD_OPC_CheckField, 29, 3, 2, 27, 68, // Skip to: 45878
-/* 28443 */ MCD_OPC_CheckField, 16, 6, 32, 21, 68, // Skip to: 45878
-/* 28449 */ MCD_OPC_Decode, 154, 4, 107, // Opcode: FCMLTvvi_2D
-/* 28453 */ MCD_OPC_FilterValue, 59, 20, 0, // Skip to: 28477
-/* 28457 */ MCD_OPC_CheckPredicate, 0, 9, 68, // Skip to: 45878
-/* 28461 */ MCD_OPC_CheckField, 29, 3, 3, 3, 68, // Skip to: 45878
-/* 28467 */ MCD_OPC_CheckField, 21, 1, 1, 253, 67, // Skip to: 45878
-/* 28473 */ MCD_OPC_Decode, 228, 3, 102, // Opcode: FACGTvvv_2D
-/* 28477 */ MCD_OPC_FilterValue, 61, 39, 0, // Skip to: 28520
-/* 28481 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28484 */ MCD_OPC_FilterValue, 2, 14, 0, // Skip to: 28502
-/* 28488 */ MCD_OPC_CheckPredicate, 0, 234, 67, // Skip to: 45878
-/* 28492 */ MCD_OPC_CheckField, 21, 1, 1, 228, 67, // Skip to: 45878
-/* 28498 */ MCD_OPC_Decode, 206, 5, 102, // Opcode: FMINvvv_2D
-/* 28502 */ MCD_OPC_FilterValue, 3, 220, 67, // Skip to: 45878
-/* 28506 */ MCD_OPC_CheckPredicate, 0, 216, 67, // Skip to: 45878
-/* 28510 */ MCD_OPC_CheckField, 21, 1, 1, 210, 67, // Skip to: 45878
-/* 28516 */ MCD_OPC_Decode, 200, 5, 102, // Opcode: FMINPvvv_2D
-/* 28520 */ MCD_OPC_FilterValue, 62, 52, 0, // Skip to: 28576
-/* 28524 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 28527 */ MCD_OPC_FilterValue, 32, 27, 0, // Skip to: 28558
-/* 28531 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28534 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 28546
-/* 28538 */ MCD_OPC_CheckPredicate, 0, 184, 67, // Skip to: 45878
-/* 28542 */ MCD_OPC_Decode, 216, 3, 107, // Opcode: FABS2d
-/* 28546 */ MCD_OPC_FilterValue, 3, 176, 67, // Skip to: 45878
-/* 28550 */ MCD_OPC_CheckPredicate, 0, 172, 67, // Skip to: 45878
-/* 28554 */ MCD_OPC_Decode, 132, 6, 107, // Opcode: FNEG2d
-/* 28558 */ MCD_OPC_FilterValue, 33, 164, 67, // Skip to: 45878
-/* 28562 */ MCD_OPC_CheckPredicate, 0, 160, 67, // Skip to: 45878
-/* 28566 */ MCD_OPC_CheckField, 29, 3, 3, 154, 67, // Skip to: 45878
-/* 28572 */ MCD_OPC_Decode, 200, 6, 107, // Opcode: FSQRT_2d
-/* 28576 */ MCD_OPC_FilterValue, 63, 146, 67, // Skip to: 45878
-/* 28580 */ MCD_OPC_CheckPredicate, 0, 142, 67, // Skip to: 45878
-/* 28584 */ MCD_OPC_CheckField, 29, 3, 2, 136, 67, // Skip to: 45878
-/* 28590 */ MCD_OPC_CheckField, 21, 1, 1, 130, 67, // Skip to: 45878
-/* 28596 */ MCD_OPC_Decode, 197, 6, 102, // Opcode: FRSQRTSvvv_2D
-/* 28600 */ MCD_OPC_FilterValue, 12, 169, 13, // Skip to: 32101
-/* 28604 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 28607 */ MCD_OPC_FilterValue, 0, 66, 3, // Skip to: 29445
-/* 28611 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 28614 */ MCD_OPC_FilterValue, 1, 171, 2, // Skip to: 29301
-/* 28618 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 28621 */ MCD_OPC_FilterValue, 0, 91, 1, // Skip to: 28972
-/* 28625 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 28628 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 28761
-/* 28632 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 28635 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 28728
-/* 28639 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 28642 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 28695
-/* 28646 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 28649 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28662
-/* 28653 */ MCD_OPC_CheckPredicate, 0, 69, 67, // Skip to: 45878
-/* 28657 */ MCD_OPC_Decode, 137, 11, 135, 1, // Opcode: MOVIvi_lsl_2S
-/* 28662 */ MCD_OPC_FilterValue, 1, 60, 67, // Skip to: 45878
-/* 28666 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 28669 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28682
-/* 28673 */ MCD_OPC_CheckPredicate, 0, 49, 67, // Skip to: 45878
-/* 28677 */ MCD_OPC_Decode, 229, 15, 136, 1, // Opcode: SSHRvvi_8B
-/* 28682 */ MCD_OPC_FilterValue, 1, 40, 67, // Skip to: 45878
-/* 28686 */ MCD_OPC_CheckPredicate, 0, 36, 67, // Skip to: 45878
-/* 28690 */ MCD_OPC_Decode, 199, 15, 136, 1, // Opcode: SRSHRvvi_8B
-/* 28695 */ MCD_OPC_FilterValue, 1, 27, 67, // Skip to: 45878
-/* 28699 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 28702 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28715
-/* 28706 */ MCD_OPC_CheckPredicate, 0, 16, 67, // Skip to: 45878
-/* 28710 */ MCD_OPC_Decode, 227, 15, 137, 1, // Opcode: SSHRvvi_4H
-/* 28715 */ MCD_OPC_FilterValue, 1, 7, 67, // Skip to: 45878
-/* 28719 */ MCD_OPC_CheckPredicate, 0, 3, 67, // Skip to: 45878
-/* 28723 */ MCD_OPC_Decode, 197, 15, 137, 1, // Opcode: SRSHRvvi_4H
-/* 28728 */ MCD_OPC_FilterValue, 1, 250, 66, // Skip to: 45878
-/* 28732 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 28735 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28748
-/* 28739 */ MCD_OPC_CheckPredicate, 0, 239, 66, // Skip to: 45878
-/* 28743 */ MCD_OPC_Decode, 226, 15, 138, 1, // Opcode: SSHRvvi_2S
-/* 28748 */ MCD_OPC_FilterValue, 1, 230, 66, // Skip to: 45878
-/* 28752 */ MCD_OPC_CheckPredicate, 0, 226, 66, // Skip to: 45878
-/* 28756 */ MCD_OPC_Decode, 196, 15, 138, 1, // Opcode: SRSHRvvi_2S
-/* 28761 */ MCD_OPC_FilterValue, 1, 217, 66, // Skip to: 45878
-/* 28765 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 28768 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 28913
-/* 28772 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 28775 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 28854
-/* 28779 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 28782 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28795
-/* 28786 */ MCD_OPC_CheckPredicate, 0, 192, 66, // Skip to: 45878
-/* 28790 */ MCD_OPC_Decode, 198, 11, 139, 1, // Opcode: ORRvi_lsl_2S
-/* 28795 */ MCD_OPC_FilterValue, 1, 183, 66, // Skip to: 45878
-/* 28799 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 28802 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28815
-/* 28806 */ MCD_OPC_CheckPredicate, 0, 172, 66, // Skip to: 45878
-/* 28810 */ MCD_OPC_Decode, 237, 15, 140, 1, // Opcode: SSRAvvi_8B
-/* 28815 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 28828
-/* 28819 */ MCD_OPC_CheckPredicate, 0, 159, 66, // Skip to: 45878
-/* 28823 */ MCD_OPC_Decode, 207, 15, 140, 1, // Opcode: SRSRAvvi_8B
-/* 28828 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 28841
-/* 28832 */ MCD_OPC_CheckPredicate, 0, 146, 66, // Skip to: 45878
-/* 28836 */ MCD_OPC_Decode, 132, 13, 141, 1, // Opcode: SHLvvi_8B
-/* 28841 */ MCD_OPC_FilterValue, 3, 137, 66, // Skip to: 45878
-/* 28845 */ MCD_OPC_CheckPredicate, 0, 133, 66, // Skip to: 45878
-/* 28849 */ MCD_OPC_Decode, 249, 14, 141, 1, // Opcode: SQSHLvvi_8B
-/* 28854 */ MCD_OPC_FilterValue, 1, 124, 66, // Skip to: 45878
-/* 28858 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 28861 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28874
-/* 28865 */ MCD_OPC_CheckPredicate, 0, 113, 66, // Skip to: 45878
-/* 28869 */ MCD_OPC_Decode, 235, 15, 142, 1, // Opcode: SSRAvvi_4H
-/* 28874 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 28887
-/* 28878 */ MCD_OPC_CheckPredicate, 0, 100, 66, // Skip to: 45878
-/* 28882 */ MCD_OPC_Decode, 205, 15, 142, 1, // Opcode: SRSRAvvi_4H
-/* 28887 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 28900
-/* 28891 */ MCD_OPC_CheckPredicate, 0, 87, 66, // Skip to: 45878
-/* 28895 */ MCD_OPC_Decode, 130, 13, 143, 1, // Opcode: SHLvvi_4H
-/* 28900 */ MCD_OPC_FilterValue, 3, 78, 66, // Skip to: 45878
-/* 28904 */ MCD_OPC_CheckPredicate, 0, 74, 66, // Skip to: 45878
-/* 28908 */ MCD_OPC_Decode, 247, 14, 143, 1, // Opcode: SQSHLvvi_4H
-/* 28913 */ MCD_OPC_FilterValue, 1, 65, 66, // Skip to: 45878
-/* 28917 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 28920 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28933
-/* 28924 */ MCD_OPC_CheckPredicate, 0, 54, 66, // Skip to: 45878
-/* 28928 */ MCD_OPC_Decode, 234, 15, 144, 1, // Opcode: SSRAvvi_2S
-/* 28933 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 28946
-/* 28937 */ MCD_OPC_CheckPredicate, 0, 41, 66, // Skip to: 45878
-/* 28941 */ MCD_OPC_Decode, 204, 15, 144, 1, // Opcode: SRSRAvvi_2S
-/* 28946 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 28959
-/* 28950 */ MCD_OPC_CheckPredicate, 0, 28, 66, // Skip to: 45878
-/* 28954 */ MCD_OPC_Decode, 129, 13, 145, 1, // Opcode: SHLvvi_2S
-/* 28959 */ MCD_OPC_FilterValue, 3, 19, 66, // Skip to: 45878
-/* 28963 */ MCD_OPC_CheckPredicate, 0, 15, 66, // Skip to: 45878
-/* 28967 */ MCD_OPC_Decode, 246, 14, 145, 1, // Opcode: SQSHLvvi_2S
-/* 28972 */ MCD_OPC_FilterValue, 1, 6, 66, // Skip to: 45878
-/* 28976 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ...
-/* 28979 */ MCD_OPC_FilterValue, 0, 227, 0, // Skip to: 29210
-/* 28983 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 28986 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 29119
-/* 28990 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 28993 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 29086
-/* 28997 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 29000 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 29053
-/* 29004 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 29007 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29020
-/* 29011 */ MCD_OPC_CheckPredicate, 0, 223, 65, // Skip to: 45878
-/* 29015 */ MCD_OPC_Decode, 138, 11, 146, 1, // Opcode: MOVIvi_lsl_4H
-/* 29020 */ MCD_OPC_FilterValue, 1, 214, 65, // Skip to: 45878
-/* 29024 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 29027 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29040
-/* 29031 */ MCD_OPC_CheckPredicate, 0, 203, 65, // Skip to: 45878
-/* 29035 */ MCD_OPC_Decode, 138, 13, 147, 1, // Opcode: SHRNvvi_8B
-/* 29040 */ MCD_OPC_FilterValue, 1, 194, 65, // Skip to: 45878
-/* 29044 */ MCD_OPC_CheckPredicate, 0, 190, 65, // Skip to: 45878
-/* 29048 */ MCD_OPC_Decode, 213, 15, 148, 1, // Opcode: SSHLLvvi_8B
-/* 29053 */ MCD_OPC_FilterValue, 1, 181, 65, // Skip to: 45878
-/* 29057 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 29060 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29073
-/* 29064 */ MCD_OPC_CheckPredicate, 0, 170, 65, // Skip to: 45878
-/* 29068 */ MCD_OPC_Decode, 136, 13, 149, 1, // Opcode: SHRNvvi_4H
-/* 29073 */ MCD_OPC_FilterValue, 1, 161, 65, // Skip to: 45878
-/* 29077 */ MCD_OPC_CheckPredicate, 0, 157, 65, // Skip to: 45878
-/* 29081 */ MCD_OPC_Decode, 211, 15, 150, 1, // Opcode: SSHLLvvi_4H
-/* 29086 */ MCD_OPC_FilterValue, 1, 148, 65, // Skip to: 45878
-/* 29090 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 29093 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29106
-/* 29097 */ MCD_OPC_CheckPredicate, 0, 137, 65, // Skip to: 45878
-/* 29101 */ MCD_OPC_Decode, 135, 13, 151, 1, // Opcode: SHRNvvi_2S
-/* 29106 */ MCD_OPC_FilterValue, 1, 128, 65, // Skip to: 45878
-/* 29110 */ MCD_OPC_CheckPredicate, 0, 124, 65, // Skip to: 45878
-/* 29114 */ MCD_OPC_Decode, 210, 15, 152, 1, // Opcode: SSHLLvvi_2S
-/* 29119 */ MCD_OPC_FilterValue, 1, 115, 65, // Skip to: 45878
-/* 29123 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 29126 */ MCD_OPC_FilterValue, 0, 61, 0, // Skip to: 29191
-/* 29130 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 29133 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 29172
-/* 29137 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 29140 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29153
-/* 29144 */ MCD_OPC_CheckPredicate, 0, 90, 65, // Skip to: 45878
-/* 29148 */ MCD_OPC_Decode, 199, 11, 153, 1, // Opcode: ORRvi_lsl_4H
-/* 29153 */ MCD_OPC_FilterValue, 1, 81, 65, // Skip to: 45878
-/* 29157 */ MCD_OPC_CheckPredicate, 0, 77, 65, // Skip to: 45878
-/* 29161 */ MCD_OPC_CheckField, 13, 1, 0, 71, 65, // Skip to: 45878
-/* 29167 */ MCD_OPC_Decode, 137, 15, 147, 1, // Opcode: SQSHRNvvi_8B
-/* 29172 */ MCD_OPC_FilterValue, 1, 62, 65, // Skip to: 45878
-/* 29176 */ MCD_OPC_CheckPredicate, 0, 58, 65, // Skip to: 45878
-/* 29180 */ MCD_OPC_CheckField, 13, 1, 0, 52, 65, // Skip to: 45878
-/* 29186 */ MCD_OPC_Decode, 135, 15, 149, 1, // Opcode: SQSHRNvvi_4H
-/* 29191 */ MCD_OPC_FilterValue, 1, 43, 65, // Skip to: 45878
-/* 29195 */ MCD_OPC_CheckPredicate, 0, 39, 65, // Skip to: 45878
-/* 29199 */ MCD_OPC_CheckField, 13, 1, 0, 33, 65, // Skip to: 45878
-/* 29205 */ MCD_OPC_Decode, 134, 15, 151, 1, // Opcode: SQSHRNvvi_2S
-/* 29210 */ MCD_OPC_FilterValue, 1, 24, 65, // Skip to: 45878
-/* 29214 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 29217 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29236
-/* 29221 */ MCD_OPC_CheckPredicate, 0, 13, 65, // Skip to: 45878
-/* 29225 */ MCD_OPC_CheckField, 19, 3, 0, 7, 65, // Skip to: 45878
-/* 29231 */ MCD_OPC_Decode, 141, 11, 154, 1, // Opcode: MOVIvi_msl_2S
-/* 29236 */ MCD_OPC_FilterValue, 1, 254, 64, // Skip to: 45878
-/* 29240 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 29243 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 29282
-/* 29247 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 29250 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29269
-/* 29254 */ MCD_OPC_CheckPredicate, 0, 236, 64, // Skip to: 45878
-/* 29258 */ MCD_OPC_CheckField, 19, 2, 0, 230, 64, // Skip to: 45878
-/* 29264 */ MCD_OPC_Decode, 136, 11, 155, 1, // Opcode: MOVIvi_8B
-/* 29269 */ MCD_OPC_FilterValue, 1, 221, 64, // Skip to: 45878
-/* 29273 */ MCD_OPC_CheckPredicate, 0, 217, 64, // Skip to: 45878
-/* 29277 */ MCD_OPC_Decode, 198, 21, 138, 1, // Opcode: VCVTxs2f_2S
-/* 29282 */ MCD_OPC_FilterValue, 1, 208, 64, // Skip to: 45878
-/* 29286 */ MCD_OPC_CheckPredicate, 0, 204, 64, // Skip to: 45878
-/* 29290 */ MCD_OPC_CheckField, 19, 3, 0, 198, 64, // Skip to: 45878
-/* 29296 */ MCD_OPC_Decode, 232, 5, 155, 1, // Opcode: FMOVvi_2S
-/* 29301 */ MCD_OPC_FilterValue, 3, 189, 64, // Skip to: 45878
-/* 29305 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 29308 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 29367
-/* 29312 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 29315 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 29354
-/* 29319 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 29322 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29341
-/* 29326 */ MCD_OPC_CheckPredicate, 0, 164, 64, // Skip to: 45878
-/* 29330 */ MCD_OPC_CheckField, 19, 1, 1, 158, 64, // Skip to: 45878
-/* 29336 */ MCD_OPC_Decode, 144, 12, 147, 1, // Opcode: RSHRNvvi_8B
-/* 29341 */ MCD_OPC_FilterValue, 1, 149, 64, // Skip to: 45878
-/* 29345 */ MCD_OPC_CheckPredicate, 0, 145, 64, // Skip to: 45878
-/* 29349 */ MCD_OPC_Decode, 142, 12, 149, 1, // Opcode: RSHRNvvi_4H
-/* 29354 */ MCD_OPC_FilterValue, 1, 136, 64, // Skip to: 45878
-/* 29358 */ MCD_OPC_CheckPredicate, 0, 132, 64, // Skip to: 45878
-/* 29362 */ MCD_OPC_Decode, 141, 12, 151, 1, // Opcode: RSHRNvvi_2S
-/* 29367 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 29426
-/* 29371 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 29374 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 29413
-/* 29378 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 29381 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29400
-/* 29385 */ MCD_OPC_CheckPredicate, 0, 105, 64, // Skip to: 45878
-/* 29389 */ MCD_OPC_CheckField, 19, 1, 1, 99, 64, // Skip to: 45878
-/* 29395 */ MCD_OPC_Decode, 220, 14, 147, 1, // Opcode: SQRSHRNvvi_8B
-/* 29400 */ MCD_OPC_FilterValue, 1, 90, 64, // Skip to: 45878
-/* 29404 */ MCD_OPC_CheckPredicate, 0, 86, 64, // Skip to: 45878
-/* 29408 */ MCD_OPC_Decode, 218, 14, 149, 1, // Opcode: SQRSHRNvvi_4H
-/* 29413 */ MCD_OPC_FilterValue, 1, 77, 64, // Skip to: 45878
-/* 29417 */ MCD_OPC_CheckPredicate, 0, 73, 64, // Skip to: 45878
-/* 29421 */ MCD_OPC_Decode, 217, 14, 151, 1, // Opcode: SQRSHRNvvi_2S
-/* 29426 */ MCD_OPC_FilterValue, 15, 64, 64, // Skip to: 45878
-/* 29430 */ MCD_OPC_CheckPredicate, 0, 60, 64, // Skip to: 45878
-/* 29434 */ MCD_OPC_CheckField, 21, 1, 1, 54, 64, // Skip to: 45878
-/* 29440 */ MCD_OPC_Decode, 192, 21, 138, 1, // Opcode: VCVTf2xs_2S
-/* 29445 */ MCD_OPC_FilterValue, 1, 130, 3, // Skip to: 30347
-/* 29449 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 29452 */ MCD_OPC_FilterValue, 1, 235, 2, // Skip to: 30203
-/* 29456 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 29459 */ MCD_OPC_FilterValue, 0, 169, 1, // Skip to: 29888
-/* 29463 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 29466 */ MCD_OPC_FilterValue, 0, 207, 0, // Skip to: 29677
-/* 29470 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 29473 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 29618
-/* 29477 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 29480 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 29559
-/* 29484 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 29487 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29500
-/* 29491 */ MCD_OPC_CheckPredicate, 0, 255, 63, // Skip to: 45878
-/* 29495 */ MCD_OPC_Decode, 164, 11, 135, 1, // Opcode: MVNIvi_lsl_2S
-/* 29500 */ MCD_OPC_FilterValue, 1, 246, 63, // Skip to: 45878
-/* 29504 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 29507 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29520
-/* 29511 */ MCD_OPC_CheckPredicate, 0, 235, 63, // Skip to: 45878
-/* 29515 */ MCD_OPC_Decode, 140, 21, 136, 1, // Opcode: USHRvvi_8B
-/* 29520 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 29533
-/* 29524 */ MCD_OPC_CheckPredicate, 0, 222, 63, // Skip to: 45878
-/* 29528 */ MCD_OPC_Decode, 236, 20, 136, 1, // Opcode: URSHRvvi_8B
-/* 29533 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 29546
-/* 29537 */ MCD_OPC_CheckPredicate, 0, 209, 63, // Skip to: 45878
-/* 29541 */ MCD_OPC_Decode, 183, 15, 140, 1, // Opcode: SRIvvi_8B
-/* 29546 */ MCD_OPC_FilterValue, 3, 200, 63, // Skip to: 45878
-/* 29550 */ MCD_OPC_CheckPredicate, 0, 196, 63, // Skip to: 45878
-/* 29554 */ MCD_OPC_Decode, 234, 14, 141, 1, // Opcode: SQSHLUvvi_8B
-/* 29559 */ MCD_OPC_FilterValue, 1, 187, 63, // Skip to: 45878
-/* 29563 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 29566 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29579
-/* 29570 */ MCD_OPC_CheckPredicate, 0, 176, 63, // Skip to: 45878
-/* 29574 */ MCD_OPC_Decode, 138, 21, 137, 1, // Opcode: USHRvvi_4H
-/* 29579 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 29592
-/* 29583 */ MCD_OPC_CheckPredicate, 0, 163, 63, // Skip to: 45878
-/* 29587 */ MCD_OPC_Decode, 234, 20, 137, 1, // Opcode: URSHRvvi_4H
-/* 29592 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 29605
-/* 29596 */ MCD_OPC_CheckPredicate, 0, 150, 63, // Skip to: 45878
-/* 29600 */ MCD_OPC_Decode, 181, 15, 142, 1, // Opcode: SRIvvi_4H
-/* 29605 */ MCD_OPC_FilterValue, 3, 141, 63, // Skip to: 45878
-/* 29609 */ MCD_OPC_CheckPredicate, 0, 137, 63, // Skip to: 45878
-/* 29613 */ MCD_OPC_Decode, 232, 14, 143, 1, // Opcode: SQSHLUvvi_4H
-/* 29618 */ MCD_OPC_FilterValue, 1, 128, 63, // Skip to: 45878
-/* 29622 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 29625 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29638
-/* 29629 */ MCD_OPC_CheckPredicate, 0, 117, 63, // Skip to: 45878
-/* 29633 */ MCD_OPC_Decode, 137, 21, 138, 1, // Opcode: USHRvvi_2S
-/* 29638 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 29651
-/* 29642 */ MCD_OPC_CheckPredicate, 0, 104, 63, // Skip to: 45878
-/* 29646 */ MCD_OPC_Decode, 233, 20, 138, 1, // Opcode: URSHRvvi_2S
-/* 29651 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 29664
-/* 29655 */ MCD_OPC_CheckPredicate, 0, 91, 63, // Skip to: 45878
-/* 29659 */ MCD_OPC_Decode, 180, 15, 144, 1, // Opcode: SRIvvi_2S
-/* 29664 */ MCD_OPC_FilterValue, 3, 82, 63, // Skip to: 45878
-/* 29668 */ MCD_OPC_CheckPredicate, 0, 78, 63, // Skip to: 45878
-/* 29672 */ MCD_OPC_Decode, 231, 14, 145, 1, // Opcode: SQSHLUvvi_2S
-/* 29677 */ MCD_OPC_FilterValue, 1, 69, 63, // Skip to: 45878
-/* 29681 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 29684 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 29829
-/* 29688 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 29691 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 29770
-/* 29695 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 29698 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29711
-/* 29702 */ MCD_OPC_CheckPredicate, 0, 44, 63, // Skip to: 45878
-/* 29706 */ MCD_OPC_Decode, 211, 1, 139, 1, // Opcode: BICvi_lsl_2S
-/* 29711 */ MCD_OPC_FilterValue, 1, 35, 63, // Skip to: 45878
-/* 29715 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 29718 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29731
-/* 29722 */ MCD_OPC_CheckPredicate, 0, 24, 63, // Skip to: 45878
-/* 29726 */ MCD_OPC_Decode, 159, 21, 140, 1, // Opcode: USRAvvi_8B
-/* 29731 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 29744
-/* 29735 */ MCD_OPC_CheckPredicate, 0, 11, 63, // Skip to: 45878
-/* 29739 */ MCD_OPC_Decode, 246, 20, 140, 1, // Opcode: URSRAvvi_8B
-/* 29744 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 29757
-/* 29748 */ MCD_OPC_CheckPredicate, 0, 254, 62, // Skip to: 45878
-/* 29752 */ MCD_OPC_Decode, 152, 13, 156, 1, // Opcode: SLIvvi_8B
-/* 29757 */ MCD_OPC_FilterValue, 3, 245, 62, // Skip to: 45878
-/* 29761 */ MCD_OPC_CheckPredicate, 0, 241, 62, // Skip to: 45878
-/* 29765 */ MCD_OPC_Decode, 176, 20, 141, 1, // Opcode: UQSHLvvi_8B
-/* 29770 */ MCD_OPC_FilterValue, 1, 232, 62, // Skip to: 45878
-/* 29774 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 29777 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29790
-/* 29781 */ MCD_OPC_CheckPredicate, 0, 221, 62, // Skip to: 45878
-/* 29785 */ MCD_OPC_Decode, 157, 21, 142, 1, // Opcode: USRAvvi_4H
-/* 29790 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 29803
-/* 29794 */ MCD_OPC_CheckPredicate, 0, 208, 62, // Skip to: 45878
-/* 29798 */ MCD_OPC_Decode, 244, 20, 142, 1, // Opcode: URSRAvvi_4H
-/* 29803 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 29816
-/* 29807 */ MCD_OPC_CheckPredicate, 0, 195, 62, // Skip to: 45878
-/* 29811 */ MCD_OPC_Decode, 150, 13, 157, 1, // Opcode: SLIvvi_4H
-/* 29816 */ MCD_OPC_FilterValue, 3, 186, 62, // Skip to: 45878
-/* 29820 */ MCD_OPC_CheckPredicate, 0, 182, 62, // Skip to: 45878
-/* 29824 */ MCD_OPC_Decode, 174, 20, 143, 1, // Opcode: UQSHLvvi_4H
-/* 29829 */ MCD_OPC_FilterValue, 1, 173, 62, // Skip to: 45878
-/* 29833 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 29836 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29849
-/* 29840 */ MCD_OPC_CheckPredicate, 0, 162, 62, // Skip to: 45878
-/* 29844 */ MCD_OPC_Decode, 156, 21, 144, 1, // Opcode: USRAvvi_2S
-/* 29849 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 29862
-/* 29853 */ MCD_OPC_CheckPredicate, 0, 149, 62, // Skip to: 45878
-/* 29857 */ MCD_OPC_Decode, 243, 20, 144, 1, // Opcode: URSRAvvi_2S
-/* 29862 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 29875
-/* 29866 */ MCD_OPC_CheckPredicate, 0, 136, 62, // Skip to: 45878
-/* 29870 */ MCD_OPC_Decode, 149, 13, 158, 1, // Opcode: SLIvvi_2S
-/* 29875 */ MCD_OPC_FilterValue, 3, 127, 62, // Skip to: 45878
-/* 29879 */ MCD_OPC_CheckPredicate, 0, 123, 62, // Skip to: 45878
-/* 29883 */ MCD_OPC_Decode, 173, 20, 145, 1, // Opcode: UQSHLvvi_2S
-/* 29888 */ MCD_OPC_FilterValue, 1, 114, 62, // Skip to: 45878
-/* 29892 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ...
-/* 29895 */ MCD_OPC_FilterValue, 0, 227, 0, // Skip to: 30126
-/* 29899 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 29902 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 30035
-/* 29906 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 29909 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 30002
-/* 29913 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 29916 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 29969
-/* 29920 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 29923 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29936
-/* 29927 */ MCD_OPC_CheckPredicate, 0, 75, 62, // Skip to: 45878
-/* 29931 */ MCD_OPC_Decode, 165, 11, 146, 1, // Opcode: MVNIvi_lsl_4H
-/* 29936 */ MCD_OPC_FilterValue, 1, 66, 62, // Skip to: 45878
-/* 29940 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 29943 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29956
-/* 29947 */ MCD_OPC_CheckPredicate, 0, 55, 62, // Skip to: 45878
-/* 29951 */ MCD_OPC_Decode, 235, 11, 147, 1, // Opcode: QSHRUNvvi_8B
-/* 29956 */ MCD_OPC_FilterValue, 1, 46, 62, // Skip to: 45878
-/* 29960 */ MCD_OPC_CheckPredicate, 0, 42, 62, // Skip to: 45878
-/* 29964 */ MCD_OPC_Decode, 252, 20, 148, 1, // Opcode: USHLLvvi_8B
-/* 29969 */ MCD_OPC_FilterValue, 1, 33, 62, // Skip to: 45878
-/* 29973 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 29976 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 29989
-/* 29980 */ MCD_OPC_CheckPredicate, 0, 22, 62, // Skip to: 45878
-/* 29984 */ MCD_OPC_Decode, 233, 11, 149, 1, // Opcode: QSHRUNvvi_4H
-/* 29989 */ MCD_OPC_FilterValue, 1, 13, 62, // Skip to: 45878
-/* 29993 */ MCD_OPC_CheckPredicate, 0, 9, 62, // Skip to: 45878
-/* 29997 */ MCD_OPC_Decode, 250, 20, 150, 1, // Opcode: USHLLvvi_4H
-/* 30002 */ MCD_OPC_FilterValue, 1, 0, 62, // Skip to: 45878
-/* 30006 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 30009 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30022
-/* 30013 */ MCD_OPC_CheckPredicate, 0, 245, 61, // Skip to: 45878
-/* 30017 */ MCD_OPC_Decode, 232, 11, 151, 1, // Opcode: QSHRUNvvi_2S
-/* 30022 */ MCD_OPC_FilterValue, 1, 236, 61, // Skip to: 45878
-/* 30026 */ MCD_OPC_CheckPredicate, 0, 232, 61, // Skip to: 45878
-/* 30030 */ MCD_OPC_Decode, 249, 20, 152, 1, // Opcode: USHLLvvi_2S
-/* 30035 */ MCD_OPC_FilterValue, 1, 223, 61, // Skip to: 45878
-/* 30039 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 30042 */ MCD_OPC_FilterValue, 0, 61, 0, // Skip to: 30107
-/* 30046 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 30049 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 30088
-/* 30053 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 30056 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30069
-/* 30060 */ MCD_OPC_CheckPredicate, 0, 198, 61, // Skip to: 45878
-/* 30064 */ MCD_OPC_Decode, 212, 1, 153, 1, // Opcode: BICvi_lsl_4H
-/* 30069 */ MCD_OPC_FilterValue, 1, 189, 61, // Skip to: 45878
-/* 30073 */ MCD_OPC_CheckPredicate, 0, 185, 61, // Skip to: 45878
-/* 30077 */ MCD_OPC_CheckField, 13, 1, 0, 179, 61, // Skip to: 45878
-/* 30083 */ MCD_OPC_Decode, 192, 20, 147, 1, // Opcode: UQSHRNvvi_8B
-/* 30088 */ MCD_OPC_FilterValue, 1, 170, 61, // Skip to: 45878
-/* 30092 */ MCD_OPC_CheckPredicate, 0, 166, 61, // Skip to: 45878
-/* 30096 */ MCD_OPC_CheckField, 13, 1, 0, 160, 61, // Skip to: 45878
-/* 30102 */ MCD_OPC_Decode, 190, 20, 149, 1, // Opcode: UQSHRNvvi_4H
-/* 30107 */ MCD_OPC_FilterValue, 1, 151, 61, // Skip to: 45878
-/* 30111 */ MCD_OPC_CheckPredicate, 0, 147, 61, // Skip to: 45878
-/* 30115 */ MCD_OPC_CheckField, 13, 1, 0, 141, 61, // Skip to: 45878
-/* 30121 */ MCD_OPC_Decode, 189, 20, 151, 1, // Opcode: UQSHRNvvi_2S
-/* 30126 */ MCD_OPC_FilterValue, 1, 132, 61, // Skip to: 45878
-/* 30130 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 30133 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 30152
-/* 30137 */ MCD_OPC_CheckPredicate, 0, 121, 61, // Skip to: 45878
-/* 30141 */ MCD_OPC_CheckField, 19, 3, 0, 115, 61, // Skip to: 45878
-/* 30147 */ MCD_OPC_Decode, 168, 11, 154, 1, // Opcode: MVNIvi_msl_2S
-/* 30152 */ MCD_OPC_FilterValue, 1, 106, 61, // Skip to: 45878
-/* 30156 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 30159 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 30184
-/* 30163 */ MCD_OPC_CheckPredicate, 0, 95, 61, // Skip to: 45878
-/* 30167 */ MCD_OPC_CheckField, 19, 2, 0, 89, 61, // Skip to: 45878
-/* 30173 */ MCD_OPC_CheckField, 12, 1, 0, 83, 61, // Skip to: 45878
-/* 30179 */ MCD_OPC_Decode, 133, 11, 155, 1, // Opcode: MOVIdi
-/* 30184 */ MCD_OPC_FilterValue, 1, 74, 61, // Skip to: 45878
-/* 30188 */ MCD_OPC_CheckPredicate, 0, 70, 61, // Skip to: 45878
-/* 30192 */ MCD_OPC_CheckField, 12, 1, 0, 64, 61, // Skip to: 45878
-/* 30198 */ MCD_OPC_Decode, 201, 21, 138, 1, // Opcode: VCVTxu2f_2S
-/* 30203 */ MCD_OPC_FilterValue, 3, 55, 61, // Skip to: 45878
-/* 30207 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 30210 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 30269
-/* 30214 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 30217 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 30256
-/* 30221 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 30224 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 30243
-/* 30228 */ MCD_OPC_CheckPredicate, 0, 30, 61, // Skip to: 45878
-/* 30232 */ MCD_OPC_CheckField, 19, 1, 1, 24, 61, // Skip to: 45878
-/* 30238 */ MCD_OPC_Decode, 229, 11, 147, 1, // Opcode: QRSHRUNvvi_8B
-/* 30243 */ MCD_OPC_FilterValue, 1, 15, 61, // Skip to: 45878
-/* 30247 */ MCD_OPC_CheckPredicate, 0, 11, 61, // Skip to: 45878
-/* 30251 */ MCD_OPC_Decode, 227, 11, 149, 1, // Opcode: QRSHRUNvvi_4H
-/* 30256 */ MCD_OPC_FilterValue, 1, 2, 61, // Skip to: 45878
-/* 30260 */ MCD_OPC_CheckPredicate, 0, 254, 60, // Skip to: 45878
-/* 30264 */ MCD_OPC_Decode, 226, 11, 151, 1, // Opcode: QRSHRUNvvi_2S
-/* 30269 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 30328
-/* 30273 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 30276 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 30315
-/* 30280 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 30283 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 30302
-/* 30287 */ MCD_OPC_CheckPredicate, 0, 227, 60, // Skip to: 45878
-/* 30291 */ MCD_OPC_CheckField, 19, 1, 1, 221, 60, // Skip to: 45878
-/* 30297 */ MCD_OPC_Decode, 161, 20, 147, 1, // Opcode: UQRSHRNvvi_8B
-/* 30302 */ MCD_OPC_FilterValue, 1, 212, 60, // Skip to: 45878
-/* 30306 */ MCD_OPC_CheckPredicate, 0, 208, 60, // Skip to: 45878
-/* 30310 */ MCD_OPC_Decode, 159, 20, 149, 1, // Opcode: UQRSHRNvvi_4H
-/* 30315 */ MCD_OPC_FilterValue, 1, 199, 60, // Skip to: 45878
-/* 30319 */ MCD_OPC_CheckPredicate, 0, 195, 60, // Skip to: 45878
-/* 30323 */ MCD_OPC_Decode, 158, 20, 151, 1, // Opcode: UQRSHRNvvi_2S
-/* 30328 */ MCD_OPC_FilterValue, 15, 186, 60, // Skip to: 45878
-/* 30332 */ MCD_OPC_CheckPredicate, 0, 182, 60, // Skip to: 45878
-/* 30336 */ MCD_OPC_CheckField, 21, 1, 1, 176, 60, // Skip to: 45878
-/* 30342 */ MCD_OPC_Decode, 195, 21, 138, 1, // Opcode: VCVTf2xu_2S
-/* 30347 */ MCD_OPC_FilterValue, 2, 66, 3, // Skip to: 31185
-/* 30351 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 30354 */ MCD_OPC_FilterValue, 1, 171, 2, // Skip to: 31041
-/* 30358 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 30361 */ MCD_OPC_FilterValue, 0, 91, 1, // Skip to: 30712
-/* 30365 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 30368 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 30501
-/* 30372 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 30375 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 30468
-/* 30379 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 30382 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 30435
-/* 30386 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 30389 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30402
-/* 30393 */ MCD_OPC_CheckPredicate, 0, 121, 60, // Skip to: 45878
-/* 30397 */ MCD_OPC_Decode, 139, 11, 159, 1, // Opcode: MOVIvi_lsl_4S
-/* 30402 */ MCD_OPC_FilterValue, 1, 112, 60, // Skip to: 45878
-/* 30406 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 30409 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30422
-/* 30413 */ MCD_OPC_CheckPredicate, 0, 101, 60, // Skip to: 45878
-/* 30417 */ MCD_OPC_Decode, 224, 15, 160, 1, // Opcode: SSHRvvi_16B
-/* 30422 */ MCD_OPC_FilterValue, 1, 92, 60, // Skip to: 45878
-/* 30426 */ MCD_OPC_CheckPredicate, 0, 88, 60, // Skip to: 45878
-/* 30430 */ MCD_OPC_Decode, 194, 15, 160, 1, // Opcode: SRSHRvvi_16B
-/* 30435 */ MCD_OPC_FilterValue, 1, 79, 60, // Skip to: 45878
-/* 30439 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 30442 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30455
-/* 30446 */ MCD_OPC_CheckPredicate, 0, 68, 60, // Skip to: 45878
-/* 30450 */ MCD_OPC_Decode, 230, 15, 161, 1, // Opcode: SSHRvvi_8H
-/* 30455 */ MCD_OPC_FilterValue, 1, 59, 60, // Skip to: 45878
-/* 30459 */ MCD_OPC_CheckPredicate, 0, 55, 60, // Skip to: 45878
-/* 30463 */ MCD_OPC_Decode, 200, 15, 161, 1, // Opcode: SRSHRvvi_8H
-/* 30468 */ MCD_OPC_FilterValue, 1, 46, 60, // Skip to: 45878
-/* 30472 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 30475 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30488
-/* 30479 */ MCD_OPC_CheckPredicate, 0, 35, 60, // Skip to: 45878
-/* 30483 */ MCD_OPC_Decode, 228, 15, 162, 1, // Opcode: SSHRvvi_4S
-/* 30488 */ MCD_OPC_FilterValue, 1, 26, 60, // Skip to: 45878
-/* 30492 */ MCD_OPC_CheckPredicate, 0, 22, 60, // Skip to: 45878
-/* 30496 */ MCD_OPC_Decode, 198, 15, 162, 1, // Opcode: SRSHRvvi_4S
-/* 30501 */ MCD_OPC_FilterValue, 1, 13, 60, // Skip to: 45878
-/* 30505 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 30508 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 30653
-/* 30512 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 30515 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 30594
-/* 30519 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 30522 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30535
-/* 30526 */ MCD_OPC_CheckPredicate, 0, 244, 59, // Skip to: 45878
-/* 30530 */ MCD_OPC_Decode, 200, 11, 163, 1, // Opcode: ORRvi_lsl_4S
-/* 30535 */ MCD_OPC_FilterValue, 1, 235, 59, // Skip to: 45878
-/* 30539 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 30542 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30555
-/* 30546 */ MCD_OPC_CheckPredicate, 0, 224, 59, // Skip to: 45878
-/* 30550 */ MCD_OPC_Decode, 232, 15, 164, 1, // Opcode: SSRAvvi_16B
-/* 30555 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 30568
-/* 30559 */ MCD_OPC_CheckPredicate, 0, 211, 59, // Skip to: 45878
-/* 30563 */ MCD_OPC_Decode, 202, 15, 164, 1, // Opcode: SRSRAvvi_16B
-/* 30568 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 30581
-/* 30572 */ MCD_OPC_CheckPredicate, 0, 198, 59, // Skip to: 45878
-/* 30576 */ MCD_OPC_Decode, 255, 12, 165, 1, // Opcode: SHLvvi_16B
-/* 30581 */ MCD_OPC_FilterValue, 3, 189, 59, // Skip to: 45878
-/* 30585 */ MCD_OPC_CheckPredicate, 0, 185, 59, // Skip to: 45878
-/* 30589 */ MCD_OPC_Decode, 244, 14, 165, 1, // Opcode: SQSHLvvi_16B
-/* 30594 */ MCD_OPC_FilterValue, 1, 176, 59, // Skip to: 45878
-/* 30598 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 30601 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30614
-/* 30605 */ MCD_OPC_CheckPredicate, 0, 165, 59, // Skip to: 45878
-/* 30609 */ MCD_OPC_Decode, 238, 15, 166, 1, // Opcode: SSRAvvi_8H
-/* 30614 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 30627
-/* 30618 */ MCD_OPC_CheckPredicate, 0, 152, 59, // Skip to: 45878
-/* 30622 */ MCD_OPC_Decode, 208, 15, 166, 1, // Opcode: SRSRAvvi_8H
-/* 30627 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 30640
-/* 30631 */ MCD_OPC_CheckPredicate, 0, 139, 59, // Skip to: 45878
-/* 30635 */ MCD_OPC_Decode, 133, 13, 167, 1, // Opcode: SHLvvi_8H
-/* 30640 */ MCD_OPC_FilterValue, 3, 130, 59, // Skip to: 45878
-/* 30644 */ MCD_OPC_CheckPredicate, 0, 126, 59, // Skip to: 45878
-/* 30648 */ MCD_OPC_Decode, 250, 14, 167, 1, // Opcode: SQSHLvvi_8H
-/* 30653 */ MCD_OPC_FilterValue, 1, 117, 59, // Skip to: 45878
-/* 30657 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 30660 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30673
-/* 30664 */ MCD_OPC_CheckPredicate, 0, 106, 59, // Skip to: 45878
-/* 30668 */ MCD_OPC_Decode, 236, 15, 168, 1, // Opcode: SSRAvvi_4S
-/* 30673 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 30686
-/* 30677 */ MCD_OPC_CheckPredicate, 0, 93, 59, // Skip to: 45878
-/* 30681 */ MCD_OPC_Decode, 206, 15, 168, 1, // Opcode: SRSRAvvi_4S
-/* 30686 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 30699
-/* 30690 */ MCD_OPC_CheckPredicate, 0, 80, 59, // Skip to: 45878
-/* 30694 */ MCD_OPC_Decode, 131, 13, 169, 1, // Opcode: SHLvvi_4S
-/* 30699 */ MCD_OPC_FilterValue, 3, 71, 59, // Skip to: 45878
-/* 30703 */ MCD_OPC_CheckPredicate, 0, 67, 59, // Skip to: 45878
-/* 30707 */ MCD_OPC_Decode, 248, 14, 169, 1, // Opcode: SQSHLvvi_4S
-/* 30712 */ MCD_OPC_FilterValue, 1, 58, 59, // Skip to: 45878
-/* 30716 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ...
-/* 30719 */ MCD_OPC_FilterValue, 0, 227, 0, // Skip to: 30950
-/* 30723 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 30726 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 30859
-/* 30730 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 30733 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 30826
-/* 30737 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 30740 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 30793
-/* 30744 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 30747 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30760
-/* 30751 */ MCD_OPC_CheckPredicate, 0, 19, 59, // Skip to: 45878
-/* 30755 */ MCD_OPC_Decode, 140, 11, 170, 1, // Opcode: MOVIvi_lsl_8H
-/* 30760 */ MCD_OPC_FilterValue, 1, 10, 59, // Skip to: 45878
-/* 30764 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 30767 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30780
-/* 30771 */ MCD_OPC_CheckPredicate, 0, 255, 58, // Skip to: 45878
-/* 30775 */ MCD_OPC_Decode, 134, 13, 164, 1, // Opcode: SHRNvvi_16B
-/* 30780 */ MCD_OPC_FilterValue, 1, 246, 58, // Skip to: 45878
-/* 30784 */ MCD_OPC_CheckPredicate, 0, 242, 58, // Skip to: 45878
-/* 30788 */ MCD_OPC_Decode, 209, 15, 165, 1, // Opcode: SSHLLvvi_16B
-/* 30793 */ MCD_OPC_FilterValue, 1, 233, 58, // Skip to: 45878
-/* 30797 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 30800 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30813
-/* 30804 */ MCD_OPC_CheckPredicate, 0, 222, 58, // Skip to: 45878
-/* 30808 */ MCD_OPC_Decode, 139, 13, 166, 1, // Opcode: SHRNvvi_8H
-/* 30813 */ MCD_OPC_FilterValue, 1, 213, 58, // Skip to: 45878
-/* 30817 */ MCD_OPC_CheckPredicate, 0, 209, 58, // Skip to: 45878
-/* 30821 */ MCD_OPC_Decode, 214, 15, 167, 1, // Opcode: SSHLLvvi_8H
-/* 30826 */ MCD_OPC_FilterValue, 1, 200, 58, // Skip to: 45878
-/* 30830 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 30833 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30846
-/* 30837 */ MCD_OPC_CheckPredicate, 0, 189, 58, // Skip to: 45878
-/* 30841 */ MCD_OPC_Decode, 137, 13, 168, 1, // Opcode: SHRNvvi_4S
-/* 30846 */ MCD_OPC_FilterValue, 1, 180, 58, // Skip to: 45878
-/* 30850 */ MCD_OPC_CheckPredicate, 0, 176, 58, // Skip to: 45878
-/* 30854 */ MCD_OPC_Decode, 212, 15, 169, 1, // Opcode: SSHLLvvi_4S
-/* 30859 */ MCD_OPC_FilterValue, 1, 167, 58, // Skip to: 45878
-/* 30863 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 30866 */ MCD_OPC_FilterValue, 0, 61, 0, // Skip to: 30931
-/* 30870 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 30873 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 30912
-/* 30877 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 30880 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 30893
-/* 30884 */ MCD_OPC_CheckPredicate, 0, 142, 58, // Skip to: 45878
-/* 30888 */ MCD_OPC_Decode, 201, 11, 171, 1, // Opcode: ORRvi_lsl_8H
-/* 30893 */ MCD_OPC_FilterValue, 1, 133, 58, // Skip to: 45878
-/* 30897 */ MCD_OPC_CheckPredicate, 0, 129, 58, // Skip to: 45878
-/* 30901 */ MCD_OPC_CheckField, 13, 1, 0, 123, 58, // Skip to: 45878
-/* 30907 */ MCD_OPC_Decode, 133, 15, 164, 1, // Opcode: SQSHRNvvi_16B
-/* 30912 */ MCD_OPC_FilterValue, 1, 114, 58, // Skip to: 45878
-/* 30916 */ MCD_OPC_CheckPredicate, 0, 110, 58, // Skip to: 45878
-/* 30920 */ MCD_OPC_CheckField, 13, 1, 0, 104, 58, // Skip to: 45878
-/* 30926 */ MCD_OPC_Decode, 138, 15, 166, 1, // Opcode: SQSHRNvvi_8H
-/* 30931 */ MCD_OPC_FilterValue, 1, 95, 58, // Skip to: 45878
-/* 30935 */ MCD_OPC_CheckPredicate, 0, 91, 58, // Skip to: 45878
-/* 30939 */ MCD_OPC_CheckField, 13, 1, 0, 85, 58, // Skip to: 45878
-/* 30945 */ MCD_OPC_Decode, 136, 15, 168, 1, // Opcode: SQSHRNvvi_4S
-/* 30950 */ MCD_OPC_FilterValue, 1, 76, 58, // Skip to: 45878
-/* 30954 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 30957 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 30976
-/* 30961 */ MCD_OPC_CheckPredicate, 0, 65, 58, // Skip to: 45878
-/* 30965 */ MCD_OPC_CheckField, 19, 3, 0, 59, 58, // Skip to: 45878
-/* 30971 */ MCD_OPC_Decode, 142, 11, 172, 1, // Opcode: MOVIvi_msl_4S
-/* 30976 */ MCD_OPC_FilterValue, 1, 50, 58, // Skip to: 45878
-/* 30980 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 30983 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 31022
-/* 30987 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 30990 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 31009
-/* 30994 */ MCD_OPC_CheckPredicate, 0, 32, 58, // Skip to: 45878
-/* 30998 */ MCD_OPC_CheckField, 19, 2, 0, 26, 58, // Skip to: 45878
-/* 31004 */ MCD_OPC_Decode, 134, 11, 173, 1, // Opcode: MOVIvi_16B
-/* 31009 */ MCD_OPC_FilterValue, 1, 17, 58, // Skip to: 45878
-/* 31013 */ MCD_OPC_CheckPredicate, 0, 13, 58, // Skip to: 45878
-/* 31017 */ MCD_OPC_Decode, 199, 21, 162, 1, // Opcode: VCVTxs2f_4S
-/* 31022 */ MCD_OPC_FilterValue, 1, 4, 58, // Skip to: 45878
-/* 31026 */ MCD_OPC_CheckPredicate, 0, 0, 58, // Skip to: 45878
-/* 31030 */ MCD_OPC_CheckField, 19, 3, 0, 250, 57, // Skip to: 45878
-/* 31036 */ MCD_OPC_Decode, 233, 5, 173, 1, // Opcode: FMOVvi_4S
-/* 31041 */ MCD_OPC_FilterValue, 3, 241, 57, // Skip to: 45878
-/* 31045 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 31048 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 31107
-/* 31052 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 31055 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 31094
-/* 31059 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 31062 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 31081
-/* 31066 */ MCD_OPC_CheckPredicate, 0, 216, 57, // Skip to: 45878
-/* 31070 */ MCD_OPC_CheckField, 19, 1, 1, 210, 57, // Skip to: 45878
-/* 31076 */ MCD_OPC_Decode, 140, 12, 164, 1, // Opcode: RSHRNvvi_16B
-/* 31081 */ MCD_OPC_FilterValue, 1, 201, 57, // Skip to: 45878
-/* 31085 */ MCD_OPC_CheckPredicate, 0, 197, 57, // Skip to: 45878
-/* 31089 */ MCD_OPC_Decode, 145, 12, 166, 1, // Opcode: RSHRNvvi_8H
-/* 31094 */ MCD_OPC_FilterValue, 1, 188, 57, // Skip to: 45878
-/* 31098 */ MCD_OPC_CheckPredicate, 0, 184, 57, // Skip to: 45878
-/* 31102 */ MCD_OPC_Decode, 143, 12, 168, 1, // Opcode: RSHRNvvi_4S
-/* 31107 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 31166
-/* 31111 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 31114 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 31153
-/* 31118 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 31121 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 31140
-/* 31125 */ MCD_OPC_CheckPredicate, 0, 157, 57, // Skip to: 45878
-/* 31129 */ MCD_OPC_CheckField, 19, 1, 1, 151, 57, // Skip to: 45878
-/* 31135 */ MCD_OPC_Decode, 216, 14, 164, 1, // Opcode: SQRSHRNvvi_16B
-/* 31140 */ MCD_OPC_FilterValue, 1, 142, 57, // Skip to: 45878
-/* 31144 */ MCD_OPC_CheckPredicate, 0, 138, 57, // Skip to: 45878
-/* 31148 */ MCD_OPC_Decode, 221, 14, 166, 1, // Opcode: SQRSHRNvvi_8H
-/* 31153 */ MCD_OPC_FilterValue, 1, 129, 57, // Skip to: 45878
-/* 31157 */ MCD_OPC_CheckPredicate, 0, 125, 57, // Skip to: 45878
-/* 31161 */ MCD_OPC_Decode, 219, 14, 168, 1, // Opcode: SQRSHRNvvi_4S
-/* 31166 */ MCD_OPC_FilterValue, 15, 116, 57, // Skip to: 45878
-/* 31170 */ MCD_OPC_CheckPredicate, 0, 112, 57, // Skip to: 45878
-/* 31174 */ MCD_OPC_CheckField, 21, 1, 1, 106, 57, // Skip to: 45878
-/* 31180 */ MCD_OPC_Decode, 193, 21, 162, 1, // Opcode: VCVTf2xs_4S
-/* 31185 */ MCD_OPC_FilterValue, 3, 97, 57, // Skip to: 45878
-/* 31189 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 31192 */ MCD_OPC_FilterValue, 1, 249, 2, // Skip to: 31957
-/* 31196 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 31199 */ MCD_OPC_FilterValue, 0, 169, 1, // Skip to: 31628
-/* 31203 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 31206 */ MCD_OPC_FilterValue, 0, 207, 0, // Skip to: 31417
-/* 31210 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 31213 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 31358
-/* 31217 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 31220 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 31299
-/* 31224 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 31227 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31240
-/* 31231 */ MCD_OPC_CheckPredicate, 0, 51, 57, // Skip to: 45878
-/* 31235 */ MCD_OPC_Decode, 166, 11, 159, 1, // Opcode: MVNIvi_lsl_4S
-/* 31240 */ MCD_OPC_FilterValue, 1, 42, 57, // Skip to: 45878
-/* 31244 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 31247 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31260
-/* 31251 */ MCD_OPC_CheckPredicate, 0, 31, 57, // Skip to: 45878
-/* 31255 */ MCD_OPC_Decode, 135, 21, 160, 1, // Opcode: USHRvvi_16B
-/* 31260 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 31273
-/* 31264 */ MCD_OPC_CheckPredicate, 0, 18, 57, // Skip to: 45878
-/* 31268 */ MCD_OPC_Decode, 231, 20, 160, 1, // Opcode: URSHRvvi_16B
-/* 31273 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 31286
-/* 31277 */ MCD_OPC_CheckPredicate, 0, 5, 57, // Skip to: 45878
-/* 31281 */ MCD_OPC_Decode, 178, 15, 164, 1, // Opcode: SRIvvi_16B
-/* 31286 */ MCD_OPC_FilterValue, 3, 252, 56, // Skip to: 45878
-/* 31290 */ MCD_OPC_CheckPredicate, 0, 248, 56, // Skip to: 45878
-/* 31294 */ MCD_OPC_Decode, 229, 14, 165, 1, // Opcode: SQSHLUvvi_16B
-/* 31299 */ MCD_OPC_FilterValue, 1, 239, 56, // Skip to: 45878
-/* 31303 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 31306 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31319
-/* 31310 */ MCD_OPC_CheckPredicate, 0, 228, 56, // Skip to: 45878
-/* 31314 */ MCD_OPC_Decode, 141, 21, 161, 1, // Opcode: USHRvvi_8H
-/* 31319 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 31332
-/* 31323 */ MCD_OPC_CheckPredicate, 0, 215, 56, // Skip to: 45878
-/* 31327 */ MCD_OPC_Decode, 237, 20, 161, 1, // Opcode: URSHRvvi_8H
-/* 31332 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 31345
-/* 31336 */ MCD_OPC_CheckPredicate, 0, 202, 56, // Skip to: 45878
-/* 31340 */ MCD_OPC_Decode, 184, 15, 166, 1, // Opcode: SRIvvi_8H
-/* 31345 */ MCD_OPC_FilterValue, 3, 193, 56, // Skip to: 45878
-/* 31349 */ MCD_OPC_CheckPredicate, 0, 189, 56, // Skip to: 45878
-/* 31353 */ MCD_OPC_Decode, 235, 14, 167, 1, // Opcode: SQSHLUvvi_8H
-/* 31358 */ MCD_OPC_FilterValue, 1, 180, 56, // Skip to: 45878
-/* 31362 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 31365 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31378
-/* 31369 */ MCD_OPC_CheckPredicate, 0, 169, 56, // Skip to: 45878
-/* 31373 */ MCD_OPC_Decode, 139, 21, 162, 1, // Opcode: USHRvvi_4S
-/* 31378 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 31391
-/* 31382 */ MCD_OPC_CheckPredicate, 0, 156, 56, // Skip to: 45878
-/* 31386 */ MCD_OPC_Decode, 235, 20, 162, 1, // Opcode: URSHRvvi_4S
-/* 31391 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 31404
-/* 31395 */ MCD_OPC_CheckPredicate, 0, 143, 56, // Skip to: 45878
-/* 31399 */ MCD_OPC_Decode, 182, 15, 168, 1, // Opcode: SRIvvi_4S
-/* 31404 */ MCD_OPC_FilterValue, 3, 134, 56, // Skip to: 45878
-/* 31408 */ MCD_OPC_CheckPredicate, 0, 130, 56, // Skip to: 45878
-/* 31412 */ MCD_OPC_Decode, 233, 14, 169, 1, // Opcode: SQSHLUvvi_4S
-/* 31417 */ MCD_OPC_FilterValue, 1, 121, 56, // Skip to: 45878
-/* 31421 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 31424 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 31569
-/* 31428 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 31431 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 31510
-/* 31435 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 31438 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31451
-/* 31442 */ MCD_OPC_CheckPredicate, 0, 96, 56, // Skip to: 45878
-/* 31446 */ MCD_OPC_Decode, 213, 1, 163, 1, // Opcode: BICvi_lsl_4S
-/* 31451 */ MCD_OPC_FilterValue, 1, 87, 56, // Skip to: 45878
-/* 31455 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 31458 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31471
-/* 31462 */ MCD_OPC_CheckPredicate, 0, 76, 56, // Skip to: 45878
-/* 31466 */ MCD_OPC_Decode, 154, 21, 164, 1, // Opcode: USRAvvi_16B
-/* 31471 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 31484
-/* 31475 */ MCD_OPC_CheckPredicate, 0, 63, 56, // Skip to: 45878
-/* 31479 */ MCD_OPC_Decode, 241, 20, 164, 1, // Opcode: URSRAvvi_16B
-/* 31484 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 31497
-/* 31488 */ MCD_OPC_CheckPredicate, 0, 50, 56, // Skip to: 45878
-/* 31492 */ MCD_OPC_Decode, 147, 13, 174, 1, // Opcode: SLIvvi_16B
-/* 31497 */ MCD_OPC_FilterValue, 3, 41, 56, // Skip to: 45878
-/* 31501 */ MCD_OPC_CheckPredicate, 0, 37, 56, // Skip to: 45878
-/* 31505 */ MCD_OPC_Decode, 171, 20, 165, 1, // Opcode: UQSHLvvi_16B
-/* 31510 */ MCD_OPC_FilterValue, 1, 28, 56, // Skip to: 45878
-/* 31514 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 31517 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31530
-/* 31521 */ MCD_OPC_CheckPredicate, 0, 17, 56, // Skip to: 45878
-/* 31525 */ MCD_OPC_Decode, 160, 21, 166, 1, // Opcode: USRAvvi_8H
-/* 31530 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 31543
-/* 31534 */ MCD_OPC_CheckPredicate, 0, 4, 56, // Skip to: 45878
-/* 31538 */ MCD_OPC_Decode, 247, 20, 166, 1, // Opcode: URSRAvvi_8H
-/* 31543 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 31556
-/* 31547 */ MCD_OPC_CheckPredicate, 0, 247, 55, // Skip to: 45878
-/* 31551 */ MCD_OPC_Decode, 153, 13, 175, 1, // Opcode: SLIvvi_8H
-/* 31556 */ MCD_OPC_FilterValue, 3, 238, 55, // Skip to: 45878
-/* 31560 */ MCD_OPC_CheckPredicate, 0, 234, 55, // Skip to: 45878
-/* 31564 */ MCD_OPC_Decode, 177, 20, 167, 1, // Opcode: UQSHLvvi_8H
-/* 31569 */ MCD_OPC_FilterValue, 1, 225, 55, // Skip to: 45878
-/* 31573 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
-/* 31576 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31589
-/* 31580 */ MCD_OPC_CheckPredicate, 0, 214, 55, // Skip to: 45878
-/* 31584 */ MCD_OPC_Decode, 158, 21, 168, 1, // Opcode: USRAvvi_4S
-/* 31589 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 31602
-/* 31593 */ MCD_OPC_CheckPredicate, 0, 201, 55, // Skip to: 45878
-/* 31597 */ MCD_OPC_Decode, 245, 20, 168, 1, // Opcode: URSRAvvi_4S
-/* 31602 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 31615
-/* 31606 */ MCD_OPC_CheckPredicate, 0, 188, 55, // Skip to: 45878
-/* 31610 */ MCD_OPC_Decode, 151, 13, 176, 1, // Opcode: SLIvvi_4S
-/* 31615 */ MCD_OPC_FilterValue, 3, 179, 55, // Skip to: 45878
-/* 31619 */ MCD_OPC_CheckPredicate, 0, 175, 55, // Skip to: 45878
-/* 31623 */ MCD_OPC_Decode, 175, 20, 169, 1, // Opcode: UQSHLvvi_4S
-/* 31628 */ MCD_OPC_FilterValue, 1, 166, 55, // Skip to: 45878
-/* 31632 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ...
-/* 31635 */ MCD_OPC_FilterValue, 0, 227, 0, // Skip to: 31866
-/* 31639 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 31642 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 31775
-/* 31646 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 31649 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 31742
-/* 31653 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 31656 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 31709
-/* 31660 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 31663 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31676
-/* 31667 */ MCD_OPC_CheckPredicate, 0, 127, 55, // Skip to: 45878
-/* 31671 */ MCD_OPC_Decode, 167, 11, 170, 1, // Opcode: MVNIvi_lsl_8H
-/* 31676 */ MCD_OPC_FilterValue, 1, 118, 55, // Skip to: 45878
-/* 31680 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 31683 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31696
-/* 31687 */ MCD_OPC_CheckPredicate, 0, 107, 55, // Skip to: 45878
-/* 31691 */ MCD_OPC_Decode, 231, 11, 164, 1, // Opcode: QSHRUNvvi_16B
-/* 31696 */ MCD_OPC_FilterValue, 1, 98, 55, // Skip to: 45878
-/* 31700 */ MCD_OPC_CheckPredicate, 0, 94, 55, // Skip to: 45878
-/* 31704 */ MCD_OPC_Decode, 248, 20, 165, 1, // Opcode: USHLLvvi_16B
-/* 31709 */ MCD_OPC_FilterValue, 1, 85, 55, // Skip to: 45878
-/* 31713 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 31716 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31729
-/* 31720 */ MCD_OPC_CheckPredicate, 0, 74, 55, // Skip to: 45878
-/* 31724 */ MCD_OPC_Decode, 236, 11, 166, 1, // Opcode: QSHRUNvvi_8H
-/* 31729 */ MCD_OPC_FilterValue, 1, 65, 55, // Skip to: 45878
-/* 31733 */ MCD_OPC_CheckPredicate, 0, 61, 55, // Skip to: 45878
-/* 31737 */ MCD_OPC_Decode, 253, 20, 167, 1, // Opcode: USHLLvvi_8H
-/* 31742 */ MCD_OPC_FilterValue, 1, 52, 55, // Skip to: 45878
-/* 31746 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 31749 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31762
-/* 31753 */ MCD_OPC_CheckPredicate, 0, 41, 55, // Skip to: 45878
-/* 31757 */ MCD_OPC_Decode, 234, 11, 168, 1, // Opcode: QSHRUNvvi_4S
-/* 31762 */ MCD_OPC_FilterValue, 1, 32, 55, // Skip to: 45878
-/* 31766 */ MCD_OPC_CheckPredicate, 0, 28, 55, // Skip to: 45878
-/* 31770 */ MCD_OPC_Decode, 251, 20, 169, 1, // Opcode: USHLLvvi_4S
-/* 31775 */ MCD_OPC_FilterValue, 1, 19, 55, // Skip to: 45878
-/* 31779 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 31782 */ MCD_OPC_FilterValue, 0, 61, 0, // Skip to: 31847
-/* 31786 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 31789 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 31828
-/* 31793 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
-/* 31796 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 31809
-/* 31800 */ MCD_OPC_CheckPredicate, 0, 250, 54, // Skip to: 45878
-/* 31804 */ MCD_OPC_Decode, 214, 1, 171, 1, // Opcode: BICvi_lsl_8H
-/* 31809 */ MCD_OPC_FilterValue, 1, 241, 54, // Skip to: 45878
-/* 31813 */ MCD_OPC_CheckPredicate, 0, 237, 54, // Skip to: 45878
-/* 31817 */ MCD_OPC_CheckField, 13, 1, 0, 231, 54, // Skip to: 45878
-/* 31823 */ MCD_OPC_Decode, 188, 20, 164, 1, // Opcode: UQSHRNvvi_16B
-/* 31828 */ MCD_OPC_FilterValue, 1, 222, 54, // Skip to: 45878
-/* 31832 */ MCD_OPC_CheckPredicate, 0, 218, 54, // Skip to: 45878
-/* 31836 */ MCD_OPC_CheckField, 13, 1, 0, 212, 54, // Skip to: 45878
-/* 31842 */ MCD_OPC_Decode, 193, 20, 166, 1, // Opcode: UQSHRNvvi_8H
-/* 31847 */ MCD_OPC_FilterValue, 1, 203, 54, // Skip to: 45878
-/* 31851 */ MCD_OPC_CheckPredicate, 0, 199, 54, // Skip to: 45878
-/* 31855 */ MCD_OPC_CheckField, 13, 1, 0, 193, 54, // Skip to: 45878
-/* 31861 */ MCD_OPC_Decode, 191, 20, 168, 1, // Opcode: UQSHRNvvi_4S
-/* 31866 */ MCD_OPC_FilterValue, 1, 184, 54, // Skip to: 45878
-/* 31870 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 31873 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 31892
-/* 31877 */ MCD_OPC_CheckPredicate, 0, 173, 54, // Skip to: 45878
-/* 31881 */ MCD_OPC_CheckField, 19, 3, 0, 167, 54, // Skip to: 45878
-/* 31887 */ MCD_OPC_Decode, 169, 11, 172, 1, // Opcode: MVNIvi_msl_4S
-/* 31892 */ MCD_OPC_FilterValue, 1, 158, 54, // Skip to: 45878
-/* 31896 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 31899 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 31938
-/* 31903 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 31906 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 31925
-/* 31910 */ MCD_OPC_CheckPredicate, 0, 140, 54, // Skip to: 45878
-/* 31914 */ MCD_OPC_CheckField, 19, 2, 0, 134, 54, // Skip to: 45878
-/* 31920 */ MCD_OPC_Decode, 135, 11, 173, 1, // Opcode: MOVIvi_2D
-/* 31925 */ MCD_OPC_FilterValue, 1, 125, 54, // Skip to: 45878
-/* 31929 */ MCD_OPC_CheckPredicate, 0, 121, 54, // Skip to: 45878
-/* 31933 */ MCD_OPC_Decode, 202, 21, 162, 1, // Opcode: VCVTxu2f_4S
-/* 31938 */ MCD_OPC_FilterValue, 1, 112, 54, // Skip to: 45878
-/* 31942 */ MCD_OPC_CheckPredicate, 0, 108, 54, // Skip to: 45878
-/* 31946 */ MCD_OPC_CheckField, 19, 3, 0, 102, 54, // Skip to: 45878
-/* 31952 */ MCD_OPC_Decode, 231, 5, 173, 1, // Opcode: FMOVvi_2D
-/* 31957 */ MCD_OPC_FilterValue, 3, 93, 54, // Skip to: 45878
-/* 31961 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 31964 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 32023
-/* 31968 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 31971 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 32010
-/* 31975 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 31978 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 31997
-/* 31982 */ MCD_OPC_CheckPredicate, 0, 68, 54, // Skip to: 45878
-/* 31986 */ MCD_OPC_CheckField, 19, 1, 1, 62, 54, // Skip to: 45878
-/* 31992 */ MCD_OPC_Decode, 225, 11, 164, 1, // Opcode: QRSHRUNvvi_16B
-/* 31997 */ MCD_OPC_FilterValue, 1, 53, 54, // Skip to: 45878
-/* 32001 */ MCD_OPC_CheckPredicate, 0, 49, 54, // Skip to: 45878
-/* 32005 */ MCD_OPC_Decode, 230, 11, 166, 1, // Opcode: QRSHRUNvvi_8H
-/* 32010 */ MCD_OPC_FilterValue, 1, 40, 54, // Skip to: 45878
-/* 32014 */ MCD_OPC_CheckPredicate, 0, 36, 54, // Skip to: 45878
-/* 32018 */ MCD_OPC_Decode, 228, 11, 168, 1, // Opcode: QRSHRUNvvi_4S
-/* 32023 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 32082
-/* 32027 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 32030 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 32069
-/* 32034 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 32037 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 32056
-/* 32041 */ MCD_OPC_CheckPredicate, 0, 9, 54, // Skip to: 45878
-/* 32045 */ MCD_OPC_CheckField, 19, 1, 1, 3, 54, // Skip to: 45878
-/* 32051 */ MCD_OPC_Decode, 157, 20, 164, 1, // Opcode: UQRSHRNvvi_16B
-/* 32056 */ MCD_OPC_FilterValue, 1, 250, 53, // Skip to: 45878
-/* 32060 */ MCD_OPC_CheckPredicate, 0, 246, 53, // Skip to: 45878
-/* 32064 */ MCD_OPC_Decode, 162, 20, 166, 1, // Opcode: UQRSHRNvvi_8H
-/* 32069 */ MCD_OPC_FilterValue, 1, 237, 53, // Skip to: 45878
-/* 32073 */ MCD_OPC_CheckPredicate, 0, 233, 53, // Skip to: 45878
-/* 32077 */ MCD_OPC_Decode, 160, 20, 168, 1, // Opcode: UQRSHRNvvi_4S
-/* 32082 */ MCD_OPC_FilterValue, 15, 224, 53, // Skip to: 45878
-/* 32086 */ MCD_OPC_CheckPredicate, 0, 220, 53, // Skip to: 45878
-/* 32090 */ MCD_OPC_CheckField, 21, 1, 1, 214, 53, // Skip to: 45878
-/* 32096 */ MCD_OPC_Decode, 196, 21, 162, 1, // Opcode: VCVTf2xu_4S
-/* 32101 */ MCD_OPC_FilterValue, 13, 221, 3, // Skip to: 33094
-/* 32105 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 32108 */ MCD_OPC_FilterValue, 0, 80, 0, // Skip to: 32192
-/* 32112 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32115 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 32134
-/* 32119 */ MCD_OPC_CheckPredicate, 0, 187, 53, // Skip to: 45878
-/* 32123 */ MCD_OPC_CheckField, 10, 1, 0, 181, 53, // Skip to: 45878
-/* 32129 */ MCD_OPC_Decode, 242, 10, 177, 1, // Opcode: MLAvve_4h8h
-/* 32134 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 32153
-/* 32138 */ MCD_OPC_CheckPredicate, 0, 168, 53, // Skip to: 45878
-/* 32142 */ MCD_OPC_CheckField, 10, 2, 1, 162, 53, // Skip to: 45878
-/* 32148 */ MCD_OPC_Decode, 225, 15, 178, 1, // Opcode: SSHRvvi_2D
-/* 32153 */ MCD_OPC_FilterValue, 3, 153, 53, // Skip to: 45878
-/* 32157 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 32160 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 32173
-/* 32164 */ MCD_OPC_CheckPredicate, 0, 142, 53, // Skip to: 45878
-/* 32168 */ MCD_OPC_Decode, 244, 10, 179, 1, // Opcode: MLAvve_8h8h
-/* 32173 */ MCD_OPC_FilterValue, 1, 133, 53, // Skip to: 45878
-/* 32177 */ MCD_OPC_CheckPredicate, 0, 129, 53, // Skip to: 45878
-/* 32181 */ MCD_OPC_CheckField, 11, 1, 0, 123, 53, // Skip to: 45878
-/* 32187 */ MCD_OPC_Decode, 136, 21, 178, 1, // Opcode: USHRvvi_2D
-/* 32192 */ MCD_OPC_FilterValue, 1, 41, 0, // Skip to: 32237
-/* 32196 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32199 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 32218
-/* 32203 */ MCD_OPC_CheckPredicate, 0, 103, 53, // Skip to: 45878
-/* 32207 */ MCD_OPC_CheckField, 10, 2, 1, 97, 53, // Skip to: 45878
-/* 32213 */ MCD_OPC_Decode, 233, 15, 180, 1, // Opcode: SSRAvvi_2D
-/* 32218 */ MCD_OPC_FilterValue, 3, 88, 53, // Skip to: 45878
-/* 32222 */ MCD_OPC_CheckPredicate, 0, 84, 53, // Skip to: 45878
-/* 32226 */ MCD_OPC_CheckField, 10, 2, 1, 78, 53, // Skip to: 45878
-/* 32232 */ MCD_OPC_Decode, 155, 21, 180, 1, // Opcode: USRAvvi_2D
-/* 32237 */ MCD_OPC_FilterValue, 2, 119, 0, // Skip to: 32360
-/* 32241 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32244 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 32263
-/* 32248 */ MCD_OPC_CheckPredicate, 0, 58, 53, // Skip to: 45878
-/* 32252 */ MCD_OPC_CheckField, 10, 1, 0, 52, 53, // Skip to: 45878
-/* 32258 */ MCD_OPC_Decode, 195, 13, 181, 1, // Opcode: SMLALvve_4s4h
-/* 32263 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 32282
-/* 32267 */ MCD_OPC_CheckPredicate, 0, 39, 53, // Skip to: 45878
-/* 32271 */ MCD_OPC_CheckField, 10, 1, 0, 33, 53, // Skip to: 45878
-/* 32277 */ MCD_OPC_Decode, 229, 19, 181, 1, // Opcode: UMLALvve_4s4h
-/* 32282 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 32321
-/* 32286 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 32289 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 32302
-/* 32293 */ MCD_OPC_CheckPredicate, 0, 13, 53, // Skip to: 45878
-/* 32297 */ MCD_OPC_Decode, 196, 13, 179, 1, // Opcode: SMLALvve_4s8h
-/* 32302 */ MCD_OPC_FilterValue, 1, 4, 53, // Skip to: 45878
-/* 32306 */ MCD_OPC_CheckPredicate, 0, 0, 53, // Skip to: 45878
-/* 32310 */ MCD_OPC_CheckField, 11, 1, 0, 250, 52, // Skip to: 45878
-/* 32316 */ MCD_OPC_Decode, 195, 15, 178, 1, // Opcode: SRSHRvvi_2D
-/* 32321 */ MCD_OPC_FilterValue, 3, 241, 52, // Skip to: 45878
-/* 32325 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 32328 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 32341
-/* 32332 */ MCD_OPC_CheckPredicate, 0, 230, 52, // Skip to: 45878
-/* 32336 */ MCD_OPC_Decode, 230, 19, 179, 1, // Opcode: UMLALvve_4s8h
-/* 32341 */ MCD_OPC_FilterValue, 1, 221, 52, // Skip to: 45878
-/* 32345 */ MCD_OPC_CheckPredicate, 0, 217, 52, // Skip to: 45878
-/* 32349 */ MCD_OPC_CheckField, 11, 1, 0, 211, 52, // Skip to: 45878
-/* 32355 */ MCD_OPC_Decode, 232, 20, 178, 1, // Opcode: URSHRvvi_2D
-/* 32360 */ MCD_OPC_FilterValue, 3, 80, 0, // Skip to: 32444
-/* 32364 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32367 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 32386
-/* 32371 */ MCD_OPC_CheckPredicate, 0, 191, 52, // Skip to: 45878
-/* 32375 */ MCD_OPC_CheckField, 10, 1, 0, 185, 52, // Skip to: 45878
-/* 32381 */ MCD_OPC_Decode, 131, 14, 181, 1, // Opcode: SQDMLALvve_4s4h
-/* 32386 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 32425
-/* 32390 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 32393 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 32406
-/* 32397 */ MCD_OPC_CheckPredicate, 0, 165, 52, // Skip to: 45878
-/* 32401 */ MCD_OPC_Decode, 132, 14, 179, 1, // Opcode: SQDMLALvve_4s8h
-/* 32406 */ MCD_OPC_FilterValue, 1, 156, 52, // Skip to: 45878
-/* 32410 */ MCD_OPC_CheckPredicate, 0, 152, 52, // Skip to: 45878
-/* 32414 */ MCD_OPC_CheckField, 11, 1, 0, 146, 52, // Skip to: 45878
-/* 32420 */ MCD_OPC_Decode, 203, 15, 180, 1, // Opcode: SRSRAvvi_2D
-/* 32425 */ MCD_OPC_FilterValue, 3, 137, 52, // Skip to: 45878
-/* 32429 */ MCD_OPC_CheckPredicate, 0, 133, 52, // Skip to: 45878
-/* 32433 */ MCD_OPC_CheckField, 10, 2, 1, 127, 52, // Skip to: 45878
-/* 32439 */ MCD_OPC_Decode, 242, 20, 180, 1, // Opcode: URSRAvvi_2D
-/* 32444 */ MCD_OPC_FilterValue, 4, 61, 0, // Skip to: 32509
-/* 32448 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 32451 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 32484
-/* 32455 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32458 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 32471
-/* 32462 */ MCD_OPC_CheckPredicate, 0, 100, 52, // Skip to: 45878
-/* 32466 */ MCD_OPC_Decode, 252, 10, 177, 1, // Opcode: MLSvve_4h8h
-/* 32471 */ MCD_OPC_FilterValue, 3, 91, 52, // Skip to: 45878
-/* 32475 */ MCD_OPC_CheckPredicate, 0, 87, 52, // Skip to: 45878
-/* 32479 */ MCD_OPC_Decode, 254, 10, 179, 1, // Opcode: MLSvve_8h8h
-/* 32484 */ MCD_OPC_FilterValue, 1, 78, 52, // Skip to: 45878
-/* 32488 */ MCD_OPC_CheckPredicate, 0, 74, 52, // Skip to: 45878
-/* 32492 */ MCD_OPC_CheckField, 29, 3, 3, 68, 52, // Skip to: 45878
-/* 32498 */ MCD_OPC_CheckField, 11, 1, 0, 62, 52, // Skip to: 45878
-/* 32504 */ MCD_OPC_Decode, 179, 15, 180, 1, // Opcode: SRIvvi_2D
-/* 32509 */ MCD_OPC_FilterValue, 5, 41, 0, // Skip to: 32554
-/* 32513 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32516 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 32535
-/* 32520 */ MCD_OPC_CheckPredicate, 0, 42, 52, // Skip to: 45878
-/* 32524 */ MCD_OPC_CheckField, 10, 2, 1, 36, 52, // Skip to: 45878
-/* 32530 */ MCD_OPC_Decode, 128, 13, 182, 1, // Opcode: SHLvvi_2D
-/* 32535 */ MCD_OPC_FilterValue, 3, 27, 52, // Skip to: 45878
-/* 32539 */ MCD_OPC_CheckPredicate, 0, 23, 52, // Skip to: 45878
-/* 32543 */ MCD_OPC_CheckField, 10, 2, 1, 17, 52, // Skip to: 45878
-/* 32549 */ MCD_OPC_Decode, 148, 13, 183, 1, // Opcode: SLIvvi_2D
-/* 32554 */ MCD_OPC_FilterValue, 6, 99, 0, // Skip to: 32657
-/* 32558 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32561 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 32580
-/* 32565 */ MCD_OPC_CheckPredicate, 0, 253, 51, // Skip to: 45878
-/* 32569 */ MCD_OPC_CheckField, 10, 1, 0, 247, 51, // Skip to: 45878
-/* 32575 */ MCD_OPC_Decode, 205, 13, 181, 1, // Opcode: SMLSLvve_4s4h
-/* 32580 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 32599
-/* 32584 */ MCD_OPC_CheckPredicate, 0, 234, 51, // Skip to: 45878
-/* 32588 */ MCD_OPC_CheckField, 10, 1, 0, 228, 51, // Skip to: 45878
-/* 32594 */ MCD_OPC_Decode, 239, 19, 181, 1, // Opcode: UMLSLvve_4s4h
-/* 32599 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 32618
-/* 32603 */ MCD_OPC_CheckPredicate, 0, 215, 51, // Skip to: 45878
-/* 32607 */ MCD_OPC_CheckField, 10, 1, 0, 209, 51, // Skip to: 45878
-/* 32613 */ MCD_OPC_Decode, 206, 13, 179, 1, // Opcode: SMLSLvve_4s8h
-/* 32618 */ MCD_OPC_FilterValue, 3, 200, 51, // Skip to: 45878
-/* 32622 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 32625 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 32638
-/* 32629 */ MCD_OPC_CheckPredicate, 0, 189, 51, // Skip to: 45878
-/* 32633 */ MCD_OPC_Decode, 240, 19, 179, 1, // Opcode: UMLSLvve_4s8h
-/* 32638 */ MCD_OPC_FilterValue, 1, 180, 51, // Skip to: 45878
-/* 32642 */ MCD_OPC_CheckPredicate, 0, 176, 51, // Skip to: 45878
-/* 32646 */ MCD_OPC_CheckField, 11, 1, 0, 170, 51, // Skip to: 45878
-/* 32652 */ MCD_OPC_Decode, 230, 14, 182, 1, // Opcode: SQSHLUvvi_2D
-/* 32657 */ MCD_OPC_FilterValue, 7, 80, 0, // Skip to: 32741
-/* 32661 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32664 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 32683
-/* 32668 */ MCD_OPC_CheckPredicate, 0, 150, 51, // Skip to: 45878
-/* 32672 */ MCD_OPC_CheckField, 10, 1, 0, 144, 51, // Skip to: 45878
-/* 32678 */ MCD_OPC_Decode, 145, 14, 181, 1, // Opcode: SQDMLSLvve_4s4h
-/* 32683 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 32722
-/* 32687 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 32690 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 32703
-/* 32694 */ MCD_OPC_CheckPredicate, 0, 124, 51, // Skip to: 45878
-/* 32698 */ MCD_OPC_Decode, 146, 14, 179, 1, // Opcode: SQDMLSLvve_4s8h
-/* 32703 */ MCD_OPC_FilterValue, 1, 115, 51, // Skip to: 45878
-/* 32707 */ MCD_OPC_CheckPredicate, 0, 111, 51, // Skip to: 45878
-/* 32711 */ MCD_OPC_CheckField, 11, 1, 0, 105, 51, // Skip to: 45878
-/* 32717 */ MCD_OPC_Decode, 245, 14, 182, 1, // Opcode: SQSHLvvi_2D
-/* 32722 */ MCD_OPC_FilterValue, 3, 96, 51, // Skip to: 45878
-/* 32726 */ MCD_OPC_CheckPredicate, 0, 92, 51, // Skip to: 45878
-/* 32730 */ MCD_OPC_CheckField, 10, 2, 1, 86, 51, // Skip to: 45878
-/* 32736 */ MCD_OPC_Decode, 172, 20, 182, 1, // Opcode: UQSHLvvi_2D
-/* 32741 */ MCD_OPC_FilterValue, 8, 41, 0, // Skip to: 32786
-/* 32745 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32748 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 32767
-/* 32752 */ MCD_OPC_CheckPredicate, 0, 66, 51, // Skip to: 45878
-/* 32756 */ MCD_OPC_CheckField, 10, 1, 0, 60, 51, // Skip to: 45878
-/* 32762 */ MCD_OPC_Decode, 155, 11, 184, 1, // Opcode: MULve_4h8h
-/* 32767 */ MCD_OPC_FilterValue, 2, 51, 51, // Skip to: 45878
-/* 32771 */ MCD_OPC_CheckPredicate, 0, 47, 51, // Skip to: 45878
-/* 32775 */ MCD_OPC_CheckField, 10, 1, 0, 41, 51, // Skip to: 45878
-/* 32781 */ MCD_OPC_Decode, 157, 11, 185, 1, // Opcode: MULve_8h8h
-/* 32786 */ MCD_OPC_FilterValue, 10, 79, 0, // Skip to: 32869
-/* 32790 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32793 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 32812
-/* 32797 */ MCD_OPC_CheckPredicate, 0, 21, 51, // Skip to: 45878
-/* 32801 */ MCD_OPC_CheckField, 10, 1, 0, 15, 51, // Skip to: 45878
-/* 32807 */ MCD_OPC_Decode, 222, 13, 186, 1, // Opcode: SMULLve_4s4h
-/* 32812 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 32831
-/* 32816 */ MCD_OPC_CheckPredicate, 0, 2, 51, // Skip to: 45878
-/* 32820 */ MCD_OPC_CheckField, 10, 1, 0, 252, 50, // Skip to: 45878
-/* 32826 */ MCD_OPC_Decode, 255, 19, 186, 1, // Opcode: UMULLve_4s4h
-/* 32831 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 32850
-/* 32835 */ MCD_OPC_CheckPredicate, 0, 239, 50, // Skip to: 45878
-/* 32839 */ MCD_OPC_CheckField, 10, 1, 0, 233, 50, // Skip to: 45878
-/* 32845 */ MCD_OPC_Decode, 223, 13, 185, 1, // Opcode: SMULLve_4s8h
-/* 32850 */ MCD_OPC_FilterValue, 3, 224, 50, // Skip to: 45878
-/* 32854 */ MCD_OPC_CheckPredicate, 0, 220, 50, // Skip to: 45878
-/* 32858 */ MCD_OPC_CheckField, 10, 1, 0, 214, 50, // Skip to: 45878
-/* 32864 */ MCD_OPC_Decode, 128, 20, 185, 1, // Opcode: UMULLve_4s8h
-/* 32869 */ MCD_OPC_FilterValue, 11, 41, 0, // Skip to: 32914
-/* 32873 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32876 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 32895
-/* 32880 */ MCD_OPC_CheckPredicate, 0, 194, 50, // Skip to: 45878
-/* 32884 */ MCD_OPC_CheckField, 10, 1, 0, 188, 50, // Skip to: 45878
-/* 32890 */ MCD_OPC_Decode, 173, 14, 186, 1, // Opcode: SQDMULLve_4s4h
-/* 32895 */ MCD_OPC_FilterValue, 2, 179, 50, // Skip to: 45878
-/* 32899 */ MCD_OPC_CheckPredicate, 0, 175, 50, // Skip to: 45878
-/* 32903 */ MCD_OPC_CheckField, 10, 1, 0, 169, 50, // Skip to: 45878
-/* 32909 */ MCD_OPC_Decode, 174, 14, 185, 1, // Opcode: SQDMULLve_4s8h
-/* 32914 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 32959
-/* 32918 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32921 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 32940
-/* 32925 */ MCD_OPC_CheckPredicate, 0, 149, 50, // Skip to: 45878
-/* 32929 */ MCD_OPC_CheckField, 10, 1, 0, 143, 50, // Skip to: 45878
-/* 32935 */ MCD_OPC_Decode, 156, 14, 184, 1, // Opcode: SQDMULHve_4h8h
-/* 32940 */ MCD_OPC_FilterValue, 2, 134, 50, // Skip to: 45878
-/* 32944 */ MCD_OPC_CheckPredicate, 0, 130, 50, // Skip to: 45878
-/* 32948 */ MCD_OPC_CheckField, 10, 1, 0, 124, 50, // Skip to: 45878
-/* 32954 */ MCD_OPC_Decode, 158, 14, 185, 1, // Opcode: SQDMULHve_8h8h
-/* 32959 */ MCD_OPC_FilterValue, 13, 41, 0, // Skip to: 33004
-/* 32963 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 32966 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 32985
-/* 32970 */ MCD_OPC_CheckPredicate, 0, 104, 50, // Skip to: 45878
-/* 32974 */ MCD_OPC_CheckField, 10, 1, 0, 98, 50, // Skip to: 45878
-/* 32980 */ MCD_OPC_Decode, 195, 14, 184, 1, // Opcode: SQRDMULHve_4h8h
-/* 32985 */ MCD_OPC_FilterValue, 2, 89, 50, // Skip to: 45878
-/* 32989 */ MCD_OPC_CheckPredicate, 0, 85, 50, // Skip to: 45878
-/* 32993 */ MCD_OPC_CheckField, 10, 1, 0, 79, 50, // Skip to: 45878
-/* 32999 */ MCD_OPC_Decode, 197, 14, 185, 1, // Opcode: SQRDMULHve_8h8h
-/* 33004 */ MCD_OPC_FilterValue, 14, 41, 0, // Skip to: 33049
-/* 33008 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33011 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 33030
-/* 33015 */ MCD_OPC_CheckPredicate, 0, 59, 50, // Skip to: 45878
-/* 33019 */ MCD_OPC_CheckField, 10, 2, 1, 53, 50, // Skip to: 45878
-/* 33025 */ MCD_OPC_Decode, 197, 21, 178, 1, // Opcode: VCVTxs2f_2D
-/* 33030 */ MCD_OPC_FilterValue, 3, 44, 50, // Skip to: 45878
-/* 33034 */ MCD_OPC_CheckPredicate, 0, 40, 50, // Skip to: 45878
-/* 33038 */ MCD_OPC_CheckField, 10, 2, 1, 34, 50, // Skip to: 45878
-/* 33044 */ MCD_OPC_Decode, 200, 21, 178, 1, // Opcode: VCVTxu2f_2D
-/* 33049 */ MCD_OPC_FilterValue, 15, 25, 50, // Skip to: 45878
-/* 33053 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33056 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 33075
-/* 33060 */ MCD_OPC_CheckPredicate, 0, 14, 50, // Skip to: 45878
-/* 33064 */ MCD_OPC_CheckField, 10, 2, 3, 8, 50, // Skip to: 45878
-/* 33070 */ MCD_OPC_Decode, 191, 21, 178, 1, // Opcode: VCVTf2xs_2D
-/* 33075 */ MCD_OPC_FilterValue, 3, 255, 49, // Skip to: 45878
-/* 33079 */ MCD_OPC_CheckPredicate, 0, 251, 49, // Skip to: 45878
-/* 33083 */ MCD_OPC_CheckField, 10, 2, 3, 245, 49, // Skip to: 45878
-/* 33089 */ MCD_OPC_Decode, 194, 21, 178, 1, // Opcode: VCVTf2xu_2D
-/* 33094 */ MCD_OPC_FilterValue, 14, 17, 3, // Skip to: 33883
-/* 33098 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 33101 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 33146
-/* 33105 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33108 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 33127
-/* 33112 */ MCD_OPC_CheckPredicate, 0, 218, 49, // Skip to: 45878
-/* 33116 */ MCD_OPC_CheckField, 10, 1, 0, 212, 49, // Skip to: 45878
-/* 33122 */ MCD_OPC_Decode, 241, 10, 187, 1, // Opcode: MLAvve_2s4s
-/* 33127 */ MCD_OPC_FilterValue, 3, 203, 49, // Skip to: 45878
-/* 33131 */ MCD_OPC_CheckPredicate, 0, 199, 49, // Skip to: 45878
-/* 33135 */ MCD_OPC_CheckField, 10, 1, 0, 193, 49, // Skip to: 45878
-/* 33141 */ MCD_OPC_Decode, 243, 10, 188, 1, // Opcode: MLAvve_4s4s
-/* 33146 */ MCD_OPC_FilterValue, 1, 41, 0, // Skip to: 33191
-/* 33150 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33153 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33172
-/* 33157 */ MCD_OPC_CheckPredicate, 0, 173, 49, // Skip to: 45878
-/* 33161 */ MCD_OPC_CheckField, 10, 1, 0, 167, 49, // Skip to: 45878
-/* 33167 */ MCD_OPC_Decode, 212, 5, 187, 1, // Opcode: FMLAvve_2s4s
-/* 33172 */ MCD_OPC_FilterValue, 2, 158, 49, // Skip to: 45878
-/* 33176 */ MCD_OPC_CheckPredicate, 0, 154, 49, // Skip to: 45878
-/* 33180 */ MCD_OPC_CheckField, 10, 1, 0, 148, 49, // Skip to: 45878
-/* 33186 */ MCD_OPC_Decode, 213, 5, 188, 1, // Opcode: FMLAvve_4s4s
-/* 33191 */ MCD_OPC_FilterValue, 2, 79, 0, // Skip to: 33274
-/* 33195 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33198 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33217
-/* 33202 */ MCD_OPC_CheckPredicate, 0, 128, 49, // Skip to: 45878
-/* 33206 */ MCD_OPC_CheckField, 10, 1, 0, 122, 49, // Skip to: 45878
-/* 33212 */ MCD_OPC_Decode, 193, 13, 189, 1, // Opcode: SMLALvve_2d2s
-/* 33217 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 33236
-/* 33221 */ MCD_OPC_CheckPredicate, 0, 109, 49, // Skip to: 45878
-/* 33225 */ MCD_OPC_CheckField, 10, 1, 0, 103, 49, // Skip to: 45878
-/* 33231 */ MCD_OPC_Decode, 227, 19, 189, 1, // Opcode: UMLALvve_2d2s
-/* 33236 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 33255
-/* 33240 */ MCD_OPC_CheckPredicate, 0, 90, 49, // Skip to: 45878
-/* 33244 */ MCD_OPC_CheckField, 10, 1, 0, 84, 49, // Skip to: 45878
-/* 33250 */ MCD_OPC_Decode, 194, 13, 188, 1, // Opcode: SMLALvve_2d4s
-/* 33255 */ MCD_OPC_FilterValue, 3, 75, 49, // Skip to: 45878
-/* 33259 */ MCD_OPC_CheckPredicate, 0, 71, 49, // Skip to: 45878
-/* 33263 */ MCD_OPC_CheckField, 10, 1, 0, 65, 49, // Skip to: 45878
-/* 33269 */ MCD_OPC_Decode, 228, 19, 188, 1, // Opcode: UMLALvve_2d4s
-/* 33274 */ MCD_OPC_FilterValue, 3, 41, 0, // Skip to: 33319
-/* 33278 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33281 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33300
-/* 33285 */ MCD_OPC_CheckPredicate, 0, 45, 49, // Skip to: 45878
-/* 33289 */ MCD_OPC_CheckField, 10, 1, 0, 39, 49, // Skip to: 45878
-/* 33295 */ MCD_OPC_Decode, 129, 14, 189, 1, // Opcode: SQDMLALvve_2d2s
-/* 33300 */ MCD_OPC_FilterValue, 2, 30, 49, // Skip to: 45878
-/* 33304 */ MCD_OPC_CheckPredicate, 0, 26, 49, // Skip to: 45878
-/* 33308 */ MCD_OPC_CheckField, 10, 1, 0, 20, 49, // Skip to: 45878
-/* 33314 */ MCD_OPC_Decode, 130, 14, 188, 1, // Opcode: SQDMLALvve_2d4s
-/* 33319 */ MCD_OPC_FilterValue, 4, 41, 0, // Skip to: 33364
-/* 33323 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33326 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 33345
-/* 33330 */ MCD_OPC_CheckPredicate, 0, 0, 49, // Skip to: 45878
-/* 33334 */ MCD_OPC_CheckField, 10, 1, 0, 250, 48, // Skip to: 45878
-/* 33340 */ MCD_OPC_Decode, 251, 10, 187, 1, // Opcode: MLSvve_2s4s
-/* 33345 */ MCD_OPC_FilterValue, 3, 241, 48, // Skip to: 45878
-/* 33349 */ MCD_OPC_CheckPredicate, 0, 237, 48, // Skip to: 45878
-/* 33353 */ MCD_OPC_CheckField, 10, 1, 0, 231, 48, // Skip to: 45878
-/* 33359 */ MCD_OPC_Decode, 253, 10, 188, 1, // Opcode: MLSvve_4s4s
-/* 33364 */ MCD_OPC_FilterValue, 5, 41, 0, // Skip to: 33409
-/* 33368 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33371 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33390
-/* 33375 */ MCD_OPC_CheckPredicate, 0, 211, 48, // Skip to: 45878
-/* 33379 */ MCD_OPC_CheckField, 10, 1, 0, 205, 48, // Skip to: 45878
-/* 33385 */ MCD_OPC_Decode, 220, 5, 187, 1, // Opcode: FMLSvve_2s4s
-/* 33390 */ MCD_OPC_FilterValue, 2, 196, 48, // Skip to: 45878
-/* 33394 */ MCD_OPC_CheckPredicate, 0, 192, 48, // Skip to: 45878
-/* 33398 */ MCD_OPC_CheckField, 10, 1, 0, 186, 48, // Skip to: 45878
-/* 33404 */ MCD_OPC_Decode, 221, 5, 188, 1, // Opcode: FMLSvve_4s4s
-/* 33409 */ MCD_OPC_FilterValue, 6, 79, 0, // Skip to: 33492
-/* 33413 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33416 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33435
-/* 33420 */ MCD_OPC_CheckPredicate, 0, 166, 48, // Skip to: 45878
-/* 33424 */ MCD_OPC_CheckField, 10, 1, 0, 160, 48, // Skip to: 45878
-/* 33430 */ MCD_OPC_Decode, 203, 13, 189, 1, // Opcode: SMLSLvve_2d2s
-/* 33435 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 33454
-/* 33439 */ MCD_OPC_CheckPredicate, 0, 147, 48, // Skip to: 45878
-/* 33443 */ MCD_OPC_CheckField, 10, 1, 0, 141, 48, // Skip to: 45878
-/* 33449 */ MCD_OPC_Decode, 237, 19, 189, 1, // Opcode: UMLSLvve_2d2s
-/* 33454 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 33473
-/* 33458 */ MCD_OPC_CheckPredicate, 0, 128, 48, // Skip to: 45878
-/* 33462 */ MCD_OPC_CheckField, 10, 1, 0, 122, 48, // Skip to: 45878
-/* 33468 */ MCD_OPC_Decode, 204, 13, 188, 1, // Opcode: SMLSLvve_2d4s
-/* 33473 */ MCD_OPC_FilterValue, 3, 113, 48, // Skip to: 45878
-/* 33477 */ MCD_OPC_CheckPredicate, 0, 109, 48, // Skip to: 45878
-/* 33481 */ MCD_OPC_CheckField, 10, 1, 0, 103, 48, // Skip to: 45878
-/* 33487 */ MCD_OPC_Decode, 238, 19, 188, 1, // Opcode: UMLSLvve_2d4s
-/* 33492 */ MCD_OPC_FilterValue, 7, 41, 0, // Skip to: 33537
-/* 33496 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33499 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33518
-/* 33503 */ MCD_OPC_CheckPredicate, 0, 83, 48, // Skip to: 45878
-/* 33507 */ MCD_OPC_CheckField, 10, 1, 0, 77, 48, // Skip to: 45878
-/* 33513 */ MCD_OPC_Decode, 143, 14, 189, 1, // Opcode: SQDMLSLvve_2d2s
-/* 33518 */ MCD_OPC_FilterValue, 2, 68, 48, // Skip to: 45878
-/* 33522 */ MCD_OPC_CheckPredicate, 0, 64, 48, // Skip to: 45878
-/* 33526 */ MCD_OPC_CheckField, 10, 1, 0, 58, 48, // Skip to: 45878
-/* 33532 */ MCD_OPC_Decode, 144, 14, 188, 1, // Opcode: SQDMLSLvve_2d4s
-/* 33537 */ MCD_OPC_FilterValue, 8, 41, 0, // Skip to: 33582
-/* 33541 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33544 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33563
-/* 33548 */ MCD_OPC_CheckPredicate, 0, 38, 48, // Skip to: 45878
-/* 33552 */ MCD_OPC_CheckField, 10, 1, 0, 32, 48, // Skip to: 45878
-/* 33558 */ MCD_OPC_Decode, 154, 11, 190, 1, // Opcode: MULve_2s4s
-/* 33563 */ MCD_OPC_FilterValue, 2, 23, 48, // Skip to: 45878
-/* 33567 */ MCD_OPC_CheckPredicate, 0, 19, 48, // Skip to: 45878
-/* 33571 */ MCD_OPC_CheckField, 10, 1, 0, 13, 48, // Skip to: 45878
-/* 33577 */ MCD_OPC_Decode, 156, 11, 191, 1, // Opcode: MULve_4s4s
-/* 33582 */ MCD_OPC_FilterValue, 9, 79, 0, // Skip to: 33665
-/* 33586 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33589 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33608
-/* 33593 */ MCD_OPC_CheckPredicate, 0, 249, 47, // Skip to: 45878
-/* 33597 */ MCD_OPC_CheckField, 10, 1, 0, 243, 47, // Skip to: 45878
-/* 33603 */ MCD_OPC_Decode, 255, 5, 190, 1, // Opcode: FMULve_2s4s
-/* 33608 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 33627
-/* 33612 */ MCD_OPC_CheckPredicate, 0, 230, 47, // Skip to: 45878
-/* 33616 */ MCD_OPC_CheckField, 10, 1, 0, 224, 47, // Skip to: 45878
-/* 33622 */ MCD_OPC_Decode, 245, 5, 190, 1, // Opcode: FMULXve_2s4s
-/* 33627 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 33646
-/* 33631 */ MCD_OPC_CheckPredicate, 0, 211, 47, // Skip to: 45878
-/* 33635 */ MCD_OPC_CheckField, 10, 1, 0, 205, 47, // Skip to: 45878
-/* 33641 */ MCD_OPC_Decode, 128, 6, 191, 1, // Opcode: FMULve_4s4s
-/* 33646 */ MCD_OPC_FilterValue, 3, 196, 47, // Skip to: 45878
-/* 33650 */ MCD_OPC_CheckPredicate, 0, 192, 47, // Skip to: 45878
-/* 33654 */ MCD_OPC_CheckField, 10, 1, 0, 186, 47, // Skip to: 45878
-/* 33660 */ MCD_OPC_Decode, 246, 5, 191, 1, // Opcode: FMULXve_4s4s
-/* 33665 */ MCD_OPC_FilterValue, 10, 79, 0, // Skip to: 33748
-/* 33669 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33672 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33691
-/* 33676 */ MCD_OPC_CheckPredicate, 0, 166, 47, // Skip to: 45878
-/* 33680 */ MCD_OPC_CheckField, 10, 1, 0, 160, 47, // Skip to: 45878
-/* 33686 */ MCD_OPC_Decode, 220, 13, 192, 1, // Opcode: SMULLve_2d2s
-/* 33691 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 33710
-/* 33695 */ MCD_OPC_CheckPredicate, 0, 147, 47, // Skip to: 45878
-/* 33699 */ MCD_OPC_CheckField, 10, 1, 0, 141, 47, // Skip to: 45878
-/* 33705 */ MCD_OPC_Decode, 253, 19, 192, 1, // Opcode: UMULLve_2d2s
-/* 33710 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 33729
-/* 33714 */ MCD_OPC_CheckPredicate, 0, 128, 47, // Skip to: 45878
-/* 33718 */ MCD_OPC_CheckField, 10, 1, 0, 122, 47, // Skip to: 45878
-/* 33724 */ MCD_OPC_Decode, 221, 13, 191, 1, // Opcode: SMULLve_2d4s
-/* 33729 */ MCD_OPC_FilterValue, 3, 113, 47, // Skip to: 45878
-/* 33733 */ MCD_OPC_CheckPredicate, 0, 109, 47, // Skip to: 45878
-/* 33737 */ MCD_OPC_CheckField, 10, 1, 0, 103, 47, // Skip to: 45878
-/* 33743 */ MCD_OPC_Decode, 254, 19, 191, 1, // Opcode: UMULLve_2d4s
-/* 33748 */ MCD_OPC_FilterValue, 11, 41, 0, // Skip to: 33793
-/* 33752 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33755 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33774
-/* 33759 */ MCD_OPC_CheckPredicate, 0, 83, 47, // Skip to: 45878
-/* 33763 */ MCD_OPC_CheckField, 10, 1, 0, 77, 47, // Skip to: 45878
-/* 33769 */ MCD_OPC_Decode, 171, 14, 192, 1, // Opcode: SQDMULLve_2d2s
-/* 33774 */ MCD_OPC_FilterValue, 2, 68, 47, // Skip to: 45878
-/* 33778 */ MCD_OPC_CheckPredicate, 0, 64, 47, // Skip to: 45878
-/* 33782 */ MCD_OPC_CheckField, 10, 1, 0, 58, 47, // Skip to: 45878
-/* 33788 */ MCD_OPC_Decode, 172, 14, 191, 1, // Opcode: SQDMULLve_2d4s
-/* 33793 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 33838
-/* 33797 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33800 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33819
-/* 33804 */ MCD_OPC_CheckPredicate, 0, 38, 47, // Skip to: 45878
-/* 33808 */ MCD_OPC_CheckField, 10, 1, 0, 32, 47, // Skip to: 45878
-/* 33814 */ MCD_OPC_Decode, 155, 14, 190, 1, // Opcode: SQDMULHve_2s4s
-/* 33819 */ MCD_OPC_FilterValue, 2, 23, 47, // Skip to: 45878
-/* 33823 */ MCD_OPC_CheckPredicate, 0, 19, 47, // Skip to: 45878
-/* 33827 */ MCD_OPC_CheckField, 10, 1, 0, 13, 47, // Skip to: 45878
-/* 33833 */ MCD_OPC_Decode, 157, 14, 191, 1, // Opcode: SQDMULHve_4s4s
-/* 33838 */ MCD_OPC_FilterValue, 13, 4, 47, // Skip to: 45878
-/* 33842 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33845 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 33864
-/* 33849 */ MCD_OPC_CheckPredicate, 0, 249, 46, // Skip to: 45878
-/* 33853 */ MCD_OPC_CheckField, 10, 1, 0, 243, 46, // Skip to: 45878
-/* 33859 */ MCD_OPC_Decode, 194, 14, 190, 1, // Opcode: SQRDMULHve_2s4s
-/* 33864 */ MCD_OPC_FilterValue, 2, 234, 46, // Skip to: 45878
-/* 33868 */ MCD_OPC_CheckPredicate, 0, 230, 46, // Skip to: 45878
-/* 33872 */ MCD_OPC_CheckField, 10, 1, 0, 224, 46, // Skip to: 45878
-/* 33878 */ MCD_OPC_Decode, 196, 14, 191, 1, // Opcode: SQRDMULHve_4s4s
-/* 33883 */ MCD_OPC_FilterValue, 15, 215, 46, // Skip to: 45878
-/* 33887 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 33890 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 33921
-/* 33894 */ MCD_OPC_CheckPredicate, 0, 204, 46, // Skip to: 45878
-/* 33898 */ MCD_OPC_CheckField, 29, 3, 2, 198, 46, // Skip to: 45878
-/* 33904 */ MCD_OPC_CheckField, 21, 1, 0, 192, 46, // Skip to: 45878
-/* 33910 */ MCD_OPC_CheckField, 10, 1, 0, 186, 46, // Skip to: 45878
-/* 33916 */ MCD_OPC_Decode, 211, 5, 193, 1, // Opcode: FMLAvve_2d2d
-/* 33921 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 33952
-/* 33925 */ MCD_OPC_CheckPredicate, 0, 173, 46, // Skip to: 45878
-/* 33929 */ MCD_OPC_CheckField, 29, 3, 2, 167, 46, // Skip to: 45878
-/* 33935 */ MCD_OPC_CheckField, 21, 1, 0, 161, 46, // Skip to: 45878
-/* 33941 */ MCD_OPC_CheckField, 10, 1, 0, 155, 46, // Skip to: 45878
-/* 33947 */ MCD_OPC_Decode, 219, 5, 193, 1, // Opcode: FMLSvve_2d2d
-/* 33952 */ MCD_OPC_FilterValue, 9, 146, 46, // Skip to: 45878
-/* 33956 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 33959 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 33984
-/* 33963 */ MCD_OPC_CheckPredicate, 0, 135, 46, // Skip to: 45878
-/* 33967 */ MCD_OPC_CheckField, 21, 1, 0, 129, 46, // Skip to: 45878
-/* 33973 */ MCD_OPC_CheckField, 10, 1, 0, 123, 46, // Skip to: 45878
-/* 33979 */ MCD_OPC_Decode, 254, 5, 194, 1, // Opcode: FMULve_2d2d
-/* 33984 */ MCD_OPC_FilterValue, 3, 114, 46, // Skip to: 45878
-/* 33988 */ MCD_OPC_CheckPredicate, 0, 110, 46, // Skip to: 45878
-/* 33992 */ MCD_OPC_CheckField, 21, 1, 0, 104, 46, // Skip to: 45878
-/* 33998 */ MCD_OPC_CheckField, 10, 1, 0, 98, 46, // Skip to: 45878
-/* 34004 */ MCD_OPC_Decode, 244, 5, 194, 1, // Opcode: FMULXve_2d2d
-/* 34009 */ MCD_OPC_FilterValue, 4, 228, 2, // Skip to: 34753
-/* 34013 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
-/* 34016 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 34039
-/* 34020 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 34023 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 34031
-/* 34027 */ MCD_OPC_Decode, 117, 195, 1, // Opcode: ADRxi
-/* 34031 */ MCD_OPC_FilterValue, 1, 67, 46, // Skip to: 45878
-/* 34035 */ MCD_OPC_Decode, 116, 195, 1, // Opcode: ADRPxi
-/* 34039 */ MCD_OPC_FilterValue, 1, 23, 1, // Skip to: 34322
-/* 34043 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 34046 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 34069
-/* 34050 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34053 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 34061
-/* 34057 */ MCD_OPC_Decode, 82, 196, 1, // Opcode: ADDwwi_lsl0_s
-/* 34061 */ MCD_OPC_FilterValue, 1, 37, 46, // Skip to: 45878
-/* 34065 */ MCD_OPC_Decode, 85, 196, 1, // Opcode: ADDwwi_lsl12_s
-/* 34069 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 34112
-/* 34073 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34076 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 34094
-/* 34080 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 34090
-/* 34086 */ MCD_OPC_Decode, 81, 197, 1, // Opcode: ADDwwi_lsl0_cmp
-/* 34090 */ MCD_OPC_Decode, 80, 198, 1, // Opcode: ADDwwi_lsl0_S
-/* 34094 */ MCD_OPC_FilterValue, 1, 4, 46, // Skip to: 45878
-/* 34098 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 34108
-/* 34104 */ MCD_OPC_Decode, 84, 197, 1, // Opcode: ADDwwi_lsl12_cmp
-/* 34108 */ MCD_OPC_Decode, 83, 198, 1, // Opcode: ADDwwi_lsl12_S
-/* 34112 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 34137
-/* 34116 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34119 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34128
-/* 34123 */ MCD_OPC_Decode, 128, 18, 196, 1, // Opcode: SUBwwi_lsl0_s
-/* 34128 */ MCD_OPC_FilterValue, 1, 226, 45, // Skip to: 45878
-/* 34132 */ MCD_OPC_Decode, 131, 18, 196, 1, // Opcode: SUBwwi_lsl12_s
-/* 34137 */ MCD_OPC_FilterValue, 3, 43, 0, // Skip to: 34184
-/* 34141 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34144 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 34164
-/* 34148 */ MCD_OPC_CheckField, 0, 5, 31, 5, 0, // Skip to: 34159
-/* 34154 */ MCD_OPC_Decode, 255, 17, 197, 1, // Opcode: SUBwwi_lsl0_cmp
-/* 34159 */ MCD_OPC_Decode, 254, 17, 198, 1, // Opcode: SUBwwi_lsl0_S
-/* 34164 */ MCD_OPC_FilterValue, 1, 190, 45, // Skip to: 45878
-/* 34168 */ MCD_OPC_CheckField, 0, 5, 31, 5, 0, // Skip to: 34179
-/* 34174 */ MCD_OPC_Decode, 130, 18, 197, 1, // Opcode: SUBwwi_lsl12_cmp
-/* 34179 */ MCD_OPC_Decode, 129, 18, 198, 1, // Opcode: SUBwwi_lsl12_S
-/* 34184 */ MCD_OPC_FilterValue, 4, 19, 0, // Skip to: 34207
-/* 34188 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34191 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 34199
-/* 34195 */ MCD_OPC_Decode, 99, 199, 1, // Opcode: ADDxxi_lsl0_s
-/* 34199 */ MCD_OPC_FilterValue, 1, 155, 45, // Skip to: 45878
-/* 34203 */ MCD_OPC_Decode, 102, 199, 1, // Opcode: ADDxxi_lsl12_s
-/* 34207 */ MCD_OPC_FilterValue, 5, 39, 0, // Skip to: 34250
-/* 34211 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34214 */ MCD_OPC_FilterValue, 0, 14, 0, // Skip to: 34232
-/* 34218 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 34228
-/* 34224 */ MCD_OPC_Decode, 98, 200, 1, // Opcode: ADDxxi_lsl0_cmp
-/* 34228 */ MCD_OPC_Decode, 97, 201, 1, // Opcode: ADDxxi_lsl0_S
-/* 34232 */ MCD_OPC_FilterValue, 1, 122, 45, // Skip to: 45878
-/* 34236 */ MCD_OPC_CheckField, 0, 5, 31, 4, 0, // Skip to: 34246
-/* 34242 */ MCD_OPC_Decode, 101, 200, 1, // Opcode: ADDxxi_lsl12_cmp
-/* 34246 */ MCD_OPC_Decode, 100, 201, 1, // Opcode: ADDxxi_lsl12_S
-/* 34250 */ MCD_OPC_FilterValue, 6, 21, 0, // Skip to: 34275
-/* 34254 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34257 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34266
-/* 34261 */ MCD_OPC_Decode, 145, 18, 199, 1, // Opcode: SUBxxi_lsl0_s
-/* 34266 */ MCD_OPC_FilterValue, 1, 88, 45, // Skip to: 45878
-/* 34270 */ MCD_OPC_Decode, 148, 18, 199, 1, // Opcode: SUBxxi_lsl12_s
-/* 34275 */ MCD_OPC_FilterValue, 7, 79, 45, // Skip to: 45878
-/* 34279 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34282 */ MCD_OPC_FilterValue, 0, 16, 0, // Skip to: 34302
-/* 34286 */ MCD_OPC_CheckField, 0, 5, 31, 5, 0, // Skip to: 34297
-/* 34292 */ MCD_OPC_Decode, 144, 18, 200, 1, // Opcode: SUBxxi_lsl0_cmp
-/* 34297 */ MCD_OPC_Decode, 143, 18, 201, 1, // Opcode: SUBxxi_lsl0_S
-/* 34302 */ MCD_OPC_FilterValue, 1, 52, 45, // Skip to: 45878
-/* 34306 */ MCD_OPC_CheckField, 0, 5, 31, 5, 0, // Skip to: 34317
-/* 34312 */ MCD_OPC_Decode, 147, 18, 200, 1, // Opcode: SUBxxi_lsl12_cmp
-/* 34317 */ MCD_OPC_Decode, 146, 18, 201, 1, // Opcode: SUBxxi_lsl12_S
-/* 34322 */ MCD_OPC_FilterValue, 2, 181, 0, // Skip to: 34507
-/* 34326 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 34329 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 34354
-/* 34333 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
-/* 34336 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34345
-/* 34340 */ MCD_OPC_Decode, 134, 1, 202, 1, // Opcode: ANDwwi
-/* 34345 */ MCD_OPC_FilterValue, 1, 9, 45, // Skip to: 45878
-/* 34349 */ MCD_OPC_Decode, 145, 11, 203, 1, // Opcode: MOVNwii
-/* 34354 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 34369
-/* 34358 */ MCD_OPC_CheckField, 23, 1, 0, 250, 44, // Skip to: 45878
-/* 34364 */ MCD_OPC_Decode, 204, 11, 202, 1, // Opcode: ORRwwi
-/* 34369 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 34394
-/* 34373 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
-/* 34376 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34385
-/* 34380 */ MCD_OPC_Decode, 195, 3, 202, 1, // Opcode: EORwwi
-/* 34385 */ MCD_OPC_FilterValue, 1, 225, 44, // Skip to: 45878
-/* 34389 */ MCD_OPC_Decode, 147, 11, 203, 1, // Opcode: MOVZwii
-/* 34394 */ MCD_OPC_FilterValue, 3, 20, 0, // Skip to: 34418
-/* 34398 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
-/* 34401 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 34409
-/* 34405 */ MCD_OPC_Decode, 122, 204, 1, // Opcode: ANDSwwi
-/* 34409 */ MCD_OPC_FilterValue, 1, 201, 44, // Skip to: 45878
-/* 34413 */ MCD_OPC_Decode, 143, 11, 205, 1, // Opcode: MOVKwii
-/* 34418 */ MCD_OPC_FilterValue, 4, 21, 0, // Skip to: 34443
-/* 34422 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
-/* 34425 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34434
-/* 34429 */ MCD_OPC_Decode, 139, 1, 206, 1, // Opcode: ANDxxi
-/* 34434 */ MCD_OPC_FilterValue, 1, 176, 44, // Skip to: 45878
-/* 34438 */ MCD_OPC_Decode, 146, 11, 207, 1, // Opcode: MOVNxii
-/* 34443 */ MCD_OPC_FilterValue, 5, 11, 0, // Skip to: 34458
-/* 34447 */ MCD_OPC_CheckField, 23, 1, 0, 161, 44, // Skip to: 45878
-/* 34453 */ MCD_OPC_Decode, 209, 11, 206, 1, // Opcode: ORRxxi
-/* 34458 */ MCD_OPC_FilterValue, 6, 21, 0, // Skip to: 34483
-/* 34462 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
-/* 34465 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34474
-/* 34469 */ MCD_OPC_Decode, 200, 3, 206, 1, // Opcode: EORxxi
-/* 34474 */ MCD_OPC_FilterValue, 1, 136, 44, // Skip to: 45878
-/* 34478 */ MCD_OPC_Decode, 148, 11, 207, 1, // Opcode: MOVZxii
-/* 34483 */ MCD_OPC_FilterValue, 7, 127, 44, // Skip to: 45878
-/* 34487 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
-/* 34490 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 34498
-/* 34494 */ MCD_OPC_Decode, 127, 208, 1, // Opcode: ANDSxxi
-/* 34498 */ MCD_OPC_FilterValue, 1, 112, 44, // Skip to: 45878
-/* 34502 */ MCD_OPC_Decode, 144, 11, 209, 1, // Opcode: MOVKxii
-/* 34507 */ MCD_OPC_FilterValue, 3, 103, 44, // Skip to: 45878
-/* 34511 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 34514 */ MCD_OPC_FilterValue, 0, 59, 0, // Skip to: 34577
-/* 34518 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34521 */ MCD_OPC_FilterValue, 0, 37, 0, // Skip to: 34562
-/* 34525 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
-/* 34528 */ MCD_OPC_FilterValue, 7, 5, 0, // Skip to: 34537
-/* 34532 */ MCD_OPC_Decode, 172, 18, 210, 1, // Opcode: SXTBww
-/* 34537 */ MCD_OPC_FilterValue, 15, 5, 0, // Skip to: 34546
-/* 34541 */ MCD_OPC_Decode, 174, 18, 210, 1, // Opcode: SXTHww
-/* 34546 */ MCD_OPC_CheckField, 10, 6, 31, 5, 0, // Skip to: 34557
-/* 34552 */ MCD_OPC_Decode, 146, 1, 211, 1, // Opcode: ASRwwi
-/* 34557 */ MCD_OPC_Decode, 211, 12, 212, 1, // Opcode: SBFMwwii
-/* 34562 */ MCD_OPC_FilterValue, 2, 48, 44, // Skip to: 45878
-/* 34566 */ MCD_OPC_CheckField, 21, 1, 0, 42, 44, // Skip to: 45878
-/* 34572 */ MCD_OPC_Decode, 206, 3, 213, 1, // Opcode: EXTRwwwi
-/* 34577 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 34592
-/* 34581 */ MCD_OPC_CheckField, 22, 2, 0, 27, 44, // Skip to: 45878
-/* 34587 */ MCD_OPC_Decode, 199, 1, 212, 1, // Opcode: BFMwwii
-/* 34592 */ MCD_OPC_FilterValue, 2, 44, 0, // Skip to: 34640
-/* 34596 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34599 */ MCD_OPC_FilterValue, 0, 11, 44, // Skip to: 45878
-/* 34603 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
-/* 34606 */ MCD_OPC_FilterValue, 7, 5, 0, // Skip to: 34615
-/* 34610 */ MCD_OPC_Decode, 173, 21, 210, 1, // Opcode: UXTBww
-/* 34615 */ MCD_OPC_FilterValue, 15, 5, 0, // Skip to: 34624
-/* 34619 */ MCD_OPC_Decode, 175, 21, 210, 1, // Opcode: UXTHww
-/* 34624 */ MCD_OPC_CheckField, 10, 6, 31, 5, 0, // Skip to: 34635
-/* 34630 */ MCD_OPC_Decode, 237, 10, 211, 1, // Opcode: LSRwwi
-/* 34635 */ MCD_OPC_Decode, 156, 19, 212, 1, // Opcode: UBFMwwii
-/* 34640 */ MCD_OPC_FilterValue, 4, 67, 0, // Skip to: 34711
-/* 34644 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34647 */ MCD_OPC_FilterValue, 1, 46, 0, // Skip to: 34697
-/* 34651 */ MCD_OPC_ExtractField, 10, 12, // Inst{21-10} ...
-/* 34654 */ MCD_OPC_FilterValue, 7, 5, 0, // Skip to: 34663
-/* 34658 */ MCD_OPC_Decode, 173, 18, 214, 1, // Opcode: SXTBxw
-/* 34663 */ MCD_OPC_FilterValue, 15, 5, 0, // Skip to: 34672
-/* 34667 */ MCD_OPC_Decode, 175, 18, 214, 1, // Opcode: SXTHxw
-/* 34672 */ MCD_OPC_FilterValue, 31, 5, 0, // Skip to: 34681
-/* 34676 */ MCD_OPC_Decode, 176, 18, 214, 1, // Opcode: SXTWxw
-/* 34681 */ MCD_OPC_CheckField, 10, 6, 63, 5, 0, // Skip to: 34692
-/* 34687 */ MCD_OPC_Decode, 147, 1, 215, 1, // Opcode: ASRxxi
-/* 34692 */ MCD_OPC_Decode, 212, 12, 212, 1, // Opcode: SBFMxxii
-/* 34697 */ MCD_OPC_FilterValue, 3, 169, 43, // Skip to: 45878
-/* 34701 */ MCD_OPC_CheckField, 21, 1, 0, 163, 43, // Skip to: 45878
-/* 34707 */ MCD_OPC_Decode, 207, 3, 11, // Opcode: EXTRxxxi
-/* 34711 */ MCD_OPC_FilterValue, 5, 11, 0, // Skip to: 34726
-/* 34715 */ MCD_OPC_CheckField, 22, 2, 1, 149, 43, // Skip to: 45878
-/* 34721 */ MCD_OPC_Decode, 200, 1, 212, 1, // Opcode: BFMxxii
-/* 34726 */ MCD_OPC_FilterValue, 6, 140, 43, // Skip to: 45878
-/* 34730 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 34733 */ MCD_OPC_FilterValue, 1, 133, 43, // Skip to: 45878
-/* 34737 */ MCD_OPC_CheckField, 10, 6, 63, 5, 0, // Skip to: 34748
-/* 34743 */ MCD_OPC_Decode, 238, 10, 215, 1, // Opcode: LSRxxi
-/* 34748 */ MCD_OPC_Decode, 157, 19, 212, 1, // Opcode: UBFMxxii
-/* 34753 */ MCD_OPC_FilterValue, 5, 35, 2, // Skip to: 35304
-/* 34757 */ MCD_OPC_ExtractField, 29, 2, // Inst{30-29} ...
-/* 34760 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 34785
-/* 34764 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 34767 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34776
-/* 34771 */ MCD_OPC_Decode, 236, 1, 216, 1, // Opcode: Bimm
-/* 34776 */ MCD_OPC_FilterValue, 1, 90, 43, // Skip to: 45878
-/* 34780 */ MCD_OPC_Decode, 230, 1, 216, 1, // Opcode: BLimm
-/* 34785 */ MCD_OPC_FilterValue, 1, 93, 0, // Skip to: 34882
-/* 34789 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
-/* 34792 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 34817
-/* 34796 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 34799 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34808
-/* 34803 */ MCD_OPC_Decode, 239, 1, 217, 1, // Opcode: CBZw
-/* 34808 */ MCD_OPC_FilterValue, 1, 58, 43, // Skip to: 45878
-/* 34812 */ MCD_OPC_Decode, 240, 1, 218, 1, // Opcode: CBZx
-/* 34817 */ MCD_OPC_FilterValue, 1, 21, 0, // Skip to: 34842
-/* 34821 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 34824 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34833
-/* 34828 */ MCD_OPC_Decode, 237, 1, 217, 1, // Opcode: CBNZw
-/* 34833 */ MCD_OPC_FilterValue, 1, 33, 43, // Skip to: 45878
-/* 34837 */ MCD_OPC_Decode, 238, 1, 218, 1, // Opcode: CBNZx
-/* 34842 */ MCD_OPC_FilterValue, 2, 16, 0, // Skip to: 34862
-/* 34846 */ MCD_OPC_CheckField, 31, 1, 0, 5, 0, // Skip to: 34857
-/* 34852 */ MCD_OPC_Decode, 199, 18, 219, 1, // Opcode: TBZwii
-/* 34857 */ MCD_OPC_Decode, 200, 18, 220, 1, // Opcode: TBZxii
-/* 34862 */ MCD_OPC_FilterValue, 3, 4, 43, // Skip to: 45878
-/* 34866 */ MCD_OPC_CheckField, 31, 1, 0, 5, 0, // Skip to: 34877
-/* 34872 */ MCD_OPC_Decode, 189, 18, 219, 1, // Opcode: TBNZwii
-/* 34877 */ MCD_OPC_Decode, 190, 18, 220, 1, // Opcode: TBNZxii
-/* 34882 */ MCD_OPC_FilterValue, 2, 240, 42, // Skip to: 45878
-/* 34886 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
-/* 34889 */ MCD_OPC_FilterValue, 0, 125, 0, // Skip to: 35018
-/* 34893 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 34896 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 34911
-/* 34900 */ MCD_OPC_CheckField, 4, 1, 0, 220, 42, // Skip to: 45878
-/* 34906 */ MCD_OPC_Decode, 235, 1, 221, 1, // Opcode: Bcc
-/* 34911 */ MCD_OPC_FilterValue, 1, 211, 42, // Skip to: 45878
-/* 34915 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ...
-/* 34918 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 34943
-/* 34922 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 34925 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 34934
-/* 34929 */ MCD_OPC_Decode, 231, 1, 222, 1, // Opcode: BRKi
-/* 34934 */ MCD_OPC_FilterValue, 2, 188, 42, // Skip to: 45878
-/* 34938 */ MCD_OPC_Decode, 211, 6, 222, 1, // Opcode: HLTi
-/* 34943 */ MCD_OPC_FilterValue, 1, 21, 0, // Skip to: 34968
-/* 34947 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 34950 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34959
-/* 34954 */ MCD_OPC_Decode, 171, 18, 222, 1, // Opcode: SVCi
-/* 34959 */ MCD_OPC_FilterValue, 5, 163, 42, // Skip to: 45878
-/* 34963 */ MCD_OPC_Decode, 160, 3, 222, 1, // Opcode: DCPS1i
-/* 34968 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 34993
-/* 34972 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 34975 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 34984
-/* 34979 */ MCD_OPC_Decode, 212, 6, 222, 1, // Opcode: HVCi
-/* 34984 */ MCD_OPC_FilterValue, 5, 138, 42, // Skip to: 45878
-/* 34988 */ MCD_OPC_Decode, 161, 3, 222, 1, // Opcode: DCPS2i
-/* 34993 */ MCD_OPC_FilterValue, 3, 129, 42, // Skip to: 45878
-/* 34997 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 35000 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35009
-/* 35004 */ MCD_OPC_Decode, 172, 13, 222, 1, // Opcode: SMCi
-/* 35009 */ MCD_OPC_FilterValue, 5, 113, 42, // Skip to: 45878
-/* 35013 */ MCD_OPC_Decode, 162, 3, 222, 1, // Opcode: DCPS3i
-/* 35018 */ MCD_OPC_FilterValue, 1, 163, 0, // Skip to: 35185
-/* 35022 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 35025 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 35158
-/* 35029 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 35032 */ MCD_OPC_FilterValue, 1, 90, 42, // Skip to: 45878
-/* 35036 */ MCD_OPC_ExtractField, 0, 8, // Inst{7-0} ...
-/* 35039 */ MCD_OPC_FilterValue, 95, 11, 0, // Skip to: 35054
-/* 35043 */ MCD_OPC_CheckField, 12, 9, 51, 53, 0, // Skip to: 35102
-/* 35049 */ MCD_OPC_Decode, 249, 1, 223, 1, // Opcode: CLREXi
-/* 35054 */ MCD_OPC_FilterValue, 159, 1, 11, 0, // Skip to: 35070
-/* 35059 */ MCD_OPC_CheckField, 12, 9, 51, 37, 0, // Skip to: 35102
-/* 35065 */ MCD_OPC_Decode, 166, 3, 224, 1, // Opcode: DSBi
-/* 35070 */ MCD_OPC_FilterValue, 191, 1, 11, 0, // Skip to: 35086
-/* 35075 */ MCD_OPC_CheckField, 12, 9, 51, 21, 0, // Skip to: 35102
-/* 35081 */ MCD_OPC_Decode, 164, 3, 224, 1, // Opcode: DMBi
-/* 35086 */ MCD_OPC_FilterValue, 223, 1, 11, 0, // Skip to: 35102
-/* 35091 */ MCD_OPC_CheckField, 12, 9, 51, 5, 0, // Skip to: 35102
-/* 35097 */ MCD_OPC_Decode, 223, 6, 225, 1, // Opcode: ISBi
-/* 35102 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ...
-/* 35105 */ MCD_OPC_FilterValue, 31, 33, 0, // Skip to: 35142
-/* 35109 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 35112 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 35127
-/* 35116 */ MCD_OPC_CheckField, 16, 5, 3, 20, 0, // Skip to: 35142
-/* 35122 */ MCD_OPC_Decode, 210, 6, 226, 1, // Opcode: HINTi
-/* 35127 */ MCD_OPC_FilterValue, 4, 11, 0, // Skip to: 35142
-/* 35131 */ MCD_OPC_CheckField, 19, 2, 0, 5, 0, // Skip to: 35142
-/* 35137 */ MCD_OPC_Decode, 150, 11, 227, 1, // Opcode: MSRii
-/* 35142 */ MCD_OPC_CheckField, 19, 2, 1, 5, 0, // Skip to: 35153
-/* 35148 */ MCD_OPC_Decode, 178, 18, 228, 1, // Opcode: SYSiccix
-/* 35153 */ MCD_OPC_Decode, 151, 11, 229, 1, // Opcode: MSRix
-/* 35158 */ MCD_OPC_FilterValue, 1, 220, 41, // Skip to: 45878
-/* 35162 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
-/* 35165 */ MCD_OPC_FilterValue, 1, 213, 41, // Skip to: 45878
-/* 35169 */ MCD_OPC_CheckField, 19, 2, 1, 5, 0, // Skip to: 35180
-/* 35175 */ MCD_OPC_Decode, 177, 18, 230, 1, // Opcode: SYSLxicci
-/* 35180 */ MCD_OPC_Decode, 149, 11, 231, 1, // Opcode: MRSxi
-/* 35185 */ MCD_OPC_FilterValue, 2, 193, 41, // Skip to: 45878
-/* 35189 */ MCD_OPC_ExtractField, 10, 14, // Inst{23-10} ...
-/* 35192 */ MCD_OPC_FilterValue, 192, 15, 17, 0, // Skip to: 35214
-/* 35197 */ MCD_OPC_CheckField, 31, 1, 1, 179, 41, // Skip to: 45878
-/* 35203 */ MCD_OPC_CheckField, 0, 5, 0, 173, 41, // Skip to: 45878
-/* 35209 */ MCD_OPC_Decode, 232, 1, 232, 1, // Opcode: BRx
-/* 35214 */ MCD_OPC_FilterValue, 192, 31, 17, 0, // Skip to: 35236
-/* 35219 */ MCD_OPC_CheckField, 31, 1, 1, 157, 41, // Skip to: 45878
-/* 35225 */ MCD_OPC_CheckField, 0, 5, 0, 151, 41, // Skip to: 45878
-/* 35231 */ MCD_OPC_Decode, 229, 1, 232, 1, // Opcode: BLRx
-/* 35236 */ MCD_OPC_FilterValue, 192, 47, 17, 0, // Skip to: 35258
-/* 35241 */ MCD_OPC_CheckField, 31, 1, 1, 135, 41, // Skip to: 45878
-/* 35247 */ MCD_OPC_CheckField, 0, 5, 0, 129, 41, // Skip to: 45878
-/* 35253 */ MCD_OPC_Decode, 248, 11, 232, 1, // Opcode: RETx
-/* 35258 */ MCD_OPC_FilterValue, 192, 79, 18, 0, // Skip to: 35281
-/* 35263 */ MCD_OPC_CheckField, 31, 1, 1, 113, 41, // Skip to: 45878
-/* 35269 */ MCD_OPC_CheckField, 0, 10, 224, 7, 106, 41, // Skip to: 45878
-/* 35276 */ MCD_OPC_Decode, 205, 3, 233, 1, // Opcode: ERET
-/* 35281 */ MCD_OPC_FilterValue, 192, 95, 96, 41, // Skip to: 45878
-/* 35286 */ MCD_OPC_CheckField, 31, 1, 1, 90, 41, // Skip to: 45878
-/* 35292 */ MCD_OPC_CheckField, 0, 10, 224, 7, 83, 41, // Skip to: 45878
-/* 35299 */ MCD_OPC_Decode, 165, 3, 233, 1, // Opcode: DRPS
-/* 35304 */ MCD_OPC_FilterValue, 6, 24, 10, // Skip to: 37892
-/* 35308 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 35311 */ MCD_OPC_FilterValue, 0, 18, 1, // Skip to: 35589
-/* 35315 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
-/* 35318 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35327
-/* 35322 */ MCD_OPC_Decode, 189, 9, 217, 1, // Opcode: LDRw_lit
-/* 35327 */ MCD_OPC_FilterValue, 2, 221, 0, // Skip to: 35552
-/* 35331 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 35334 */ MCD_OPC_FilterValue, 0, 60, 0, // Skip to: 35398
-/* 35338 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 35341 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 35355
-/* 35345 */ MCD_OPC_CheckField, 12, 4, 0, 31, 41, // Skip to: 45878
-/* 35351 */ MCD_OPC_Decode, 29, 234, 1, // Opcode: ADCwww
-/* 35355 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 35364
-/* 35359 */ MCD_OPC_Decode, 152, 3, 235, 1, // Opcode: CSELwwwc
-/* 35364 */ MCD_OPC_FilterValue, 6, 14, 41, // Skip to: 45878
-/* 35368 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 35371 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 35380
-/* 35375 */ MCD_OPC_Decode, 215, 10, 234, 1, // Opcode: LSLVwww
-/* 35380 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 35389
-/* 35384 */ MCD_OPC_Decode, 144, 3, 234, 1, // Opcode: CRC32B_www
-/* 35389 */ MCD_OPC_FilterValue, 5, 245, 40, // Skip to: 45878
-/* 35393 */ MCD_OPC_Decode, 145, 3, 234, 1, // Opcode: CRC32CB_www
-/* 35398 */ MCD_OPC_FilterValue, 1, 46, 0, // Skip to: 35448
-/* 35402 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 35405 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 35414
-/* 35409 */ MCD_OPC_Decode, 154, 3, 235, 1, // Opcode: CSINCwwwc
-/* 35414 */ MCD_OPC_FilterValue, 6, 220, 40, // Skip to: 45878
-/* 35418 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 35421 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 35430
-/* 35425 */ MCD_OPC_Decode, 235, 10, 234, 1, // Opcode: LSRVwww
-/* 35430 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 35439
-/* 35434 */ MCD_OPC_Decode, 149, 3, 234, 1, // Opcode: CRC32H_www
-/* 35439 */ MCD_OPC_FilterValue, 5, 195, 40, // Skip to: 45878
-/* 35443 */ MCD_OPC_Decode, 146, 3, 234, 1, // Opcode: CRC32CH_www
-/* 35448 */ MCD_OPC_FilterValue, 2, 63, 0, // Skip to: 35515
-/* 35452 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 35455 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 35470
-/* 35459 */ MCD_OPC_CheckField, 21, 3, 6, 173, 40, // Skip to: 45878
-/* 35465 */ MCD_OPC_Decode, 175, 19, 234, 1, // Opcode: UDIVwww
-/* 35470 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 35485
-/* 35474 */ MCD_OPC_CheckField, 21, 3, 6, 158, 40, // Skip to: 45878
-/* 35480 */ MCD_OPC_Decode, 144, 1, 234, 1, // Opcode: ASRVwww
-/* 35485 */ MCD_OPC_FilterValue, 4, 11, 0, // Skip to: 35500
-/* 35489 */ MCD_OPC_CheckField, 21, 3, 6, 143, 40, // Skip to: 45878
-/* 35495 */ MCD_OPC_Decode, 150, 3, 234, 1, // Opcode: CRC32W_www
-/* 35500 */ MCD_OPC_FilterValue, 5, 134, 40, // Skip to: 45878
-/* 35504 */ MCD_OPC_CheckField, 21, 3, 6, 128, 40, // Skip to: 45878
-/* 35510 */ MCD_OPC_Decode, 147, 3, 234, 1, // Opcode: CRC32CW_www
-/* 35515 */ MCD_OPC_FilterValue, 3, 119, 40, // Skip to: 45878
-/* 35519 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 35522 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 35537
-/* 35526 */ MCD_OPC_CheckField, 21, 3, 6, 106, 40, // Skip to: 45878
-/* 35532 */ MCD_OPC_Decode, 230, 12, 234, 1, // Opcode: SDIVwww
-/* 35537 */ MCD_OPC_FilterValue, 2, 97, 40, // Skip to: 45878
-/* 35541 */ MCD_OPC_CheckField, 21, 3, 6, 91, 40, // Skip to: 45878
-/* 35547 */ MCD_OPC_Decode, 138, 12, 234, 1, // Opcode: RORVwww
-/* 35552 */ MCD_OPC_FilterValue, 3, 82, 40, // Skip to: 45878
-/* 35556 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 35559 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 35574
-/* 35563 */ MCD_OPC_CheckField, 21, 3, 0, 69, 40, // Skip to: 45878
-/* 35569 */ MCD_OPC_Decode, 239, 10, 236, 1, // Opcode: MADDwwww
-/* 35574 */ MCD_OPC_FilterValue, 1, 60, 40, // Skip to: 45878
-/* 35578 */ MCD_OPC_CheckField, 21, 3, 0, 54, 40, // Skip to: 45878
-/* 35584 */ MCD_OPC_Decode, 152, 11, 236, 1, // Opcode: MSUBwwww
-/* 35589 */ MCD_OPC_FilterValue, 1, 224, 1, // Skip to: 36073
-/* 35593 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
-/* 35596 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 35689
-/* 35600 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 35603 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 35618
-/* 35607 */ MCD_OPC_CheckField, 21, 1, 0, 25, 40, // Skip to: 45878
-/* 35613 */ MCD_OPC_Decode, 252, 9, 237, 1, // Opcode: LS8_STUR
-/* 35618 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 35633
-/* 35622 */ MCD_OPC_CheckField, 21, 1, 0, 10, 40, // Skip to: 45878
-/* 35628 */ MCD_OPC_Decode, 248, 9, 238, 1, // Opcode: LS8_PostInd_STR
-/* 35633 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 35674
-/* 35637 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 35640 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35649
-/* 35644 */ MCD_OPC_Decode, 254, 9, 237, 1, // Opcode: LS8_UnPriv_STR
-/* 35649 */ MCD_OPC_FilterValue, 1, 241, 39, // Skip to: 45878
-/* 35653 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 35656 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35665
-/* 35660 */ MCD_OPC_Decode, 128, 10, 239, 1, // Opcode: LS8_Wm_RegOffset_STR
-/* 35665 */ MCD_OPC_FilterValue, 1, 225, 39, // Skip to: 45878
-/* 35669 */ MCD_OPC_Decode, 130, 10, 240, 1, // Opcode: LS8_Xm_RegOffset_STR
-/* 35674 */ MCD_OPC_FilterValue, 3, 216, 39, // Skip to: 45878
-/* 35678 */ MCD_OPC_CheckField, 21, 1, 0, 210, 39, // Skip to: 45878
-/* 35684 */ MCD_OPC_Decode, 250, 9, 238, 1, // Opcode: LS8_PreInd_STR
-/* 35689 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 35782
-/* 35693 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 35696 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 35711
-/* 35700 */ MCD_OPC_CheckField, 21, 1, 0, 188, 39, // Skip to: 45878
-/* 35706 */ MCD_OPC_Decode, 246, 9, 237, 1, // Opcode: LS8_LDUR
-/* 35711 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 35726
-/* 35715 */ MCD_OPC_CheckField, 21, 1, 0, 173, 39, // Skip to: 45878
-/* 35721 */ MCD_OPC_Decode, 247, 9, 238, 1, // Opcode: LS8_PostInd_LDR
-/* 35726 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 35767
-/* 35730 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 35733 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35742
-/* 35737 */ MCD_OPC_Decode, 253, 9, 237, 1, // Opcode: LS8_UnPriv_LDR
-/* 35742 */ MCD_OPC_FilterValue, 1, 148, 39, // Skip to: 45878
-/* 35746 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 35749 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35758
-/* 35753 */ MCD_OPC_Decode, 255, 9, 239, 1, // Opcode: LS8_Wm_RegOffset_LDR
-/* 35758 */ MCD_OPC_FilterValue, 1, 132, 39, // Skip to: 45878
-/* 35762 */ MCD_OPC_Decode, 129, 10, 240, 1, // Opcode: LS8_Xm_RegOffset_LDR
-/* 35767 */ MCD_OPC_FilterValue, 3, 123, 39, // Skip to: 45878
-/* 35771 */ MCD_OPC_CheckField, 21, 1, 0, 117, 39, // Skip to: 45878
-/* 35777 */ MCD_OPC_Decode, 249, 9, 238, 1, // Opcode: LS8_PreInd_LDR
-/* 35782 */ MCD_OPC_FilterValue, 2, 89, 0, // Skip to: 35875
-/* 35786 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 35789 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 35804
-/* 35793 */ MCD_OPC_CheckField, 21, 1, 0, 95, 39, // Skip to: 45878
-/* 35799 */ MCD_OPC_Decode, 165, 9, 241, 1, // Opcode: LDRSBx_U
-/* 35804 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 35819
-/* 35808 */ MCD_OPC_CheckField, 21, 1, 0, 80, 39, // Skip to: 45878
-/* 35814 */ MCD_OPC_Decode, 163, 9, 238, 1, // Opcode: LDRSBx_PostInd
-/* 35819 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 35860
-/* 35823 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 35826 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35835
-/* 35830 */ MCD_OPC_Decode, 192, 9, 241, 1, // Opcode: LDTRSBx
-/* 35835 */ MCD_OPC_FilterValue, 1, 55, 39, // Skip to: 45878
-/* 35839 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 35842 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35851
-/* 35846 */ MCD_OPC_Decode, 166, 9, 242, 1, // Opcode: LDRSBx_Wm_RegOffset
-/* 35851 */ MCD_OPC_FilterValue, 1, 39, 39, // Skip to: 45878
-/* 35855 */ MCD_OPC_Decode, 167, 9, 243, 1, // Opcode: LDRSBx_Xm_RegOffset
-/* 35860 */ MCD_OPC_FilterValue, 3, 30, 39, // Skip to: 45878
-/* 35864 */ MCD_OPC_CheckField, 21, 1, 0, 24, 39, // Skip to: 45878
-/* 35870 */ MCD_OPC_Decode, 164, 9, 238, 1, // Opcode: LDRSBx_PreInd
-/* 35875 */ MCD_OPC_FilterValue, 3, 89, 0, // Skip to: 35968
-/* 35879 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 35882 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 35897
-/* 35886 */ MCD_OPC_CheckField, 21, 1, 0, 2, 39, // Skip to: 45878
-/* 35892 */ MCD_OPC_Decode, 159, 9, 237, 1, // Opcode: LDRSBw_U
-/* 35897 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 35912
-/* 35901 */ MCD_OPC_CheckField, 21, 1, 0, 243, 38, // Skip to: 45878
-/* 35907 */ MCD_OPC_Decode, 157, 9, 238, 1, // Opcode: LDRSBw_PostInd
-/* 35912 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 35953
-/* 35916 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 35919 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35928
-/* 35923 */ MCD_OPC_Decode, 191, 9, 237, 1, // Opcode: LDTRSBw
-/* 35928 */ MCD_OPC_FilterValue, 1, 218, 38, // Skip to: 45878
-/* 35932 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 35935 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35944
-/* 35939 */ MCD_OPC_Decode, 160, 9, 239, 1, // Opcode: LDRSBw_Wm_RegOffset
-/* 35944 */ MCD_OPC_FilterValue, 1, 202, 38, // Skip to: 45878
-/* 35948 */ MCD_OPC_Decode, 161, 9, 240, 1, // Opcode: LDRSBw_Xm_RegOffset
-/* 35953 */ MCD_OPC_FilterValue, 3, 193, 38, // Skip to: 45878
-/* 35957 */ MCD_OPC_CheckField, 21, 1, 0, 187, 38, // Skip to: 45878
-/* 35963 */ MCD_OPC_Decode, 158, 9, 238, 1, // Opcode: LDRSBw_PreInd
-/* 35968 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 35977
-/* 35972 */ MCD_OPC_Decode, 251, 9, 244, 1, // Opcode: LS8_STR
-/* 35977 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 35986
-/* 35981 */ MCD_OPC_Decode, 245, 9, 244, 1, // Opcode: LS8_LDR
-/* 35986 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 35995
-/* 35990 */ MCD_OPC_Decode, 162, 9, 201, 1, // Opcode: LDRSBx
-/* 35995 */ MCD_OPC_FilterValue, 7, 5, 0, // Skip to: 36004
-/* 35999 */ MCD_OPC_Decode, 156, 9, 244, 1, // Opcode: LDRSBw
-/* 36004 */ MCD_OPC_FilterValue, 8, 16, 0, // Skip to: 36024
-/* 36008 */ MCD_OPC_CheckField, 21, 1, 0, 136, 38, // Skip to: 45878
-/* 36014 */ MCD_OPC_CheckField, 10, 6, 0, 130, 38, // Skip to: 45878
-/* 36020 */ MCD_OPC_Decode, 27, 234, 1, // Opcode: ADCSwww
-/* 36024 */ MCD_OPC_FilterValue, 9, 122, 38, // Skip to: 45878
-/* 36028 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 36031 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 36052
-/* 36035 */ MCD_OPC_CheckField, 21, 1, 0, 109, 38, // Skip to: 45878
-/* 36041 */ MCD_OPC_CheckField, 4, 1, 0, 103, 38, // Skip to: 45878
-/* 36047 */ MCD_OPC_Decode, 242, 1, 245, 1, // Opcode: CCMNww
-/* 36052 */ MCD_OPC_FilterValue, 2, 94, 38, // Skip to: 45878
-/* 36056 */ MCD_OPC_CheckField, 21, 1, 0, 88, 38, // Skip to: 45878
-/* 36062 */ MCD_OPC_CheckField, 4, 1, 0, 82, 38, // Skip to: 45878
-/* 36068 */ MCD_OPC_Decode, 241, 1, 246, 1, // Opcode: CCMNwi
-/* 36073 */ MCD_OPC_FilterValue, 2, 132, 0, // Skip to: 36209
-/* 36077 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
-/* 36080 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36089
-/* 36084 */ MCD_OPC_Decode, 190, 9, 218, 1, // Opcode: LDRx_lit
-/* 36089 */ MCD_OPC_FilterValue, 2, 57, 38, // Skip to: 45878
-/* 36093 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 36096 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 36152
-/* 36100 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 36103 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 36118
-/* 36107 */ MCD_OPC_CheckField, 12, 4, 0, 37, 38, // Skip to: 45878
-/* 36113 */ MCD_OPC_Decode, 207, 12, 234, 1, // Opcode: SBCwww
-/* 36118 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 36127
-/* 36122 */ MCD_OPC_Decode, 156, 3, 235, 1, // Opcode: CSINVwwwc
-/* 36127 */ MCD_OPC_FilterValue, 6, 19, 38, // Skip to: 45878
-/* 36131 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ...
-/* 36134 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36143
-/* 36138 */ MCD_OPC_Decode, 245, 11, 210, 1, // Opcode: RBITww
-/* 36143 */ MCD_OPC_FilterValue, 1, 3, 38, // Skip to: 45878
-/* 36147 */ MCD_OPC_Decode, 136, 2, 210, 1, // Opcode: CLZww
-/* 36152 */ MCD_OPC_FilterValue, 1, 37, 0, // Skip to: 36193
-/* 36156 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 36159 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 36168
-/* 36163 */ MCD_OPC_Decode, 158, 3, 235, 1, // Opcode: CSNEGwwwc
-/* 36168 */ MCD_OPC_FilterValue, 6, 234, 37, // Skip to: 45878
-/* 36172 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ...
-/* 36175 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36184
-/* 36179 */ MCD_OPC_Decode, 251, 11, 210, 1, // Opcode: REV16ww
-/* 36184 */ MCD_OPC_FilterValue, 1, 218, 37, // Skip to: 45878
-/* 36188 */ MCD_OPC_Decode, 128, 2, 210, 1, // Opcode: CLSww
-/* 36193 */ MCD_OPC_FilterValue, 2, 209, 37, // Skip to: 45878
-/* 36197 */ MCD_OPC_CheckField, 12, 12, 128, 24, 202, 37, // Skip to: 45878
-/* 36204 */ MCD_OPC_Decode, 136, 12, 210, 1, // Opcode: REVww
-/* 36209 */ MCD_OPC_FilterValue, 3, 225, 1, // Skip to: 36694
-/* 36213 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
-/* 36216 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 36309
-/* 36220 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 36223 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 36238
-/* 36227 */ MCD_OPC_CheckField, 21, 1, 0, 173, 37, // Skip to: 45878
-/* 36233 */ MCD_OPC_Decode, 210, 9, 237, 1, // Opcode: LS16_STUR
-/* 36238 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 36253
-/* 36242 */ MCD_OPC_CheckField, 21, 1, 0, 158, 37, // Skip to: 45878
-/* 36248 */ MCD_OPC_Decode, 206, 9, 238, 1, // Opcode: LS16_PostInd_STR
-/* 36253 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 36294
-/* 36257 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 36260 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36269
-/* 36264 */ MCD_OPC_Decode, 212, 9, 237, 1, // Opcode: LS16_UnPriv_STR
-/* 36269 */ MCD_OPC_FilterValue, 1, 133, 37, // Skip to: 45878
-/* 36273 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 36276 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36285
-/* 36280 */ MCD_OPC_Decode, 214, 9, 239, 1, // Opcode: LS16_Wm_RegOffset_STR
-/* 36285 */ MCD_OPC_FilterValue, 1, 117, 37, // Skip to: 45878
-/* 36289 */ MCD_OPC_Decode, 216, 9, 240, 1, // Opcode: LS16_Xm_RegOffset_STR
-/* 36294 */ MCD_OPC_FilterValue, 3, 108, 37, // Skip to: 45878
-/* 36298 */ MCD_OPC_CheckField, 21, 1, 0, 102, 37, // Skip to: 45878
-/* 36304 */ MCD_OPC_Decode, 208, 9, 238, 1, // Opcode: LS16_PreInd_STR
-/* 36309 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 36402
-/* 36313 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 36316 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 36331
-/* 36320 */ MCD_OPC_CheckField, 21, 1, 0, 80, 37, // Skip to: 45878
-/* 36326 */ MCD_OPC_Decode, 204, 9, 237, 1, // Opcode: LS16_LDUR
-/* 36331 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 36346
-/* 36335 */ MCD_OPC_CheckField, 21, 1, 0, 65, 37, // Skip to: 45878
-/* 36341 */ MCD_OPC_Decode, 205, 9, 238, 1, // Opcode: LS16_PostInd_LDR
-/* 36346 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 36387
-/* 36350 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 36353 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36362
-/* 36357 */ MCD_OPC_Decode, 211, 9, 237, 1, // Opcode: LS16_UnPriv_LDR
-/* 36362 */ MCD_OPC_FilterValue, 1, 40, 37, // Skip to: 45878
-/* 36366 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 36369 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36378
-/* 36373 */ MCD_OPC_Decode, 213, 9, 239, 1, // Opcode: LS16_Wm_RegOffset_LDR
-/* 36378 */ MCD_OPC_FilterValue, 1, 24, 37, // Skip to: 45878
-/* 36382 */ MCD_OPC_Decode, 215, 9, 240, 1, // Opcode: LS16_Xm_RegOffset_LDR
-/* 36387 */ MCD_OPC_FilterValue, 3, 15, 37, // Skip to: 45878
-/* 36391 */ MCD_OPC_CheckField, 21, 1, 0, 9, 37, // Skip to: 45878
-/* 36397 */ MCD_OPC_Decode, 207, 9, 238, 1, // Opcode: LS16_PreInd_LDR
-/* 36402 */ MCD_OPC_FilterValue, 2, 89, 0, // Skip to: 36495
-/* 36406 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 36409 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 36424
-/* 36413 */ MCD_OPC_CheckField, 21, 1, 0, 243, 36, // Skip to: 45878
-/* 36419 */ MCD_OPC_Decode, 177, 9, 241, 1, // Opcode: LDRSHx_U
-/* 36424 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 36439
-/* 36428 */ MCD_OPC_CheckField, 21, 1, 0, 228, 36, // Skip to: 45878
-/* 36434 */ MCD_OPC_Decode, 175, 9, 238, 1, // Opcode: LDRSHx_PostInd
-/* 36439 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 36480
-/* 36443 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 36446 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36455
-/* 36450 */ MCD_OPC_Decode, 194, 9, 241, 1, // Opcode: LDTRSHx
-/* 36455 */ MCD_OPC_FilterValue, 1, 203, 36, // Skip to: 45878
-/* 36459 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 36462 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36471
-/* 36466 */ MCD_OPC_Decode, 178, 9, 242, 1, // Opcode: LDRSHx_Wm_RegOffset
-/* 36471 */ MCD_OPC_FilterValue, 1, 187, 36, // Skip to: 45878
-/* 36475 */ MCD_OPC_Decode, 179, 9, 243, 1, // Opcode: LDRSHx_Xm_RegOffset
-/* 36480 */ MCD_OPC_FilterValue, 3, 178, 36, // Skip to: 45878
-/* 36484 */ MCD_OPC_CheckField, 21, 1, 0, 172, 36, // Skip to: 45878
-/* 36490 */ MCD_OPC_Decode, 176, 9, 238, 1, // Opcode: LDRSHx_PreInd
-/* 36495 */ MCD_OPC_FilterValue, 3, 89, 0, // Skip to: 36588
-/* 36499 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 36502 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 36517
-/* 36506 */ MCD_OPC_CheckField, 21, 1, 0, 150, 36, // Skip to: 45878
-/* 36512 */ MCD_OPC_Decode, 171, 9, 237, 1, // Opcode: LDRSHw_U
-/* 36517 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 36532
-/* 36521 */ MCD_OPC_CheckField, 21, 1, 0, 135, 36, // Skip to: 45878
-/* 36527 */ MCD_OPC_Decode, 169, 9, 238, 1, // Opcode: LDRSHw_PostInd
-/* 36532 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 36573
-/* 36536 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 36539 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36548
-/* 36543 */ MCD_OPC_Decode, 193, 9, 237, 1, // Opcode: LDTRSHw
-/* 36548 */ MCD_OPC_FilterValue, 1, 110, 36, // Skip to: 45878
-/* 36552 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 36555 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36564
-/* 36559 */ MCD_OPC_Decode, 172, 9, 239, 1, // Opcode: LDRSHw_Wm_RegOffset
-/* 36564 */ MCD_OPC_FilterValue, 1, 94, 36, // Skip to: 45878
-/* 36568 */ MCD_OPC_Decode, 173, 9, 240, 1, // Opcode: LDRSHw_Xm_RegOffset
-/* 36573 */ MCD_OPC_FilterValue, 3, 85, 36, // Skip to: 45878
-/* 36577 */ MCD_OPC_CheckField, 21, 1, 0, 79, 36, // Skip to: 45878
-/* 36583 */ MCD_OPC_Decode, 170, 9, 238, 1, // Opcode: LDRSHw_PreInd
-/* 36588 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 36597
-/* 36592 */ MCD_OPC_Decode, 209, 9, 244, 1, // Opcode: LS16_STR
-/* 36597 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 36606
-/* 36601 */ MCD_OPC_Decode, 203, 9, 244, 1, // Opcode: LS16_LDR
-/* 36606 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 36615
-/* 36610 */ MCD_OPC_Decode, 174, 9, 201, 1, // Opcode: LDRSHx
-/* 36615 */ MCD_OPC_FilterValue, 7, 5, 0, // Skip to: 36624
-/* 36619 */ MCD_OPC_Decode, 168, 9, 244, 1, // Opcode: LDRSHw
-/* 36624 */ MCD_OPC_FilterValue, 8, 17, 0, // Skip to: 36645
-/* 36628 */ MCD_OPC_CheckField, 21, 1, 0, 28, 36, // Skip to: 45878
-/* 36634 */ MCD_OPC_CheckField, 10, 6, 0, 22, 36, // Skip to: 45878
-/* 36640 */ MCD_OPC_Decode, 205, 12, 234, 1, // Opcode: SBCSwww
-/* 36645 */ MCD_OPC_FilterValue, 9, 13, 36, // Skip to: 45878
-/* 36649 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 36652 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 36673
-/* 36656 */ MCD_OPC_CheckField, 21, 1, 0, 0, 36, // Skip to: 45878
-/* 36662 */ MCD_OPC_CheckField, 4, 1, 0, 250, 35, // Skip to: 45878
-/* 36668 */ MCD_OPC_Decode, 246, 1, 245, 1, // Opcode: CCMPww
-/* 36673 */ MCD_OPC_FilterValue, 2, 241, 35, // Skip to: 45878
-/* 36677 */ MCD_OPC_CheckField, 21, 1, 0, 235, 35, // Skip to: 45878
-/* 36683 */ MCD_OPC_CheckField, 4, 1, 0, 229, 35, // Skip to: 45878
-/* 36689 */ MCD_OPC_Decode, 245, 1, 246, 1, // Opcode: CCMPwi
-/* 36694 */ MCD_OPC_FilterValue, 4, 55, 1, // Skip to: 37009
-/* 36698 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
-/* 36701 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36710
-/* 36705 */ MCD_OPC_Decode, 185, 9, 218, 1, // Opcode: LDRSWx_lit
-/* 36710 */ MCD_OPC_FilterValue, 2, 183, 0, // Skip to: 36897
-/* 36714 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 36717 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 36762
-/* 36721 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 36724 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 36738
-/* 36728 */ MCD_OPC_CheckField, 12, 4, 0, 184, 35, // Skip to: 45878
-/* 36734 */ MCD_OPC_Decode, 30, 247, 1, // Opcode: ADCxxx
-/* 36738 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 36747
-/* 36742 */ MCD_OPC_Decode, 153, 3, 248, 1, // Opcode: CSELxxxc
-/* 36747 */ MCD_OPC_FilterValue, 6, 167, 35, // Skip to: 45878
-/* 36751 */ MCD_OPC_CheckField, 12, 4, 2, 161, 35, // Skip to: 45878
-/* 36757 */ MCD_OPC_Decode, 216, 10, 247, 1, // Opcode: LSLVxxx
-/* 36762 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 36793
-/* 36766 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 36769 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 36778
-/* 36773 */ MCD_OPC_Decode, 155, 3, 248, 1, // Opcode: CSINCxxxc
-/* 36778 */ MCD_OPC_FilterValue, 6, 136, 35, // Skip to: 45878
-/* 36782 */ MCD_OPC_CheckField, 12, 4, 2, 130, 35, // Skip to: 45878
-/* 36788 */ MCD_OPC_Decode, 236, 10, 247, 1, // Opcode: LSRVxxx
-/* 36793 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 36830
-/* 36797 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 36800 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 36815
-/* 36804 */ MCD_OPC_CheckField, 21, 3, 6, 108, 35, // Skip to: 45878
-/* 36810 */ MCD_OPC_Decode, 176, 19, 247, 1, // Opcode: UDIVxxx
-/* 36815 */ MCD_OPC_FilterValue, 2, 99, 35, // Skip to: 45878
-/* 36819 */ MCD_OPC_CheckField, 21, 3, 6, 93, 35, // Skip to: 45878
-/* 36825 */ MCD_OPC_Decode, 145, 1, 247, 1, // Opcode: ASRVxxx
-/* 36830 */ MCD_OPC_FilterValue, 3, 84, 35, // Skip to: 45878
-/* 36834 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 36837 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 36852
-/* 36841 */ MCD_OPC_CheckField, 21, 3, 6, 71, 35, // Skip to: 45878
-/* 36847 */ MCD_OPC_Decode, 231, 12, 247, 1, // Opcode: SDIVxxx
-/* 36852 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 36867
-/* 36856 */ MCD_OPC_CheckField, 21, 3, 6, 56, 35, // Skip to: 45878
-/* 36862 */ MCD_OPC_Decode, 139, 12, 247, 1, // Opcode: RORVxxx
-/* 36867 */ MCD_OPC_FilterValue, 4, 11, 0, // Skip to: 36882
-/* 36871 */ MCD_OPC_CheckField, 21, 3, 6, 41, 35, // Skip to: 45878
-/* 36877 */ MCD_OPC_Decode, 151, 3, 249, 1, // Opcode: CRC32X_wwx
-/* 36882 */ MCD_OPC_FilterValue, 5, 32, 35, // Skip to: 45878
-/* 36886 */ MCD_OPC_CheckField, 21, 3, 6, 26, 35, // Skip to: 45878
-/* 36892 */ MCD_OPC_Decode, 148, 3, 249, 1, // Opcode: CRC32CX_wwx
-/* 36897 */ MCD_OPC_FilterValue, 3, 17, 35, // Skip to: 45878
-/* 36901 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 36904 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 36929
-/* 36908 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 36911 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36920
-/* 36915 */ MCD_OPC_Decode, 240, 10, 250, 1, // Opcode: MADDxxxx
-/* 36920 */ MCD_OPC_FilterValue, 1, 250, 34, // Skip to: 45878
-/* 36924 */ MCD_OPC_Decode, 153, 11, 250, 1, // Opcode: MSUBxxxx
-/* 36929 */ MCD_OPC_FilterValue, 1, 21, 0, // Skip to: 36954
-/* 36933 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 36936 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36945
-/* 36940 */ MCD_OPC_Decode, 154, 13, 251, 1, // Opcode: SMADDLxwwx
-/* 36945 */ MCD_OPC_FilterValue, 1, 225, 34, // Skip to: 45878
-/* 36949 */ MCD_OPC_Decode, 215, 13, 251, 1, // Opcode: SMSUBLxwwx
-/* 36954 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 36969
-/* 36958 */ MCD_OPC_CheckField, 15, 1, 0, 210, 34, // Skip to: 45878
-/* 36964 */ MCD_OPC_Decode, 216, 13, 247, 1, // Opcode: SMULHxxx
-/* 36969 */ MCD_OPC_FilterValue, 5, 21, 0, // Skip to: 36994
-/* 36973 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 36976 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 36985
-/* 36980 */ MCD_OPC_Decode, 189, 19, 251, 1, // Opcode: UMADDLxwwx
-/* 36985 */ MCD_OPC_FilterValue, 1, 185, 34, // Skip to: 45878
-/* 36989 */ MCD_OPC_Decode, 248, 19, 251, 1, // Opcode: UMSUBLxwwx
-/* 36994 */ MCD_OPC_FilterValue, 6, 176, 34, // Skip to: 45878
-/* 36998 */ MCD_OPC_CheckField, 15, 1, 0, 170, 34, // Skip to: 45878
-/* 37004 */ MCD_OPC_Decode, 249, 19, 247, 1, // Opcode: UMULHxxx
-/* 37009 */ MCD_OPC_FilterValue, 5, 122, 1, // Skip to: 37391
-/* 37013 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
-/* 37016 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 37109
-/* 37020 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 37023 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37038
-/* 37027 */ MCD_OPC_CheckField, 21, 1, 0, 141, 34, // Skip to: 45878
-/* 37033 */ MCD_OPC_Decode, 224, 9, 237, 1, // Opcode: LS32_STUR
-/* 37038 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 37053
-/* 37042 */ MCD_OPC_CheckField, 21, 1, 0, 126, 34, // Skip to: 45878
-/* 37048 */ MCD_OPC_Decode, 220, 9, 238, 1, // Opcode: LS32_PostInd_STR
-/* 37053 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 37094
-/* 37057 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 37060 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37069
-/* 37064 */ MCD_OPC_Decode, 226, 9, 237, 1, // Opcode: LS32_UnPriv_STR
-/* 37069 */ MCD_OPC_FilterValue, 1, 101, 34, // Skip to: 45878
-/* 37073 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 37076 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37085
-/* 37080 */ MCD_OPC_Decode, 228, 9, 239, 1, // Opcode: LS32_Wm_RegOffset_STR
-/* 37085 */ MCD_OPC_FilterValue, 1, 85, 34, // Skip to: 45878
-/* 37089 */ MCD_OPC_Decode, 230, 9, 240, 1, // Opcode: LS32_Xm_RegOffset_STR
-/* 37094 */ MCD_OPC_FilterValue, 3, 76, 34, // Skip to: 45878
-/* 37098 */ MCD_OPC_CheckField, 21, 1, 0, 70, 34, // Skip to: 45878
-/* 37104 */ MCD_OPC_Decode, 222, 9, 238, 1, // Opcode: LS32_PreInd_STR
-/* 37109 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 37202
-/* 37113 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 37116 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37131
-/* 37120 */ MCD_OPC_CheckField, 21, 1, 0, 48, 34, // Skip to: 45878
-/* 37126 */ MCD_OPC_Decode, 218, 9, 237, 1, // Opcode: LS32_LDUR
-/* 37131 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 37146
-/* 37135 */ MCD_OPC_CheckField, 21, 1, 0, 33, 34, // Skip to: 45878
-/* 37141 */ MCD_OPC_Decode, 219, 9, 238, 1, // Opcode: LS32_PostInd_LDR
-/* 37146 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 37187
-/* 37150 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 37153 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37162
-/* 37157 */ MCD_OPC_Decode, 225, 9, 237, 1, // Opcode: LS32_UnPriv_LDR
-/* 37162 */ MCD_OPC_FilterValue, 1, 8, 34, // Skip to: 45878
-/* 37166 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 37169 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37178
-/* 37173 */ MCD_OPC_Decode, 227, 9, 239, 1, // Opcode: LS32_Wm_RegOffset_LDR
-/* 37178 */ MCD_OPC_FilterValue, 1, 248, 33, // Skip to: 45878
-/* 37182 */ MCD_OPC_Decode, 229, 9, 240, 1, // Opcode: LS32_Xm_RegOffset_LDR
-/* 37187 */ MCD_OPC_FilterValue, 3, 239, 33, // Skip to: 45878
-/* 37191 */ MCD_OPC_CheckField, 21, 1, 0, 233, 33, // Skip to: 45878
-/* 37197 */ MCD_OPC_Decode, 221, 9, 238, 1, // Opcode: LS32_PreInd_LDR
-/* 37202 */ MCD_OPC_FilterValue, 2, 89, 0, // Skip to: 37295
-/* 37206 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 37209 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37224
-/* 37213 */ MCD_OPC_CheckField, 21, 1, 0, 211, 33, // Skip to: 45878
-/* 37219 */ MCD_OPC_Decode, 196, 9, 241, 1, // Opcode: LDURSWx
-/* 37224 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 37239
-/* 37228 */ MCD_OPC_CheckField, 21, 1, 0, 196, 33, // Skip to: 45878
-/* 37234 */ MCD_OPC_Decode, 181, 9, 238, 1, // Opcode: LDRSWx_PostInd
-/* 37239 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 37280
-/* 37243 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 37246 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37255
-/* 37250 */ MCD_OPC_Decode, 195, 9, 241, 1, // Opcode: LDTRSWx
-/* 37255 */ MCD_OPC_FilterValue, 1, 171, 33, // Skip to: 45878
-/* 37259 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 37262 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37271
-/* 37266 */ MCD_OPC_Decode, 183, 9, 242, 1, // Opcode: LDRSWx_Wm_RegOffset
-/* 37271 */ MCD_OPC_FilterValue, 1, 155, 33, // Skip to: 45878
-/* 37275 */ MCD_OPC_Decode, 184, 9, 243, 1, // Opcode: LDRSWx_Xm_RegOffset
-/* 37280 */ MCD_OPC_FilterValue, 3, 146, 33, // Skip to: 45878
-/* 37284 */ MCD_OPC_CheckField, 21, 1, 0, 140, 33, // Skip to: 45878
-/* 37290 */ MCD_OPC_Decode, 182, 9, 238, 1, // Opcode: LDRSWx_PreInd
-/* 37295 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 37304
-/* 37299 */ MCD_OPC_Decode, 223, 9, 244, 1, // Opcode: LS32_STR
-/* 37304 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 37313
-/* 37308 */ MCD_OPC_Decode, 217, 9, 244, 1, // Opcode: LS32_LDR
-/* 37313 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 37322
-/* 37317 */ MCD_OPC_Decode, 180, 9, 201, 1, // Opcode: LDRSWx
-/* 37322 */ MCD_OPC_FilterValue, 8, 16, 0, // Skip to: 37342
-/* 37326 */ MCD_OPC_CheckField, 21, 1, 0, 98, 33, // Skip to: 45878
-/* 37332 */ MCD_OPC_CheckField, 10, 6, 0, 92, 33, // Skip to: 45878
-/* 37338 */ MCD_OPC_Decode, 28, 247, 1, // Opcode: ADCSxxx
-/* 37342 */ MCD_OPC_FilterValue, 9, 84, 33, // Skip to: 45878
-/* 37346 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 37349 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 37370
-/* 37353 */ MCD_OPC_CheckField, 21, 1, 0, 71, 33, // Skip to: 45878
-/* 37359 */ MCD_OPC_CheckField, 4, 1, 0, 65, 33, // Skip to: 45878
-/* 37365 */ MCD_OPC_Decode, 244, 1, 252, 1, // Opcode: CCMNxx
-/* 37370 */ MCD_OPC_FilterValue, 2, 56, 33, // Skip to: 45878
-/* 37374 */ MCD_OPC_CheckField, 21, 1, 0, 50, 33, // Skip to: 45878
-/* 37380 */ MCD_OPC_CheckField, 4, 1, 0, 44, 33, // Skip to: 45878
-/* 37386 */ MCD_OPC_Decode, 243, 1, 253, 1, // Opcode: CCMNxi
-/* 37391 */ MCD_OPC_FilterValue, 6, 148, 0, // Skip to: 37543
-/* 37395 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
-/* 37398 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37407
-/* 37402 */ MCD_OPC_Decode, 223, 11, 254, 1, // Opcode: PRFM_lit
-/* 37407 */ MCD_OPC_FilterValue, 2, 19, 33, // Skip to: 45878
-/* 37411 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 37414 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 37470
-/* 37418 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 37421 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37436
-/* 37425 */ MCD_OPC_CheckField, 12, 4, 0, 255, 32, // Skip to: 45878
-/* 37431 */ MCD_OPC_Decode, 208, 12, 247, 1, // Opcode: SBCxxx
-/* 37436 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 37445
-/* 37440 */ MCD_OPC_Decode, 157, 3, 248, 1, // Opcode: CSINVxxxc
-/* 37445 */ MCD_OPC_FilterValue, 6, 237, 32, // Skip to: 45878
-/* 37449 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ...
-/* 37452 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37461
-/* 37456 */ MCD_OPC_Decode, 246, 11, 255, 1, // Opcode: RBITxx
-/* 37461 */ MCD_OPC_FilterValue, 1, 221, 32, // Skip to: 45878
-/* 37465 */ MCD_OPC_Decode, 137, 2, 255, 1, // Opcode: CLZxx
-/* 37470 */ MCD_OPC_FilterValue, 1, 37, 0, // Skip to: 37511
-/* 37474 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 37477 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 37486
-/* 37481 */ MCD_OPC_Decode, 159, 3, 248, 1, // Opcode: CSNEGxxxc
-/* 37486 */ MCD_OPC_FilterValue, 6, 196, 32, // Skip to: 45878
-/* 37490 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ...
-/* 37493 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37502
-/* 37497 */ MCD_OPC_Decode, 252, 11, 255, 1, // Opcode: REV16xx
-/* 37502 */ MCD_OPC_FilterValue, 1, 180, 32, // Skip to: 45878
-/* 37506 */ MCD_OPC_Decode, 129, 2, 255, 1, // Opcode: CLSxx
-/* 37511 */ MCD_OPC_FilterValue, 2, 12, 0, // Skip to: 37527
-/* 37515 */ MCD_OPC_CheckField, 12, 12, 128, 24, 164, 32, // Skip to: 45878
-/* 37522 */ MCD_OPC_Decode, 129, 12, 255, 1, // Opcode: REV32xx
-/* 37527 */ MCD_OPC_FilterValue, 3, 155, 32, // Skip to: 45878
-/* 37531 */ MCD_OPC_CheckField, 12, 12, 128, 24, 148, 32, // Skip to: 45878
-/* 37538 */ MCD_OPC_Decode, 137, 12, 255, 1, // Opcode: REVxx
-/* 37543 */ MCD_OPC_FilterValue, 7, 139, 32, // Skip to: 45878
-/* 37547 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
-/* 37550 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 37643
-/* 37554 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 37557 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37572
-/* 37561 */ MCD_OPC_CheckField, 21, 1, 0, 119, 32, // Skip to: 45878
-/* 37567 */ MCD_OPC_Decode, 238, 9, 241, 1, // Opcode: LS64_STUR
-/* 37572 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 37587
-/* 37576 */ MCD_OPC_CheckField, 21, 1, 0, 104, 32, // Skip to: 45878
-/* 37582 */ MCD_OPC_Decode, 234, 9, 238, 1, // Opcode: LS64_PostInd_STR
-/* 37587 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 37628
-/* 37591 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 37594 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37603
-/* 37598 */ MCD_OPC_Decode, 240, 9, 241, 1, // Opcode: LS64_UnPriv_STR
-/* 37603 */ MCD_OPC_FilterValue, 1, 79, 32, // Skip to: 45878
-/* 37607 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 37610 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37619
-/* 37614 */ MCD_OPC_Decode, 242, 9, 242, 1, // Opcode: LS64_Wm_RegOffset_STR
-/* 37619 */ MCD_OPC_FilterValue, 1, 63, 32, // Skip to: 45878
-/* 37623 */ MCD_OPC_Decode, 244, 9, 243, 1, // Opcode: LS64_Xm_RegOffset_STR
-/* 37628 */ MCD_OPC_FilterValue, 3, 54, 32, // Skip to: 45878
-/* 37632 */ MCD_OPC_CheckField, 21, 1, 0, 48, 32, // Skip to: 45878
-/* 37638 */ MCD_OPC_Decode, 236, 9, 238, 1, // Opcode: LS64_PreInd_STR
-/* 37643 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 37736
-/* 37647 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 37650 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37665
-/* 37654 */ MCD_OPC_CheckField, 21, 1, 0, 26, 32, // Skip to: 45878
-/* 37660 */ MCD_OPC_Decode, 232, 9, 241, 1, // Opcode: LS64_LDUR
-/* 37665 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 37680
-/* 37669 */ MCD_OPC_CheckField, 21, 1, 0, 11, 32, // Skip to: 45878
-/* 37675 */ MCD_OPC_Decode, 233, 9, 238, 1, // Opcode: LS64_PostInd_LDR
-/* 37680 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 37721
-/* 37684 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 37687 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37696
-/* 37691 */ MCD_OPC_Decode, 239, 9, 241, 1, // Opcode: LS64_UnPriv_LDR
-/* 37696 */ MCD_OPC_FilterValue, 1, 242, 31, // Skip to: 45878
-/* 37700 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 37703 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 37712
-/* 37707 */ MCD_OPC_Decode, 241, 9, 242, 1, // Opcode: LS64_Wm_RegOffset_LDR
-/* 37712 */ MCD_OPC_FilterValue, 1, 226, 31, // Skip to: 45878
-/* 37716 */ MCD_OPC_Decode, 243, 9, 243, 1, // Opcode: LS64_Xm_RegOffset_LDR
-/* 37721 */ MCD_OPC_FilterValue, 3, 217, 31, // Skip to: 45878
-/* 37725 */ MCD_OPC_CheckField, 21, 1, 0, 211, 31, // Skip to: 45878
-/* 37731 */ MCD_OPC_Decode, 235, 9, 238, 1, // Opcode: LS64_PreInd_LDR
-/* 37736 */ MCD_OPC_FilterValue, 2, 55, 0, // Skip to: 37795
-/* 37740 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 37743 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37758
-/* 37747 */ MCD_OPC_CheckField, 21, 1, 0, 189, 31, // Skip to: 45878
-/* 37753 */ MCD_OPC_Decode, 224, 11, 128, 2, // Opcode: PRFUM
-/* 37758 */ MCD_OPC_FilterValue, 2, 180, 31, // Skip to: 45878
-/* 37762 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 37765 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37780
-/* 37769 */ MCD_OPC_CheckField, 21, 1, 1, 167, 31, // Skip to: 45878
-/* 37775 */ MCD_OPC_Decode, 221, 11, 129, 2, // Opcode: PRFM_Wm_RegOffset
-/* 37780 */ MCD_OPC_FilterValue, 1, 158, 31, // Skip to: 45878
-/* 37784 */ MCD_OPC_CheckField, 21, 1, 1, 152, 31, // Skip to: 45878
-/* 37790 */ MCD_OPC_Decode, 222, 11, 130, 2, // Opcode: PRFM_Xm_RegOffset
-/* 37795 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 37804
-/* 37799 */ MCD_OPC_Decode, 237, 9, 201, 1, // Opcode: LS64_STR
-/* 37804 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 37813
-/* 37808 */ MCD_OPC_Decode, 231, 9, 201, 1, // Opcode: LS64_LDR
-/* 37813 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 37822
-/* 37817 */ MCD_OPC_Decode, 220, 11, 131, 2, // Opcode: PRFM
-/* 37822 */ MCD_OPC_FilterValue, 8, 17, 0, // Skip to: 37843
-/* 37826 */ MCD_OPC_CheckField, 21, 1, 0, 110, 31, // Skip to: 45878
-/* 37832 */ MCD_OPC_CheckField, 10, 6, 0, 104, 31, // Skip to: 45878
-/* 37838 */ MCD_OPC_Decode, 206, 12, 247, 1, // Opcode: SBCSxxx
-/* 37843 */ MCD_OPC_FilterValue, 9, 95, 31, // Skip to: 45878
-/* 37847 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 37850 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 37871
-/* 37854 */ MCD_OPC_CheckField, 21, 1, 0, 82, 31, // Skip to: 45878
-/* 37860 */ MCD_OPC_CheckField, 4, 1, 0, 76, 31, // Skip to: 45878
-/* 37866 */ MCD_OPC_Decode, 248, 1, 252, 1, // Opcode: CCMPxx
-/* 37871 */ MCD_OPC_FilterValue, 2, 67, 31, // Skip to: 45878
-/* 37875 */ MCD_OPC_CheckField, 21, 1, 0, 61, 31, // Skip to: 45878
-/* 37881 */ MCD_OPC_CheckField, 4, 1, 0, 55, 31, // Skip to: 45878
-/* 37887 */ MCD_OPC_Decode, 247, 1, 253, 1, // Opcode: CCMPxi
-/* 37892 */ MCD_OPC_FilterValue, 7, 46, 31, // Skip to: 45878
-/* 37896 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
-/* 37899 */ MCD_OPC_FilterValue, 0, 12, 6, // Skip to: 39451
-/* 37903 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
-/* 37906 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 37919
-/* 37910 */ MCD_OPC_CheckPredicate, 1, 28, 31, // Skip to: 45878
-/* 37914 */ MCD_OPC_Decode, 188, 9, 132, 2, // Opcode: LDRs_lit
-/* 37919 */ MCD_OPC_FilterValue, 2, 109, 5, // Skip to: 39312
-/* 37923 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 37926 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 37985
-/* 37930 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 37933 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 37946
-/* 37937 */ MCD_OPC_CheckPredicate, 1, 1, 31, // Skip to: 45878
-/* 37941 */ MCD_OPC_Decode, 227, 12, 133, 2, // Opcode: SCVTFswi
-/* 37946 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 37959
-/* 37950 */ MCD_OPC_CheckPredicate, 1, 244, 30, // Skip to: 45878
-/* 37954 */ MCD_OPC_Decode, 172, 19, 133, 2, // Opcode: UCVTFswi
-/* 37959 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 37972
-/* 37963 */ MCD_OPC_CheckPredicate, 1, 231, 30, // Skip to: 45878
-/* 37967 */ MCD_OPC_Decode, 132, 5, 134, 2, // Opcode: FCVTZSwsi
-/* 37972 */ MCD_OPC_FilterValue, 25, 222, 30, // Skip to: 45878
-/* 37976 */ MCD_OPC_CheckPredicate, 1, 218, 30, // Skip to: 45878
-/* 37980 */ MCD_OPC_Decode, 147, 5, 134, 2, // Opcode: FCVTZUwsi
-/* 37985 */ MCD_OPC_FilterValue, 1, 125, 2, // Skip to: 38626
-/* 37989 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 37992 */ MCD_OPC_FilterValue, 0, 204, 1, // Skip to: 38456
-/* 37996 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 37999 */ MCD_OPC_FilterValue, 0, 178, 1, // Skip to: 38437
-/* 38003 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 38006 */ MCD_OPC_FilterValue, 0, 185, 0, // Skip to: 38195
-/* 38010 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 38013 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 38026
-/* 38017 */ MCD_OPC_CheckPredicate, 1, 177, 30, // Skip to: 45878
-/* 38021 */ MCD_OPC_Decode, 217, 4, 135, 2, // Opcode: FCVTNSws
-/* 38026 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 38039
-/* 38030 */ MCD_OPC_CheckPredicate, 1, 164, 30, // Skip to: 45878
-/* 38034 */ MCD_OPC_Decode, 226, 4, 135, 2, // Opcode: FCVTNUws
-/* 38039 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 38052
-/* 38043 */ MCD_OPC_CheckPredicate, 1, 151, 30, // Skip to: 45878
-/* 38047 */ MCD_OPC_Decode, 226, 12, 136, 2, // Opcode: SCVTFsw
-/* 38052 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 38065
-/* 38056 */ MCD_OPC_CheckPredicate, 1, 138, 30, // Skip to: 45878
-/* 38060 */ MCD_OPC_Decode, 171, 19, 136, 2, // Opcode: UCVTFsw
-/* 38065 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 38078
-/* 38069 */ MCD_OPC_CheckPredicate, 1, 125, 30, // Skip to: 45878
-/* 38073 */ MCD_OPC_Decode, 173, 4, 135, 2, // Opcode: FCVTASws
-/* 38078 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 38091
-/* 38082 */ MCD_OPC_CheckPredicate, 1, 112, 30, // Skip to: 45878
-/* 38086 */ MCD_OPC_Decode, 182, 4, 135, 2, // Opcode: FCVTAUws
-/* 38091 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 38104
-/* 38095 */ MCD_OPC_CheckPredicate, 1, 99, 30, // Skip to: 45878
-/* 38099 */ MCD_OPC_Decode, 235, 5, 135, 2, // Opcode: FMOVws
-/* 38104 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 38117
-/* 38108 */ MCD_OPC_CheckPredicate, 1, 86, 30, // Skip to: 45878
-/* 38112 */ MCD_OPC_Decode, 230, 5, 136, 2, // Opcode: FMOVsw
-/* 38117 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 38130
-/* 38121 */ MCD_OPC_CheckPredicate, 1, 73, 30, // Skip to: 45878
-/* 38125 */ MCD_OPC_Decode, 235, 4, 135, 2, // Opcode: FCVTPSws
-/* 38130 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 38143
-/* 38134 */ MCD_OPC_CheckPredicate, 1, 60, 30, // Skip to: 45878
-/* 38138 */ MCD_OPC_Decode, 244, 4, 135, 2, // Opcode: FCVTPUws
-/* 38143 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 38156
-/* 38147 */ MCD_OPC_CheckPredicate, 1, 47, 30, // Skip to: 45878
-/* 38151 */ MCD_OPC_Decode, 195, 4, 135, 2, // Opcode: FCVTMSws
-/* 38156 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 38169
-/* 38160 */ MCD_OPC_CheckPredicate, 1, 34, 30, // Skip to: 45878
-/* 38164 */ MCD_OPC_Decode, 204, 4, 135, 2, // Opcode: FCVTMUws
-/* 38169 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 38182
-/* 38173 */ MCD_OPC_CheckPredicate, 1, 21, 30, // Skip to: 45878
-/* 38177 */ MCD_OPC_Decode, 131, 5, 135, 2, // Opcode: FCVTZSws
-/* 38182 */ MCD_OPC_FilterValue, 25, 12, 30, // Skip to: 45878
-/* 38186 */ MCD_OPC_CheckPredicate, 1, 8, 30, // Skip to: 45878
-/* 38190 */ MCD_OPC_Decode, 146, 5, 135, 2, // Opcode: FCVTZUws
-/* 38195 */ MCD_OPC_FilterValue, 1, 55, 0, // Skip to: 38254
-/* 38199 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ...
-/* 38202 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 38215
-/* 38206 */ MCD_OPC_CheckPredicate, 1, 244, 29, // Skip to: 45878
-/* 38210 */ MCD_OPC_Decode, 163, 4, 137, 2, // Opcode: FCMPss_quiet
-/* 38215 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 38228
-/* 38219 */ MCD_OPC_CheckPredicate, 1, 231, 29, // Skip to: 45878
-/* 38223 */ MCD_OPC_Decode, 161, 4, 138, 2, // Opcode: FCMPsi_quiet
-/* 38228 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 38241
-/* 38232 */ MCD_OPC_CheckPredicate, 1, 218, 29, // Skip to: 45878
-/* 38236 */ MCD_OPC_Decode, 164, 4, 137, 2, // Opcode: FCMPss_sig
-/* 38241 */ MCD_OPC_FilterValue, 24, 209, 29, // Skip to: 45878
-/* 38245 */ MCD_OPC_CheckPredicate, 1, 205, 29, // Skip to: 45878
-/* 38249 */ MCD_OPC_Decode, 162, 4, 138, 2, // Opcode: FCMPsi_sig
-/* 38254 */ MCD_OPC_FilterValue, 2, 81, 0, // Skip to: 38339
-/* 38258 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 38261 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 38274
-/* 38265 */ MCD_OPC_CheckPredicate, 1, 185, 29, // Skip to: 45878
-/* 38269 */ MCD_OPC_Decode, 229, 5, 139, 2, // Opcode: FMOVss
-/* 38274 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 38287
-/* 38278 */ MCD_OPC_CheckPredicate, 1, 172, 29, // Skip to: 45878
-/* 38282 */ MCD_OPC_Decode, 136, 6, 139, 2, // Opcode: FNEGss
-/* 38287 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 38300
-/* 38291 */ MCD_OPC_CheckPredicate, 1, 159, 29, // Skip to: 45878
-/* 38295 */ MCD_OPC_Decode, 174, 6, 139, 2, // Opcode: FRINTNss
-/* 38300 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 38313
-/* 38304 */ MCD_OPC_CheckPredicate, 1, 146, 29, // Skip to: 45878
-/* 38308 */ MCD_OPC_Decode, 169, 6, 139, 2, // Opcode: FRINTMss
-/* 38313 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 38326
-/* 38317 */ MCD_OPC_CheckPredicate, 1, 133, 29, // Skip to: 45878
-/* 38321 */ MCD_OPC_Decode, 159, 6, 139, 2, // Opcode: FRINTAss
-/* 38326 */ MCD_OPC_FilterValue, 7, 124, 29, // Skip to: 45878
-/* 38330 */ MCD_OPC_CheckPredicate, 1, 120, 29, // Skip to: 45878
-/* 38334 */ MCD_OPC_Decode, 184, 6, 139, 2, // Opcode: FRINTXss
-/* 38339 */ MCD_OPC_FilterValue, 6, 111, 29, // Skip to: 45878
-/* 38343 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 38346 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 38359
-/* 38350 */ MCD_OPC_CheckPredicate, 1, 100, 29, // Skip to: 45878
-/* 38354 */ MCD_OPC_Decode, 220, 3, 139, 2, // Opcode: FABSss
-/* 38359 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 38372
-/* 38363 */ MCD_OPC_CheckPredicate, 1, 87, 29, // Skip to: 45878
-/* 38367 */ MCD_OPC_Decode, 204, 6, 139, 2, // Opcode: FSQRTss
-/* 38372 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 38385
-/* 38376 */ MCD_OPC_CheckPredicate, 1, 74, 29, // Skip to: 45878
-/* 38380 */ MCD_OPC_Decode, 153, 5, 140, 2, // Opcode: FCVTds
-/* 38385 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 38398
-/* 38389 */ MCD_OPC_CheckPredicate, 1, 61, 29, // Skip to: 45878
-/* 38393 */ MCD_OPC_Decode, 155, 5, 141, 2, // Opcode: FCVThs
-/* 38398 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 38411
-/* 38402 */ MCD_OPC_CheckPredicate, 1, 48, 29, // Skip to: 45878
-/* 38406 */ MCD_OPC_Decode, 179, 6, 139, 2, // Opcode: FRINTPss
-/* 38411 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 38424
-/* 38415 */ MCD_OPC_CheckPredicate, 1, 35, 29, // Skip to: 45878
-/* 38419 */ MCD_OPC_Decode, 189, 6, 139, 2, // Opcode: FRINTZss
-/* 38424 */ MCD_OPC_FilterValue, 7, 26, 29, // Skip to: 45878
-/* 38428 */ MCD_OPC_CheckPredicate, 1, 22, 29, // Skip to: 45878
-/* 38432 */ MCD_OPC_Decode, 164, 6, 139, 2, // Opcode: FRINTIss
-/* 38437 */ MCD_OPC_FilterValue, 1, 13, 29, // Skip to: 45878
-/* 38441 */ MCD_OPC_CheckPredicate, 1, 9, 29, // Skip to: 45878
-/* 38445 */ MCD_OPC_CheckField, 5, 5, 0, 3, 29, // Skip to: 45878
-/* 38451 */ MCD_OPC_Decode, 228, 5, 142, 2, // Opcode: FMOVsi
-/* 38456 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 38489
-/* 38460 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
-/* 38463 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 38476
-/* 38467 */ MCD_OPC_CheckPredicate, 1, 239, 28, // Skip to: 45878
-/* 38471 */ MCD_OPC_Decode, 244, 3, 143, 2, // Opcode: FCCMPss
-/* 38476 */ MCD_OPC_FilterValue, 1, 230, 28, // Skip to: 45878
-/* 38480 */ MCD_OPC_CheckPredicate, 1, 226, 28, // Skip to: 45878
-/* 38484 */ MCD_OPC_Decode, 242, 3, 143, 2, // Opcode: FCCMPEss
-/* 38489 */ MCD_OPC_FilterValue, 2, 120, 0, // Skip to: 38613
-/* 38493 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 38496 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 38509
-/* 38500 */ MCD_OPC_CheckPredicate, 1, 206, 28, // Skip to: 45878
-/* 38504 */ MCD_OPC_Decode, 252, 5, 144, 2, // Opcode: FMULsss
-/* 38509 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 38522
-/* 38513 */ MCD_OPC_CheckPredicate, 1, 193, 28, // Skip to: 45878
-/* 38517 */ MCD_OPC_Decode, 159, 5, 144, 2, // Opcode: FDIVsss
-/* 38522 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 38535
-/* 38526 */ MCD_OPC_CheckPredicate, 1, 180, 28, // Skip to: 45878
-/* 38530 */ MCD_OPC_Decode, 237, 3, 144, 2, // Opcode: FADDsss
-/* 38535 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 38548
-/* 38539 */ MCD_OPC_CheckPredicate, 1, 167, 28, // Skip to: 45878
-/* 38543 */ MCD_OPC_Decode, 206, 6, 144, 2, // Opcode: FSUBsss
-/* 38548 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 38561
-/* 38552 */ MCD_OPC_CheckPredicate, 1, 154, 28, // Skip to: 45878
-/* 38556 */ MCD_OPC_Decode, 183, 5, 144, 2, // Opcode: FMAXsss
-/* 38561 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 38574
-/* 38565 */ MCD_OPC_CheckPredicate, 1, 141, 28, // Skip to: 45878
-/* 38569 */ MCD_OPC_Decode, 205, 5, 144, 2, // Opcode: FMINsss
-/* 38574 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 38587
-/* 38578 */ MCD_OPC_CheckPredicate, 1, 128, 28, // Skip to: 45878
-/* 38582 */ MCD_OPC_Decode, 172, 5, 144, 2, // Opcode: FMAXNMsss
-/* 38587 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 38600
-/* 38591 */ MCD_OPC_CheckPredicate, 1, 115, 28, // Skip to: 45878
-/* 38595 */ MCD_OPC_Decode, 194, 5, 144, 2, // Opcode: FMINNMsss
-/* 38600 */ MCD_OPC_FilterValue, 8, 106, 28, // Skip to: 45878
-/* 38604 */ MCD_OPC_CheckPredicate, 1, 102, 28, // Skip to: 45878
-/* 38608 */ MCD_OPC_Decode, 142, 6, 144, 2, // Opcode: FNMULsss
-/* 38613 */ MCD_OPC_FilterValue, 3, 93, 28, // Skip to: 45878
-/* 38617 */ MCD_OPC_CheckPredicate, 1, 89, 28, // Skip to: 45878
-/* 38621 */ MCD_OPC_Decode, 166, 4, 145, 2, // Opcode: FCSELsssc
-/* 38626 */ MCD_OPC_FilterValue, 2, 55, 0, // Skip to: 38685
-/* 38630 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 38633 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 38646
-/* 38637 */ MCD_OPC_CheckPredicate, 1, 69, 28, // Skip to: 45878
-/* 38641 */ MCD_OPC_Decode, 222, 12, 146, 2, // Opcode: SCVTFdwi
-/* 38646 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 38659
-/* 38650 */ MCD_OPC_CheckPredicate, 1, 56, 28, // Skip to: 45878
-/* 38654 */ MCD_OPC_Decode, 167, 19, 146, 2, // Opcode: UCVTFdwi
-/* 38659 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 38672
-/* 38663 */ MCD_OPC_CheckPredicate, 1, 43, 28, // Skip to: 45878
-/* 38667 */ MCD_OPC_Decode, 130, 5, 147, 2, // Opcode: FCVTZSwdi
-/* 38672 */ MCD_OPC_FilterValue, 25, 34, 28, // Skip to: 45878
-/* 38676 */ MCD_OPC_CheckPredicate, 1, 30, 28, // Skip to: 45878
-/* 38680 */ MCD_OPC_Decode, 145, 5, 147, 2, // Opcode: FCVTZUwdi
-/* 38685 */ MCD_OPC_FilterValue, 3, 76, 2, // Skip to: 39277
-/* 38689 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 38692 */ MCD_OPC_FilterValue, 0, 164, 1, // Skip to: 39116
-/* 38696 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
-/* 38699 */ MCD_OPC_FilterValue, 0, 138, 1, // Skip to: 39097
-/* 38703 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
-/* 38706 */ MCD_OPC_FilterValue, 0, 157, 0, // Skip to: 38867
-/* 38710 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 38713 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 38726
-/* 38717 */ MCD_OPC_CheckPredicate, 1, 245, 27, // Skip to: 45878
-/* 38721 */ MCD_OPC_Decode, 216, 4, 148, 2, // Opcode: FCVTNSwd
-/* 38726 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 38739
-/* 38730 */ MCD_OPC_CheckPredicate, 1, 232, 27, // Skip to: 45878
-/* 38734 */ MCD_OPC_Decode, 225, 4, 148, 2, // Opcode: FCVTNUwd
-/* 38739 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 38751
-/* 38743 */ MCD_OPC_CheckPredicate, 1, 219, 27, // Skip to: 45878
-/* 38747 */ MCD_OPC_Decode, 221, 12, 80, // Opcode: SCVTFdw
-/* 38751 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 38763
-/* 38755 */ MCD_OPC_CheckPredicate, 1, 207, 27, // Skip to: 45878
-/* 38759 */ MCD_OPC_Decode, 166, 19, 80, // Opcode: UCVTFdw
-/* 38763 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 38776
-/* 38767 */ MCD_OPC_CheckPredicate, 1, 195, 27, // Skip to: 45878
-/* 38771 */ MCD_OPC_Decode, 172, 4, 148, 2, // Opcode: FCVTASwd
-/* 38776 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 38789
-/* 38780 */ MCD_OPC_CheckPredicate, 1, 182, 27, // Skip to: 45878
-/* 38784 */ MCD_OPC_Decode, 181, 4, 148, 2, // Opcode: FCVTAUwd
-/* 38789 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 38802
-/* 38793 */ MCD_OPC_CheckPredicate, 1, 169, 27, // Skip to: 45878
-/* 38797 */ MCD_OPC_Decode, 234, 4, 148, 2, // Opcode: FCVTPSwd
-/* 38802 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 38815
-/* 38806 */ MCD_OPC_CheckPredicate, 1, 156, 27, // Skip to: 45878
-/* 38810 */ MCD_OPC_Decode, 243, 4, 148, 2, // Opcode: FCVTPUwd
-/* 38815 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 38828
-/* 38819 */ MCD_OPC_CheckPredicate, 1, 143, 27, // Skip to: 45878
-/* 38823 */ MCD_OPC_Decode, 194, 4, 148, 2, // Opcode: FCVTMSwd
-/* 38828 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 38841
-/* 38832 */ MCD_OPC_CheckPredicate, 1, 130, 27, // Skip to: 45878
-/* 38836 */ MCD_OPC_Decode, 203, 4, 148, 2, // Opcode: FCVTMUwd
-/* 38841 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 38854
-/* 38845 */ MCD_OPC_CheckPredicate, 1, 117, 27, // Skip to: 45878
-/* 38849 */ MCD_OPC_Decode, 129, 5, 148, 2, // Opcode: FCVTZSwd
-/* 38854 */ MCD_OPC_FilterValue, 25, 108, 27, // Skip to: 45878
-/* 38858 */ MCD_OPC_CheckPredicate, 1, 104, 27, // Skip to: 45878
-/* 38862 */ MCD_OPC_Decode, 144, 5, 148, 2, // Opcode: FCVTZUwd
-/* 38867 */ MCD_OPC_FilterValue, 1, 55, 0, // Skip to: 38926
-/* 38871 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ...
-/* 38874 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 38887
-/* 38878 */ MCD_OPC_CheckPredicate, 1, 84, 27, // Skip to: 45878
-/* 38882 */ MCD_OPC_Decode, 157, 4, 149, 2, // Opcode: FCMPdd_quiet
-/* 38887 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 38900
-/* 38891 */ MCD_OPC_CheckPredicate, 1, 71, 27, // Skip to: 45878
-/* 38895 */ MCD_OPC_Decode, 159, 4, 150, 2, // Opcode: FCMPdi_quiet
-/* 38900 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 38913
-/* 38904 */ MCD_OPC_CheckPredicate, 1, 58, 27, // Skip to: 45878
-/* 38908 */ MCD_OPC_Decode, 158, 4, 149, 2, // Opcode: FCMPdd_sig
-/* 38913 */ MCD_OPC_FilterValue, 24, 49, 27, // Skip to: 45878
-/* 38917 */ MCD_OPC_CheckPredicate, 1, 45, 27, // Skip to: 45878
-/* 38921 */ MCD_OPC_Decode, 160, 4, 150, 2, // Opcode: FCMPdi_sig
-/* 38926 */ MCD_OPC_FilterValue, 2, 88, 0, // Skip to: 39018
-/* 38930 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 38933 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 38945
-/* 38937 */ MCD_OPC_CheckPredicate, 1, 25, 27, // Skip to: 45878
-/* 38941 */ MCD_OPC_Decode, 225, 5, 79, // Opcode: FMOVdd
-/* 38945 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 38957
-/* 38949 */ MCD_OPC_CheckPredicate, 1, 13, 27, // Skip to: 45878
-/* 38953 */ MCD_OPC_Decode, 135, 6, 79, // Opcode: FNEGdd
-/* 38957 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 38970
-/* 38961 */ MCD_OPC_CheckPredicate, 1, 1, 27, // Skip to: 45878
-/* 38965 */ MCD_OPC_Decode, 156, 5, 134, 1, // Opcode: FCVTsd
-/* 38970 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 38982
-/* 38974 */ MCD_OPC_CheckPredicate, 1, 244, 26, // Skip to: 45878
-/* 38978 */ MCD_OPC_Decode, 173, 6, 79, // Opcode: FRINTNdd
-/* 38982 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 38994
-/* 38986 */ MCD_OPC_CheckPredicate, 1, 232, 26, // Skip to: 45878
-/* 38990 */ MCD_OPC_Decode, 168, 6, 79, // Opcode: FRINTMdd
-/* 38994 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 39006
-/* 38998 */ MCD_OPC_CheckPredicate, 1, 220, 26, // Skip to: 45878
-/* 39002 */ MCD_OPC_Decode, 158, 6, 79, // Opcode: FRINTAdd
-/* 39006 */ MCD_OPC_FilterValue, 7, 212, 26, // Skip to: 45878
-/* 39010 */ MCD_OPC_CheckPredicate, 1, 208, 26, // Skip to: 45878
-/* 39014 */ MCD_OPC_Decode, 183, 6, 79, // Opcode: FRINTXdd
-/* 39018 */ MCD_OPC_FilterValue, 6, 200, 26, // Skip to: 45878
-/* 39022 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
-/* 39025 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 39037
-/* 39029 */ MCD_OPC_CheckPredicate, 1, 189, 26, // Skip to: 45878
-/* 39033 */ MCD_OPC_Decode, 219, 3, 79, // Opcode: FABSdd
-/* 39037 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 39049
-/* 39041 */ MCD_OPC_CheckPredicate, 1, 177, 26, // Skip to: 45878
-/* 39045 */ MCD_OPC_Decode, 203, 6, 79, // Opcode: FSQRTdd
-/* 39049 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 39061
-/* 39053 */ MCD_OPC_CheckPredicate, 1, 165, 26, // Skip to: 45878
-/* 39057 */ MCD_OPC_Decode, 154, 5, 89, // Opcode: FCVThd
-/* 39061 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 39073
-/* 39065 */ MCD_OPC_CheckPredicate, 1, 153, 26, // Skip to: 45878
-/* 39069 */ MCD_OPC_Decode, 178, 6, 79, // Opcode: FRINTPdd
-/* 39073 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 39085
-/* 39077 */ MCD_OPC_CheckPredicate, 1, 141, 26, // Skip to: 45878
-/* 39081 */ MCD_OPC_Decode, 188, 6, 79, // Opcode: FRINTZdd
-/* 39085 */ MCD_OPC_FilterValue, 7, 133, 26, // Skip to: 45878
-/* 39089 */ MCD_OPC_CheckPredicate, 1, 129, 26, // Skip to: 45878
-/* 39093 */ MCD_OPC_Decode, 163, 6, 79, // Opcode: FRINTIdd
-/* 39097 */ MCD_OPC_FilterValue, 1, 121, 26, // Skip to: 45878
-/* 39101 */ MCD_OPC_CheckPredicate, 1, 117, 26, // Skip to: 45878
-/* 39105 */ MCD_OPC_CheckField, 5, 5, 0, 111, 26, // Skip to: 45878
-/* 39111 */ MCD_OPC_Decode, 226, 5, 151, 2, // Opcode: FMOVdi
-/* 39116 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 39149
-/* 39120 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
-/* 39123 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 39136
-/* 39127 */ MCD_OPC_CheckPredicate, 1, 91, 26, // Skip to: 45878
-/* 39131 */ MCD_OPC_Decode, 243, 3, 152, 2, // Opcode: FCCMPdd
-/* 39136 */ MCD_OPC_FilterValue, 1, 82, 26, // Skip to: 45878
-/* 39140 */ MCD_OPC_CheckPredicate, 1, 78, 26, // Skip to: 45878
-/* 39144 */ MCD_OPC_Decode, 241, 3, 152, 2, // Opcode: FCCMPEdd
-/* 39149 */ MCD_OPC_FilterValue, 2, 111, 0, // Skip to: 39264
-/* 39153 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 39156 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 39168
-/* 39160 */ MCD_OPC_CheckPredicate, 1, 58, 26, // Skip to: 45878
-/* 39164 */ MCD_OPC_Decode, 250, 5, 78, // Opcode: FMULddd
-/* 39168 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 39180
-/* 39172 */ MCD_OPC_CheckPredicate, 1, 46, 26, // Skip to: 45878
-/* 39176 */ MCD_OPC_Decode, 158, 5, 78, // Opcode: FDIVddd
-/* 39180 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 39192
-/* 39184 */ MCD_OPC_CheckPredicate, 1, 34, 26, // Skip to: 45878
-/* 39188 */ MCD_OPC_Decode, 236, 3, 78, // Opcode: FADDddd
-/* 39192 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 39204
-/* 39196 */ MCD_OPC_CheckPredicate, 1, 22, 26, // Skip to: 45878
-/* 39200 */ MCD_OPC_Decode, 205, 6, 78, // Opcode: FSUBddd
-/* 39204 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 39216
-/* 39208 */ MCD_OPC_CheckPredicate, 1, 10, 26, // Skip to: 45878
-/* 39212 */ MCD_OPC_Decode, 182, 5, 78, // Opcode: FMAXddd
-/* 39216 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 39228
-/* 39220 */ MCD_OPC_CheckPredicate, 1, 254, 25, // Skip to: 45878
-/* 39224 */ MCD_OPC_Decode, 204, 5, 78, // Opcode: FMINddd
-/* 39228 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 39240
-/* 39232 */ MCD_OPC_CheckPredicate, 1, 242, 25, // Skip to: 45878
-/* 39236 */ MCD_OPC_Decode, 171, 5, 78, // Opcode: FMAXNMddd
-/* 39240 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 39252
-/* 39244 */ MCD_OPC_CheckPredicate, 1, 230, 25, // Skip to: 45878
-/* 39248 */ MCD_OPC_Decode, 193, 5, 78, // Opcode: FMINNMddd
-/* 39252 */ MCD_OPC_FilterValue, 8, 222, 25, // Skip to: 45878
-/* 39256 */ MCD_OPC_CheckPredicate, 1, 218, 25, // Skip to: 45878
-/* 39260 */ MCD_OPC_Decode, 141, 6, 78, // Opcode: FNMULddd
-/* 39264 */ MCD_OPC_FilterValue, 3, 210, 25, // Skip to: 45878
-/* 39268 */ MCD_OPC_CheckPredicate, 1, 206, 25, // Skip to: 45878
-/* 39272 */ MCD_OPC_Decode, 165, 4, 153, 2, // Opcode: FCSELdddc
-/* 39277 */ MCD_OPC_FilterValue, 7, 197, 25, // Skip to: 45878
-/* 39281 */ MCD_OPC_ExtractField, 10, 11, // Inst{20-10} ...
-/* 39284 */ MCD_OPC_FilterValue, 144, 1, 9, 0, // Skip to: 39298
-/* 39289 */ MCD_OPC_CheckPredicate, 1, 185, 25, // Skip to: 45878
-/* 39293 */ MCD_OPC_Decode, 157, 5, 154, 2, // Opcode: FCVTsh
-/* 39298 */ MCD_OPC_FilterValue, 176, 1, 175, 25, // Skip to: 45878
-/* 39303 */ MCD_OPC_CheckPredicate, 1, 171, 25, // Skip to: 45878
-/* 39307 */ MCD_OPC_Decode, 152, 5, 155, 2, // Opcode: FCVTdh
-/* 39312 */ MCD_OPC_FilterValue, 3, 162, 25, // Skip to: 45878
-/* 39316 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 39319 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 39352
-/* 39323 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 39326 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 39339
-/* 39330 */ MCD_OPC_CheckPredicate, 1, 144, 25, // Skip to: 45878
-/* 39334 */ MCD_OPC_Decode, 164, 5, 156, 2, // Opcode: FMADDssss
-/* 39339 */ MCD_OPC_FilterValue, 1, 135, 25, // Skip to: 45878
-/* 39343 */ MCD_OPC_CheckPredicate, 1, 131, 25, // Skip to: 45878
-/* 39347 */ MCD_OPC_Decode, 239, 5, 156, 2, // Opcode: FMSUBssss
-/* 39352 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 39385
-/* 39356 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 39359 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 39372
-/* 39363 */ MCD_OPC_CheckPredicate, 1, 111, 25, // Skip to: 45878
-/* 39367 */ MCD_OPC_Decode, 138, 6, 156, 2, // Opcode: FNMADDssss
-/* 39372 */ MCD_OPC_FilterValue, 1, 102, 25, // Skip to: 45878
-/* 39376 */ MCD_OPC_CheckPredicate, 1, 98, 25, // Skip to: 45878
-/* 39380 */ MCD_OPC_Decode, 140, 6, 156, 2, // Opcode: FNMSUBssss
-/* 39385 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 39418
-/* 39389 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 39392 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 39405
-/* 39396 */ MCD_OPC_CheckPredicate, 1, 78, 25, // Skip to: 45878
-/* 39400 */ MCD_OPC_Decode, 163, 5, 157, 2, // Opcode: FMADDdddd
-/* 39405 */ MCD_OPC_FilterValue, 1, 69, 25, // Skip to: 45878
-/* 39409 */ MCD_OPC_CheckPredicate, 1, 65, 25, // Skip to: 45878
-/* 39413 */ MCD_OPC_Decode, 238, 5, 157, 2, // Opcode: FMSUBdddd
-/* 39418 */ MCD_OPC_FilterValue, 3, 56, 25, // Skip to: 45878
-/* 39422 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
-/* 39425 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 39438
-/* 39429 */ MCD_OPC_CheckPredicate, 1, 45, 25, // Skip to: 45878
-/* 39433 */ MCD_OPC_Decode, 137, 6, 157, 2, // Opcode: FNMADDdddd
-/* 39438 */ MCD_OPC_FilterValue, 1, 36, 25, // Skip to: 45878
-/* 39442 */ MCD_OPC_CheckPredicate, 1, 32, 25, // Skip to: 45878
-/* 39446 */ MCD_OPC_Decode, 139, 6, 157, 2, // Opcode: FNMSUBdddd
-/* 39451 */ MCD_OPC_FilterValue, 1, 235, 1, // Skip to: 39946
-/* 39455 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
-/* 39458 */ MCD_OPC_FilterValue, 0, 105, 0, // Skip to: 39567
-/* 39462 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 39465 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39484
-/* 39469 */ MCD_OPC_CheckPredicate, 1, 5, 25, // Skip to: 45878
-/* 39473 */ MCD_OPC_CheckField, 21, 1, 0, 255, 24, // Skip to: 45878
-/* 39479 */ MCD_OPC_Decode, 186, 10, 158, 2, // Opcode: LSFP8_STUR
-/* 39484 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 39503
-/* 39488 */ MCD_OPC_CheckPredicate, 1, 242, 24, // Skip to: 45878
-/* 39492 */ MCD_OPC_CheckField, 21, 1, 0, 236, 24, // Skip to: 45878
-/* 39498 */ MCD_OPC_Decode, 182, 10, 238, 1, // Opcode: LSFP8_PostInd_STR
-/* 39503 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 39548
-/* 39507 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 39510 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39529
-/* 39514 */ MCD_OPC_CheckPredicate, 1, 216, 24, // Skip to: 45878
-/* 39518 */ MCD_OPC_CheckField, 21, 1, 1, 210, 24, // Skip to: 45878
-/* 39524 */ MCD_OPC_Decode, 188, 10, 159, 2, // Opcode: LSFP8_Wm_RegOffset_STR
-/* 39529 */ MCD_OPC_FilterValue, 1, 201, 24, // Skip to: 45878
-/* 39533 */ MCD_OPC_CheckPredicate, 1, 197, 24, // Skip to: 45878
-/* 39537 */ MCD_OPC_CheckField, 21, 1, 1, 191, 24, // Skip to: 45878
-/* 39543 */ MCD_OPC_Decode, 190, 10, 160, 2, // Opcode: LSFP8_Xm_RegOffset_STR
-/* 39548 */ MCD_OPC_FilterValue, 3, 182, 24, // Skip to: 45878
-/* 39552 */ MCD_OPC_CheckPredicate, 1, 178, 24, // Skip to: 45878
-/* 39556 */ MCD_OPC_CheckField, 21, 1, 0, 172, 24, // Skip to: 45878
-/* 39562 */ MCD_OPC_Decode, 184, 10, 238, 1, // Opcode: LSFP8_PreInd_STR
-/* 39567 */ MCD_OPC_FilterValue, 1, 105, 0, // Skip to: 39676
-/* 39571 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 39574 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39593
-/* 39578 */ MCD_OPC_CheckPredicate, 1, 152, 24, // Skip to: 45878
-/* 39582 */ MCD_OPC_CheckField, 21, 1, 0, 146, 24, // Skip to: 45878
-/* 39588 */ MCD_OPC_Decode, 180, 10, 158, 2, // Opcode: LSFP8_LDUR
-/* 39593 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 39612
-/* 39597 */ MCD_OPC_CheckPredicate, 1, 133, 24, // Skip to: 45878
-/* 39601 */ MCD_OPC_CheckField, 21, 1, 0, 127, 24, // Skip to: 45878
-/* 39607 */ MCD_OPC_Decode, 181, 10, 238, 1, // Opcode: LSFP8_PostInd_LDR
-/* 39612 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 39657
-/* 39616 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 39619 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39638
-/* 39623 */ MCD_OPC_CheckPredicate, 1, 107, 24, // Skip to: 45878
-/* 39627 */ MCD_OPC_CheckField, 21, 1, 1, 101, 24, // Skip to: 45878
-/* 39633 */ MCD_OPC_Decode, 187, 10, 159, 2, // Opcode: LSFP8_Wm_RegOffset_LDR
-/* 39638 */ MCD_OPC_FilterValue, 1, 92, 24, // Skip to: 45878
-/* 39642 */ MCD_OPC_CheckPredicate, 1, 88, 24, // Skip to: 45878
-/* 39646 */ MCD_OPC_CheckField, 21, 1, 1, 82, 24, // Skip to: 45878
-/* 39652 */ MCD_OPC_Decode, 189, 10, 160, 2, // Opcode: LSFP8_Xm_RegOffset_LDR
-/* 39657 */ MCD_OPC_FilterValue, 3, 73, 24, // Skip to: 45878
-/* 39661 */ MCD_OPC_CheckPredicate, 1, 69, 24, // Skip to: 45878
-/* 39665 */ MCD_OPC_CheckField, 21, 1, 0, 63, 24, // Skip to: 45878
-/* 39671 */ MCD_OPC_Decode, 183, 10, 238, 1, // Opcode: LSFP8_PreInd_LDR
-/* 39676 */ MCD_OPC_FilterValue, 2, 105, 0, // Skip to: 39785
-/* 39680 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 39683 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39702
-/* 39687 */ MCD_OPC_CheckPredicate, 1, 43, 24, // Skip to: 45878
-/* 39691 */ MCD_OPC_CheckField, 21, 1, 0, 37, 24, // Skip to: 45878
-/* 39697 */ MCD_OPC_Decode, 138, 10, 161, 2, // Opcode: LSFP128_STUR
-/* 39702 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 39721
-/* 39706 */ MCD_OPC_CheckPredicate, 1, 24, 24, // Skip to: 45878
-/* 39710 */ MCD_OPC_CheckField, 21, 1, 0, 18, 24, // Skip to: 45878
-/* 39716 */ MCD_OPC_Decode, 134, 10, 238, 1, // Opcode: LSFP128_PostInd_STR
-/* 39721 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 39766
-/* 39725 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 39728 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39747
-/* 39732 */ MCD_OPC_CheckPredicate, 1, 254, 23, // Skip to: 45878
-/* 39736 */ MCD_OPC_CheckField, 21, 1, 1, 248, 23, // Skip to: 45878
-/* 39742 */ MCD_OPC_Decode, 140, 10, 162, 2, // Opcode: LSFP128_Wm_RegOffset_STR
-/* 39747 */ MCD_OPC_FilterValue, 1, 239, 23, // Skip to: 45878
-/* 39751 */ MCD_OPC_CheckPredicate, 1, 235, 23, // Skip to: 45878
-/* 39755 */ MCD_OPC_CheckField, 21, 1, 1, 229, 23, // Skip to: 45878
-/* 39761 */ MCD_OPC_Decode, 142, 10, 163, 2, // Opcode: LSFP128_Xm_RegOffset_STR
-/* 39766 */ MCD_OPC_FilterValue, 3, 220, 23, // Skip to: 45878
-/* 39770 */ MCD_OPC_CheckPredicate, 1, 216, 23, // Skip to: 45878
-/* 39774 */ MCD_OPC_CheckField, 21, 1, 0, 210, 23, // Skip to: 45878
-/* 39780 */ MCD_OPC_Decode, 136, 10, 238, 1, // Opcode: LSFP128_PreInd_STR
-/* 39785 */ MCD_OPC_FilterValue, 3, 105, 0, // Skip to: 39894
-/* 39789 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 39792 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39811
-/* 39796 */ MCD_OPC_CheckPredicate, 1, 190, 23, // Skip to: 45878
-/* 39800 */ MCD_OPC_CheckField, 21, 1, 0, 184, 23, // Skip to: 45878
-/* 39806 */ MCD_OPC_Decode, 132, 10, 161, 2, // Opcode: LSFP128_LDUR
-/* 39811 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 39830
-/* 39815 */ MCD_OPC_CheckPredicate, 1, 171, 23, // Skip to: 45878
-/* 39819 */ MCD_OPC_CheckField, 21, 1, 0, 165, 23, // Skip to: 45878
-/* 39825 */ MCD_OPC_Decode, 133, 10, 238, 1, // Opcode: LSFP128_PostInd_LDR
-/* 39830 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 39875
-/* 39834 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 39837 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39856
-/* 39841 */ MCD_OPC_CheckPredicate, 1, 145, 23, // Skip to: 45878
-/* 39845 */ MCD_OPC_CheckField, 21, 1, 1, 139, 23, // Skip to: 45878
-/* 39851 */ MCD_OPC_Decode, 139, 10, 162, 2, // Opcode: LSFP128_Wm_RegOffset_LDR
-/* 39856 */ MCD_OPC_FilterValue, 1, 130, 23, // Skip to: 45878
-/* 39860 */ MCD_OPC_CheckPredicate, 1, 126, 23, // Skip to: 45878
-/* 39864 */ MCD_OPC_CheckField, 21, 1, 1, 120, 23, // Skip to: 45878
-/* 39870 */ MCD_OPC_Decode, 141, 10, 163, 2, // Opcode: LSFP128_Xm_RegOffset_LDR
-/* 39875 */ MCD_OPC_FilterValue, 3, 111, 23, // Skip to: 45878
-/* 39879 */ MCD_OPC_CheckPredicate, 1, 107, 23, // Skip to: 45878
-/* 39883 */ MCD_OPC_CheckField, 21, 1, 0, 101, 23, // Skip to: 45878
-/* 39889 */ MCD_OPC_Decode, 135, 10, 238, 1, // Opcode: LSFP128_PreInd_LDR
-/* 39894 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 39907
-/* 39898 */ MCD_OPC_CheckPredicate, 1, 88, 23, // Skip to: 45878
-/* 39902 */ MCD_OPC_Decode, 185, 10, 164, 2, // Opcode: LSFP8_STR
-/* 39907 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 39920
-/* 39911 */ MCD_OPC_CheckPredicate, 1, 75, 23, // Skip to: 45878
-/* 39915 */ MCD_OPC_Decode, 179, 10, 164, 2, // Opcode: LSFP8_LDR
-/* 39920 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 39933
-/* 39924 */ MCD_OPC_CheckPredicate, 1, 62, 23, // Skip to: 45878
-/* 39928 */ MCD_OPC_Decode, 137, 10, 165, 2, // Opcode: LSFP128_STR
-/* 39933 */ MCD_OPC_FilterValue, 7, 53, 23, // Skip to: 45878
-/* 39937 */ MCD_OPC_CheckPredicate, 1, 49, 23, // Skip to: 45878
-/* 39941 */ MCD_OPC_Decode, 131, 10, 165, 2, // Opcode: LSFP128_LDR
-/* 39946 */ MCD_OPC_FilterValue, 2, 145, 9, // Skip to: 42399
-/* 39950 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
-/* 39953 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 39966
-/* 39957 */ MCD_OPC_CheckPredicate, 1, 29, 23, // Skip to: 45878
-/* 39961 */ MCD_OPC_Decode, 186, 9, 166, 2, // Opcode: LDRd_lit
-/* 39966 */ MCD_OPC_FilterValue, 2, 175, 5, // Skip to: 41425
-/* 39970 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 39973 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39992
-/* 39977 */ MCD_OPC_CheckPredicate, 2, 9, 23, // Skip to: 45878
-/* 39981 */ MCD_OPC_CheckField, 21, 3, 0, 3, 23, // Skip to: 45878
-/* 39987 */ MCD_OPC_Decode, 232, 12, 167, 2, // Opcode: SHA1C
-/* 39992 */ MCD_OPC_FilterValue, 1, 99, 0, // Skip to: 40095
-/* 39996 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
-/* 39999 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 40076
-/* 40003 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
-/* 40006 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 40057
-/* 40010 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ...
-/* 40013 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 40038
-/* 40017 */ MCD_OPC_CheckPredicate, 0, 225, 22, // Skip to: 45878
-/* 40021 */ MCD_OPC_CheckField, 21, 3, 0, 219, 22, // Skip to: 45878
-/* 40027 */ MCD_OPC_CheckField, 19, 1, 1, 213, 22, // Skip to: 45878
-/* 40033 */ MCD_OPC_Decode, 182, 3, 168, 2, // Opcode: DUPdv_D
-/* 40038 */ MCD_OPC_FilterValue, 1, 204, 22, // Skip to: 45878
-/* 40042 */ MCD_OPC_CheckPredicate, 0, 200, 22, // Skip to: 45878
-/* 40046 */ MCD_OPC_CheckField, 21, 3, 0, 194, 22, // Skip to: 45878
-/* 40052 */ MCD_OPC_Decode, 184, 3, 169, 2, // Opcode: DUPsv_S
-/* 40057 */ MCD_OPC_FilterValue, 1, 185, 22, // Skip to: 45878
-/* 40061 */ MCD_OPC_CheckPredicate, 0, 181, 22, // Skip to: 45878
-/* 40065 */ MCD_OPC_CheckField, 21, 3, 0, 175, 22, // Skip to: 45878
-/* 40071 */ MCD_OPC_Decode, 183, 3, 170, 2, // Opcode: DUPhv_H
-/* 40076 */ MCD_OPC_FilterValue, 1, 166, 22, // Skip to: 45878
-/* 40080 */ MCD_OPC_CheckPredicate, 0, 162, 22, // Skip to: 45878
-/* 40084 */ MCD_OPC_CheckField, 21, 3, 0, 156, 22, // Skip to: 45878
-/* 40090 */ MCD_OPC_Decode, 181, 3, 171, 2, // Opcode: DUPbv_B
-/* 40095 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 40114
-/* 40099 */ MCD_OPC_CheckPredicate, 2, 143, 22, // Skip to: 45878
-/* 40103 */ MCD_OPC_CheckField, 16, 8, 40, 137, 22, // Skip to: 45878
-/* 40109 */ MCD_OPC_Decode, 233, 12, 139, 2, // Opcode: SHA1H
-/* 40114 */ MCD_OPC_FilterValue, 3, 54, 0, // Skip to: 40172
-/* 40118 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 40121 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 40134
-/* 40125 */ MCD_OPC_CheckPredicate, 0, 117, 22, // Skip to: 45878
-/* 40129 */ MCD_OPC_Decode, 238, 13, 172, 2, // Opcode: SQADDbbb
-/* 40134 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 40147
-/* 40138 */ MCD_OPC_CheckPredicate, 0, 104, 22, // Skip to: 45878
-/* 40142 */ MCD_OPC_Decode, 240, 13, 173, 2, // Opcode: SQADDhhh
-/* 40147 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 40160
-/* 40151 */ MCD_OPC_CheckPredicate, 0, 91, 22, // Skip to: 45878
-/* 40155 */ MCD_OPC_Decode, 241, 13, 144, 2, // Opcode: SQADDsss
-/* 40160 */ MCD_OPC_FilterValue, 7, 82, 22, // Skip to: 45878
-/* 40164 */ MCD_OPC_CheckPredicate, 0, 78, 22, // Skip to: 45878
-/* 40168 */ MCD_OPC_Decode, 239, 13, 78, // Opcode: SQADDddd
-/* 40172 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 40191
-/* 40176 */ MCD_OPC_CheckPredicate, 2, 66, 22, // Skip to: 45878
-/* 40180 */ MCD_OPC_CheckField, 21, 3, 0, 60, 22, // Skip to: 45878
-/* 40186 */ MCD_OPC_Decode, 235, 12, 167, 2, // Opcode: SHA1P
-/* 40191 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 40209
-/* 40195 */ MCD_OPC_CheckPredicate, 2, 47, 22, // Skip to: 45878
-/* 40199 */ MCD_OPC_CheckField, 16, 8, 40, 41, 22, // Skip to: 45878
-/* 40205 */ MCD_OPC_Decode, 237, 12, 116, // Opcode: SHA1SU1
-/* 40209 */ MCD_OPC_FilterValue, 8, 15, 0, // Skip to: 40228
-/* 40213 */ MCD_OPC_CheckPredicate, 2, 29, 22, // Skip to: 45878
-/* 40217 */ MCD_OPC_CheckField, 21, 3, 0, 23, 22, // Skip to: 45878
-/* 40223 */ MCD_OPC_Decode, 234, 12, 167, 2, // Opcode: SHA1M
-/* 40228 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 40246
-/* 40232 */ MCD_OPC_CheckPredicate, 2, 10, 22, // Skip to: 45878
-/* 40236 */ MCD_OPC_CheckField, 16, 8, 40, 4, 22, // Skip to: 45878
-/* 40242 */ MCD_OPC_Decode, 240, 12, 116, // Opcode: SHA256SU0
-/* 40246 */ MCD_OPC_FilterValue, 11, 54, 0, // Skip to: 40304
-/* 40250 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 40253 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 40266
-/* 40257 */ MCD_OPC_CheckPredicate, 0, 241, 21, // Skip to: 45878
-/* 40261 */ MCD_OPC_Decode, 142, 15, 172, 2, // Opcode: SQSUBbbb
-/* 40266 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 40279
-/* 40270 */ MCD_OPC_CheckPredicate, 0, 228, 21, // Skip to: 45878
-/* 40274 */ MCD_OPC_Decode, 144, 15, 173, 2, // Opcode: SQSUBhhh
-/* 40279 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 40292
-/* 40283 */ MCD_OPC_CheckPredicate, 0, 215, 21, // Skip to: 45878
-/* 40287 */ MCD_OPC_Decode, 145, 15, 144, 2, // Opcode: SQSUBsss
-/* 40292 */ MCD_OPC_FilterValue, 7, 206, 21, // Skip to: 45878
-/* 40296 */ MCD_OPC_CheckPredicate, 0, 202, 21, // Skip to: 45878
-/* 40300 */ MCD_OPC_Decode, 143, 15, 78, // Opcode: SQSUBddd
-/* 40304 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 40322
-/* 40308 */ MCD_OPC_CheckPredicate, 2, 190, 21, // Skip to: 45878
-/* 40312 */ MCD_OPC_CheckField, 21, 3, 0, 184, 21, // Skip to: 45878
-/* 40318 */ MCD_OPC_Decode, 236, 12, 110, // Opcode: SHA1SU0
-/* 40322 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 40340
-/* 40326 */ MCD_OPC_CheckPredicate, 0, 172, 21, // Skip to: 45878
-/* 40330 */ MCD_OPC_CheckField, 21, 3, 7, 166, 21, // Skip to: 45878
-/* 40336 */ MCD_OPC_Decode, 170, 2, 78, // Opcode: CMGTddd
-/* 40340 */ MCD_OPC_FilterValue, 14, 56, 0, // Skip to: 40400
-/* 40344 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
-/* 40347 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 40360
-/* 40351 */ MCD_OPC_CheckPredicate, 0, 147, 21, // Skip to: 45878
-/* 40355 */ MCD_OPC_Decode, 167, 18, 174, 2, // Opcode: SUQADDbb
-/* 40360 */ MCD_OPC_FilterValue, 96, 9, 0, // Skip to: 40373
-/* 40364 */ MCD_OPC_CheckPredicate, 0, 134, 21, // Skip to: 45878
-/* 40368 */ MCD_OPC_Decode, 169, 18, 175, 2, // Opcode: SUQADDhh
-/* 40373 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 40387
-/* 40378 */ MCD_OPC_CheckPredicate, 0, 120, 21, // Skip to: 45878
-/* 40382 */ MCD_OPC_Decode, 170, 18, 176, 2, // Opcode: SUQADDss
-/* 40387 */ MCD_OPC_FilterValue, 224, 1, 110, 21, // Skip to: 45878
-/* 40392 */ MCD_OPC_CheckPredicate, 0, 106, 21, // Skip to: 45878
-/* 40396 */ MCD_OPC_Decode, 168, 18, 88, // Opcode: SUQADDdd
-/* 40400 */ MCD_OPC_FilterValue, 15, 14, 0, // Skip to: 40418
-/* 40404 */ MCD_OPC_CheckPredicate, 0, 94, 21, // Skip to: 45878
-/* 40408 */ MCD_OPC_CheckField, 21, 3, 7, 88, 21, // Skip to: 45878
-/* 40414 */ MCD_OPC_Decode, 154, 2, 78, // Opcode: CMGEddd
-/* 40418 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 40436
-/* 40422 */ MCD_OPC_CheckPredicate, 2, 76, 21, // Skip to: 45878
-/* 40426 */ MCD_OPC_CheckField, 21, 3, 0, 70, 21, // Skip to: 45878
-/* 40432 */ MCD_OPC_Decode, 238, 12, 110, // Opcode: SHA256H
-/* 40436 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 40454
-/* 40440 */ MCD_OPC_CheckPredicate, 0, 58, 21, // Skip to: 45878
-/* 40444 */ MCD_OPC_CheckField, 21, 3, 7, 52, 21, // Skip to: 45878
-/* 40450 */ MCD_OPC_Decode, 215, 15, 78, // Opcode: SSHLddd
-/* 40454 */ MCD_OPC_FilterValue, 18, 43, 0, // Skip to: 40501
-/* 40458 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
-/* 40461 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 40474
-/* 40465 */ MCD_OPC_CheckPredicate, 0, 33, 21, // Skip to: 45878
-/* 40469 */ MCD_OPC_Decode, 159, 15, 177, 2, // Opcode: SQXTNbh
-/* 40474 */ MCD_OPC_FilterValue, 97, 9, 0, // Skip to: 40487
-/* 40478 */ MCD_OPC_CheckPredicate, 0, 20, 21, // Skip to: 45878
-/* 40482 */ MCD_OPC_Decode, 160, 15, 141, 2, // Opcode: SQXTNhs
-/* 40487 */ MCD_OPC_FilterValue, 161, 1, 10, 21, // Skip to: 45878
-/* 40492 */ MCD_OPC_CheckPredicate, 0, 6, 21, // Skip to: 45878
-/* 40496 */ MCD_OPC_Decode, 161, 15, 134, 1, // Opcode: SQXTNsd
-/* 40501 */ MCD_OPC_FilterValue, 19, 54, 0, // Skip to: 40559
-/* 40505 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 40508 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 40521
-/* 40512 */ MCD_OPC_CheckPredicate, 0, 242, 20, // Skip to: 45878
-/* 40516 */ MCD_OPC_Decode, 236, 14, 172, 2, // Opcode: SQSHLbbb
-/* 40521 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 40534
-/* 40525 */ MCD_OPC_CheckPredicate, 0, 229, 20, // Skip to: 45878
-/* 40529 */ MCD_OPC_Decode, 240, 14, 173, 2, // Opcode: SQSHLhhh
-/* 40534 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 40547
-/* 40538 */ MCD_OPC_CheckPredicate, 0, 216, 20, // Skip to: 45878
-/* 40542 */ MCD_OPC_Decode, 243, 14, 144, 2, // Opcode: SQSHLsss
-/* 40547 */ MCD_OPC_FilterValue, 7, 207, 20, // Skip to: 45878
-/* 40551 */ MCD_OPC_CheckPredicate, 0, 203, 20, // Skip to: 45878
-/* 40555 */ MCD_OPC_Decode, 238, 14, 78, // Opcode: SQSHLddd
-/* 40559 */ MCD_OPC_FilterValue, 20, 14, 0, // Skip to: 40577
-/* 40563 */ MCD_OPC_CheckPredicate, 2, 191, 20, // Skip to: 45878
-/* 40567 */ MCD_OPC_CheckField, 21, 3, 0, 185, 20, // Skip to: 45878
-/* 40573 */ MCD_OPC_Decode, 239, 12, 110, // Opcode: SHA256H2
-/* 40577 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 40595
-/* 40581 */ MCD_OPC_CheckPredicate, 0, 173, 20, // Skip to: 45878
-/* 40585 */ MCD_OPC_CheckField, 21, 3, 7, 167, 20, // Skip to: 45878
-/* 40591 */ MCD_OPC_Decode, 185, 15, 78, // Opcode: SRSHLddd
-/* 40595 */ MCD_OPC_FilterValue, 23, 54, 0, // Skip to: 40653
-/* 40599 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 40602 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 40615
-/* 40606 */ MCD_OPC_CheckPredicate, 0, 148, 20, // Skip to: 45878
-/* 40610 */ MCD_OPC_Decode, 202, 14, 172, 2, // Opcode: SQRSHLbbb
-/* 40615 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 40628
-/* 40619 */ MCD_OPC_CheckPredicate, 0, 135, 20, // Skip to: 45878
-/* 40623 */ MCD_OPC_Decode, 204, 14, 173, 2, // Opcode: SQRSHLhhh
-/* 40628 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 40641
-/* 40632 */ MCD_OPC_CheckPredicate, 0, 122, 20, // Skip to: 45878
-/* 40636 */ MCD_OPC_Decode, 205, 14, 144, 2, // Opcode: SQRSHLsss
-/* 40641 */ MCD_OPC_FilterValue, 7, 113, 20, // Skip to: 45878
-/* 40645 */ MCD_OPC_CheckPredicate, 0, 109, 20, // Skip to: 45878
-/* 40649 */ MCD_OPC_Decode, 203, 14, 78, // Opcode: SQRSHLddd
-/* 40653 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 40671
-/* 40657 */ MCD_OPC_CheckPredicate, 2, 97, 20, // Skip to: 45878
-/* 40661 */ MCD_OPC_CheckField, 21, 3, 0, 91, 20, // Skip to: 45878
-/* 40667 */ MCD_OPC_Decode, 241, 12, 110, // Opcode: SHA256SU1
-/* 40671 */ MCD_OPC_FilterValue, 30, 56, 0, // Skip to: 40731
-/* 40675 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
-/* 40678 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 40691
-/* 40682 */ MCD_OPC_CheckPredicate, 0, 72, 20, // Skip to: 45878
-/* 40686 */ MCD_OPC_Decode, 234, 13, 178, 2, // Opcode: SQABSbb
-/* 40691 */ MCD_OPC_FilterValue, 96, 9, 0, // Skip to: 40704
-/* 40695 */ MCD_OPC_CheckPredicate, 0, 59, 20, // Skip to: 45878
-/* 40699 */ MCD_OPC_Decode, 236, 13, 179, 2, // Opcode: SQABShh
-/* 40704 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 40718
-/* 40709 */ MCD_OPC_CheckPredicate, 0, 45, 20, // Skip to: 45878
-/* 40713 */ MCD_OPC_Decode, 237, 13, 139, 2, // Opcode: SQABSss
-/* 40718 */ MCD_OPC_FilterValue, 224, 1, 35, 20, // Skip to: 45878
-/* 40723 */ MCD_OPC_CheckPredicate, 0, 31, 20, // Skip to: 45878
-/* 40727 */ MCD_OPC_Decode, 235, 13, 79, // Opcode: SQABSdd
-/* 40731 */ MCD_OPC_FilterValue, 33, 13, 0, // Skip to: 40748
-/* 40735 */ MCD_OPC_CheckPredicate, 0, 19, 20, // Skip to: 45878
-/* 40739 */ MCD_OPC_CheckField, 21, 3, 7, 13, 20, // Skip to: 45878
-/* 40745 */ MCD_OPC_Decode, 72, 78, // Opcode: ADDddd
-/* 40748 */ MCD_OPC_FilterValue, 34, 15, 0, // Skip to: 40767
-/* 40752 */ MCD_OPC_CheckPredicate, 0, 2, 20, // Skip to: 45878
-/* 40756 */ MCD_OPC_CheckField, 16, 8, 224, 1, 251, 19, // Skip to: 45878
-/* 40763 */ MCD_OPC_Decode, 171, 2, 79, // Opcode: CMGTddi
-/* 40767 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 40785
-/* 40771 */ MCD_OPC_CheckPredicate, 0, 239, 19, // Skip to: 45878
-/* 40775 */ MCD_OPC_CheckField, 21, 3, 7, 233, 19, // Skip to: 45878
-/* 40781 */ MCD_OPC_Decode, 134, 3, 78, // Opcode: CMTSTddd
-/* 40785 */ MCD_OPC_FilterValue, 36, 29, 0, // Skip to: 40818
-/* 40789 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 40792 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 40805
-/* 40796 */ MCD_OPC_CheckPredicate, 0, 214, 19, // Skip to: 45878
-/* 40800 */ MCD_OPC_Decode, 254, 13, 180, 2, // Opcode: SQDMLALshh
-/* 40805 */ MCD_OPC_FilterValue, 5, 205, 19, // Skip to: 45878
-/* 40809 */ MCD_OPC_CheckPredicate, 0, 201, 19, // Skip to: 45878
-/* 40813 */ MCD_OPC_Decode, 251, 13, 181, 2, // Opcode: SQDMLALdss
-/* 40818 */ MCD_OPC_FilterValue, 38, 15, 0, // Skip to: 40837
-/* 40822 */ MCD_OPC_CheckPredicate, 0, 188, 19, // Skip to: 45878
-/* 40826 */ MCD_OPC_CheckField, 16, 8, 224, 1, 181, 19, // Skip to: 45878
-/* 40833 */ MCD_OPC_Decode, 139, 2, 79, // Opcode: CMEQddi
-/* 40837 */ MCD_OPC_FilterValue, 42, 68, 0, // Skip to: 40909
-/* 40841 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
-/* 40844 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 40857
-/* 40848 */ MCD_OPC_CheckPredicate, 0, 162, 19, // Skip to: 45878
-/* 40852 */ MCD_OPC_Decode, 215, 4, 139, 2, // Opcode: FCVTNSss
-/* 40857 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 40869
-/* 40861 */ MCD_OPC_CheckPredicate, 0, 149, 19, // Skip to: 45878
-/* 40865 */ MCD_OPC_Decode, 214, 4, 79, // Opcode: FCVTNSdd
-/* 40869 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 40883
-/* 40874 */ MCD_OPC_CheckPredicate, 0, 136, 19, // Skip to: 45878
-/* 40878 */ MCD_OPC_Decode, 233, 4, 139, 2, // Opcode: FCVTPSss
-/* 40883 */ MCD_OPC_FilterValue, 224, 1, 8, 0, // Skip to: 40896
-/* 40888 */ MCD_OPC_CheckPredicate, 0, 122, 19, // Skip to: 45878
-/* 40892 */ MCD_OPC_Decode, 210, 2, 79, // Opcode: CMLTddi
-/* 40896 */ MCD_OPC_FilterValue, 225, 1, 113, 19, // Skip to: 45878
-/* 40901 */ MCD_OPC_CheckPredicate, 0, 109, 19, // Skip to: 45878
-/* 40905 */ MCD_OPC_Decode, 232, 4, 79, // Opcode: FCVTPSdd
-/* 40909 */ MCD_OPC_FilterValue, 44, 29, 0, // Skip to: 40942
-/* 40913 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 40916 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 40929
-/* 40920 */ MCD_OPC_CheckPredicate, 0, 90, 19, // Skip to: 45878
-/* 40924 */ MCD_OPC_Decode, 140, 14, 180, 2, // Opcode: SQDMLSLshh
-/* 40929 */ MCD_OPC_FilterValue, 5, 81, 19, // Skip to: 45878
-/* 40933 */ MCD_OPC_CheckPredicate, 0, 77, 19, // Skip to: 45878
-/* 40937 */ MCD_OPC_Decode, 137, 14, 181, 2, // Opcode: SQDMLSLdss
-/* 40942 */ MCD_OPC_FilterValue, 45, 29, 0, // Skip to: 40975
-/* 40946 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 40949 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 40962
-/* 40953 */ MCD_OPC_CheckPredicate, 0, 57, 19, // Skip to: 45878
-/* 40957 */ MCD_OPC_Decode, 149, 14, 173, 2, // Opcode: SQDMULHhhh
-/* 40962 */ MCD_OPC_FilterValue, 5, 48, 19, // Skip to: 45878
-/* 40966 */ MCD_OPC_CheckPredicate, 0, 44, 19, // Skip to: 45878
-/* 40970 */ MCD_OPC_Decode, 152, 14, 144, 2, // Opcode: SQDMULHsss
-/* 40975 */ MCD_OPC_FilterValue, 46, 79, 0, // Skip to: 41058
-/* 40979 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
-/* 40982 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 40995
-/* 40986 */ MCD_OPC_CheckPredicate, 0, 24, 19, // Skip to: 45878
-/* 40990 */ MCD_OPC_Decode, 193, 4, 139, 2, // Opcode: FCVTMSss
-/* 40995 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 41007
-/* 40999 */ MCD_OPC_CheckPredicate, 0, 11, 19, // Skip to: 45878
-/* 41003 */ MCD_OPC_Decode, 192, 4, 79, // Opcode: FCVTMSdd
-/* 41007 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 41021
-/* 41012 */ MCD_OPC_CheckPredicate, 0, 254, 18, // Skip to: 45878
-/* 41016 */ MCD_OPC_Decode, 128, 5, 139, 2, // Opcode: FCVTZSss
-/* 41021 */ MCD_OPC_FilterValue, 224, 1, 7, 0, // Skip to: 41033
-/* 41026 */ MCD_OPC_CheckPredicate, 0, 240, 18, // Skip to: 45878
-/* 41030 */ MCD_OPC_Decode, 26, 79, // Opcode: ABSdd
-/* 41033 */ MCD_OPC_FilterValue, 225, 1, 8, 0, // Skip to: 41046
-/* 41038 */ MCD_OPC_CheckPredicate, 0, 228, 18, // Skip to: 45878
-/* 41042 */ MCD_OPC_Decode, 255, 4, 79, // Opcode: FCVTZSdd
-/* 41046 */ MCD_OPC_FilterValue, 241, 1, 219, 18, // Skip to: 45878
-/* 41051 */ MCD_OPC_CheckPredicate, 0, 215, 18, // Skip to: 45878
-/* 41055 */ MCD_OPC_Decode, 44, 84, // Opcode: ADDPvv_D_2D
-/* 41058 */ MCD_OPC_FilterValue, 50, 55, 0, // Skip to: 41117
-/* 41062 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
-/* 41065 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 41078
-/* 41069 */ MCD_OPC_CheckPredicate, 0, 197, 18, // Skip to: 45878
-/* 41073 */ MCD_OPC_Decode, 171, 4, 139, 2, // Opcode: FCVTASss
-/* 41078 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 41090
-/* 41082 */ MCD_OPC_CheckPredicate, 0, 184, 18, // Skip to: 45878
-/* 41086 */ MCD_OPC_Decode, 170, 4, 79, // Opcode: FCVTASdd
-/* 41090 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 41104
-/* 41095 */ MCD_OPC_CheckPredicate, 0, 171, 18, // Skip to: 45878
-/* 41099 */ MCD_OPC_Decode, 138, 4, 139, 2, // Opcode: FCMGTZssi
-/* 41104 */ MCD_OPC_FilterValue, 224, 1, 161, 18, // Skip to: 45878
-/* 41109 */ MCD_OPC_CheckPredicate, 0, 157, 18, // Skip to: 45878
-/* 41113 */ MCD_OPC_Decode, 137, 4, 79, // Opcode: FCMGTZddi
-/* 41117 */ MCD_OPC_FilterValue, 52, 29, 0, // Skip to: 41150
-/* 41121 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 41124 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 41137
-/* 41128 */ MCD_OPC_CheckPredicate, 0, 138, 18, // Skip to: 45878
-/* 41132 */ MCD_OPC_Decode, 168, 14, 182, 2, // Opcode: SQDMULLshh
-/* 41137 */ MCD_OPC_FilterValue, 5, 129, 18, // Skip to: 45878
-/* 41141 */ MCD_OPC_CheckPredicate, 0, 125, 18, // Skip to: 45878
-/* 41145 */ MCD_OPC_Decode, 165, 14, 183, 2, // Opcode: SQDMULLdss
-/* 41150 */ MCD_OPC_FilterValue, 54, 82, 0, // Skip to: 41236
-/* 41154 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
-/* 41157 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 41170
-/* 41161 */ MCD_OPC_CheckPredicate, 0, 105, 18, // Skip to: 45878
-/* 41165 */ MCD_OPC_Decode, 225, 12, 139, 2, // Opcode: SCVTFss
-/* 41170 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 41182
-/* 41174 */ MCD_OPC_CheckPredicate, 0, 92, 18, // Skip to: 45878
-/* 41178 */ MCD_OPC_Decode, 220, 12, 79, // Opcode: SCVTFdd
-/* 41182 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 41196
-/* 41187 */ MCD_OPC_CheckPredicate, 0, 79, 18, // Skip to: 45878
-/* 41191 */ MCD_OPC_Decode, 246, 3, 139, 2, // Opcode: FCMEQZssi
-/* 41196 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 41210
-/* 41201 */ MCD_OPC_CheckPredicate, 0, 65, 18, // Skip to: 45878
-/* 41205 */ MCD_OPC_Decode, 147, 6, 139, 2, // Opcode: FRECPEss
-/* 41210 */ MCD_OPC_FilterValue, 224, 1, 8, 0, // Skip to: 41223
-/* 41215 */ MCD_OPC_CheckPredicate, 0, 51, 18, // Skip to: 45878
-/* 41219 */ MCD_OPC_Decode, 245, 3, 79, // Opcode: FCMEQZddi
-/* 41223 */ MCD_OPC_FilterValue, 225, 1, 42, 18, // Skip to: 45878
-/* 41228 */ MCD_OPC_CheckPredicate, 0, 38, 18, // Skip to: 45878
-/* 41232 */ MCD_OPC_Decode, 146, 6, 79, // Opcode: FRECPEdd
-/* 41236 */ MCD_OPC_FilterValue, 55, 28, 0, // Skip to: 41268
-/* 41240 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 41243 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 41256
-/* 41247 */ MCD_OPC_CheckPredicate, 0, 19, 18, // Skip to: 45878
-/* 41251 */ MCD_OPC_Decode, 242, 5, 144, 2, // Opcode: FMULXsss
-/* 41256 */ MCD_OPC_FilterValue, 3, 10, 18, // Skip to: 45878
-/* 41260 */ MCD_OPC_CheckPredicate, 0, 6, 18, // Skip to: 45878
-/* 41264 */ MCD_OPC_Decode, 240, 5, 78, // Opcode: FMULXddd
-/* 41268 */ MCD_OPC_FilterValue, 57, 28, 0, // Skip to: 41300
-/* 41272 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 41275 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 41288
-/* 41279 */ MCD_OPC_CheckPredicate, 0, 243, 17, // Skip to: 45878
-/* 41283 */ MCD_OPC_Decode, 248, 3, 144, 2, // Opcode: FCMEQsss
-/* 41288 */ MCD_OPC_FilterValue, 3, 234, 17, // Skip to: 45878
-/* 41292 */ MCD_OPC_CheckPredicate, 0, 230, 17, // Skip to: 45878
-/* 41296 */ MCD_OPC_Decode, 247, 3, 78, // Opcode: FCMEQddd
-/* 41300 */ MCD_OPC_FilterValue, 58, 30, 0, // Skip to: 41334
-/* 41304 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
-/* 41307 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 41321
-/* 41312 */ MCD_OPC_CheckPredicate, 0, 210, 17, // Skip to: 45878
-/* 41316 */ MCD_OPC_Decode, 153, 4, 139, 2, // Opcode: FCMLTZssi
-/* 41321 */ MCD_OPC_FilterValue, 224, 1, 200, 17, // Skip to: 45878
-/* 41326 */ MCD_OPC_CheckPredicate, 0, 196, 17, // Skip to: 45878
-/* 41330 */ MCD_OPC_Decode, 152, 4, 79, // Opcode: FCMLTZddi
-/* 41334 */ MCD_OPC_FilterValue, 62, 30, 0, // Skip to: 41368
-/* 41338 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
-/* 41341 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 41355
-/* 41346 */ MCD_OPC_CheckPredicate, 0, 176, 17, // Skip to: 45878
-/* 41350 */ MCD_OPC_Decode, 154, 6, 139, 2, // Opcode: FRECPXss
-/* 41355 */ MCD_OPC_FilterValue, 225, 1, 166, 17, // Skip to: 45878
-/* 41360 */ MCD_OPC_CheckPredicate, 0, 162, 17, // Skip to: 45878
-/* 41364 */ MCD_OPC_Decode, 153, 6, 79, // Opcode: FRECPXdd
-/* 41368 */ MCD_OPC_FilterValue, 63, 154, 17, // Skip to: 45878
-/* 41372 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
-/* 41375 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 41388
-/* 41379 */ MCD_OPC_CheckPredicate, 0, 143, 17, // Skip to: 45878
-/* 41383 */ MCD_OPC_Decode, 149, 6, 144, 2, // Opcode: FRECPSsss
-/* 41388 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 41400
-/* 41392 */ MCD_OPC_CheckPredicate, 0, 130, 17, // Skip to: 45878
-/* 41396 */ MCD_OPC_Decode, 148, 6, 78, // Opcode: FRECPSddd
-/* 41400 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 41413
-/* 41404 */ MCD_OPC_CheckPredicate, 0, 118, 17, // Skip to: 45878
-/* 41408 */ MCD_OPC_Decode, 196, 6, 144, 2, // Opcode: FRSQRTSsss
-/* 41413 */ MCD_OPC_FilterValue, 7, 109, 17, // Skip to: 45878
-/* 41417 */ MCD_OPC_CheckPredicate, 0, 105, 17, // Skip to: 45878
-/* 41421 */ MCD_OPC_Decode, 195, 6, 78, // Opcode: FRSQRTSddd
-/* 41425 */ MCD_OPC_FilterValue, 3, 97, 17, // Skip to: 45878
-/* 41429 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
-/* 41432 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 41457
-/* 41436 */ MCD_OPC_CheckPredicate, 0, 86, 17, // Skip to: 45878
-/* 41440 */ MCD_OPC_CheckField, 22, 2, 1, 80, 17, // Skip to: 45878
-/* 41446 */ MCD_OPC_CheckField, 10, 2, 1, 74, 17, // Skip to: 45878
-/* 41452 */ MCD_OPC_Decode, 223, 15, 184, 2, // Opcode: SSHRddi
-/* 41457 */ MCD_OPC_FilterValue, 1, 66, 0, // Skip to: 41527
-/* 41461 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 41464 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 41483
-/* 41468 */ MCD_OPC_CheckPredicate, 0, 54, 17, // Skip to: 45878
-/* 41472 */ MCD_OPC_CheckField, 10, 2, 1, 48, 17, // Skip to: 45878
-/* 41478 */ MCD_OPC_Decode, 231, 15, 185, 2, // Opcode: SSRA
-/* 41483 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 41502
-/* 41487 */ MCD_OPC_CheckPredicate, 0, 35, 17, // Skip to: 45878
-/* 41491 */ MCD_OPC_CheckField, 10, 1, 0, 29, 17, // Skip to: 45878
-/* 41497 */ MCD_OPC_Decode, 210, 5, 186, 2, // Opcode: FMLAssv_4S
-/* 41502 */ MCD_OPC_FilterValue, 3, 20, 17, // Skip to: 45878
-/* 41506 */ MCD_OPC_CheckPredicate, 0, 16, 17, // Skip to: 45878
-/* 41510 */ MCD_OPC_CheckField, 21, 1, 0, 10, 17, // Skip to: 45878
-/* 41516 */ MCD_OPC_CheckField, 10, 1, 0, 4, 17, // Skip to: 45878
-/* 41522 */ MCD_OPC_Decode, 209, 5, 187, 2, // Opcode: FMLAddv_2D
-/* 41527 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 41552
-/* 41531 */ MCD_OPC_CheckPredicate, 0, 247, 16, // Skip to: 45878
-/* 41535 */ MCD_OPC_CheckField, 22, 2, 1, 241, 16, // Skip to: 45878
-/* 41541 */ MCD_OPC_CheckField, 10, 2, 1, 235, 16, // Skip to: 45878
-/* 41547 */ MCD_OPC_Decode, 193, 15, 184, 2, // Opcode: SRSHRddi
-/* 41552 */ MCD_OPC_FilterValue, 3, 91, 0, // Skip to: 41647
-/* 41556 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 41559 */ MCD_OPC_FilterValue, 0, 59, 0, // Skip to: 41622
-/* 41563 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 41566 */ MCD_OPC_FilterValue, 1, 24, 0, // Skip to: 41594
-/* 41570 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 41585
-/* 41574 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 41585
-/* 41580 */ MCD_OPC_Decode, 255, 13, 188, 2, // Opcode: SQDMLALshv_4H
-/* 41585 */ MCD_OPC_CheckPredicate, 0, 193, 16, // Skip to: 45878
-/* 41589 */ MCD_OPC_Decode, 128, 14, 189, 2, // Opcode: SQDMLALshv_8H
-/* 41594 */ MCD_OPC_FilterValue, 2, 184, 16, // Skip to: 45878
-/* 41598 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 41613
-/* 41602 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 41613
-/* 41608 */ MCD_OPC_Decode, 252, 13, 190, 2, // Opcode: SQDMLALdsv_2S
-/* 41613 */ MCD_OPC_CheckPredicate, 0, 165, 16, // Skip to: 45878
-/* 41617 */ MCD_OPC_Decode, 253, 13, 191, 2, // Opcode: SQDMLALdsv_4S
-/* 41622 */ MCD_OPC_FilterValue, 1, 156, 16, // Skip to: 45878
-/* 41626 */ MCD_OPC_CheckPredicate, 0, 152, 16, // Skip to: 45878
-/* 41630 */ MCD_OPC_CheckField, 22, 2, 1, 146, 16, // Skip to: 45878
-/* 41636 */ MCD_OPC_CheckField, 11, 1, 0, 140, 16, // Skip to: 45878
-/* 41642 */ MCD_OPC_Decode, 201, 15, 185, 2, // Opcode: SRSRA
-/* 41647 */ MCD_OPC_FilterValue, 5, 66, 0, // Skip to: 41717
-/* 41651 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 41654 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 41673
-/* 41658 */ MCD_OPC_CheckPredicate, 0, 120, 16, // Skip to: 45878
-/* 41662 */ MCD_OPC_CheckField, 10, 2, 1, 114, 16, // Skip to: 45878
-/* 41668 */ MCD_OPC_Decode, 254, 12, 192, 2, // Opcode: SHLddi
-/* 41673 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 41692
-/* 41677 */ MCD_OPC_CheckPredicate, 0, 101, 16, // Skip to: 45878
-/* 41681 */ MCD_OPC_CheckField, 10, 1, 0, 95, 16, // Skip to: 45878
-/* 41687 */ MCD_OPC_Decode, 218, 5, 186, 2, // Opcode: FMLSssv_4S
-/* 41692 */ MCD_OPC_FilterValue, 3, 86, 16, // Skip to: 45878
-/* 41696 */ MCD_OPC_CheckPredicate, 0, 82, 16, // Skip to: 45878
-/* 41700 */ MCD_OPC_CheckField, 21, 1, 0, 76, 16, // Skip to: 45878
-/* 41706 */ MCD_OPC_CheckField, 10, 1, 0, 70, 16, // Skip to: 45878
-/* 41712 */ MCD_OPC_Decode, 217, 5, 187, 2, // Opcode: FMLSddv_2D
-/* 41717 */ MCD_OPC_FilterValue, 7, 169, 0, // Skip to: 41890
-/* 41721 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 41724 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 41801
-/* 41728 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 41731 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 41782
-/* 41735 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 41738 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 41763
-/* 41742 */ MCD_OPC_CheckPredicate, 0, 36, 16, // Skip to: 45878
-/* 41746 */ MCD_OPC_CheckField, 19, 1, 1, 30, 16, // Skip to: 45878
-/* 41752 */ MCD_OPC_CheckField, 10, 2, 1, 24, 16, // Skip to: 45878
-/* 41758 */ MCD_OPC_Decode, 237, 14, 193, 2, // Opcode: SQSHLbbi
-/* 41763 */ MCD_OPC_FilterValue, 1, 15, 16, // Skip to: 45878
-/* 41767 */ MCD_OPC_CheckPredicate, 0, 11, 16, // Skip to: 45878
-/* 41771 */ MCD_OPC_CheckField, 10, 2, 1, 5, 16, // Skip to: 45878
-/* 41777 */ MCD_OPC_Decode, 241, 14, 194, 2, // Opcode: SQSHLhhi
-/* 41782 */ MCD_OPC_FilterValue, 1, 252, 15, // Skip to: 45878
-/* 41786 */ MCD_OPC_CheckPredicate, 0, 248, 15, // Skip to: 45878
-/* 41790 */ MCD_OPC_CheckField, 10, 2, 1, 242, 15, // Skip to: 45878
-/* 41796 */ MCD_OPC_Decode, 242, 14, 195, 2, // Opcode: SQSHLssi
-/* 41801 */ MCD_OPC_FilterValue, 1, 50, 0, // Skip to: 41855
-/* 41805 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 41808 */ MCD_OPC_FilterValue, 0, 24, 0, // Skip to: 41836
-/* 41812 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 41827
-/* 41816 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 41827
-/* 41822 */ MCD_OPC_Decode, 141, 14, 188, 2, // Opcode: SQDMLSLshv_4H
-/* 41827 */ MCD_OPC_CheckPredicate, 0, 207, 15, // Skip to: 45878
-/* 41831 */ MCD_OPC_Decode, 142, 14, 189, 2, // Opcode: SQDMLSLshv_8H
-/* 41836 */ MCD_OPC_FilterValue, 1, 198, 15, // Skip to: 45878
-/* 41840 */ MCD_OPC_CheckPredicate, 0, 194, 15, // Skip to: 45878
-/* 41844 */ MCD_OPC_CheckField, 11, 1, 0, 188, 15, // Skip to: 45878
-/* 41850 */ MCD_OPC_Decode, 239, 14, 192, 2, // Opcode: SQSHLddi
-/* 41855 */ MCD_OPC_FilterValue, 2, 179, 15, // Skip to: 45878
-/* 41859 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 41862 */ MCD_OPC_FilterValue, 0, 172, 15, // Skip to: 45878
-/* 41866 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 41881
-/* 41870 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 41881
-/* 41876 */ MCD_OPC_Decode, 138, 14, 190, 2, // Opcode: SQDMLSLdsv_2S
-/* 41881 */ MCD_OPC_CheckPredicate, 0, 153, 15, // Skip to: 45878
-/* 41885 */ MCD_OPC_Decode, 139, 14, 191, 2, // Opcode: SQDMLSLdsv_4S
-/* 41890 */ MCD_OPC_FilterValue, 9, 172, 0, // Skip to: 42066
-/* 41894 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 41897 */ MCD_OPC_FilterValue, 0, 121, 0, // Skip to: 42022
-/* 41901 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 41904 */ MCD_OPC_FilterValue, 1, 55, 0, // Skip to: 41963
-/* 41908 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 41911 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 41950
-/* 41915 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 41918 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 41937
-/* 41922 */ MCD_OPC_CheckPredicate, 0, 112, 15, // Skip to: 45878
-/* 41926 */ MCD_OPC_CheckField, 19, 1, 1, 106, 15, // Skip to: 45878
-/* 41932 */ MCD_OPC_Decode, 130, 15, 196, 2, // Opcode: SQSHRNbhi
-/* 41937 */ MCD_OPC_FilterValue, 1, 97, 15, // Skip to: 45878
-/* 41941 */ MCD_OPC_CheckPredicate, 0, 93, 15, // Skip to: 45878
-/* 41945 */ MCD_OPC_Decode, 131, 15, 197, 2, // Opcode: SQSHRNhsi
-/* 41950 */ MCD_OPC_FilterValue, 1, 84, 15, // Skip to: 45878
-/* 41954 */ MCD_OPC_CheckPredicate, 0, 80, 15, // Skip to: 45878
-/* 41958 */ MCD_OPC_Decode, 132, 15, 198, 2, // Opcode: SQSHRNsdi
-/* 41963 */ MCD_OPC_FilterValue, 3, 71, 15, // Skip to: 45878
-/* 41967 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 41970 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 42009
-/* 41974 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 41977 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 41996
-/* 41981 */ MCD_OPC_CheckPredicate, 0, 53, 15, // Skip to: 45878
-/* 41985 */ MCD_OPC_CheckField, 19, 1, 1, 47, 15, // Skip to: 45878
-/* 41991 */ MCD_OPC_Decode, 213, 14, 196, 2, // Opcode: SQRSHRNbhi
-/* 41996 */ MCD_OPC_FilterValue, 1, 38, 15, // Skip to: 45878
-/* 42000 */ MCD_OPC_CheckPredicate, 0, 34, 15, // Skip to: 45878
-/* 42004 */ MCD_OPC_Decode, 214, 14, 197, 2, // Opcode: SQRSHRNhsi
-/* 42009 */ MCD_OPC_FilterValue, 1, 25, 15, // Skip to: 45878
-/* 42013 */ MCD_OPC_CheckPredicate, 0, 21, 15, // Skip to: 45878
-/* 42017 */ MCD_OPC_Decode, 215, 14, 198, 2, // Opcode: SQRSHRNsdi
-/* 42022 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 42041
-/* 42026 */ MCD_OPC_CheckPredicate, 0, 8, 15, // Skip to: 45878
-/* 42030 */ MCD_OPC_CheckField, 10, 1, 0, 2, 15, // Skip to: 45878
-/* 42036 */ MCD_OPC_Decode, 253, 5, 199, 2, // Opcode: FMULssv_4S
-/* 42041 */ MCD_OPC_FilterValue, 3, 249, 14, // Skip to: 45878
-/* 42045 */ MCD_OPC_CheckPredicate, 0, 245, 14, // Skip to: 45878
-/* 42049 */ MCD_OPC_CheckField, 21, 1, 0, 239, 14, // Skip to: 45878
-/* 42055 */ MCD_OPC_CheckField, 10, 1, 0, 233, 14, // Skip to: 45878
-/* 42061 */ MCD_OPC_Decode, 251, 5, 200, 2, // Opcode: FMULddv_2D
-/* 42066 */ MCD_OPC_FilterValue, 11, 73, 0, // Skip to: 42143
-/* 42070 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 42073 */ MCD_OPC_FilterValue, 1, 31, 0, // Skip to: 42108
-/* 42077 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 42080 */ MCD_OPC_FilterValue, 0, 210, 14, // Skip to: 45878
-/* 42084 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 42099
-/* 42088 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 42099
-/* 42094 */ MCD_OPC_Decode, 169, 14, 201, 2, // Opcode: SQDMULLshv_4H
-/* 42099 */ MCD_OPC_CheckPredicate, 0, 191, 14, // Skip to: 45878
-/* 42103 */ MCD_OPC_Decode, 170, 14, 202, 2, // Opcode: SQDMULLshv_8H
-/* 42108 */ MCD_OPC_FilterValue, 2, 182, 14, // Skip to: 45878
-/* 42112 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 42115 */ MCD_OPC_FilterValue, 0, 175, 14, // Skip to: 45878
-/* 42119 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 42134
-/* 42123 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 42134
-/* 42129 */ MCD_OPC_Decode, 166, 14, 203, 2, // Opcode: SQDMULLdsv_2S
-/* 42134 */ MCD_OPC_CheckPredicate, 0, 156, 14, // Skip to: 45878
-/* 42138 */ MCD_OPC_Decode, 167, 14, 204, 2, // Opcode: SQDMULLdsv_4S
-/* 42143 */ MCD_OPC_FilterValue, 12, 73, 0, // Skip to: 42220
-/* 42147 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 42150 */ MCD_OPC_FilterValue, 1, 31, 0, // Skip to: 42185
-/* 42154 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 42157 */ MCD_OPC_FilterValue, 0, 133, 14, // Skip to: 45878
-/* 42161 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 42176
-/* 42165 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 42176
-/* 42171 */ MCD_OPC_Decode, 150, 14, 205, 2, // Opcode: SQDMULHhhv_4H
-/* 42176 */ MCD_OPC_CheckPredicate, 0, 114, 14, // Skip to: 45878
-/* 42180 */ MCD_OPC_Decode, 151, 14, 206, 2, // Opcode: SQDMULHhhv_8H
-/* 42185 */ MCD_OPC_FilterValue, 2, 105, 14, // Skip to: 45878
-/* 42189 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 42192 */ MCD_OPC_FilterValue, 0, 98, 14, // Skip to: 45878
-/* 42196 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 42211
-/* 42200 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 42211
-/* 42206 */ MCD_OPC_Decode, 153, 14, 207, 2, // Opcode: SQDMULHssv_2S
-/* 42211 */ MCD_OPC_CheckPredicate, 0, 79, 14, // Skip to: 45878
-/* 42215 */ MCD_OPC_Decode, 154, 14, 199, 2, // Opcode: SQDMULHssv_4S
-/* 42220 */ MCD_OPC_FilterValue, 13, 73, 0, // Skip to: 42297
-/* 42224 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 42227 */ MCD_OPC_FilterValue, 1, 31, 0, // Skip to: 42262
-/* 42231 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 42234 */ MCD_OPC_FilterValue, 0, 56, 14, // Skip to: 45878
-/* 42238 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 42253
-/* 42242 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 42253
-/* 42248 */ MCD_OPC_Decode, 189, 14, 205, 2, // Opcode: SQRDMULHhhv_4H
-/* 42253 */ MCD_OPC_CheckPredicate, 0, 37, 14, // Skip to: 45878
-/* 42257 */ MCD_OPC_Decode, 190, 14, 206, 2, // Opcode: SQRDMULHhhv_8H
-/* 42262 */ MCD_OPC_FilterValue, 2, 28, 14, // Skip to: 45878
-/* 42266 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
-/* 42269 */ MCD_OPC_FilterValue, 0, 21, 14, // Skip to: 45878
-/* 42273 */ MCD_OPC_CheckPredicate, 0, 11, 0, // Skip to: 42288
-/* 42277 */ MCD_OPC_CheckField, 11, 1, 0, 5, 0, // Skip to: 42288
-/* 42283 */ MCD_OPC_Decode, 192, 14, 207, 2, // Opcode: SQRDMULHssv_2S
-/* 42288 */ MCD_OPC_CheckPredicate, 0, 2, 14, // Skip to: 45878
-/* 42292 */ MCD_OPC_Decode, 193, 14, 199, 2, // Opcode: SQRDMULHssv_4S
-/* 42297 */ MCD_OPC_FilterValue, 14, 47, 0, // Skip to: 42348
-/* 42301 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 42304 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 42329
-/* 42308 */ MCD_OPC_CheckPredicate, 0, 238, 13, // Skip to: 45878
-/* 42312 */ MCD_OPC_CheckField, 21, 1, 1, 232, 13, // Skip to: 45878
-/* 42318 */ MCD_OPC_CheckField, 10, 2, 1, 226, 13, // Skip to: 45878
-/* 42324 */ MCD_OPC_Decode, 219, 12, 208, 2, // Opcode: SCVTF_Nssi
-/* 42329 */ MCD_OPC_FilterValue, 1, 217, 13, // Skip to: 45878
-/* 42333 */ MCD_OPC_CheckPredicate, 0, 213, 13, // Skip to: 45878
-/* 42337 */ MCD_OPC_CheckField, 10, 2, 1, 207, 13, // Skip to: 45878
-/* 42343 */ MCD_OPC_Decode, 218, 12, 184, 2, // Opcode: SCVTF_Nddi
-/* 42348 */ MCD_OPC_FilterValue, 15, 198, 13, // Skip to: 45878
-/* 42352 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
-/* 42355 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 42380
-/* 42359 */ MCD_OPC_CheckPredicate, 0, 187, 13, // Skip to: 45878
-/* 42363 */ MCD_OPC_CheckField, 21, 1, 1, 181, 13, // Skip to: 45878
-/* 42369 */ MCD_OPC_CheckField, 10, 2, 3, 175, 13, // Skip to: 45878
-/* 42375 */ MCD_OPC_Decode, 254, 4, 208, 2, // Opcode: FCVTZS_Nssi
-/* 42380 */ MCD_OPC_FilterValue, 1, 166, 13, // Skip to: 45878
-/* 42384 */ MCD_OPC_CheckPredicate, 0, 162, 13, // Skip to: 45878
-/* 42388 */ MCD_OPC_CheckField, 10, 2, 3, 156, 13, // Skip to: 45878
-/* 42394 */ MCD_OPC_Decode, 253, 4, 184, 2, // Opcode: FCVTZS_Nddi
-/* 42399 */ MCD_OPC_FilterValue, 3, 4, 9, // Skip to: 44711
-/* 42403 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
-/* 42406 */ MCD_OPC_FilterValue, 0, 105, 0, // Skip to: 42515
-/* 42410 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 42413 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 42432
-/* 42417 */ MCD_OPC_CheckPredicate, 1, 129, 13, // Skip to: 45878
-/* 42421 */ MCD_OPC_CheckField, 21, 1, 0, 123, 13, // Skip to: 45878
-/* 42427 */ MCD_OPC_Decode, 150, 10, 209, 2, // Opcode: LSFP16_STUR
-/* 42432 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 42451
-/* 42436 */ MCD_OPC_CheckPredicate, 1, 110, 13, // Skip to: 45878
-/* 42440 */ MCD_OPC_CheckField, 21, 1, 0, 104, 13, // Skip to: 45878
-/* 42446 */ MCD_OPC_Decode, 146, 10, 238, 1, // Opcode: LSFP16_PostInd_STR
-/* 42451 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 42496
-/* 42455 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 42458 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 42477
-/* 42462 */ MCD_OPC_CheckPredicate, 1, 84, 13, // Skip to: 45878
-/* 42466 */ MCD_OPC_CheckField, 21, 1, 1, 78, 13, // Skip to: 45878
-/* 42472 */ MCD_OPC_Decode, 152, 10, 210, 2, // Opcode: LSFP16_Wm_RegOffset_STR
-/* 42477 */ MCD_OPC_FilterValue, 1, 69, 13, // Skip to: 45878
-/* 42481 */ MCD_OPC_CheckPredicate, 1, 65, 13, // Skip to: 45878
-/* 42485 */ MCD_OPC_CheckField, 21, 1, 1, 59, 13, // Skip to: 45878
-/* 42491 */ MCD_OPC_Decode, 154, 10, 211, 2, // Opcode: LSFP16_Xm_RegOffset_STR
-/* 42496 */ MCD_OPC_FilterValue, 3, 50, 13, // Skip to: 45878
-/* 42500 */ MCD_OPC_CheckPredicate, 1, 46, 13, // Skip to: 45878
-/* 42504 */ MCD_OPC_CheckField, 21, 1, 0, 40, 13, // Skip to: 45878
-/* 42510 */ MCD_OPC_Decode, 148, 10, 238, 1, // Opcode: LSFP16_PreInd_STR
-/* 42515 */ MCD_OPC_FilterValue, 1, 105, 0, // Skip to: 42624
-/* 42519 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 42522 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 42541
-/* 42526 */ MCD_OPC_CheckPredicate, 1, 20, 13, // Skip to: 45878
-/* 42530 */ MCD_OPC_CheckField, 21, 1, 0, 14, 13, // Skip to: 45878
-/* 42536 */ MCD_OPC_Decode, 144, 10, 209, 2, // Opcode: LSFP16_LDUR
-/* 42541 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 42560
-/* 42545 */ MCD_OPC_CheckPredicate, 1, 1, 13, // Skip to: 45878
-/* 42549 */ MCD_OPC_CheckField, 21, 1, 0, 251, 12, // Skip to: 45878
-/* 42555 */ MCD_OPC_Decode, 145, 10, 238, 1, // Opcode: LSFP16_PostInd_LDR
-/* 42560 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 42605
-/* 42564 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 42567 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 42586
-/* 42571 */ MCD_OPC_CheckPredicate, 1, 231, 12, // Skip to: 45878
-/* 42575 */ MCD_OPC_CheckField, 21, 1, 1, 225, 12, // Skip to: 45878
-/* 42581 */ MCD_OPC_Decode, 151, 10, 210, 2, // Opcode: LSFP16_Wm_RegOffset_LDR
-/* 42586 */ MCD_OPC_FilterValue, 1, 216, 12, // Skip to: 45878
-/* 42590 */ MCD_OPC_CheckPredicate, 1, 212, 12, // Skip to: 45878
-/* 42594 */ MCD_OPC_CheckField, 21, 1, 1, 206, 12, // Skip to: 45878
-/* 42600 */ MCD_OPC_Decode, 153, 10, 211, 2, // Opcode: LSFP16_Xm_RegOffset_LDR
-/* 42605 */ MCD_OPC_FilterValue, 3, 197, 12, // Skip to: 45878
-/* 42609 */ MCD_OPC_CheckPredicate, 1, 193, 12, // Skip to: 45878
-/* 42613 */ MCD_OPC_CheckField, 21, 1, 0, 187, 12, // Skip to: 45878
-/* 42619 */ MCD_OPC_Decode, 147, 10, 238, 1, // Opcode: LSFP16_PreInd_LDR
-/* 42624 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 42637
-/* 42628 */ MCD_OPC_CheckPredicate, 1, 174, 12, // Skip to: 45878
-/* 42632 */ MCD_OPC_Decode, 149, 10, 212, 2, // Opcode: LSFP16_STR
-/* 42637 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 42650
-/* 42641 */ MCD_OPC_CheckPredicate, 1, 161, 12, // Skip to: 45878
-/* 42645 */ MCD_OPC_Decode, 143, 10, 212, 2, // Opcode: LSFP16_LDR
-/* 42650 */ MCD_OPC_FilterValue, 8, 60, 1, // Skip to: 42970
-/* 42654 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 42657 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 42676
-/* 42661 */ MCD_OPC_CheckPredicate, 0, 141, 12, // Skip to: 45878
-/* 42665 */ MCD_OPC_CheckField, 21, 1, 1, 135, 12, // Skip to: 45878
-/* 42671 */ MCD_OPC_Decode, 132, 20, 172, 2, // Opcode: UQADDbbb
-/* 42676 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 42695
-/* 42680 */ MCD_OPC_CheckPredicate, 0, 122, 12, // Skip to: 45878
-/* 42684 */ MCD_OPC_CheckField, 16, 6, 33, 116, 12, // Skip to: 45878
-/* 42690 */ MCD_OPC_Decode, 168, 15, 177, 2, // Opcode: SQXTUNbh
-/* 42695 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 42714
-/* 42699 */ MCD_OPC_CheckPredicate, 0, 103, 12, // Skip to: 45878
-/* 42703 */ MCD_OPC_CheckField, 21, 1, 1, 97, 12, // Skip to: 45878
-/* 42709 */ MCD_OPC_Decode, 194, 20, 172, 2, // Opcode: UQSUBbbb
-/* 42714 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 42733
-/* 42718 */ MCD_OPC_CheckPredicate, 0, 84, 12, // Skip to: 45878
-/* 42722 */ MCD_OPC_CheckField, 16, 6, 32, 78, 12, // Skip to: 45878
-/* 42728 */ MCD_OPC_Decode, 149, 21, 174, 2, // Opcode: USQADDbb
-/* 42733 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 42752
-/* 42737 */ MCD_OPC_CheckPredicate, 0, 65, 12, // Skip to: 45878
-/* 42741 */ MCD_OPC_CheckField, 16, 6, 33, 59, 12, // Skip to: 45878
-/* 42747 */ MCD_OPC_Decode, 211, 20, 177, 2, // Opcode: UQXTNbh
-/* 42752 */ MCD_OPC_FilterValue, 19, 15, 0, // Skip to: 42771
-/* 42756 */ MCD_OPC_CheckPredicate, 0, 46, 12, // Skip to: 45878
-/* 42760 */ MCD_OPC_CheckField, 21, 1, 1, 40, 12, // Skip to: 45878
-/* 42766 */ MCD_OPC_Decode, 163, 20, 172, 2, // Opcode: UQSHLbbb
-/* 42771 */ MCD_OPC_FilterValue, 23, 15, 0, // Skip to: 42790
-/* 42775 */ MCD_OPC_CheckPredicate, 0, 27, 12, // Skip to: 45878
-/* 42779 */ MCD_OPC_CheckField, 21, 1, 1, 21, 12, // Skip to: 45878
-/* 42785 */ MCD_OPC_Decode, 143, 20, 172, 2, // Opcode: UQRSHLbbb
-/* 42790 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 42809
-/* 42794 */ MCD_OPC_CheckPredicate, 0, 8, 12, // Skip to: 45878
-/* 42798 */ MCD_OPC_CheckField, 16, 6, 32, 2, 12, // Skip to: 45878
-/* 42804 */ MCD_OPC_Decode, 184, 14, 178, 2, // Opcode: SQNEGbb
-/* 42809 */ MCD_OPC_FilterValue, 42, 15, 0, // Skip to: 42828
-/* 42813 */ MCD_OPC_CheckPredicate, 0, 245, 11, // Skip to: 45878
-/* 42817 */ MCD_OPC_CheckField, 16, 6, 33, 239, 11, // Skip to: 45878
-/* 42823 */ MCD_OPC_Decode, 224, 4, 139, 2, // Opcode: FCVTNUss
-/* 42828 */ MCD_OPC_FilterValue, 46, 15, 0, // Skip to: 42847
-/* 42832 */ MCD_OPC_CheckPredicate, 0, 226, 11, // Skip to: 45878
-/* 42836 */ MCD_OPC_CheckField, 16, 6, 33, 220, 11, // Skip to: 45878
-/* 42842 */ MCD_OPC_Decode, 202, 4, 139, 2, // Opcode: FCVTMUss
-/* 42847 */ MCD_OPC_FilterValue, 50, 29, 0, // Skip to: 42880
-/* 42851 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 42854 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 42867
-/* 42858 */ MCD_OPC_CheckPredicate, 0, 200, 11, // Skip to: 45878
-/* 42862 */ MCD_OPC_Decode, 180, 4, 139, 2, // Opcode: FCVTAUss
-/* 42867 */ MCD_OPC_FilterValue, 48, 191, 11, // Skip to: 45878
-/* 42871 */ MCD_OPC_CheckPredicate, 0, 187, 11, // Skip to: 45878
-/* 42875 */ MCD_OPC_Decode, 166, 5, 134, 1, // Opcode: FMAXNMPvv_S_2S
-/* 42880 */ MCD_OPC_FilterValue, 54, 29, 0, // Skip to: 42913
-/* 42884 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 42887 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 42900
-/* 42891 */ MCD_OPC_CheckPredicate, 0, 167, 11, // Skip to: 45878
-/* 42895 */ MCD_OPC_Decode, 170, 19, 139, 2, // Opcode: UCVTFss
-/* 42900 */ MCD_OPC_FilterValue, 48, 158, 11, // Skip to: 45878
-/* 42904 */ MCD_OPC_CheckPredicate, 0, 154, 11, // Skip to: 45878
-/* 42908 */ MCD_OPC_Decode, 235, 3, 134, 1, // Opcode: FADDPvv_S_2S
-/* 42913 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 42932
-/* 42917 */ MCD_OPC_CheckPredicate, 0, 141, 11, // Skip to: 45878
-/* 42921 */ MCD_OPC_CheckField, 21, 1, 1, 135, 11, // Skip to: 45878
-/* 42927 */ MCD_OPC_Decode, 130, 4, 144, 2, // Opcode: FCMGEsss
-/* 42932 */ MCD_OPC_FilterValue, 59, 15, 0, // Skip to: 42951
-/* 42936 */ MCD_OPC_CheckPredicate, 0, 122, 11, // Skip to: 45878
-/* 42940 */ MCD_OPC_CheckField, 21, 1, 1, 116, 11, // Skip to: 45878
-/* 42946 */ MCD_OPC_Decode, 222, 3, 144, 2, // Opcode: FACGEsss
-/* 42951 */ MCD_OPC_FilterValue, 62, 107, 11, // Skip to: 45878
-/* 42955 */ MCD_OPC_CheckPredicate, 0, 103, 11, // Skip to: 45878
-/* 42959 */ MCD_OPC_CheckField, 16, 6, 48, 97, 11, // Skip to: 45878
-/* 42965 */ MCD_OPC_Decode, 177, 5, 134, 1, // Opcode: FMAXPvv_S_2S
-/* 42970 */ MCD_OPC_FilterValue, 9, 89, 1, // Skip to: 43319
-/* 42974 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 42977 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 42996
-/* 42981 */ MCD_OPC_CheckPredicate, 0, 77, 11, // Skip to: 45878
-/* 42985 */ MCD_OPC_CheckField, 21, 1, 1, 71, 11, // Skip to: 45878
-/* 42991 */ MCD_OPC_Decode, 134, 20, 173, 2, // Opcode: UQADDhhh
-/* 42996 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 43015
-/* 43000 */ MCD_OPC_CheckPredicate, 0, 58, 11, // Skip to: 45878
-/* 43004 */ MCD_OPC_CheckField, 16, 6, 33, 52, 11, // Skip to: 45878
-/* 43010 */ MCD_OPC_Decode, 169, 15, 141, 2, // Opcode: SQXTUNhs
-/* 43015 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 43034
-/* 43019 */ MCD_OPC_CheckPredicate, 0, 39, 11, // Skip to: 45878
-/* 43023 */ MCD_OPC_CheckField, 21, 1, 1, 33, 11, // Skip to: 45878
-/* 43029 */ MCD_OPC_Decode, 196, 20, 173, 2, // Opcode: UQSUBhhh
-/* 43034 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 43053
-/* 43038 */ MCD_OPC_CheckPredicate, 0, 20, 11, // Skip to: 45878
-/* 43042 */ MCD_OPC_CheckField, 16, 6, 32, 14, 11, // Skip to: 45878
-/* 43048 */ MCD_OPC_Decode, 151, 21, 175, 2, // Opcode: USQADDhh
-/* 43053 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 43072
-/* 43057 */ MCD_OPC_CheckPredicate, 0, 1, 11, // Skip to: 45878
-/* 43061 */ MCD_OPC_CheckField, 16, 6, 33, 251, 10, // Skip to: 45878
-/* 43067 */ MCD_OPC_Decode, 212, 20, 141, 2, // Opcode: UQXTNhs
-/* 43072 */ MCD_OPC_FilterValue, 19, 15, 0, // Skip to: 43091
-/* 43076 */ MCD_OPC_CheckPredicate, 0, 238, 10, // Skip to: 45878
-/* 43080 */ MCD_OPC_CheckField, 21, 1, 1, 232, 10, // Skip to: 45878
-/* 43086 */ MCD_OPC_Decode, 167, 20, 173, 2, // Opcode: UQSHLhhh
-/* 43091 */ MCD_OPC_FilterValue, 23, 15, 0, // Skip to: 43110
-/* 43095 */ MCD_OPC_CheckPredicate, 0, 219, 10, // Skip to: 45878
-/* 43099 */ MCD_OPC_CheckField, 21, 1, 1, 213, 10, // Skip to: 45878
-/* 43105 */ MCD_OPC_Decode, 145, 20, 173, 2, // Opcode: UQRSHLhhh
-/* 43110 */ MCD_OPC_FilterValue, 26, 15, 0, // Skip to: 43129
-/* 43114 */ MCD_OPC_CheckPredicate, 0, 200, 10, // Skip to: 45878
-/* 43118 */ MCD_OPC_CheckField, 16, 6, 33, 194, 10, // Skip to: 45878
-/* 43124 */ MCD_OPC_Decode, 247, 4, 134, 1, // Opcode: FCVTXN
-/* 43129 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 43148
-/* 43133 */ MCD_OPC_CheckPredicate, 0, 181, 10, // Skip to: 45878
-/* 43137 */ MCD_OPC_CheckField, 16, 6, 32, 175, 10, // Skip to: 45878
-/* 43143 */ MCD_OPC_Decode, 186, 14, 179, 2, // Opcode: SQNEGhh
-/* 43148 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 43166
-/* 43152 */ MCD_OPC_CheckPredicate, 0, 162, 10, // Skip to: 45878
-/* 43156 */ MCD_OPC_CheckField, 16, 6, 33, 156, 10, // Skip to: 45878
-/* 43162 */ MCD_OPC_Decode, 223, 4, 79, // Opcode: FCVTNUdd
-/* 43166 */ MCD_OPC_FilterValue, 45, 15, 0, // Skip to: 43185
-/* 43170 */ MCD_OPC_CheckPredicate, 0, 144, 10, // Skip to: 45878
-/* 43174 */ MCD_OPC_CheckField, 21, 1, 1, 138, 10, // Skip to: 45878
-/* 43180 */ MCD_OPC_Decode, 188, 14, 173, 2, // Opcode: SQRDMULHhhh
-/* 43185 */ MCD_OPC_FilterValue, 46, 14, 0, // Skip to: 43203
-/* 43189 */ MCD_OPC_CheckPredicate, 0, 125, 10, // Skip to: 45878
-/* 43193 */ MCD_OPC_CheckField, 16, 6, 33, 119, 10, // Skip to: 45878
-/* 43199 */ MCD_OPC_Decode, 201, 4, 79, // Opcode: FCVTMUdd
-/* 43203 */ MCD_OPC_FilterValue, 50, 27, 0, // Skip to: 43234
-/* 43207 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 43210 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 43222
-/* 43214 */ MCD_OPC_CheckPredicate, 0, 100, 10, // Skip to: 45878
-/* 43218 */ MCD_OPC_Decode, 179, 4, 79, // Opcode: FCVTAUdd
-/* 43222 */ MCD_OPC_FilterValue, 48, 92, 10, // Skip to: 45878
-/* 43226 */ MCD_OPC_CheckPredicate, 0, 88, 10, // Skip to: 45878
-/* 43230 */ MCD_OPC_Decode, 165, 5, 84, // Opcode: FMAXNMPvv_D_2D
-/* 43234 */ MCD_OPC_FilterValue, 54, 27, 0, // Skip to: 43265
-/* 43238 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 43241 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 43253
-/* 43245 */ MCD_OPC_CheckPredicate, 0, 69, 10, // Skip to: 45878
-/* 43249 */ MCD_OPC_Decode, 165, 19, 79, // Opcode: UCVTFdd
-/* 43253 */ MCD_OPC_FilterValue, 48, 61, 10, // Skip to: 45878
-/* 43257 */ MCD_OPC_CheckPredicate, 0, 57, 10, // Skip to: 45878
-/* 43261 */ MCD_OPC_Decode, 234, 3, 84, // Opcode: FADDPvv_D_2D
-/* 43265 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 43283
-/* 43269 */ MCD_OPC_CheckPredicate, 0, 45, 10, // Skip to: 45878
-/* 43273 */ MCD_OPC_CheckField, 21, 1, 1, 39, 10, // Skip to: 45878
-/* 43279 */ MCD_OPC_Decode, 129, 4, 78, // Opcode: FCMGEddd
-/* 43283 */ MCD_OPC_FilterValue, 59, 14, 0, // Skip to: 43301
-/* 43287 */ MCD_OPC_CheckPredicate, 0, 27, 10, // Skip to: 45878
-/* 43291 */ MCD_OPC_CheckField, 21, 1, 1, 21, 10, // Skip to: 45878
-/* 43297 */ MCD_OPC_Decode, 221, 3, 78, // Opcode: FACGEddd
-/* 43301 */ MCD_OPC_FilterValue, 62, 13, 10, // Skip to: 45878
-/* 43305 */ MCD_OPC_CheckPredicate, 0, 9, 10, // Skip to: 45878
-/* 43309 */ MCD_OPC_CheckField, 16, 6, 48, 3, 10, // Skip to: 45878
-/* 43315 */ MCD_OPC_Decode, 176, 5, 84, // Opcode: FMAXPvv_D_2D
-/* 43319 */ MCD_OPC_FilterValue, 10, 98, 1, // Skip to: 43677
-/* 43323 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 43326 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 43345
-/* 43330 */ MCD_OPC_CheckPredicate, 0, 240, 9, // Skip to: 45878
-/* 43334 */ MCD_OPC_CheckField, 21, 1, 1, 234, 9, // Skip to: 45878
-/* 43340 */ MCD_OPC_Decode, 135, 20, 144, 2, // Opcode: UQADDsss
-/* 43345 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 43364
-/* 43349 */ MCD_OPC_CheckPredicate, 0, 221, 9, // Skip to: 45878
-/* 43353 */ MCD_OPC_CheckField, 16, 6, 33, 215, 9, // Skip to: 45878
-/* 43359 */ MCD_OPC_Decode, 170, 15, 134, 1, // Opcode: SQXTUNsd
-/* 43364 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 43383
-/* 43368 */ MCD_OPC_CheckPredicate, 0, 202, 9, // Skip to: 45878
-/* 43372 */ MCD_OPC_CheckField, 21, 1, 1, 196, 9, // Skip to: 45878
-/* 43378 */ MCD_OPC_Decode, 197, 20, 144, 2, // Opcode: UQSUBsss
-/* 43383 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 43402
-/* 43387 */ MCD_OPC_CheckPredicate, 0, 183, 9, // Skip to: 45878
-/* 43391 */ MCD_OPC_CheckField, 16, 6, 32, 177, 9, // Skip to: 45878
-/* 43397 */ MCD_OPC_Decode, 152, 21, 176, 2, // Opcode: USQADDss
-/* 43402 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 43421
-/* 43406 */ MCD_OPC_CheckPredicate, 0, 164, 9, // Skip to: 45878
-/* 43410 */ MCD_OPC_CheckField, 16, 6, 33, 158, 9, // Skip to: 45878
-/* 43416 */ MCD_OPC_Decode, 213, 20, 134, 1, // Opcode: UQXTNsd
-/* 43421 */ MCD_OPC_FilterValue, 19, 15, 0, // Skip to: 43440
-/* 43425 */ MCD_OPC_CheckPredicate, 0, 145, 9, // Skip to: 45878
-/* 43429 */ MCD_OPC_CheckField, 21, 1, 1, 139, 9, // Skip to: 45878
-/* 43435 */ MCD_OPC_Decode, 170, 20, 144, 2, // Opcode: UQSHLsss
-/* 43440 */ MCD_OPC_FilterValue, 23, 15, 0, // Skip to: 43459
-/* 43444 */ MCD_OPC_CheckPredicate, 0, 126, 9, // Skip to: 45878
-/* 43448 */ MCD_OPC_CheckField, 21, 1, 1, 120, 9, // Skip to: 45878
-/* 43454 */ MCD_OPC_Decode, 146, 20, 144, 2, // Opcode: UQRSHLsss
-/* 43459 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 43478
-/* 43463 */ MCD_OPC_CheckPredicate, 0, 107, 9, // Skip to: 45878
-/* 43467 */ MCD_OPC_CheckField, 16, 6, 32, 101, 9, // Skip to: 45878
-/* 43473 */ MCD_OPC_Decode, 187, 14, 139, 2, // Opcode: SQNEGss
-/* 43478 */ MCD_OPC_FilterValue, 42, 15, 0, // Skip to: 43497
-/* 43482 */ MCD_OPC_CheckPredicate, 0, 88, 9, // Skip to: 45878
-/* 43486 */ MCD_OPC_CheckField, 16, 6, 33, 82, 9, // Skip to: 45878
-/* 43492 */ MCD_OPC_Decode, 242, 4, 139, 2, // Opcode: FCVTPUss
-/* 43497 */ MCD_OPC_FilterValue, 45, 15, 0, // Skip to: 43516
-/* 43501 */ MCD_OPC_CheckPredicate, 0, 69, 9, // Skip to: 45878
-/* 43505 */ MCD_OPC_CheckField, 21, 1, 1, 63, 9, // Skip to: 45878
-/* 43511 */ MCD_OPC_Decode, 191, 14, 144, 2, // Opcode: SQRDMULHsss
-/* 43516 */ MCD_OPC_FilterValue, 46, 15, 0, // Skip to: 43535
-/* 43520 */ MCD_OPC_CheckPredicate, 0, 50, 9, // Skip to: 45878
-/* 43524 */ MCD_OPC_CheckField, 16, 6, 33, 44, 9, // Skip to: 45878
-/* 43530 */ MCD_OPC_Decode, 143, 5, 139, 2, // Opcode: FCVTZUss
-/* 43535 */ MCD_OPC_FilterValue, 50, 29, 0, // Skip to: 43568
-/* 43539 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 43542 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 43555
-/* 43546 */ MCD_OPC_CheckPredicate, 0, 24, 9, // Skip to: 45878
-/* 43550 */ MCD_OPC_Decode, 128, 4, 139, 2, // Opcode: FCMGEZssi
-/* 43555 */ MCD_OPC_FilterValue, 48, 15, 9, // Skip to: 45878
-/* 43559 */ MCD_OPC_CheckPredicate, 0, 11, 9, // Skip to: 45878
-/* 43563 */ MCD_OPC_Decode, 188, 5, 134, 1, // Opcode: FMINNMPvv_S_2S
-/* 43568 */ MCD_OPC_FilterValue, 53, 15, 0, // Skip to: 43587
-/* 43572 */ MCD_OPC_CheckPredicate, 0, 254, 8, // Skip to: 45878
-/* 43576 */ MCD_OPC_CheckField, 21, 1, 1, 248, 8, // Skip to: 45878
-/* 43582 */ MCD_OPC_Decode, 212, 3, 144, 2, // Opcode: FABDsss
-/* 43587 */ MCD_OPC_FilterValue, 54, 29, 0, // Skip to: 43620
-/* 43591 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 43594 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 43607
-/* 43598 */ MCD_OPC_CheckPredicate, 0, 228, 8, // Skip to: 45878
-/* 43602 */ MCD_OPC_Decode, 148, 4, 139, 2, // Opcode: FCMLEZssi
-/* 43607 */ MCD_OPC_FilterValue, 33, 219, 8, // Skip to: 45878
-/* 43611 */ MCD_OPC_CheckPredicate, 0, 215, 8, // Skip to: 45878
-/* 43615 */ MCD_OPC_Decode, 194, 6, 139, 2, // Opcode: FRSQRTEss
-/* 43620 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 43639
-/* 43624 */ MCD_OPC_CheckPredicate, 0, 202, 8, // Skip to: 45878
-/* 43628 */ MCD_OPC_CheckField, 21, 1, 1, 196, 8, // Skip to: 45878
-/* 43634 */ MCD_OPC_Decode, 140, 4, 144, 2, // Opcode: FCMGTsss
-/* 43639 */ MCD_OPC_FilterValue, 59, 15, 0, // Skip to: 43658
-/* 43643 */ MCD_OPC_CheckPredicate, 0, 183, 8, // Skip to: 45878
-/* 43647 */ MCD_OPC_CheckField, 21, 1, 1, 177, 8, // Skip to: 45878
-/* 43653 */ MCD_OPC_Decode, 227, 3, 144, 2, // Opcode: FACGTsss
-/* 43658 */ MCD_OPC_FilterValue, 62, 168, 8, // Skip to: 45878
-/* 43662 */ MCD_OPC_CheckPredicate, 0, 164, 8, // Skip to: 45878
-/* 43666 */ MCD_OPC_CheckField, 16, 6, 48, 158, 8, // Skip to: 45878
-/* 43672 */ MCD_OPC_Decode, 199, 5, 134, 1, // Opcode: FMINPvv_S_2S
-/* 43677 */ MCD_OPC_FilterValue, 11, 182, 1, // Skip to: 44119
-/* 43681 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 43684 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 43702
-/* 43688 */ MCD_OPC_CheckPredicate, 0, 138, 8, // Skip to: 45878
-/* 43692 */ MCD_OPC_CheckField, 21, 1, 1, 132, 8, // Skip to: 45878
-/* 43698 */ MCD_OPC_Decode, 133, 20, 78, // Opcode: UQADDddd
-/* 43702 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 43720
-/* 43706 */ MCD_OPC_CheckPredicate, 0, 120, 8, // Skip to: 45878
-/* 43710 */ MCD_OPC_CheckField, 21, 1, 1, 114, 8, // Skip to: 45878
-/* 43716 */ MCD_OPC_Decode, 195, 20, 78, // Opcode: UQSUBddd
-/* 43720 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 43738
-/* 43724 */ MCD_OPC_CheckPredicate, 0, 102, 8, // Skip to: 45878
-/* 43728 */ MCD_OPC_CheckField, 21, 1, 1, 96, 8, // Skip to: 45878
-/* 43734 */ MCD_OPC_Decode, 186, 2, 78, // Opcode: CMHIddd
-/* 43738 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 43756
-/* 43742 */ MCD_OPC_CheckPredicate, 0, 84, 8, // Skip to: 45878
-/* 43746 */ MCD_OPC_CheckField, 16, 6, 32, 78, 8, // Skip to: 45878
-/* 43752 */ MCD_OPC_Decode, 150, 21, 88, // Opcode: USQADDdd
-/* 43756 */ MCD_OPC_FilterValue, 15, 14, 0, // Skip to: 43774
-/* 43760 */ MCD_OPC_CheckPredicate, 0, 66, 8, // Skip to: 45878
-/* 43764 */ MCD_OPC_CheckField, 21, 1, 1, 60, 8, // Skip to: 45878
-/* 43770 */ MCD_OPC_Decode, 194, 2, 78, // Opcode: CMHSddd
-/* 43774 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 43792
-/* 43778 */ MCD_OPC_CheckPredicate, 0, 48, 8, // Skip to: 45878
-/* 43782 */ MCD_OPC_CheckField, 21, 1, 1, 42, 8, // Skip to: 45878
-/* 43788 */ MCD_OPC_Decode, 254, 20, 78, // Opcode: USHLddd
-/* 43792 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 43810
-/* 43796 */ MCD_OPC_CheckPredicate, 0, 30, 8, // Skip to: 45878
-/* 43800 */ MCD_OPC_CheckField, 21, 1, 1, 24, 8, // Skip to: 45878
-/* 43806 */ MCD_OPC_Decode, 165, 20, 78, // Opcode: UQSHLddd
-/* 43810 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 43828
-/* 43814 */ MCD_OPC_CheckPredicate, 0, 12, 8, // Skip to: 45878
-/* 43818 */ MCD_OPC_CheckField, 21, 1, 1, 6, 8, // Skip to: 45878
-/* 43824 */ MCD_OPC_Decode, 222, 20, 78, // Opcode: URSHLddd
-/* 43828 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 43846
-/* 43832 */ MCD_OPC_CheckPredicate, 0, 250, 7, // Skip to: 45878
-/* 43836 */ MCD_OPC_CheckField, 21, 1, 1, 244, 7, // Skip to: 45878
-/* 43842 */ MCD_OPC_Decode, 144, 20, 78, // Opcode: UQRSHLddd
-/* 43846 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 43864
-/* 43850 */ MCD_OPC_CheckPredicate, 0, 232, 7, // Skip to: 45878
-/* 43854 */ MCD_OPC_CheckField, 16, 6, 32, 226, 7, // Skip to: 45878
-/* 43860 */ MCD_OPC_Decode, 185, 14, 79, // Opcode: SQNEGdd
-/* 43864 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 43882
-/* 43868 */ MCD_OPC_CheckPredicate, 0, 214, 7, // Skip to: 45878
-/* 43872 */ MCD_OPC_CheckField, 21, 1, 1, 208, 7, // Skip to: 45878
-/* 43878 */ MCD_OPC_Decode, 246, 17, 78, // Opcode: SUBddd
-/* 43882 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 43900
-/* 43886 */ MCD_OPC_CheckPredicate, 0, 196, 7, // Skip to: 45878
-/* 43890 */ MCD_OPC_CheckField, 16, 6, 32, 190, 7, // Skip to: 45878
-/* 43896 */ MCD_OPC_Decode, 155, 2, 79, // Opcode: CMGEddi
-/* 43900 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 43918
-/* 43904 */ MCD_OPC_CheckPredicate, 0, 178, 7, // Skip to: 45878
-/* 43908 */ MCD_OPC_CheckField, 21, 1, 1, 172, 7, // Skip to: 45878
-/* 43914 */ MCD_OPC_Decode, 138, 2, 78, // Opcode: CMEQddd
-/* 43918 */ MCD_OPC_FilterValue, 38, 14, 0, // Skip to: 43936
-/* 43922 */ MCD_OPC_CheckPredicate, 0, 160, 7, // Skip to: 45878
-/* 43926 */ MCD_OPC_CheckField, 16, 6, 32, 154, 7, // Skip to: 45878
-/* 43932 */ MCD_OPC_Decode, 202, 2, 79, // Opcode: CMLEddi
-/* 43936 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 43954
-/* 43940 */ MCD_OPC_CheckPredicate, 0, 142, 7, // Skip to: 45878
-/* 43944 */ MCD_OPC_CheckField, 16, 6, 33, 136, 7, // Skip to: 45878
-/* 43950 */ MCD_OPC_Decode, 241, 4, 79, // Opcode: FCVTPUdd
-/* 43954 */ MCD_OPC_FilterValue, 46, 27, 0, // Skip to: 43985
-/* 43958 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 43961 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 43973
-/* 43965 */ MCD_OPC_CheckPredicate, 0, 117, 7, // Skip to: 45878
-/* 43969 */ MCD_OPC_Decode, 185, 11, 79, // Opcode: NEGdd
-/* 43973 */ MCD_OPC_FilterValue, 33, 109, 7, // Skip to: 45878
-/* 43977 */ MCD_OPC_CheckPredicate, 0, 105, 7, // Skip to: 45878
-/* 43981 */ MCD_OPC_Decode, 142, 5, 79, // Opcode: FCVTZUdd
-/* 43985 */ MCD_OPC_FilterValue, 50, 27, 0, // Skip to: 44016
-/* 43989 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 43992 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 44004
-/* 43996 */ MCD_OPC_CheckPredicate, 0, 86, 7, // Skip to: 45878
-/* 44000 */ MCD_OPC_Decode, 255, 3, 79, // Opcode: FCMGEZddi
-/* 44004 */ MCD_OPC_FilterValue, 48, 78, 7, // Skip to: 45878
-/* 44008 */ MCD_OPC_CheckPredicate, 0, 74, 7, // Skip to: 45878
-/* 44012 */ MCD_OPC_Decode, 187, 5, 84, // Opcode: FMINNMPvv_D_2D
-/* 44016 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 44034
-/* 44020 */ MCD_OPC_CheckPredicate, 0, 62, 7, // Skip to: 45878
-/* 44024 */ MCD_OPC_CheckField, 21, 1, 1, 56, 7, // Skip to: 45878
-/* 44030 */ MCD_OPC_Decode, 211, 3, 78, // Opcode: FABDddd
-/* 44034 */ MCD_OPC_FilterValue, 54, 27, 0, // Skip to: 44065
-/* 44038 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
-/* 44041 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 44053
-/* 44045 */ MCD_OPC_CheckPredicate, 0, 37, 7, // Skip to: 45878
-/* 44049 */ MCD_OPC_Decode, 147, 4, 79, // Opcode: FCMLEZddi
-/* 44053 */ MCD_OPC_FilterValue, 33, 29, 7, // Skip to: 45878
-/* 44057 */ MCD_OPC_CheckPredicate, 0, 25, 7, // Skip to: 45878
-/* 44061 */ MCD_OPC_Decode, 193, 6, 79, // Opcode: FRSQRTEdd
-/* 44065 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 44083
-/* 44069 */ MCD_OPC_CheckPredicate, 0, 13, 7, // Skip to: 45878
-/* 44073 */ MCD_OPC_CheckField, 21, 1, 1, 7, 7, // Skip to: 45878
-/* 44079 */ MCD_OPC_Decode, 139, 4, 78, // Opcode: FCMGTddd
-/* 44083 */ MCD_OPC_FilterValue, 59, 14, 0, // Skip to: 44101
-/* 44087 */ MCD_OPC_CheckPredicate, 0, 251, 6, // Skip to: 45878
-/* 44091 */ MCD_OPC_CheckField, 21, 1, 1, 245, 6, // Skip to: 45878
-/* 44097 */ MCD_OPC_Decode, 226, 3, 78, // Opcode: FACGTddd
-/* 44101 */ MCD_OPC_FilterValue, 62, 237, 6, // Skip to: 45878
-/* 44105 */ MCD_OPC_CheckPredicate, 0, 233, 6, // Skip to: 45878
-/* 44109 */ MCD_OPC_CheckField, 16, 6, 48, 227, 6, // Skip to: 45878
-/* 44115 */ MCD_OPC_Decode, 198, 5, 84, // Opcode: FMINPvv_D_2D
-/* 44119 */ MCD_OPC_FilterValue, 12, 139, 1, // Skip to: 44518
-/* 44123 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 44126 */ MCD_OPC_FilterValue, 25, 55, 0, // Skip to: 44185
-/* 44130 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 44133 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 44172
-/* 44137 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 44140 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 44159
-/* 44144 */ MCD_OPC_CheckPredicate, 0, 194, 6, // Skip to: 45878
-/* 44148 */ MCD_OPC_CheckField, 19, 1, 1, 188, 6, // Skip to: 45878
-/* 44154 */ MCD_OPC_Decode, 225, 14, 193, 2, // Opcode: SQSHLUbbi
-/* 44159 */ MCD_OPC_FilterValue, 1, 179, 6, // Skip to: 45878
-/* 44163 */ MCD_OPC_CheckPredicate, 0, 175, 6, // Skip to: 45878
-/* 44167 */ MCD_OPC_Decode, 227, 14, 194, 2, // Opcode: SQSHLUhhi
-/* 44172 */ MCD_OPC_FilterValue, 1, 166, 6, // Skip to: 45878
-/* 44176 */ MCD_OPC_CheckPredicate, 0, 162, 6, // Skip to: 45878
-/* 44180 */ MCD_OPC_Decode, 228, 14, 195, 2, // Opcode: SQSHLUssi
-/* 44185 */ MCD_OPC_FilterValue, 29, 55, 0, // Skip to: 44244
-/* 44189 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 44192 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 44231
-/* 44196 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 44199 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 44218
-/* 44203 */ MCD_OPC_CheckPredicate, 0, 135, 6, // Skip to: 45878
-/* 44207 */ MCD_OPC_CheckField, 19, 1, 1, 129, 6, // Skip to: 45878
-/* 44213 */ MCD_OPC_Decode, 164, 20, 193, 2, // Opcode: UQSHLbbi
-/* 44218 */ MCD_OPC_FilterValue, 1, 120, 6, // Skip to: 45878
-/* 44222 */ MCD_OPC_CheckPredicate, 0, 116, 6, // Skip to: 45878
-/* 44226 */ MCD_OPC_Decode, 168, 20, 194, 2, // Opcode: UQSHLhhi
-/* 44231 */ MCD_OPC_FilterValue, 1, 107, 6, // Skip to: 45878
-/* 44235 */ MCD_OPC_CheckPredicate, 0, 103, 6, // Skip to: 45878
-/* 44239 */ MCD_OPC_Decode, 169, 20, 195, 2, // Opcode: UQSHLssi
-/* 44244 */ MCD_OPC_FilterValue, 33, 55, 0, // Skip to: 44303
-/* 44248 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 44251 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 44290
-/* 44255 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 44258 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 44277
-/* 44262 */ MCD_OPC_CheckPredicate, 0, 76, 6, // Skip to: 45878
-/* 44266 */ MCD_OPC_CheckField, 19, 1, 1, 70, 6, // Skip to: 45878
-/* 44272 */ MCD_OPC_Decode, 139, 15, 196, 2, // Opcode: SQSHRUNbhi
-/* 44277 */ MCD_OPC_FilterValue, 1, 61, 6, // Skip to: 45878
-/* 44281 */ MCD_OPC_CheckPredicate, 0, 57, 6, // Skip to: 45878
-/* 44285 */ MCD_OPC_Decode, 140, 15, 197, 2, // Opcode: SQSHRUNhsi
-/* 44290 */ MCD_OPC_FilterValue, 1, 48, 6, // Skip to: 45878
-/* 44294 */ MCD_OPC_CheckPredicate, 0, 44, 6, // Skip to: 45878
-/* 44298 */ MCD_OPC_Decode, 141, 15, 198, 2, // Opcode: SQSHRUNsdi
-/* 44303 */ MCD_OPC_FilterValue, 35, 55, 0, // Skip to: 44362
-/* 44307 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 44310 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 44349
-/* 44314 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 44317 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 44336
-/* 44321 */ MCD_OPC_CheckPredicate, 0, 17, 6, // Skip to: 45878
-/* 44325 */ MCD_OPC_CheckField, 19, 1, 1, 11, 6, // Skip to: 45878
-/* 44331 */ MCD_OPC_Decode, 222, 14, 196, 2, // Opcode: SQRSHRUNbhi
-/* 44336 */ MCD_OPC_FilterValue, 1, 2, 6, // Skip to: 45878
-/* 44340 */ MCD_OPC_CheckPredicate, 0, 254, 5, // Skip to: 45878
-/* 44344 */ MCD_OPC_Decode, 223, 14, 197, 2, // Opcode: SQRSHRUNhsi
-/* 44349 */ MCD_OPC_FilterValue, 1, 245, 5, // Skip to: 45878
-/* 44353 */ MCD_OPC_CheckPredicate, 0, 241, 5, // Skip to: 45878
-/* 44357 */ MCD_OPC_Decode, 224, 14, 198, 2, // Opcode: SQRSHRUNsdi
-/* 44362 */ MCD_OPC_FilterValue, 37, 55, 0, // Skip to: 44421
-/* 44366 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 44369 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 44408
-/* 44373 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 44376 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 44395
-/* 44380 */ MCD_OPC_CheckPredicate, 0, 214, 5, // Skip to: 45878
-/* 44384 */ MCD_OPC_CheckField, 19, 1, 1, 208, 5, // Skip to: 45878
-/* 44390 */ MCD_OPC_Decode, 185, 20, 196, 2, // Opcode: UQSHRNbhi
-/* 44395 */ MCD_OPC_FilterValue, 1, 199, 5, // Skip to: 45878
-/* 44399 */ MCD_OPC_CheckPredicate, 0, 195, 5, // Skip to: 45878
-/* 44403 */ MCD_OPC_Decode, 186, 20, 197, 2, // Opcode: UQSHRNhsi
-/* 44408 */ MCD_OPC_FilterValue, 1, 186, 5, // Skip to: 45878
-/* 44412 */ MCD_OPC_CheckPredicate, 0, 182, 5, // Skip to: 45878
-/* 44416 */ MCD_OPC_Decode, 187, 20, 198, 2, // Opcode: UQSHRNsdi
-/* 44421 */ MCD_OPC_FilterValue, 39, 55, 0, // Skip to: 44480
-/* 44425 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
-/* 44428 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 44467
-/* 44432 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
-/* 44435 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 44454
-/* 44439 */ MCD_OPC_CheckPredicate, 0, 155, 5, // Skip to: 45878
-/* 44443 */ MCD_OPC_CheckField, 19, 1, 1, 149, 5, // Skip to: 45878
-/* 44449 */ MCD_OPC_Decode, 154, 20, 196, 2, // Opcode: UQRSHRNbhi
-/* 44454 */ MCD_OPC_FilterValue, 1, 140, 5, // Skip to: 45878
-/* 44458 */ MCD_OPC_CheckPredicate, 0, 136, 5, // Skip to: 45878
-/* 44462 */ MCD_OPC_Decode, 155, 20, 197, 2, // Opcode: UQRSHRNhsi
-/* 44467 */ MCD_OPC_FilterValue, 1, 127, 5, // Skip to: 45878
-/* 44471 */ MCD_OPC_CheckPredicate, 0, 123, 5, // Skip to: 45878
-/* 44475 */ MCD_OPC_Decode, 156, 20, 198, 2, // Opcode: UQRSHRNsdi
-/* 44480 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 44499
-/* 44484 */ MCD_OPC_CheckPredicate, 0, 110, 5, // Skip to: 45878
-/* 44488 */ MCD_OPC_CheckField, 21, 1, 1, 104, 5, // Skip to: 45878
-/* 44494 */ MCD_OPC_Decode, 164, 19, 208, 2, // Opcode: UCVTF_Nssi
-/* 44499 */ MCD_OPC_FilterValue, 63, 95, 5, // Skip to: 45878
-/* 44503 */ MCD_OPC_CheckPredicate, 0, 91, 5, // Skip to: 45878
-/* 44507 */ MCD_OPC_CheckField, 21, 1, 1, 85, 5, // Skip to: 45878
-/* 44513 */ MCD_OPC_Decode, 141, 5, 208, 2, // Opcode: FCVTZU_Nssi
-/* 44518 */ MCD_OPC_FilterValue, 13, 133, 0, // Skip to: 44655
-/* 44522 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
-/* 44525 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 44538
-/* 44529 */ MCD_OPC_CheckPredicate, 0, 65, 5, // Skip to: 45878
-/* 44533 */ MCD_OPC_Decode, 134, 21, 184, 2, // Opcode: USHRddi
-/* 44538 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 44551
-/* 44542 */ MCD_OPC_CheckPredicate, 0, 52, 5, // Skip to: 45878
-/* 44546 */ MCD_OPC_Decode, 153, 21, 185, 2, // Opcode: USRA
-/* 44551 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 44564
-/* 44555 */ MCD_OPC_CheckPredicate, 0, 39, 5, // Skip to: 45878
-/* 44559 */ MCD_OPC_Decode, 230, 20, 184, 2, // Opcode: URSHRddi
-/* 44564 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 44577
-/* 44568 */ MCD_OPC_CheckPredicate, 0, 26, 5, // Skip to: 45878
-/* 44572 */ MCD_OPC_Decode, 240, 20, 185, 2, // Opcode: URSRA
-/* 44577 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 44590
-/* 44581 */ MCD_OPC_CheckPredicate, 0, 13, 5, // Skip to: 45878
-/* 44585 */ MCD_OPC_Decode, 177, 15, 185, 2, // Opcode: SRI
-/* 44590 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 44603
-/* 44594 */ MCD_OPC_CheckPredicate, 0, 0, 5, // Skip to: 45878
-/* 44598 */ MCD_OPC_Decode, 146, 13, 213, 2, // Opcode: SLI
-/* 44603 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 44616
-/* 44607 */ MCD_OPC_CheckPredicate, 0, 243, 4, // Skip to: 45878
-/* 44611 */ MCD_OPC_Decode, 226, 14, 192, 2, // Opcode: SQSHLUddi
-/* 44616 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 44629
-/* 44620 */ MCD_OPC_CheckPredicate, 0, 230, 4, // Skip to: 45878
-/* 44624 */ MCD_OPC_Decode, 166, 20, 192, 2, // Opcode: UQSHLddi
-/* 44629 */ MCD_OPC_FilterValue, 57, 9, 0, // Skip to: 44642
-/* 44633 */ MCD_OPC_CheckPredicate, 0, 217, 4, // Skip to: 45878
-/* 44637 */ MCD_OPC_Decode, 163, 19, 184, 2, // Opcode: UCVTF_Nddi
-/* 44642 */ MCD_OPC_FilterValue, 63, 208, 4, // Skip to: 45878
-/* 44646 */ MCD_OPC_CheckPredicate, 0, 204, 4, // Skip to: 45878
-/* 44650 */ MCD_OPC_Decode, 140, 5, 184, 2, // Opcode: FCVTZU_Nddi
-/* 44655 */ MCD_OPC_FilterValue, 14, 21, 0, // Skip to: 44680
-/* 44659 */ MCD_OPC_CheckPredicate, 0, 191, 4, // Skip to: 45878
-/* 44663 */ MCD_OPC_CheckField, 12, 4, 9, 185, 4, // Skip to: 45878
-/* 44669 */ MCD_OPC_CheckField, 10, 1, 0, 179, 4, // Skip to: 45878
-/* 44675 */ MCD_OPC_Decode, 243, 5, 199, 2, // Opcode: FMULXssv_4S
-/* 44680 */ MCD_OPC_FilterValue, 15, 170, 4, // Skip to: 45878
-/* 44684 */ MCD_OPC_CheckPredicate, 0, 166, 4, // Skip to: 45878
-/* 44688 */ MCD_OPC_CheckField, 21, 1, 0, 160, 4, // Skip to: 45878
-/* 44694 */ MCD_OPC_CheckField, 12, 4, 9, 154, 4, // Skip to: 45878
-/* 44700 */ MCD_OPC_CheckField, 10, 1, 0, 148, 4, // Skip to: 45878
-/* 44706 */ MCD_OPC_Decode, 241, 5, 200, 2, // Opcode: FMULXddv_2D
-/* 44711 */ MCD_OPC_FilterValue, 4, 149, 2, // Skip to: 45376
-/* 44715 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
-/* 44718 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 44731
-/* 44722 */ MCD_OPC_CheckPredicate, 1, 128, 4, // Skip to: 45878
-/* 44726 */ MCD_OPC_Decode, 187, 9, 214, 2, // Opcode: LDRq_lit
-/* 44731 */ MCD_OPC_FilterValue, 2, 119, 4, // Skip to: 45878
-/* 44735 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
-/* 44738 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 44751
-/* 44742 */ MCD_OPC_CheckPredicate, 1, 108, 4, // Skip to: 45878
-/* 44746 */ MCD_OPC_Decode, 229, 12, 215, 2, // Opcode: SCVTFsxi
-/* 44751 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 44764
-/* 44755 */ MCD_OPC_CheckPredicate, 1, 95, 4, // Skip to: 45878
-/* 44759 */ MCD_OPC_Decode, 174, 19, 215, 2, // Opcode: UCVTFsxi
-/* 44764 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 44777
-/* 44768 */ MCD_OPC_CheckPredicate, 1, 82, 4, // Skip to: 45878
-/* 44772 */ MCD_OPC_Decode, 136, 5, 216, 2, // Opcode: FCVTZSxsi
-/* 44777 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 44790
-/* 44781 */ MCD_OPC_CheckPredicate, 1, 69, 4, // Skip to: 45878
-/* 44785 */ MCD_OPC_Decode, 151, 5, 216, 2, // Opcode: FCVTZUxsi
-/* 44790 */ MCD_OPC_FilterValue, 32, 15, 0, // Skip to: 44809
-/* 44794 */ MCD_OPC_CheckPredicate, 1, 56, 4, // Skip to: 45878
-/* 44798 */ MCD_OPC_CheckField, 10, 6, 0, 50, 4, // Skip to: 45878
-/* 44804 */ MCD_OPC_Decode, 219, 4, 217, 2, // Opcode: FCVTNSxs
-/* 44809 */ MCD_OPC_FilterValue, 33, 15, 0, // Skip to: 44828
-/* 44813 */ MCD_OPC_CheckPredicate, 1, 37, 4, // Skip to: 45878
-/* 44817 */ MCD_OPC_CheckField, 10, 6, 0, 31, 4, // Skip to: 45878
-/* 44823 */ MCD_OPC_Decode, 228, 4, 217, 2, // Opcode: FCVTNUxs
-/* 44828 */ MCD_OPC_FilterValue, 34, 15, 0, // Skip to: 44847
-/* 44832 */ MCD_OPC_CheckPredicate, 1, 18, 4, // Skip to: 45878
-/* 44836 */ MCD_OPC_CheckField, 10, 6, 0, 12, 4, // Skip to: 45878
-/* 44842 */ MCD_OPC_Decode, 228, 12, 218, 2, // Opcode: SCVTFsx
-/* 44847 */ MCD_OPC_FilterValue, 35, 15, 0, // Skip to: 44866
-/* 44851 */ MCD_OPC_CheckPredicate, 1, 255, 3, // Skip to: 45878
-/* 44855 */ MCD_OPC_CheckField, 10, 6, 0, 249, 3, // Skip to: 45878
-/* 44861 */ MCD_OPC_Decode, 173, 19, 218, 2, // Opcode: UCVTFsx
-/* 44866 */ MCD_OPC_FilterValue, 36, 15, 0, // Skip to: 44885
-/* 44870 */ MCD_OPC_CheckPredicate, 1, 236, 3, // Skip to: 45878
-/* 44874 */ MCD_OPC_CheckField, 10, 6, 0, 230, 3, // Skip to: 45878
-/* 44880 */ MCD_OPC_Decode, 175, 4, 217, 2, // Opcode: FCVTASxs
-/* 44885 */ MCD_OPC_FilterValue, 37, 15, 0, // Skip to: 44904
-/* 44889 */ MCD_OPC_CheckPredicate, 1, 217, 3, // Skip to: 45878
-/* 44893 */ MCD_OPC_CheckField, 10, 6, 0, 211, 3, // Skip to: 45878
-/* 44899 */ MCD_OPC_Decode, 184, 4, 217, 2, // Opcode: FCVTAUxs
-/* 44904 */ MCD_OPC_FilterValue, 40, 15, 0, // Skip to: 44923
-/* 44908 */ MCD_OPC_CheckPredicate, 1, 198, 3, // Skip to: 45878
-/* 44912 */ MCD_OPC_CheckField, 10, 6, 0, 192, 3, // Skip to: 45878
-/* 44918 */ MCD_OPC_Decode, 237, 4, 217, 2, // Opcode: FCVTPSxs
-/* 44923 */ MCD_OPC_FilterValue, 41, 15, 0, // Skip to: 44942
-/* 44927 */ MCD_OPC_CheckPredicate, 1, 179, 3, // Skip to: 45878
-/* 44931 */ MCD_OPC_CheckField, 10, 6, 0, 173, 3, // Skip to: 45878
-/* 44937 */ MCD_OPC_Decode, 246, 4, 217, 2, // Opcode: FCVTPUxs
-/* 44942 */ MCD_OPC_FilterValue, 48, 15, 0, // Skip to: 44961
-/* 44946 */ MCD_OPC_CheckPredicate, 1, 160, 3, // Skip to: 45878
-/* 44950 */ MCD_OPC_CheckField, 10, 6, 0, 154, 3, // Skip to: 45878
-/* 44956 */ MCD_OPC_Decode, 197, 4, 217, 2, // Opcode: FCVTMSxs
-/* 44961 */ MCD_OPC_FilterValue, 49, 15, 0, // Skip to: 44980
-/* 44965 */ MCD_OPC_CheckPredicate, 1, 141, 3, // Skip to: 45878
-/* 44969 */ MCD_OPC_CheckField, 10, 6, 0, 135, 3, // Skip to: 45878
-/* 44975 */ MCD_OPC_Decode, 206, 4, 217, 2, // Opcode: FCVTMUxs
-/* 44980 */ MCD_OPC_FilterValue, 56, 15, 0, // Skip to: 44999
-/* 44984 */ MCD_OPC_CheckPredicate, 1, 122, 3, // Skip to: 45878
-/* 44988 */ MCD_OPC_CheckField, 10, 6, 0, 116, 3, // Skip to: 45878
-/* 44994 */ MCD_OPC_Decode, 135, 5, 217, 2, // Opcode: FCVTZSxs
-/* 44999 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 45018
-/* 45003 */ MCD_OPC_CheckPredicate, 1, 103, 3, // Skip to: 45878
-/* 45007 */ MCD_OPC_CheckField, 10, 6, 0, 97, 3, // Skip to: 45878
-/* 45013 */ MCD_OPC_Decode, 150, 5, 217, 2, // Opcode: FCVTZUxs
-/* 45018 */ MCD_OPC_FilterValue, 66, 9, 0, // Skip to: 45031
-/* 45022 */ MCD_OPC_CheckPredicate, 1, 84, 3, // Skip to: 45878
-/* 45026 */ MCD_OPC_Decode, 224, 12, 219, 2, // Opcode: SCVTFdxi
-/* 45031 */ MCD_OPC_FilterValue, 67, 9, 0, // Skip to: 45044
-/* 45035 */ MCD_OPC_CheckPredicate, 1, 71, 3, // Skip to: 45878
-/* 45039 */ MCD_OPC_Decode, 169, 19, 219, 2, // Opcode: UCVTFdxi
-/* 45044 */ MCD_OPC_FilterValue, 88, 9, 0, // Skip to: 45057
-/* 45048 */ MCD_OPC_CheckPredicate, 1, 58, 3, // Skip to: 45878
-/* 45052 */ MCD_OPC_Decode, 134, 5, 220, 2, // Opcode: FCVTZSxdi
-/* 45057 */ MCD_OPC_FilterValue, 89, 9, 0, // Skip to: 45070
-/* 45061 */ MCD_OPC_CheckPredicate, 1, 45, 3, // Skip to: 45878
-/* 45065 */ MCD_OPC_Decode, 149, 5, 220, 2, // Opcode: FCVTZUxdi
-/* 45070 */ MCD_OPC_FilterValue, 96, 15, 0, // Skip to: 45089
-/* 45074 */ MCD_OPC_CheckPredicate, 1, 32, 3, // Skip to: 45878
-/* 45078 */ MCD_OPC_CheckField, 10, 6, 0, 26, 3, // Skip to: 45878
-/* 45084 */ MCD_OPC_Decode, 218, 4, 221, 2, // Opcode: FCVTNSxd
-/* 45089 */ MCD_OPC_FilterValue, 97, 15, 0, // Skip to: 45108
-/* 45093 */ MCD_OPC_CheckPredicate, 1, 13, 3, // Skip to: 45878
-/* 45097 */ MCD_OPC_CheckField, 10, 6, 0, 7, 3, // Skip to: 45878
-/* 45103 */ MCD_OPC_Decode, 227, 4, 221, 2, // Opcode: FCVTNUxd
-/* 45108 */ MCD_OPC_FilterValue, 98, 15, 0, // Skip to: 45127
-/* 45112 */ MCD_OPC_CheckPredicate, 1, 250, 2, // Skip to: 45878
-/* 45116 */ MCD_OPC_CheckField, 10, 6, 0, 244, 2, // Skip to: 45878
-/* 45122 */ MCD_OPC_Decode, 223, 12, 222, 2, // Opcode: SCVTFdx
-/* 45127 */ MCD_OPC_FilterValue, 99, 15, 0, // Skip to: 45146
-/* 45131 */ MCD_OPC_CheckPredicate, 1, 231, 2, // Skip to: 45878
-/* 45135 */ MCD_OPC_CheckField, 10, 6, 0, 225, 2, // Skip to: 45878
-/* 45141 */ MCD_OPC_Decode, 168, 19, 222, 2, // Opcode: UCVTFdx
-/* 45146 */ MCD_OPC_FilterValue, 100, 15, 0, // Skip to: 45165
-/* 45150 */ MCD_OPC_CheckPredicate, 1, 212, 2, // Skip to: 45878
-/* 45154 */ MCD_OPC_CheckField, 10, 6, 0, 206, 2, // Skip to: 45878
-/* 45160 */ MCD_OPC_Decode, 174, 4, 221, 2, // Opcode: FCVTASxd
-/* 45165 */ MCD_OPC_FilterValue, 101, 15, 0, // Skip to: 45184
-/* 45169 */ MCD_OPC_CheckPredicate, 1, 193, 2, // Skip to: 45878
-/* 45173 */ MCD_OPC_CheckField, 10, 6, 0, 187, 2, // Skip to: 45878
-/* 45179 */ MCD_OPC_Decode, 183, 4, 221, 2, // Opcode: FCVTAUxd
-/* 45184 */ MCD_OPC_FilterValue, 102, 15, 0, // Skip to: 45203
-/* 45188 */ MCD_OPC_CheckPredicate, 1, 174, 2, // Skip to: 45878
-/* 45192 */ MCD_OPC_CheckField, 10, 6, 0, 168, 2, // Skip to: 45878
-/* 45198 */ MCD_OPC_Decode, 236, 5, 221, 2, // Opcode: FMOVxd
-/* 45203 */ MCD_OPC_FilterValue, 103, 15, 0, // Skip to: 45222
-/* 45207 */ MCD_OPC_CheckPredicate, 1, 155, 2, // Skip to: 45878
-/* 45211 */ MCD_OPC_CheckField, 10, 6, 0, 149, 2, // Skip to: 45878
-/* 45217 */ MCD_OPC_Decode, 227, 5, 222, 2, // Opcode: FMOVdx
-/* 45222 */ MCD_OPC_FilterValue, 104, 15, 0, // Skip to: 45241
-/* 45226 */ MCD_OPC_CheckPredicate, 1, 136, 2, // Skip to: 45878
-/* 45230 */ MCD_OPC_CheckField, 10, 6, 0, 130, 2, // Skip to: 45878
-/* 45236 */ MCD_OPC_Decode, 236, 4, 221, 2, // Opcode: FCVTPSxd
-/* 45241 */ MCD_OPC_FilterValue, 105, 15, 0, // Skip to: 45260
-/* 45245 */ MCD_OPC_CheckPredicate, 1, 117, 2, // Skip to: 45878
-/* 45249 */ MCD_OPC_CheckField, 10, 6, 0, 111, 2, // Skip to: 45878
-/* 45255 */ MCD_OPC_Decode, 245, 4, 221, 2, // Opcode: FCVTPUxd
-/* 45260 */ MCD_OPC_FilterValue, 112, 15, 0, // Skip to: 45279
-/* 45264 */ MCD_OPC_CheckPredicate, 1, 98, 2, // Skip to: 45878
-/* 45268 */ MCD_OPC_CheckField, 10, 6, 0, 92, 2, // Skip to: 45878
-/* 45274 */ MCD_OPC_Decode, 196, 4, 221, 2, // Opcode: FCVTMSxd
-/* 45279 */ MCD_OPC_FilterValue, 113, 15, 0, // Skip to: 45298
-/* 45283 */ MCD_OPC_CheckPredicate, 1, 79, 2, // Skip to: 45878
-/* 45287 */ MCD_OPC_CheckField, 10, 6, 0, 73, 2, // Skip to: 45878
-/* 45293 */ MCD_OPC_Decode, 205, 4, 221, 2, // Opcode: FCVTMUxd
-/* 45298 */ MCD_OPC_FilterValue, 120, 15, 0, // Skip to: 45317
-/* 45302 */ MCD_OPC_CheckPredicate, 1, 60, 2, // Skip to: 45878
-/* 45306 */ MCD_OPC_CheckField, 10, 6, 0, 54, 2, // Skip to: 45878
-/* 45312 */ MCD_OPC_Decode, 133, 5, 221, 2, // Opcode: FCVTZSxd
-/* 45317 */ MCD_OPC_FilterValue, 121, 15, 0, // Skip to: 45336
-/* 45321 */ MCD_OPC_CheckPredicate, 1, 41, 2, // Skip to: 45878
-/* 45325 */ MCD_OPC_CheckField, 10, 6, 0, 35, 2, // Skip to: 45878
-/* 45331 */ MCD_OPC_Decode, 148, 5, 221, 2, // Opcode: FCVTZUxd
-/* 45336 */ MCD_OPC_FilterValue, 174, 1, 15, 0, // Skip to: 45356
-/* 45341 */ MCD_OPC_CheckPredicate, 1, 21, 2, // Skip to: 45878
-/* 45345 */ MCD_OPC_CheckField, 10, 6, 0, 15, 2, // Skip to: 45878
-/* 45351 */ MCD_OPC_Decode, 237, 5, 223, 2, // Opcode: FMOVxv
-/* 45356 */ MCD_OPC_FilterValue, 175, 1, 5, 2, // Skip to: 45878
-/* 45361 */ MCD_OPC_CheckPredicate, 1, 1, 2, // Skip to: 45878
-/* 45365 */ MCD_OPC_CheckField, 10, 6, 0, 251, 1, // Skip to: 45878
-/* 45371 */ MCD_OPC_Decode, 234, 5, 223, 2, // Opcode: FMOVvx
-/* 45376 */ MCD_OPC_FilterValue, 5, 247, 0, // Skip to: 45627
-/* 45380 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
-/* 45383 */ MCD_OPC_FilterValue, 0, 105, 0, // Skip to: 45492
-/* 45387 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 45390 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 45409
-/* 45394 */ MCD_OPC_CheckPredicate, 1, 224, 1, // Skip to: 45878
-/* 45398 */ MCD_OPC_CheckField, 21, 1, 0, 218, 1, // Skip to: 45878
-/* 45404 */ MCD_OPC_Decode, 162, 10, 224, 2, // Opcode: LSFP32_STUR
-/* 45409 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 45428
-/* 45413 */ MCD_OPC_CheckPredicate, 1, 205, 1, // Skip to: 45878
-/* 45417 */ MCD_OPC_CheckField, 21, 1, 0, 199, 1, // Skip to: 45878
-/* 45423 */ MCD_OPC_Decode, 158, 10, 238, 1, // Opcode: LSFP32_PostInd_STR
-/* 45428 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 45473
-/* 45432 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 45435 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 45454
-/* 45439 */ MCD_OPC_CheckPredicate, 1, 179, 1, // Skip to: 45878
-/* 45443 */ MCD_OPC_CheckField, 21, 1, 1, 173, 1, // Skip to: 45878
-/* 45449 */ MCD_OPC_Decode, 164, 10, 225, 2, // Opcode: LSFP32_Wm_RegOffset_STR
-/* 45454 */ MCD_OPC_FilterValue, 1, 164, 1, // Skip to: 45878
-/* 45458 */ MCD_OPC_CheckPredicate, 1, 160, 1, // Skip to: 45878
-/* 45462 */ MCD_OPC_CheckField, 21, 1, 1, 154, 1, // Skip to: 45878
-/* 45468 */ MCD_OPC_Decode, 166, 10, 226, 2, // Opcode: LSFP32_Xm_RegOffset_STR
-/* 45473 */ MCD_OPC_FilterValue, 3, 145, 1, // Skip to: 45878
-/* 45477 */ MCD_OPC_CheckPredicate, 1, 141, 1, // Skip to: 45878
-/* 45481 */ MCD_OPC_CheckField, 21, 1, 0, 135, 1, // Skip to: 45878
-/* 45487 */ MCD_OPC_Decode, 160, 10, 238, 1, // Opcode: LSFP32_PreInd_STR
-/* 45492 */ MCD_OPC_FilterValue, 1, 105, 0, // Skip to: 45601
-/* 45496 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 45499 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 45518
-/* 45503 */ MCD_OPC_CheckPredicate, 1, 115, 1, // Skip to: 45878
-/* 45507 */ MCD_OPC_CheckField, 21, 1, 0, 109, 1, // Skip to: 45878
-/* 45513 */ MCD_OPC_Decode, 156, 10, 224, 2, // Opcode: LSFP32_LDUR
-/* 45518 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 45537
-/* 45522 */ MCD_OPC_CheckPredicate, 1, 96, 1, // Skip to: 45878
-/* 45526 */ MCD_OPC_CheckField, 21, 1, 0, 90, 1, // Skip to: 45878
-/* 45532 */ MCD_OPC_Decode, 157, 10, 238, 1, // Opcode: LSFP32_PostInd_LDR
-/* 45537 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 45582
-/* 45541 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 45544 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 45563
-/* 45548 */ MCD_OPC_CheckPredicate, 1, 70, 1, // Skip to: 45878
-/* 45552 */ MCD_OPC_CheckField, 21, 1, 1, 64, 1, // Skip to: 45878
-/* 45558 */ MCD_OPC_Decode, 163, 10, 225, 2, // Opcode: LSFP32_Wm_RegOffset_LDR
-/* 45563 */ MCD_OPC_FilterValue, 1, 55, 1, // Skip to: 45878
-/* 45567 */ MCD_OPC_CheckPredicate, 1, 51, 1, // Skip to: 45878
-/* 45571 */ MCD_OPC_CheckField, 21, 1, 1, 45, 1, // Skip to: 45878
-/* 45577 */ MCD_OPC_Decode, 165, 10, 226, 2, // Opcode: LSFP32_Xm_RegOffset_LDR
-/* 45582 */ MCD_OPC_FilterValue, 3, 36, 1, // Skip to: 45878
-/* 45586 */ MCD_OPC_CheckPredicate, 1, 32, 1, // Skip to: 45878
-/* 45590 */ MCD_OPC_CheckField, 21, 1, 0, 26, 1, // Skip to: 45878
-/* 45596 */ MCD_OPC_Decode, 159, 10, 238, 1, // Opcode: LSFP32_PreInd_LDR
-/* 45601 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 45614
-/* 45605 */ MCD_OPC_CheckPredicate, 1, 13, 1, // Skip to: 45878
-/* 45609 */ MCD_OPC_Decode, 161, 10, 227, 2, // Opcode: LSFP32_STR
-/* 45614 */ MCD_OPC_FilterValue, 5, 4, 1, // Skip to: 45878
-/* 45618 */ MCD_OPC_CheckPredicate, 1, 0, 1, // Skip to: 45878
-/* 45622 */ MCD_OPC_Decode, 155, 10, 227, 2, // Opcode: LSFP32_LDR
-/* 45627 */ MCD_OPC_FilterValue, 7, 247, 0, // Skip to: 45878
-/* 45631 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
-/* 45634 */ MCD_OPC_FilterValue, 0, 105, 0, // Skip to: 45743
-/* 45638 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 45641 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 45660
-/* 45645 */ MCD_OPC_CheckPredicate, 1, 229, 0, // Skip to: 45878
-/* 45649 */ MCD_OPC_CheckField, 21, 1, 0, 223, 0, // Skip to: 45878
-/* 45655 */ MCD_OPC_Decode, 174, 10, 228, 2, // Opcode: LSFP64_STUR
-/* 45660 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 45679
-/* 45664 */ MCD_OPC_CheckPredicate, 1, 210, 0, // Skip to: 45878
-/* 45668 */ MCD_OPC_CheckField, 21, 1, 0, 204, 0, // Skip to: 45878
-/* 45674 */ MCD_OPC_Decode, 170, 10, 238, 1, // Opcode: LSFP64_PostInd_STR
-/* 45679 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 45724
-/* 45683 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 45686 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 45705
-/* 45690 */ MCD_OPC_CheckPredicate, 1, 184, 0, // Skip to: 45878
-/* 45694 */ MCD_OPC_CheckField, 21, 1, 1, 178, 0, // Skip to: 45878
-/* 45700 */ MCD_OPC_Decode, 176, 10, 229, 2, // Opcode: LSFP64_Wm_RegOffset_STR
-/* 45705 */ MCD_OPC_FilterValue, 1, 169, 0, // Skip to: 45878
-/* 45709 */ MCD_OPC_CheckPredicate, 1, 165, 0, // Skip to: 45878
-/* 45713 */ MCD_OPC_CheckField, 21, 1, 1, 159, 0, // Skip to: 45878
-/* 45719 */ MCD_OPC_Decode, 178, 10, 230, 2, // Opcode: LSFP64_Xm_RegOffset_STR
-/* 45724 */ MCD_OPC_FilterValue, 3, 150, 0, // Skip to: 45878
-/* 45728 */ MCD_OPC_CheckPredicate, 1, 146, 0, // Skip to: 45878
-/* 45732 */ MCD_OPC_CheckField, 21, 1, 0, 140, 0, // Skip to: 45878
-/* 45738 */ MCD_OPC_Decode, 172, 10, 238, 1, // Opcode: LSFP64_PreInd_STR
-/* 45743 */ MCD_OPC_FilterValue, 1, 105, 0, // Skip to: 45852
-/* 45747 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
-/* 45750 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 45769
-/* 45754 */ MCD_OPC_CheckPredicate, 1, 120, 0, // Skip to: 45878
-/* 45758 */ MCD_OPC_CheckField, 21, 1, 0, 114, 0, // Skip to: 45878
-/* 45764 */ MCD_OPC_Decode, 168, 10, 228, 2, // Opcode: LSFP64_LDUR
-/* 45769 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 45788
-/* 45773 */ MCD_OPC_CheckPredicate, 1, 101, 0, // Skip to: 45878
-/* 45777 */ MCD_OPC_CheckField, 21, 1, 0, 95, 0, // Skip to: 45878
-/* 45783 */ MCD_OPC_Decode, 169, 10, 238, 1, // Opcode: LSFP64_PostInd_LDR
-/* 45788 */ MCD_OPC_FilterValue, 2, 41, 0, // Skip to: 45833
-/* 45792 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
-/* 45795 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 45814
-/* 45799 */ MCD_OPC_CheckPredicate, 1, 75, 0, // Skip to: 45878
-/* 45803 */ MCD_OPC_CheckField, 21, 1, 1, 69, 0, // Skip to: 45878
-/* 45809 */ MCD_OPC_Decode, 175, 10, 229, 2, // Opcode: LSFP64_Wm_RegOffset_LDR
-/* 45814 */ MCD_OPC_FilterValue, 1, 60, 0, // Skip to: 45878
-/* 45818 */ MCD_OPC_CheckPredicate, 1, 56, 0, // Skip to: 45878
-/* 45822 */ MCD_OPC_CheckField, 21, 1, 1, 50, 0, // Skip to: 45878
-/* 45828 */ MCD_OPC_Decode, 177, 10, 230, 2, // Opcode: LSFP64_Xm_RegOffset_LDR
-/* 45833 */ MCD_OPC_FilterValue, 3, 41, 0, // Skip to: 45878
-/* 45837 */ MCD_OPC_CheckPredicate, 1, 37, 0, // Skip to: 45878
-/* 45841 */ MCD_OPC_CheckField, 21, 1, 0, 31, 0, // Skip to: 45878
-/* 45847 */ MCD_OPC_Decode, 171, 10, 238, 1, // Opcode: LSFP64_PreInd_LDR
-/* 45852 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 45865
-/* 45856 */ MCD_OPC_CheckPredicate, 1, 18, 0, // Skip to: 45878
-/* 45860 */ MCD_OPC_Decode, 173, 10, 231, 2, // Opcode: LSFP64_STR
-/* 45865 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 45878
-/* 45869 */ MCD_OPC_CheckPredicate, 1, 5, 0, // Skip to: 45878
-/* 45873 */ MCD_OPC_Decode, 167, 10, 231, 2, // Opcode: LSFP64_LDR
-/* 45878 */ MCD_OPC_Fail,
+/* 24636 */ MCD_OPC_FilterValue, 0, 61, 0, // Skip to: 24701
+/* 24640 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 24643 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 24682
+/* 24647 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 24650 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 24663
+/* 24654 */ MCD_OPC_CheckPredicate, 0, 139, 62, // Skip to: 40669
+/* 24658 */ MCD_OPC_Decode, 141, 9, 149, 1, // Opcode: ORRv4i16
+/* 24663 */ MCD_OPC_FilterValue, 1, 130, 62, // Skip to: 40669
+/* 24667 */ MCD_OPC_CheckPredicate, 0, 126, 62, // Skip to: 40669
+/* 24671 */ MCD_OPC_CheckField, 13, 1, 0, 120, 62, // Skip to: 40669
+/* 24677 */ MCD_OPC_Decode, 182, 12, 156, 1, // Opcode: SQSHRNv8i8_shift
+/* 24682 */ MCD_OPC_FilterValue, 1, 111, 62, // Skip to: 40669
+/* 24686 */ MCD_OPC_CheckPredicate, 0, 107, 62, // Skip to: 40669
+/* 24690 */ MCD_OPC_CheckField, 13, 1, 0, 101, 62, // Skip to: 40669
+/* 24696 */ MCD_OPC_Decode, 179, 12, 158, 1, // Opcode: SQSHRNv4i16_shift
+/* 24701 */ MCD_OPC_FilterValue, 1, 92, 62, // Skip to: 40669
+/* 24705 */ MCD_OPC_CheckPredicate, 0, 88, 62, // Skip to: 40669
+/* 24709 */ MCD_OPC_CheckField, 13, 1, 0, 82, 62, // Skip to: 40669
+/* 24715 */ MCD_OPC_Decode, 178, 12, 160, 1, // Opcode: SQSHRNv2i32_shift
+/* 24720 */ MCD_OPC_FilterValue, 1, 73, 62, // Skip to: 40669
+/* 24724 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 24727 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 24746
+/* 24731 */ MCD_OPC_CheckPredicate, 0, 62, 62, // Skip to: 40669
+/* 24735 */ MCD_OPC_CheckField, 19, 3, 0, 56, 62, // Skip to: 40669
+/* 24741 */ MCD_OPC_Decode, 204, 8, 145, 1, // Opcode: MOVIv2s_msl
+/* 24746 */ MCD_OPC_FilterValue, 1, 47, 62, // Skip to: 40669
+/* 24750 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 24753 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 24792
+/* 24757 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 24760 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 24779
+/* 24764 */ MCD_OPC_CheckPredicate, 0, 29, 62, // Skip to: 40669
+/* 24768 */ MCD_OPC_CheckField, 19, 2, 0, 23, 62, // Skip to: 40669
+/* 24774 */ MCD_OPC_Decode, 208, 8, 145, 1, // Opcode: MOVIv8b_ns
+/* 24779 */ MCD_OPC_FilterValue, 1, 14, 62, // Skip to: 40669
+/* 24783 */ MCD_OPC_CheckPredicate, 0, 10, 62, // Skip to: 40669
+/* 24787 */ MCD_OPC_Decode, 144, 10, 148, 1, // Opcode: SCVTFv2i32_shift
+/* 24792 */ MCD_OPC_FilterValue, 1, 1, 62, // Skip to: 40669
+/* 24796 */ MCD_OPC_CheckPredicate, 0, 253, 61, // Skip to: 40669
+/* 24800 */ MCD_OPC_CheckField, 19, 3, 0, 247, 61, // Skip to: 40669
+/* 24806 */ MCD_OPC_Decode, 230, 4, 145, 1, // Opcode: FMOVv2f32_ns
+/* 24811 */ MCD_OPC_FilterValue, 3, 238, 61, // Skip to: 40669
+/* 24815 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 24818 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 24877
+/* 24822 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 24825 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 24864
+/* 24829 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 24832 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 24851
+/* 24836 */ MCD_OPC_CheckPredicate, 0, 213, 61, // Skip to: 40669
+/* 24840 */ MCD_OPC_CheckField, 19, 1, 1, 207, 61, // Skip to: 40669
+/* 24846 */ MCD_OPC_Decode, 192, 9, 156, 1, // Opcode: RSHRNv8i8_shift
+/* 24851 */ MCD_OPC_FilterValue, 1, 198, 61, // Skip to: 40669
+/* 24855 */ MCD_OPC_CheckPredicate, 0, 194, 61, // Skip to: 40669
+/* 24859 */ MCD_OPC_Decode, 189, 9, 158, 1, // Opcode: RSHRNv4i16_shift
+/* 24864 */ MCD_OPC_FilterValue, 1, 185, 61, // Skip to: 40669
+/* 24868 */ MCD_OPC_CheckPredicate, 0, 181, 61, // Skip to: 40669
+/* 24872 */ MCD_OPC_Decode, 188, 9, 160, 1, // Opcode: RSHRNv2i32_shift
+/* 24877 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 24936
+/* 24881 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 24884 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 24923
+/* 24888 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 24891 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 24910
+/* 24895 */ MCD_OPC_CheckPredicate, 0, 154, 61, // Skip to: 40669
+/* 24899 */ MCD_OPC_CheckField, 19, 1, 1, 148, 61, // Skip to: 40669
+/* 24905 */ MCD_OPC_Decode, 131, 12, 156, 1, // Opcode: SQRSHRNv8i8_shift
+/* 24910 */ MCD_OPC_FilterValue, 1, 139, 61, // Skip to: 40669
+/* 24914 */ MCD_OPC_CheckPredicate, 0, 135, 61, // Skip to: 40669
+/* 24918 */ MCD_OPC_Decode, 128, 12, 158, 1, // Opcode: SQRSHRNv4i16_shift
+/* 24923 */ MCD_OPC_FilterValue, 1, 126, 61, // Skip to: 40669
+/* 24927 */ MCD_OPC_CheckPredicate, 0, 122, 61, // Skip to: 40669
+/* 24931 */ MCD_OPC_Decode, 255, 11, 160, 1, // Opcode: SQRSHRNv2i32_shift
+/* 24936 */ MCD_OPC_FilterValue, 15, 113, 61, // Skip to: 40669
+/* 24940 */ MCD_OPC_CheckPredicate, 0, 109, 61, // Skip to: 40669
+/* 24944 */ MCD_OPC_CheckField, 21, 1, 1, 103, 61, // Skip to: 40669
+/* 24950 */ MCD_OPC_Decode, 248, 3, 148, 1, // Opcode: FCVTZSv2i32_shift
+/* 24955 */ MCD_OPC_FilterValue, 1, 128, 3, // Skip to: 25855
+/* 24959 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 24962 */ MCD_OPC_FilterValue, 1, 233, 2, // Skip to: 25711
+/* 24966 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 24969 */ MCD_OPC_FilterValue, 0, 168, 1, // Skip to: 25397
+/* 24973 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 24976 */ MCD_OPC_FilterValue, 0, 207, 0, // Skip to: 25187
+/* 24980 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 24983 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 25128
+/* 24987 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 24990 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 25069
+/* 24994 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 24997 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25010
+/* 25001 */ MCD_OPC_CheckPredicate, 0, 48, 61, // Skip to: 40669
+/* 25005 */ MCD_OPC_Decode, 239, 8, 145, 1, // Opcode: MVNIv2i32
+/* 25010 */ MCD_OPC_FilterValue, 1, 39, 61, // Skip to: 40669
+/* 25014 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 25017 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25030
+/* 25021 */ MCD_OPC_CheckPredicate, 0, 28, 61, // Skip to: 40669
+/* 25025 */ MCD_OPC_Decode, 146, 18, 146, 1, // Opcode: USHRv8i8_shift
+/* 25030 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25043
+/* 25034 */ MCD_OPC_CheckPredicate, 0, 15, 61, // Skip to: 40669
+/* 25038 */ MCD_OPC_Decode, 242, 17, 146, 1, // Opcode: URSHRv8i8_shift
+/* 25043 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25056
+/* 25047 */ MCD_OPC_CheckPredicate, 0, 2, 61, // Skip to: 40669
+/* 25051 */ MCD_OPC_Decode, 234, 12, 150, 1, // Opcode: SRIv8i8_shift
+/* 25056 */ MCD_OPC_FilterValue, 3, 249, 60, // Skip to: 40669
+/* 25060 */ MCD_OPC_CheckPredicate, 0, 245, 60, // Skip to: 40669
+/* 25064 */ MCD_OPC_Decode, 151, 12, 151, 1, // Opcode: SQSHLUv8i8_shift
+/* 25069 */ MCD_OPC_FilterValue, 1, 236, 60, // Skip to: 40669
+/* 25073 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 25076 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25089
+/* 25080 */ MCD_OPC_CheckPredicate, 0, 225, 60, // Skip to: 40669
+/* 25084 */ MCD_OPC_Decode, 143, 18, 147, 1, // Opcode: USHRv4i16_shift
+/* 25089 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25102
+/* 25093 */ MCD_OPC_CheckPredicate, 0, 212, 60, // Skip to: 40669
+/* 25097 */ MCD_OPC_Decode, 239, 17, 147, 1, // Opcode: URSHRv4i16_shift
+/* 25102 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25115
+/* 25106 */ MCD_OPC_CheckPredicate, 0, 199, 60, // Skip to: 40669
+/* 25110 */ MCD_OPC_Decode, 231, 12, 152, 1, // Opcode: SRIv4i16_shift
+/* 25115 */ MCD_OPC_FilterValue, 3, 190, 60, // Skip to: 40669
+/* 25119 */ MCD_OPC_CheckPredicate, 0, 186, 60, // Skip to: 40669
+/* 25123 */ MCD_OPC_Decode, 148, 12, 153, 1, // Opcode: SQSHLUv4i16_shift
+/* 25128 */ MCD_OPC_FilterValue, 1, 177, 60, // Skip to: 40669
+/* 25132 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 25135 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25148
+/* 25139 */ MCD_OPC_CheckPredicate, 0, 166, 60, // Skip to: 40669
+/* 25143 */ MCD_OPC_Decode, 141, 18, 148, 1, // Opcode: USHRv2i32_shift
+/* 25148 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25161
+/* 25152 */ MCD_OPC_CheckPredicate, 0, 153, 60, // Skip to: 40669
+/* 25156 */ MCD_OPC_Decode, 237, 17, 148, 1, // Opcode: URSHRv2i32_shift
+/* 25161 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25174
+/* 25165 */ MCD_OPC_CheckPredicate, 0, 140, 60, // Skip to: 40669
+/* 25169 */ MCD_OPC_Decode, 229, 12, 154, 1, // Opcode: SRIv2i32_shift
+/* 25174 */ MCD_OPC_FilterValue, 3, 131, 60, // Skip to: 40669
+/* 25178 */ MCD_OPC_CheckPredicate, 0, 127, 60, // Skip to: 40669
+/* 25182 */ MCD_OPC_Decode, 146, 12, 155, 1, // Opcode: SQSHLUv2i32_shift
+/* 25187 */ MCD_OPC_FilterValue, 1, 118, 60, // Skip to: 40669
+/* 25191 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 25194 */ MCD_OPC_FilterValue, 0, 140, 0, // Skip to: 25338
+/* 25198 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 25201 */ MCD_OPC_FilterValue, 0, 74, 0, // Skip to: 25279
+/* 25205 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 25208 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 25220
+/* 25212 */ MCD_OPC_CheckPredicate, 0, 93, 60, // Skip to: 40669
+/* 25216 */ MCD_OPC_Decode, 113, 149, 1, // Opcode: BICv2i32
+/* 25220 */ MCD_OPC_FilterValue, 1, 85, 60, // Skip to: 40669
+/* 25224 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 25227 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25240
+/* 25231 */ MCD_OPC_CheckPredicate, 0, 74, 60, // Skip to: 40669
+/* 25235 */ MCD_OPC_Decode, 165, 18, 150, 1, // Opcode: USRAv8i8_shift
+/* 25240 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25253
+/* 25244 */ MCD_OPC_CheckPredicate, 0, 61, 60, // Skip to: 40669
+/* 25248 */ MCD_OPC_Decode, 252, 17, 150, 1, // Opcode: URSRAv8i8_shift
+/* 25253 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25266
+/* 25257 */ MCD_OPC_CheckPredicate, 0, 48, 60, // Skip to: 40669
+/* 25261 */ MCD_OPC_Decode, 201, 10, 162, 1, // Opcode: SLIv8i8_shift
+/* 25266 */ MCD_OPC_FilterValue, 3, 39, 60, // Skip to: 40669
+/* 25270 */ MCD_OPC_CheckPredicate, 0, 35, 60, // Skip to: 40669
+/* 25274 */ MCD_OPC_Decode, 189, 17, 151, 1, // Opcode: UQSHLv8i8_shift
+/* 25279 */ MCD_OPC_FilterValue, 1, 26, 60, // Skip to: 40669
+/* 25283 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 25286 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25299
+/* 25290 */ MCD_OPC_CheckPredicate, 0, 15, 60, // Skip to: 40669
+/* 25294 */ MCD_OPC_Decode, 162, 18, 152, 1, // Opcode: USRAv4i16_shift
+/* 25299 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25312
+/* 25303 */ MCD_OPC_CheckPredicate, 0, 2, 60, // Skip to: 40669
+/* 25307 */ MCD_OPC_Decode, 249, 17, 152, 1, // Opcode: URSRAv4i16_shift
+/* 25312 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25325
+/* 25316 */ MCD_OPC_CheckPredicate, 0, 245, 59, // Skip to: 40669
+/* 25320 */ MCD_OPC_Decode, 198, 10, 163, 1, // Opcode: SLIv4i16_shift
+/* 25325 */ MCD_OPC_FilterValue, 3, 236, 59, // Skip to: 40669
+/* 25329 */ MCD_OPC_CheckPredicate, 0, 232, 59, // Skip to: 40669
+/* 25333 */ MCD_OPC_Decode, 183, 17, 153, 1, // Opcode: UQSHLv4i16_shift
+/* 25338 */ MCD_OPC_FilterValue, 1, 223, 59, // Skip to: 40669
+/* 25342 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 25345 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25358
+/* 25349 */ MCD_OPC_CheckPredicate, 0, 212, 59, // Skip to: 40669
+/* 25353 */ MCD_OPC_Decode, 160, 18, 154, 1, // Opcode: USRAv2i32_shift
+/* 25358 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 25371
+/* 25362 */ MCD_OPC_CheckPredicate, 0, 199, 59, // Skip to: 40669
+/* 25366 */ MCD_OPC_Decode, 247, 17, 154, 1, // Opcode: URSRAv2i32_shift
+/* 25371 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 25384
+/* 25375 */ MCD_OPC_CheckPredicate, 0, 186, 59, // Skip to: 40669
+/* 25379 */ MCD_OPC_Decode, 196, 10, 164, 1, // Opcode: SLIv2i32_shift
+/* 25384 */ MCD_OPC_FilterValue, 3, 177, 59, // Skip to: 40669
+/* 25388 */ MCD_OPC_CheckPredicate, 0, 173, 59, // Skip to: 40669
+/* 25392 */ MCD_OPC_Decode, 179, 17, 155, 1, // Opcode: UQSHLv2i32_shift
+/* 25397 */ MCD_OPC_FilterValue, 1, 164, 59, // Skip to: 40669
+/* 25401 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ...
+/* 25404 */ MCD_OPC_FilterValue, 0, 226, 0, // Skip to: 25634
+/* 25408 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 25411 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 25544
+/* 25415 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 25418 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 25511
+/* 25422 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 25425 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 25478
+/* 25429 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 25432 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25445
+/* 25436 */ MCD_OPC_CheckPredicate, 0, 125, 59, // Skip to: 40669
+/* 25440 */ MCD_OPC_Decode, 241, 8, 145, 1, // Opcode: MVNIv4i16
+/* 25445 */ MCD_OPC_FilterValue, 1, 116, 59, // Skip to: 40669
+/* 25449 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 25452 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25465
+/* 25456 */ MCD_OPC_CheckPredicate, 0, 105, 59, // Skip to: 40669
+/* 25460 */ MCD_OPC_Decode, 191, 12, 156, 1, // Opcode: SQSHRUNv8i8_shift
+/* 25465 */ MCD_OPC_FilterValue, 1, 96, 59, // Skip to: 40669
+/* 25469 */ MCD_OPC_CheckPredicate, 0, 92, 59, // Skip to: 40669
+/* 25473 */ MCD_OPC_Decode, 130, 18, 157, 1, // Opcode: USHLLv8i8_shift
+/* 25478 */ MCD_OPC_FilterValue, 1, 83, 59, // Skip to: 40669
+/* 25482 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 25485 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25498
+/* 25489 */ MCD_OPC_CheckPredicate, 0, 72, 59, // Skip to: 40669
+/* 25493 */ MCD_OPC_Decode, 188, 12, 158, 1, // Opcode: SQSHRUNv4i16_shift
+/* 25498 */ MCD_OPC_FilterValue, 1, 63, 59, // Skip to: 40669
+/* 25502 */ MCD_OPC_CheckPredicate, 0, 59, 59, // Skip to: 40669
+/* 25506 */ MCD_OPC_Decode, 255, 17, 159, 1, // Opcode: USHLLv4i16_shift
+/* 25511 */ MCD_OPC_FilterValue, 1, 50, 59, // Skip to: 40669
+/* 25515 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 25518 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25531
+/* 25522 */ MCD_OPC_CheckPredicate, 0, 39, 59, // Skip to: 40669
+/* 25526 */ MCD_OPC_Decode, 187, 12, 160, 1, // Opcode: SQSHRUNv2i32_shift
+/* 25531 */ MCD_OPC_FilterValue, 1, 30, 59, // Skip to: 40669
+/* 25535 */ MCD_OPC_CheckPredicate, 0, 26, 59, // Skip to: 40669
+/* 25539 */ MCD_OPC_Decode, 254, 17, 161, 1, // Opcode: USHLLv2i32_shift
+/* 25544 */ MCD_OPC_FilterValue, 1, 17, 59, // Skip to: 40669
+/* 25548 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 25551 */ MCD_OPC_FilterValue, 0, 60, 0, // Skip to: 25615
+/* 25555 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 25558 */ MCD_OPC_FilterValue, 0, 34, 0, // Skip to: 25596
+/* 25562 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 25565 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 25577
+/* 25569 */ MCD_OPC_CheckPredicate, 0, 248, 58, // Skip to: 40669
+/* 25573 */ MCD_OPC_Decode, 114, 149, 1, // Opcode: BICv4i16
+/* 25577 */ MCD_OPC_FilterValue, 1, 240, 58, // Skip to: 40669
+/* 25581 */ MCD_OPC_CheckPredicate, 0, 236, 58, // Skip to: 40669
+/* 25585 */ MCD_OPC_CheckField, 13, 1, 0, 230, 58, // Skip to: 40669
+/* 25591 */ MCD_OPC_Decode, 198, 17, 156, 1, // Opcode: UQSHRNv8i8_shift
+/* 25596 */ MCD_OPC_FilterValue, 1, 221, 58, // Skip to: 40669
+/* 25600 */ MCD_OPC_CheckPredicate, 0, 217, 58, // Skip to: 40669
+/* 25604 */ MCD_OPC_CheckField, 13, 1, 0, 211, 58, // Skip to: 40669
+/* 25610 */ MCD_OPC_Decode, 195, 17, 158, 1, // Opcode: UQSHRNv4i16_shift
+/* 25615 */ MCD_OPC_FilterValue, 1, 202, 58, // Skip to: 40669
+/* 25619 */ MCD_OPC_CheckPredicate, 0, 198, 58, // Skip to: 40669
+/* 25623 */ MCD_OPC_CheckField, 13, 1, 0, 192, 58, // Skip to: 40669
+/* 25629 */ MCD_OPC_Decode, 194, 17, 160, 1, // Opcode: UQSHRNv2i32_shift
+/* 25634 */ MCD_OPC_FilterValue, 1, 183, 58, // Skip to: 40669
+/* 25638 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 25641 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 25660
+/* 25645 */ MCD_OPC_CheckPredicate, 0, 172, 58, // Skip to: 40669
+/* 25649 */ MCD_OPC_CheckField, 19, 3, 0, 166, 58, // Skip to: 40669
+/* 25655 */ MCD_OPC_Decode, 240, 8, 145, 1, // Opcode: MVNIv2s_msl
+/* 25660 */ MCD_OPC_FilterValue, 1, 157, 58, // Skip to: 40669
+/* 25664 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 25667 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 25692
+/* 25671 */ MCD_OPC_CheckPredicate, 0, 146, 58, // Skip to: 40669
+/* 25675 */ MCD_OPC_CheckField, 19, 2, 0, 140, 58, // Skip to: 40669
+/* 25681 */ MCD_OPC_CheckField, 12, 1, 0, 134, 58, // Skip to: 40669
+/* 25687 */ MCD_OPC_Decode, 200, 8, 145, 1, // Opcode: MOVID
+/* 25692 */ MCD_OPC_FilterValue, 1, 125, 58, // Skip to: 40669
+/* 25696 */ MCD_OPC_CheckPredicate, 0, 121, 58, // Skip to: 40669
+/* 25700 */ MCD_OPC_CheckField, 12, 1, 0, 115, 58, // Skip to: 40669
+/* 25706 */ MCD_OPC_Decode, 174, 16, 148, 1, // Opcode: UCVTFv2i32_shift
+/* 25711 */ MCD_OPC_FilterValue, 3, 106, 58, // Skip to: 40669
+/* 25715 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 25718 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 25777
+/* 25722 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 25725 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 25764
+/* 25729 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 25732 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 25751
+/* 25736 */ MCD_OPC_CheckPredicate, 0, 81, 58, // Skip to: 40669
+/* 25740 */ MCD_OPC_CheckField, 19, 1, 1, 75, 58, // Skip to: 40669
+/* 25746 */ MCD_OPC_Decode, 140, 12, 156, 1, // Opcode: SQRSHRUNv8i8_shift
+/* 25751 */ MCD_OPC_FilterValue, 1, 66, 58, // Skip to: 40669
+/* 25755 */ MCD_OPC_CheckPredicate, 0, 62, 58, // Skip to: 40669
+/* 25759 */ MCD_OPC_Decode, 137, 12, 158, 1, // Opcode: SQRSHRUNv4i16_shift
+/* 25764 */ MCD_OPC_FilterValue, 1, 53, 58, // Skip to: 40669
+/* 25768 */ MCD_OPC_CheckPredicate, 0, 49, 58, // Skip to: 40669
+/* 25772 */ MCD_OPC_Decode, 136, 12, 160, 1, // Opcode: SQRSHRUNv2i32_shift
+/* 25777 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 25836
+/* 25781 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 25784 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 25823
+/* 25788 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 25791 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 25810
+/* 25795 */ MCD_OPC_CheckPredicate, 0, 22, 58, // Skip to: 40669
+/* 25799 */ MCD_OPC_CheckField, 19, 1, 1, 16, 58, // Skip to: 40669
+/* 25805 */ MCD_OPC_Decode, 167, 17, 156, 1, // Opcode: UQRSHRNv8i8_shift
+/* 25810 */ MCD_OPC_FilterValue, 1, 7, 58, // Skip to: 40669
+/* 25814 */ MCD_OPC_CheckPredicate, 0, 3, 58, // Skip to: 40669
+/* 25818 */ MCD_OPC_Decode, 164, 17, 158, 1, // Opcode: UQRSHRNv4i16_shift
+/* 25823 */ MCD_OPC_FilterValue, 1, 250, 57, // Skip to: 40669
+/* 25827 */ MCD_OPC_CheckPredicate, 0, 246, 57, // Skip to: 40669
+/* 25831 */ MCD_OPC_Decode, 163, 17, 160, 1, // Opcode: UQRSHRNv2i32_shift
+/* 25836 */ MCD_OPC_FilterValue, 15, 237, 57, // Skip to: 40669
+/* 25840 */ MCD_OPC_CheckPredicate, 0, 233, 57, // Skip to: 40669
+/* 25844 */ MCD_OPC_CheckField, 21, 1, 1, 227, 57, // Skip to: 40669
+/* 25850 */ MCD_OPC_Decode, 149, 4, 148, 1, // Opcode: FCVTZUv2i32_shift
+/* 25855 */ MCD_OPC_FilterValue, 2, 66, 3, // Skip to: 26693
+/* 25859 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 25862 */ MCD_OPC_FilterValue, 1, 171, 2, // Skip to: 26549
+/* 25866 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 25869 */ MCD_OPC_FilterValue, 0, 91, 1, // Skip to: 26220
+/* 25873 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 25876 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 26009
+/* 25880 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 25883 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 25976
+/* 25887 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 25890 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 25943
+/* 25894 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 25897 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25910
+/* 25901 */ MCD_OPC_CheckPredicate, 0, 172, 57, // Skip to: 40669
+/* 25905 */ MCD_OPC_Decode, 206, 8, 145, 1, // Opcode: MOVIv4i32
+/* 25910 */ MCD_OPC_FilterValue, 1, 163, 57, // Skip to: 40669
+/* 25914 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 25917 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25930
+/* 25921 */ MCD_OPC_CheckPredicate, 0, 152, 57, // Skip to: 40669
+/* 25925 */ MCD_OPC_Decode, 146, 13, 165, 1, // Opcode: SSHRv16i8_shift
+/* 25930 */ MCD_OPC_FilterValue, 1, 143, 57, // Skip to: 40669
+/* 25934 */ MCD_OPC_CheckPredicate, 0, 139, 57, // Skip to: 40669
+/* 25938 */ MCD_OPC_Decode, 244, 12, 165, 1, // Opcode: SRSHRv16i8_shift
+/* 25943 */ MCD_OPC_FilterValue, 1, 130, 57, // Skip to: 40669
+/* 25947 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 25950 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25963
+/* 25954 */ MCD_OPC_CheckPredicate, 0, 119, 57, // Skip to: 40669
+/* 25958 */ MCD_OPC_Decode, 151, 13, 166, 1, // Opcode: SSHRv8i16_shift
+/* 25963 */ MCD_OPC_FilterValue, 1, 110, 57, // Skip to: 40669
+/* 25967 */ MCD_OPC_CheckPredicate, 0, 106, 57, // Skip to: 40669
+/* 25971 */ MCD_OPC_Decode, 249, 12, 166, 1, // Opcode: SRSHRv8i16_shift
+/* 25976 */ MCD_OPC_FilterValue, 1, 97, 57, // Skip to: 40669
+/* 25980 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 25983 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 25996
+/* 25987 */ MCD_OPC_CheckPredicate, 0, 86, 57, // Skip to: 40669
+/* 25991 */ MCD_OPC_Decode, 150, 13, 167, 1, // Opcode: SSHRv4i32_shift
+/* 25996 */ MCD_OPC_FilterValue, 1, 77, 57, // Skip to: 40669
+/* 26000 */ MCD_OPC_CheckPredicate, 0, 73, 57, // Skip to: 40669
+/* 26004 */ MCD_OPC_Decode, 248, 12, 167, 1, // Opcode: SRSHRv4i32_shift
+/* 26009 */ MCD_OPC_FilterValue, 1, 64, 57, // Skip to: 40669
+/* 26013 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 26016 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 26161
+/* 26020 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 26023 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 26102
+/* 26027 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 26030 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26043
+/* 26034 */ MCD_OPC_CheckPredicate, 0, 39, 57, // Skip to: 40669
+/* 26038 */ MCD_OPC_Decode, 142, 9, 149, 1, // Opcode: ORRv4i32
+/* 26043 */ MCD_OPC_FilterValue, 1, 30, 57, // Skip to: 40669
+/* 26047 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 26050 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26063
+/* 26054 */ MCD_OPC_CheckPredicate, 0, 19, 57, // Skip to: 40669
+/* 26058 */ MCD_OPC_Decode, 154, 13, 168, 1, // Opcode: SSRAv16i8_shift
+/* 26063 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26076
+/* 26067 */ MCD_OPC_CheckPredicate, 0, 6, 57, // Skip to: 40669
+/* 26071 */ MCD_OPC_Decode, 252, 12, 168, 1, // Opcode: SRSRAv16i8_shift
+/* 26076 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26089
+/* 26080 */ MCD_OPC_CheckPredicate, 0, 249, 56, // Skip to: 40669
+/* 26084 */ MCD_OPC_Decode, 175, 10, 169, 1, // Opcode: SHLv16i8_shift
+/* 26089 */ MCD_OPC_FilterValue, 3, 240, 56, // Skip to: 40669
+/* 26093 */ MCD_OPC_CheckPredicate, 0, 236, 56, // Skip to: 40669
+/* 26097 */ MCD_OPC_Decode, 157, 12, 169, 1, // Opcode: SQSHLv16i8_shift
+/* 26102 */ MCD_OPC_FilterValue, 1, 227, 56, // Skip to: 40669
+/* 26106 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 26109 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26122
+/* 26113 */ MCD_OPC_CheckPredicate, 0, 216, 56, // Skip to: 40669
+/* 26117 */ MCD_OPC_Decode, 159, 13, 170, 1, // Opcode: SSRAv8i16_shift
+/* 26122 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26135
+/* 26126 */ MCD_OPC_CheckPredicate, 0, 203, 56, // Skip to: 40669
+/* 26130 */ MCD_OPC_Decode, 129, 13, 170, 1, // Opcode: SRSRAv8i16_shift
+/* 26135 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26148
+/* 26139 */ MCD_OPC_CheckPredicate, 0, 190, 56, // Skip to: 40669
+/* 26143 */ MCD_OPC_Decode, 180, 10, 171, 1, // Opcode: SHLv8i16_shift
+/* 26148 */ MCD_OPC_FilterValue, 3, 181, 56, // Skip to: 40669
+/* 26152 */ MCD_OPC_CheckPredicate, 0, 177, 56, // Skip to: 40669
+/* 26156 */ MCD_OPC_Decode, 171, 12, 171, 1, // Opcode: SQSHLv8i16_shift
+/* 26161 */ MCD_OPC_FilterValue, 1, 168, 56, // Skip to: 40669
+/* 26165 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 26168 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26181
+/* 26172 */ MCD_OPC_CheckPredicate, 0, 157, 56, // Skip to: 40669
+/* 26176 */ MCD_OPC_Decode, 158, 13, 172, 1, // Opcode: SSRAv4i32_shift
+/* 26181 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26194
+/* 26185 */ MCD_OPC_CheckPredicate, 0, 144, 56, // Skip to: 40669
+/* 26189 */ MCD_OPC_Decode, 128, 13, 172, 1, // Opcode: SRSRAv4i32_shift
+/* 26194 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26207
+/* 26198 */ MCD_OPC_CheckPredicate, 0, 131, 56, // Skip to: 40669
+/* 26202 */ MCD_OPC_Decode, 179, 10, 173, 1, // Opcode: SHLv4i32_shift
+/* 26207 */ MCD_OPC_FilterValue, 3, 122, 56, // Skip to: 40669
+/* 26211 */ MCD_OPC_CheckPredicate, 0, 118, 56, // Skip to: 40669
+/* 26215 */ MCD_OPC_Decode, 169, 12, 173, 1, // Opcode: SQSHLv4i32_shift
+/* 26220 */ MCD_OPC_FilterValue, 1, 109, 56, // Skip to: 40669
+/* 26224 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ...
+/* 26227 */ MCD_OPC_FilterValue, 0, 227, 0, // Skip to: 26458
+/* 26231 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 26234 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 26367
+/* 26238 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 26241 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 26334
+/* 26245 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 26248 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 26301
+/* 26252 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 26255 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26268
+/* 26259 */ MCD_OPC_CheckPredicate, 0, 70, 56, // Skip to: 40669
+/* 26263 */ MCD_OPC_Decode, 209, 8, 145, 1, // Opcode: MOVIv8i16
+/* 26268 */ MCD_OPC_FilterValue, 1, 61, 56, // Skip to: 40669
+/* 26272 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 26275 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26288
+/* 26279 */ MCD_OPC_CheckPredicate, 0, 50, 56, // Skip to: 40669
+/* 26283 */ MCD_OPC_Decode, 182, 10, 174, 1, // Opcode: SHRNv16i8_shift
+/* 26288 */ MCD_OPC_FilterValue, 1, 41, 56, // Skip to: 40669
+/* 26292 */ MCD_OPC_CheckPredicate, 0, 37, 56, // Skip to: 40669
+/* 26296 */ MCD_OPC_Decode, 131, 13, 169, 1, // Opcode: SSHLLv16i8_shift
+/* 26301 */ MCD_OPC_FilterValue, 1, 28, 56, // Skip to: 40669
+/* 26305 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 26308 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26321
+/* 26312 */ MCD_OPC_CheckPredicate, 0, 17, 56, // Skip to: 40669
+/* 26316 */ MCD_OPC_Decode, 186, 10, 175, 1, // Opcode: SHRNv8i16_shift
+/* 26321 */ MCD_OPC_FilterValue, 1, 8, 56, // Skip to: 40669
+/* 26325 */ MCD_OPC_CheckPredicate, 0, 4, 56, // Skip to: 40669
+/* 26329 */ MCD_OPC_Decode, 135, 13, 171, 1, // Opcode: SSHLLv8i16_shift
+/* 26334 */ MCD_OPC_FilterValue, 1, 251, 55, // Skip to: 40669
+/* 26338 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 26341 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26354
+/* 26345 */ MCD_OPC_CheckPredicate, 0, 240, 55, // Skip to: 40669
+/* 26349 */ MCD_OPC_Decode, 185, 10, 176, 1, // Opcode: SHRNv4i32_shift
+/* 26354 */ MCD_OPC_FilterValue, 1, 231, 55, // Skip to: 40669
+/* 26358 */ MCD_OPC_CheckPredicate, 0, 227, 55, // Skip to: 40669
+/* 26362 */ MCD_OPC_Decode, 134, 13, 173, 1, // Opcode: SSHLLv4i32_shift
+/* 26367 */ MCD_OPC_FilterValue, 1, 218, 55, // Skip to: 40669
+/* 26371 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 26374 */ MCD_OPC_FilterValue, 0, 61, 0, // Skip to: 26439
+/* 26378 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 26381 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 26420
+/* 26385 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 26388 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26401
+/* 26392 */ MCD_OPC_CheckPredicate, 0, 193, 55, // Skip to: 40669
+/* 26396 */ MCD_OPC_Decode, 143, 9, 149, 1, // Opcode: ORRv8i16
+/* 26401 */ MCD_OPC_FilterValue, 1, 184, 55, // Skip to: 40669
+/* 26405 */ MCD_OPC_CheckPredicate, 0, 180, 55, // Skip to: 40669
+/* 26409 */ MCD_OPC_CheckField, 13, 1, 0, 174, 55, // Skip to: 40669
+/* 26415 */ MCD_OPC_Decode, 177, 12, 174, 1, // Opcode: SQSHRNv16i8_shift
+/* 26420 */ MCD_OPC_FilterValue, 1, 165, 55, // Skip to: 40669
+/* 26424 */ MCD_OPC_CheckPredicate, 0, 161, 55, // Skip to: 40669
+/* 26428 */ MCD_OPC_CheckField, 13, 1, 0, 155, 55, // Skip to: 40669
+/* 26434 */ MCD_OPC_Decode, 181, 12, 175, 1, // Opcode: SQSHRNv8i16_shift
+/* 26439 */ MCD_OPC_FilterValue, 1, 146, 55, // Skip to: 40669
+/* 26443 */ MCD_OPC_CheckPredicate, 0, 142, 55, // Skip to: 40669
+/* 26447 */ MCD_OPC_CheckField, 13, 1, 0, 136, 55, // Skip to: 40669
+/* 26453 */ MCD_OPC_Decode, 180, 12, 176, 1, // Opcode: SQSHRNv4i32_shift
+/* 26458 */ MCD_OPC_FilterValue, 1, 127, 55, // Skip to: 40669
+/* 26462 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 26465 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 26484
+/* 26469 */ MCD_OPC_CheckPredicate, 0, 116, 55, // Skip to: 40669
+/* 26473 */ MCD_OPC_CheckField, 19, 3, 0, 110, 55, // Skip to: 40669
+/* 26479 */ MCD_OPC_Decode, 207, 8, 145, 1, // Opcode: MOVIv4s_msl
+/* 26484 */ MCD_OPC_FilterValue, 1, 101, 55, // Skip to: 40669
+/* 26488 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 26491 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 26530
+/* 26495 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 26498 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 26517
+/* 26502 */ MCD_OPC_CheckPredicate, 0, 83, 55, // Skip to: 40669
+/* 26506 */ MCD_OPC_CheckField, 19, 2, 0, 77, 55, // Skip to: 40669
+/* 26512 */ MCD_OPC_Decode, 201, 8, 145, 1, // Opcode: MOVIv16b_ns
+/* 26517 */ MCD_OPC_FilterValue, 1, 68, 55, // Skip to: 40669
+/* 26521 */ MCD_OPC_CheckPredicate, 0, 64, 55, // Skip to: 40669
+/* 26525 */ MCD_OPC_Decode, 147, 10, 167, 1, // Opcode: SCVTFv4i32_shift
+/* 26530 */ MCD_OPC_FilterValue, 1, 55, 55, // Skip to: 40669
+/* 26534 */ MCD_OPC_CheckPredicate, 0, 51, 55, // Skip to: 40669
+/* 26538 */ MCD_OPC_CheckField, 19, 3, 0, 45, 55, // Skip to: 40669
+/* 26544 */ MCD_OPC_Decode, 232, 4, 145, 1, // Opcode: FMOVv4f32_ns
+/* 26549 */ MCD_OPC_FilterValue, 3, 36, 55, // Skip to: 40669
+/* 26553 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 26556 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 26615
+/* 26560 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 26563 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 26602
+/* 26567 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 26570 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 26589
+/* 26574 */ MCD_OPC_CheckPredicate, 0, 11, 55, // Skip to: 40669
+/* 26578 */ MCD_OPC_CheckField, 19, 1, 1, 5, 55, // Skip to: 40669
+/* 26584 */ MCD_OPC_Decode, 187, 9, 174, 1, // Opcode: RSHRNv16i8_shift
+/* 26589 */ MCD_OPC_FilterValue, 1, 252, 54, // Skip to: 40669
+/* 26593 */ MCD_OPC_CheckPredicate, 0, 248, 54, // Skip to: 40669
+/* 26597 */ MCD_OPC_Decode, 191, 9, 175, 1, // Opcode: RSHRNv8i16_shift
+/* 26602 */ MCD_OPC_FilterValue, 1, 239, 54, // Skip to: 40669
+/* 26606 */ MCD_OPC_CheckPredicate, 0, 235, 54, // Skip to: 40669
+/* 26610 */ MCD_OPC_Decode, 190, 9, 176, 1, // Opcode: RSHRNv4i32_shift
+/* 26615 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 26674
+/* 26619 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 26622 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 26661
+/* 26626 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 26629 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 26648
+/* 26633 */ MCD_OPC_CheckPredicate, 0, 208, 54, // Skip to: 40669
+/* 26637 */ MCD_OPC_CheckField, 19, 1, 1, 202, 54, // Skip to: 40669
+/* 26643 */ MCD_OPC_Decode, 254, 11, 174, 1, // Opcode: SQRSHRNv16i8_shift
+/* 26648 */ MCD_OPC_FilterValue, 1, 193, 54, // Skip to: 40669
+/* 26652 */ MCD_OPC_CheckPredicate, 0, 189, 54, // Skip to: 40669
+/* 26656 */ MCD_OPC_Decode, 130, 12, 175, 1, // Opcode: SQRSHRNv8i16_shift
+/* 26661 */ MCD_OPC_FilterValue, 1, 180, 54, // Skip to: 40669
+/* 26665 */ MCD_OPC_CheckPredicate, 0, 176, 54, // Skip to: 40669
+/* 26669 */ MCD_OPC_Decode, 129, 12, 176, 1, // Opcode: SQRSHRNv4i32_shift
+/* 26674 */ MCD_OPC_FilterValue, 15, 167, 54, // Skip to: 40669
+/* 26678 */ MCD_OPC_CheckPredicate, 0, 163, 54, // Skip to: 40669
+/* 26682 */ MCD_OPC_CheckField, 21, 1, 1, 157, 54, // Skip to: 40669
+/* 26688 */ MCD_OPC_Decode, 251, 3, 167, 1, // Opcode: FCVTZSv4i32_shift
+/* 26693 */ MCD_OPC_FilterValue, 3, 148, 54, // Skip to: 40669
+/* 26697 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 26700 */ MCD_OPC_FilterValue, 1, 247, 2, // Skip to: 27463
+/* 26704 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 26707 */ MCD_OPC_FilterValue, 0, 168, 1, // Skip to: 27135
+/* 26711 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 26714 */ MCD_OPC_FilterValue, 0, 207, 0, // Skip to: 26925
+/* 26718 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 26721 */ MCD_OPC_FilterValue, 0, 141, 0, // Skip to: 26866
+/* 26725 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 26728 */ MCD_OPC_FilterValue, 0, 75, 0, // Skip to: 26807
+/* 26732 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 26735 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26748
+/* 26739 */ MCD_OPC_CheckPredicate, 0, 102, 54, // Skip to: 40669
+/* 26743 */ MCD_OPC_Decode, 242, 8, 145, 1, // Opcode: MVNIv4i32
+/* 26748 */ MCD_OPC_FilterValue, 1, 93, 54, // Skip to: 40669
+/* 26752 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 26755 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26768
+/* 26759 */ MCD_OPC_CheckPredicate, 0, 82, 54, // Skip to: 40669
+/* 26763 */ MCD_OPC_Decode, 140, 18, 165, 1, // Opcode: USHRv16i8_shift
+/* 26768 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26781
+/* 26772 */ MCD_OPC_CheckPredicate, 0, 69, 54, // Skip to: 40669
+/* 26776 */ MCD_OPC_Decode, 236, 17, 165, 1, // Opcode: URSHRv16i8_shift
+/* 26781 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26794
+/* 26785 */ MCD_OPC_CheckPredicate, 0, 56, 54, // Skip to: 40669
+/* 26789 */ MCD_OPC_Decode, 228, 12, 168, 1, // Opcode: SRIv16i8_shift
+/* 26794 */ MCD_OPC_FilterValue, 3, 47, 54, // Skip to: 40669
+/* 26798 */ MCD_OPC_CheckPredicate, 0, 43, 54, // Skip to: 40669
+/* 26802 */ MCD_OPC_Decode, 145, 12, 169, 1, // Opcode: SQSHLUv16i8_shift
+/* 26807 */ MCD_OPC_FilterValue, 1, 34, 54, // Skip to: 40669
+/* 26811 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 26814 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26827
+/* 26818 */ MCD_OPC_CheckPredicate, 0, 23, 54, // Skip to: 40669
+/* 26822 */ MCD_OPC_Decode, 145, 18, 166, 1, // Opcode: USHRv8i16_shift
+/* 26827 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26840
+/* 26831 */ MCD_OPC_CheckPredicate, 0, 10, 54, // Skip to: 40669
+/* 26835 */ MCD_OPC_Decode, 241, 17, 166, 1, // Opcode: URSHRv8i16_shift
+/* 26840 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26853
+/* 26844 */ MCD_OPC_CheckPredicate, 0, 253, 53, // Skip to: 40669
+/* 26848 */ MCD_OPC_Decode, 233, 12, 170, 1, // Opcode: SRIv8i16_shift
+/* 26853 */ MCD_OPC_FilterValue, 3, 244, 53, // Skip to: 40669
+/* 26857 */ MCD_OPC_CheckPredicate, 0, 240, 53, // Skip to: 40669
+/* 26861 */ MCD_OPC_Decode, 150, 12, 171, 1, // Opcode: SQSHLUv8i16_shift
+/* 26866 */ MCD_OPC_FilterValue, 1, 231, 53, // Skip to: 40669
+/* 26870 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 26873 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26886
+/* 26877 */ MCD_OPC_CheckPredicate, 0, 220, 53, // Skip to: 40669
+/* 26881 */ MCD_OPC_Decode, 144, 18, 167, 1, // Opcode: USHRv4i32_shift
+/* 26886 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26899
+/* 26890 */ MCD_OPC_CheckPredicate, 0, 207, 53, // Skip to: 40669
+/* 26894 */ MCD_OPC_Decode, 240, 17, 167, 1, // Opcode: URSHRv4i32_shift
+/* 26899 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 26912
+/* 26903 */ MCD_OPC_CheckPredicate, 0, 194, 53, // Skip to: 40669
+/* 26907 */ MCD_OPC_Decode, 232, 12, 172, 1, // Opcode: SRIv4i32_shift
+/* 26912 */ MCD_OPC_FilterValue, 3, 185, 53, // Skip to: 40669
+/* 26916 */ MCD_OPC_CheckPredicate, 0, 181, 53, // Skip to: 40669
+/* 26920 */ MCD_OPC_Decode, 149, 12, 173, 1, // Opcode: SQSHLUv4i32_shift
+/* 26925 */ MCD_OPC_FilterValue, 1, 172, 53, // Skip to: 40669
+/* 26929 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 26932 */ MCD_OPC_FilterValue, 0, 140, 0, // Skip to: 27076
+/* 26936 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 26939 */ MCD_OPC_FilterValue, 0, 74, 0, // Skip to: 27017
+/* 26943 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 26946 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 26958
+/* 26950 */ MCD_OPC_CheckPredicate, 0, 147, 53, // Skip to: 40669
+/* 26954 */ MCD_OPC_Decode, 115, 149, 1, // Opcode: BICv4i32
+/* 26958 */ MCD_OPC_FilterValue, 1, 139, 53, // Skip to: 40669
+/* 26962 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 26965 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 26978
+/* 26969 */ MCD_OPC_CheckPredicate, 0, 128, 53, // Skip to: 40669
+/* 26973 */ MCD_OPC_Decode, 159, 18, 168, 1, // Opcode: USRAv16i8_shift
+/* 26978 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 26991
+/* 26982 */ MCD_OPC_CheckPredicate, 0, 115, 53, // Skip to: 40669
+/* 26986 */ MCD_OPC_Decode, 246, 17, 168, 1, // Opcode: URSRAv16i8_shift
+/* 26991 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 27004
+/* 26995 */ MCD_OPC_CheckPredicate, 0, 102, 53, // Skip to: 40669
+/* 26999 */ MCD_OPC_Decode, 195, 10, 177, 1, // Opcode: SLIv16i8_shift
+/* 27004 */ MCD_OPC_FilterValue, 3, 93, 53, // Skip to: 40669
+/* 27008 */ MCD_OPC_CheckPredicate, 0, 89, 53, // Skip to: 40669
+/* 27012 */ MCD_OPC_Decode, 173, 17, 169, 1, // Opcode: UQSHLv16i8_shift
+/* 27017 */ MCD_OPC_FilterValue, 1, 80, 53, // Skip to: 40669
+/* 27021 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 27024 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27037
+/* 27028 */ MCD_OPC_CheckPredicate, 0, 69, 53, // Skip to: 40669
+/* 27032 */ MCD_OPC_Decode, 164, 18, 170, 1, // Opcode: USRAv8i16_shift
+/* 27037 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 27050
+/* 27041 */ MCD_OPC_CheckPredicate, 0, 56, 53, // Skip to: 40669
+/* 27045 */ MCD_OPC_Decode, 251, 17, 170, 1, // Opcode: URSRAv8i16_shift
+/* 27050 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 27063
+/* 27054 */ MCD_OPC_CheckPredicate, 0, 43, 53, // Skip to: 40669
+/* 27058 */ MCD_OPC_Decode, 200, 10, 178, 1, // Opcode: SLIv8i16_shift
+/* 27063 */ MCD_OPC_FilterValue, 3, 34, 53, // Skip to: 40669
+/* 27067 */ MCD_OPC_CheckPredicate, 0, 30, 53, // Skip to: 40669
+/* 27071 */ MCD_OPC_Decode, 187, 17, 171, 1, // Opcode: UQSHLv8i16_shift
+/* 27076 */ MCD_OPC_FilterValue, 1, 21, 53, // Skip to: 40669
+/* 27080 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 27083 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27096
+/* 27087 */ MCD_OPC_CheckPredicate, 0, 10, 53, // Skip to: 40669
+/* 27091 */ MCD_OPC_Decode, 163, 18, 172, 1, // Opcode: USRAv4i32_shift
+/* 27096 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 27109
+/* 27100 */ MCD_OPC_CheckPredicate, 0, 253, 52, // Skip to: 40669
+/* 27104 */ MCD_OPC_Decode, 250, 17, 172, 1, // Opcode: URSRAv4i32_shift
+/* 27109 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 27122
+/* 27113 */ MCD_OPC_CheckPredicate, 0, 240, 52, // Skip to: 40669
+/* 27117 */ MCD_OPC_Decode, 199, 10, 179, 1, // Opcode: SLIv4i32_shift
+/* 27122 */ MCD_OPC_FilterValue, 3, 231, 52, // Skip to: 40669
+/* 27126 */ MCD_OPC_CheckPredicate, 0, 227, 52, // Skip to: 40669
+/* 27130 */ MCD_OPC_Decode, 185, 17, 173, 1, // Opcode: UQSHLv4i32_shift
+/* 27135 */ MCD_OPC_FilterValue, 1, 218, 52, // Skip to: 40669
+/* 27139 */ MCD_OPC_ExtractField, 14, 1, // Inst{14} ...
+/* 27142 */ MCD_OPC_FilterValue, 0, 226, 0, // Skip to: 27372
+/* 27146 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 27149 */ MCD_OPC_FilterValue, 0, 129, 0, // Skip to: 27282
+/* 27153 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 27156 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 27249
+/* 27160 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 27163 */ MCD_OPC_FilterValue, 0, 49, 0, // Skip to: 27216
+/* 27167 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 27170 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27183
+/* 27174 */ MCD_OPC_CheckPredicate, 0, 179, 52, // Skip to: 40669
+/* 27178 */ MCD_OPC_Decode, 244, 8, 145, 1, // Opcode: MVNIv8i16
+/* 27183 */ MCD_OPC_FilterValue, 1, 170, 52, // Skip to: 40669
+/* 27187 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 27190 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27203
+/* 27194 */ MCD_OPC_CheckPredicate, 0, 159, 52, // Skip to: 40669
+/* 27198 */ MCD_OPC_Decode, 186, 12, 174, 1, // Opcode: SQSHRUNv16i8_shift
+/* 27203 */ MCD_OPC_FilterValue, 1, 150, 52, // Skip to: 40669
+/* 27207 */ MCD_OPC_CheckPredicate, 0, 146, 52, // Skip to: 40669
+/* 27211 */ MCD_OPC_Decode, 253, 17, 169, 1, // Opcode: USHLLv16i8_shift
+/* 27216 */ MCD_OPC_FilterValue, 1, 137, 52, // Skip to: 40669
+/* 27220 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 27223 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27236
+/* 27227 */ MCD_OPC_CheckPredicate, 0, 126, 52, // Skip to: 40669
+/* 27231 */ MCD_OPC_Decode, 190, 12, 175, 1, // Opcode: SQSHRUNv8i16_shift
+/* 27236 */ MCD_OPC_FilterValue, 1, 117, 52, // Skip to: 40669
+/* 27240 */ MCD_OPC_CheckPredicate, 0, 113, 52, // Skip to: 40669
+/* 27244 */ MCD_OPC_Decode, 129, 18, 171, 1, // Opcode: USHLLv8i16_shift
+/* 27249 */ MCD_OPC_FilterValue, 1, 104, 52, // Skip to: 40669
+/* 27253 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 27256 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27269
+/* 27260 */ MCD_OPC_CheckPredicate, 0, 93, 52, // Skip to: 40669
+/* 27264 */ MCD_OPC_Decode, 189, 12, 176, 1, // Opcode: SQSHRUNv4i32_shift
+/* 27269 */ MCD_OPC_FilterValue, 1, 84, 52, // Skip to: 40669
+/* 27273 */ MCD_OPC_CheckPredicate, 0, 80, 52, // Skip to: 40669
+/* 27277 */ MCD_OPC_Decode, 128, 18, 173, 1, // Opcode: USHLLv4i32_shift
+/* 27282 */ MCD_OPC_FilterValue, 1, 71, 52, // Skip to: 40669
+/* 27286 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 27289 */ MCD_OPC_FilterValue, 0, 60, 0, // Skip to: 27353
+/* 27293 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 27296 */ MCD_OPC_FilterValue, 0, 34, 0, // Skip to: 27334
+/* 27300 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 27303 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 27315
+/* 27307 */ MCD_OPC_CheckPredicate, 0, 46, 52, // Skip to: 40669
+/* 27311 */ MCD_OPC_Decode, 116, 149, 1, // Opcode: BICv8i16
+/* 27315 */ MCD_OPC_FilterValue, 1, 38, 52, // Skip to: 40669
+/* 27319 */ MCD_OPC_CheckPredicate, 0, 34, 52, // Skip to: 40669
+/* 27323 */ MCD_OPC_CheckField, 13, 1, 0, 28, 52, // Skip to: 40669
+/* 27329 */ MCD_OPC_Decode, 193, 17, 174, 1, // Opcode: UQSHRNv16i8_shift
+/* 27334 */ MCD_OPC_FilterValue, 1, 19, 52, // Skip to: 40669
+/* 27338 */ MCD_OPC_CheckPredicate, 0, 15, 52, // Skip to: 40669
+/* 27342 */ MCD_OPC_CheckField, 13, 1, 0, 9, 52, // Skip to: 40669
+/* 27348 */ MCD_OPC_Decode, 197, 17, 175, 1, // Opcode: UQSHRNv8i16_shift
+/* 27353 */ MCD_OPC_FilterValue, 1, 0, 52, // Skip to: 40669
+/* 27357 */ MCD_OPC_CheckPredicate, 0, 252, 51, // Skip to: 40669
+/* 27361 */ MCD_OPC_CheckField, 13, 1, 0, 246, 51, // Skip to: 40669
+/* 27367 */ MCD_OPC_Decode, 196, 17, 176, 1, // Opcode: UQSHRNv4i32_shift
+/* 27372 */ MCD_OPC_FilterValue, 1, 237, 51, // Skip to: 40669
+/* 27376 */ MCD_OPC_ExtractField, 13, 1, // Inst{13} ...
+/* 27379 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27398
+/* 27383 */ MCD_OPC_CheckPredicate, 0, 226, 51, // Skip to: 40669
+/* 27387 */ MCD_OPC_CheckField, 19, 3, 0, 220, 51, // Skip to: 40669
+/* 27393 */ MCD_OPC_Decode, 243, 8, 145, 1, // Opcode: MVNIv4s_msl
+/* 27398 */ MCD_OPC_FilterValue, 1, 211, 51, // Skip to: 40669
+/* 27402 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 27405 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 27444
+/* 27409 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 27412 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27431
+/* 27416 */ MCD_OPC_CheckPredicate, 0, 193, 51, // Skip to: 40669
+/* 27420 */ MCD_OPC_CheckField, 19, 2, 0, 187, 51, // Skip to: 40669
+/* 27426 */ MCD_OPC_Decode, 202, 8, 145, 1, // Opcode: MOVIv2d_ns
+/* 27431 */ MCD_OPC_FilterValue, 1, 178, 51, // Skip to: 40669
+/* 27435 */ MCD_OPC_CheckPredicate, 0, 174, 51, // Skip to: 40669
+/* 27439 */ MCD_OPC_Decode, 177, 16, 167, 1, // Opcode: UCVTFv4i32_shift
+/* 27444 */ MCD_OPC_FilterValue, 1, 165, 51, // Skip to: 40669
+/* 27448 */ MCD_OPC_CheckPredicate, 0, 161, 51, // Skip to: 40669
+/* 27452 */ MCD_OPC_CheckField, 19, 3, 0, 155, 51, // Skip to: 40669
+/* 27458 */ MCD_OPC_Decode, 231, 4, 145, 1, // Opcode: FMOVv2f64_ns
+/* 27463 */ MCD_OPC_FilterValue, 3, 146, 51, // Skip to: 40669
+/* 27467 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 27470 */ MCD_OPC_FilterValue, 8, 55, 0, // Skip to: 27529
+/* 27474 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 27477 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 27516
+/* 27481 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 27484 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27503
+/* 27488 */ MCD_OPC_CheckPredicate, 0, 121, 51, // Skip to: 40669
+/* 27492 */ MCD_OPC_CheckField, 19, 1, 1, 115, 51, // Skip to: 40669
+/* 27498 */ MCD_OPC_Decode, 135, 12, 174, 1, // Opcode: SQRSHRUNv16i8_shift
+/* 27503 */ MCD_OPC_FilterValue, 1, 106, 51, // Skip to: 40669
+/* 27507 */ MCD_OPC_CheckPredicate, 0, 102, 51, // Skip to: 40669
+/* 27511 */ MCD_OPC_Decode, 139, 12, 175, 1, // Opcode: SQRSHRUNv8i16_shift
+/* 27516 */ MCD_OPC_FilterValue, 1, 93, 51, // Skip to: 40669
+/* 27520 */ MCD_OPC_CheckPredicate, 0, 89, 51, // Skip to: 40669
+/* 27524 */ MCD_OPC_Decode, 138, 12, 176, 1, // Opcode: SQRSHRUNv4i32_shift
+/* 27529 */ MCD_OPC_FilterValue, 9, 55, 0, // Skip to: 27588
+/* 27533 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 27536 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 27575
+/* 27540 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 27543 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27562
+/* 27547 */ MCD_OPC_CheckPredicate, 0, 62, 51, // Skip to: 40669
+/* 27551 */ MCD_OPC_CheckField, 19, 1, 1, 56, 51, // Skip to: 40669
+/* 27557 */ MCD_OPC_Decode, 162, 17, 174, 1, // Opcode: UQRSHRNv16i8_shift
+/* 27562 */ MCD_OPC_FilterValue, 1, 47, 51, // Skip to: 40669
+/* 27566 */ MCD_OPC_CheckPredicate, 0, 43, 51, // Skip to: 40669
+/* 27570 */ MCD_OPC_Decode, 166, 17, 175, 1, // Opcode: UQRSHRNv8i16_shift
+/* 27575 */ MCD_OPC_FilterValue, 1, 34, 51, // Skip to: 40669
+/* 27579 */ MCD_OPC_CheckPredicate, 0, 30, 51, // Skip to: 40669
+/* 27583 */ MCD_OPC_Decode, 165, 17, 176, 1, // Opcode: UQRSHRNv4i32_shift
+/* 27588 */ MCD_OPC_FilterValue, 15, 21, 51, // Skip to: 40669
+/* 27592 */ MCD_OPC_CheckPredicate, 0, 17, 51, // Skip to: 40669
+/* 27596 */ MCD_OPC_CheckField, 21, 1, 1, 11, 51, // Skip to: 40669
+/* 27602 */ MCD_OPC_Decode, 152, 4, 167, 1, // Opcode: FCVTZUv4i32_shift
+/* 27607 */ MCD_OPC_FilterValue, 13, 221, 3, // Skip to: 28600
+/* 27611 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 27614 */ MCD_OPC_FilterValue, 0, 80, 0, // Skip to: 27698
+/* 27618 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 27621 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 27640
+/* 27625 */ MCD_OPC_CheckPredicate, 0, 240, 50, // Skip to: 40669
+/* 27629 */ MCD_OPC_CheckField, 10, 1, 0, 234, 50, // Skip to: 40669
+/* 27635 */ MCD_OPC_Decode, 184, 8, 180, 1, // Opcode: MLAv4i16_indexed
+/* 27640 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 27659
+/* 27644 */ MCD_OPC_CheckPredicate, 0, 221, 50, // Skip to: 40669
+/* 27648 */ MCD_OPC_CheckField, 10, 2, 1, 215, 50, // Skip to: 40669
+/* 27654 */ MCD_OPC_Decode, 148, 13, 181, 1, // Opcode: SSHRv2i64_shift
+/* 27659 */ MCD_OPC_FilterValue, 3, 206, 50, // Skip to: 40669
+/* 27663 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 27666 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27679
+/* 27670 */ MCD_OPC_CheckPredicate, 0, 195, 50, // Skip to: 40669
+/* 27674 */ MCD_OPC_Decode, 188, 8, 182, 1, // Opcode: MLAv8i16_indexed
+/* 27679 */ MCD_OPC_FilterValue, 1, 186, 50, // Skip to: 40669
+/* 27683 */ MCD_OPC_CheckPredicate, 0, 182, 50, // Skip to: 40669
+/* 27687 */ MCD_OPC_CheckField, 11, 1, 0, 176, 50, // Skip to: 40669
+/* 27693 */ MCD_OPC_Decode, 142, 18, 181, 1, // Opcode: USHRv2i64_shift
+/* 27698 */ MCD_OPC_FilterValue, 1, 41, 0, // Skip to: 27743
+/* 27702 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 27705 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 27724
+/* 27709 */ MCD_OPC_CheckPredicate, 0, 156, 50, // Skip to: 40669
+/* 27713 */ MCD_OPC_CheckField, 10, 2, 1, 150, 50, // Skip to: 40669
+/* 27719 */ MCD_OPC_Decode, 156, 13, 183, 1, // Opcode: SSRAv2i64_shift
+/* 27724 */ MCD_OPC_FilterValue, 3, 141, 50, // Skip to: 40669
+/* 27728 */ MCD_OPC_CheckPredicate, 0, 137, 50, // Skip to: 40669
+/* 27732 */ MCD_OPC_CheckField, 10, 2, 1, 131, 50, // Skip to: 40669
+/* 27738 */ MCD_OPC_Decode, 161, 18, 183, 1, // Opcode: USRAv2i64_shift
+/* 27743 */ MCD_OPC_FilterValue, 2, 119, 0, // Skip to: 27866
+/* 27747 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 27750 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27769
+/* 27754 */ MCD_OPC_CheckPredicate, 0, 111, 50, // Skip to: 40669
+/* 27758 */ MCD_OPC_CheckField, 10, 1, 0, 105, 50, // Skip to: 40669
+/* 27764 */ MCD_OPC_Decode, 241, 10, 184, 1, // Opcode: SMLALv4i16_indexed
+/* 27769 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 27788
+/* 27773 */ MCD_OPC_CheckPredicate, 0, 92, 50, // Skip to: 40669
+/* 27777 */ MCD_OPC_CheckField, 10, 1, 0, 86, 50, // Skip to: 40669
+/* 27783 */ MCD_OPC_Decode, 232, 16, 184, 1, // Opcode: UMLALv4i16_indexed
+/* 27788 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 27827
+/* 27792 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 27795 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27808
+/* 27799 */ MCD_OPC_CheckPredicate, 0, 66, 50, // Skip to: 40669
+/* 27803 */ MCD_OPC_Decode, 245, 10, 182, 1, // Opcode: SMLALv8i16_indexed
+/* 27808 */ MCD_OPC_FilterValue, 1, 57, 50, // Skip to: 40669
+/* 27812 */ MCD_OPC_CheckPredicate, 0, 53, 50, // Skip to: 40669
+/* 27816 */ MCD_OPC_CheckField, 11, 1, 0, 47, 50, // Skip to: 40669
+/* 27822 */ MCD_OPC_Decode, 246, 12, 181, 1, // Opcode: SRSHRv2i64_shift
+/* 27827 */ MCD_OPC_FilterValue, 3, 38, 50, // Skip to: 40669
+/* 27831 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 27834 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27847
+/* 27838 */ MCD_OPC_CheckPredicate, 0, 27, 50, // Skip to: 40669
+/* 27842 */ MCD_OPC_Decode, 236, 16, 182, 1, // Opcode: UMLALv8i16_indexed
+/* 27847 */ MCD_OPC_FilterValue, 1, 18, 50, // Skip to: 40669
+/* 27851 */ MCD_OPC_CheckPredicate, 0, 14, 50, // Skip to: 40669
+/* 27855 */ MCD_OPC_CheckField, 11, 1, 0, 8, 50, // Skip to: 40669
+/* 27861 */ MCD_OPC_Decode, 238, 17, 181, 1, // Opcode: URSHRv2i64_shift
+/* 27866 */ MCD_OPC_FilterValue, 3, 80, 0, // Skip to: 27950
+/* 27870 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 27873 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 27892
+/* 27877 */ MCD_OPC_CheckPredicate, 0, 244, 49, // Skip to: 40669
+/* 27881 */ MCD_OPC_CheckField, 10, 1, 0, 238, 49, // Skip to: 40669
+/* 27887 */ MCD_OPC_Decode, 175, 11, 184, 1, // Opcode: SQDMLALv4i16_indexed
+/* 27892 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 27931
+/* 27896 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 27899 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 27912
+/* 27903 */ MCD_OPC_CheckPredicate, 0, 218, 49, // Skip to: 40669
+/* 27907 */ MCD_OPC_Decode, 179, 11, 182, 1, // Opcode: SQDMLALv8i16_indexed
+/* 27912 */ MCD_OPC_FilterValue, 1, 209, 49, // Skip to: 40669
+/* 27916 */ MCD_OPC_CheckPredicate, 0, 205, 49, // Skip to: 40669
+/* 27920 */ MCD_OPC_CheckField, 11, 1, 0, 199, 49, // Skip to: 40669
+/* 27926 */ MCD_OPC_Decode, 254, 12, 183, 1, // Opcode: SRSRAv2i64_shift
+/* 27931 */ MCD_OPC_FilterValue, 3, 190, 49, // Skip to: 40669
+/* 27935 */ MCD_OPC_CheckPredicate, 0, 186, 49, // Skip to: 40669
+/* 27939 */ MCD_OPC_CheckField, 10, 2, 1, 180, 49, // Skip to: 40669
+/* 27945 */ MCD_OPC_Decode, 248, 17, 183, 1, // Opcode: URSRAv2i64_shift
+/* 27950 */ MCD_OPC_FilterValue, 4, 61, 0, // Skip to: 28015
+/* 27954 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 27957 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 27990
+/* 27961 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 27964 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 27977
+/* 27968 */ MCD_OPC_CheckPredicate, 0, 153, 49, // Skip to: 40669
+/* 27972 */ MCD_OPC_Decode, 194, 8, 180, 1, // Opcode: MLSv4i16_indexed
+/* 27977 */ MCD_OPC_FilterValue, 3, 144, 49, // Skip to: 40669
+/* 27981 */ MCD_OPC_CheckPredicate, 0, 140, 49, // Skip to: 40669
+/* 27985 */ MCD_OPC_Decode, 198, 8, 182, 1, // Opcode: MLSv8i16_indexed
+/* 27990 */ MCD_OPC_FilterValue, 1, 131, 49, // Skip to: 40669
+/* 27994 */ MCD_OPC_CheckPredicate, 0, 127, 49, // Skip to: 40669
+/* 27998 */ MCD_OPC_CheckField, 29, 3, 3, 121, 49, // Skip to: 40669
+/* 28004 */ MCD_OPC_CheckField, 11, 1, 0, 115, 49, // Skip to: 40669
+/* 28010 */ MCD_OPC_Decode, 230, 12, 183, 1, // Opcode: SRIv2i64_shift
+/* 28015 */ MCD_OPC_FilterValue, 5, 41, 0, // Skip to: 28060
+/* 28019 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28022 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28041
+/* 28026 */ MCD_OPC_CheckPredicate, 0, 95, 49, // Skip to: 40669
+/* 28030 */ MCD_OPC_CheckField, 10, 2, 1, 89, 49, // Skip to: 40669
+/* 28036 */ MCD_OPC_Decode, 177, 10, 185, 1, // Opcode: SHLv2i64_shift
+/* 28041 */ MCD_OPC_FilterValue, 3, 80, 49, // Skip to: 40669
+/* 28045 */ MCD_OPC_CheckPredicate, 0, 76, 49, // Skip to: 40669
+/* 28049 */ MCD_OPC_CheckField, 10, 2, 1, 70, 49, // Skip to: 40669
+/* 28055 */ MCD_OPC_Decode, 197, 10, 186, 1, // Opcode: SLIv2i64_shift
+/* 28060 */ MCD_OPC_FilterValue, 6, 99, 0, // Skip to: 28163
+/* 28064 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28067 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28086
+/* 28071 */ MCD_OPC_CheckPredicate, 0, 50, 49, // Skip to: 40669
+/* 28075 */ MCD_OPC_CheckField, 10, 1, 0, 44, 49, // Skip to: 40669
+/* 28081 */ MCD_OPC_Decode, 251, 10, 184, 1, // Opcode: SMLSLv4i16_indexed
+/* 28086 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28105
+/* 28090 */ MCD_OPC_CheckPredicate, 0, 31, 49, // Skip to: 40669
+/* 28094 */ MCD_OPC_CheckField, 10, 1, 0, 25, 49, // Skip to: 40669
+/* 28100 */ MCD_OPC_Decode, 242, 16, 184, 1, // Opcode: UMLSLv4i16_indexed
+/* 28105 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28124
+/* 28109 */ MCD_OPC_CheckPredicate, 0, 12, 49, // Skip to: 40669
+/* 28113 */ MCD_OPC_CheckField, 10, 1, 0, 6, 49, // Skip to: 40669
+/* 28119 */ MCD_OPC_Decode, 255, 10, 182, 1, // Opcode: SMLSLv8i16_indexed
+/* 28124 */ MCD_OPC_FilterValue, 3, 253, 48, // Skip to: 40669
+/* 28128 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 28131 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28144
+/* 28135 */ MCD_OPC_CheckPredicate, 0, 242, 48, // Skip to: 40669
+/* 28139 */ MCD_OPC_Decode, 246, 16, 182, 1, // Opcode: UMLSLv8i16_indexed
+/* 28144 */ MCD_OPC_FilterValue, 1, 233, 48, // Skip to: 40669
+/* 28148 */ MCD_OPC_CheckPredicate, 0, 229, 48, // Skip to: 40669
+/* 28152 */ MCD_OPC_CheckField, 11, 1, 0, 223, 48, // Skip to: 40669
+/* 28158 */ MCD_OPC_Decode, 147, 12, 185, 1, // Opcode: SQSHLUv2i64_shift
+/* 28163 */ MCD_OPC_FilterValue, 7, 80, 0, // Skip to: 28247
+/* 28167 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28170 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28189
+/* 28174 */ MCD_OPC_CheckPredicate, 0, 203, 48, // Skip to: 40669
+/* 28178 */ MCD_OPC_CheckField, 10, 1, 0, 197, 48, // Skip to: 40669
+/* 28184 */ MCD_OPC_Decode, 187, 11, 184, 1, // Opcode: SQDMLSLv4i16_indexed
+/* 28189 */ MCD_OPC_FilterValue, 2, 35, 0, // Skip to: 28228
+/* 28193 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 28196 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 28209
+/* 28200 */ MCD_OPC_CheckPredicate, 0, 177, 48, // Skip to: 40669
+/* 28204 */ MCD_OPC_Decode, 191, 11, 182, 1, // Opcode: SQDMLSLv8i16_indexed
+/* 28209 */ MCD_OPC_FilterValue, 1, 168, 48, // Skip to: 40669
+/* 28213 */ MCD_OPC_CheckPredicate, 0, 164, 48, // Skip to: 40669
+/* 28217 */ MCD_OPC_CheckField, 11, 1, 0, 158, 48, // Skip to: 40669
+/* 28223 */ MCD_OPC_Decode, 165, 12, 185, 1, // Opcode: SQSHLv2i64_shift
+/* 28228 */ MCD_OPC_FilterValue, 3, 149, 48, // Skip to: 40669
+/* 28232 */ MCD_OPC_CheckPredicate, 0, 145, 48, // Skip to: 40669
+/* 28236 */ MCD_OPC_CheckField, 10, 2, 1, 139, 48, // Skip to: 40669
+/* 28242 */ MCD_OPC_Decode, 181, 17, 185, 1, // Opcode: UQSHLv2i64_shift
+/* 28247 */ MCD_OPC_FilterValue, 8, 41, 0, // Skip to: 28292
+/* 28251 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28254 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28273
+/* 28258 */ MCD_OPC_CheckPredicate, 0, 119, 48, // Skip to: 40669
+/* 28262 */ MCD_OPC_CheckField, 10, 1, 0, 113, 48, // Skip to: 40669
+/* 28268 */ MCD_OPC_Decode, 233, 8, 187, 1, // Opcode: MULv4i16_indexed
+/* 28273 */ MCD_OPC_FilterValue, 2, 104, 48, // Skip to: 40669
+/* 28277 */ MCD_OPC_CheckPredicate, 0, 100, 48, // Skip to: 40669
+/* 28281 */ MCD_OPC_CheckField, 10, 1, 0, 94, 48, // Skip to: 40669
+/* 28287 */ MCD_OPC_Decode, 237, 8, 188, 1, // Opcode: MULv8i16_indexed
+/* 28292 */ MCD_OPC_FilterValue, 10, 79, 0, // Skip to: 28375
+/* 28296 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28299 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28318
+/* 28303 */ MCD_OPC_CheckPredicate, 0, 74, 48, // Skip to: 40669
+/* 28307 */ MCD_OPC_CheckField, 10, 1, 0, 68, 48, // Skip to: 40669
+/* 28313 */ MCD_OPC_Decode, 140, 11, 189, 1, // Opcode: SMULLv4i16_indexed
+/* 28318 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28337
+/* 28322 */ MCD_OPC_CheckPredicate, 0, 55, 48, // Skip to: 40669
+/* 28326 */ MCD_OPC_CheckField, 10, 1, 0, 49, 48, // Skip to: 40669
+/* 28332 */ MCD_OPC_Decode, 130, 17, 189, 1, // Opcode: UMULLv4i16_indexed
+/* 28337 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28356
+/* 28341 */ MCD_OPC_CheckPredicate, 0, 36, 48, // Skip to: 40669
+/* 28345 */ MCD_OPC_CheckField, 10, 1, 0, 30, 48, // Skip to: 40669
+/* 28351 */ MCD_OPC_Decode, 144, 11, 188, 1, // Opcode: SMULLv8i16_indexed
+/* 28356 */ MCD_OPC_FilterValue, 3, 21, 48, // Skip to: 40669
+/* 28360 */ MCD_OPC_CheckPredicate, 0, 17, 48, // Skip to: 40669
+/* 28364 */ MCD_OPC_CheckField, 10, 1, 0, 11, 48, // Skip to: 40669
+/* 28370 */ MCD_OPC_Decode, 134, 17, 188, 1, // Opcode: UMULLv8i16_indexed
+/* 28375 */ MCD_OPC_FilterValue, 11, 41, 0, // Skip to: 28420
+/* 28379 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28382 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28401
+/* 28386 */ MCD_OPC_CheckPredicate, 0, 247, 47, // Skip to: 40669
+/* 28390 */ MCD_OPC_CheckField, 10, 1, 0, 241, 47, // Skip to: 40669
+/* 28396 */ MCD_OPC_Decode, 211, 11, 189, 1, // Opcode: SQDMULLv4i16_indexed
+/* 28401 */ MCD_OPC_FilterValue, 2, 232, 47, // Skip to: 40669
+/* 28405 */ MCD_OPC_CheckPredicate, 0, 228, 47, // Skip to: 40669
+/* 28409 */ MCD_OPC_CheckField, 10, 1, 0, 222, 47, // Skip to: 40669
+/* 28415 */ MCD_OPC_Decode, 215, 11, 188, 1, // Opcode: SQDMULLv8i16_indexed
+/* 28420 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 28465
+/* 28424 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28427 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28446
+/* 28431 */ MCD_OPC_CheckPredicate, 0, 202, 47, // Skip to: 40669
+/* 28435 */ MCD_OPC_CheckField, 10, 1, 0, 196, 47, // Skip to: 40669
+/* 28441 */ MCD_OPC_Decode, 200, 11, 187, 1, // Opcode: SQDMULHv4i16_indexed
+/* 28446 */ MCD_OPC_FilterValue, 2, 187, 47, // Skip to: 40669
+/* 28450 */ MCD_OPC_CheckPredicate, 0, 183, 47, // Skip to: 40669
+/* 28454 */ MCD_OPC_CheckField, 10, 1, 0, 177, 47, // Skip to: 40669
+/* 28460 */ MCD_OPC_Decode, 204, 11, 188, 1, // Opcode: SQDMULHv8i16_indexed
+/* 28465 */ MCD_OPC_FilterValue, 13, 41, 0, // Skip to: 28510
+/* 28469 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28472 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28491
+/* 28476 */ MCD_OPC_CheckPredicate, 0, 157, 47, // Skip to: 40669
+/* 28480 */ MCD_OPC_CheckField, 10, 1, 0, 151, 47, // Skip to: 40669
+/* 28486 */ MCD_OPC_Decode, 235, 11, 187, 1, // Opcode: SQRDMULHv4i16_indexed
+/* 28491 */ MCD_OPC_FilterValue, 2, 142, 47, // Skip to: 40669
+/* 28495 */ MCD_OPC_CheckPredicate, 0, 138, 47, // Skip to: 40669
+/* 28499 */ MCD_OPC_CheckField, 10, 1, 0, 132, 47, // Skip to: 40669
+/* 28505 */ MCD_OPC_Decode, 239, 11, 188, 1, // Opcode: SQRDMULHv8i16_indexed
+/* 28510 */ MCD_OPC_FilterValue, 14, 41, 0, // Skip to: 28555
+/* 28514 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28517 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28536
+/* 28521 */ MCD_OPC_CheckPredicate, 0, 112, 47, // Skip to: 40669
+/* 28525 */ MCD_OPC_CheckField, 10, 2, 1, 106, 47, // Skip to: 40669
+/* 28531 */ MCD_OPC_Decode, 145, 10, 181, 1, // Opcode: SCVTFv2i64_shift
+/* 28536 */ MCD_OPC_FilterValue, 3, 97, 47, // Skip to: 40669
+/* 28540 */ MCD_OPC_CheckPredicate, 0, 93, 47, // Skip to: 40669
+/* 28544 */ MCD_OPC_CheckField, 10, 2, 1, 87, 47, // Skip to: 40669
+/* 28550 */ MCD_OPC_Decode, 175, 16, 181, 1, // Opcode: UCVTFv2i64_shift
+/* 28555 */ MCD_OPC_FilterValue, 15, 78, 47, // Skip to: 40669
+/* 28559 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28562 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28581
+/* 28566 */ MCD_OPC_CheckPredicate, 0, 67, 47, // Skip to: 40669
+/* 28570 */ MCD_OPC_CheckField, 10, 2, 3, 61, 47, // Skip to: 40669
+/* 28576 */ MCD_OPC_Decode, 249, 3, 181, 1, // Opcode: FCVTZSv2i64_shift
+/* 28581 */ MCD_OPC_FilterValue, 3, 52, 47, // Skip to: 40669
+/* 28585 */ MCD_OPC_CheckPredicate, 0, 48, 47, // Skip to: 40669
+/* 28589 */ MCD_OPC_CheckField, 10, 2, 3, 42, 47, // Skip to: 40669
+/* 28595 */ MCD_OPC_Decode, 150, 4, 181, 1, // Opcode: FCVTZUv2i64_shift
+/* 28600 */ MCD_OPC_FilterValue, 14, 17, 3, // Skip to: 29389
+/* 28604 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 28607 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 28652
+/* 28611 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28614 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28633
+/* 28618 */ MCD_OPC_CheckPredicate, 0, 15, 47, // Skip to: 40669
+/* 28622 */ MCD_OPC_CheckField, 10, 1, 0, 9, 47, // Skip to: 40669
+/* 28628 */ MCD_OPC_Decode, 182, 8, 190, 1, // Opcode: MLAv2i32_indexed
+/* 28633 */ MCD_OPC_FilterValue, 3, 0, 47, // Skip to: 40669
+/* 28637 */ MCD_OPC_CheckPredicate, 0, 252, 46, // Skip to: 40669
+/* 28641 */ MCD_OPC_CheckField, 10, 1, 0, 246, 46, // Skip to: 40669
+/* 28647 */ MCD_OPC_Decode, 186, 8, 191, 1, // Opcode: MLAv4i32_indexed
+/* 28652 */ MCD_OPC_FilterValue, 1, 41, 0, // Skip to: 28697
+/* 28656 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28659 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28678
+/* 28663 */ MCD_OPC_CheckPredicate, 0, 226, 46, // Skip to: 40669
+/* 28667 */ MCD_OPC_CheckField, 10, 1, 0, 220, 46, // Skip to: 40669
+/* 28673 */ MCD_OPC_Decode, 208, 4, 190, 1, // Opcode: FMLAv2i32_indexed
+/* 28678 */ MCD_OPC_FilterValue, 2, 211, 46, // Skip to: 40669
+/* 28682 */ MCD_OPC_CheckPredicate, 0, 207, 46, // Skip to: 40669
+/* 28686 */ MCD_OPC_CheckField, 10, 1, 0, 201, 46, // Skip to: 40669
+/* 28692 */ MCD_OPC_Decode, 211, 4, 191, 1, // Opcode: FMLAv4i32_indexed
+/* 28697 */ MCD_OPC_FilterValue, 2, 79, 0, // Skip to: 28780
+/* 28701 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28704 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28723
+/* 28708 */ MCD_OPC_CheckPredicate, 0, 181, 46, // Skip to: 40669
+/* 28712 */ MCD_OPC_CheckField, 10, 1, 0, 175, 46, // Skip to: 40669
+/* 28718 */ MCD_OPC_Decode, 239, 10, 192, 1, // Opcode: SMLALv2i32_indexed
+/* 28723 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28742
+/* 28727 */ MCD_OPC_CheckPredicate, 0, 162, 46, // Skip to: 40669
+/* 28731 */ MCD_OPC_CheckField, 10, 1, 0, 156, 46, // Skip to: 40669
+/* 28737 */ MCD_OPC_Decode, 230, 16, 192, 1, // Opcode: UMLALv2i32_indexed
+/* 28742 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28761
+/* 28746 */ MCD_OPC_CheckPredicate, 0, 143, 46, // Skip to: 40669
+/* 28750 */ MCD_OPC_CheckField, 10, 1, 0, 137, 46, // Skip to: 40669
+/* 28756 */ MCD_OPC_Decode, 243, 10, 191, 1, // Opcode: SMLALv4i32_indexed
+/* 28761 */ MCD_OPC_FilterValue, 3, 128, 46, // Skip to: 40669
+/* 28765 */ MCD_OPC_CheckPredicate, 0, 124, 46, // Skip to: 40669
+/* 28769 */ MCD_OPC_CheckField, 10, 1, 0, 118, 46, // Skip to: 40669
+/* 28775 */ MCD_OPC_Decode, 234, 16, 191, 1, // Opcode: UMLALv4i32_indexed
+/* 28780 */ MCD_OPC_FilterValue, 3, 41, 0, // Skip to: 28825
+/* 28784 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28787 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28806
+/* 28791 */ MCD_OPC_CheckPredicate, 0, 98, 46, // Skip to: 40669
+/* 28795 */ MCD_OPC_CheckField, 10, 1, 0, 92, 46, // Skip to: 40669
+/* 28801 */ MCD_OPC_Decode, 173, 11, 192, 1, // Opcode: SQDMLALv2i32_indexed
+/* 28806 */ MCD_OPC_FilterValue, 2, 83, 46, // Skip to: 40669
+/* 28810 */ MCD_OPC_CheckPredicate, 0, 79, 46, // Skip to: 40669
+/* 28814 */ MCD_OPC_CheckField, 10, 1, 0, 73, 46, // Skip to: 40669
+/* 28820 */ MCD_OPC_Decode, 177, 11, 191, 1, // Opcode: SQDMLALv4i32_indexed
+/* 28825 */ MCD_OPC_FilterValue, 4, 41, 0, // Skip to: 28870
+/* 28829 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28832 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28851
+/* 28836 */ MCD_OPC_CheckPredicate, 0, 53, 46, // Skip to: 40669
+/* 28840 */ MCD_OPC_CheckField, 10, 1, 0, 47, 46, // Skip to: 40669
+/* 28846 */ MCD_OPC_Decode, 192, 8, 190, 1, // Opcode: MLSv2i32_indexed
+/* 28851 */ MCD_OPC_FilterValue, 3, 38, 46, // Skip to: 40669
+/* 28855 */ MCD_OPC_CheckPredicate, 0, 34, 46, // Skip to: 40669
+/* 28859 */ MCD_OPC_CheckField, 10, 1, 0, 28, 46, // Skip to: 40669
+/* 28865 */ MCD_OPC_Decode, 196, 8, 191, 1, // Opcode: MLSv4i32_indexed
+/* 28870 */ MCD_OPC_FilterValue, 5, 41, 0, // Skip to: 28915
+/* 28874 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28877 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28896
+/* 28881 */ MCD_OPC_CheckPredicate, 0, 8, 46, // Skip to: 40669
+/* 28885 */ MCD_OPC_CheckField, 10, 1, 0, 2, 46, // Skip to: 40669
+/* 28891 */ MCD_OPC_Decode, 216, 4, 190, 1, // Opcode: FMLSv2i32_indexed
+/* 28896 */ MCD_OPC_FilterValue, 2, 249, 45, // Skip to: 40669
+/* 28900 */ MCD_OPC_CheckPredicate, 0, 245, 45, // Skip to: 40669
+/* 28904 */ MCD_OPC_CheckField, 10, 1, 0, 239, 45, // Skip to: 40669
+/* 28910 */ MCD_OPC_Decode, 219, 4, 191, 1, // Opcode: FMLSv4i32_indexed
+/* 28915 */ MCD_OPC_FilterValue, 6, 79, 0, // Skip to: 28998
+/* 28919 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 28922 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 28941
+/* 28926 */ MCD_OPC_CheckPredicate, 0, 219, 45, // Skip to: 40669
+/* 28930 */ MCD_OPC_CheckField, 10, 1, 0, 213, 45, // Skip to: 40669
+/* 28936 */ MCD_OPC_Decode, 249, 10, 192, 1, // Opcode: SMLSLv2i32_indexed
+/* 28941 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 28960
+/* 28945 */ MCD_OPC_CheckPredicate, 0, 200, 45, // Skip to: 40669
+/* 28949 */ MCD_OPC_CheckField, 10, 1, 0, 194, 45, // Skip to: 40669
+/* 28955 */ MCD_OPC_Decode, 240, 16, 192, 1, // Opcode: UMLSLv2i32_indexed
+/* 28960 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 28979
+/* 28964 */ MCD_OPC_CheckPredicate, 0, 181, 45, // Skip to: 40669
+/* 28968 */ MCD_OPC_CheckField, 10, 1, 0, 175, 45, // Skip to: 40669
+/* 28974 */ MCD_OPC_Decode, 253, 10, 191, 1, // Opcode: SMLSLv4i32_indexed
+/* 28979 */ MCD_OPC_FilterValue, 3, 166, 45, // Skip to: 40669
+/* 28983 */ MCD_OPC_CheckPredicate, 0, 162, 45, // Skip to: 40669
+/* 28987 */ MCD_OPC_CheckField, 10, 1, 0, 156, 45, // Skip to: 40669
+/* 28993 */ MCD_OPC_Decode, 244, 16, 191, 1, // Opcode: UMLSLv4i32_indexed
+/* 28998 */ MCD_OPC_FilterValue, 7, 41, 0, // Skip to: 29043
+/* 29002 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29005 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29024
+/* 29009 */ MCD_OPC_CheckPredicate, 0, 136, 45, // Skip to: 40669
+/* 29013 */ MCD_OPC_CheckField, 10, 1, 0, 130, 45, // Skip to: 40669
+/* 29019 */ MCD_OPC_Decode, 185, 11, 192, 1, // Opcode: SQDMLSLv2i32_indexed
+/* 29024 */ MCD_OPC_FilterValue, 2, 121, 45, // Skip to: 40669
+/* 29028 */ MCD_OPC_CheckPredicate, 0, 117, 45, // Skip to: 40669
+/* 29032 */ MCD_OPC_CheckField, 10, 1, 0, 111, 45, // Skip to: 40669
+/* 29038 */ MCD_OPC_Decode, 189, 11, 191, 1, // Opcode: SQDMLSLv4i32_indexed
+/* 29043 */ MCD_OPC_FilterValue, 8, 41, 0, // Skip to: 29088
+/* 29047 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29050 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29069
+/* 29054 */ MCD_OPC_CheckPredicate, 0, 91, 45, // Skip to: 40669
+/* 29058 */ MCD_OPC_CheckField, 10, 1, 0, 85, 45, // Skip to: 40669
+/* 29064 */ MCD_OPC_Decode, 231, 8, 193, 1, // Opcode: MULv2i32_indexed
+/* 29069 */ MCD_OPC_FilterValue, 2, 76, 45, // Skip to: 40669
+/* 29073 */ MCD_OPC_CheckPredicate, 0, 72, 45, // Skip to: 40669
+/* 29077 */ MCD_OPC_CheckField, 10, 1, 0, 66, 45, // Skip to: 40669
+/* 29083 */ MCD_OPC_Decode, 235, 8, 194, 1, // Opcode: MULv4i32_indexed
+/* 29088 */ MCD_OPC_FilterValue, 9, 79, 0, // Skip to: 29171
+/* 29092 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29095 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29114
+/* 29099 */ MCD_OPC_CheckPredicate, 0, 46, 45, // Skip to: 40669
+/* 29103 */ MCD_OPC_CheckField, 10, 1, 0, 40, 45, // Skip to: 40669
+/* 29109 */ MCD_OPC_Decode, 251, 4, 193, 1, // Opcode: FMULv2i32_indexed
+/* 29114 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 29133
+/* 29118 */ MCD_OPC_CheckPredicate, 0, 27, 45, // Skip to: 40669
+/* 29122 */ MCD_OPC_CheckField, 10, 1, 0, 21, 45, // Skip to: 40669
+/* 29128 */ MCD_OPC_Decode, 243, 4, 193, 1, // Opcode: FMULXv2i32_indexed
+/* 29133 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 29152
+/* 29137 */ MCD_OPC_CheckPredicate, 0, 8, 45, // Skip to: 40669
+/* 29141 */ MCD_OPC_CheckField, 10, 1, 0, 2, 45, // Skip to: 40669
+/* 29147 */ MCD_OPC_Decode, 254, 4, 194, 1, // Opcode: FMULv4i32_indexed
+/* 29152 */ MCD_OPC_FilterValue, 3, 249, 44, // Skip to: 40669
+/* 29156 */ MCD_OPC_CheckPredicate, 0, 245, 44, // Skip to: 40669
+/* 29160 */ MCD_OPC_CheckField, 10, 1, 0, 239, 44, // Skip to: 40669
+/* 29166 */ MCD_OPC_Decode, 246, 4, 194, 1, // Opcode: FMULXv4i32_indexed
+/* 29171 */ MCD_OPC_FilterValue, 10, 79, 0, // Skip to: 29254
+/* 29175 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29178 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29197
+/* 29182 */ MCD_OPC_CheckPredicate, 0, 219, 44, // Skip to: 40669
+/* 29186 */ MCD_OPC_CheckField, 10, 1, 0, 213, 44, // Skip to: 40669
+/* 29192 */ MCD_OPC_Decode, 138, 11, 195, 1, // Opcode: SMULLv2i32_indexed
+/* 29197 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 29216
+/* 29201 */ MCD_OPC_CheckPredicate, 0, 200, 44, // Skip to: 40669
+/* 29205 */ MCD_OPC_CheckField, 10, 1, 0, 194, 44, // Skip to: 40669
+/* 29211 */ MCD_OPC_Decode, 128, 17, 195, 1, // Opcode: UMULLv2i32_indexed
+/* 29216 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 29235
+/* 29220 */ MCD_OPC_CheckPredicate, 0, 181, 44, // Skip to: 40669
+/* 29224 */ MCD_OPC_CheckField, 10, 1, 0, 175, 44, // Skip to: 40669
+/* 29230 */ MCD_OPC_Decode, 142, 11, 194, 1, // Opcode: SMULLv4i32_indexed
+/* 29235 */ MCD_OPC_FilterValue, 3, 166, 44, // Skip to: 40669
+/* 29239 */ MCD_OPC_CheckPredicate, 0, 162, 44, // Skip to: 40669
+/* 29243 */ MCD_OPC_CheckField, 10, 1, 0, 156, 44, // Skip to: 40669
+/* 29249 */ MCD_OPC_Decode, 132, 17, 194, 1, // Opcode: UMULLv4i32_indexed
+/* 29254 */ MCD_OPC_FilterValue, 11, 41, 0, // Skip to: 29299
+/* 29258 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29261 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29280
+/* 29265 */ MCD_OPC_CheckPredicate, 0, 136, 44, // Skip to: 40669
+/* 29269 */ MCD_OPC_CheckField, 10, 1, 0, 130, 44, // Skip to: 40669
+/* 29275 */ MCD_OPC_Decode, 209, 11, 195, 1, // Opcode: SQDMULLv2i32_indexed
+/* 29280 */ MCD_OPC_FilterValue, 2, 121, 44, // Skip to: 40669
+/* 29284 */ MCD_OPC_CheckPredicate, 0, 117, 44, // Skip to: 40669
+/* 29288 */ MCD_OPC_CheckField, 10, 1, 0, 111, 44, // Skip to: 40669
+/* 29294 */ MCD_OPC_Decode, 213, 11, 194, 1, // Opcode: SQDMULLv4i32_indexed
+/* 29299 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 29344
+/* 29303 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29306 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29325
+/* 29310 */ MCD_OPC_CheckPredicate, 0, 91, 44, // Skip to: 40669
+/* 29314 */ MCD_OPC_CheckField, 10, 1, 0, 85, 44, // Skip to: 40669
+/* 29320 */ MCD_OPC_Decode, 198, 11, 193, 1, // Opcode: SQDMULHv2i32_indexed
+/* 29325 */ MCD_OPC_FilterValue, 2, 76, 44, // Skip to: 40669
+/* 29329 */ MCD_OPC_CheckPredicate, 0, 72, 44, // Skip to: 40669
+/* 29333 */ MCD_OPC_CheckField, 10, 1, 0, 66, 44, // Skip to: 40669
+/* 29339 */ MCD_OPC_Decode, 202, 11, 194, 1, // Opcode: SQDMULHv4i32_indexed
+/* 29344 */ MCD_OPC_FilterValue, 13, 57, 44, // Skip to: 40669
+/* 29348 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29351 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 29370
+/* 29355 */ MCD_OPC_CheckPredicate, 0, 46, 44, // Skip to: 40669
+/* 29359 */ MCD_OPC_CheckField, 10, 1, 0, 40, 44, // Skip to: 40669
+/* 29365 */ MCD_OPC_Decode, 233, 11, 193, 1, // Opcode: SQRDMULHv2i32_indexed
+/* 29370 */ MCD_OPC_FilterValue, 2, 31, 44, // Skip to: 40669
+/* 29374 */ MCD_OPC_CheckPredicate, 0, 27, 44, // Skip to: 40669
+/* 29378 */ MCD_OPC_CheckField, 10, 1, 0, 21, 44, // Skip to: 40669
+/* 29384 */ MCD_OPC_Decode, 237, 11, 194, 1, // Opcode: SQRDMULHv4i32_indexed
+/* 29389 */ MCD_OPC_FilterValue, 15, 12, 44, // Skip to: 40669
+/* 29393 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 29396 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 29427
+/* 29400 */ MCD_OPC_CheckPredicate, 0, 1, 44, // Skip to: 40669
+/* 29404 */ MCD_OPC_CheckField, 29, 3, 2, 251, 43, // Skip to: 40669
+/* 29410 */ MCD_OPC_CheckField, 21, 1, 0, 245, 43, // Skip to: 40669
+/* 29416 */ MCD_OPC_CheckField, 10, 1, 0, 239, 43, // Skip to: 40669
+/* 29422 */ MCD_OPC_Decode, 209, 4, 196, 1, // Opcode: FMLAv2i64_indexed
+/* 29427 */ MCD_OPC_FilterValue, 5, 27, 0, // Skip to: 29458
+/* 29431 */ MCD_OPC_CheckPredicate, 0, 226, 43, // Skip to: 40669
+/* 29435 */ MCD_OPC_CheckField, 29, 3, 2, 220, 43, // Skip to: 40669
+/* 29441 */ MCD_OPC_CheckField, 21, 1, 0, 214, 43, // Skip to: 40669
+/* 29447 */ MCD_OPC_CheckField, 10, 1, 0, 208, 43, // Skip to: 40669
+/* 29453 */ MCD_OPC_Decode, 217, 4, 196, 1, // Opcode: FMLSv2i64_indexed
+/* 29458 */ MCD_OPC_FilterValue, 9, 199, 43, // Skip to: 40669
+/* 29462 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29465 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 29490
+/* 29469 */ MCD_OPC_CheckPredicate, 0, 188, 43, // Skip to: 40669
+/* 29473 */ MCD_OPC_CheckField, 21, 1, 0, 182, 43, // Skip to: 40669
+/* 29479 */ MCD_OPC_CheckField, 10, 1, 0, 176, 43, // Skip to: 40669
+/* 29485 */ MCD_OPC_Decode, 252, 4, 197, 1, // Opcode: FMULv2i64_indexed
+/* 29490 */ MCD_OPC_FilterValue, 3, 167, 43, // Skip to: 40669
+/* 29494 */ MCD_OPC_CheckPredicate, 0, 163, 43, // Skip to: 40669
+/* 29498 */ MCD_OPC_CheckField, 21, 1, 0, 157, 43, // Skip to: 40669
+/* 29504 */ MCD_OPC_CheckField, 10, 1, 0, 151, 43, // Skip to: 40669
+/* 29510 */ MCD_OPC_Decode, 244, 4, 197, 1, // Opcode: FMULXv2i64_indexed
+/* 29515 */ MCD_OPC_FilterValue, 4, 191, 1, // Skip to: 29966
+/* 29519 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 29522 */ MCD_OPC_FilterValue, 0, 19, 0, // Skip to: 29545
+/* 29526 */ MCD_OPC_ExtractField, 31, 1, // Inst{31} ...
+/* 29529 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 29537
+/* 29533 */ MCD_OPC_Decode, 79, 198, 1, // Opcode: ADR
+/* 29537 */ MCD_OPC_FilterValue, 1, 120, 43, // Skip to: 40669
+/* 29541 */ MCD_OPC_Decode, 80, 198, 1, // Opcode: ADRP
+/* 29545 */ MCD_OPC_FilterValue, 1, 71, 0, // Skip to: 29620
+/* 29549 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29552 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 29560
+/* 29556 */ MCD_OPC_Decode, 60, 199, 1, // Opcode: ADDWri
+/* 29560 */ MCD_OPC_FilterValue, 1, 4, 0, // Skip to: 29568
+/* 29564 */ MCD_OPC_Decode, 46, 199, 1, // Opcode: ADDSWri
+/* 29568 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 29577
+/* 29572 */ MCD_OPC_Decode, 164, 15, 199, 1, // Opcode: SUBWri
+/* 29577 */ MCD_OPC_FilterValue, 3, 5, 0, // Skip to: 29586
+/* 29581 */ MCD_OPC_Decode, 155, 15, 199, 1, // Opcode: SUBSWri
+/* 29586 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 29594
+/* 29590 */ MCD_OPC_Decode, 64, 199, 1, // Opcode: ADDXri
+/* 29594 */ MCD_OPC_FilterValue, 5, 4, 0, // Skip to: 29602
+/* 29598 */ MCD_OPC_Decode, 50, 199, 1, // Opcode: ADDSXri
+/* 29602 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 29611
+/* 29606 */ MCD_OPC_Decode, 168, 15, 199, 1, // Opcode: SUBXri
+/* 29611 */ MCD_OPC_FilterValue, 7, 46, 43, // Skip to: 40669
+/* 29615 */ MCD_OPC_Decode, 159, 15, 199, 1, // Opcode: SUBSXri
+/* 29620 */ MCD_OPC_FilterValue, 2, 197, 0, // Skip to: 29821
+/* 29624 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29627 */ MCD_OPC_FilterValue, 0, 26, 0, // Skip to: 29657
+/* 29631 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
+/* 29634 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 29648
+/* 29638 */ MCD_OPC_CheckField, 22, 1, 0, 17, 43, // Skip to: 40669
+/* 29644 */ MCD_OPC_Decode, 91, 200, 1, // Opcode: ANDWri
+/* 29648 */ MCD_OPC_FilterValue, 1, 9, 43, // Skip to: 40669
+/* 29652 */ MCD_OPC_Decode, 212, 8, 201, 1, // Opcode: MOVNWi
+/* 29657 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 29672
+/* 29661 */ MCD_OPC_CheckField, 22, 2, 0, 250, 42, // Skip to: 40669
+/* 29667 */ MCD_OPC_Decode, 133, 9, 200, 1, // Opcode: ORRWri
+/* 29672 */ MCD_OPC_FilterValue, 2, 27, 0, // Skip to: 29703
+/* 29676 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
+/* 29679 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 29694
+/* 29683 */ MCD_OPC_CheckField, 22, 1, 0, 228, 42, // Skip to: 40669
+/* 29689 */ MCD_OPC_Decode, 164, 2, 200, 1, // Opcode: EORWri
+/* 29694 */ MCD_OPC_FilterValue, 1, 219, 42, // Skip to: 40669
+/* 29698 */ MCD_OPC_Decode, 214, 8, 201, 1, // Opcode: MOVZWi
+/* 29703 */ MCD_OPC_FilterValue, 3, 26, 0, // Skip to: 29733
+/* 29707 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
+/* 29710 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 29724
+/* 29714 */ MCD_OPC_CheckField, 22, 1, 0, 197, 42, // Skip to: 40669
+/* 29720 */ MCD_OPC_Decode, 85, 200, 1, // Opcode: ANDSWri
+/* 29724 */ MCD_OPC_FilterValue, 1, 189, 42, // Skip to: 40669
+/* 29728 */ MCD_OPC_Decode, 210, 8, 201, 1, // Opcode: MOVKWi
+/* 29733 */ MCD_OPC_FilterValue, 4, 20, 0, // Skip to: 29757
+/* 29737 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
+/* 29740 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 29748
+/* 29744 */ MCD_OPC_Decode, 94, 200, 1, // Opcode: ANDXri
+/* 29748 */ MCD_OPC_FilterValue, 1, 165, 42, // Skip to: 40669
+/* 29752 */ MCD_OPC_Decode, 213, 8, 201, 1, // Opcode: MOVNXi
+/* 29757 */ MCD_OPC_FilterValue, 5, 11, 0, // Skip to: 29772
+/* 29761 */ MCD_OPC_CheckField, 23, 1, 0, 150, 42, // Skip to: 40669
+/* 29767 */ MCD_OPC_Decode, 136, 9, 200, 1, // Opcode: ORRXri
+/* 29772 */ MCD_OPC_FilterValue, 6, 21, 0, // Skip to: 29797
+/* 29776 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
+/* 29779 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 29788
+/* 29783 */ MCD_OPC_Decode, 167, 2, 200, 1, // Opcode: EORXri
+/* 29788 */ MCD_OPC_FilterValue, 1, 125, 42, // Skip to: 40669
+/* 29792 */ MCD_OPC_Decode, 215, 8, 201, 1, // Opcode: MOVZXi
+/* 29797 */ MCD_OPC_FilterValue, 7, 116, 42, // Skip to: 40669
+/* 29801 */ MCD_OPC_ExtractField, 23, 1, // Inst{23} ...
+/* 29804 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 29812
+/* 29808 */ MCD_OPC_Decode, 88, 200, 1, // Opcode: ANDSXri
+/* 29812 */ MCD_OPC_FilterValue, 1, 101, 42, // Skip to: 40669
+/* 29816 */ MCD_OPC_Decode, 211, 8, 201, 1, // Opcode: MOVKXi
+/* 29821 */ MCD_OPC_FilterValue, 3, 92, 42, // Skip to: 40669
+/* 29825 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29828 */ MCD_OPC_FilterValue, 0, 33, 0, // Skip to: 29865
+/* 29832 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 29835 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 29850
+/* 29839 */ MCD_OPC_CheckField, 15, 1, 0, 72, 42, // Skip to: 40669
+/* 29845 */ MCD_OPC_Decode, 128, 10, 202, 1, // Opcode: SBFMWri
+/* 29850 */ MCD_OPC_FilterValue, 4, 63, 42, // Skip to: 40669
+/* 29854 */ MCD_OPC_CheckField, 15, 1, 0, 57, 42, // Skip to: 40669
+/* 29860 */ MCD_OPC_Decode, 173, 2, 203, 1, // Opcode: EXTRWrri
+/* 29865 */ MCD_OPC_FilterValue, 1, 16, 0, // Skip to: 29885
+/* 29869 */ MCD_OPC_CheckField, 21, 3, 0, 42, 42, // Skip to: 40669
+/* 29875 */ MCD_OPC_CheckField, 15, 1, 0, 36, 42, // Skip to: 40669
+/* 29881 */ MCD_OPC_Decode, 102, 204, 1, // Opcode: BFMWri
+/* 29885 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 29906
+/* 29889 */ MCD_OPC_CheckField, 21, 3, 0, 22, 42, // Skip to: 40669
+/* 29895 */ MCD_OPC_CheckField, 15, 1, 0, 16, 42, // Skip to: 40669
+/* 29901 */ MCD_OPC_Decode, 158, 16, 202, 1, // Opcode: UBFMWri
+/* 29906 */ MCD_OPC_FilterValue, 4, 27, 0, // Skip to: 29937
+/* 29910 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 29913 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 29922
+/* 29917 */ MCD_OPC_Decode, 129, 10, 205, 1, // Opcode: SBFMXri
+/* 29922 */ MCD_OPC_FilterValue, 3, 247, 41, // Skip to: 40669
+/* 29926 */ MCD_OPC_CheckField, 21, 1, 0, 241, 41, // Skip to: 40669
+/* 29932 */ MCD_OPC_Decode, 174, 2, 206, 1, // Opcode: EXTRXrri
+/* 29937 */ MCD_OPC_FilterValue, 5, 10, 0, // Skip to: 29951
+/* 29941 */ MCD_OPC_CheckField, 22, 2, 1, 226, 41, // Skip to: 40669
+/* 29947 */ MCD_OPC_Decode, 103, 207, 1, // Opcode: BFMXri
+/* 29951 */ MCD_OPC_FilterValue, 6, 218, 41, // Skip to: 40669
+/* 29955 */ MCD_OPC_CheckField, 22, 2, 1, 212, 41, // Skip to: 40669
+/* 29961 */ MCD_OPC_Decode, 159, 16, 205, 1, // Opcode: UBFMXri
+/* 29966 */ MCD_OPC_FilterValue, 5, 248, 1, // Skip to: 30474
+/* 29970 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 29973 */ MCD_OPC_FilterValue, 0, 4, 0, // Skip to: 29981
+/* 29977 */ MCD_OPC_Decode, 101, 208, 1, // Opcode: B
+/* 29981 */ MCD_OPC_FilterValue, 1, 39, 0, // Skip to: 30024
+/* 29985 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 29988 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 29997
+/* 29992 */ MCD_OPC_Decode, 131, 1, 209, 1, // Opcode: CBZW
+/* 29997 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 30006
+/* 30001 */ MCD_OPC_Decode, 129, 1, 209, 1, // Opcode: CBNZW
+/* 30006 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30015
+/* 30010 */ MCD_OPC_Decode, 213, 15, 210, 1, // Opcode: TBZW
+/* 30015 */ MCD_OPC_FilterValue, 3, 154, 41, // Skip to: 40669
+/* 30019 */ MCD_OPC_Decode, 203, 15, 210, 1, // Opcode: TBNZW
+/* 30024 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 30045
+/* 30028 */ MCD_OPC_CheckField, 24, 2, 0, 139, 41, // Skip to: 40669
+/* 30034 */ MCD_OPC_CheckField, 4, 1, 0, 133, 41, // Skip to: 40669
+/* 30040 */ MCD_OPC_Decode, 128, 1, 211, 1, // Opcode: Bcc
+/* 30045 */ MCD_OPC_FilterValue, 4, 4, 0, // Skip to: 30053
+/* 30049 */ MCD_OPC_Decode, 122, 208, 1, // Opcode: BL
+/* 30053 */ MCD_OPC_FilterValue, 5, 39, 0, // Skip to: 30096
+/* 30057 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 30060 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 30069
+/* 30064 */ MCD_OPC_Decode, 132, 1, 212, 1, // Opcode: CBZX
+/* 30069 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 30078
+/* 30073 */ MCD_OPC_Decode, 130, 1, 212, 1, // Opcode: CBNZX
+/* 30078 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30087
+/* 30082 */ MCD_OPC_Decode, 214, 15, 210, 1, // Opcode: TBZX
+/* 30087 */ MCD_OPC_FilterValue, 3, 82, 41, // Skip to: 40669
+/* 30091 */ MCD_OPC_Decode, 204, 15, 210, 1, // Opcode: TBNZX
+/* 30096 */ MCD_OPC_FilterValue, 6, 73, 41, // Skip to: 40669
+/* 30100 */ MCD_OPC_ExtractField, 21, 5, // Inst{25-21} ...
+/* 30103 */ MCD_OPC_FilterValue, 0, 30, 0, // Skip to: 30137
+/* 30107 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ...
+/* 30110 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 30119
+/* 30114 */ MCD_OPC_Decode, 192, 15, 213, 1, // Opcode: SVC
+/* 30119 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30128
+/* 30123 */ MCD_OPC_Decode, 207, 5, 213, 1, // Opcode: HVC
+/* 30128 */ MCD_OPC_FilterValue, 3, 41, 41, // Skip to: 40669
+/* 30132 */ MCD_OPC_Decode, 220, 10, 213, 1, // Opcode: SMC
+/* 30137 */ MCD_OPC_FilterValue, 1, 10, 0, // Skip to: 30151
+/* 30141 */ MCD_OPC_CheckField, 0, 5, 0, 26, 41, // Skip to: 40669
+/* 30147 */ MCD_OPC_Decode, 125, 213, 1, // Opcode: BRK
+/* 30151 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 30166
+/* 30155 */ MCD_OPC_CheckField, 0, 5, 0, 12, 41, // Skip to: 40669
+/* 30161 */ MCD_OPC_Decode, 206, 5, 213, 1, // Opcode: HLT
+/* 30166 */ MCD_OPC_FilterValue, 5, 30, 0, // Skip to: 30200
+/* 30170 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ...
+/* 30173 */ MCD_OPC_FilterValue, 1, 5, 0, // Skip to: 30182
+/* 30177 */ MCD_OPC_Decode, 140, 2, 213, 1, // Opcode: DCPS1
+/* 30182 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30191
+/* 30186 */ MCD_OPC_Decode, 141, 2, 213, 1, // Opcode: DCPS2
+/* 30191 */ MCD_OPC_FilterValue, 3, 234, 40, // Skip to: 40669
+/* 30195 */ MCD_OPC_Decode, 142, 2, 213, 1, // Opcode: DCPS3
+/* 30200 */ MCD_OPC_FilterValue, 8, 141, 0, // Skip to: 30345
+/* 30204 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 30207 */ MCD_OPC_FilterValue, 0, 125, 0, // Skip to: 30336
+/* 30211 */ MCD_OPC_ExtractField, 19, 1, // Inst{19} ...
+/* 30214 */ MCD_OPC_FilterValue, 0, 109, 0, // Skip to: 30327
+/* 30218 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 30221 */ MCD_OPC_FilterValue, 2, 17, 0, // Skip to: 30242
+/* 30225 */ MCD_OPC_CheckField, 16, 3, 3, 198, 40, // Skip to: 40669
+/* 30231 */ MCD_OPC_CheckField, 0, 5, 31, 192, 40, // Skip to: 40669
+/* 30237 */ MCD_OPC_Decode, 205, 5, 214, 1, // Opcode: HINT
+/* 30242 */ MCD_OPC_FilterValue, 3, 66, 0, // Skip to: 30312
+/* 30246 */ MCD_OPC_ExtractField, 0, 8, // Inst{7-0} ...
+/* 30249 */ MCD_OPC_FilterValue, 95, 11, 0, // Skip to: 30264
+/* 30253 */ MCD_OPC_CheckField, 16, 3, 3, 170, 40, // Skip to: 40669
+/* 30259 */ MCD_OPC_Decode, 141, 1, 215, 1, // Opcode: CLREX
+/* 30264 */ MCD_OPC_FilterValue, 159, 1, 11, 0, // Skip to: 30280
+/* 30269 */ MCD_OPC_CheckField, 16, 3, 3, 154, 40, // Skip to: 40669
+/* 30275 */ MCD_OPC_Decode, 145, 2, 215, 1, // Opcode: DSB
+/* 30280 */ MCD_OPC_FilterValue, 191, 1, 11, 0, // Skip to: 30296
+/* 30285 */ MCD_OPC_CheckField, 16, 3, 3, 138, 40, // Skip to: 40669
+/* 30291 */ MCD_OPC_Decode, 143, 2, 215, 1, // Opcode: DMB
+/* 30296 */ MCD_OPC_FilterValue, 223, 1, 128, 40, // Skip to: 40669
+/* 30301 */ MCD_OPC_CheckField, 16, 3, 3, 122, 40, // Skip to: 40669
+/* 30307 */ MCD_OPC_Decode, 216, 5, 215, 1, // Opcode: ISB
+/* 30312 */ MCD_OPC_FilterValue, 4, 113, 40, // Skip to: 40669
+/* 30316 */ MCD_OPC_CheckField, 0, 5, 31, 107, 40, // Skip to: 40669
+/* 30322 */ MCD_OPC_Decode, 226, 8, 216, 1, // Opcode: MSRpstate
+/* 30327 */ MCD_OPC_FilterValue, 1, 98, 40, // Skip to: 40669
+/* 30331 */ MCD_OPC_Decode, 194, 15, 217, 1, // Opcode: SYSxt
+/* 30336 */ MCD_OPC_FilterValue, 1, 89, 40, // Skip to: 40669
+/* 30340 */ MCD_OPC_Decode, 225, 8, 218, 1, // Opcode: MSR
+/* 30345 */ MCD_OPC_FilterValue, 9, 27, 0, // Skip to: 30376
+/* 30349 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 30352 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30367
+/* 30356 */ MCD_OPC_CheckField, 19, 1, 1, 67, 40, // Skip to: 40669
+/* 30362 */ MCD_OPC_Decode, 193, 15, 219, 1, // Opcode: SYSLxt
+/* 30367 */ MCD_OPC_FilterValue, 1, 58, 40, // Skip to: 40669
+/* 30371 */ MCD_OPC_Decode, 224, 8, 220, 1, // Opcode: MRS
+/* 30376 */ MCD_OPC_FilterValue, 16, 17, 0, // Skip to: 30397
+/* 30380 */ MCD_OPC_CheckField, 10, 11, 192, 15, 42, 40, // Skip to: 40669
+/* 30387 */ MCD_OPC_CheckField, 0, 5, 0, 36, 40, // Skip to: 40669
+/* 30393 */ MCD_OPC_Decode, 124, 221, 1, // Opcode: BR
+/* 30397 */ MCD_OPC_FilterValue, 17, 17, 0, // Skip to: 30418
+/* 30401 */ MCD_OPC_CheckField, 10, 11, 192, 15, 21, 40, // Skip to: 40669
+/* 30408 */ MCD_OPC_CheckField, 0, 5, 0, 15, 40, // Skip to: 40669
+/* 30414 */ MCD_OPC_Decode, 123, 221, 1, // Opcode: BLR
+/* 30418 */ MCD_OPC_FilterValue, 18, 18, 0, // Skip to: 30440
+/* 30422 */ MCD_OPC_CheckField, 10, 11, 192, 15, 0, 40, // Skip to: 40669
+/* 30429 */ MCD_OPC_CheckField, 0, 5, 0, 250, 39, // Skip to: 40669
+/* 30435 */ MCD_OPC_Decode, 166, 9, 221, 1, // Opcode: RET
+/* 30440 */ MCD_OPC_FilterValue, 20, 13, 0, // Skip to: 30457
+/* 30444 */ MCD_OPC_CheckField, 0, 21, 224, 135, 124, 233, 39, // Skip to: 40669
+/* 30452 */ MCD_OPC_Decode, 172, 2, 222, 1, // Opcode: ERET
+/* 30457 */ MCD_OPC_FilterValue, 21, 224, 39, // Skip to: 40669
+/* 30461 */ MCD_OPC_CheckField, 0, 21, 224, 135, 124, 216, 39, // Skip to: 40669
+/* 30469 */ MCD_OPC_Decode, 144, 2, 222, 1, // Opcode: DRPS
+/* 30474 */ MCD_OPC_FilterValue, 6, 54, 10, // Skip to: 33092
+/* 30478 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 30481 */ MCD_OPC_FilterValue, 0, 41, 1, // Skip to: 30782
+/* 30485 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 30488 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 30497
+/* 30492 */ MCD_OPC_Decode, 132, 8, 209, 1, // Opcode: LDRWl
+/* 30497 */ MCD_OPC_FilterValue, 2, 244, 0, // Skip to: 30745
+/* 30501 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 30504 */ MCD_OPC_FilterValue, 0, 68, 0, // Skip to: 30576
+/* 30508 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 30511 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 30525
+/* 30515 */ MCD_OPC_CheckField, 12, 4, 0, 164, 39, // Skip to: 40669
+/* 30521 */ MCD_OPC_Decode, 30, 223, 1, // Opcode: ADCWr
+/* 30525 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 30534
+/* 30529 */ MCD_OPC_Decode, 132, 2, 224, 1, // Opcode: CSELWr
+/* 30534 */ MCD_OPC_FilterValue, 6, 147, 39, // Skip to: 40669
+/* 30538 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 30541 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30550
+/* 30545 */ MCD_OPC_Decode, 174, 8, 223, 1, // Opcode: LSLVWr
+/* 30550 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 30563
+/* 30554 */ MCD_OPC_CheckPredicate, 2, 127, 39, // Skip to: 40669
+/* 30558 */ MCD_OPC_Decode, 252, 1, 223, 1, // Opcode: CRC32Brr
+/* 30563 */ MCD_OPC_FilterValue, 5, 118, 39, // Skip to: 40669
+/* 30567 */ MCD_OPC_CheckPredicate, 2, 114, 39, // Skip to: 40669
+/* 30571 */ MCD_OPC_Decode, 253, 1, 223, 1, // Opcode: CRC32CBrr
+/* 30576 */ MCD_OPC_FilterValue, 1, 54, 0, // Skip to: 30634
+/* 30580 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 30583 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 30592
+/* 30587 */ MCD_OPC_Decode, 134, 2, 224, 1, // Opcode: CSINCWr
+/* 30592 */ MCD_OPC_FilterValue, 6, 89, 39, // Skip to: 40669
+/* 30596 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 30599 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30608
+/* 30603 */ MCD_OPC_Decode, 176, 8, 223, 1, // Opcode: LSRVWr
+/* 30608 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 30621
+/* 30612 */ MCD_OPC_CheckPredicate, 2, 69, 39, // Skip to: 40669
+/* 30616 */ MCD_OPC_Decode, 129, 2, 223, 1, // Opcode: CRC32Hrr
+/* 30621 */ MCD_OPC_FilterValue, 5, 60, 39, // Skip to: 40669
+/* 30625 */ MCD_OPC_CheckPredicate, 2, 56, 39, // Skip to: 40669
+/* 30629 */ MCD_OPC_Decode, 254, 1, 223, 1, // Opcode: CRC32CHrr
+/* 30634 */ MCD_OPC_FilterValue, 2, 70, 0, // Skip to: 30708
+/* 30638 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 30641 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30656
+/* 30645 */ MCD_OPC_CheckField, 21, 3, 6, 34, 39, // Skip to: 40669
+/* 30651 */ MCD_OPC_Decode, 178, 16, 223, 1, // Opcode: UDIVWr
+/* 30656 */ MCD_OPC_FilterValue, 2, 10, 0, // Skip to: 30670
+/* 30660 */ MCD_OPC_CheckField, 21, 3, 6, 19, 39, // Skip to: 40669
+/* 30666 */ MCD_OPC_Decode, 99, 223, 1, // Opcode: ASRVWr
+/* 30670 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 30689
+/* 30674 */ MCD_OPC_CheckPredicate, 2, 7, 39, // Skip to: 40669
+/* 30678 */ MCD_OPC_CheckField, 21, 3, 6, 1, 39, // Skip to: 40669
+/* 30684 */ MCD_OPC_Decode, 130, 2, 223, 1, // Opcode: CRC32Wrr
+/* 30689 */ MCD_OPC_FilterValue, 5, 248, 38, // Skip to: 40669
+/* 30693 */ MCD_OPC_CheckPredicate, 2, 244, 38, // Skip to: 40669
+/* 30697 */ MCD_OPC_CheckField, 21, 3, 6, 238, 38, // Skip to: 40669
+/* 30703 */ MCD_OPC_Decode, 255, 1, 223, 1, // Opcode: CRC32CWrr
+/* 30708 */ MCD_OPC_FilterValue, 3, 229, 38, // Skip to: 40669
+/* 30712 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 30715 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30730
+/* 30719 */ MCD_OPC_CheckField, 21, 3, 6, 216, 38, // Skip to: 40669
+/* 30725 */ MCD_OPC_Decode, 148, 10, 223, 1, // Opcode: SDIVWr
+/* 30730 */ MCD_OPC_FilterValue, 2, 207, 38, // Skip to: 40669
+/* 30734 */ MCD_OPC_CheckField, 21, 3, 6, 201, 38, // Skip to: 40669
+/* 30740 */ MCD_OPC_Decode, 185, 9, 223, 1, // Opcode: RORVWr
+/* 30745 */ MCD_OPC_FilterValue, 3, 192, 38, // Skip to: 40669
+/* 30749 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 30752 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30767
+/* 30756 */ MCD_OPC_CheckField, 21, 3, 0, 179, 38, // Skip to: 40669
+/* 30762 */ MCD_OPC_Decode, 178, 8, 225, 1, // Opcode: MADDWrrr
+/* 30767 */ MCD_OPC_FilterValue, 1, 170, 38, // Skip to: 40669
+/* 30771 */ MCD_OPC_CheckField, 21, 3, 0, 164, 38, // Skip to: 40669
+/* 30777 */ MCD_OPC_Decode, 227, 8, 225, 1, // Opcode: MSUBWrrr
+/* 30782 */ MCD_OPC_FilterValue, 1, 224, 1, // Skip to: 31266
+/* 30786 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
+/* 30789 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 30882
+/* 30793 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 30796 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30811
+/* 30800 */ MCD_OPC_CheckField, 21, 1, 0, 135, 38, // Skip to: 40669
+/* 30806 */ MCD_OPC_Decode, 134, 15, 226, 1, // Opcode: STURBBi
+/* 30811 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 30826
+/* 30815 */ MCD_OPC_CheckField, 21, 1, 0, 120, 38, // Skip to: 40669
+/* 30821 */ MCD_OPC_Decode, 213, 14, 226, 1, // Opcode: STRBBpost
+/* 30826 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 30867
+/* 30830 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 30833 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 30842
+/* 30837 */ MCD_OPC_Decode, 130, 15, 226, 1, // Opcode: STTRBi
+/* 30842 */ MCD_OPC_FilterValue, 1, 95, 38, // Skip to: 40669
+/* 30846 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 30849 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30858
+/* 30853 */ MCD_OPC_Decode, 215, 14, 227, 1, // Opcode: STRBBroW
+/* 30858 */ MCD_OPC_FilterValue, 3, 79, 38, // Skip to: 40669
+/* 30862 */ MCD_OPC_Decode, 216, 14, 228, 1, // Opcode: STRBBroX
+/* 30867 */ MCD_OPC_FilterValue, 3, 70, 38, // Skip to: 40669
+/* 30871 */ MCD_OPC_CheckField, 21, 1, 0, 64, 38, // Skip to: 40669
+/* 30877 */ MCD_OPC_Decode, 214, 14, 226, 1, // Opcode: STRBBpre
+/* 30882 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 30975
+/* 30886 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 30889 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30904
+/* 30893 */ MCD_OPC_CheckField, 21, 1, 0, 42, 38, // Skip to: 40669
+/* 30899 */ MCD_OPC_Decode, 153, 8, 226, 1, // Opcode: LDURBBi
+/* 30904 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 30919
+/* 30908 */ MCD_OPC_CheckField, 21, 1, 0, 27, 38, // Skip to: 40669
+/* 30914 */ MCD_OPC_Decode, 196, 7, 226, 1, // Opcode: LDRBBpost
+/* 30919 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 30960
+/* 30923 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 30926 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 30935
+/* 30930 */ MCD_OPC_Decode, 144, 8, 226, 1, // Opcode: LDTRBi
+/* 30935 */ MCD_OPC_FilterValue, 1, 2, 38, // Skip to: 40669
+/* 30939 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 30942 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 30951
+/* 30946 */ MCD_OPC_Decode, 198, 7, 227, 1, // Opcode: LDRBBroW
+/* 30951 */ MCD_OPC_FilterValue, 3, 242, 37, // Skip to: 40669
+/* 30955 */ MCD_OPC_Decode, 199, 7, 228, 1, // Opcode: LDRBBroX
+/* 30960 */ MCD_OPC_FilterValue, 3, 233, 37, // Skip to: 40669
+/* 30964 */ MCD_OPC_CheckField, 21, 1, 0, 227, 37, // Skip to: 40669
+/* 30970 */ MCD_OPC_Decode, 197, 7, 226, 1, // Opcode: LDRBBpre
+/* 30975 */ MCD_OPC_FilterValue, 2, 89, 0, // Skip to: 31068
+/* 30979 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 30982 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 30997
+/* 30986 */ MCD_OPC_CheckField, 21, 1, 0, 205, 37, // Skip to: 40669
+/* 30992 */ MCD_OPC_Decode, 160, 8, 226, 1, // Opcode: LDURSBXi
+/* 30997 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31012
+/* 31001 */ MCD_OPC_CheckField, 21, 1, 0, 190, 37, // Skip to: 40669
+/* 31007 */ MCD_OPC_Decode, 233, 7, 226, 1, // Opcode: LDRSBXpost
+/* 31012 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31053
+/* 31016 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 31019 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31028
+/* 31023 */ MCD_OPC_Decode, 147, 8, 226, 1, // Opcode: LDTRSBXi
+/* 31028 */ MCD_OPC_FilterValue, 1, 165, 37, // Skip to: 40669
+/* 31032 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 31035 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31044
+/* 31039 */ MCD_OPC_Decode, 235, 7, 229, 1, // Opcode: LDRSBXroW
+/* 31044 */ MCD_OPC_FilterValue, 3, 149, 37, // Skip to: 40669
+/* 31048 */ MCD_OPC_Decode, 236, 7, 230, 1, // Opcode: LDRSBXroX
+/* 31053 */ MCD_OPC_FilterValue, 3, 140, 37, // Skip to: 40669
+/* 31057 */ MCD_OPC_CheckField, 21, 1, 0, 134, 37, // Skip to: 40669
+/* 31063 */ MCD_OPC_Decode, 234, 7, 226, 1, // Opcode: LDRSBXpre
+/* 31068 */ MCD_OPC_FilterValue, 3, 89, 0, // Skip to: 31161
+/* 31072 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 31075 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31090
+/* 31079 */ MCD_OPC_CheckField, 21, 1, 0, 112, 37, // Skip to: 40669
+/* 31085 */ MCD_OPC_Decode, 159, 8, 226, 1, // Opcode: LDURSBWi
+/* 31090 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31105
+/* 31094 */ MCD_OPC_CheckField, 21, 1, 0, 97, 37, // Skip to: 40669
+/* 31100 */ MCD_OPC_Decode, 228, 7, 226, 1, // Opcode: LDRSBWpost
+/* 31105 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31146
+/* 31109 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 31112 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31121
+/* 31116 */ MCD_OPC_Decode, 146, 8, 226, 1, // Opcode: LDTRSBWi
+/* 31121 */ MCD_OPC_FilterValue, 1, 72, 37, // Skip to: 40669
+/* 31125 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 31128 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31137
+/* 31132 */ MCD_OPC_Decode, 230, 7, 227, 1, // Opcode: LDRSBWroW
+/* 31137 */ MCD_OPC_FilterValue, 3, 56, 37, // Skip to: 40669
+/* 31141 */ MCD_OPC_Decode, 231, 7, 228, 1, // Opcode: LDRSBWroX
+/* 31146 */ MCD_OPC_FilterValue, 3, 47, 37, // Skip to: 40669
+/* 31150 */ MCD_OPC_CheckField, 21, 1, 0, 41, 37, // Skip to: 40669
+/* 31156 */ MCD_OPC_Decode, 229, 7, 226, 1, // Opcode: LDRSBWpre
+/* 31161 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31170
+/* 31165 */ MCD_OPC_Decode, 217, 14, 231, 1, // Opcode: STRBBui
+/* 31170 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 31179
+/* 31174 */ MCD_OPC_Decode, 200, 7, 231, 1, // Opcode: LDRBBui
+/* 31179 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 31188
+/* 31183 */ MCD_OPC_Decode, 237, 7, 231, 1, // Opcode: LDRSBXui
+/* 31188 */ MCD_OPC_FilterValue, 7, 5, 0, // Skip to: 31197
+/* 31192 */ MCD_OPC_Decode, 232, 7, 231, 1, // Opcode: LDRSBWui
+/* 31197 */ MCD_OPC_FilterValue, 8, 16, 0, // Skip to: 31217
+/* 31201 */ MCD_OPC_CheckField, 21, 1, 0, 246, 36, // Skip to: 40669
+/* 31207 */ MCD_OPC_CheckField, 10, 6, 0, 240, 36, // Skip to: 40669
+/* 31213 */ MCD_OPC_Decode, 28, 223, 1, // Opcode: ADCSWr
+/* 31217 */ MCD_OPC_FilterValue, 9, 232, 36, // Skip to: 40669
+/* 31221 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 31224 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 31245
+/* 31228 */ MCD_OPC_CheckField, 21, 1, 0, 219, 36, // Skip to: 40669
+/* 31234 */ MCD_OPC_CheckField, 4, 1, 0, 213, 36, // Skip to: 40669
+/* 31240 */ MCD_OPC_Decode, 134, 1, 232, 1, // Opcode: CCMNWr
+/* 31245 */ MCD_OPC_FilterValue, 2, 204, 36, // Skip to: 40669
+/* 31249 */ MCD_OPC_CheckField, 21, 1, 0, 198, 36, // Skip to: 40669
+/* 31255 */ MCD_OPC_CheckField, 4, 1, 0, 192, 36, // Skip to: 40669
+/* 31261 */ MCD_OPC_Decode, 133, 1, 233, 1, // Opcode: CCMNWi
+/* 31266 */ MCD_OPC_FilterValue, 2, 132, 0, // Skip to: 31402
+/* 31270 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 31273 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31282
+/* 31277 */ MCD_OPC_Decode, 138, 8, 212, 1, // Opcode: LDRXl
+/* 31282 */ MCD_OPC_FilterValue, 2, 167, 36, // Skip to: 40669
+/* 31286 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 31289 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 31345
+/* 31293 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 31296 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31311
+/* 31300 */ MCD_OPC_CheckField, 12, 4, 0, 147, 36, // Skip to: 40669
+/* 31306 */ MCD_OPC_Decode, 254, 9, 223, 1, // Opcode: SBCWr
+/* 31311 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31320
+/* 31315 */ MCD_OPC_Decode, 136, 2, 224, 1, // Opcode: CSINVWr
+/* 31320 */ MCD_OPC_FilterValue, 6, 129, 36, // Skip to: 40669
+/* 31324 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ...
+/* 31327 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31336
+/* 31331 */ MCD_OPC_Decode, 162, 9, 234, 1, // Opcode: RBITWr
+/* 31336 */ MCD_OPC_FilterValue, 1, 113, 36, // Skip to: 40669
+/* 31340 */ MCD_OPC_Decode, 150, 1, 234, 1, // Opcode: CLZWr
+/* 31345 */ MCD_OPC_FilterValue, 1, 37, 0, // Skip to: 31386
+/* 31349 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 31352 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31361
+/* 31356 */ MCD_OPC_Decode, 138, 2, 224, 1, // Opcode: CSNEGWr
+/* 31361 */ MCD_OPC_FilterValue, 6, 88, 36, // Skip to: 40669
+/* 31365 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ...
+/* 31368 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31377
+/* 31372 */ MCD_OPC_Decode, 168, 9, 234, 1, // Opcode: REV16Wr
+/* 31377 */ MCD_OPC_FilterValue, 1, 72, 36, // Skip to: 40669
+/* 31381 */ MCD_OPC_Decode, 142, 1, 234, 1, // Opcode: CLSWr
+/* 31386 */ MCD_OPC_FilterValue, 2, 63, 36, // Skip to: 40669
+/* 31390 */ MCD_OPC_CheckField, 12, 12, 128, 24, 56, 36, // Skip to: 40669
+/* 31397 */ MCD_OPC_Decode, 183, 9, 234, 1, // Opcode: REVWr
+/* 31402 */ MCD_OPC_FilterValue, 3, 225, 1, // Skip to: 31887
+/* 31406 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
+/* 31409 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 31502
+/* 31413 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 31416 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31431
+/* 31420 */ MCD_OPC_CheckField, 21, 1, 0, 27, 36, // Skip to: 40669
+/* 31426 */ MCD_OPC_Decode, 137, 15, 226, 1, // Opcode: STURHHi
+/* 31431 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31446
+/* 31435 */ MCD_OPC_CheckField, 21, 1, 0, 12, 36, // Skip to: 40669
+/* 31441 */ MCD_OPC_Decode, 228, 14, 226, 1, // Opcode: STRHHpost
+/* 31446 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31487
+/* 31450 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 31453 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31462
+/* 31457 */ MCD_OPC_Decode, 131, 15, 226, 1, // Opcode: STTRHi
+/* 31462 */ MCD_OPC_FilterValue, 1, 243, 35, // Skip to: 40669
+/* 31466 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 31469 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31478
+/* 31473 */ MCD_OPC_Decode, 230, 14, 227, 1, // Opcode: STRHHroW
+/* 31478 */ MCD_OPC_FilterValue, 3, 227, 35, // Skip to: 40669
+/* 31482 */ MCD_OPC_Decode, 231, 14, 228, 1, // Opcode: STRHHroX
+/* 31487 */ MCD_OPC_FilterValue, 3, 218, 35, // Skip to: 40669
+/* 31491 */ MCD_OPC_CheckField, 21, 1, 0, 212, 35, // Skip to: 40669
+/* 31497 */ MCD_OPC_Decode, 229, 14, 226, 1, // Opcode: STRHHpre
+/* 31502 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 31595
+/* 31506 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 31509 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31524
+/* 31513 */ MCD_OPC_CheckField, 21, 1, 0, 190, 35, // Skip to: 40669
+/* 31519 */ MCD_OPC_Decode, 156, 8, 226, 1, // Opcode: LDURHHi
+/* 31524 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31539
+/* 31528 */ MCD_OPC_CheckField, 21, 1, 0, 175, 35, // Skip to: 40669
+/* 31534 */ MCD_OPC_Decode, 212, 7, 226, 1, // Opcode: LDRHHpost
+/* 31539 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31580
+/* 31543 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 31546 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31555
+/* 31550 */ MCD_OPC_Decode, 145, 8, 226, 1, // Opcode: LDTRHi
+/* 31555 */ MCD_OPC_FilterValue, 1, 150, 35, // Skip to: 40669
+/* 31559 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 31562 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31571
+/* 31566 */ MCD_OPC_Decode, 214, 7, 227, 1, // Opcode: LDRHHroW
+/* 31571 */ MCD_OPC_FilterValue, 3, 134, 35, // Skip to: 40669
+/* 31575 */ MCD_OPC_Decode, 215, 7, 228, 1, // Opcode: LDRHHroX
+/* 31580 */ MCD_OPC_FilterValue, 3, 125, 35, // Skip to: 40669
+/* 31584 */ MCD_OPC_CheckField, 21, 1, 0, 119, 35, // Skip to: 40669
+/* 31590 */ MCD_OPC_Decode, 213, 7, 226, 1, // Opcode: LDRHHpre
+/* 31595 */ MCD_OPC_FilterValue, 2, 89, 0, // Skip to: 31688
+/* 31599 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 31602 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31617
+/* 31606 */ MCD_OPC_CheckField, 21, 1, 0, 97, 35, // Skip to: 40669
+/* 31612 */ MCD_OPC_Decode, 162, 8, 226, 1, // Opcode: LDURSHXi
+/* 31617 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31632
+/* 31621 */ MCD_OPC_CheckField, 21, 1, 0, 82, 35, // Skip to: 40669
+/* 31627 */ MCD_OPC_Decode, 243, 7, 226, 1, // Opcode: LDRSHXpost
+/* 31632 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31673
+/* 31636 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 31639 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31648
+/* 31643 */ MCD_OPC_Decode, 149, 8, 226, 1, // Opcode: LDTRSHXi
+/* 31648 */ MCD_OPC_FilterValue, 1, 57, 35, // Skip to: 40669
+/* 31652 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 31655 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31664
+/* 31659 */ MCD_OPC_Decode, 245, 7, 229, 1, // Opcode: LDRSHXroW
+/* 31664 */ MCD_OPC_FilterValue, 3, 41, 35, // Skip to: 40669
+/* 31668 */ MCD_OPC_Decode, 246, 7, 230, 1, // Opcode: LDRSHXroX
+/* 31673 */ MCD_OPC_FilterValue, 3, 32, 35, // Skip to: 40669
+/* 31677 */ MCD_OPC_CheckField, 21, 1, 0, 26, 35, // Skip to: 40669
+/* 31683 */ MCD_OPC_Decode, 244, 7, 226, 1, // Opcode: LDRSHXpre
+/* 31688 */ MCD_OPC_FilterValue, 3, 89, 0, // Skip to: 31781
+/* 31692 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 31695 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 31710
+/* 31699 */ MCD_OPC_CheckField, 21, 1, 0, 4, 35, // Skip to: 40669
+/* 31705 */ MCD_OPC_Decode, 161, 8, 226, 1, // Opcode: LDURSHWi
+/* 31710 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 31725
+/* 31714 */ MCD_OPC_CheckField, 21, 1, 0, 245, 34, // Skip to: 40669
+/* 31720 */ MCD_OPC_Decode, 238, 7, 226, 1, // Opcode: LDRSHWpost
+/* 31725 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 31766
+/* 31729 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 31732 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31741
+/* 31736 */ MCD_OPC_Decode, 148, 8, 226, 1, // Opcode: LDTRSHWi
+/* 31741 */ MCD_OPC_FilterValue, 1, 220, 34, // Skip to: 40669
+/* 31745 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 31748 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 31757
+/* 31752 */ MCD_OPC_Decode, 240, 7, 227, 1, // Opcode: LDRSHWroW
+/* 31757 */ MCD_OPC_FilterValue, 3, 204, 34, // Skip to: 40669
+/* 31761 */ MCD_OPC_Decode, 241, 7, 228, 1, // Opcode: LDRSHWroX
+/* 31766 */ MCD_OPC_FilterValue, 3, 195, 34, // Skip to: 40669
+/* 31770 */ MCD_OPC_CheckField, 21, 1, 0, 189, 34, // Skip to: 40669
+/* 31776 */ MCD_OPC_Decode, 239, 7, 226, 1, // Opcode: LDRSHWpre
+/* 31781 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31790
+/* 31785 */ MCD_OPC_Decode, 232, 14, 231, 1, // Opcode: STRHHui
+/* 31790 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 31799
+/* 31794 */ MCD_OPC_Decode, 216, 7, 231, 1, // Opcode: LDRHHui
+/* 31799 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 31808
+/* 31803 */ MCD_OPC_Decode, 247, 7, 231, 1, // Opcode: LDRSHXui
+/* 31808 */ MCD_OPC_FilterValue, 7, 5, 0, // Skip to: 31817
+/* 31812 */ MCD_OPC_Decode, 242, 7, 231, 1, // Opcode: LDRSHWui
+/* 31817 */ MCD_OPC_FilterValue, 8, 17, 0, // Skip to: 31838
+/* 31821 */ MCD_OPC_CheckField, 21, 1, 0, 138, 34, // Skip to: 40669
+/* 31827 */ MCD_OPC_CheckField, 10, 6, 0, 132, 34, // Skip to: 40669
+/* 31833 */ MCD_OPC_Decode, 252, 9, 223, 1, // Opcode: SBCSWr
+/* 31838 */ MCD_OPC_FilterValue, 9, 123, 34, // Skip to: 40669
+/* 31842 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 31845 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 31866
+/* 31849 */ MCD_OPC_CheckField, 21, 1, 0, 110, 34, // Skip to: 40669
+/* 31855 */ MCD_OPC_CheckField, 4, 1, 0, 104, 34, // Skip to: 40669
+/* 31861 */ MCD_OPC_Decode, 138, 1, 232, 1, // Opcode: CCMPWr
+/* 31866 */ MCD_OPC_FilterValue, 2, 95, 34, // Skip to: 40669
+/* 31870 */ MCD_OPC_CheckField, 21, 1, 0, 89, 34, // Skip to: 40669
+/* 31876 */ MCD_OPC_CheckField, 4, 1, 0, 83, 34, // Skip to: 40669
+/* 31882 */ MCD_OPC_Decode, 137, 1, 233, 1, // Opcode: CCMPWi
+/* 31887 */ MCD_OPC_FilterValue, 4, 62, 1, // Skip to: 32209
+/* 31891 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 31894 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 31903
+/* 31898 */ MCD_OPC_Decode, 248, 7, 212, 1, // Opcode: LDRSWl
+/* 31903 */ MCD_OPC_FilterValue, 2, 190, 0, // Skip to: 32097
+/* 31907 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 31910 */ MCD_OPC_FilterValue, 0, 41, 0, // Skip to: 31955
+/* 31914 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 31917 */ MCD_OPC_FilterValue, 0, 10, 0, // Skip to: 31931
+/* 31921 */ MCD_OPC_CheckField, 12, 4, 0, 38, 34, // Skip to: 40669
+/* 31927 */ MCD_OPC_Decode, 31, 235, 1, // Opcode: ADCXr
+/* 31931 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31940
+/* 31935 */ MCD_OPC_Decode, 133, 2, 236, 1, // Opcode: CSELXr
+/* 31940 */ MCD_OPC_FilterValue, 6, 21, 34, // Skip to: 40669
+/* 31944 */ MCD_OPC_CheckField, 12, 4, 2, 15, 34, // Skip to: 40669
+/* 31950 */ MCD_OPC_Decode, 175, 8, 235, 1, // Opcode: LSLVXr
+/* 31955 */ MCD_OPC_FilterValue, 1, 27, 0, // Skip to: 31986
+/* 31959 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 31962 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 31971
+/* 31966 */ MCD_OPC_Decode, 135, 2, 236, 1, // Opcode: CSINCXr
+/* 31971 */ MCD_OPC_FilterValue, 6, 246, 33, // Skip to: 40669
+/* 31975 */ MCD_OPC_CheckField, 12, 4, 2, 240, 33, // Skip to: 40669
+/* 31981 */ MCD_OPC_Decode, 177, 8, 235, 1, // Opcode: LSRVXr
+/* 31986 */ MCD_OPC_FilterValue, 2, 32, 0, // Skip to: 32022
+/* 31990 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 31993 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32008
+/* 31997 */ MCD_OPC_CheckField, 21, 3, 6, 218, 33, // Skip to: 40669
+/* 32003 */ MCD_OPC_Decode, 179, 16, 235, 1, // Opcode: UDIVXr
+/* 32008 */ MCD_OPC_FilterValue, 2, 209, 33, // Skip to: 40669
+/* 32012 */ MCD_OPC_CheckField, 21, 3, 6, 203, 33, // Skip to: 40669
+/* 32018 */ MCD_OPC_Decode, 100, 235, 1, // Opcode: ASRVXr
+/* 32022 */ MCD_OPC_FilterValue, 3, 195, 33, // Skip to: 40669
+/* 32026 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 32029 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32044
+/* 32033 */ MCD_OPC_CheckField, 21, 3, 6, 182, 33, // Skip to: 40669
+/* 32039 */ MCD_OPC_Decode, 149, 10, 235, 1, // Opcode: SDIVXr
+/* 32044 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 32059
+/* 32048 */ MCD_OPC_CheckField, 21, 3, 6, 167, 33, // Skip to: 40669
+/* 32054 */ MCD_OPC_Decode, 186, 9, 235, 1, // Opcode: RORVXr
+/* 32059 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 32078
+/* 32063 */ MCD_OPC_CheckPredicate, 2, 154, 33, // Skip to: 40669
+/* 32067 */ MCD_OPC_CheckField, 21, 3, 6, 148, 33, // Skip to: 40669
+/* 32073 */ MCD_OPC_Decode, 131, 2, 237, 1, // Opcode: CRC32Xrr
+/* 32078 */ MCD_OPC_FilterValue, 5, 139, 33, // Skip to: 40669
+/* 32082 */ MCD_OPC_CheckPredicate, 2, 135, 33, // Skip to: 40669
+/* 32086 */ MCD_OPC_CheckField, 21, 3, 6, 129, 33, // Skip to: 40669
+/* 32092 */ MCD_OPC_Decode, 128, 2, 237, 1, // Opcode: CRC32CXrr
+/* 32097 */ MCD_OPC_FilterValue, 3, 120, 33, // Skip to: 40669
+/* 32101 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 32104 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 32129
+/* 32108 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 32111 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32120
+/* 32115 */ MCD_OPC_Decode, 179, 8, 238, 1, // Opcode: MADDXrrr
+/* 32120 */ MCD_OPC_FilterValue, 1, 97, 33, // Skip to: 40669
+/* 32124 */ MCD_OPC_Decode, 228, 8, 238, 1, // Opcode: MSUBXrrr
+/* 32129 */ MCD_OPC_FilterValue, 1, 21, 0, // Skip to: 32154
+/* 32133 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 32136 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32145
+/* 32140 */ MCD_OPC_Decode, 202, 10, 239, 1, // Opcode: SMADDLrrr
+/* 32145 */ MCD_OPC_FilterValue, 1, 72, 33, // Skip to: 40669
+/* 32149 */ MCD_OPC_Decode, 135, 11, 239, 1, // Opcode: SMSUBLrrr
+/* 32154 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 32169
+/* 32158 */ MCD_OPC_CheckField, 15, 1, 0, 57, 33, // Skip to: 40669
+/* 32164 */ MCD_OPC_Decode, 136, 11, 235, 1, // Opcode: SMULHrr
+/* 32169 */ MCD_OPC_FilterValue, 5, 21, 0, // Skip to: 32194
+/* 32173 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 32176 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32185
+/* 32180 */ MCD_OPC_Decode, 194, 16, 239, 1, // Opcode: UMADDLrrr
+/* 32185 */ MCD_OPC_FilterValue, 1, 32, 33, // Skip to: 40669
+/* 32189 */ MCD_OPC_Decode, 253, 16, 239, 1, // Opcode: UMSUBLrrr
+/* 32194 */ MCD_OPC_FilterValue, 6, 23, 33, // Skip to: 40669
+/* 32198 */ MCD_OPC_CheckField, 15, 1, 0, 17, 33, // Skip to: 40669
+/* 32204 */ MCD_OPC_Decode, 254, 16, 235, 1, // Opcode: UMULHrr
+/* 32209 */ MCD_OPC_FilterValue, 5, 122, 1, // Skip to: 32591
+/* 32213 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
+/* 32216 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 32309
+/* 32220 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 32223 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32238
+/* 32227 */ MCD_OPC_CheckField, 21, 1, 0, 244, 32, // Skip to: 40669
+/* 32233 */ MCD_OPC_Decode, 141, 15, 226, 1, // Opcode: STURWi
+/* 32238 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 32253
+/* 32242 */ MCD_OPC_CheckField, 21, 1, 0, 229, 32, // Skip to: 40669
+/* 32248 */ MCD_OPC_Decode, 248, 14, 226, 1, // Opcode: STRWpost
+/* 32253 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 32294
+/* 32257 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 32260 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32269
+/* 32264 */ MCD_OPC_Decode, 132, 15, 226, 1, // Opcode: STTRWi
+/* 32269 */ MCD_OPC_FilterValue, 1, 204, 32, // Skip to: 40669
+/* 32273 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 32276 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 32285
+/* 32280 */ MCD_OPC_Decode, 250, 14, 227, 1, // Opcode: STRWroW
+/* 32285 */ MCD_OPC_FilterValue, 3, 188, 32, // Skip to: 40669
+/* 32289 */ MCD_OPC_Decode, 251, 14, 228, 1, // Opcode: STRWroX
+/* 32294 */ MCD_OPC_FilterValue, 3, 179, 32, // Skip to: 40669
+/* 32298 */ MCD_OPC_CheckField, 21, 1, 0, 173, 32, // Skip to: 40669
+/* 32304 */ MCD_OPC_Decode, 249, 14, 226, 1, // Opcode: STRWpre
+/* 32309 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 32402
+/* 32313 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 32316 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32331
+/* 32320 */ MCD_OPC_CheckField, 21, 1, 0, 151, 32, // Skip to: 40669
+/* 32326 */ MCD_OPC_Decode, 165, 8, 226, 1, // Opcode: LDURWi
+/* 32331 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 32346
+/* 32335 */ MCD_OPC_CheckField, 21, 1, 0, 136, 32, // Skip to: 40669
+/* 32341 */ MCD_OPC_Decode, 133, 8, 226, 1, // Opcode: LDRWpost
+/* 32346 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 32387
+/* 32350 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 32353 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32362
+/* 32357 */ MCD_OPC_Decode, 151, 8, 226, 1, // Opcode: LDTRWi
+/* 32362 */ MCD_OPC_FilterValue, 1, 111, 32, // Skip to: 40669
+/* 32366 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 32369 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 32378
+/* 32373 */ MCD_OPC_Decode, 135, 8, 227, 1, // Opcode: LDRWroW
+/* 32378 */ MCD_OPC_FilterValue, 3, 95, 32, // Skip to: 40669
+/* 32382 */ MCD_OPC_Decode, 136, 8, 228, 1, // Opcode: LDRWroX
+/* 32387 */ MCD_OPC_FilterValue, 3, 86, 32, // Skip to: 40669
+/* 32391 */ MCD_OPC_CheckField, 21, 1, 0, 80, 32, // Skip to: 40669
+/* 32397 */ MCD_OPC_Decode, 134, 8, 226, 1, // Opcode: LDRWpre
+/* 32402 */ MCD_OPC_FilterValue, 2, 89, 0, // Skip to: 32495
+/* 32406 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 32409 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32424
+/* 32413 */ MCD_OPC_CheckField, 21, 1, 0, 58, 32, // Skip to: 40669
+/* 32419 */ MCD_OPC_Decode, 163, 8, 226, 1, // Opcode: LDURSWi
+/* 32424 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 32439
+/* 32428 */ MCD_OPC_CheckField, 21, 1, 0, 43, 32, // Skip to: 40669
+/* 32434 */ MCD_OPC_Decode, 249, 7, 226, 1, // Opcode: LDRSWpost
+/* 32439 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 32480
+/* 32443 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 32446 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32455
+/* 32450 */ MCD_OPC_Decode, 150, 8, 226, 1, // Opcode: LDTRSWi
+/* 32455 */ MCD_OPC_FilterValue, 1, 18, 32, // Skip to: 40669
+/* 32459 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 32462 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 32471
+/* 32466 */ MCD_OPC_Decode, 251, 7, 229, 1, // Opcode: LDRSWroW
+/* 32471 */ MCD_OPC_FilterValue, 3, 2, 32, // Skip to: 40669
+/* 32475 */ MCD_OPC_Decode, 252, 7, 230, 1, // Opcode: LDRSWroX
+/* 32480 */ MCD_OPC_FilterValue, 3, 249, 31, // Skip to: 40669
+/* 32484 */ MCD_OPC_CheckField, 21, 1, 0, 243, 31, // Skip to: 40669
+/* 32490 */ MCD_OPC_Decode, 250, 7, 226, 1, // Opcode: LDRSWpre
+/* 32495 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 32504
+/* 32499 */ MCD_OPC_Decode, 252, 14, 231, 1, // Opcode: STRWui
+/* 32504 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 32513
+/* 32508 */ MCD_OPC_Decode, 137, 8, 231, 1, // Opcode: LDRWui
+/* 32513 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 32522
+/* 32517 */ MCD_OPC_Decode, 253, 7, 231, 1, // Opcode: LDRSWui
+/* 32522 */ MCD_OPC_FilterValue, 8, 16, 0, // Skip to: 32542
+/* 32526 */ MCD_OPC_CheckField, 21, 1, 0, 201, 31, // Skip to: 40669
+/* 32532 */ MCD_OPC_CheckField, 10, 6, 0, 195, 31, // Skip to: 40669
+/* 32538 */ MCD_OPC_Decode, 29, 235, 1, // Opcode: ADCSXr
+/* 32542 */ MCD_OPC_FilterValue, 9, 187, 31, // Skip to: 40669
+/* 32546 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 32549 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 32570
+/* 32553 */ MCD_OPC_CheckField, 21, 1, 0, 174, 31, // Skip to: 40669
+/* 32559 */ MCD_OPC_CheckField, 4, 1, 0, 168, 31, // Skip to: 40669
+/* 32565 */ MCD_OPC_Decode, 136, 1, 240, 1, // Opcode: CCMNXr
+/* 32570 */ MCD_OPC_FilterValue, 2, 159, 31, // Skip to: 40669
+/* 32574 */ MCD_OPC_CheckField, 21, 1, 0, 153, 31, // Skip to: 40669
+/* 32580 */ MCD_OPC_CheckField, 4, 1, 0, 147, 31, // Skip to: 40669
+/* 32586 */ MCD_OPC_Decode, 135, 1, 241, 1, // Opcode: CCMNXi
+/* 32591 */ MCD_OPC_FilterValue, 6, 148, 0, // Skip to: 32743
+/* 32595 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 32598 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32607
+/* 32602 */ MCD_OPC_Decode, 151, 9, 242, 1, // Opcode: PRFMl
+/* 32607 */ MCD_OPC_FilterValue, 2, 122, 31, // Skip to: 40669
+/* 32611 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 32614 */ MCD_OPC_FilterValue, 0, 52, 0, // Skip to: 32670
+/* 32618 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 32621 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32636
+/* 32625 */ MCD_OPC_CheckField, 12, 4, 0, 102, 31, // Skip to: 40669
+/* 32631 */ MCD_OPC_Decode, 255, 9, 235, 1, // Opcode: SBCXr
+/* 32636 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 32645
+/* 32640 */ MCD_OPC_Decode, 137, 2, 236, 1, // Opcode: CSINVXr
+/* 32645 */ MCD_OPC_FilterValue, 6, 84, 31, // Skip to: 40669
+/* 32649 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ...
+/* 32652 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32661
+/* 32656 */ MCD_OPC_Decode, 163, 9, 243, 1, // Opcode: RBITXr
+/* 32661 */ MCD_OPC_FilterValue, 1, 68, 31, // Skip to: 40669
+/* 32665 */ MCD_OPC_Decode, 151, 1, 243, 1, // Opcode: CLZXr
+/* 32670 */ MCD_OPC_FilterValue, 1, 37, 0, // Skip to: 32711
+/* 32674 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 32677 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 32686
+/* 32681 */ MCD_OPC_Decode, 139, 2, 236, 1, // Opcode: CSNEGXr
+/* 32686 */ MCD_OPC_FilterValue, 6, 43, 31, // Skip to: 40669
+/* 32690 */ MCD_OPC_ExtractField, 12, 9, // Inst{20-12} ...
+/* 32693 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32702
+/* 32697 */ MCD_OPC_Decode, 169, 9, 243, 1, // Opcode: REV16Xr
+/* 32702 */ MCD_OPC_FilterValue, 1, 27, 31, // Skip to: 40669
+/* 32706 */ MCD_OPC_Decode, 143, 1, 243, 1, // Opcode: CLSXr
+/* 32711 */ MCD_OPC_FilterValue, 2, 12, 0, // Skip to: 32727
+/* 32715 */ MCD_OPC_CheckField, 12, 12, 128, 24, 11, 31, // Skip to: 40669
+/* 32722 */ MCD_OPC_Decode, 172, 9, 243, 1, // Opcode: REV32Xr
+/* 32727 */ MCD_OPC_FilterValue, 3, 2, 31, // Skip to: 40669
+/* 32731 */ MCD_OPC_CheckField, 12, 12, 128, 24, 251, 30, // Skip to: 40669
+/* 32738 */ MCD_OPC_Decode, 184, 9, 243, 1, // Opcode: REVXr
+/* 32743 */ MCD_OPC_FilterValue, 7, 242, 30, // Skip to: 40669
+/* 32747 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
+/* 32750 */ MCD_OPC_FilterValue, 0, 89, 0, // Skip to: 32843
+/* 32754 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 32757 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32772
+/* 32761 */ MCD_OPC_CheckField, 21, 1, 0, 222, 30, // Skip to: 40669
+/* 32767 */ MCD_OPC_Decode, 142, 15, 226, 1, // Opcode: STURXi
+/* 32772 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 32787
+/* 32776 */ MCD_OPC_CheckField, 21, 1, 0, 207, 30, // Skip to: 40669
+/* 32782 */ MCD_OPC_Decode, 253, 14, 226, 1, // Opcode: STRXpost
+/* 32787 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 32828
+/* 32791 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 32794 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32803
+/* 32798 */ MCD_OPC_Decode, 133, 15, 226, 1, // Opcode: STTRXi
+/* 32803 */ MCD_OPC_FilterValue, 1, 182, 30, // Skip to: 40669
+/* 32807 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 32810 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 32819
+/* 32814 */ MCD_OPC_Decode, 255, 14, 229, 1, // Opcode: STRXroW
+/* 32819 */ MCD_OPC_FilterValue, 3, 166, 30, // Skip to: 40669
+/* 32823 */ MCD_OPC_Decode, 128, 15, 230, 1, // Opcode: STRXroX
+/* 32828 */ MCD_OPC_FilterValue, 3, 157, 30, // Skip to: 40669
+/* 32832 */ MCD_OPC_CheckField, 21, 1, 0, 151, 30, // Skip to: 40669
+/* 32838 */ MCD_OPC_Decode, 254, 14, 226, 1, // Opcode: STRXpre
+/* 32843 */ MCD_OPC_FilterValue, 1, 89, 0, // Skip to: 32936
+/* 32847 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 32850 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32865
+/* 32854 */ MCD_OPC_CheckField, 21, 1, 0, 129, 30, // Skip to: 40669
+/* 32860 */ MCD_OPC_Decode, 166, 8, 226, 1, // Opcode: LDURXi
+/* 32865 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 32880
+/* 32869 */ MCD_OPC_CheckField, 21, 1, 0, 114, 30, // Skip to: 40669
+/* 32875 */ MCD_OPC_Decode, 139, 8, 226, 1, // Opcode: LDRXpost
+/* 32880 */ MCD_OPC_FilterValue, 2, 37, 0, // Skip to: 32921
+/* 32884 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 32887 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 32896
+/* 32891 */ MCD_OPC_Decode, 152, 8, 226, 1, // Opcode: LDTRXi
+/* 32896 */ MCD_OPC_FilterValue, 1, 89, 30, // Skip to: 40669
+/* 32900 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 32903 */ MCD_OPC_FilterValue, 2, 5, 0, // Skip to: 32912
+/* 32907 */ MCD_OPC_Decode, 141, 8, 229, 1, // Opcode: LDRXroW
+/* 32912 */ MCD_OPC_FilterValue, 3, 73, 30, // Skip to: 40669
+/* 32916 */ MCD_OPC_Decode, 142, 8, 230, 1, // Opcode: LDRXroX
+/* 32921 */ MCD_OPC_FilterValue, 3, 64, 30, // Skip to: 40669
+/* 32925 */ MCD_OPC_CheckField, 21, 1, 0, 58, 30, // Skip to: 40669
+/* 32931 */ MCD_OPC_Decode, 140, 8, 226, 1, // Opcode: LDRXpre
+/* 32936 */ MCD_OPC_FilterValue, 2, 55, 0, // Skip to: 32995
+/* 32940 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 32943 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 32958
+/* 32947 */ MCD_OPC_CheckField, 21, 1, 0, 36, 30, // Skip to: 40669
+/* 32953 */ MCD_OPC_Decode, 155, 9, 226, 1, // Opcode: PRFUMi
+/* 32958 */ MCD_OPC_FilterValue, 2, 27, 30, // Skip to: 40669
+/* 32962 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 32965 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 32980
+/* 32969 */ MCD_OPC_CheckField, 21, 1, 1, 14, 30, // Skip to: 40669
+/* 32975 */ MCD_OPC_Decode, 152, 9, 244, 1, // Opcode: PRFMroW
+/* 32980 */ MCD_OPC_FilterValue, 3, 5, 30, // Skip to: 40669
+/* 32984 */ MCD_OPC_CheckField, 21, 1, 1, 255, 29, // Skip to: 40669
+/* 32990 */ MCD_OPC_Decode, 153, 9, 245, 1, // Opcode: PRFMroX
+/* 32995 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 33004
+/* 32999 */ MCD_OPC_Decode, 129, 15, 231, 1, // Opcode: STRXui
+/* 33004 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 33013
+/* 33008 */ MCD_OPC_Decode, 143, 8, 231, 1, // Opcode: LDRXui
+/* 33013 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 33022
+/* 33017 */ MCD_OPC_Decode, 154, 9, 231, 1, // Opcode: PRFMui
+/* 33022 */ MCD_OPC_FilterValue, 8, 17, 0, // Skip to: 33043
+/* 33026 */ MCD_OPC_CheckField, 21, 1, 0, 213, 29, // Skip to: 40669
+/* 33032 */ MCD_OPC_CheckField, 10, 6, 0, 207, 29, // Skip to: 40669
+/* 33038 */ MCD_OPC_Decode, 253, 9, 235, 1, // Opcode: SBCSXr
+/* 33043 */ MCD_OPC_FilterValue, 9, 198, 29, // Skip to: 40669
+/* 33047 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 33050 */ MCD_OPC_FilterValue, 0, 17, 0, // Skip to: 33071
+/* 33054 */ MCD_OPC_CheckField, 21, 1, 0, 185, 29, // Skip to: 40669
+/* 33060 */ MCD_OPC_CheckField, 4, 1, 0, 179, 29, // Skip to: 40669
+/* 33066 */ MCD_OPC_Decode, 140, 1, 240, 1, // Opcode: CCMPXr
+/* 33071 */ MCD_OPC_FilterValue, 2, 170, 29, // Skip to: 40669
+/* 33075 */ MCD_OPC_CheckField, 21, 1, 0, 164, 29, // Skip to: 40669
+/* 33081 */ MCD_OPC_CheckField, 4, 1, 0, 158, 29, // Skip to: 40669
+/* 33087 */ MCD_OPC_Decode, 139, 1, 241, 1, // Opcode: CCMPXi
+/* 33092 */ MCD_OPC_FilterValue, 7, 149, 29, // Skip to: 40669
+/* 33096 */ MCD_OPC_ExtractField, 29, 3, // Inst{31-29} ...
+/* 33099 */ MCD_OPC_FilterValue, 0, 8, 6, // Skip to: 34647
+/* 33103 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 33106 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 33115
+/* 33110 */ MCD_OPC_Decode, 254, 7, 246, 1, // Opcode: LDRSl
+/* 33115 */ MCD_OPC_FilterValue, 2, 109, 5, // Skip to: 34508
+/* 33119 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 33122 */ MCD_OPC_FilterValue, 0, 55, 0, // Skip to: 33181
+/* 33126 */ MCD_OPC_ExtractField, 15, 6, // Inst{20-15} ...
+/* 33129 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33142
+/* 33133 */ MCD_OPC_CheckPredicate, 3, 108, 29, // Skip to: 40669
+/* 33137 */ MCD_OPC_Decode, 131, 10, 247, 1, // Opcode: SCVTFSWSri
+/* 33142 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 33155
+/* 33146 */ MCD_OPC_CheckPredicate, 3, 95, 29, // Skip to: 40669
+/* 33150 */ MCD_OPC_Decode, 161, 16, 247, 1, // Opcode: UCVTFSWSri
+/* 33155 */ MCD_OPC_FilterValue, 49, 9, 0, // Skip to: 33168
+/* 33159 */ MCD_OPC_CheckPredicate, 3, 82, 29, // Skip to: 40669
+/* 33163 */ MCD_OPC_Decode, 224, 3, 248, 1, // Opcode: FCVTZSSWSri
+/* 33168 */ MCD_OPC_FilterValue, 51, 73, 29, // Skip to: 40669
+/* 33172 */ MCD_OPC_CheckPredicate, 3, 69, 29, // Skip to: 40669
+/* 33176 */ MCD_OPC_Decode, 253, 3, 248, 1, // Opcode: FCVTZUSWSri
+/* 33181 */ MCD_OPC_FilterValue, 1, 125, 2, // Skip to: 33822
+/* 33185 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 33188 */ MCD_OPC_FilterValue, 0, 204, 1, // Skip to: 33652
+/* 33192 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 33195 */ MCD_OPC_FilterValue, 0, 178, 1, // Skip to: 33633
+/* 33199 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
+/* 33202 */ MCD_OPC_FilterValue, 0, 185, 0, // Skip to: 33391
+/* 33206 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 33209 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33222
+/* 33213 */ MCD_OPC_CheckPredicate, 3, 28, 29, // Skip to: 40669
+/* 33217 */ MCD_OPC_Decode, 179, 3, 249, 1, // Opcode: FCVTNSUWSr
+/* 33222 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 33235
+/* 33226 */ MCD_OPC_CheckPredicate, 3, 15, 29, // Skip to: 40669
+/* 33230 */ MCD_OPC_Decode, 188, 3, 249, 1, // Opcode: FCVTNUUWSr
+/* 33235 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 33248
+/* 33239 */ MCD_OPC_CheckPredicate, 3, 2, 29, // Skip to: 40669
+/* 33243 */ MCD_OPC_Decode, 135, 10, 250, 1, // Opcode: SCVTFUWSri
+/* 33248 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 33261
+/* 33252 */ MCD_OPC_CheckPredicate, 3, 245, 28, // Skip to: 40669
+/* 33256 */ MCD_OPC_Decode, 165, 16, 250, 1, // Opcode: UCVTFUWSri
+/* 33261 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 33274
+/* 33265 */ MCD_OPC_CheckPredicate, 3, 232, 28, // Skip to: 40669
+/* 33269 */ MCD_OPC_Decode, 135, 3, 249, 1, // Opcode: FCVTASUWSr
+/* 33274 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33287
+/* 33278 */ MCD_OPC_CheckPredicate, 3, 219, 28, // Skip to: 40669
+/* 33282 */ MCD_OPC_Decode, 144, 3, 249, 1, // Opcode: FCVTAUUWSr
+/* 33287 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 33300
+/* 33291 */ MCD_OPC_CheckPredicate, 3, 206, 28, // Skip to: 40669
+/* 33295 */ MCD_OPC_Decode, 224, 4, 249, 1, // Opcode: FMOVSWr
+/* 33300 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 33313
+/* 33304 */ MCD_OPC_CheckPredicate, 3, 193, 28, // Skip to: 40669
+/* 33308 */ MCD_OPC_Decode, 227, 4, 250, 1, // Opcode: FMOVWSr
+/* 33313 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 33326
+/* 33317 */ MCD_OPC_CheckPredicate, 3, 180, 28, // Skip to: 40669
+/* 33321 */ MCD_OPC_Decode, 201, 3, 249, 1, // Opcode: FCVTPSUWSr
+/* 33326 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 33339
+/* 33330 */ MCD_OPC_CheckPredicate, 3, 167, 28, // Skip to: 40669
+/* 33334 */ MCD_OPC_Decode, 210, 3, 249, 1, // Opcode: FCVTPUUWSr
+/* 33339 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 33352
+/* 33343 */ MCD_OPC_CheckPredicate, 3, 154, 28, // Skip to: 40669
+/* 33347 */ MCD_OPC_Decode, 161, 3, 249, 1, // Opcode: FCVTMSUWSr
+/* 33352 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 33365
+/* 33356 */ MCD_OPC_CheckPredicate, 3, 141, 28, // Skip to: 40669
+/* 33360 */ MCD_OPC_Decode, 170, 3, 249, 1, // Opcode: FCVTMUUWSr
+/* 33365 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 33378
+/* 33369 */ MCD_OPC_CheckPredicate, 3, 128, 28, // Skip to: 40669
+/* 33373 */ MCD_OPC_Decode, 228, 3, 249, 1, // Opcode: FCVTZSUWSr
+/* 33378 */ MCD_OPC_FilterValue, 25, 119, 28, // Skip to: 40669
+/* 33382 */ MCD_OPC_CheckPredicate, 3, 115, 28, // Skip to: 40669
+/* 33386 */ MCD_OPC_Decode, 129, 4, 249, 1, // Opcode: FCVTZUUWSr
+/* 33391 */ MCD_OPC_FilterValue, 1, 55, 0, // Skip to: 33450
+/* 33395 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ...
+/* 33398 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33411
+/* 33402 */ MCD_OPC_CheckPredicate, 3, 95, 28, // Skip to: 40669
+/* 33406 */ MCD_OPC_Decode, 131, 3, 251, 1, // Opcode: FCMPSrr
+/* 33411 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 33424
+/* 33415 */ MCD_OPC_CheckPredicate, 3, 82, 28, // Skip to: 40669
+/* 33419 */ MCD_OPC_Decode, 130, 3, 252, 1, // Opcode: FCMPSri
+/* 33424 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 33437
+/* 33428 */ MCD_OPC_CheckPredicate, 3, 69, 28, // Skip to: 40669
+/* 33432 */ MCD_OPC_Decode, 129, 3, 251, 1, // Opcode: FCMPESrr
+/* 33437 */ MCD_OPC_FilterValue, 24, 60, 28, // Skip to: 40669
+/* 33441 */ MCD_OPC_CheckPredicate, 3, 56, 28, // Skip to: 40669
+/* 33445 */ MCD_OPC_Decode, 128, 3, 252, 1, // Opcode: FCMPESri
+/* 33450 */ MCD_OPC_FilterValue, 2, 81, 0, // Skip to: 33535
+/* 33454 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 33457 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33470
+/* 33461 */ MCD_OPC_CheckPredicate, 3, 36, 28, // Skip to: 40669
+/* 33465 */ MCD_OPC_Decode, 226, 4, 253, 1, // Opcode: FMOVSr
+/* 33470 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 33483
+/* 33474 */ MCD_OPC_CheckPredicate, 3, 23, 28, // Skip to: 40669
+/* 33478 */ MCD_OPC_Decode, 128, 5, 253, 1, // Opcode: FNEGSr
+/* 33483 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 33496
+/* 33487 */ MCD_OPC_CheckPredicate, 3, 10, 28, // Skip to: 40669
+/* 33491 */ MCD_OPC_Decode, 166, 5, 253, 1, // Opcode: FRINTNSr
+/* 33496 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33509
+/* 33500 */ MCD_OPC_CheckPredicate, 3, 253, 27, // Skip to: 40669
+/* 33504 */ MCD_OPC_Decode, 161, 5, 253, 1, // Opcode: FRINTMSr
+/* 33509 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 33522
+/* 33513 */ MCD_OPC_CheckPredicate, 3, 240, 27, // Skip to: 40669
+/* 33517 */ MCD_OPC_Decode, 151, 5, 253, 1, // Opcode: FRINTASr
+/* 33522 */ MCD_OPC_FilterValue, 7, 231, 27, // Skip to: 40669
+/* 33526 */ MCD_OPC_CheckPredicate, 3, 227, 27, // Skip to: 40669
+/* 33530 */ MCD_OPC_Decode, 176, 5, 253, 1, // Opcode: FRINTXSr
+/* 33535 */ MCD_OPC_FilterValue, 6, 218, 27, // Skip to: 40669
+/* 33539 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 33542 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33555
+/* 33546 */ MCD_OPC_CheckPredicate, 3, 207, 27, // Skip to: 40669
+/* 33550 */ MCD_OPC_Decode, 184, 2, 253, 1, // Opcode: FABSSr
+/* 33555 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 33568
+/* 33559 */ MCD_OPC_CheckPredicate, 3, 194, 27, // Skip to: 40669
+/* 33563 */ MCD_OPC_Decode, 196, 5, 253, 1, // Opcode: FSQRTSr
+/* 33568 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 33581
+/* 33572 */ MCD_OPC_CheckPredicate, 3, 181, 27, // Skip to: 40669
+/* 33576 */ MCD_OPC_Decode, 153, 3, 254, 1, // Opcode: FCVTDSr
+/* 33581 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 33594
+/* 33585 */ MCD_OPC_CheckPredicate, 3, 168, 27, // Skip to: 40669
+/* 33589 */ MCD_OPC_Decode, 155, 3, 255, 1, // Opcode: FCVTHSr
+/* 33594 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 33607
+/* 33598 */ MCD_OPC_CheckPredicate, 3, 155, 27, // Skip to: 40669
+/* 33602 */ MCD_OPC_Decode, 171, 5, 253, 1, // Opcode: FRINTPSr
+/* 33607 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33620
+/* 33611 */ MCD_OPC_CheckPredicate, 3, 142, 27, // Skip to: 40669
+/* 33615 */ MCD_OPC_Decode, 181, 5, 253, 1, // Opcode: FRINTZSr
+/* 33620 */ MCD_OPC_FilterValue, 7, 133, 27, // Skip to: 40669
+/* 33624 */ MCD_OPC_CheckPredicate, 3, 129, 27, // Skip to: 40669
+/* 33628 */ MCD_OPC_Decode, 156, 5, 253, 1, // Opcode: FRINTISr
+/* 33633 */ MCD_OPC_FilterValue, 1, 120, 27, // Skip to: 40669
+/* 33637 */ MCD_OPC_CheckPredicate, 3, 116, 27, // Skip to: 40669
+/* 33641 */ MCD_OPC_CheckField, 5, 5, 0, 110, 27, // Skip to: 40669
+/* 33647 */ MCD_OPC_Decode, 225, 4, 128, 2, // Opcode: FMOVSi
+/* 33652 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 33685
+/* 33656 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
+/* 33659 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33672
+/* 33663 */ MCD_OPC_CheckPredicate, 3, 90, 27, // Skip to: 40669
+/* 33667 */ MCD_OPC_Decode, 211, 2, 129, 2, // Opcode: FCCMPSrr
+/* 33672 */ MCD_OPC_FilterValue, 1, 81, 27, // Skip to: 40669
+/* 33676 */ MCD_OPC_CheckPredicate, 3, 77, 27, // Skip to: 40669
+/* 33680 */ MCD_OPC_Decode, 210, 2, 129, 2, // Opcode: FCCMPESrr
+/* 33685 */ MCD_OPC_FilterValue, 2, 120, 0, // Skip to: 33809
+/* 33689 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 33692 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33705
+/* 33696 */ MCD_OPC_CheckPredicate, 3, 57, 27, // Skip to: 40669
+/* 33700 */ MCD_OPC_Decode, 236, 4, 130, 2, // Opcode: FMULSrr
+/* 33705 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 33718
+/* 33709 */ MCD_OPC_CheckPredicate, 3, 44, 27, // Skip to: 40669
+/* 33713 */ MCD_OPC_Decode, 154, 4, 130, 2, // Opcode: FDIVSrr
+/* 33718 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 33731
+/* 33722 */ MCD_OPC_CheckPredicate, 3, 31, 27, // Skip to: 40669
+/* 33726 */ MCD_OPC_Decode, 204, 2, 130, 2, // Opcode: FADDSrr
+/* 33731 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 33744
+/* 33735 */ MCD_OPC_CheckPredicate, 3, 18, 27, // Skip to: 40669
+/* 33739 */ MCD_OPC_Decode, 201, 5, 130, 2, // Opcode: FSUBSrr
+/* 33744 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 33757
+/* 33748 */ MCD_OPC_CheckPredicate, 3, 5, 27, // Skip to: 40669
+/* 33752 */ MCD_OPC_Decode, 177, 4, 130, 2, // Opcode: FMAXSrr
+/* 33757 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33770
+/* 33761 */ MCD_OPC_CheckPredicate, 3, 248, 26, // Skip to: 40669
+/* 33765 */ MCD_OPC_Decode, 199, 4, 130, 2, // Opcode: FMINSrr
+/* 33770 */ MCD_OPC_FilterValue, 6, 9, 0, // Skip to: 33783
+/* 33774 */ MCD_OPC_CheckPredicate, 3, 235, 26, // Skip to: 40669
+/* 33778 */ MCD_OPC_Decode, 167, 4, 130, 2, // Opcode: FMAXNMSrr
+/* 33783 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 33796
+/* 33787 */ MCD_OPC_CheckPredicate, 3, 222, 26, // Skip to: 40669
+/* 33791 */ MCD_OPC_Decode, 189, 4, 130, 2, // Opcode: FMINNMSrr
+/* 33796 */ MCD_OPC_FilterValue, 8, 213, 26, // Skip to: 40669
+/* 33800 */ MCD_OPC_CheckPredicate, 3, 209, 26, // Skip to: 40669
+/* 33804 */ MCD_OPC_Decode, 137, 5, 130, 2, // Opcode: FNMULSrr
+/* 33809 */ MCD_OPC_FilterValue, 3, 200, 26, // Skip to: 40669
+/* 33813 */ MCD_OPC_CheckPredicate, 3, 196, 26, // Skip to: 40669
+/* 33817 */ MCD_OPC_Decode, 133, 3, 131, 2, // Opcode: FCSELSrrr
+/* 33822 */ MCD_OPC_FilterValue, 2, 55, 0, // Skip to: 33881
+/* 33826 */ MCD_OPC_ExtractField, 15, 6, // Inst{20-15} ...
+/* 33829 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33842
+/* 33833 */ MCD_OPC_CheckPredicate, 3, 176, 26, // Skip to: 40669
+/* 33837 */ MCD_OPC_Decode, 130, 10, 132, 2, // Opcode: SCVTFSWDri
+/* 33842 */ MCD_OPC_FilterValue, 7, 9, 0, // Skip to: 33855
+/* 33846 */ MCD_OPC_CheckPredicate, 3, 163, 26, // Skip to: 40669
+/* 33850 */ MCD_OPC_Decode, 160, 16, 132, 2, // Opcode: UCVTFSWDri
+/* 33855 */ MCD_OPC_FilterValue, 49, 9, 0, // Skip to: 33868
+/* 33859 */ MCD_OPC_CheckPredicate, 3, 150, 26, // Skip to: 40669
+/* 33863 */ MCD_OPC_Decode, 223, 3, 133, 2, // Opcode: FCVTZSSWDri
+/* 33868 */ MCD_OPC_FilterValue, 51, 141, 26, // Skip to: 40669
+/* 33872 */ MCD_OPC_CheckPredicate, 3, 137, 26, // Skip to: 40669
+/* 33876 */ MCD_OPC_Decode, 252, 3, 133, 2, // Opcode: FCVTZUSWDri
+/* 33881 */ MCD_OPC_FilterValue, 3, 76, 2, // Skip to: 34473
+/* 33885 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 33888 */ MCD_OPC_FilterValue, 0, 164, 1, // Skip to: 34312
+/* 33892 */ MCD_OPC_ExtractField, 12, 1, // Inst{12} ...
+/* 33895 */ MCD_OPC_FilterValue, 0, 138, 1, // Skip to: 34293
+/* 33899 */ MCD_OPC_ExtractField, 13, 3, // Inst{15-13} ...
+/* 33902 */ MCD_OPC_FilterValue, 0, 157, 0, // Skip to: 34063
+/* 33906 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 33909 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 33922
+/* 33913 */ MCD_OPC_CheckPredicate, 3, 96, 26, // Skip to: 40669
+/* 33917 */ MCD_OPC_Decode, 178, 3, 134, 2, // Opcode: FCVTNSUWDr
+/* 33922 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 33935
+/* 33926 */ MCD_OPC_CheckPredicate, 3, 83, 26, // Skip to: 40669
+/* 33930 */ MCD_OPC_Decode, 187, 3, 134, 2, // Opcode: FCVTNUUWDr
+/* 33935 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 33947
+/* 33939 */ MCD_OPC_CheckPredicate, 3, 70, 26, // Skip to: 40669
+/* 33943 */ MCD_OPC_Decode, 134, 10, 91, // Opcode: SCVTFUWDri
+/* 33947 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 33959
+/* 33951 */ MCD_OPC_CheckPredicate, 3, 58, 26, // Skip to: 40669
+/* 33955 */ MCD_OPC_Decode, 164, 16, 91, // Opcode: UCVTFUWDri
+/* 33959 */ MCD_OPC_FilterValue, 4, 9, 0, // Skip to: 33972
+/* 33963 */ MCD_OPC_CheckPredicate, 3, 46, 26, // Skip to: 40669
+/* 33967 */ MCD_OPC_Decode, 134, 3, 134, 2, // Opcode: FCVTASUWDr
+/* 33972 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 33985
+/* 33976 */ MCD_OPC_CheckPredicate, 3, 33, 26, // Skip to: 40669
+/* 33980 */ MCD_OPC_Decode, 143, 3, 134, 2, // Opcode: FCVTAUUWDr
+/* 33985 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 33998
+/* 33989 */ MCD_OPC_CheckPredicate, 3, 20, 26, // Skip to: 40669
+/* 33993 */ MCD_OPC_Decode, 200, 3, 134, 2, // Opcode: FCVTPSUWDr
+/* 33998 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 34011
+/* 34002 */ MCD_OPC_CheckPredicate, 3, 7, 26, // Skip to: 40669
+/* 34006 */ MCD_OPC_Decode, 209, 3, 134, 2, // Opcode: FCVTPUUWDr
+/* 34011 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 34024
+/* 34015 */ MCD_OPC_CheckPredicate, 3, 250, 25, // Skip to: 40669
+/* 34019 */ MCD_OPC_Decode, 160, 3, 134, 2, // Opcode: FCVTMSUWDr
+/* 34024 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 34037
+/* 34028 */ MCD_OPC_CheckPredicate, 3, 237, 25, // Skip to: 40669
+/* 34032 */ MCD_OPC_Decode, 169, 3, 134, 2, // Opcode: FCVTMUUWDr
+/* 34037 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 34050
+/* 34041 */ MCD_OPC_CheckPredicate, 3, 224, 25, // Skip to: 40669
+/* 34045 */ MCD_OPC_Decode, 227, 3, 134, 2, // Opcode: FCVTZSUWDr
+/* 34050 */ MCD_OPC_FilterValue, 25, 215, 25, // Skip to: 40669
+/* 34054 */ MCD_OPC_CheckPredicate, 3, 211, 25, // Skip to: 40669
+/* 34058 */ MCD_OPC_Decode, 128, 4, 134, 2, // Opcode: FCVTZUUWDr
+/* 34063 */ MCD_OPC_FilterValue, 1, 55, 0, // Skip to: 34122
+/* 34067 */ MCD_OPC_ExtractField, 0, 5, // Inst{4-0} ...
+/* 34070 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34083
+/* 34074 */ MCD_OPC_CheckPredicate, 3, 191, 25, // Skip to: 40669
+/* 34078 */ MCD_OPC_Decode, 253, 2, 135, 2, // Opcode: FCMPDrr
+/* 34083 */ MCD_OPC_FilterValue, 8, 9, 0, // Skip to: 34096
+/* 34087 */ MCD_OPC_CheckPredicate, 3, 178, 25, // Skip to: 40669
+/* 34091 */ MCD_OPC_Decode, 252, 2, 136, 2, // Opcode: FCMPDri
+/* 34096 */ MCD_OPC_FilterValue, 16, 9, 0, // Skip to: 34109
+/* 34100 */ MCD_OPC_CheckPredicate, 3, 165, 25, // Skip to: 40669
+/* 34104 */ MCD_OPC_Decode, 255, 2, 135, 2, // Opcode: FCMPEDrr
+/* 34109 */ MCD_OPC_FilterValue, 24, 156, 25, // Skip to: 40669
+/* 34113 */ MCD_OPC_CheckPredicate, 3, 152, 25, // Skip to: 40669
+/* 34117 */ MCD_OPC_Decode, 254, 2, 136, 2, // Opcode: FCMPEDri
+/* 34122 */ MCD_OPC_FilterValue, 2, 88, 0, // Skip to: 34214
+/* 34126 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 34129 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 34141
+/* 34133 */ MCD_OPC_CheckPredicate, 3, 132, 25, // Skip to: 40669
+/* 34137 */ MCD_OPC_Decode, 223, 4, 90, // Opcode: FMOVDr
+/* 34141 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 34153
+/* 34145 */ MCD_OPC_CheckPredicate, 3, 120, 25, // Skip to: 40669
+/* 34149 */ MCD_OPC_Decode, 255, 4, 90, // Opcode: FNEGDr
+/* 34153 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 34166
+/* 34157 */ MCD_OPC_CheckPredicate, 3, 108, 25, // Skip to: 40669
+/* 34161 */ MCD_OPC_Decode, 218, 3, 144, 1, // Opcode: FCVTSDr
+/* 34166 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 34178
+/* 34170 */ MCD_OPC_CheckPredicate, 3, 95, 25, // Skip to: 40669
+/* 34174 */ MCD_OPC_Decode, 165, 5, 90, // Opcode: FRINTNDr
+/* 34178 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 34190
+/* 34182 */ MCD_OPC_CheckPredicate, 3, 83, 25, // Skip to: 40669
+/* 34186 */ MCD_OPC_Decode, 160, 5, 90, // Opcode: FRINTMDr
+/* 34190 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 34202
+/* 34194 */ MCD_OPC_CheckPredicate, 3, 71, 25, // Skip to: 40669
+/* 34198 */ MCD_OPC_Decode, 150, 5, 90, // Opcode: FRINTADr
+/* 34202 */ MCD_OPC_FilterValue, 7, 63, 25, // Skip to: 40669
+/* 34206 */ MCD_OPC_CheckPredicate, 3, 59, 25, // Skip to: 40669
+/* 34210 */ MCD_OPC_Decode, 175, 5, 90, // Opcode: FRINTXDr
+/* 34214 */ MCD_OPC_FilterValue, 6, 51, 25, // Skip to: 40669
+/* 34218 */ MCD_OPC_ExtractField, 16, 5, // Inst{20-16} ...
+/* 34221 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 34233
+/* 34225 */ MCD_OPC_CheckPredicate, 3, 40, 25, // Skip to: 40669
+/* 34229 */ MCD_OPC_Decode, 183, 2, 90, // Opcode: FABSDr
+/* 34233 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 34245
+/* 34237 */ MCD_OPC_CheckPredicate, 3, 28, 25, // Skip to: 40669
+/* 34241 */ MCD_OPC_Decode, 195, 5, 90, // Opcode: FSQRTDr
+/* 34245 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 34257
+/* 34249 */ MCD_OPC_CheckPredicate, 3, 16, 25, // Skip to: 40669
+/* 34253 */ MCD_OPC_Decode, 154, 3, 100, // Opcode: FCVTHDr
+/* 34257 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 34269
+/* 34261 */ MCD_OPC_CheckPredicate, 3, 4, 25, // Skip to: 40669
+/* 34265 */ MCD_OPC_Decode, 170, 5, 90, // Opcode: FRINTPDr
+/* 34269 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 34281
+/* 34273 */ MCD_OPC_CheckPredicate, 3, 248, 24, // Skip to: 40669
+/* 34277 */ MCD_OPC_Decode, 180, 5, 90, // Opcode: FRINTZDr
+/* 34281 */ MCD_OPC_FilterValue, 7, 240, 24, // Skip to: 40669
+/* 34285 */ MCD_OPC_CheckPredicate, 3, 236, 24, // Skip to: 40669
+/* 34289 */ MCD_OPC_Decode, 155, 5, 90, // Opcode: FRINTIDr
+/* 34293 */ MCD_OPC_FilterValue, 1, 228, 24, // Skip to: 40669
+/* 34297 */ MCD_OPC_CheckPredicate, 3, 224, 24, // Skip to: 40669
+/* 34301 */ MCD_OPC_CheckField, 5, 5, 0, 218, 24, // Skip to: 40669
+/* 34307 */ MCD_OPC_Decode, 222, 4, 137, 2, // Opcode: FMOVDi
+/* 34312 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 34345
+/* 34316 */ MCD_OPC_ExtractField, 4, 1, // Inst{4} ...
+/* 34319 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34332
+/* 34323 */ MCD_OPC_CheckPredicate, 3, 198, 24, // Skip to: 40669
+/* 34327 */ MCD_OPC_Decode, 208, 2, 138, 2, // Opcode: FCCMPDrr
+/* 34332 */ MCD_OPC_FilterValue, 1, 189, 24, // Skip to: 40669
+/* 34336 */ MCD_OPC_CheckPredicate, 3, 185, 24, // Skip to: 40669
+/* 34340 */ MCD_OPC_Decode, 209, 2, 138, 2, // Opcode: FCCMPEDrr
+/* 34345 */ MCD_OPC_FilterValue, 2, 111, 0, // Skip to: 34460
+/* 34349 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 34352 */ MCD_OPC_FilterValue, 0, 8, 0, // Skip to: 34364
+/* 34356 */ MCD_OPC_CheckPredicate, 3, 165, 24, // Skip to: 40669
+/* 34360 */ MCD_OPC_Decode, 235, 4, 89, // Opcode: FMULDrr
+/* 34364 */ MCD_OPC_FilterValue, 1, 8, 0, // Skip to: 34376
+/* 34368 */ MCD_OPC_CheckPredicate, 3, 153, 24, // Skip to: 40669
+/* 34372 */ MCD_OPC_Decode, 153, 4, 89, // Opcode: FDIVDrr
+/* 34376 */ MCD_OPC_FilterValue, 2, 8, 0, // Skip to: 34388
+/* 34380 */ MCD_OPC_CheckPredicate, 3, 141, 24, // Skip to: 40669
+/* 34384 */ MCD_OPC_Decode, 198, 2, 89, // Opcode: FADDDrr
+/* 34388 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 34400
+/* 34392 */ MCD_OPC_CheckPredicate, 3, 129, 24, // Skip to: 40669
+/* 34396 */ MCD_OPC_Decode, 200, 5, 89, // Opcode: FSUBDrr
+/* 34400 */ MCD_OPC_FilterValue, 4, 8, 0, // Skip to: 34412
+/* 34404 */ MCD_OPC_CheckPredicate, 3, 117, 24, // Skip to: 40669
+/* 34408 */ MCD_OPC_Decode, 160, 4, 89, // Opcode: FMAXDrr
+/* 34412 */ MCD_OPC_FilterValue, 5, 8, 0, // Skip to: 34424
+/* 34416 */ MCD_OPC_CheckPredicate, 3, 105, 24, // Skip to: 40669
+/* 34420 */ MCD_OPC_Decode, 182, 4, 89, // Opcode: FMINDrr
+/* 34424 */ MCD_OPC_FilterValue, 6, 8, 0, // Skip to: 34436
+/* 34428 */ MCD_OPC_CheckPredicate, 3, 93, 24, // Skip to: 40669
+/* 34432 */ MCD_OPC_Decode, 161, 4, 89, // Opcode: FMAXNMDrr
+/* 34436 */ MCD_OPC_FilterValue, 7, 8, 0, // Skip to: 34448
+/* 34440 */ MCD_OPC_CheckPredicate, 3, 81, 24, // Skip to: 40669
+/* 34444 */ MCD_OPC_Decode, 183, 4, 89, // Opcode: FMINNMDrr
+/* 34448 */ MCD_OPC_FilterValue, 8, 73, 24, // Skip to: 40669
+/* 34452 */ MCD_OPC_CheckPredicate, 3, 69, 24, // Skip to: 40669
+/* 34456 */ MCD_OPC_Decode, 136, 5, 89, // Opcode: FNMULDrr
+/* 34460 */ MCD_OPC_FilterValue, 3, 61, 24, // Skip to: 40669
+/* 34464 */ MCD_OPC_CheckPredicate, 3, 57, 24, // Skip to: 40669
+/* 34468 */ MCD_OPC_Decode, 132, 3, 139, 2, // Opcode: FCSELDrrr
+/* 34473 */ MCD_OPC_FilterValue, 7, 48, 24, // Skip to: 40669
+/* 34477 */ MCD_OPC_ExtractField, 10, 11, // Inst{20-10} ...
+/* 34480 */ MCD_OPC_FilterValue, 144, 1, 9, 0, // Skip to: 34494
+/* 34485 */ MCD_OPC_CheckPredicate, 3, 36, 24, // Skip to: 40669
+/* 34489 */ MCD_OPC_Decode, 219, 3, 140, 2, // Opcode: FCVTSHr
+/* 34494 */ MCD_OPC_FilterValue, 176, 1, 26, 24, // Skip to: 40669
+/* 34499 */ MCD_OPC_CheckPredicate, 3, 22, 24, // Skip to: 40669
+/* 34503 */ MCD_OPC_Decode, 152, 3, 141, 2, // Opcode: FCVTDHr
+/* 34508 */ MCD_OPC_FilterValue, 3, 13, 24, // Skip to: 40669
+/* 34512 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 34515 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 34548
+/* 34519 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 34522 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34535
+/* 34526 */ MCD_OPC_CheckPredicate, 3, 251, 23, // Skip to: 40669
+/* 34530 */ MCD_OPC_Decode, 159, 4, 142, 2, // Opcode: FMADDSrrr
+/* 34535 */ MCD_OPC_FilterValue, 1, 242, 23, // Skip to: 40669
+/* 34539 */ MCD_OPC_CheckPredicate, 3, 238, 23, // Skip to: 40669
+/* 34543 */ MCD_OPC_Decode, 234, 4, 142, 2, // Opcode: FMSUBSrrr
+/* 34548 */ MCD_OPC_FilterValue, 1, 29, 0, // Skip to: 34581
+/* 34552 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 34555 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34568
+/* 34559 */ MCD_OPC_CheckPredicate, 3, 218, 23, // Skip to: 40669
+/* 34563 */ MCD_OPC_Decode, 133, 5, 142, 2, // Opcode: FNMADDSrrr
+/* 34568 */ MCD_OPC_FilterValue, 1, 209, 23, // Skip to: 40669
+/* 34572 */ MCD_OPC_CheckPredicate, 3, 205, 23, // Skip to: 40669
+/* 34576 */ MCD_OPC_Decode, 135, 5, 142, 2, // Opcode: FNMSUBSrrr
+/* 34581 */ MCD_OPC_FilterValue, 2, 29, 0, // Skip to: 34614
+/* 34585 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 34588 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34601
+/* 34592 */ MCD_OPC_CheckPredicate, 3, 185, 23, // Skip to: 40669
+/* 34596 */ MCD_OPC_Decode, 158, 4, 143, 2, // Opcode: FMADDDrrr
+/* 34601 */ MCD_OPC_FilterValue, 1, 176, 23, // Skip to: 40669
+/* 34605 */ MCD_OPC_CheckPredicate, 3, 172, 23, // Skip to: 40669
+/* 34609 */ MCD_OPC_Decode, 233, 4, 143, 2, // Opcode: FMSUBDrrr
+/* 34614 */ MCD_OPC_FilterValue, 3, 163, 23, // Skip to: 40669
+/* 34618 */ MCD_OPC_ExtractField, 15, 1, // Inst{15} ...
+/* 34621 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 34634
+/* 34625 */ MCD_OPC_CheckPredicate, 3, 152, 23, // Skip to: 40669
+/* 34629 */ MCD_OPC_Decode, 132, 5, 143, 2, // Opcode: FNMADDDrrr
+/* 34634 */ MCD_OPC_FilterValue, 1, 143, 23, // Skip to: 40669
+/* 34638 */ MCD_OPC_CheckPredicate, 3, 139, 23, // Skip to: 40669
+/* 34642 */ MCD_OPC_Decode, 134, 5, 143, 2, // Opcode: FNMSUBDrrr
+/* 34647 */ MCD_OPC_FilterValue, 1, 139, 1, // Skip to: 35046
+/* 34651 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
+/* 34654 */ MCD_OPC_FilterValue, 0, 85, 0, // Skip to: 34743
+/* 34658 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 34661 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 34676
+/* 34665 */ MCD_OPC_CheckField, 21, 1, 0, 110, 23, // Skip to: 40669
+/* 34671 */ MCD_OPC_Decode, 135, 15, 226, 1, // Opcode: STURBi
+/* 34676 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 34691
+/* 34680 */ MCD_OPC_CheckField, 21, 1, 0, 95, 23, // Skip to: 40669
+/* 34686 */ MCD_OPC_Decode, 218, 14, 226, 1, // Opcode: STRBpost
+/* 34691 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 34728
+/* 34695 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 34698 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 34713
+/* 34702 */ MCD_OPC_CheckField, 21, 1, 1, 73, 23, // Skip to: 40669
+/* 34708 */ MCD_OPC_Decode, 220, 14, 144, 2, // Opcode: STRBroW
+/* 34713 */ MCD_OPC_FilterValue, 3, 64, 23, // Skip to: 40669
+/* 34717 */ MCD_OPC_CheckField, 21, 1, 1, 58, 23, // Skip to: 40669
+/* 34723 */ MCD_OPC_Decode, 221, 14, 145, 2, // Opcode: STRBroX
+/* 34728 */ MCD_OPC_FilterValue, 3, 49, 23, // Skip to: 40669
+/* 34732 */ MCD_OPC_CheckField, 21, 1, 0, 43, 23, // Skip to: 40669
+/* 34738 */ MCD_OPC_Decode, 219, 14, 226, 1, // Opcode: STRBpre
+/* 34743 */ MCD_OPC_FilterValue, 1, 85, 0, // Skip to: 34832
+/* 34747 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 34750 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 34765
+/* 34754 */ MCD_OPC_CheckField, 21, 1, 0, 21, 23, // Skip to: 40669
+/* 34760 */ MCD_OPC_Decode, 154, 8, 226, 1, // Opcode: LDURBi
+/* 34765 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 34780
+/* 34769 */ MCD_OPC_CheckField, 21, 1, 0, 6, 23, // Skip to: 40669
+/* 34775 */ MCD_OPC_Decode, 201, 7, 226, 1, // Opcode: LDRBpost
+/* 34780 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 34817
+/* 34784 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 34787 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 34802
+/* 34791 */ MCD_OPC_CheckField, 21, 1, 1, 240, 22, // Skip to: 40669
+/* 34797 */ MCD_OPC_Decode, 203, 7, 144, 2, // Opcode: LDRBroW
+/* 34802 */ MCD_OPC_FilterValue, 3, 231, 22, // Skip to: 40669
+/* 34806 */ MCD_OPC_CheckField, 21, 1, 1, 225, 22, // Skip to: 40669
+/* 34812 */ MCD_OPC_Decode, 204, 7, 145, 2, // Opcode: LDRBroX
+/* 34817 */ MCD_OPC_FilterValue, 3, 216, 22, // Skip to: 40669
+/* 34821 */ MCD_OPC_CheckField, 21, 1, 0, 210, 22, // Skip to: 40669
+/* 34827 */ MCD_OPC_Decode, 202, 7, 226, 1, // Opcode: LDRBpre
+/* 34832 */ MCD_OPC_FilterValue, 2, 85, 0, // Skip to: 34921
+/* 34836 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 34839 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 34854
+/* 34843 */ MCD_OPC_CheckField, 21, 1, 0, 188, 22, // Skip to: 40669
+/* 34849 */ MCD_OPC_Decode, 139, 15, 226, 1, // Opcode: STURQi
+/* 34854 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 34869
+/* 34858 */ MCD_OPC_CheckField, 21, 1, 0, 173, 22, // Skip to: 40669
+/* 34864 */ MCD_OPC_Decode, 238, 14, 226, 1, // Opcode: STRQpost
+/* 34869 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 34906
+/* 34873 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 34876 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 34891
+/* 34880 */ MCD_OPC_CheckField, 21, 1, 1, 151, 22, // Skip to: 40669
+/* 34886 */ MCD_OPC_Decode, 240, 14, 146, 2, // Opcode: STRQroW
+/* 34891 */ MCD_OPC_FilterValue, 3, 142, 22, // Skip to: 40669
+/* 34895 */ MCD_OPC_CheckField, 21, 1, 1, 136, 22, // Skip to: 40669
+/* 34901 */ MCD_OPC_Decode, 241, 14, 147, 2, // Opcode: STRQroX
+/* 34906 */ MCD_OPC_FilterValue, 3, 127, 22, // Skip to: 40669
+/* 34910 */ MCD_OPC_CheckField, 21, 1, 0, 121, 22, // Skip to: 40669
+/* 34916 */ MCD_OPC_Decode, 239, 14, 226, 1, // Opcode: STRQpre
+/* 34921 */ MCD_OPC_FilterValue, 3, 85, 0, // Skip to: 35010
+/* 34925 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 34928 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 34943
+/* 34932 */ MCD_OPC_CheckField, 21, 1, 0, 99, 22, // Skip to: 40669
+/* 34938 */ MCD_OPC_Decode, 158, 8, 226, 1, // Opcode: LDURQi
+/* 34943 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 34958
+/* 34947 */ MCD_OPC_CheckField, 21, 1, 0, 84, 22, // Skip to: 40669
+/* 34953 */ MCD_OPC_Decode, 223, 7, 226, 1, // Opcode: LDRQpost
+/* 34958 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 34995
+/* 34962 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 34965 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 34980
+/* 34969 */ MCD_OPC_CheckField, 21, 1, 1, 62, 22, // Skip to: 40669
+/* 34975 */ MCD_OPC_Decode, 225, 7, 146, 2, // Opcode: LDRQroW
+/* 34980 */ MCD_OPC_FilterValue, 3, 53, 22, // Skip to: 40669
+/* 34984 */ MCD_OPC_CheckField, 21, 1, 1, 47, 22, // Skip to: 40669
+/* 34990 */ MCD_OPC_Decode, 226, 7, 147, 2, // Opcode: LDRQroX
+/* 34995 */ MCD_OPC_FilterValue, 3, 38, 22, // Skip to: 40669
+/* 34999 */ MCD_OPC_CheckField, 21, 1, 0, 32, 22, // Skip to: 40669
+/* 35005 */ MCD_OPC_Decode, 224, 7, 226, 1, // Opcode: LDRQpre
+/* 35010 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 35019
+/* 35014 */ MCD_OPC_Decode, 222, 14, 231, 1, // Opcode: STRBui
+/* 35019 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 35028
+/* 35023 */ MCD_OPC_Decode, 205, 7, 231, 1, // Opcode: LDRBui
+/* 35028 */ MCD_OPC_FilterValue, 6, 5, 0, // Skip to: 35037
+/* 35032 */ MCD_OPC_Decode, 242, 14, 231, 1, // Opcode: STRQui
+/* 35037 */ MCD_OPC_FilterValue, 7, 252, 21, // Skip to: 40669
+/* 35041 */ MCD_OPC_Decode, 227, 7, 231, 1, // Opcode: LDRQui
+/* 35046 */ MCD_OPC_FilterValue, 2, 240, 8, // Skip to: 37338
+/* 35050 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 35053 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 35062
+/* 35057 */ MCD_OPC_Decode, 206, 7, 148, 2, // Opcode: LDRDl
+/* 35062 */ MCD_OPC_FilterValue, 2, 175, 5, // Skip to: 36521
+/* 35066 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 35069 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 35088
+/* 35073 */ MCD_OPC_CheckPredicate, 1, 216, 21, // Skip to: 40669
+/* 35077 */ MCD_OPC_CheckField, 21, 3, 0, 210, 21, // Skip to: 40669
+/* 35083 */ MCD_OPC_Decode, 152, 10, 149, 2, // Opcode: SHA1Crrr
+/* 35088 */ MCD_OPC_FilterValue, 1, 99, 0, // Skip to: 35191
+/* 35092 */ MCD_OPC_ExtractField, 16, 1, // Inst{16} ...
+/* 35095 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 35172
+/* 35099 */ MCD_OPC_ExtractField, 17, 1, // Inst{17} ...
+/* 35102 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 35153
+/* 35106 */ MCD_OPC_ExtractField, 18, 1, // Inst{18} ...
+/* 35109 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 35134
+/* 35113 */ MCD_OPC_CheckPredicate, 0, 176, 21, // Skip to: 40669
+/* 35117 */ MCD_OPC_CheckField, 21, 3, 0, 170, 21, // Skip to: 40669
+/* 35123 */ MCD_OPC_CheckField, 19, 1, 1, 164, 21, // Skip to: 40669
+/* 35129 */ MCD_OPC_Decode, 250, 1, 150, 2, // Opcode: CPYi64
+/* 35134 */ MCD_OPC_FilterValue, 1, 155, 21, // Skip to: 40669
+/* 35138 */ MCD_OPC_CheckPredicate, 0, 151, 21, // Skip to: 40669
+/* 35142 */ MCD_OPC_CheckField, 21, 3, 0, 145, 21, // Skip to: 40669
+/* 35148 */ MCD_OPC_Decode, 249, 1, 151, 2, // Opcode: CPYi32
+/* 35153 */ MCD_OPC_FilterValue, 1, 136, 21, // Skip to: 40669
+/* 35157 */ MCD_OPC_CheckPredicate, 0, 132, 21, // Skip to: 40669
+/* 35161 */ MCD_OPC_CheckField, 21, 3, 0, 126, 21, // Skip to: 40669
+/* 35167 */ MCD_OPC_Decode, 248, 1, 152, 2, // Opcode: CPYi16
+/* 35172 */ MCD_OPC_FilterValue, 1, 117, 21, // Skip to: 40669
+/* 35176 */ MCD_OPC_CheckPredicate, 0, 113, 21, // Skip to: 40669
+/* 35180 */ MCD_OPC_CheckField, 21, 3, 0, 107, 21, // Skip to: 40669
+/* 35186 */ MCD_OPC_Decode, 251, 1, 153, 2, // Opcode: CPYi8
+/* 35191 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 35210
+/* 35195 */ MCD_OPC_CheckPredicate, 1, 94, 21, // Skip to: 40669
+/* 35199 */ MCD_OPC_CheckField, 16, 8, 40, 88, 21, // Skip to: 40669
+/* 35205 */ MCD_OPC_Decode, 153, 10, 253, 1, // Opcode: SHA1Hrr
+/* 35210 */ MCD_OPC_FilterValue, 3, 54, 0, // Skip to: 35268
+/* 35214 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 35217 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 35230
+/* 35221 */ MCD_OPC_CheckPredicate, 0, 68, 21, // Skip to: 40669
+/* 35225 */ MCD_OPC_Decode, 162, 11, 154, 2, // Opcode: SQADDv1i8
+/* 35230 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35243
+/* 35234 */ MCD_OPC_CheckPredicate, 0, 55, 21, // Skip to: 40669
+/* 35238 */ MCD_OPC_Decode, 159, 11, 155, 2, // Opcode: SQADDv1i16
+/* 35243 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 35256
+/* 35247 */ MCD_OPC_CheckPredicate, 0, 42, 21, // Skip to: 40669
+/* 35251 */ MCD_OPC_Decode, 160, 11, 130, 2, // Opcode: SQADDv1i32
+/* 35256 */ MCD_OPC_FilterValue, 7, 33, 21, // Skip to: 40669
+/* 35260 */ MCD_OPC_CheckPredicate, 0, 29, 21, // Skip to: 40669
+/* 35264 */ MCD_OPC_Decode, 161, 11, 89, // Opcode: SQADDv1i64
+/* 35268 */ MCD_OPC_FilterValue, 4, 15, 0, // Skip to: 35287
+/* 35272 */ MCD_OPC_CheckPredicate, 1, 17, 21, // Skip to: 40669
+/* 35276 */ MCD_OPC_CheckField, 21, 3, 0, 11, 21, // Skip to: 40669
+/* 35282 */ MCD_OPC_Decode, 155, 10, 149, 2, // Opcode: SHA1Prrr
+/* 35287 */ MCD_OPC_FilterValue, 6, 14, 0, // Skip to: 35305
+/* 35291 */ MCD_OPC_CheckPredicate, 1, 254, 20, // Skip to: 40669
+/* 35295 */ MCD_OPC_CheckField, 16, 8, 40, 248, 20, // Skip to: 40669
+/* 35301 */ MCD_OPC_Decode, 157, 10, 126, // Opcode: SHA1SU1rr
+/* 35305 */ MCD_OPC_FilterValue, 8, 15, 0, // Skip to: 35324
+/* 35309 */ MCD_OPC_CheckPredicate, 1, 236, 20, // Skip to: 40669
+/* 35313 */ MCD_OPC_CheckField, 21, 3, 0, 230, 20, // Skip to: 40669
+/* 35319 */ MCD_OPC_Decode, 154, 10, 149, 2, // Opcode: SHA1Mrrr
+/* 35324 */ MCD_OPC_FilterValue, 10, 14, 0, // Skip to: 35342
+/* 35328 */ MCD_OPC_CheckPredicate, 1, 217, 20, // Skip to: 40669
+/* 35332 */ MCD_OPC_CheckField, 16, 8, 40, 211, 20, // Skip to: 40669
+/* 35338 */ MCD_OPC_Decode, 160, 10, 126, // Opcode: SHA256SU0rr
+/* 35342 */ MCD_OPC_FilterValue, 11, 54, 0, // Skip to: 35400
+/* 35346 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 35349 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 35362
+/* 35353 */ MCD_OPC_CheckPredicate, 0, 192, 20, // Skip to: 40669
+/* 35357 */ MCD_OPC_Decode, 196, 12, 154, 2, // Opcode: SQSUBv1i8
+/* 35362 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35375
+/* 35366 */ MCD_OPC_CheckPredicate, 0, 179, 20, // Skip to: 40669
+/* 35370 */ MCD_OPC_Decode, 193, 12, 155, 2, // Opcode: SQSUBv1i16
+/* 35375 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 35388
+/* 35379 */ MCD_OPC_CheckPredicate, 0, 166, 20, // Skip to: 40669
+/* 35383 */ MCD_OPC_Decode, 194, 12, 130, 2, // Opcode: SQSUBv1i32
+/* 35388 */ MCD_OPC_FilterValue, 7, 157, 20, // Skip to: 40669
+/* 35392 */ MCD_OPC_CheckPredicate, 0, 153, 20, // Skip to: 40669
+/* 35396 */ MCD_OPC_Decode, 195, 12, 89, // Opcode: SQSUBv1i64
+/* 35400 */ MCD_OPC_FilterValue, 12, 14, 0, // Skip to: 35418
+/* 35404 */ MCD_OPC_CheckPredicate, 1, 141, 20, // Skip to: 40669
+/* 35408 */ MCD_OPC_CheckField, 21, 3, 0, 135, 20, // Skip to: 40669
+/* 35414 */ MCD_OPC_Decode, 156, 10, 120, // Opcode: SHA1SU0rrr
+/* 35418 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 35436
+/* 35422 */ MCD_OPC_CheckPredicate, 0, 123, 20, // Skip to: 40669
+/* 35426 */ MCD_OPC_CheckField, 21, 3, 7, 117, 20, // Skip to: 40669
+/* 35432 */ MCD_OPC_Decode, 192, 1, 89, // Opcode: CMGTv1i64
+/* 35436 */ MCD_OPC_FilterValue, 14, 56, 0, // Skip to: 35496
+/* 35440 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
+/* 35443 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 35456
+/* 35447 */ MCD_OPC_CheckPredicate, 0, 98, 20, // Skip to: 40669
+/* 35451 */ MCD_OPC_Decode, 185, 15, 156, 2, // Opcode: SUQADDv1i8
+/* 35456 */ MCD_OPC_FilterValue, 96, 9, 0, // Skip to: 35469
+/* 35460 */ MCD_OPC_CheckPredicate, 0, 85, 20, // Skip to: 40669
+/* 35464 */ MCD_OPC_Decode, 182, 15, 157, 2, // Opcode: SUQADDv1i16
+/* 35469 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 35483
+/* 35474 */ MCD_OPC_CheckPredicate, 0, 71, 20, // Skip to: 40669
+/* 35478 */ MCD_OPC_Decode, 183, 15, 158, 2, // Opcode: SUQADDv1i32
+/* 35483 */ MCD_OPC_FilterValue, 224, 1, 61, 20, // Skip to: 40669
+/* 35488 */ MCD_OPC_CheckPredicate, 0, 57, 20, // Skip to: 40669
+/* 35492 */ MCD_OPC_Decode, 184, 15, 99, // Opcode: SUQADDv1i64
+/* 35496 */ MCD_OPC_FilterValue, 15, 14, 0, // Skip to: 35514
+/* 35500 */ MCD_OPC_CheckPredicate, 0, 45, 20, // Skip to: 40669
+/* 35504 */ MCD_OPC_CheckField, 21, 3, 7, 39, 20, // Skip to: 40669
+/* 35510 */ MCD_OPC_Decode, 176, 1, 89, // Opcode: CMGEv1i64
+/* 35514 */ MCD_OPC_FilterValue, 16, 14, 0, // Skip to: 35532
+/* 35518 */ MCD_OPC_CheckPredicate, 1, 27, 20, // Skip to: 40669
+/* 35522 */ MCD_OPC_CheckField, 21, 3, 0, 21, 20, // Skip to: 40669
+/* 35528 */ MCD_OPC_Decode, 159, 10, 120, // Opcode: SHA256Hrrr
+/* 35532 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 35550
+/* 35536 */ MCD_OPC_CheckPredicate, 0, 9, 20, // Skip to: 40669
+/* 35540 */ MCD_OPC_CheckField, 21, 3, 7, 3, 20, // Skip to: 40669
+/* 35546 */ MCD_OPC_Decode, 138, 13, 89, // Opcode: SSHLv1i64
+/* 35550 */ MCD_OPC_FilterValue, 18, 43, 0, // Skip to: 35597
+/* 35554 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
+/* 35557 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 35570
+/* 35561 */ MCD_OPC_CheckPredicate, 0, 240, 19, // Skip to: 40669
+/* 35565 */ MCD_OPC_Decode, 206, 12, 159, 2, // Opcode: SQXTNv1i8
+/* 35570 */ MCD_OPC_FilterValue, 97, 9, 0, // Skip to: 35583
+/* 35574 */ MCD_OPC_CheckPredicate, 0, 227, 19, // Skip to: 40669
+/* 35578 */ MCD_OPC_Decode, 204, 12, 255, 1, // Opcode: SQXTNv1i16
+/* 35583 */ MCD_OPC_FilterValue, 161, 1, 217, 19, // Skip to: 40669
+/* 35588 */ MCD_OPC_CheckPredicate, 0, 213, 19, // Skip to: 40669
+/* 35592 */ MCD_OPC_Decode, 205, 12, 144, 1, // Opcode: SQXTNv1i32
+/* 35597 */ MCD_OPC_FilterValue, 19, 54, 0, // Skip to: 35655
+/* 35601 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 35604 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 35617
+/* 35608 */ MCD_OPC_CheckPredicate, 0, 193, 19, // Skip to: 40669
+/* 35612 */ MCD_OPC_Decode, 161, 12, 154, 2, // Opcode: SQSHLv1i8
+/* 35617 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35630
+/* 35621 */ MCD_OPC_CheckPredicate, 0, 180, 19, // Skip to: 40669
+/* 35625 */ MCD_OPC_Decode, 158, 12, 155, 2, // Opcode: SQSHLv1i16
+/* 35630 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 35643
+/* 35634 */ MCD_OPC_CheckPredicate, 0, 167, 19, // Skip to: 40669
+/* 35638 */ MCD_OPC_Decode, 159, 12, 130, 2, // Opcode: SQSHLv1i32
+/* 35643 */ MCD_OPC_FilterValue, 7, 158, 19, // Skip to: 40669
+/* 35647 */ MCD_OPC_CheckPredicate, 0, 154, 19, // Skip to: 40669
+/* 35651 */ MCD_OPC_Decode, 160, 12, 89, // Opcode: SQSHLv1i64
+/* 35655 */ MCD_OPC_FilterValue, 20, 14, 0, // Skip to: 35673
+/* 35659 */ MCD_OPC_CheckPredicate, 1, 142, 19, // Skip to: 40669
+/* 35663 */ MCD_OPC_CheckField, 21, 3, 0, 136, 19, // Skip to: 40669
+/* 35669 */ MCD_OPC_Decode, 158, 10, 120, // Opcode: SHA256H2rrr
+/* 35673 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 35691
+/* 35677 */ MCD_OPC_CheckPredicate, 0, 124, 19, // Skip to: 40669
+/* 35681 */ MCD_OPC_CheckField, 21, 3, 7, 118, 19, // Skip to: 40669
+/* 35687 */ MCD_OPC_Decode, 236, 12, 89, // Opcode: SRSHLv1i64
+/* 35691 */ MCD_OPC_FilterValue, 23, 54, 0, // Skip to: 35749
+/* 35695 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 35698 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 35711
+/* 35702 */ MCD_OPC_CheckPredicate, 0, 99, 19, // Skip to: 40669
+/* 35706 */ MCD_OPC_Decode, 244, 11, 154, 2, // Opcode: SQRSHLv1i8
+/* 35711 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35724
+/* 35715 */ MCD_OPC_CheckPredicate, 0, 86, 19, // Skip to: 40669
+/* 35719 */ MCD_OPC_Decode, 241, 11, 155, 2, // Opcode: SQRSHLv1i16
+/* 35724 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 35737
+/* 35728 */ MCD_OPC_CheckPredicate, 0, 73, 19, // Skip to: 40669
+/* 35732 */ MCD_OPC_Decode, 242, 11, 130, 2, // Opcode: SQRSHLv1i32
+/* 35737 */ MCD_OPC_FilterValue, 7, 64, 19, // Skip to: 40669
+/* 35741 */ MCD_OPC_CheckPredicate, 0, 60, 19, // Skip to: 40669
+/* 35745 */ MCD_OPC_Decode, 243, 11, 89, // Opcode: SQRSHLv1i64
+/* 35749 */ MCD_OPC_FilterValue, 24, 14, 0, // Skip to: 35767
+/* 35753 */ MCD_OPC_CheckPredicate, 1, 48, 19, // Skip to: 40669
+/* 35757 */ MCD_OPC_CheckField, 21, 3, 0, 42, 19, // Skip to: 40669
+/* 35763 */ MCD_OPC_Decode, 161, 10, 120, // Opcode: SHA256SU1rrr
+/* 35767 */ MCD_OPC_FilterValue, 30, 56, 0, // Skip to: 35827
+/* 35771 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
+/* 35774 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 35787
+/* 35778 */ MCD_OPC_CheckPredicate, 0, 23, 19, // Skip to: 40669
+/* 35782 */ MCD_OPC_Decode, 151, 11, 160, 2, // Opcode: SQABSv1i8
+/* 35787 */ MCD_OPC_FilterValue, 96, 9, 0, // Skip to: 35800
+/* 35791 */ MCD_OPC_CheckPredicate, 0, 10, 19, // Skip to: 40669
+/* 35795 */ MCD_OPC_Decode, 148, 11, 161, 2, // Opcode: SQABSv1i16
+/* 35800 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 35814
+/* 35805 */ MCD_OPC_CheckPredicate, 0, 252, 18, // Skip to: 40669
+/* 35809 */ MCD_OPC_Decode, 149, 11, 253, 1, // Opcode: SQABSv1i32
+/* 35814 */ MCD_OPC_FilterValue, 224, 1, 242, 18, // Skip to: 40669
+/* 35819 */ MCD_OPC_CheckPredicate, 0, 238, 18, // Skip to: 40669
+/* 35823 */ MCD_OPC_Decode, 150, 11, 90, // Opcode: SQABSv1i64
+/* 35827 */ MCD_OPC_FilterValue, 33, 13, 0, // Skip to: 35844
+/* 35831 */ MCD_OPC_CheckPredicate, 0, 226, 18, // Skip to: 40669
+/* 35835 */ MCD_OPC_CheckField, 21, 3, 7, 220, 18, // Skip to: 40669
+/* 35841 */ MCD_OPC_Decode, 70, 89, // Opcode: ADDv1i64
+/* 35844 */ MCD_OPC_FilterValue, 34, 15, 0, // Skip to: 35863
+/* 35848 */ MCD_OPC_CheckPredicate, 0, 209, 18, // Skip to: 40669
+/* 35852 */ MCD_OPC_CheckField, 16, 8, 224, 1, 202, 18, // Skip to: 40669
+/* 35859 */ MCD_OPC_Decode, 193, 1, 90, // Opcode: CMGTv1i64rz
+/* 35863 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 35881
+/* 35867 */ MCD_OPC_CheckPredicate, 0, 190, 18, // Skip to: 40669
+/* 35871 */ MCD_OPC_CheckField, 21, 3, 7, 184, 18, // Skip to: 40669
+/* 35877 */ MCD_OPC_Decode, 239, 1, 89, // Opcode: CMTSTv1i64
+/* 35881 */ MCD_OPC_FilterValue, 36, 29, 0, // Skip to: 35914
+/* 35885 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 35888 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 35901
+/* 35892 */ MCD_OPC_CheckPredicate, 0, 165, 18, // Skip to: 40669
+/* 35896 */ MCD_OPC_Decode, 169, 11, 162, 2, // Opcode: SQDMLALi16
+/* 35901 */ MCD_OPC_FilterValue, 5, 156, 18, // Skip to: 40669
+/* 35905 */ MCD_OPC_CheckPredicate, 0, 152, 18, // Skip to: 40669
+/* 35909 */ MCD_OPC_Decode, 170, 11, 163, 2, // Opcode: SQDMLALi32
+/* 35914 */ MCD_OPC_FilterValue, 38, 15, 0, // Skip to: 35933
+/* 35918 */ MCD_OPC_CheckPredicate, 0, 139, 18, // Skip to: 40669
+/* 35922 */ MCD_OPC_CheckField, 16, 8, 224, 1, 132, 18, // Skip to: 40669
+/* 35929 */ MCD_OPC_Decode, 161, 1, 90, // Opcode: CMEQv1i64rz
+/* 35933 */ MCD_OPC_FilterValue, 42, 68, 0, // Skip to: 36005
+/* 35937 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
+/* 35940 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 35953
+/* 35944 */ MCD_OPC_CheckPredicate, 0, 113, 18, // Skip to: 40669
+/* 35948 */ MCD_OPC_Decode, 182, 3, 253, 1, // Opcode: FCVTNSv1i32
+/* 35953 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 35965
+/* 35957 */ MCD_OPC_CheckPredicate, 0, 100, 18, // Skip to: 40669
+/* 35961 */ MCD_OPC_Decode, 183, 3, 90, // Opcode: FCVTNSv1i64
+/* 35965 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 35979
+/* 35970 */ MCD_OPC_CheckPredicate, 0, 87, 18, // Skip to: 40669
+/* 35974 */ MCD_OPC_Decode, 204, 3, 253, 1, // Opcode: FCVTPSv1i32
+/* 35979 */ MCD_OPC_FilterValue, 224, 1, 8, 0, // Skip to: 35992
+/* 35984 */ MCD_OPC_CheckPredicate, 0, 73, 18, // Skip to: 40669
+/* 35988 */ MCD_OPC_Decode, 231, 1, 90, // Opcode: CMLTv1i64rz
+/* 35992 */ MCD_OPC_FilterValue, 225, 1, 64, 18, // Skip to: 40669
+/* 35997 */ MCD_OPC_CheckPredicate, 0, 60, 18, // Skip to: 40669
+/* 36001 */ MCD_OPC_Decode, 205, 3, 90, // Opcode: FCVTPSv1i64
+/* 36005 */ MCD_OPC_FilterValue, 44, 29, 0, // Skip to: 36038
+/* 36009 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 36012 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 36025
+/* 36016 */ MCD_OPC_CheckPredicate, 0, 41, 18, // Skip to: 40669
+/* 36020 */ MCD_OPC_Decode, 181, 11, 162, 2, // Opcode: SQDMLSLi16
+/* 36025 */ MCD_OPC_FilterValue, 5, 32, 18, // Skip to: 40669
+/* 36029 */ MCD_OPC_CheckPredicate, 0, 28, 18, // Skip to: 40669
+/* 36033 */ MCD_OPC_Decode, 182, 11, 163, 2, // Opcode: SQDMLSLi32
+/* 36038 */ MCD_OPC_FilterValue, 45, 29, 0, // Skip to: 36071
+/* 36042 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 36045 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 36058
+/* 36049 */ MCD_OPC_CheckPredicate, 0, 8, 18, // Skip to: 40669
+/* 36053 */ MCD_OPC_Decode, 193, 11, 155, 2, // Opcode: SQDMULHv1i16
+/* 36058 */ MCD_OPC_FilterValue, 5, 255, 17, // Skip to: 40669
+/* 36062 */ MCD_OPC_CheckPredicate, 0, 251, 17, // Skip to: 40669
+/* 36066 */ MCD_OPC_Decode, 195, 11, 130, 2, // Opcode: SQDMULHv1i32
+/* 36071 */ MCD_OPC_FilterValue, 46, 79, 0, // Skip to: 36154
+/* 36075 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
+/* 36078 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 36091
+/* 36082 */ MCD_OPC_CheckPredicate, 0, 231, 17, // Skip to: 40669
+/* 36086 */ MCD_OPC_Decode, 164, 3, 253, 1, // Opcode: FCVTMSv1i32
+/* 36091 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 36103
+/* 36095 */ MCD_OPC_CheckPredicate, 0, 218, 17, // Skip to: 40669
+/* 36099 */ MCD_OPC_Decode, 165, 3, 90, // Opcode: FCVTMSv1i64
+/* 36103 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 36117
+/* 36108 */ MCD_OPC_CheckPredicate, 0, 205, 17, // Skip to: 40669
+/* 36112 */ MCD_OPC_Decode, 244, 3, 253, 1, // Opcode: FCVTZSv1i32
+/* 36117 */ MCD_OPC_FilterValue, 224, 1, 7, 0, // Skip to: 36129
+/* 36122 */ MCD_OPC_CheckPredicate, 0, 191, 17, // Skip to: 40669
+/* 36126 */ MCD_OPC_Decode, 21, 90, // Opcode: ABSv1i64
+/* 36129 */ MCD_OPC_FilterValue, 225, 1, 8, 0, // Skip to: 36142
+/* 36134 */ MCD_OPC_CheckPredicate, 0, 179, 17, // Skip to: 40669
+/* 36138 */ MCD_OPC_Decode, 245, 3, 90, // Opcode: FCVTZSv1i64
+/* 36142 */ MCD_OPC_FilterValue, 241, 1, 170, 17, // Skip to: 40669
+/* 36147 */ MCD_OPC_CheckPredicate, 0, 166, 17, // Skip to: 40669
+/* 36151 */ MCD_OPC_Decode, 41, 95, // Opcode: ADDPv2i64p
+/* 36154 */ MCD_OPC_FilterValue, 50, 55, 0, // Skip to: 36213
+/* 36158 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
+/* 36161 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 36174
+/* 36165 */ MCD_OPC_CheckPredicate, 0, 148, 17, // Skip to: 40669
+/* 36169 */ MCD_OPC_Decode, 138, 3, 253, 1, // Opcode: FCVTASv1i32
+/* 36174 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 36186
+/* 36178 */ MCD_OPC_CheckPredicate, 0, 135, 17, // Skip to: 40669
+/* 36182 */ MCD_OPC_Decode, 139, 3, 90, // Opcode: FCVTASv1i64
+/* 36186 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 36200
+/* 36191 */ MCD_OPC_CheckPredicate, 0, 122, 17, // Skip to: 40669
+/* 36195 */ MCD_OPC_Decode, 234, 2, 253, 1, // Opcode: FCMGTv1i32rz
+/* 36200 */ MCD_OPC_FilterValue, 224, 1, 112, 17, // Skip to: 40669
+/* 36205 */ MCD_OPC_CheckPredicate, 0, 108, 17, // Skip to: 40669
+/* 36209 */ MCD_OPC_Decode, 235, 2, 90, // Opcode: FCMGTv1i64rz
+/* 36213 */ MCD_OPC_FilterValue, 52, 29, 0, // Skip to: 36246
+/* 36217 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 36220 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 36233
+/* 36224 */ MCD_OPC_CheckPredicate, 0, 89, 17, // Skip to: 40669
+/* 36228 */ MCD_OPC_Decode, 205, 11, 164, 2, // Opcode: SQDMULLi16
+/* 36233 */ MCD_OPC_FilterValue, 5, 80, 17, // Skip to: 40669
+/* 36237 */ MCD_OPC_CheckPredicate, 0, 76, 17, // Skip to: 40669
+/* 36241 */ MCD_OPC_Decode, 206, 11, 165, 2, // Opcode: SQDMULLi32
+/* 36246 */ MCD_OPC_FilterValue, 54, 82, 0, // Skip to: 36332
+/* 36250 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
+/* 36253 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 36266
+/* 36257 */ MCD_OPC_CheckPredicate, 0, 56, 17, // Skip to: 40669
+/* 36261 */ MCD_OPC_Decode, 140, 10, 253, 1, // Opcode: SCVTFv1i32
+/* 36266 */ MCD_OPC_FilterValue, 97, 8, 0, // Skip to: 36278
+/* 36270 */ MCD_OPC_CheckPredicate, 0, 43, 17, // Skip to: 40669
+/* 36274 */ MCD_OPC_Decode, 141, 10, 90, // Opcode: SCVTFv1i64
+/* 36278 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 36292
+/* 36283 */ MCD_OPC_CheckPredicate, 0, 30, 17, // Skip to: 40669
+/* 36287 */ MCD_OPC_Decode, 214, 2, 253, 1, // Opcode: FCMEQv1i32rz
+/* 36292 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 36306
+/* 36297 */ MCD_OPC_CheckPredicate, 0, 16, 17, // Skip to: 40669
+/* 36301 */ MCD_OPC_Decode, 138, 5, 253, 1, // Opcode: FRECPEv1i32
+/* 36306 */ MCD_OPC_FilterValue, 224, 1, 8, 0, // Skip to: 36319
+/* 36311 */ MCD_OPC_CheckPredicate, 0, 2, 17, // Skip to: 40669
+/* 36315 */ MCD_OPC_Decode, 215, 2, 90, // Opcode: FCMEQv1i64rz
+/* 36319 */ MCD_OPC_FilterValue, 225, 1, 249, 16, // Skip to: 40669
+/* 36324 */ MCD_OPC_CheckPredicate, 0, 245, 16, // Skip to: 40669
+/* 36328 */ MCD_OPC_Decode, 139, 5, 90, // Opcode: FRECPEv1i64
+/* 36332 */ MCD_OPC_FilterValue, 55, 28, 0, // Skip to: 36364
+/* 36336 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 36339 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 36352
+/* 36343 */ MCD_OPC_CheckPredicate, 0, 226, 16, // Skip to: 40669
+/* 36347 */ MCD_OPC_Decode, 237, 4, 130, 2, // Opcode: FMULX32
+/* 36352 */ MCD_OPC_FilterValue, 3, 217, 16, // Skip to: 40669
+/* 36356 */ MCD_OPC_CheckPredicate, 0, 213, 16, // Skip to: 40669
+/* 36360 */ MCD_OPC_Decode, 238, 4, 89, // Opcode: FMULX64
+/* 36364 */ MCD_OPC_FilterValue, 57, 28, 0, // Skip to: 36396
+/* 36368 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 36371 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 36384
+/* 36375 */ MCD_OPC_CheckPredicate, 0, 194, 16, // Skip to: 40669
+/* 36379 */ MCD_OPC_Decode, 212, 2, 130, 2, // Opcode: FCMEQ32
+/* 36384 */ MCD_OPC_FilterValue, 3, 185, 16, // Skip to: 40669
+/* 36388 */ MCD_OPC_CheckPredicate, 0, 181, 16, // Skip to: 40669
+/* 36392 */ MCD_OPC_Decode, 213, 2, 89, // Opcode: FCMEQ64
+/* 36396 */ MCD_OPC_FilterValue, 58, 30, 0, // Skip to: 36430
+/* 36400 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
+/* 36403 */ MCD_OPC_FilterValue, 160, 1, 9, 0, // Skip to: 36417
+/* 36408 */ MCD_OPC_CheckPredicate, 0, 161, 16, // Skip to: 40669
+/* 36412 */ MCD_OPC_Decode, 247, 2, 253, 1, // Opcode: FCMLTv1i32rz
+/* 36417 */ MCD_OPC_FilterValue, 224, 1, 151, 16, // Skip to: 40669
+/* 36422 */ MCD_OPC_CheckPredicate, 0, 147, 16, // Skip to: 40669
+/* 36426 */ MCD_OPC_Decode, 248, 2, 90, // Opcode: FCMLTv1i64rz
+/* 36430 */ MCD_OPC_FilterValue, 62, 30, 0, // Skip to: 36464
+/* 36434 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
+/* 36437 */ MCD_OPC_FilterValue, 161, 1, 9, 0, // Skip to: 36451
+/* 36442 */ MCD_OPC_CheckPredicate, 0, 127, 16, // Skip to: 40669
+/* 36446 */ MCD_OPC_Decode, 148, 5, 253, 1, // Opcode: FRECPXv1i32
+/* 36451 */ MCD_OPC_FilterValue, 225, 1, 117, 16, // Skip to: 40669
+/* 36456 */ MCD_OPC_CheckPredicate, 0, 113, 16, // Skip to: 40669
+/* 36460 */ MCD_OPC_Decode, 149, 5, 90, // Opcode: FRECPXv1i64
+/* 36464 */ MCD_OPC_FilterValue, 63, 105, 16, // Skip to: 40669
+/* 36468 */ MCD_OPC_ExtractField, 21, 3, // Inst{23-21} ...
+/* 36471 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 36484
+/* 36475 */ MCD_OPC_CheckPredicate, 0, 94, 16, // Skip to: 40669
+/* 36479 */ MCD_OPC_Decode, 143, 5, 130, 2, // Opcode: FRECPS32
+/* 36484 */ MCD_OPC_FilterValue, 3, 8, 0, // Skip to: 36496
+/* 36488 */ MCD_OPC_CheckPredicate, 0, 81, 16, // Skip to: 40669
+/* 36492 */ MCD_OPC_Decode, 144, 5, 89, // Opcode: FRECPS64
+/* 36496 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 36509
+/* 36500 */ MCD_OPC_CheckPredicate, 0, 69, 16, // Skip to: 40669
+/* 36504 */ MCD_OPC_Decode, 190, 5, 130, 2, // Opcode: FRSQRTS32
+/* 36509 */ MCD_OPC_FilterValue, 7, 60, 16, // Skip to: 40669
+/* 36513 */ MCD_OPC_CheckPredicate, 0, 56, 16, // Skip to: 40669
+/* 36517 */ MCD_OPC_Decode, 191, 5, 89, // Opcode: FRSQRTS64
+/* 36521 */ MCD_OPC_FilterValue, 3, 48, 16, // Skip to: 40669
+/* 36525 */ MCD_OPC_ExtractField, 12, 4, // Inst{15-12} ...
+/* 36528 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 36553
+/* 36532 */ MCD_OPC_CheckPredicate, 0, 37, 16, // Skip to: 40669
+/* 36536 */ MCD_OPC_CheckField, 22, 2, 1, 31, 16, // Skip to: 40669
+/* 36542 */ MCD_OPC_CheckField, 10, 2, 1, 25, 16, // Skip to: 40669
+/* 36548 */ MCD_OPC_Decode, 145, 13, 166, 2, // Opcode: SSHRd
+/* 36553 */ MCD_OPC_FilterValue, 1, 66, 0, // Skip to: 36623
+/* 36557 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 36560 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 36579
+/* 36564 */ MCD_OPC_CheckPredicate, 0, 5, 16, // Skip to: 40669
+/* 36568 */ MCD_OPC_CheckField, 10, 2, 1, 255, 15, // Skip to: 40669
+/* 36574 */ MCD_OPC_Decode, 153, 13, 167, 2, // Opcode: SSRAd
+/* 36579 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 36598
+/* 36583 */ MCD_OPC_CheckPredicate, 0, 242, 15, // Skip to: 40669
+/* 36587 */ MCD_OPC_CheckField, 10, 1, 0, 236, 15, // Skip to: 40669
+/* 36593 */ MCD_OPC_Decode, 204, 4, 168, 2, // Opcode: FMLAv1i32_indexed
+/* 36598 */ MCD_OPC_FilterValue, 3, 227, 15, // Skip to: 40669
+/* 36602 */ MCD_OPC_CheckPredicate, 0, 223, 15, // Skip to: 40669
+/* 36606 */ MCD_OPC_CheckField, 21, 1, 0, 217, 15, // Skip to: 40669
+/* 36612 */ MCD_OPC_CheckField, 10, 1, 0, 211, 15, // Skip to: 40669
+/* 36618 */ MCD_OPC_Decode, 205, 4, 169, 2, // Opcode: FMLAv1i64_indexed
+/* 36623 */ MCD_OPC_FilterValue, 2, 21, 0, // Skip to: 36648
+/* 36627 */ MCD_OPC_CheckPredicate, 0, 198, 15, // Skip to: 40669
+/* 36631 */ MCD_OPC_CheckField, 22, 2, 1, 192, 15, // Skip to: 40669
+/* 36637 */ MCD_OPC_CheckField, 10, 2, 1, 186, 15, // Skip to: 40669
+/* 36643 */ MCD_OPC_Decode, 243, 12, 166, 2, // Opcode: SRSHRd
+/* 36648 */ MCD_OPC_FilterValue, 3, 61, 0, // Skip to: 36713
+/* 36652 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 36655 */ MCD_OPC_FilterValue, 0, 29, 0, // Skip to: 36688
+/* 36659 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 36662 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 36675
+/* 36666 */ MCD_OPC_CheckPredicate, 0, 159, 15, // Skip to: 40669
+/* 36670 */ MCD_OPC_Decode, 171, 11, 170, 2, // Opcode: SQDMLALv1i32_indexed
+/* 36675 */ MCD_OPC_FilterValue, 2, 150, 15, // Skip to: 40669
+/* 36679 */ MCD_OPC_CheckPredicate, 0, 146, 15, // Skip to: 40669
+/* 36683 */ MCD_OPC_Decode, 172, 11, 171, 2, // Opcode: SQDMLALv1i64_indexed
+/* 36688 */ MCD_OPC_FilterValue, 1, 137, 15, // Skip to: 40669
+/* 36692 */ MCD_OPC_CheckPredicate, 0, 133, 15, // Skip to: 40669
+/* 36696 */ MCD_OPC_CheckField, 22, 2, 1, 127, 15, // Skip to: 40669
+/* 36702 */ MCD_OPC_CheckField, 11, 1, 0, 121, 15, // Skip to: 40669
+/* 36708 */ MCD_OPC_Decode, 251, 12, 167, 2, // Opcode: SRSRAd
+/* 36713 */ MCD_OPC_FilterValue, 5, 66, 0, // Skip to: 36783
+/* 36717 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 36720 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 36739
+/* 36724 */ MCD_OPC_CheckPredicate, 0, 101, 15, // Skip to: 40669
+/* 36728 */ MCD_OPC_CheckField, 10, 2, 1, 95, 15, // Skip to: 40669
+/* 36734 */ MCD_OPC_Decode, 174, 10, 172, 2, // Opcode: SHLd
+/* 36739 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 36758
+/* 36743 */ MCD_OPC_CheckPredicate, 0, 82, 15, // Skip to: 40669
+/* 36747 */ MCD_OPC_CheckField, 10, 1, 0, 76, 15, // Skip to: 40669
+/* 36753 */ MCD_OPC_Decode, 212, 4, 168, 2, // Opcode: FMLSv1i32_indexed
+/* 36758 */ MCD_OPC_FilterValue, 3, 67, 15, // Skip to: 40669
+/* 36762 */ MCD_OPC_CheckPredicate, 0, 63, 15, // Skip to: 40669
+/* 36766 */ MCD_OPC_CheckField, 21, 1, 0, 57, 15, // Skip to: 40669
+/* 36772 */ MCD_OPC_CheckField, 10, 1, 0, 51, 15, // Skip to: 40669
+/* 36778 */ MCD_OPC_Decode, 213, 4, 169, 2, // Opcode: FMLSv1i64_indexed
+/* 36783 */ MCD_OPC_FilterValue, 7, 138, 0, // Skip to: 36925
+/* 36787 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 36790 */ MCD_OPC_FilterValue, 0, 73, 0, // Skip to: 36867
+/* 36794 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 36797 */ MCD_OPC_FilterValue, 0, 47, 0, // Skip to: 36848
+/* 36801 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 36804 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 36829
+/* 36808 */ MCD_OPC_CheckPredicate, 0, 17, 15, // Skip to: 40669
+/* 36812 */ MCD_OPC_CheckField, 19, 1, 1, 11, 15, // Skip to: 40669
+/* 36818 */ MCD_OPC_CheckField, 10, 2, 1, 5, 15, // Skip to: 40669
+/* 36824 */ MCD_OPC_Decode, 152, 12, 173, 2, // Opcode: SQSHLb
+/* 36829 */ MCD_OPC_FilterValue, 1, 252, 14, // Skip to: 40669
+/* 36833 */ MCD_OPC_CheckPredicate, 0, 248, 14, // Skip to: 40669
+/* 36837 */ MCD_OPC_CheckField, 10, 2, 1, 242, 14, // Skip to: 40669
+/* 36843 */ MCD_OPC_Decode, 154, 12, 174, 2, // Opcode: SQSHLh
+/* 36848 */ MCD_OPC_FilterValue, 1, 233, 14, // Skip to: 40669
+/* 36852 */ MCD_OPC_CheckPredicate, 0, 229, 14, // Skip to: 40669
+/* 36856 */ MCD_OPC_CheckField, 10, 2, 1, 223, 14, // Skip to: 40669
+/* 36862 */ MCD_OPC_Decode, 155, 12, 175, 2, // Opcode: SQSHLs
+/* 36867 */ MCD_OPC_FilterValue, 1, 35, 0, // Skip to: 36906
+/* 36871 */ MCD_OPC_ExtractField, 10, 1, // Inst{10} ...
+/* 36874 */ MCD_OPC_FilterValue, 0, 9, 0, // Skip to: 36887
+/* 36878 */ MCD_OPC_CheckPredicate, 0, 203, 14, // Skip to: 40669
+/* 36882 */ MCD_OPC_Decode, 183, 11, 170, 2, // Opcode: SQDMLSLv1i32_indexed
+/* 36887 */ MCD_OPC_FilterValue, 1, 194, 14, // Skip to: 40669
+/* 36891 */ MCD_OPC_CheckPredicate, 0, 190, 14, // Skip to: 40669
+/* 36895 */ MCD_OPC_CheckField, 11, 1, 0, 184, 14, // Skip to: 40669
+/* 36901 */ MCD_OPC_Decode, 153, 12, 172, 2, // Opcode: SQSHLd
+/* 36906 */ MCD_OPC_FilterValue, 2, 175, 14, // Skip to: 40669
+/* 36910 */ MCD_OPC_CheckPredicate, 0, 171, 14, // Skip to: 40669
+/* 36914 */ MCD_OPC_CheckField, 10, 1, 0, 165, 14, // Skip to: 40669
+/* 36920 */ MCD_OPC_Decode, 184, 11, 171, 2, // Opcode: SQDMLSLv1i64_indexed
+/* 36925 */ MCD_OPC_FilterValue, 9, 172, 0, // Skip to: 37101
+/* 36929 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 36932 */ MCD_OPC_FilterValue, 0, 121, 0, // Skip to: 37057
+/* 36936 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 36939 */ MCD_OPC_FilterValue, 1, 55, 0, // Skip to: 36998
+/* 36943 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 36946 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 36985
+/* 36950 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 36953 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 36972
+/* 36957 */ MCD_OPC_CheckPredicate, 0, 124, 14, // Skip to: 40669
+/* 36961 */ MCD_OPC_CheckField, 19, 1, 1, 118, 14, // Skip to: 40669
+/* 36967 */ MCD_OPC_Decode, 174, 12, 176, 2, // Opcode: SQSHRNb
+/* 36972 */ MCD_OPC_FilterValue, 1, 109, 14, // Skip to: 40669
+/* 36976 */ MCD_OPC_CheckPredicate, 0, 105, 14, // Skip to: 40669
+/* 36980 */ MCD_OPC_Decode, 175, 12, 177, 2, // Opcode: SQSHRNh
+/* 36985 */ MCD_OPC_FilterValue, 1, 96, 14, // Skip to: 40669
+/* 36989 */ MCD_OPC_CheckPredicate, 0, 92, 14, // Skip to: 40669
+/* 36993 */ MCD_OPC_Decode, 176, 12, 178, 2, // Opcode: SQSHRNs
+/* 36998 */ MCD_OPC_FilterValue, 3, 83, 14, // Skip to: 40669
+/* 37002 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 37005 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 37044
+/* 37009 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 37012 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 37031
+/* 37016 */ MCD_OPC_CheckPredicate, 0, 65, 14, // Skip to: 40669
+/* 37020 */ MCD_OPC_CheckField, 19, 1, 1, 59, 14, // Skip to: 40669
+/* 37026 */ MCD_OPC_Decode, 251, 11, 176, 2, // Opcode: SQRSHRNb
+/* 37031 */ MCD_OPC_FilterValue, 1, 50, 14, // Skip to: 40669
+/* 37035 */ MCD_OPC_CheckPredicate, 0, 46, 14, // Skip to: 40669
+/* 37039 */ MCD_OPC_Decode, 252, 11, 177, 2, // Opcode: SQRSHRNh
+/* 37044 */ MCD_OPC_FilterValue, 1, 37, 14, // Skip to: 40669
+/* 37048 */ MCD_OPC_CheckPredicate, 0, 33, 14, // Skip to: 40669
+/* 37052 */ MCD_OPC_Decode, 253, 11, 178, 2, // Opcode: SQRSHRNs
+/* 37057 */ MCD_OPC_FilterValue, 2, 15, 0, // Skip to: 37076
+/* 37061 */ MCD_OPC_CheckPredicate, 0, 20, 14, // Skip to: 40669
+/* 37065 */ MCD_OPC_CheckField, 10, 1, 0, 14, 14, // Skip to: 40669
+/* 37071 */ MCD_OPC_Decode, 247, 4, 179, 2, // Opcode: FMULv1i32_indexed
+/* 37076 */ MCD_OPC_FilterValue, 3, 5, 14, // Skip to: 40669
+/* 37080 */ MCD_OPC_CheckPredicate, 0, 1, 14, // Skip to: 40669
+/* 37084 */ MCD_OPC_CheckField, 21, 1, 0, 251, 13, // Skip to: 40669
+/* 37090 */ MCD_OPC_CheckField, 10, 1, 0, 245, 13, // Skip to: 40669
+/* 37096 */ MCD_OPC_Decode, 248, 4, 180, 2, // Opcode: FMULv1i64_indexed
+/* 37101 */ MCD_OPC_FilterValue, 11, 41, 0, // Skip to: 37146
+/* 37105 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 37108 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 37127
+/* 37112 */ MCD_OPC_CheckPredicate, 0, 225, 13, // Skip to: 40669
+/* 37116 */ MCD_OPC_CheckField, 10, 1, 0, 219, 13, // Skip to: 40669
+/* 37122 */ MCD_OPC_Decode, 207, 11, 181, 2, // Opcode: SQDMULLv1i32_indexed
+/* 37127 */ MCD_OPC_FilterValue, 2, 210, 13, // Skip to: 40669
+/* 37131 */ MCD_OPC_CheckPredicate, 0, 206, 13, // Skip to: 40669
+/* 37135 */ MCD_OPC_CheckField, 10, 1, 0, 200, 13, // Skip to: 40669
+/* 37141 */ MCD_OPC_Decode, 208, 11, 182, 2, // Opcode: SQDMULLv1i64_indexed
+/* 37146 */ MCD_OPC_FilterValue, 12, 41, 0, // Skip to: 37191
+/* 37150 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 37153 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 37172
+/* 37157 */ MCD_OPC_CheckPredicate, 0, 180, 13, // Skip to: 40669
+/* 37161 */ MCD_OPC_CheckField, 10, 1, 0, 174, 13, // Skip to: 40669
+/* 37167 */ MCD_OPC_Decode, 194, 11, 183, 2, // Opcode: SQDMULHv1i16_indexed
+/* 37172 */ MCD_OPC_FilterValue, 2, 165, 13, // Skip to: 40669
+/* 37176 */ MCD_OPC_CheckPredicate, 0, 161, 13, // Skip to: 40669
+/* 37180 */ MCD_OPC_CheckField, 10, 1, 0, 155, 13, // Skip to: 40669
+/* 37186 */ MCD_OPC_Decode, 196, 11, 179, 2, // Opcode: SQDMULHv1i32_indexed
+/* 37191 */ MCD_OPC_FilterValue, 13, 41, 0, // Skip to: 37236
+/* 37195 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 37198 */ MCD_OPC_FilterValue, 1, 15, 0, // Skip to: 37217
+/* 37202 */ MCD_OPC_CheckPredicate, 0, 135, 13, // Skip to: 40669
+/* 37206 */ MCD_OPC_CheckField, 10, 1, 0, 129, 13, // Skip to: 40669
+/* 37212 */ MCD_OPC_Decode, 229, 11, 183, 2, // Opcode: SQRDMULHv1i16_indexed
+/* 37217 */ MCD_OPC_FilterValue, 2, 120, 13, // Skip to: 40669
+/* 37221 */ MCD_OPC_CheckPredicate, 0, 116, 13, // Skip to: 40669
+/* 37225 */ MCD_OPC_CheckField, 10, 1, 0, 110, 13, // Skip to: 40669
+/* 37231 */ MCD_OPC_Decode, 231, 11, 179, 2, // Opcode: SQRDMULHv1i32_indexed
+/* 37236 */ MCD_OPC_FilterValue, 14, 47, 0, // Skip to: 37287
+/* 37240 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 37243 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 37268
+/* 37247 */ MCD_OPC_CheckPredicate, 0, 90, 13, // Skip to: 40669
+/* 37251 */ MCD_OPC_CheckField, 21, 1, 1, 84, 13, // Skip to: 40669
+/* 37257 */ MCD_OPC_CheckField, 10, 2, 1, 78, 13, // Skip to: 40669
+/* 37263 */ MCD_OPC_Decode, 139, 10, 184, 2, // Opcode: SCVTFs
+/* 37268 */ MCD_OPC_FilterValue, 1, 69, 13, // Skip to: 40669
+/* 37272 */ MCD_OPC_CheckPredicate, 0, 65, 13, // Skip to: 40669
+/* 37276 */ MCD_OPC_CheckField, 10, 2, 1, 59, 13, // Skip to: 40669
+/* 37282 */ MCD_OPC_Decode, 138, 10, 166, 2, // Opcode: SCVTFd
+/* 37287 */ MCD_OPC_FilterValue, 15, 50, 13, // Skip to: 40669
+/* 37291 */ MCD_OPC_ExtractField, 22, 2, // Inst{23-22} ...
+/* 37294 */ MCD_OPC_FilterValue, 0, 21, 0, // Skip to: 37319
+/* 37298 */ MCD_OPC_CheckPredicate, 0, 39, 13, // Skip to: 40669
+/* 37302 */ MCD_OPC_CheckField, 21, 1, 1, 33, 13, // Skip to: 40669
+/* 37308 */ MCD_OPC_CheckField, 10, 2, 3, 27, 13, // Skip to: 40669
+/* 37314 */ MCD_OPC_Decode, 243, 3, 184, 2, // Opcode: FCVTZSs
+/* 37319 */ MCD_OPC_FilterValue, 1, 18, 13, // Skip to: 40669
+/* 37323 */ MCD_OPC_CheckPredicate, 0, 14, 13, // Skip to: 40669
+/* 37327 */ MCD_OPC_CheckField, 10, 2, 3, 8, 13, // Skip to: 40669
+/* 37333 */ MCD_OPC_Decode, 242, 3, 166, 2, // Opcode: FCVTZSd
+/* 37338 */ MCD_OPC_FilterValue, 3, 212, 8, // Skip to: 39602
+/* 37342 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
+/* 37345 */ MCD_OPC_FilterValue, 0, 85, 0, // Skip to: 37434
+/* 37349 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 37352 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37367
+/* 37356 */ MCD_OPC_CheckField, 21, 1, 0, 235, 12, // Skip to: 40669
+/* 37362 */ MCD_OPC_Decode, 138, 15, 226, 1, // Opcode: STURHi
+/* 37367 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 37382
+/* 37371 */ MCD_OPC_CheckField, 21, 1, 0, 220, 12, // Skip to: 40669
+/* 37377 */ MCD_OPC_Decode, 233, 14, 226, 1, // Opcode: STRHpost
+/* 37382 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 37419
+/* 37386 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 37389 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 37404
+/* 37393 */ MCD_OPC_CheckField, 21, 1, 1, 198, 12, // Skip to: 40669
+/* 37399 */ MCD_OPC_Decode, 235, 14, 185, 2, // Opcode: STRHroW
+/* 37404 */ MCD_OPC_FilterValue, 3, 189, 12, // Skip to: 40669
+/* 37408 */ MCD_OPC_CheckField, 21, 1, 1, 183, 12, // Skip to: 40669
+/* 37414 */ MCD_OPC_Decode, 236, 14, 186, 2, // Opcode: STRHroX
+/* 37419 */ MCD_OPC_FilterValue, 3, 174, 12, // Skip to: 40669
+/* 37423 */ MCD_OPC_CheckField, 21, 1, 0, 168, 12, // Skip to: 40669
+/* 37429 */ MCD_OPC_Decode, 234, 14, 226, 1, // Opcode: STRHpre
+/* 37434 */ MCD_OPC_FilterValue, 1, 85, 0, // Skip to: 37523
+/* 37438 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 37441 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 37456
+/* 37445 */ MCD_OPC_CheckField, 21, 1, 0, 146, 12, // Skip to: 40669
+/* 37451 */ MCD_OPC_Decode, 157, 8, 226, 1, // Opcode: LDURHi
+/* 37456 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 37471
+/* 37460 */ MCD_OPC_CheckField, 21, 1, 0, 131, 12, // Skip to: 40669
+/* 37466 */ MCD_OPC_Decode, 217, 7, 226, 1, // Opcode: LDRHpost
+/* 37471 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 37508
+/* 37475 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 37478 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 37493
+/* 37482 */ MCD_OPC_CheckField, 21, 1, 1, 109, 12, // Skip to: 40669
+/* 37488 */ MCD_OPC_Decode, 219, 7, 185, 2, // Opcode: LDRHroW
+/* 37493 */ MCD_OPC_FilterValue, 3, 100, 12, // Skip to: 40669
+/* 37497 */ MCD_OPC_CheckField, 21, 1, 1, 94, 12, // Skip to: 40669
+/* 37503 */ MCD_OPC_Decode, 220, 7, 186, 2, // Opcode: LDRHroX
+/* 37508 */ MCD_OPC_FilterValue, 3, 85, 12, // Skip to: 40669
+/* 37512 */ MCD_OPC_CheckField, 21, 1, 0, 79, 12, // Skip to: 40669
+/* 37518 */ MCD_OPC_Decode, 218, 7, 226, 1, // Opcode: LDRHpre
+/* 37523 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 37532
+/* 37527 */ MCD_OPC_Decode, 237, 14, 231, 1, // Opcode: STRHui
+/* 37532 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 37541
+/* 37536 */ MCD_OPC_Decode, 221, 7, 231, 1, // Opcode: LDRHui
+/* 37541 */ MCD_OPC_FilterValue, 8, 60, 1, // Skip to: 37861
+/* 37545 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 37548 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 37567
+/* 37552 */ MCD_OPC_CheckPredicate, 0, 41, 12, // Skip to: 40669
+/* 37556 */ MCD_OPC_CheckField, 21, 1, 1, 35, 12, // Skip to: 40669
+/* 37562 */ MCD_OPC_Decode, 141, 17, 154, 2, // Opcode: UQADDv1i8
+/* 37567 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 37586
+/* 37571 */ MCD_OPC_CheckPredicate, 0, 22, 12, // Skip to: 40669
+/* 37575 */ MCD_OPC_CheckField, 16, 6, 33, 16, 12, // Skip to: 40669
+/* 37581 */ MCD_OPC_Decode, 215, 12, 159, 2, // Opcode: SQXTUNv1i8
+/* 37586 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 37605
+/* 37590 */ MCD_OPC_CheckPredicate, 0, 3, 12, // Skip to: 40669
+/* 37594 */ MCD_OPC_CheckField, 21, 1, 1, 253, 11, // Skip to: 40669
+/* 37600 */ MCD_OPC_Decode, 203, 17, 154, 2, // Opcode: UQSUBv1i8
+/* 37605 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 37624
+/* 37609 */ MCD_OPC_CheckPredicate, 0, 240, 11, // Skip to: 40669
+/* 37613 */ MCD_OPC_CheckField, 16, 6, 32, 234, 11, // Skip to: 40669
+/* 37619 */ MCD_OPC_Decode, 151, 18, 156, 2, // Opcode: USQADDv1i8
+/* 37624 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 37643
+/* 37628 */ MCD_OPC_CheckPredicate, 0, 221, 11, // Skip to: 40669
+/* 37632 */ MCD_OPC_CheckField, 16, 6, 33, 215, 11, // Skip to: 40669
+/* 37638 */ MCD_OPC_Decode, 213, 17, 159, 2, // Opcode: UQXTNv1i8
+/* 37643 */ MCD_OPC_FilterValue, 19, 15, 0, // Skip to: 37662
+/* 37647 */ MCD_OPC_CheckPredicate, 0, 202, 11, // Skip to: 40669
+/* 37651 */ MCD_OPC_CheckField, 21, 1, 1, 196, 11, // Skip to: 40669
+/* 37657 */ MCD_OPC_Decode, 177, 17, 154, 2, // Opcode: UQSHLv1i8
+/* 37662 */ MCD_OPC_FilterValue, 23, 15, 0, // Skip to: 37681
+/* 37666 */ MCD_OPC_CheckPredicate, 0, 183, 11, // Skip to: 40669
+/* 37670 */ MCD_OPC_CheckField, 21, 1, 1, 177, 11, // Skip to: 40669
+/* 37676 */ MCD_OPC_Decode, 152, 17, 154, 2, // Opcode: UQRSHLv1i8
+/* 37681 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 37700
+/* 37685 */ MCD_OPC_CheckPredicate, 0, 164, 11, // Skip to: 40669
+/* 37689 */ MCD_OPC_CheckField, 16, 6, 32, 158, 11, // Skip to: 40669
+/* 37695 */ MCD_OPC_Decode, 221, 11, 160, 2, // Opcode: SQNEGv1i8
+/* 37700 */ MCD_OPC_FilterValue, 42, 15, 0, // Skip to: 37719
+/* 37704 */ MCD_OPC_CheckPredicate, 0, 145, 11, // Skip to: 40669
+/* 37708 */ MCD_OPC_CheckField, 16, 6, 33, 139, 11, // Skip to: 40669
+/* 37714 */ MCD_OPC_Decode, 191, 3, 253, 1, // Opcode: FCVTNUv1i32
+/* 37719 */ MCD_OPC_FilterValue, 46, 15, 0, // Skip to: 37738
+/* 37723 */ MCD_OPC_CheckPredicate, 0, 126, 11, // Skip to: 40669
+/* 37727 */ MCD_OPC_CheckField, 16, 6, 33, 120, 11, // Skip to: 40669
+/* 37733 */ MCD_OPC_Decode, 173, 3, 253, 1, // Opcode: FCVTMUv1i32
+/* 37738 */ MCD_OPC_FilterValue, 50, 29, 0, // Skip to: 37771
+/* 37742 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 37745 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 37758
+/* 37749 */ MCD_OPC_CheckPredicate, 0, 100, 11, // Skip to: 40669
+/* 37753 */ MCD_OPC_Decode, 147, 3, 253, 1, // Opcode: FCVTAUv1i32
+/* 37758 */ MCD_OPC_FilterValue, 48, 91, 11, // Skip to: 40669
+/* 37762 */ MCD_OPC_CheckPredicate, 0, 87, 11, // Skip to: 40669
+/* 37766 */ MCD_OPC_Decode, 164, 4, 144, 1, // Opcode: FMAXNMPv2i32p
+/* 37771 */ MCD_OPC_FilterValue, 54, 29, 0, // Skip to: 37804
+/* 37775 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 37778 */ MCD_OPC_FilterValue, 33, 9, 0, // Skip to: 37791
+/* 37782 */ MCD_OPC_CheckPredicate, 0, 67, 11, // Skip to: 40669
+/* 37786 */ MCD_OPC_Decode, 170, 16, 253, 1, // Opcode: UCVTFv1i32
+/* 37791 */ MCD_OPC_FilterValue, 48, 58, 11, // Skip to: 40669
+/* 37795 */ MCD_OPC_CheckPredicate, 0, 54, 11, // Skip to: 40669
+/* 37799 */ MCD_OPC_Decode, 201, 2, 144, 1, // Opcode: FADDPv2i32p
+/* 37804 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 37823
+/* 37808 */ MCD_OPC_CheckPredicate, 0, 41, 11, // Skip to: 40669
+/* 37812 */ MCD_OPC_CheckField, 21, 1, 1, 35, 11, // Skip to: 40669
+/* 37818 */ MCD_OPC_Decode, 222, 2, 130, 2, // Opcode: FCMGE32
+/* 37823 */ MCD_OPC_FilterValue, 59, 15, 0, // Skip to: 37842
+/* 37827 */ MCD_OPC_CheckPredicate, 0, 22, 11, // Skip to: 40669
+/* 37831 */ MCD_OPC_CheckField, 21, 1, 1, 16, 11, // Skip to: 40669
+/* 37837 */ MCD_OPC_Decode, 188, 2, 130, 2, // Opcode: FACGE32
+/* 37842 */ MCD_OPC_FilterValue, 62, 7, 11, // Skip to: 40669
+/* 37846 */ MCD_OPC_CheckPredicate, 0, 3, 11, // Skip to: 40669
+/* 37850 */ MCD_OPC_CheckField, 16, 6, 48, 253, 10, // Skip to: 40669
+/* 37856 */ MCD_OPC_Decode, 174, 4, 144, 1, // Opcode: FMAXPv2i32p
+/* 37861 */ MCD_OPC_FilterValue, 9, 89, 1, // Skip to: 38210
+/* 37865 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 37868 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 37887
+/* 37872 */ MCD_OPC_CheckPredicate, 0, 233, 10, // Skip to: 40669
+/* 37876 */ MCD_OPC_CheckField, 21, 1, 1, 227, 10, // Skip to: 40669
+/* 37882 */ MCD_OPC_Decode, 138, 17, 155, 2, // Opcode: UQADDv1i16
+/* 37887 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 37906
+/* 37891 */ MCD_OPC_CheckPredicate, 0, 214, 10, // Skip to: 40669
+/* 37895 */ MCD_OPC_CheckField, 16, 6, 33, 208, 10, // Skip to: 40669
+/* 37901 */ MCD_OPC_Decode, 213, 12, 255, 1, // Opcode: SQXTUNv1i16
+/* 37906 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 37925
+/* 37910 */ MCD_OPC_CheckPredicate, 0, 195, 10, // Skip to: 40669
+/* 37914 */ MCD_OPC_CheckField, 21, 1, 1, 189, 10, // Skip to: 40669
+/* 37920 */ MCD_OPC_Decode, 200, 17, 155, 2, // Opcode: UQSUBv1i16
+/* 37925 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 37944
+/* 37929 */ MCD_OPC_CheckPredicate, 0, 176, 10, // Skip to: 40669
+/* 37933 */ MCD_OPC_CheckField, 16, 6, 32, 170, 10, // Skip to: 40669
+/* 37939 */ MCD_OPC_Decode, 148, 18, 157, 2, // Opcode: USQADDv1i16
+/* 37944 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 37963
+/* 37948 */ MCD_OPC_CheckPredicate, 0, 157, 10, // Skip to: 40669
+/* 37952 */ MCD_OPC_CheckField, 16, 6, 33, 151, 10, // Skip to: 40669
+/* 37958 */ MCD_OPC_Decode, 211, 17, 255, 1, // Opcode: UQXTNv1i16
+/* 37963 */ MCD_OPC_FilterValue, 19, 15, 0, // Skip to: 37982
+/* 37967 */ MCD_OPC_CheckPredicate, 0, 138, 10, // Skip to: 40669
+/* 37971 */ MCD_OPC_CheckField, 21, 1, 1, 132, 10, // Skip to: 40669
+/* 37977 */ MCD_OPC_Decode, 174, 17, 155, 2, // Opcode: UQSHLv1i16
+/* 37982 */ MCD_OPC_FilterValue, 23, 15, 0, // Skip to: 38001
+/* 37986 */ MCD_OPC_CheckPredicate, 0, 119, 10, // Skip to: 40669
+/* 37990 */ MCD_OPC_CheckField, 21, 1, 1, 113, 10, // Skip to: 40669
+/* 37996 */ MCD_OPC_Decode, 149, 17, 155, 2, // Opcode: UQRSHLv1i16
+/* 38001 */ MCD_OPC_FilterValue, 26, 15, 0, // Skip to: 38020
+/* 38005 */ MCD_OPC_CheckPredicate, 0, 100, 10, // Skip to: 40669
+/* 38009 */ MCD_OPC_CheckField, 16, 6, 33, 94, 10, // Skip to: 40669
+/* 38015 */ MCD_OPC_Decode, 220, 3, 144, 1, // Opcode: FCVTXNv1i64
+/* 38020 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 38039
+/* 38024 */ MCD_OPC_CheckPredicate, 0, 81, 10, // Skip to: 40669
+/* 38028 */ MCD_OPC_CheckField, 16, 6, 32, 75, 10, // Skip to: 40669
+/* 38034 */ MCD_OPC_Decode, 218, 11, 161, 2, // Opcode: SQNEGv1i16
+/* 38039 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 38057
+/* 38043 */ MCD_OPC_CheckPredicate, 0, 62, 10, // Skip to: 40669
+/* 38047 */ MCD_OPC_CheckField, 16, 6, 33, 56, 10, // Skip to: 40669
+/* 38053 */ MCD_OPC_Decode, 192, 3, 90, // Opcode: FCVTNUv1i64
+/* 38057 */ MCD_OPC_FilterValue, 45, 15, 0, // Skip to: 38076
+/* 38061 */ MCD_OPC_CheckPredicate, 0, 44, 10, // Skip to: 40669
+/* 38065 */ MCD_OPC_CheckField, 21, 1, 1, 38, 10, // Skip to: 40669
+/* 38071 */ MCD_OPC_Decode, 228, 11, 155, 2, // Opcode: SQRDMULHv1i16
+/* 38076 */ MCD_OPC_FilterValue, 46, 14, 0, // Skip to: 38094
+/* 38080 */ MCD_OPC_CheckPredicate, 0, 25, 10, // Skip to: 40669
+/* 38084 */ MCD_OPC_CheckField, 16, 6, 33, 19, 10, // Skip to: 40669
+/* 38090 */ MCD_OPC_Decode, 174, 3, 90, // Opcode: FCVTMUv1i64
+/* 38094 */ MCD_OPC_FilterValue, 50, 27, 0, // Skip to: 38125
+/* 38098 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 38101 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 38113
+/* 38105 */ MCD_OPC_CheckPredicate, 0, 0, 10, // Skip to: 40669
+/* 38109 */ MCD_OPC_Decode, 148, 3, 90, // Opcode: FCVTAUv1i64
+/* 38113 */ MCD_OPC_FilterValue, 48, 248, 9, // Skip to: 40669
+/* 38117 */ MCD_OPC_CheckPredicate, 0, 244, 9, // Skip to: 40669
+/* 38121 */ MCD_OPC_Decode, 165, 4, 95, // Opcode: FMAXNMPv2i64p
+/* 38125 */ MCD_OPC_FilterValue, 54, 27, 0, // Skip to: 38156
+/* 38129 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 38132 */ MCD_OPC_FilterValue, 33, 8, 0, // Skip to: 38144
+/* 38136 */ MCD_OPC_CheckPredicate, 0, 225, 9, // Skip to: 40669
+/* 38140 */ MCD_OPC_Decode, 171, 16, 90, // Opcode: UCVTFv1i64
+/* 38144 */ MCD_OPC_FilterValue, 48, 217, 9, // Skip to: 40669
+/* 38148 */ MCD_OPC_CheckPredicate, 0, 213, 9, // Skip to: 40669
+/* 38152 */ MCD_OPC_Decode, 202, 2, 95, // Opcode: FADDPv2i64p
+/* 38156 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 38174
+/* 38160 */ MCD_OPC_CheckPredicate, 0, 201, 9, // Skip to: 40669
+/* 38164 */ MCD_OPC_CheckField, 21, 1, 1, 195, 9, // Skip to: 40669
+/* 38170 */ MCD_OPC_Decode, 223, 2, 89, // Opcode: FCMGE64
+/* 38174 */ MCD_OPC_FilterValue, 59, 14, 0, // Skip to: 38192
+/* 38178 */ MCD_OPC_CheckPredicate, 0, 183, 9, // Skip to: 40669
+/* 38182 */ MCD_OPC_CheckField, 21, 1, 1, 177, 9, // Skip to: 40669
+/* 38188 */ MCD_OPC_Decode, 189, 2, 89, // Opcode: FACGE64
+/* 38192 */ MCD_OPC_FilterValue, 62, 169, 9, // Skip to: 40669
+/* 38196 */ MCD_OPC_CheckPredicate, 0, 165, 9, // Skip to: 40669
+/* 38200 */ MCD_OPC_CheckField, 16, 6, 48, 159, 9, // Skip to: 40669
+/* 38206 */ MCD_OPC_Decode, 175, 4, 95, // Opcode: FMAXPv2i64p
+/* 38210 */ MCD_OPC_FilterValue, 10, 98, 1, // Skip to: 38568
+/* 38214 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 38217 */ MCD_OPC_FilterValue, 3, 15, 0, // Skip to: 38236
+/* 38221 */ MCD_OPC_CheckPredicate, 0, 140, 9, // Skip to: 40669
+/* 38225 */ MCD_OPC_CheckField, 21, 1, 1, 134, 9, // Skip to: 40669
+/* 38231 */ MCD_OPC_Decode, 139, 17, 130, 2, // Opcode: UQADDv1i32
+/* 38236 */ MCD_OPC_FilterValue, 10, 15, 0, // Skip to: 38255
+/* 38240 */ MCD_OPC_CheckPredicate, 0, 121, 9, // Skip to: 40669
+/* 38244 */ MCD_OPC_CheckField, 16, 6, 33, 115, 9, // Skip to: 40669
+/* 38250 */ MCD_OPC_Decode, 214, 12, 144, 1, // Opcode: SQXTUNv1i32
+/* 38255 */ MCD_OPC_FilterValue, 11, 15, 0, // Skip to: 38274
+/* 38259 */ MCD_OPC_CheckPredicate, 0, 102, 9, // Skip to: 40669
+/* 38263 */ MCD_OPC_CheckField, 21, 1, 1, 96, 9, // Skip to: 40669
+/* 38269 */ MCD_OPC_Decode, 201, 17, 130, 2, // Opcode: UQSUBv1i32
+/* 38274 */ MCD_OPC_FilterValue, 14, 15, 0, // Skip to: 38293
+/* 38278 */ MCD_OPC_CheckPredicate, 0, 83, 9, // Skip to: 40669
+/* 38282 */ MCD_OPC_CheckField, 16, 6, 32, 77, 9, // Skip to: 40669
+/* 38288 */ MCD_OPC_Decode, 149, 18, 158, 2, // Opcode: USQADDv1i32
+/* 38293 */ MCD_OPC_FilterValue, 18, 15, 0, // Skip to: 38312
+/* 38297 */ MCD_OPC_CheckPredicate, 0, 64, 9, // Skip to: 40669
+/* 38301 */ MCD_OPC_CheckField, 16, 6, 33, 58, 9, // Skip to: 40669
+/* 38307 */ MCD_OPC_Decode, 212, 17, 144, 1, // Opcode: UQXTNv1i32
+/* 38312 */ MCD_OPC_FilterValue, 19, 15, 0, // Skip to: 38331
+/* 38316 */ MCD_OPC_CheckPredicate, 0, 45, 9, // Skip to: 40669
+/* 38320 */ MCD_OPC_CheckField, 21, 1, 1, 39, 9, // Skip to: 40669
+/* 38326 */ MCD_OPC_Decode, 175, 17, 130, 2, // Opcode: UQSHLv1i32
+/* 38331 */ MCD_OPC_FilterValue, 23, 15, 0, // Skip to: 38350
+/* 38335 */ MCD_OPC_CheckPredicate, 0, 26, 9, // Skip to: 40669
+/* 38339 */ MCD_OPC_CheckField, 21, 1, 1, 20, 9, // Skip to: 40669
+/* 38345 */ MCD_OPC_Decode, 150, 17, 130, 2, // Opcode: UQRSHLv1i32
+/* 38350 */ MCD_OPC_FilterValue, 30, 15, 0, // Skip to: 38369
+/* 38354 */ MCD_OPC_CheckPredicate, 0, 7, 9, // Skip to: 40669
+/* 38358 */ MCD_OPC_CheckField, 16, 6, 32, 1, 9, // Skip to: 40669
+/* 38364 */ MCD_OPC_Decode, 219, 11, 253, 1, // Opcode: SQNEGv1i32
+/* 38369 */ MCD_OPC_FilterValue, 42, 15, 0, // Skip to: 38388
+/* 38373 */ MCD_OPC_CheckPredicate, 0, 244, 8, // Skip to: 40669
+/* 38377 */ MCD_OPC_CheckField, 16, 6, 33, 238, 8, // Skip to: 40669
+/* 38383 */ MCD_OPC_Decode, 213, 3, 253, 1, // Opcode: FCVTPUv1i32
+/* 38388 */ MCD_OPC_FilterValue, 45, 15, 0, // Skip to: 38407
+/* 38392 */ MCD_OPC_CheckPredicate, 0, 225, 8, // Skip to: 40669
+/* 38396 */ MCD_OPC_CheckField, 21, 1, 1, 219, 8, // Skip to: 40669
+/* 38402 */ MCD_OPC_Decode, 230, 11, 130, 2, // Opcode: SQRDMULHv1i32
+/* 38407 */ MCD_OPC_FilterValue, 46, 15, 0, // Skip to: 38426
+/* 38411 */ MCD_OPC_CheckPredicate, 0, 206, 8, // Skip to: 40669
+/* 38415 */ MCD_OPC_CheckField, 16, 6, 33, 200, 8, // Skip to: 40669
+/* 38421 */ MCD_OPC_Decode, 145, 4, 253, 1, // Opcode: FCVTZUv1i32
+/* 38426 */ MCD_OPC_FilterValue, 50, 29, 0, // Skip to: 38459
+/* 38430 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 38433 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 38446
+/* 38437 */ MCD_OPC_CheckPredicate, 0, 180, 8, // Skip to: 40669
+/* 38441 */ MCD_OPC_Decode, 224, 2, 253, 1, // Opcode: FCMGEv1i32rz
+/* 38446 */ MCD_OPC_FilterValue, 48, 171, 8, // Skip to: 40669
+/* 38450 */ MCD_OPC_CheckPredicate, 0, 167, 8, // Skip to: 40669
+/* 38454 */ MCD_OPC_Decode, 186, 4, 144, 1, // Opcode: FMINNMPv2i32p
+/* 38459 */ MCD_OPC_FilterValue, 53, 15, 0, // Skip to: 38478
+/* 38463 */ MCD_OPC_CheckPredicate, 0, 154, 8, // Skip to: 40669
+/* 38467 */ MCD_OPC_CheckField, 21, 1, 1, 148, 8, // Skip to: 40669
+/* 38473 */ MCD_OPC_Decode, 178, 2, 130, 2, // Opcode: FABD32
+/* 38478 */ MCD_OPC_FilterValue, 54, 29, 0, // Skip to: 38511
+/* 38482 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 38485 */ MCD_OPC_FilterValue, 32, 9, 0, // Skip to: 38498
+/* 38489 */ MCD_OPC_CheckPredicate, 0, 128, 8, // Skip to: 40669
+/* 38493 */ MCD_OPC_Decode, 242, 2, 253, 1, // Opcode: FCMLEv1i32rz
+/* 38498 */ MCD_OPC_FilterValue, 33, 119, 8, // Skip to: 40669
+/* 38502 */ MCD_OPC_CheckPredicate, 0, 115, 8, // Skip to: 40669
+/* 38506 */ MCD_OPC_Decode, 185, 5, 253, 1, // Opcode: FRSQRTEv1i32
+/* 38511 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 38530
+/* 38515 */ MCD_OPC_CheckPredicate, 0, 102, 8, // Skip to: 40669
+/* 38519 */ MCD_OPC_CheckField, 21, 1, 1, 96, 8, // Skip to: 40669
+/* 38525 */ MCD_OPC_Decode, 232, 2, 130, 2, // Opcode: FCMGT32
+/* 38530 */ MCD_OPC_FilterValue, 59, 15, 0, // Skip to: 38549
+/* 38534 */ MCD_OPC_CheckPredicate, 0, 83, 8, // Skip to: 40669
+/* 38538 */ MCD_OPC_CheckField, 21, 1, 1, 77, 8, // Skip to: 40669
+/* 38544 */ MCD_OPC_Decode, 193, 2, 130, 2, // Opcode: FACGT32
+/* 38549 */ MCD_OPC_FilterValue, 62, 68, 8, // Skip to: 40669
+/* 38553 */ MCD_OPC_CheckPredicate, 0, 64, 8, // Skip to: 40669
+/* 38557 */ MCD_OPC_CheckField, 16, 6, 48, 58, 8, // Skip to: 40669
+/* 38563 */ MCD_OPC_Decode, 196, 4, 144, 1, // Opcode: FMINPv2i32p
+/* 38568 */ MCD_OPC_FilterValue, 11, 182, 1, // Skip to: 39010
+/* 38572 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 38575 */ MCD_OPC_FilterValue, 3, 14, 0, // Skip to: 38593
+/* 38579 */ MCD_OPC_CheckPredicate, 0, 38, 8, // Skip to: 40669
+/* 38583 */ MCD_OPC_CheckField, 21, 1, 1, 32, 8, // Skip to: 40669
+/* 38589 */ MCD_OPC_Decode, 140, 17, 89, // Opcode: UQADDv1i64
+/* 38593 */ MCD_OPC_FilterValue, 11, 14, 0, // Skip to: 38611
+/* 38597 */ MCD_OPC_CheckPredicate, 0, 20, 8, // Skip to: 40669
+/* 38601 */ MCD_OPC_CheckField, 21, 1, 1, 14, 8, // Skip to: 40669
+/* 38607 */ MCD_OPC_Decode, 202, 17, 89, // Opcode: UQSUBv1i64
+/* 38611 */ MCD_OPC_FilterValue, 13, 14, 0, // Skip to: 38629
+/* 38615 */ MCD_OPC_CheckPredicate, 0, 2, 8, // Skip to: 40669
+/* 38619 */ MCD_OPC_CheckField, 21, 1, 1, 252, 7, // Skip to: 40669
+/* 38625 */ MCD_OPC_Decode, 207, 1, 89, // Opcode: CMHIv1i64
+/* 38629 */ MCD_OPC_FilterValue, 14, 14, 0, // Skip to: 38647
+/* 38633 */ MCD_OPC_CheckPredicate, 0, 240, 7, // Skip to: 40669
+/* 38637 */ MCD_OPC_CheckField, 16, 6, 32, 234, 7, // Skip to: 40669
+/* 38643 */ MCD_OPC_Decode, 150, 18, 99, // Opcode: USQADDv1i64
+/* 38647 */ MCD_OPC_FilterValue, 15, 14, 0, // Skip to: 38665
+/* 38651 */ MCD_OPC_CheckPredicate, 0, 222, 7, // Skip to: 40669
+/* 38655 */ MCD_OPC_CheckField, 21, 1, 1, 216, 7, // Skip to: 40669
+/* 38661 */ MCD_OPC_Decode, 215, 1, 89, // Opcode: CMHSv1i64
+/* 38665 */ MCD_OPC_FilterValue, 17, 14, 0, // Skip to: 38683
+/* 38669 */ MCD_OPC_CheckPredicate, 0, 204, 7, // Skip to: 40669
+/* 38673 */ MCD_OPC_CheckField, 21, 1, 1, 198, 7, // Skip to: 40669
+/* 38679 */ MCD_OPC_Decode, 132, 18, 89, // Opcode: USHLv1i64
+/* 38683 */ MCD_OPC_FilterValue, 19, 14, 0, // Skip to: 38701
+/* 38687 */ MCD_OPC_CheckPredicate, 0, 186, 7, // Skip to: 40669
+/* 38691 */ MCD_OPC_CheckField, 21, 1, 1, 180, 7, // Skip to: 40669
+/* 38697 */ MCD_OPC_Decode, 176, 17, 89, // Opcode: UQSHLv1i64
+/* 38701 */ MCD_OPC_FilterValue, 21, 14, 0, // Skip to: 38719
+/* 38705 */ MCD_OPC_CheckPredicate, 0, 168, 7, // Skip to: 40669
+/* 38709 */ MCD_OPC_CheckField, 21, 1, 1, 162, 7, // Skip to: 40669
+/* 38715 */ MCD_OPC_Decode, 228, 17, 89, // Opcode: URSHLv1i64
+/* 38719 */ MCD_OPC_FilterValue, 23, 14, 0, // Skip to: 38737
+/* 38723 */ MCD_OPC_CheckPredicate, 0, 150, 7, // Skip to: 40669
+/* 38727 */ MCD_OPC_CheckField, 21, 1, 1, 144, 7, // Skip to: 40669
+/* 38733 */ MCD_OPC_Decode, 151, 17, 89, // Opcode: UQRSHLv1i64
+/* 38737 */ MCD_OPC_FilterValue, 30, 14, 0, // Skip to: 38755
+/* 38741 */ MCD_OPC_CheckPredicate, 0, 132, 7, // Skip to: 40669
+/* 38745 */ MCD_OPC_CheckField, 16, 6, 32, 126, 7, // Skip to: 40669
+/* 38751 */ MCD_OPC_Decode, 220, 11, 90, // Opcode: SQNEGv1i64
+/* 38755 */ MCD_OPC_FilterValue, 33, 14, 0, // Skip to: 38773
+/* 38759 */ MCD_OPC_CheckPredicate, 0, 114, 7, // Skip to: 40669
+/* 38763 */ MCD_OPC_CheckField, 21, 1, 1, 108, 7, // Skip to: 40669
+/* 38769 */ MCD_OPC_Decode, 174, 15, 89, // Opcode: SUBv1i64
+/* 38773 */ MCD_OPC_FilterValue, 34, 14, 0, // Skip to: 38791
+/* 38777 */ MCD_OPC_CheckPredicate, 0, 96, 7, // Skip to: 40669
+/* 38781 */ MCD_OPC_CheckField, 16, 6, 32, 90, 7, // Skip to: 40669
+/* 38787 */ MCD_OPC_Decode, 177, 1, 90, // Opcode: CMGEv1i64rz
+/* 38791 */ MCD_OPC_FilterValue, 35, 14, 0, // Skip to: 38809
+/* 38795 */ MCD_OPC_CheckPredicate, 0, 78, 7, // Skip to: 40669
+/* 38799 */ MCD_OPC_CheckField, 21, 1, 1, 72, 7, // Skip to: 40669
+/* 38805 */ MCD_OPC_Decode, 160, 1, 89, // Opcode: CMEQv1i64
+/* 38809 */ MCD_OPC_FilterValue, 38, 14, 0, // Skip to: 38827
+/* 38813 */ MCD_OPC_CheckPredicate, 0, 60, 7, // Skip to: 40669
+/* 38817 */ MCD_OPC_CheckField, 16, 6, 32, 54, 7, // Skip to: 40669
+/* 38823 */ MCD_OPC_Decode, 223, 1, 90, // Opcode: CMLEv1i64rz
+/* 38827 */ MCD_OPC_FilterValue, 42, 14, 0, // Skip to: 38845
+/* 38831 */ MCD_OPC_CheckPredicate, 0, 42, 7, // Skip to: 40669
+/* 38835 */ MCD_OPC_CheckField, 16, 6, 33, 36, 7, // Skip to: 40669
+/* 38841 */ MCD_OPC_Decode, 214, 3, 90, // Opcode: FCVTPUv1i64
+/* 38845 */ MCD_OPC_FilterValue, 46, 27, 0, // Skip to: 38876
+/* 38849 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 38852 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 38864
+/* 38856 */ MCD_OPC_CheckPredicate, 0, 17, 7, // Skip to: 40669
+/* 38860 */ MCD_OPC_Decode, 246, 8, 90, // Opcode: NEGv1i64
+/* 38864 */ MCD_OPC_FilterValue, 33, 9, 7, // Skip to: 40669
+/* 38868 */ MCD_OPC_CheckPredicate, 0, 5, 7, // Skip to: 40669
+/* 38872 */ MCD_OPC_Decode, 146, 4, 90, // Opcode: FCVTZUv1i64
+/* 38876 */ MCD_OPC_FilterValue, 50, 27, 0, // Skip to: 38907
+/* 38880 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 38883 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 38895
+/* 38887 */ MCD_OPC_CheckPredicate, 0, 242, 6, // Skip to: 40669
+/* 38891 */ MCD_OPC_Decode, 225, 2, 90, // Opcode: FCMGEv1i64rz
+/* 38895 */ MCD_OPC_FilterValue, 48, 234, 6, // Skip to: 40669
+/* 38899 */ MCD_OPC_CheckPredicate, 0, 230, 6, // Skip to: 40669
+/* 38903 */ MCD_OPC_Decode, 187, 4, 95, // Opcode: FMINNMPv2i64p
+/* 38907 */ MCD_OPC_FilterValue, 53, 14, 0, // Skip to: 38925
+/* 38911 */ MCD_OPC_CheckPredicate, 0, 218, 6, // Skip to: 40669
+/* 38915 */ MCD_OPC_CheckField, 21, 1, 1, 212, 6, // Skip to: 40669
+/* 38921 */ MCD_OPC_Decode, 179, 2, 89, // Opcode: FABD64
+/* 38925 */ MCD_OPC_FilterValue, 54, 27, 0, // Skip to: 38956
+/* 38929 */ MCD_OPC_ExtractField, 16, 6, // Inst{21-16} ...
+/* 38932 */ MCD_OPC_FilterValue, 32, 8, 0, // Skip to: 38944
+/* 38936 */ MCD_OPC_CheckPredicate, 0, 193, 6, // Skip to: 40669
+/* 38940 */ MCD_OPC_Decode, 243, 2, 90, // Opcode: FCMLEv1i64rz
+/* 38944 */ MCD_OPC_FilterValue, 33, 185, 6, // Skip to: 40669
+/* 38948 */ MCD_OPC_CheckPredicate, 0, 181, 6, // Skip to: 40669
+/* 38952 */ MCD_OPC_Decode, 186, 5, 90, // Opcode: FRSQRTEv1i64
+/* 38956 */ MCD_OPC_FilterValue, 57, 14, 0, // Skip to: 38974
+/* 38960 */ MCD_OPC_CheckPredicate, 0, 169, 6, // Skip to: 40669
+/* 38964 */ MCD_OPC_CheckField, 21, 1, 1, 163, 6, // Skip to: 40669
+/* 38970 */ MCD_OPC_Decode, 233, 2, 89, // Opcode: FCMGT64
+/* 38974 */ MCD_OPC_FilterValue, 59, 14, 0, // Skip to: 38992
+/* 38978 */ MCD_OPC_CheckPredicate, 0, 151, 6, // Skip to: 40669
+/* 38982 */ MCD_OPC_CheckField, 21, 1, 1, 145, 6, // Skip to: 40669
+/* 38988 */ MCD_OPC_Decode, 194, 2, 89, // Opcode: FACGT64
+/* 38992 */ MCD_OPC_FilterValue, 62, 137, 6, // Skip to: 40669
+/* 38996 */ MCD_OPC_CheckPredicate, 0, 133, 6, // Skip to: 40669
+/* 39000 */ MCD_OPC_CheckField, 16, 6, 48, 127, 6, // Skip to: 40669
+/* 39006 */ MCD_OPC_Decode, 197, 4, 95, // Opcode: FMINPv2i64p
+/* 39010 */ MCD_OPC_FilterValue, 12, 139, 1, // Skip to: 39409
+/* 39014 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 39017 */ MCD_OPC_FilterValue, 25, 55, 0, // Skip to: 39076
+/* 39021 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 39024 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39063
+/* 39028 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 39031 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39050
+/* 39035 */ MCD_OPC_CheckPredicate, 0, 94, 6, // Skip to: 40669
+/* 39039 */ MCD_OPC_CheckField, 19, 1, 1, 88, 6, // Skip to: 40669
+/* 39045 */ MCD_OPC_Decode, 141, 12, 173, 2, // Opcode: SQSHLUb
+/* 39050 */ MCD_OPC_FilterValue, 1, 79, 6, // Skip to: 40669
+/* 39054 */ MCD_OPC_CheckPredicate, 0, 75, 6, // Skip to: 40669
+/* 39058 */ MCD_OPC_Decode, 143, 12, 174, 2, // Opcode: SQSHLUh
+/* 39063 */ MCD_OPC_FilterValue, 1, 66, 6, // Skip to: 40669
+/* 39067 */ MCD_OPC_CheckPredicate, 0, 62, 6, // Skip to: 40669
+/* 39071 */ MCD_OPC_Decode, 144, 12, 175, 2, // Opcode: SQSHLUs
+/* 39076 */ MCD_OPC_FilterValue, 29, 55, 0, // Skip to: 39135
+/* 39080 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 39083 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39122
+/* 39087 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 39090 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39109
+/* 39094 */ MCD_OPC_CheckPredicate, 0, 35, 6, // Skip to: 40669
+/* 39098 */ MCD_OPC_CheckField, 19, 1, 1, 29, 6, // Skip to: 40669
+/* 39104 */ MCD_OPC_Decode, 168, 17, 173, 2, // Opcode: UQSHLb
+/* 39109 */ MCD_OPC_FilterValue, 1, 20, 6, // Skip to: 40669
+/* 39113 */ MCD_OPC_CheckPredicate, 0, 16, 6, // Skip to: 40669
+/* 39117 */ MCD_OPC_Decode, 170, 17, 174, 2, // Opcode: UQSHLh
+/* 39122 */ MCD_OPC_FilterValue, 1, 7, 6, // Skip to: 40669
+/* 39126 */ MCD_OPC_CheckPredicate, 0, 3, 6, // Skip to: 40669
+/* 39130 */ MCD_OPC_Decode, 171, 17, 175, 2, // Opcode: UQSHLs
+/* 39135 */ MCD_OPC_FilterValue, 33, 55, 0, // Skip to: 39194
+/* 39139 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 39142 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39181
+/* 39146 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 39149 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39168
+/* 39153 */ MCD_OPC_CheckPredicate, 0, 232, 5, // Skip to: 40669
+/* 39157 */ MCD_OPC_CheckField, 19, 1, 1, 226, 5, // Skip to: 40669
+/* 39163 */ MCD_OPC_Decode, 183, 12, 176, 2, // Opcode: SQSHRUNb
+/* 39168 */ MCD_OPC_FilterValue, 1, 217, 5, // Skip to: 40669
+/* 39172 */ MCD_OPC_CheckPredicate, 0, 213, 5, // Skip to: 40669
+/* 39176 */ MCD_OPC_Decode, 184, 12, 177, 2, // Opcode: SQSHRUNh
+/* 39181 */ MCD_OPC_FilterValue, 1, 204, 5, // Skip to: 40669
+/* 39185 */ MCD_OPC_CheckPredicate, 0, 200, 5, // Skip to: 40669
+/* 39189 */ MCD_OPC_Decode, 185, 12, 178, 2, // Opcode: SQSHRUNs
+/* 39194 */ MCD_OPC_FilterValue, 35, 55, 0, // Skip to: 39253
+/* 39198 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 39201 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39240
+/* 39205 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 39208 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39227
+/* 39212 */ MCD_OPC_CheckPredicate, 0, 173, 5, // Skip to: 40669
+/* 39216 */ MCD_OPC_CheckField, 19, 1, 1, 167, 5, // Skip to: 40669
+/* 39222 */ MCD_OPC_Decode, 132, 12, 176, 2, // Opcode: SQRSHRUNb
+/* 39227 */ MCD_OPC_FilterValue, 1, 158, 5, // Skip to: 40669
+/* 39231 */ MCD_OPC_CheckPredicate, 0, 154, 5, // Skip to: 40669
+/* 39235 */ MCD_OPC_Decode, 133, 12, 177, 2, // Opcode: SQRSHRUNh
+/* 39240 */ MCD_OPC_FilterValue, 1, 145, 5, // Skip to: 40669
+/* 39244 */ MCD_OPC_CheckPredicate, 0, 141, 5, // Skip to: 40669
+/* 39248 */ MCD_OPC_Decode, 134, 12, 178, 2, // Opcode: SQRSHRUNs
+/* 39253 */ MCD_OPC_FilterValue, 37, 55, 0, // Skip to: 39312
+/* 39257 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 39260 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39299
+/* 39264 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 39267 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39286
+/* 39271 */ MCD_OPC_CheckPredicate, 0, 114, 5, // Skip to: 40669
+/* 39275 */ MCD_OPC_CheckField, 19, 1, 1, 108, 5, // Skip to: 40669
+/* 39281 */ MCD_OPC_Decode, 190, 17, 176, 2, // Opcode: UQSHRNb
+/* 39286 */ MCD_OPC_FilterValue, 1, 99, 5, // Skip to: 40669
+/* 39290 */ MCD_OPC_CheckPredicate, 0, 95, 5, // Skip to: 40669
+/* 39294 */ MCD_OPC_Decode, 191, 17, 177, 2, // Opcode: UQSHRNh
+/* 39299 */ MCD_OPC_FilterValue, 1, 86, 5, // Skip to: 40669
+/* 39303 */ MCD_OPC_CheckPredicate, 0, 82, 5, // Skip to: 40669
+/* 39307 */ MCD_OPC_Decode, 192, 17, 178, 2, // Opcode: UQSHRNs
+/* 39312 */ MCD_OPC_FilterValue, 39, 55, 0, // Skip to: 39371
+/* 39316 */ MCD_OPC_ExtractField, 21, 1, // Inst{21} ...
+/* 39319 */ MCD_OPC_FilterValue, 0, 35, 0, // Skip to: 39358
+/* 39323 */ MCD_OPC_ExtractField, 20, 1, // Inst{20} ...
+/* 39326 */ MCD_OPC_FilterValue, 0, 15, 0, // Skip to: 39345
+/* 39330 */ MCD_OPC_CheckPredicate, 0, 55, 5, // Skip to: 40669
+/* 39334 */ MCD_OPC_CheckField, 19, 1, 1, 49, 5, // Skip to: 40669
+/* 39340 */ MCD_OPC_Decode, 159, 17, 176, 2, // Opcode: UQRSHRNb
+/* 39345 */ MCD_OPC_FilterValue, 1, 40, 5, // Skip to: 40669
+/* 39349 */ MCD_OPC_CheckPredicate, 0, 36, 5, // Skip to: 40669
+/* 39353 */ MCD_OPC_Decode, 160, 17, 177, 2, // Opcode: UQRSHRNh
+/* 39358 */ MCD_OPC_FilterValue, 1, 27, 5, // Skip to: 40669
+/* 39362 */ MCD_OPC_CheckPredicate, 0, 23, 5, // Skip to: 40669
+/* 39366 */ MCD_OPC_Decode, 161, 17, 178, 2, // Opcode: UQRSHRNs
+/* 39371 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 39390
+/* 39375 */ MCD_OPC_CheckPredicate, 0, 10, 5, // Skip to: 40669
+/* 39379 */ MCD_OPC_CheckField, 21, 1, 1, 4, 5, // Skip to: 40669
+/* 39385 */ MCD_OPC_Decode, 169, 16, 184, 2, // Opcode: UCVTFs
+/* 39390 */ MCD_OPC_FilterValue, 63, 251, 4, // Skip to: 40669
+/* 39394 */ MCD_OPC_CheckPredicate, 0, 247, 4, // Skip to: 40669
+/* 39398 */ MCD_OPC_CheckField, 21, 1, 1, 241, 4, // Skip to: 40669
+/* 39404 */ MCD_OPC_Decode, 144, 4, 184, 2, // Opcode: FCVTZUs
+/* 39409 */ MCD_OPC_FilterValue, 13, 133, 0, // Skip to: 39546
+/* 39413 */ MCD_OPC_ExtractField, 10, 6, // Inst{15-10} ...
+/* 39416 */ MCD_OPC_FilterValue, 1, 9, 0, // Skip to: 39429
+/* 39420 */ MCD_OPC_CheckPredicate, 0, 221, 4, // Skip to: 40669
+/* 39424 */ MCD_OPC_Decode, 139, 18, 166, 2, // Opcode: USHRd
+/* 39429 */ MCD_OPC_FilterValue, 5, 9, 0, // Skip to: 39442
+/* 39433 */ MCD_OPC_CheckPredicate, 0, 208, 4, // Skip to: 40669
+/* 39437 */ MCD_OPC_Decode, 158, 18, 167, 2, // Opcode: USRAd
+/* 39442 */ MCD_OPC_FilterValue, 9, 9, 0, // Skip to: 39455
+/* 39446 */ MCD_OPC_CheckPredicate, 0, 195, 4, // Skip to: 40669
+/* 39450 */ MCD_OPC_Decode, 235, 17, 166, 2, // Opcode: URSHRd
+/* 39455 */ MCD_OPC_FilterValue, 13, 9, 0, // Skip to: 39468
+/* 39459 */ MCD_OPC_CheckPredicate, 0, 182, 4, // Skip to: 40669
+/* 39463 */ MCD_OPC_Decode, 245, 17, 167, 2, // Opcode: URSRAd
+/* 39468 */ MCD_OPC_FilterValue, 17, 9, 0, // Skip to: 39481
+/* 39472 */ MCD_OPC_CheckPredicate, 0, 169, 4, // Skip to: 40669
+/* 39476 */ MCD_OPC_Decode, 227, 12, 167, 2, // Opcode: SRId
+/* 39481 */ MCD_OPC_FilterValue, 21, 9, 0, // Skip to: 39494
+/* 39485 */ MCD_OPC_CheckPredicate, 0, 156, 4, // Skip to: 40669
+/* 39489 */ MCD_OPC_Decode, 194, 10, 187, 2, // Opcode: SLId
+/* 39494 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 39507
+/* 39498 */ MCD_OPC_CheckPredicate, 0, 143, 4, // Skip to: 40669
+/* 39502 */ MCD_OPC_Decode, 142, 12, 172, 2, // Opcode: SQSHLUd
+/* 39507 */ MCD_OPC_FilterValue, 29, 9, 0, // Skip to: 39520
+/* 39511 */ MCD_OPC_CheckPredicate, 0, 130, 4, // Skip to: 40669
+/* 39515 */ MCD_OPC_Decode, 169, 17, 172, 2, // Opcode: UQSHLd
+/* 39520 */ MCD_OPC_FilterValue, 57, 9, 0, // Skip to: 39533
+/* 39524 */ MCD_OPC_CheckPredicate, 0, 117, 4, // Skip to: 40669
+/* 39528 */ MCD_OPC_Decode, 168, 16, 166, 2, // Opcode: UCVTFd
+/* 39533 */ MCD_OPC_FilterValue, 63, 108, 4, // Skip to: 40669
+/* 39537 */ MCD_OPC_CheckPredicate, 0, 104, 4, // Skip to: 40669
+/* 39541 */ MCD_OPC_Decode, 143, 4, 166, 2, // Opcode: FCVTZUd
+/* 39546 */ MCD_OPC_FilterValue, 14, 21, 0, // Skip to: 39571
+/* 39550 */ MCD_OPC_CheckPredicate, 0, 91, 4, // Skip to: 40669
+/* 39554 */ MCD_OPC_CheckField, 12, 4, 9, 85, 4, // Skip to: 40669
+/* 39560 */ MCD_OPC_CheckField, 10, 1, 0, 79, 4, // Skip to: 40669
+/* 39566 */ MCD_OPC_Decode, 239, 4, 179, 2, // Opcode: FMULXv1i32_indexed
+/* 39571 */ MCD_OPC_FilterValue, 15, 70, 4, // Skip to: 40669
+/* 39575 */ MCD_OPC_CheckPredicate, 0, 66, 4, // Skip to: 40669
+/* 39579 */ MCD_OPC_CheckField, 21, 1, 0, 60, 4, // Skip to: 40669
+/* 39585 */ MCD_OPC_CheckField, 12, 4, 9, 54, 4, // Skip to: 40669
+/* 39591 */ MCD_OPC_CheckField, 10, 1, 0, 48, 4, // Skip to: 40669
+/* 39597 */ MCD_OPC_Decode, 240, 4, 180, 2, // Opcode: FMULXv1i64_indexed
+/* 39602 */ MCD_OPC_FilterValue, 4, 145, 2, // Skip to: 40263
+/* 39606 */ MCD_OPC_ExtractField, 24, 2, // Inst{25-24} ...
+/* 39609 */ MCD_OPC_FilterValue, 0, 5, 0, // Skip to: 39618
+/* 39613 */ MCD_OPC_Decode, 222, 7, 188, 2, // Opcode: LDRQl
+/* 39618 */ MCD_OPC_FilterValue, 2, 23, 4, // Skip to: 40669
+/* 39622 */ MCD_OPC_ExtractField, 16, 8, // Inst{23-16} ...
+/* 39625 */ MCD_OPC_FilterValue, 2, 9, 0, // Skip to: 39638
+/* 39629 */ MCD_OPC_CheckPredicate, 3, 12, 4, // Skip to: 40669
+/* 39633 */ MCD_OPC_Decode, 133, 10, 189, 2, // Opcode: SCVTFSXSri
+/* 39638 */ MCD_OPC_FilterValue, 3, 9, 0, // Skip to: 39651
+/* 39642 */ MCD_OPC_CheckPredicate, 3, 255, 3, // Skip to: 40669
+/* 39646 */ MCD_OPC_Decode, 163, 16, 189, 2, // Opcode: UCVTFSXSri
+/* 39651 */ MCD_OPC_FilterValue, 24, 9, 0, // Skip to: 39664
+/* 39655 */ MCD_OPC_CheckPredicate, 3, 242, 3, // Skip to: 40669
+/* 39659 */ MCD_OPC_Decode, 226, 3, 190, 2, // Opcode: FCVTZSSXSri
+/* 39664 */ MCD_OPC_FilterValue, 25, 9, 0, // Skip to: 39677
+/* 39668 */ MCD_OPC_CheckPredicate, 3, 229, 3, // Skip to: 40669
+/* 39672 */ MCD_OPC_Decode, 255, 3, 190, 2, // Opcode: FCVTZUSXSri
+/* 39677 */ MCD_OPC_FilterValue, 32, 15, 0, // Skip to: 39696
+/* 39681 */ MCD_OPC_CheckPredicate, 3, 216, 3, // Skip to: 40669
+/* 39685 */ MCD_OPC_CheckField, 10, 6, 0, 210, 3, // Skip to: 40669
+/* 39691 */ MCD_OPC_Decode, 181, 3, 191, 2, // Opcode: FCVTNSUXSr
+/* 39696 */ MCD_OPC_FilterValue, 33, 15, 0, // Skip to: 39715
+/* 39700 */ MCD_OPC_CheckPredicate, 3, 197, 3, // Skip to: 40669
+/* 39704 */ MCD_OPC_CheckField, 10, 6, 0, 191, 3, // Skip to: 40669
+/* 39710 */ MCD_OPC_Decode, 190, 3, 191, 2, // Opcode: FCVTNUUXSr
+/* 39715 */ MCD_OPC_FilterValue, 34, 15, 0, // Skip to: 39734
+/* 39719 */ MCD_OPC_CheckPredicate, 3, 178, 3, // Skip to: 40669
+/* 39723 */ MCD_OPC_CheckField, 10, 6, 0, 172, 3, // Skip to: 40669
+/* 39729 */ MCD_OPC_Decode, 137, 10, 192, 2, // Opcode: SCVTFUXSri
+/* 39734 */ MCD_OPC_FilterValue, 35, 15, 0, // Skip to: 39753
+/* 39738 */ MCD_OPC_CheckPredicate, 3, 159, 3, // Skip to: 40669
+/* 39742 */ MCD_OPC_CheckField, 10, 6, 0, 153, 3, // Skip to: 40669
+/* 39748 */ MCD_OPC_Decode, 167, 16, 192, 2, // Opcode: UCVTFUXSri
+/* 39753 */ MCD_OPC_FilterValue, 36, 15, 0, // Skip to: 39772
+/* 39757 */ MCD_OPC_CheckPredicate, 3, 140, 3, // Skip to: 40669
+/* 39761 */ MCD_OPC_CheckField, 10, 6, 0, 134, 3, // Skip to: 40669
+/* 39767 */ MCD_OPC_Decode, 137, 3, 191, 2, // Opcode: FCVTASUXSr
+/* 39772 */ MCD_OPC_FilterValue, 37, 15, 0, // Skip to: 39791
+/* 39776 */ MCD_OPC_CheckPredicate, 3, 121, 3, // Skip to: 40669
+/* 39780 */ MCD_OPC_CheckField, 10, 6, 0, 115, 3, // Skip to: 40669
+/* 39786 */ MCD_OPC_Decode, 146, 3, 191, 2, // Opcode: FCVTAUUXSr
+/* 39791 */ MCD_OPC_FilterValue, 40, 15, 0, // Skip to: 39810
+/* 39795 */ MCD_OPC_CheckPredicate, 3, 102, 3, // Skip to: 40669
+/* 39799 */ MCD_OPC_CheckField, 10, 6, 0, 96, 3, // Skip to: 40669
+/* 39805 */ MCD_OPC_Decode, 203, 3, 191, 2, // Opcode: FCVTPSUXSr
+/* 39810 */ MCD_OPC_FilterValue, 41, 15, 0, // Skip to: 39829
+/* 39814 */ MCD_OPC_CheckPredicate, 3, 83, 3, // Skip to: 40669
+/* 39818 */ MCD_OPC_CheckField, 10, 6, 0, 77, 3, // Skip to: 40669
+/* 39824 */ MCD_OPC_Decode, 212, 3, 191, 2, // Opcode: FCVTPUUXSr
+/* 39829 */ MCD_OPC_FilterValue, 48, 15, 0, // Skip to: 39848
+/* 39833 */ MCD_OPC_CheckPredicate, 3, 64, 3, // Skip to: 40669
+/* 39837 */ MCD_OPC_CheckField, 10, 6, 0, 58, 3, // Skip to: 40669
+/* 39843 */ MCD_OPC_Decode, 163, 3, 191, 2, // Opcode: FCVTMSUXSr
+/* 39848 */ MCD_OPC_FilterValue, 49, 15, 0, // Skip to: 39867
+/* 39852 */ MCD_OPC_CheckPredicate, 3, 45, 3, // Skip to: 40669
+/* 39856 */ MCD_OPC_CheckField, 10, 6, 0, 39, 3, // Skip to: 40669
+/* 39862 */ MCD_OPC_Decode, 172, 3, 191, 2, // Opcode: FCVTMUUXSr
+/* 39867 */ MCD_OPC_FilterValue, 56, 15, 0, // Skip to: 39886
+/* 39871 */ MCD_OPC_CheckPredicate, 3, 26, 3, // Skip to: 40669
+/* 39875 */ MCD_OPC_CheckField, 10, 6, 0, 20, 3, // Skip to: 40669
+/* 39881 */ MCD_OPC_Decode, 230, 3, 191, 2, // Opcode: FCVTZSUXSr
+/* 39886 */ MCD_OPC_FilterValue, 57, 15, 0, // Skip to: 39905
+/* 39890 */ MCD_OPC_CheckPredicate, 3, 7, 3, // Skip to: 40669
+/* 39894 */ MCD_OPC_CheckField, 10, 6, 0, 1, 3, // Skip to: 40669
+/* 39900 */ MCD_OPC_Decode, 131, 4, 191, 2, // Opcode: FCVTZUUXSr
+/* 39905 */ MCD_OPC_FilterValue, 66, 9, 0, // Skip to: 39918
+/* 39909 */ MCD_OPC_CheckPredicate, 3, 244, 2, // Skip to: 40669
+/* 39913 */ MCD_OPC_Decode, 132, 10, 193, 2, // Opcode: SCVTFSXDri
+/* 39918 */ MCD_OPC_FilterValue, 67, 9, 0, // Skip to: 39931
+/* 39922 */ MCD_OPC_CheckPredicate, 3, 231, 2, // Skip to: 40669
+/* 39926 */ MCD_OPC_Decode, 162, 16, 193, 2, // Opcode: UCVTFSXDri
+/* 39931 */ MCD_OPC_FilterValue, 88, 9, 0, // Skip to: 39944
+/* 39935 */ MCD_OPC_CheckPredicate, 3, 218, 2, // Skip to: 40669
+/* 39939 */ MCD_OPC_Decode, 225, 3, 194, 2, // Opcode: FCVTZSSXDri
+/* 39944 */ MCD_OPC_FilterValue, 89, 9, 0, // Skip to: 39957
+/* 39948 */ MCD_OPC_CheckPredicate, 3, 205, 2, // Skip to: 40669
+/* 39952 */ MCD_OPC_Decode, 254, 3, 194, 2, // Opcode: FCVTZUSXDri
+/* 39957 */ MCD_OPC_FilterValue, 96, 15, 0, // Skip to: 39976
+/* 39961 */ MCD_OPC_CheckPredicate, 3, 192, 2, // Skip to: 40669
+/* 39965 */ MCD_OPC_CheckField, 10, 6, 0, 186, 2, // Skip to: 40669
+/* 39971 */ MCD_OPC_Decode, 180, 3, 195, 2, // Opcode: FCVTNSUXDr
+/* 39976 */ MCD_OPC_FilterValue, 97, 15, 0, // Skip to: 39995
+/* 39980 */ MCD_OPC_CheckPredicate, 3, 173, 2, // Skip to: 40669
+/* 39984 */ MCD_OPC_CheckField, 10, 6, 0, 167, 2, // Skip to: 40669
+/* 39990 */ MCD_OPC_Decode, 189, 3, 195, 2, // Opcode: FCVTNUUXDr
+/* 39995 */ MCD_OPC_FilterValue, 98, 15, 0, // Skip to: 40014
+/* 39999 */ MCD_OPC_CheckPredicate, 3, 154, 2, // Skip to: 40669
+/* 40003 */ MCD_OPC_CheckField, 10, 6, 0, 148, 2, // Skip to: 40669
+/* 40009 */ MCD_OPC_Decode, 136, 10, 196, 2, // Opcode: SCVTFUXDri
+/* 40014 */ MCD_OPC_FilterValue, 99, 15, 0, // Skip to: 40033
+/* 40018 */ MCD_OPC_CheckPredicate, 3, 135, 2, // Skip to: 40669
+/* 40022 */ MCD_OPC_CheckField, 10, 6, 0, 129, 2, // Skip to: 40669
+/* 40028 */ MCD_OPC_Decode, 166, 16, 196, 2, // Opcode: UCVTFUXDri
+/* 40033 */ MCD_OPC_FilterValue, 100, 15, 0, // Skip to: 40052
+/* 40037 */ MCD_OPC_CheckPredicate, 3, 116, 2, // Skip to: 40669
+/* 40041 */ MCD_OPC_CheckField, 10, 6, 0, 110, 2, // Skip to: 40669
+/* 40047 */ MCD_OPC_Decode, 136, 3, 195, 2, // Opcode: FCVTASUXDr
+/* 40052 */ MCD_OPC_FilterValue, 101, 15, 0, // Skip to: 40071
+/* 40056 */ MCD_OPC_CheckPredicate, 3, 97, 2, // Skip to: 40669
+/* 40060 */ MCD_OPC_CheckField, 10, 6, 0, 91, 2, // Skip to: 40669
+/* 40066 */ MCD_OPC_Decode, 145, 3, 195, 2, // Opcode: FCVTAUUXDr
+/* 40071 */ MCD_OPC_FilterValue, 102, 15, 0, // Skip to: 40090
+/* 40075 */ MCD_OPC_CheckPredicate, 3, 78, 2, // Skip to: 40669
+/* 40079 */ MCD_OPC_CheckField, 10, 6, 0, 72, 2, // Skip to: 40669
+/* 40085 */ MCD_OPC_Decode, 221, 4, 195, 2, // Opcode: FMOVDXr
+/* 40090 */ MCD_OPC_FilterValue, 103, 15, 0, // Skip to: 40109
+/* 40094 */ MCD_OPC_CheckPredicate, 3, 59, 2, // Skip to: 40669
+/* 40098 */ MCD_OPC_CheckField, 10, 6, 0, 53, 2, // Skip to: 40669
+/* 40104 */ MCD_OPC_Decode, 229, 4, 196, 2, // Opcode: FMOVXDr
+/* 40109 */ MCD_OPC_FilterValue, 104, 15, 0, // Skip to: 40128
+/* 40113 */ MCD_OPC_CheckPredicate, 3, 40, 2, // Skip to: 40669
+/* 40117 */ MCD_OPC_CheckField, 10, 6, 0, 34, 2, // Skip to: 40669
+/* 40123 */ MCD_OPC_Decode, 202, 3, 195, 2, // Opcode: FCVTPSUXDr
+/* 40128 */ MCD_OPC_FilterValue, 105, 15, 0, // Skip to: 40147
+/* 40132 */ MCD_OPC_CheckPredicate, 3, 21, 2, // Skip to: 40669
+/* 40136 */ MCD_OPC_CheckField, 10, 6, 0, 15, 2, // Skip to: 40669
+/* 40142 */ MCD_OPC_Decode, 211, 3, 195, 2, // Opcode: FCVTPUUXDr
+/* 40147 */ MCD_OPC_FilterValue, 112, 15, 0, // Skip to: 40166
+/* 40151 */ MCD_OPC_CheckPredicate, 3, 2, 2, // Skip to: 40669
+/* 40155 */ MCD_OPC_CheckField, 10, 6, 0, 252, 1, // Skip to: 40669
+/* 40161 */ MCD_OPC_Decode, 162, 3, 195, 2, // Opcode: FCVTMSUXDr
+/* 40166 */ MCD_OPC_FilterValue, 113, 15, 0, // Skip to: 40185
+/* 40170 */ MCD_OPC_CheckPredicate, 3, 239, 1, // Skip to: 40669
+/* 40174 */ MCD_OPC_CheckField, 10, 6, 0, 233, 1, // Skip to: 40669
+/* 40180 */ MCD_OPC_Decode, 171, 3, 195, 2, // Opcode: FCVTMUUXDr
+/* 40185 */ MCD_OPC_FilterValue, 120, 15, 0, // Skip to: 40204
+/* 40189 */ MCD_OPC_CheckPredicate, 3, 220, 1, // Skip to: 40669
+/* 40193 */ MCD_OPC_CheckField, 10, 6, 0, 214, 1, // Skip to: 40669
+/* 40199 */ MCD_OPC_Decode, 229, 3, 195, 2, // Opcode: FCVTZSUXDr
+/* 40204 */ MCD_OPC_FilterValue, 121, 15, 0, // Skip to: 40223
+/* 40208 */ MCD_OPC_CheckPredicate, 3, 201, 1, // Skip to: 40669
+/* 40212 */ MCD_OPC_CheckField, 10, 6, 0, 195, 1, // Skip to: 40669
+/* 40218 */ MCD_OPC_Decode, 130, 4, 195, 2, // Opcode: FCVTZUUXDr
+/* 40223 */ MCD_OPC_FilterValue, 174, 1, 15, 0, // Skip to: 40243
+/* 40228 */ MCD_OPC_CheckPredicate, 3, 181, 1, // Skip to: 40669
+/* 40232 */ MCD_OPC_CheckField, 10, 6, 0, 175, 1, // Skip to: 40669
+/* 40238 */ MCD_OPC_Decode, 220, 4, 197, 2, // Opcode: FMOVDXHighr
+/* 40243 */ MCD_OPC_FilterValue, 175, 1, 165, 1, // Skip to: 40669
+/* 40248 */ MCD_OPC_CheckPredicate, 3, 161, 1, // Skip to: 40669
+/* 40252 */ MCD_OPC_CheckField, 10, 6, 0, 155, 1, // Skip to: 40669
+/* 40258 */ MCD_OPC_Decode, 228, 4, 197, 2, // Opcode: FMOVXDHighr
+/* 40263 */ MCD_OPC_FilterValue, 5, 199, 0, // Skip to: 40466
+/* 40267 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
+/* 40270 */ MCD_OPC_FilterValue, 0, 85, 0, // Skip to: 40359
+/* 40274 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 40277 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 40292
+/* 40281 */ MCD_OPC_CheckField, 21, 1, 0, 126, 1, // Skip to: 40669
+/* 40287 */ MCD_OPC_Decode, 140, 15, 226, 1, // Opcode: STURSi
+/* 40292 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 40307
+/* 40296 */ MCD_OPC_CheckField, 21, 1, 0, 111, 1, // Skip to: 40669
+/* 40302 */ MCD_OPC_Decode, 243, 14, 226, 1, // Opcode: STRSpost
+/* 40307 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 40344
+/* 40311 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 40314 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 40329
+/* 40318 */ MCD_OPC_CheckField, 21, 1, 1, 89, 1, // Skip to: 40669
+/* 40324 */ MCD_OPC_Decode, 245, 14, 198, 2, // Opcode: STRSroW
+/* 40329 */ MCD_OPC_FilterValue, 3, 80, 1, // Skip to: 40669
+/* 40333 */ MCD_OPC_CheckField, 21, 1, 1, 74, 1, // Skip to: 40669
+/* 40339 */ MCD_OPC_Decode, 246, 14, 199, 2, // Opcode: STRSroX
+/* 40344 */ MCD_OPC_FilterValue, 3, 65, 1, // Skip to: 40669
+/* 40348 */ MCD_OPC_CheckField, 21, 1, 0, 59, 1, // Skip to: 40669
+/* 40354 */ MCD_OPC_Decode, 244, 14, 226, 1, // Opcode: STRSpre
+/* 40359 */ MCD_OPC_FilterValue, 1, 85, 0, // Skip to: 40448
+/* 40363 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 40366 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 40381
+/* 40370 */ MCD_OPC_CheckField, 21, 1, 0, 37, 1, // Skip to: 40669
+/* 40376 */ MCD_OPC_Decode, 164, 8, 226, 1, // Opcode: LDURSi
+/* 40381 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 40396
+/* 40385 */ MCD_OPC_CheckField, 21, 1, 0, 22, 1, // Skip to: 40669
+/* 40391 */ MCD_OPC_Decode, 255, 7, 226, 1, // Opcode: LDRSpost
+/* 40396 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 40433
+/* 40400 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 40403 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 40418
+/* 40407 */ MCD_OPC_CheckField, 21, 1, 1, 0, 1, // Skip to: 40669
+/* 40413 */ MCD_OPC_Decode, 129, 8, 198, 2, // Opcode: LDRSroW
+/* 40418 */ MCD_OPC_FilterValue, 3, 247, 0, // Skip to: 40669
+/* 40422 */ MCD_OPC_CheckField, 21, 1, 1, 241, 0, // Skip to: 40669
+/* 40428 */ MCD_OPC_Decode, 130, 8, 199, 2, // Opcode: LDRSroX
+/* 40433 */ MCD_OPC_FilterValue, 3, 232, 0, // Skip to: 40669
+/* 40437 */ MCD_OPC_CheckField, 21, 1, 0, 226, 0, // Skip to: 40669
+/* 40443 */ MCD_OPC_Decode, 128, 8, 226, 1, // Opcode: LDRSpre
+/* 40448 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 40457
+/* 40452 */ MCD_OPC_Decode, 247, 14, 231, 1, // Opcode: STRSui
+/* 40457 */ MCD_OPC_FilterValue, 5, 208, 0, // Skip to: 40669
+/* 40461 */ MCD_OPC_Decode, 131, 8, 231, 1, // Opcode: LDRSui
+/* 40466 */ MCD_OPC_FilterValue, 7, 199, 0, // Skip to: 40669
+/* 40470 */ MCD_OPC_ExtractField, 22, 4, // Inst{25-22} ...
+/* 40473 */ MCD_OPC_FilterValue, 0, 85, 0, // Skip to: 40562
+/* 40477 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 40480 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 40495
+/* 40484 */ MCD_OPC_CheckField, 21, 1, 0, 179, 0, // Skip to: 40669
+/* 40490 */ MCD_OPC_Decode, 136, 15, 226, 1, // Opcode: STURDi
+/* 40495 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 40510
+/* 40499 */ MCD_OPC_CheckField, 21, 1, 0, 164, 0, // Skip to: 40669
+/* 40505 */ MCD_OPC_Decode, 223, 14, 226, 1, // Opcode: STRDpost
+/* 40510 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 40547
+/* 40514 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 40517 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 40532
+/* 40521 */ MCD_OPC_CheckField, 21, 1, 1, 142, 0, // Skip to: 40669
+/* 40527 */ MCD_OPC_Decode, 225, 14, 200, 2, // Opcode: STRDroW
+/* 40532 */ MCD_OPC_FilterValue, 3, 133, 0, // Skip to: 40669
+/* 40536 */ MCD_OPC_CheckField, 21, 1, 1, 127, 0, // Skip to: 40669
+/* 40542 */ MCD_OPC_Decode, 226, 14, 201, 2, // Opcode: STRDroX
+/* 40547 */ MCD_OPC_FilterValue, 3, 118, 0, // Skip to: 40669
+/* 40551 */ MCD_OPC_CheckField, 21, 1, 0, 112, 0, // Skip to: 40669
+/* 40557 */ MCD_OPC_Decode, 224, 14, 226, 1, // Opcode: STRDpre
+/* 40562 */ MCD_OPC_FilterValue, 1, 85, 0, // Skip to: 40651
+/* 40566 */ MCD_OPC_ExtractField, 10, 2, // Inst{11-10} ...
+/* 40569 */ MCD_OPC_FilterValue, 0, 11, 0, // Skip to: 40584
+/* 40573 */ MCD_OPC_CheckField, 21, 1, 0, 90, 0, // Skip to: 40669
+/* 40579 */ MCD_OPC_Decode, 155, 8, 226, 1, // Opcode: LDURDi
+/* 40584 */ MCD_OPC_FilterValue, 1, 11, 0, // Skip to: 40599
+/* 40588 */ MCD_OPC_CheckField, 21, 1, 0, 75, 0, // Skip to: 40669
+/* 40594 */ MCD_OPC_Decode, 207, 7, 226, 1, // Opcode: LDRDpost
+/* 40599 */ MCD_OPC_FilterValue, 2, 33, 0, // Skip to: 40636
+/* 40603 */ MCD_OPC_ExtractField, 13, 2, // Inst{14-13} ...
+/* 40606 */ MCD_OPC_FilterValue, 2, 11, 0, // Skip to: 40621
+/* 40610 */ MCD_OPC_CheckField, 21, 1, 1, 53, 0, // Skip to: 40669
+/* 40616 */ MCD_OPC_Decode, 209, 7, 200, 2, // Opcode: LDRDroW
+/* 40621 */ MCD_OPC_FilterValue, 3, 44, 0, // Skip to: 40669
+/* 40625 */ MCD_OPC_CheckField, 21, 1, 1, 38, 0, // Skip to: 40669
+/* 40631 */ MCD_OPC_Decode, 210, 7, 201, 2, // Opcode: LDRDroX
+/* 40636 */ MCD_OPC_FilterValue, 3, 29, 0, // Skip to: 40669
+/* 40640 */ MCD_OPC_CheckField, 21, 1, 0, 23, 0, // Skip to: 40669
+/* 40646 */ MCD_OPC_Decode, 208, 7, 226, 1, // Opcode: LDRDpre
+/* 40651 */ MCD_OPC_FilterValue, 4, 5, 0, // Skip to: 40660
+/* 40655 */ MCD_OPC_Decode, 227, 14, 231, 1, // Opcode: STRDui
+/* 40660 */ MCD_OPC_FilterValue, 5, 5, 0, // Skip to: 40669
+/* 40664 */ MCD_OPC_Decode, 211, 7, 231, 1, // Opcode: LDRDui
+/* 40669 */ MCD_OPC_Fail,
0
};
@@ -10905,11 +9598,13 @@
switch (Idx) {
default: // llvm_unreachable("Invalid index!");
case 0:
- return getbool(Bits & AArch64_FeatureNEON);
+ return getbool((Bits & AArch64_FeatureNEON));
case 1:
- return getbool(Bits & AArch64_FeatureFPARMv8);
+ return getbool((Bits & AArch64_FeatureCrypto));
case 2:
- return getbool((Bits & AArch64_FeatureNEON) && (Bits & AArch64_FeatureCrypto));
+ return getbool((Bits & AArch64_FeatureCRC));
+ case 3:
+ return getbool((Bits & AArch64_FeatureFPARMv8));
}
}
@@ -10921,806 +9616,1028 @@
switch (Idx) { \
default: \
case 0: \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeExclusiveLdStInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 1: \
- if (!Check(&S, DecodeLDSTPairInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeThreeAddrSRegInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 2: \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeAddSubERegInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 3: \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodePairLdStInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 4: \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeDDDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 5: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeDDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 6: \
- if (!Check(&S, DecodeLoadPairExclusiveInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 7: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 8: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- if (!Check(&S, Decode32BitShiftOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 9: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- if (!Check(&S, Decode32BitShiftOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 10: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- if (!Check(&S, Decode32BitShiftOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 11: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 12: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeDDDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- MCOperand_CreateImm0(MI, tmp); \
return S; \
case 13: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeDDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- MCOperand_CreateImm0(MI, tmp); \
return S; \
case 14: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32wspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32wspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 3); \
- if (!Check(&S, DecodeRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 15: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32wspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 3); \
- if (!Check(&S, DecodeRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 16: \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeDDRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32wspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 3); \
- if (!Check(&S, DecodeRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 17: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 3); \
- if (!Check(&S, DecodeRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 18: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 3); \
- if (!Check(&S, DecodeRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 16: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 17: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 18: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 19: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 3); \
- if (!Check(&S, DecodeRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 20: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 3); \
- if (!Check(&S, DecodeRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 21: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 3); \
- if (!Check(&S, DecodeRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 22: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 3); \
- if (!Check(&S, DecodeRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 23: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeDQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 24: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeDTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 25: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 26: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeDPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 27: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 28: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 29: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 25: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 26: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 27: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 28: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 29: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 30: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 31: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeDQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 32: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeDTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 33: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 34: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeDPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 35: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 36: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 37: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 38: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 39: \
- if (!Check(&S, DecodeVLDSTPostInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 40: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 10, 3) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 3); \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 41: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 10, 3) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 3); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 42: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 11, 2) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 2); \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 43: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 2) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 2); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 44: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 1); \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 45: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 30, 1); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 46: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 47: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 48: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
tmp |= (fieldname(insn, 12, 1) << 0); \
tmp |= (fieldname(insn, 30, 1) << 1); \
MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 47: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 30, 1); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 48: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 10, 3) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 3); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 49: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 10, 3) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 3); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 50: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 11, 2) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 2); \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 51: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 2) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 2); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 52: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 1); \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 53: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 30, 1); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 54: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 1); \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 55: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 30, 1); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 56: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 10, 3) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 3); \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 57: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 10, 3) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 3); \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 58: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
tmp |= (fieldname(insn, 11, 2) << 0); \
tmp |= (fieldname(insn, 30, 1) << 2); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 59: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
tmp |= (fieldname(insn, 11, 2) << 0); \
tmp |= (fieldname(insn, 30, 1) << 2); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 60: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
tmp |= (fieldname(insn, 12, 1) << 0); \
tmp |= (fieldname(insn, 30, 1) << 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 61: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 30, 1); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 62: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 1); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 63: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 30, 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 64: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 10, 3) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 3); \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 65: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 66: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 67: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 68: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
tmp |= (fieldname(insn, 10, 3) << 0); \
tmp |= (fieldname(insn, 30, 1) << 3); \
MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 66: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 2) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 2); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 67: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 2) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 2); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 68: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 30, 1) << 1); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 69: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 30, 1); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 70: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 71: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 10, 3) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 3); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 72: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 73: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 74: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 75: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 2) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 76: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
tmp |= (fieldname(insn, 12, 1) << 0); \
tmp |= (fieldname(insn, 30, 1) << 1); \
MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 71: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 30, 1); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 72: \
- if (!Check(&S, DecodeVLDSTLanePostInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 73: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 74: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 75: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 19, 2); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 76: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 18, 3); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 77: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 17, 4); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 78: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 79: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 80: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 81: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 30, 1) << 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 82: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 83: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 30, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 84: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 85: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 18, 3); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 86: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 17, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 87: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 88: \
+ case 85: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 89: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
+ tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 90: \
+ case 86: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 19, 2); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
+ case 87: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 18, 3); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 88: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 17, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 89: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 90: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
case 91: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 92: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 93: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 94: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
@@ -11728,25 +10645,23 @@
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 96: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 18, 3); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 97: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 17, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 98: \
tmp = fieldname(insn, 0, 5); \
@@ -11754,18 +10669,110 @@
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 99: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 100: \
tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 101: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 19, 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 102: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 103: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 104: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 105: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 106: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 107: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 108: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 109: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 110: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 111: \
+ tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
@@ -11774,204 +10781,119 @@
tmp = fieldname(insn, 11, 3); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 101: \
- if (!Check(&S, DecodeSHLLInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 102: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 103: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 20, 1); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 104: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 19, 2); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 105: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 18, 3); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 106: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 17, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 107: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 108: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 109: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 110: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 111: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 20, 1); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
case 112: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 19, 2); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 113: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 18, 3); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 20, 1); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 114: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 17, 4); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 19, 2); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 115: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 116: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 117: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 19, 2); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 118: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 18, 3); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 119: \
+ case 116: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 17, 4); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
+ case 117: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 118: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 119: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
case 120: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQPairRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 121: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 122: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 20, 1); \
MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 122: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 19, 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 123: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
+ tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 18, 3); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 124: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 17, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQTripleRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 125: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
@@ -11981,31 +10903,31 @@
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeQQuadRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 127: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 19, 2); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 128: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 11, 4); \
+ tmp = fieldname(insn, 18, 3); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 129: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 17, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 130: \
tmp = fieldname(insn, 0, 5); \
@@ -12013,253 +10935,185 @@
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 20, 1); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 14, 1); \
- MCOperand_CreateImm0(MI, tmp); \
return S; \
case 131: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 19, 2); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 13, 2); \
- MCOperand_CreateImm0(MI, tmp); \
return S; \
case 132: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 18, 3); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 12, 3); \
+ tmp = fieldname(insn, 20, 1); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 133: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 134: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 135: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 136: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 137: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 138: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 17, 4); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 11, 4); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 134: \
+ case 139: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 140: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 20, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 14, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 141: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 19, 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 13, 2); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 142: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 18, 3); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 12, 3); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 143: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 17, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 11, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 144: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 135: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 13, 2); \
- if (!Check(&S, DecodeNeonMovImmShiftOperand(MI, tmp, Address, Decoder, A64SE_LSL, false))) return MCDisassembler_Fail; \
- return S; \
- case 136: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftRightImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 137: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftRightImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 138: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftRightImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 139: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 13, 2); \
- if (!Check(&S, DecodeNeonMovImmShiftOperand(MI, tmp, Address, Decoder, A64SE_LSL, false))) return MCDisassembler_Fail; \
- return S; \
- case 140: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftRightImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 141: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftLeftImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 142: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftRightImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 143: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftLeftImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 144: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftRightImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
case 145: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftLeftImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeModImmInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 146: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 13, 1); \
- if (!Check(&S, DecodeNeonMovImmShiftOperand(MI, tmp, Address, Decoder, A64SE_LSL, true))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
+ if (!Check(&S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 147: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftRightImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 148: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftLeftImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 149: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftRightImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeModImmTiedInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 150: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftLeftImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
+ if (!Check(&S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 151: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftRightImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 152: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftLeftImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 153: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 13, 1); \
- if (!Check(&S, DecodeNeonMovImmShiftOperand(MI, tmp, Address, Decoder, A64SE_LSL, true))) return MCDisassembler_Fail; \
- return S; \
- case 154: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 12, 1); \
- if (!Check(&S, DecodeNeonMovImmShiftOperand(MI, tmp, Address, Decoder, A64SE_MSL, false))) return MCDisassembler_Fail; \
- return S; \
- case 155: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 156: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftLeftImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 157: \
+ case 152: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
@@ -12267,9 +11121,17 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftLeftImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 158: \
+ case 153: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 154: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
@@ -12277,63 +11139,93 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftLeftImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 155: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 156: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
+ if (!Check(&S, DecodeVecShiftR16ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 157: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
+ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 158: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeVecShiftR32ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 159: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 13, 2); \
- if (!Check(&S, DecodeNeonMovImmShiftOperand(MI, tmp, Address, Decoder, A64SE_LSL, false))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 160: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftRightImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftR64ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 161: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftRightImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 162: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftRightImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
+ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 163: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 13, 2); \
- if (!Check(&S, DecodeNeonMovImmShiftOperand(MI, tmp, Address, Decoder, A64SE_LSL, false))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 164: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftRightImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 165: \
tmp = fieldname(insn, 0, 5); \
@@ -12341,25 +11233,23 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftLeftImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 166: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftRightImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 167: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftLeftImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 168: \
tmp = fieldname(insn, 0, 5); \
@@ -12368,56 +11258,52 @@
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftRightImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
+ if (!Check(&S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 169: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftLeftImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
+ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 170: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 13, 1); \
- if (!Check(&S, DecodeNeonMovImmShiftOperand(MI, tmp, Address, Decoder, A64SE_LSL, true))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 171: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
+ tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 13, 1); \
- if (!Check(&S, DecodeNeonMovImmShiftOperand(MI, tmp, Address, Decoder, A64SE_LSL, true))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 172: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 12, 1); \
- if (!Check(&S, DecodeNeonMovImmShiftOperand(MI, tmp, Address, Decoder, A64SE_MSL, false))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 173: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 5) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 174: \
tmp = fieldname(insn, 0, 5); \
@@ -12427,7 +11313,7 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftLeftImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftR16ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 175: \
tmp = fieldname(insn, 0, 5); \
@@ -12437,7 +11323,7 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftLeftImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftR32ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 176: \
tmp = fieldname(insn, 0, 5); \
@@ -12447,29 +11333,27 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftLeftImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftR64ImmNarrow(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 177: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR128LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 2); \
- tmp |= (fieldname(insn, 20, 2) << 0); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
+ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 178: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 6); \
- if (!Check(&S, DecodeShiftRightImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 179: \
tmp = fieldname(insn, 0, 5); \
@@ -12478,44 +11362,44 @@
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 180: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR128LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
tmp |= (fieldname(insn, 11, 1) << 2); \
tmp |= (fieldname(insn, 20, 2) << 0); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 180: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 6); \
- if (!Check(&S, DecodeShiftRightImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
case 181: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR128LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 2); \
- tmp |= (fieldname(insn, 20, 2) << 0); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 6); \
+ if (!Check(&S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 182: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 6); \
- if (!Check(&S, DecodeShiftLeftImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 1) << 2); \
+ tmp |= (fieldname(insn, 20, 2) << 0); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 183: \
tmp = fieldname(insn, 0, 5); \
@@ -12525,15 +11409,17 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 6); \
- if (!Check(&S, DecodeShiftLeftImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 184: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR128LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
tmp |= (fieldname(insn, 11, 1) << 2); \
tmp |= (fieldname(insn, 20, 2) << 0); \
@@ -12544,70 +11430,60 @@
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR128LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 2); \
- tmp |= (fieldname(insn, 20, 2) << 0); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 16, 6); \
+ if (!Check(&S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 186: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR128LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 2); \
- tmp |= (fieldname(insn, 20, 2) << 0); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 6); \
+ if (!Check(&S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 187: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 1); \
- tmp |= (fieldname(insn, 21, 1) << 0); \
+ tmp |= (fieldname(insn, 11, 1) << 2); \
+ tmp |= (fieldname(insn, 20, 2) << 0); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 188: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 1); \
- tmp |= (fieldname(insn, 21, 1) << 0); \
+ tmp |= (fieldname(insn, 11, 1) << 2); \
+ tmp |= (fieldname(insn, 20, 2) << 0); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 189: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 1); \
- tmp |= (fieldname(insn, 21, 1) << 0); \
+ tmp |= (fieldname(insn, 11, 1) << 2); \
+ tmp |= (fieldname(insn, 20, 2) << 0); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 190: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
@@ -12620,6 +11496,8 @@
case 191: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
@@ -12632,6 +11510,8 @@
case 192: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
@@ -12643,14 +11523,14 @@
return S; \
case 193: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 11, 1); \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 1) << 1); \
+ tmp |= (fieldname(insn, 21, 1) << 0); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 194: \
@@ -12660,790 +11540,653 @@
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 11, 1); \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 1) << 1); \
+ tmp |= (fieldname(insn, 21, 1) << 0); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 195: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 5, 19) << 2); \
- tmp |= (fieldname(insn, 29, 2) << 0); \
+ tmp |= (fieldname(insn, 11, 1) << 1); \
+ tmp |= (fieldname(insn, 21, 1) << 0); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 196: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32wspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32wspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 11, 1); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 197: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32wspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 11, 1); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 198: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32wspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeAdrInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 199: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeBaseAddSubImm(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 200: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeLogicalImmInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 201: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeMoveImmInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 202: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32wspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 13); \
- if (!Check(&S, DecodeLogicalImmOperand(MI, tmp, Address, Decoder, 32))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 10, 5); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 203: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 18); \
- if (!Check(&S, DecodeMoveWideImmOperand(MI, tmp, Address, Decoder, 32))) return MCDisassembler_Fail; \
- return S; \
- case 204: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 13); \
- if (!Check(&S, DecodeLogicalImmOperand(MI, tmp, Address, Decoder, 32))) return MCDisassembler_Fail; \
- return S; \
- case 205: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 18); \
- if (!Check(&S, DecodeMoveWideImmOperand(MI, tmp, Address, Decoder, 32))) return MCDisassembler_Fail; \
- return S; \
- case 206: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 13); \
- if (!Check(&S, DecodeLogicalImmOperand(MI, tmp, Address, Decoder, 64))) return MCDisassembler_Fail; \
- return S; \
- case 207: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 18); \
- if (!Check(&S, DecodeMoveWideImmOperand(MI, tmp, Address, Decoder, 64))) return MCDisassembler_Fail; \
- return S; \
- case 208: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 13); \
- if (!Check(&S, DecodeLogicalImmOperand(MI, tmp, Address, Decoder, 64))) return MCDisassembler_Fail; \
- return S; \
- case 209: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 18); \
- if (!Check(&S, DecodeMoveWideImmOperand(MI, tmp, Address, Decoder, 64))) return MCDisassembler_Fail; \
- return S; \
- case 210: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 211: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 6); \
- if (!Check(&S, DecodeBitfield32ImmOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 212: \
- if (!Check(&S, DecodeBitfieldInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 213: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- if (!Check(&S, DecodeBitfield32ImmOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 5); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 214: \
+ case 204: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 10, 5); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 215: \
+ case 205: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 6); \
MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 216: \
- tmp = fieldname(insn, 0, 26); \
+ tmp = fieldname(insn, 10, 6); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 217: \
+ case 206: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 6); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 207: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 6); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 10, 6); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 208: \
+ if (!Check(&S, DecodeUnconditionalBranch(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 209: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 19); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 218: \
+ case 210: \
+ if (!Check(&S, DecodeTestAndBranch(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 211: \
+ tmp = fieldname(insn, 0, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 19); \
+ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 212: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 19); \
+ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 213: \
+ tmp = fieldname(insn, 5, 16); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
+ case 214: \
+ tmp = fieldname(insn, 5, 7); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 215: \
+ tmp = fieldname(insn, 8, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 216: \
+ if (!Check(&S, DecodeSystemPStateInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 217: \
+ tmp = fieldname(insn, 16, 3); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 12, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 8, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 3); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 218: \
+ tmp = fieldname(insn, 5, 15); \
+ if (!Check(&S, DecodeMSRSystemRegister(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
case 219: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 19, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 5, 14); \
+ tmp = fieldname(insn, 12, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 8, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 3); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 220: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 19, 5) << 0); \
- tmp |= (fieldname(insn, 31, 1) << 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 5, 14); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 15); \
+ if (!Check(&S, DecodeMRSSystemRegister(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 221: \
- tmp = fieldname(insn, 0, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 5, 19); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 222: \
- tmp = fieldname(insn, 5, 16); \
- MCOperand_CreateImm0(MI, tmp); \
return S; \
case 223: \
- tmp = fieldname(insn, 8, 4); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 224: \
- tmp = fieldname(insn, 8, 4); \
- if (!Check(&S, DecodeNamedImmOperand(MI, tmp, Address, Decoder, &A64DB_DBarrierMapper))) return MCDisassembler_Fail; \
- return S; \
- case 225: \
- tmp = fieldname(insn, 8, 4); \
- if (!Check(&S, DecodeNamedImmOperand(MI, tmp, Address, Decoder, &A64ISB_ISBMapper))) return MCDisassembler_Fail; \
- return S; \
- case 226: \
- tmp = fieldname(insn, 5, 7); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 227: \
- tmp = 0; \
- tmp |= (fieldname(insn, 5, 3) << 0); \
- tmp |= (fieldname(insn, 16, 3) << 3); \
- if (!Check(&S, DecodeNamedImmOperand(MI, tmp, Address, Decoder, &A64PState_PStateMapper))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 8, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 228: \
- tmp = fieldname(insn, 16, 3); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 12, 4); \
MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 8, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 5, 3); \
- MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 225: \
tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 226: \
+ if (!Check(&S, DecodeSignedLdStInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 227: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 228: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 229: \
- tmp = fieldname(insn, 5, 16); \
- if (!Check(&S, DecodeMSROperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 230: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 3); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 8, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 5, 3); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 231: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 16); \
- if (!Check(&S, DecodeMRSOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeUnsignedLdStInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 232: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 12, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 233: \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 0, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 12, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 234: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 235: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 236: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 12, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 237: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 9); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 238: \
- if (!Check(&S, DecodeSingleIndexedInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 239: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 240: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 12, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 241: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 9); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 0, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 12, 4); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 242: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 19); \
+ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 243: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 244: \
+ tmp = fieldname(insn, 0, 5); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 245: \
+ tmp = fieldname(insn, 0, 5); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 244: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 245: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 246: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 0, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 19); \
+ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 247: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 5); \
+ if (!Check(&S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 248: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 5); \
+ if (!Check(&S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 249: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 250: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 251: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 252: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 253: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 0, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 254: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeNamedImmOperand(MI, tmp, Address, Decoder, &A64PRFM_PRFMMapper))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 19); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 255: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 256: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeNamedImmOperand(MI, tmp, Address, Decoder, &A64PRFM_PRFMMapper))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 9); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 13, 8); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 257: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeNamedImmOperand(MI, tmp, Address, Decoder, &A64PRFM_PRFMMapper))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 12, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 258: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeNamedImmOperand(MI, tmp, Address, Decoder, &A64PRFM_PRFMMapper))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 259: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeNamedImmOperand(MI, tmp, Address, Decoder, &A64PRFM_PRFMMapper))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 12, 4); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
case 260: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 19); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 5); \
+ if (!Check(&S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 261: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- if (!Check(&S, DecodeCVT32FixedPosOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 5); \
+ if (!Check(&S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 262: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- if (!Check(&S, DecodeCVT32FixedPosOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 263: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 264: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 265: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 13, 8); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 266: \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPZeroOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 12, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 267: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 12, 4); \
+ MCOperand_CreateImm0(MI, tmp); \
return S; \
case 268: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 269: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 270: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 13, 8); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 271: \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 10, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 271: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 272: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 273: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 274: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- if (!Check(&S, DecodeCVT32FixedPosOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 275: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- if (!Check(&S, DecodeCVT32FixedPosOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 276: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 277: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 278: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPZeroOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 279: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 13, 8); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 280: \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 281: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 4); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 282: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 283: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 284: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 285: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 286: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 9); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 287: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 288: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 289: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 9); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 290: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 291: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 292: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 293: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 294: \
- tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 19); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 295: \
+ case 277: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
@@ -13453,7 +12196,7 @@
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 296: \
+ case 278: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
@@ -13461,7 +12204,7 @@
tmp = fieldname(insn, 20, 1); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 297: \
+ case 279: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
@@ -13469,7 +12212,7 @@
tmp = fieldname(insn, 19, 2); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 298: \
+ case 280: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
@@ -13477,7 +12220,7 @@
tmp = fieldname(insn, 18, 3); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 299: \
+ case 281: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
@@ -13485,7 +12228,7 @@
tmp = fieldname(insn, 17, 4); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
- case 300: \
+ case 282: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
@@ -13493,7 +12236,7 @@
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 301: \
+ case 283: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
@@ -13501,7 +12244,7 @@
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 302: \
+ case 284: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
@@ -13509,7 +12252,7 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 303: \
+ case 285: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
@@ -13517,7 +12260,7 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 304: \
+ case 286: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
@@ -13525,25 +12268,25 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 305: \
+ case 287: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 306: \
+ case 288: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 307: \
+ case 289: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 308: \
+ case 290: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
@@ -13553,7 +12296,7 @@
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 309: \
+ case 291: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
@@ -13563,7 +12306,7 @@
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 310: \
+ case 292: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
@@ -13571,7 +12314,7 @@
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 311: \
+ case 293: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
@@ -13579,15 +12322,15 @@
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 312: \
+ case 294: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 6); \
- if (!Check(&S, DecodeShiftRightImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 313: \
+ case 295: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
@@ -13595,9 +12338,9 @@
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 6); \
- if (!Check(&S, DecodeShiftRightImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
- case 314: \
+ case 296: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 0, 5); \
@@ -13611,6 +12354,192 @@
tmp |= (fieldname(insn, 21, 1) << 0); \
MCOperand_CreateImm0(MI, tmp); \
return S; \
+ case 297: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 11, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 298: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 1) << 2); \
+ tmp |= (fieldname(insn, 20, 2) << 0); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 299: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 1) << 1); \
+ tmp |= (fieldname(insn, 21, 1) << 0); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 300: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 6); \
+ if (!Check(&S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 301: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
+ if (!Check(&S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 302: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 303: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 304: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 3); \
+ if (!Check(&S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 305: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 306: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 307: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 1) << 1); \
+ tmp |= (fieldname(insn, 21, 1) << 0); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 308: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 11, 1); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 309: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 1) << 2); \
+ tmp |= (fieldname(insn, 20, 2) << 0); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 310: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 1) << 1); \
+ tmp |= (fieldname(insn, 21, 1) << 0); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 311: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 4); \
+ if (!Check(&S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 11, 1) << 2); \
+ tmp |= (fieldname(insn, 20, 2) << 0); \
+ MCOperand_CreateImm0(MI, tmp); \
+ return S; \
+ case 312: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 313: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
+ case 314: \
+ tmp = fieldname(insn, 0, 5); \
+ if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 5); \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 16, 5); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ return S; \
case 315: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
@@ -13618,419 +12547,121 @@
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 11, 1); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 16, 6); \
+ if (!Check(&S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 316: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR64LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 20, 2); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 5, 19); \
+ if (!Check(&S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 317: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR128LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 2); \
- tmp |= (fieldname(insn, 20, 2) << 0); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 6); \
+ if (!Check(&S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 318: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 21, 1); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp = fieldname(insn, 10, 6); \
+ if (!Check(&S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 319: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 1); \
- tmp |= (fieldname(insn, 21, 1) << 0); \
- MCOperand_CreateImm0(MI, tmp); \
return S; \
case 320: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 6); \
- if (!Check(&S, DecodeShiftLeftImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 321: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftLeftImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 6); \
+ if (!Check(&S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 322: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftLeftImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = fieldname(insn, 10, 6); \
+ if (!Check(&S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 323: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftLeftImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 324: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 3); \
- if (!Check(&S, DecodeShiftRightImm8(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 325: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeShiftRightImm16(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeFMOVLaneInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 326: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftRightImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 327: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 1); \
- tmp |= (fieldname(insn, 21, 1) << 0); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 328: \
tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 11, 1); \
- MCOperand_CreateImm0(MI, tmp); \
+ if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ tmp = 0; \
+ tmp |= (fieldname(insn, 12, 1) << 0); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
case 329: \
tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR64LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 20, 2); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 330: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR128LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 2); \
- tmp |= (fieldname(insn, 20, 2) << 0); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 331: \
- tmp = fieldname(insn, 0, 5); \
if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 21, 1); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 332: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 1); \
- tmp |= (fieldname(insn, 21, 1) << 0); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 333: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR64LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 20, 2); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 334: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 4); \
- if (!Check(&S, DecodeFPR128LoRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 11, 1) << 2); \
- tmp |= (fieldname(insn, 20, 2) << 0); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 335: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 21, 1); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 336: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeShiftRightImm32(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 337: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 9); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 338: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 339: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
+ if (!Check(&S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = fieldname(insn, 16, 5); \
if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
tmp = 0; \
tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 340: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 341: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 6); \
- if (!Check(&S, DecodeShiftLeftImm64(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 342: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 19); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 343: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 344: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 345: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 346: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 347: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 348: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 6); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 349: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 350: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 351: \
- if (!Check(&S, DecodeFMOVLaneInstruction(MI, insn, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 352: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 9); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 353: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 354: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 355: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 356: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 12, 9); \
- MCOperand_CreateImm0(MI, tmp); \
- return S; \
- case 357: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 358: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 16, 5); \
- if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = 0; \
- tmp |= (fieldname(insn, 12, 1) << 0); \
- tmp |= (fieldname(insn, 14, 2) << 1); \
- if (!Check(&S, DecodeAddrRegExtendOperand(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- return S; \
- case 359: \
- tmp = fieldname(insn, 0, 5); \
- if (!Check(&S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 5, 5); \
- if (!Check(&S, DecodeGPR64xspRegisterClass(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
- tmp = fieldname(insn, 10, 12); \
- MCOperand_CreateImm0(MI, tmp); \
+ tmp |= (fieldname(insn, 15, 1) << 1); \
+ if (!Check(&S, DecodeMemExtend(MI, tmp, Address, Decoder))) return MCDisassembler_Fail; \
return S; \
} \
}
@@ -14090,9 +12721,9 @@
break; \
} \
case MCD_OPC_Decode: { \
- Opc = (uint32_t)decodeULEB128(++Ptr, &Len); \
+ Opc = (unsigned)decodeULEB128(++Ptr, &Len); \
Ptr += Len; \
- DecodeIdx = (uint32_t)decodeULEB128(Ptr, &Len); \
+ DecodeIdx = (unsigned)decodeULEB128(Ptr, &Len); \
Ptr += Len; \
MCInst_setOpcode(MI, Opc); \
return decoder(S, DecodeIdx, insn, MI, Address, MRI); \
diff --git a/arch/AArch64/AArch64GenInstrInfo.inc b/arch/AArch64/AArch64GenInstrInfo.inc
index 46911b5..bb024a7 100644
--- a/arch/AArch64/AArch64GenInstrInfo.inc
+++ b/arch/AArch64/AArch64GenInstrInfo.inc
@@ -16,7 +16,7 @@
enum {
AArch64_PHI = 0,
AArch64_INLINEASM = 1,
- AArch64_PROLOG_LABEL = 2,
+ AArch64_CFI_INSTRUCTION = 2,
AArch64_EH_LABEL = 3,
AArch64_GC_LABEL = 4,
AArch64_KILL = 5,
@@ -33,2771 +33,2376 @@
AArch64_LIFETIME_END = 16,
AArch64_STACKMAP = 17,
AArch64_PATCHPOINT = 18,
- AArch64_ABS16b = 19,
- AArch64_ABS2d = 20,
- AArch64_ABS2s = 21,
- AArch64_ABS4h = 22,
- AArch64_ABS4s = 23,
- AArch64_ABS8b = 24,
- AArch64_ABS8h = 25,
- AArch64_ABSdd = 26,
- AArch64_ADCSwww = 27,
- AArch64_ADCSxxx = 28,
- AArch64_ADCwww = 29,
- AArch64_ADCxxx = 30,
- AArch64_ADDHN2vvv_16b8h = 31,
- AArch64_ADDHN2vvv_4s2d = 32,
- AArch64_ADDHN2vvv_8h4s = 33,
- AArch64_ADDHNvvv_2s2d = 34,
- AArch64_ADDHNvvv_4h4s = 35,
- AArch64_ADDHNvvv_8b8h = 36,
- AArch64_ADDP_16B = 37,
- AArch64_ADDP_2D = 38,
- AArch64_ADDP_2S = 39,
- AArch64_ADDP_4H = 40,
- AArch64_ADDP_4S = 41,
- AArch64_ADDP_8B = 42,
- AArch64_ADDP_8H = 43,
- AArch64_ADDPvv_D_2D = 44,
- AArch64_ADDSwww_asr = 45,
- AArch64_ADDSwww_lsl = 46,
- AArch64_ADDSwww_lsr = 47,
- AArch64_ADDSwww_sxtb = 48,
- AArch64_ADDSwww_sxth = 49,
- AArch64_ADDSwww_sxtw = 50,
- AArch64_ADDSwww_sxtx = 51,
- AArch64_ADDSwww_uxtb = 52,
- AArch64_ADDSwww_uxth = 53,
- AArch64_ADDSwww_uxtw = 54,
- AArch64_ADDSwww_uxtx = 55,
- AArch64_ADDSxxw_sxtb = 56,
- AArch64_ADDSxxw_sxth = 57,
- AArch64_ADDSxxw_sxtw = 58,
- AArch64_ADDSxxw_uxtb = 59,
- AArch64_ADDSxxw_uxth = 60,
- AArch64_ADDSxxw_uxtw = 61,
- AArch64_ADDSxxx_asr = 62,
- AArch64_ADDSxxx_lsl = 63,
- AArch64_ADDSxxx_lsr = 64,
- AArch64_ADDSxxx_sxtx = 65,
- AArch64_ADDSxxx_uxtx = 66,
- AArch64_ADDV_1b16b = 67,
- AArch64_ADDV_1b8b = 68,
- AArch64_ADDV_1h4h = 69,
- AArch64_ADDV_1h8h = 70,
- AArch64_ADDV_1s4s = 71,
- AArch64_ADDddd = 72,
- AArch64_ADDvvv_16B = 73,
- AArch64_ADDvvv_2D = 74,
- AArch64_ADDvvv_2S = 75,
- AArch64_ADDvvv_4H = 76,
- AArch64_ADDvvv_4S = 77,
- AArch64_ADDvvv_8B = 78,
- AArch64_ADDvvv_8H = 79,
- AArch64_ADDwwi_lsl0_S = 80,
- AArch64_ADDwwi_lsl0_cmp = 81,
- AArch64_ADDwwi_lsl0_s = 82,
- AArch64_ADDwwi_lsl12_S = 83,
- AArch64_ADDwwi_lsl12_cmp = 84,
- AArch64_ADDwwi_lsl12_s = 85,
- AArch64_ADDwww_asr = 86,
- AArch64_ADDwww_lsl = 87,
- AArch64_ADDwww_lsr = 88,
- AArch64_ADDwww_sxtb = 89,
- AArch64_ADDwww_sxth = 90,
- AArch64_ADDwww_sxtw = 91,
- AArch64_ADDwww_sxtx = 92,
- AArch64_ADDwww_uxtb = 93,
- AArch64_ADDwww_uxth = 94,
- AArch64_ADDwww_uxtw = 95,
- AArch64_ADDwww_uxtx = 96,
- AArch64_ADDxxi_lsl0_S = 97,
- AArch64_ADDxxi_lsl0_cmp = 98,
- AArch64_ADDxxi_lsl0_s = 99,
- AArch64_ADDxxi_lsl12_S = 100,
- AArch64_ADDxxi_lsl12_cmp = 101,
- AArch64_ADDxxi_lsl12_s = 102,
- AArch64_ADDxxw_sxtb = 103,
- AArch64_ADDxxw_sxth = 104,
- AArch64_ADDxxw_sxtw = 105,
- AArch64_ADDxxw_uxtb = 106,
- AArch64_ADDxxw_uxth = 107,
- AArch64_ADDxxw_uxtw = 108,
- AArch64_ADDxxx_asr = 109,
- AArch64_ADDxxx_lsl = 110,
- AArch64_ADDxxx_lsr = 111,
- AArch64_ADDxxx_sxtx = 112,
- AArch64_ADDxxx_uxtx = 113,
- AArch64_ADJCALLSTACKDOWN = 114,
- AArch64_ADJCALLSTACKUP = 115,
- AArch64_ADRPxi = 116,
- AArch64_ADRxi = 117,
- AArch64_AESD = 118,
- AArch64_AESE = 119,
- AArch64_AESIMC = 120,
- AArch64_AESMC = 121,
- AArch64_ANDSwwi = 122,
- AArch64_ANDSwww_asr = 123,
- AArch64_ANDSwww_lsl = 124,
- AArch64_ANDSwww_lsr = 125,
- AArch64_ANDSwww_ror = 126,
- AArch64_ANDSxxi = 127,
- AArch64_ANDSxxx_asr = 128,
- AArch64_ANDSxxx_lsl = 129,
- AArch64_ANDSxxx_lsr = 130,
- AArch64_ANDSxxx_ror = 131,
- AArch64_ANDvvv_16B = 132,
- AArch64_ANDvvv_8B = 133,
- AArch64_ANDwwi = 134,
- AArch64_ANDwww_asr = 135,
- AArch64_ANDwww_lsl = 136,
- AArch64_ANDwww_lsr = 137,
- AArch64_ANDwww_ror = 138,
- AArch64_ANDxxi = 139,
- AArch64_ANDxxx_asr = 140,
- AArch64_ANDxxx_lsl = 141,
- AArch64_ANDxxx_lsr = 142,
- AArch64_ANDxxx_ror = 143,
- AArch64_ASRVwww = 144,
- AArch64_ASRVxxx = 145,
- AArch64_ASRwwi = 146,
- AArch64_ASRxxi = 147,
- AArch64_ATOMIC_CMP_SWAP_I16 = 148,
- AArch64_ATOMIC_CMP_SWAP_I32 = 149,
- AArch64_ATOMIC_CMP_SWAP_I64 = 150,
- AArch64_ATOMIC_CMP_SWAP_I8 = 151,
- AArch64_ATOMIC_LOAD_ADD_I16 = 152,
- AArch64_ATOMIC_LOAD_ADD_I32 = 153,
- AArch64_ATOMIC_LOAD_ADD_I64 = 154,
- AArch64_ATOMIC_LOAD_ADD_I8 = 155,
- AArch64_ATOMIC_LOAD_AND_I16 = 156,
- AArch64_ATOMIC_LOAD_AND_I32 = 157,
- AArch64_ATOMIC_LOAD_AND_I64 = 158,
- AArch64_ATOMIC_LOAD_AND_I8 = 159,
- AArch64_ATOMIC_LOAD_MAX_I16 = 160,
- AArch64_ATOMIC_LOAD_MAX_I32 = 161,
- AArch64_ATOMIC_LOAD_MAX_I64 = 162,
- AArch64_ATOMIC_LOAD_MAX_I8 = 163,
- AArch64_ATOMIC_LOAD_MIN_I16 = 164,
- AArch64_ATOMIC_LOAD_MIN_I32 = 165,
- AArch64_ATOMIC_LOAD_MIN_I64 = 166,
- AArch64_ATOMIC_LOAD_MIN_I8 = 167,
- AArch64_ATOMIC_LOAD_NAND_I16 = 168,
- AArch64_ATOMIC_LOAD_NAND_I32 = 169,
- AArch64_ATOMIC_LOAD_NAND_I64 = 170,
- AArch64_ATOMIC_LOAD_NAND_I8 = 171,
- AArch64_ATOMIC_LOAD_OR_I16 = 172,
- AArch64_ATOMIC_LOAD_OR_I32 = 173,
- AArch64_ATOMIC_LOAD_OR_I64 = 174,
- AArch64_ATOMIC_LOAD_OR_I8 = 175,
- AArch64_ATOMIC_LOAD_SUB_I16 = 176,
- AArch64_ATOMIC_LOAD_SUB_I32 = 177,
- AArch64_ATOMIC_LOAD_SUB_I64 = 178,
- AArch64_ATOMIC_LOAD_SUB_I8 = 179,
- AArch64_ATOMIC_LOAD_UMAX_I16 = 180,
- AArch64_ATOMIC_LOAD_UMAX_I32 = 181,
- AArch64_ATOMIC_LOAD_UMAX_I64 = 182,
- AArch64_ATOMIC_LOAD_UMAX_I8 = 183,
- AArch64_ATOMIC_LOAD_UMIN_I16 = 184,
- AArch64_ATOMIC_LOAD_UMIN_I32 = 185,
- AArch64_ATOMIC_LOAD_UMIN_I64 = 186,
- AArch64_ATOMIC_LOAD_UMIN_I8 = 187,
- AArch64_ATOMIC_LOAD_XOR_I16 = 188,
- AArch64_ATOMIC_LOAD_XOR_I32 = 189,
- AArch64_ATOMIC_LOAD_XOR_I64 = 190,
- AArch64_ATOMIC_LOAD_XOR_I8 = 191,
- AArch64_ATOMIC_SWAP_I16 = 192,
- AArch64_ATOMIC_SWAP_I32 = 193,
- AArch64_ATOMIC_SWAP_I64 = 194,
- AArch64_ATOMIC_SWAP_I8 = 195,
- AArch64_ATix = 196,
- AArch64_BFIwwii = 197,
- AArch64_BFIxxii = 198,
- AArch64_BFMwwii = 199,
- AArch64_BFMxxii = 200,
- AArch64_BFXILwwii = 201,
- AArch64_BFXILxxii = 202,
- AArch64_BICSwww_asr = 203,
- AArch64_BICSwww_lsl = 204,
- AArch64_BICSwww_lsr = 205,
- AArch64_BICSwww_ror = 206,
- AArch64_BICSxxx_asr = 207,
- AArch64_BICSxxx_lsl = 208,
- AArch64_BICSxxx_lsr = 209,
- AArch64_BICSxxx_ror = 210,
- AArch64_BICvi_lsl_2S = 211,
- AArch64_BICvi_lsl_4H = 212,
- AArch64_BICvi_lsl_4S = 213,
- AArch64_BICvi_lsl_8H = 214,
- AArch64_BICvvv_16B = 215,
- AArch64_BICvvv_8B = 216,
- AArch64_BICwww_asr = 217,
- AArch64_BICwww_lsl = 218,
- AArch64_BICwww_lsr = 219,
- AArch64_BICwww_ror = 220,
- AArch64_BICxxx_asr = 221,
- AArch64_BICxxx_lsl = 222,
- AArch64_BICxxx_lsr = 223,
- AArch64_BICxxx_ror = 224,
- AArch64_BIFvvv_16B = 225,
- AArch64_BIFvvv_8B = 226,
- AArch64_BITvvv_16B = 227,
- AArch64_BITvvv_8B = 228,
- AArch64_BLRx = 229,
- AArch64_BLimm = 230,
- AArch64_BRKi = 231,
- AArch64_BRx = 232,
- AArch64_BSLvvv_16B = 233,
- AArch64_BSLvvv_8B = 234,
- AArch64_Bcc = 235,
- AArch64_Bimm = 236,
- AArch64_CBNZw = 237,
- AArch64_CBNZx = 238,
- AArch64_CBZw = 239,
- AArch64_CBZx = 240,
- AArch64_CCMNwi = 241,
- AArch64_CCMNww = 242,
- AArch64_CCMNxi = 243,
- AArch64_CCMNxx = 244,
- AArch64_CCMPwi = 245,
- AArch64_CCMPww = 246,
- AArch64_CCMPxi = 247,
- AArch64_CCMPxx = 248,
- AArch64_CLREXi = 249,
- AArch64_CLS16b = 250,
- AArch64_CLS2s = 251,
- AArch64_CLS4h = 252,
- AArch64_CLS4s = 253,
- AArch64_CLS8b = 254,
- AArch64_CLS8h = 255,
- AArch64_CLSww = 256,
- AArch64_CLSxx = 257,
- AArch64_CLZ16b = 258,
- AArch64_CLZ2s = 259,
- AArch64_CLZ4h = 260,
- AArch64_CLZ4s = 261,
- AArch64_CLZ8b = 262,
- AArch64_CLZ8h = 263,
- AArch64_CLZww = 264,
- AArch64_CLZxx = 265,
- AArch64_CMEQddd = 266,
- AArch64_CMEQddi = 267,
- AArch64_CMEQvvi_16B = 268,
- AArch64_CMEQvvi_2D = 269,
- AArch64_CMEQvvi_2S = 270,
- AArch64_CMEQvvi_4H = 271,
- AArch64_CMEQvvi_4S = 272,
- AArch64_CMEQvvi_8B = 273,
- AArch64_CMEQvvi_8H = 274,
- AArch64_CMEQvvv_16B = 275,
- AArch64_CMEQvvv_2D = 276,
- AArch64_CMEQvvv_2S = 277,
- AArch64_CMEQvvv_4H = 278,
- AArch64_CMEQvvv_4S = 279,
- AArch64_CMEQvvv_8B = 280,
- AArch64_CMEQvvv_8H = 281,
- AArch64_CMGEddd = 282,
- AArch64_CMGEddi = 283,
- AArch64_CMGEvvi_16B = 284,
- AArch64_CMGEvvi_2D = 285,
- AArch64_CMGEvvi_2S = 286,
- AArch64_CMGEvvi_4H = 287,
- AArch64_CMGEvvi_4S = 288,
- AArch64_CMGEvvi_8B = 289,
- AArch64_CMGEvvi_8H = 290,
- AArch64_CMGEvvv_16B = 291,
- AArch64_CMGEvvv_2D = 292,
- AArch64_CMGEvvv_2S = 293,
- AArch64_CMGEvvv_4H = 294,
- AArch64_CMGEvvv_4S = 295,
- AArch64_CMGEvvv_8B = 296,
- AArch64_CMGEvvv_8H = 297,
- AArch64_CMGTddd = 298,
- AArch64_CMGTddi = 299,
- AArch64_CMGTvvi_16B = 300,
- AArch64_CMGTvvi_2D = 301,
- AArch64_CMGTvvi_2S = 302,
- AArch64_CMGTvvi_4H = 303,
- AArch64_CMGTvvi_4S = 304,
- AArch64_CMGTvvi_8B = 305,
- AArch64_CMGTvvi_8H = 306,
- AArch64_CMGTvvv_16B = 307,
- AArch64_CMGTvvv_2D = 308,
- AArch64_CMGTvvv_2S = 309,
- AArch64_CMGTvvv_4H = 310,
- AArch64_CMGTvvv_4S = 311,
- AArch64_CMGTvvv_8B = 312,
- AArch64_CMGTvvv_8H = 313,
- AArch64_CMHIddd = 314,
- AArch64_CMHIvvv_16B = 315,
- AArch64_CMHIvvv_2D = 316,
- AArch64_CMHIvvv_2S = 317,
- AArch64_CMHIvvv_4H = 318,
- AArch64_CMHIvvv_4S = 319,
- AArch64_CMHIvvv_8B = 320,
- AArch64_CMHIvvv_8H = 321,
- AArch64_CMHSddd = 322,
- AArch64_CMHSvvv_16B = 323,
- AArch64_CMHSvvv_2D = 324,
- AArch64_CMHSvvv_2S = 325,
- AArch64_CMHSvvv_4H = 326,
- AArch64_CMHSvvv_4S = 327,
- AArch64_CMHSvvv_8B = 328,
- AArch64_CMHSvvv_8H = 329,
- AArch64_CMLEddi = 330,
- AArch64_CMLEvvi_16B = 331,
- AArch64_CMLEvvi_2D = 332,
- AArch64_CMLEvvi_2S = 333,
- AArch64_CMLEvvi_4H = 334,
- AArch64_CMLEvvi_4S = 335,
- AArch64_CMLEvvi_8B = 336,
- AArch64_CMLEvvi_8H = 337,
- AArch64_CMLTddi = 338,
- AArch64_CMLTvvi_16B = 339,
- AArch64_CMLTvvi_2D = 340,
- AArch64_CMLTvvi_2S = 341,
- AArch64_CMLTvvi_4H = 342,
- AArch64_CMLTvvi_4S = 343,
- AArch64_CMLTvvi_8B = 344,
- AArch64_CMLTvvi_8H = 345,
- AArch64_CMNww_asr = 346,
- AArch64_CMNww_lsl = 347,
- AArch64_CMNww_lsr = 348,
- AArch64_CMNww_sxtb = 349,
- AArch64_CMNww_sxth = 350,
- AArch64_CMNww_sxtw = 351,
- AArch64_CMNww_sxtx = 352,
- AArch64_CMNww_uxtb = 353,
- AArch64_CMNww_uxth = 354,
- AArch64_CMNww_uxtw = 355,
- AArch64_CMNww_uxtx = 356,
- AArch64_CMNxw_sxtb = 357,
- AArch64_CMNxw_sxth = 358,
- AArch64_CMNxw_sxtw = 359,
- AArch64_CMNxw_uxtb = 360,
- AArch64_CMNxw_uxth = 361,
- AArch64_CMNxw_uxtw = 362,
- AArch64_CMNxx_asr = 363,
- AArch64_CMNxx_lsl = 364,
- AArch64_CMNxx_lsr = 365,
- AArch64_CMNxx_sxtx = 366,
- AArch64_CMNxx_uxtx = 367,
- AArch64_CMPww_asr = 368,
- AArch64_CMPww_lsl = 369,
- AArch64_CMPww_lsr = 370,
- AArch64_CMPww_sxtb = 371,
- AArch64_CMPww_sxth = 372,
- AArch64_CMPww_sxtw = 373,
- AArch64_CMPww_sxtx = 374,
- AArch64_CMPww_uxtb = 375,
- AArch64_CMPww_uxth = 376,
- AArch64_CMPww_uxtw = 377,
- AArch64_CMPww_uxtx = 378,
- AArch64_CMPxw_sxtb = 379,
- AArch64_CMPxw_sxth = 380,
- AArch64_CMPxw_sxtw = 381,
- AArch64_CMPxw_uxtb = 382,
- AArch64_CMPxw_uxth = 383,
- AArch64_CMPxw_uxtw = 384,
- AArch64_CMPxx_asr = 385,
- AArch64_CMPxx_lsl = 386,
- AArch64_CMPxx_lsr = 387,
- AArch64_CMPxx_sxtx = 388,
- AArch64_CMPxx_uxtx = 389,
- AArch64_CMTSTddd = 390,
- AArch64_CMTSTvvv_16B = 391,
- AArch64_CMTSTvvv_2D = 392,
- AArch64_CMTSTvvv_2S = 393,
- AArch64_CMTSTvvv_4H = 394,
- AArch64_CMTSTvvv_4S = 395,
- AArch64_CMTSTvvv_8B = 396,
- AArch64_CMTSTvvv_8H = 397,
- AArch64_CNT16b = 398,
- AArch64_CNT8b = 399,
- AArch64_CRC32B_www = 400,
- AArch64_CRC32CB_www = 401,
- AArch64_CRC32CH_www = 402,
- AArch64_CRC32CW_www = 403,
- AArch64_CRC32CX_wwx = 404,
- AArch64_CRC32H_www = 405,
- AArch64_CRC32W_www = 406,
- AArch64_CRC32X_wwx = 407,
- AArch64_CSELwwwc = 408,
- AArch64_CSELxxxc = 409,
- AArch64_CSINCwwwc = 410,
- AArch64_CSINCxxxc = 411,
- AArch64_CSINVwwwc = 412,
- AArch64_CSINVxxxc = 413,
- AArch64_CSNEGwwwc = 414,
- AArch64_CSNEGxxxc = 415,
- AArch64_DCPS1i = 416,
- AArch64_DCPS2i = 417,
- AArch64_DCPS3i = 418,
- AArch64_DCix = 419,
- AArch64_DMBi = 420,
- AArch64_DRPS = 421,
- AArch64_DSBi = 422,
- AArch64_DUP16b = 423,
- AArch64_DUP2d = 424,
- AArch64_DUP2s = 425,
- AArch64_DUP4h = 426,
- AArch64_DUP4s = 427,
- AArch64_DUP8b = 428,
- AArch64_DUP8h = 429,
- AArch64_DUPELT16b = 430,
- AArch64_DUPELT2d = 431,
- AArch64_DUPELT2s = 432,
- AArch64_DUPELT4h = 433,
- AArch64_DUPELT4s = 434,
- AArch64_DUPELT8b = 435,
- AArch64_DUPELT8h = 436,
- AArch64_DUPbv_B = 437,
- AArch64_DUPdv_D = 438,
- AArch64_DUPhv_H = 439,
- AArch64_DUPsv_S = 440,
- AArch64_EONwww_asr = 441,
- AArch64_EONwww_lsl = 442,
- AArch64_EONwww_lsr = 443,
- AArch64_EONwww_ror = 444,
- AArch64_EONxxx_asr = 445,
- AArch64_EONxxx_lsl = 446,
- AArch64_EONxxx_lsr = 447,
- AArch64_EONxxx_ror = 448,
- AArch64_EORvvv_16B = 449,
- AArch64_EORvvv_8B = 450,
- AArch64_EORwwi = 451,
- AArch64_EORwww_asr = 452,
- AArch64_EORwww_lsl = 453,
- AArch64_EORwww_lsr = 454,
- AArch64_EORwww_ror = 455,
- AArch64_EORxxi = 456,
- AArch64_EORxxx_asr = 457,
- AArch64_EORxxx_lsl = 458,
- AArch64_EORxxx_lsr = 459,
- AArch64_EORxxx_ror = 460,
- AArch64_ERET = 461,
- AArch64_EXTRwwwi = 462,
- AArch64_EXTRxxxi = 463,
- AArch64_EXTvvvi_16b = 464,
- AArch64_EXTvvvi_8b = 465,
- AArch64_F128CSEL = 466,
- AArch64_FABDddd = 467,
- AArch64_FABDsss = 468,
- AArch64_FABDvvv_2D = 469,
- AArch64_FABDvvv_2S = 470,
- AArch64_FABDvvv_4S = 471,
- AArch64_FABS2d = 472,
- AArch64_FABS2s = 473,
- AArch64_FABS4s = 474,
- AArch64_FABSdd = 475,
- AArch64_FABSss = 476,
- AArch64_FACGEddd = 477,
- AArch64_FACGEsss = 478,
- AArch64_FACGEvvv_2D = 479,
- AArch64_FACGEvvv_2S = 480,
- AArch64_FACGEvvv_4S = 481,
- AArch64_FACGTddd = 482,
- AArch64_FACGTsss = 483,
- AArch64_FACGTvvv_2D = 484,
- AArch64_FACGTvvv_2S = 485,
- AArch64_FACGTvvv_4S = 486,
- AArch64_FADDP_2D = 487,
- AArch64_FADDP_2S = 488,
- AArch64_FADDP_4S = 489,
- AArch64_FADDPvv_D_2D = 490,
- AArch64_FADDPvv_S_2S = 491,
- AArch64_FADDddd = 492,
- AArch64_FADDsss = 493,
- AArch64_FADDvvv_2D = 494,
- AArch64_FADDvvv_2S = 495,
- AArch64_FADDvvv_4S = 496,
- AArch64_FCCMPEdd = 497,
- AArch64_FCCMPEss = 498,
- AArch64_FCCMPdd = 499,
- AArch64_FCCMPss = 500,
- AArch64_FCMEQZddi = 501,
- AArch64_FCMEQZssi = 502,
- AArch64_FCMEQddd = 503,
- AArch64_FCMEQsss = 504,
- AArch64_FCMEQvvi_2D = 505,
- AArch64_FCMEQvvi_2S = 506,
- AArch64_FCMEQvvi_4S = 507,
- AArch64_FCMEQvvv_2D = 508,
- AArch64_FCMEQvvv_2S = 509,
- AArch64_FCMEQvvv_4S = 510,
- AArch64_FCMGEZddi = 511,
- AArch64_FCMGEZssi = 512,
- AArch64_FCMGEddd = 513,
- AArch64_FCMGEsss = 514,
- AArch64_FCMGEvvi_2D = 515,
- AArch64_FCMGEvvi_2S = 516,
- AArch64_FCMGEvvi_4S = 517,
- AArch64_FCMGEvvv_2D = 518,
- AArch64_FCMGEvvv_2S = 519,
- AArch64_FCMGEvvv_4S = 520,
- AArch64_FCMGTZddi = 521,
- AArch64_FCMGTZssi = 522,
- AArch64_FCMGTddd = 523,
- AArch64_FCMGTsss = 524,
- AArch64_FCMGTvvi_2D = 525,
- AArch64_FCMGTvvi_2S = 526,
- AArch64_FCMGTvvi_4S = 527,
- AArch64_FCMGTvvv_2D = 528,
- AArch64_FCMGTvvv_2S = 529,
- AArch64_FCMGTvvv_4S = 530,
- AArch64_FCMLEZddi = 531,
- AArch64_FCMLEZssi = 532,
- AArch64_FCMLEvvi_2D = 533,
- AArch64_FCMLEvvi_2S = 534,
- AArch64_FCMLEvvi_4S = 535,
- AArch64_FCMLTZddi = 536,
- AArch64_FCMLTZssi = 537,
- AArch64_FCMLTvvi_2D = 538,
- AArch64_FCMLTvvi_2S = 539,
- AArch64_FCMLTvvi_4S = 540,
- AArch64_FCMPdd_quiet = 541,
- AArch64_FCMPdd_sig = 542,
- AArch64_FCMPdi_quiet = 543,
- AArch64_FCMPdi_sig = 544,
- AArch64_FCMPsi_quiet = 545,
- AArch64_FCMPsi_sig = 546,
- AArch64_FCMPss_quiet = 547,
- AArch64_FCMPss_sig = 548,
- AArch64_FCSELdddc = 549,
- AArch64_FCSELsssc = 550,
- AArch64_FCVTAS_2d = 551,
- AArch64_FCVTAS_2s = 552,
- AArch64_FCVTAS_4s = 553,
- AArch64_FCVTASdd = 554,
- AArch64_FCVTASss = 555,
- AArch64_FCVTASwd = 556,
- AArch64_FCVTASws = 557,
- AArch64_FCVTASxd = 558,
- AArch64_FCVTASxs = 559,
- AArch64_FCVTAU_2d = 560,
- AArch64_FCVTAU_2s = 561,
- AArch64_FCVTAU_4s = 562,
- AArch64_FCVTAUdd = 563,
- AArch64_FCVTAUss = 564,
- AArch64_FCVTAUwd = 565,
- AArch64_FCVTAUws = 566,
- AArch64_FCVTAUxd = 567,
- AArch64_FCVTAUxs = 568,
- AArch64_FCVTL2s2d = 569,
- AArch64_FCVTL4h4s = 570,
- AArch64_FCVTL4s2d = 571,
- AArch64_FCVTL8h4s = 572,
- AArch64_FCVTMS_2d = 573,
- AArch64_FCVTMS_2s = 574,
- AArch64_FCVTMS_4s = 575,
- AArch64_FCVTMSdd = 576,
- AArch64_FCVTMSss = 577,
- AArch64_FCVTMSwd = 578,
- AArch64_FCVTMSws = 579,
- AArch64_FCVTMSxd = 580,
- AArch64_FCVTMSxs = 581,
- AArch64_FCVTMU_2d = 582,
- AArch64_FCVTMU_2s = 583,
- AArch64_FCVTMU_4s = 584,
- AArch64_FCVTMUdd = 585,
- AArch64_FCVTMUss = 586,
- AArch64_FCVTMUwd = 587,
- AArch64_FCVTMUws = 588,
- AArch64_FCVTMUxd = 589,
- AArch64_FCVTMUxs = 590,
- AArch64_FCVTN2d2s = 591,
- AArch64_FCVTN2d4s = 592,
- AArch64_FCVTN4s4h = 593,
- AArch64_FCVTN4s8h = 594,
- AArch64_FCVTNS_2d = 595,
- AArch64_FCVTNS_2s = 596,
- AArch64_FCVTNS_4s = 597,
- AArch64_FCVTNSdd = 598,
- AArch64_FCVTNSss = 599,
- AArch64_FCVTNSwd = 600,
- AArch64_FCVTNSws = 601,
- AArch64_FCVTNSxd = 602,
- AArch64_FCVTNSxs = 603,
- AArch64_FCVTNU_2d = 604,
- AArch64_FCVTNU_2s = 605,
- AArch64_FCVTNU_4s = 606,
- AArch64_FCVTNUdd = 607,
- AArch64_FCVTNUss = 608,
- AArch64_FCVTNUwd = 609,
- AArch64_FCVTNUws = 610,
- AArch64_FCVTNUxd = 611,
- AArch64_FCVTNUxs = 612,
- AArch64_FCVTPS_2d = 613,
- AArch64_FCVTPS_2s = 614,
- AArch64_FCVTPS_4s = 615,
- AArch64_FCVTPSdd = 616,
- AArch64_FCVTPSss = 617,
- AArch64_FCVTPSwd = 618,
- AArch64_FCVTPSws = 619,
- AArch64_FCVTPSxd = 620,
- AArch64_FCVTPSxs = 621,
- AArch64_FCVTPU_2d = 622,
- AArch64_FCVTPU_2s = 623,
- AArch64_FCVTPU_4s = 624,
- AArch64_FCVTPUdd = 625,
- AArch64_FCVTPUss = 626,
- AArch64_FCVTPUwd = 627,
- AArch64_FCVTPUws = 628,
- AArch64_FCVTPUxd = 629,
- AArch64_FCVTPUxs = 630,
- AArch64_FCVTXN = 631,
- AArch64_FCVTXN2d2s = 632,
- AArch64_FCVTXN2d4s = 633,
- AArch64_FCVTZS_2d = 634,
- AArch64_FCVTZS_2s = 635,
- AArch64_FCVTZS_4s = 636,
- AArch64_FCVTZS_Nddi = 637,
- AArch64_FCVTZS_Nssi = 638,
- AArch64_FCVTZSdd = 639,
- AArch64_FCVTZSss = 640,
- AArch64_FCVTZSwd = 641,
- AArch64_FCVTZSwdi = 642,
- AArch64_FCVTZSws = 643,
- AArch64_FCVTZSwsi = 644,
- AArch64_FCVTZSxd = 645,
- AArch64_FCVTZSxdi = 646,
- AArch64_FCVTZSxs = 647,
- AArch64_FCVTZSxsi = 648,
- AArch64_FCVTZU_2d = 649,
- AArch64_FCVTZU_2s = 650,
- AArch64_FCVTZU_4s = 651,
- AArch64_FCVTZU_Nddi = 652,
- AArch64_FCVTZU_Nssi = 653,
- AArch64_FCVTZUdd = 654,
- AArch64_FCVTZUss = 655,
- AArch64_FCVTZUwd = 656,
- AArch64_FCVTZUwdi = 657,
- AArch64_FCVTZUws = 658,
- AArch64_FCVTZUwsi = 659,
- AArch64_FCVTZUxd = 660,
- AArch64_FCVTZUxdi = 661,
- AArch64_FCVTZUxs = 662,
- AArch64_FCVTZUxsi = 663,
- AArch64_FCVTdh = 664,
- AArch64_FCVTds = 665,
- AArch64_FCVThd = 666,
- AArch64_FCVThs = 667,
- AArch64_FCVTsd = 668,
- AArch64_FCVTsh = 669,
- AArch64_FDIVddd = 670,
- AArch64_FDIVsss = 671,
- AArch64_FDIVvvv_2D = 672,
- AArch64_FDIVvvv_2S = 673,
- AArch64_FDIVvvv_4S = 674,
- AArch64_FMADDdddd = 675,
- AArch64_FMADDssss = 676,
- AArch64_FMAXNMPvv_D_2D = 677,
- AArch64_FMAXNMPvv_S_2S = 678,
- AArch64_FMAXNMPvvv_2D = 679,
- AArch64_FMAXNMPvvv_2S = 680,
- AArch64_FMAXNMPvvv_4S = 681,
- AArch64_FMAXNMV_1s4s = 682,
- AArch64_FMAXNMddd = 683,
- AArch64_FMAXNMsss = 684,
- AArch64_FMAXNMvvv_2D = 685,
- AArch64_FMAXNMvvv_2S = 686,
- AArch64_FMAXNMvvv_4S = 687,
- AArch64_FMAXPvv_D_2D = 688,
- AArch64_FMAXPvv_S_2S = 689,
- AArch64_FMAXPvvv_2D = 690,
- AArch64_FMAXPvvv_2S = 691,
- AArch64_FMAXPvvv_4S = 692,
- AArch64_FMAXV_1s4s = 693,
- AArch64_FMAXddd = 694,
- AArch64_FMAXsss = 695,
- AArch64_FMAXvvv_2D = 696,
- AArch64_FMAXvvv_2S = 697,
- AArch64_FMAXvvv_4S = 698,
- AArch64_FMINNMPvv_D_2D = 699,
- AArch64_FMINNMPvv_S_2S = 700,
- AArch64_FMINNMPvvv_2D = 701,
- AArch64_FMINNMPvvv_2S = 702,
- AArch64_FMINNMPvvv_4S = 703,
- AArch64_FMINNMV_1s4s = 704,
- AArch64_FMINNMddd = 705,
- AArch64_FMINNMsss = 706,
- AArch64_FMINNMvvv_2D = 707,
- AArch64_FMINNMvvv_2S = 708,
- AArch64_FMINNMvvv_4S = 709,
- AArch64_FMINPvv_D_2D = 710,
- AArch64_FMINPvv_S_2S = 711,
- AArch64_FMINPvvv_2D = 712,
- AArch64_FMINPvvv_2S = 713,
- AArch64_FMINPvvv_4S = 714,
- AArch64_FMINV_1s4s = 715,
- AArch64_FMINddd = 716,
- AArch64_FMINsss = 717,
- AArch64_FMINvvv_2D = 718,
- AArch64_FMINvvv_2S = 719,
- AArch64_FMINvvv_4S = 720,
- AArch64_FMLAddv_2D = 721,
- AArch64_FMLAssv_4S = 722,
- AArch64_FMLAvve_2d2d = 723,
- AArch64_FMLAvve_2s4s = 724,
- AArch64_FMLAvve_4s4s = 725,
- AArch64_FMLAvvv_2D = 726,
- AArch64_FMLAvvv_2S = 727,
- AArch64_FMLAvvv_4S = 728,
- AArch64_FMLSddv_2D = 729,
- AArch64_FMLSssv_4S = 730,
- AArch64_FMLSvve_2d2d = 731,
- AArch64_FMLSvve_2s4s = 732,
- AArch64_FMLSvve_4s4s = 733,
- AArch64_FMLSvvv_2D = 734,
- AArch64_FMLSvvv_2S = 735,
- AArch64_FMLSvvv_4S = 736,
- AArch64_FMOVdd = 737,
- AArch64_FMOVdi = 738,
- AArch64_FMOVdx = 739,
- AArch64_FMOVsi = 740,
- AArch64_FMOVss = 741,
- AArch64_FMOVsw = 742,
- AArch64_FMOVvi_2D = 743,
- AArch64_FMOVvi_2S = 744,
- AArch64_FMOVvi_4S = 745,
- AArch64_FMOVvx = 746,
- AArch64_FMOVws = 747,
- AArch64_FMOVxd = 748,
- AArch64_FMOVxv = 749,
- AArch64_FMSUBdddd = 750,
- AArch64_FMSUBssss = 751,
- AArch64_FMULXddd = 752,
- AArch64_FMULXddv_2D = 753,
- AArch64_FMULXsss = 754,
- AArch64_FMULXssv_4S = 755,
- AArch64_FMULXve_2d2d = 756,
- AArch64_FMULXve_2s4s = 757,
- AArch64_FMULXve_4s4s = 758,
- AArch64_FMULXvvv_2D = 759,
- AArch64_FMULXvvv_2S = 760,
- AArch64_FMULXvvv_4S = 761,
- AArch64_FMULddd = 762,
- AArch64_FMULddv_2D = 763,
- AArch64_FMULsss = 764,
- AArch64_FMULssv_4S = 765,
- AArch64_FMULve_2d2d = 766,
- AArch64_FMULve_2s4s = 767,
- AArch64_FMULve_4s4s = 768,
- AArch64_FMULvvv_2D = 769,
- AArch64_FMULvvv_2S = 770,
- AArch64_FMULvvv_4S = 771,
- AArch64_FNEG2d = 772,
- AArch64_FNEG2s = 773,
- AArch64_FNEG4s = 774,
- AArch64_FNEGdd = 775,
- AArch64_FNEGss = 776,
- AArch64_FNMADDdddd = 777,
- AArch64_FNMADDssss = 778,
- AArch64_FNMSUBdddd = 779,
- AArch64_FNMSUBssss = 780,
- AArch64_FNMULddd = 781,
- AArch64_FNMULsss = 782,
- AArch64_FRECPE_2d = 783,
- AArch64_FRECPE_2s = 784,
- AArch64_FRECPE_4s = 785,
- AArch64_FRECPEdd = 786,
- AArch64_FRECPEss = 787,
- AArch64_FRECPSddd = 788,
- AArch64_FRECPSsss = 789,
- AArch64_FRECPSvvv_2D = 790,
- AArch64_FRECPSvvv_2S = 791,
- AArch64_FRECPSvvv_4S = 792,
- AArch64_FRECPXdd = 793,
- AArch64_FRECPXss = 794,
- AArch64_FRINTA_2d = 795,
- AArch64_FRINTA_2s = 796,
- AArch64_FRINTA_4s = 797,
- AArch64_FRINTAdd = 798,
- AArch64_FRINTAss = 799,
- AArch64_FRINTI_2d = 800,
- AArch64_FRINTI_2s = 801,
- AArch64_FRINTI_4s = 802,
- AArch64_FRINTIdd = 803,
- AArch64_FRINTIss = 804,
- AArch64_FRINTM_2d = 805,
- AArch64_FRINTM_2s = 806,
- AArch64_FRINTM_4s = 807,
- AArch64_FRINTMdd = 808,
- AArch64_FRINTMss = 809,
- AArch64_FRINTN_2d = 810,
- AArch64_FRINTN_2s = 811,
- AArch64_FRINTN_4s = 812,
- AArch64_FRINTNdd = 813,
- AArch64_FRINTNss = 814,
- AArch64_FRINTP_2d = 815,
- AArch64_FRINTP_2s = 816,
- AArch64_FRINTP_4s = 817,
- AArch64_FRINTPdd = 818,
- AArch64_FRINTPss = 819,
- AArch64_FRINTX_2d = 820,
- AArch64_FRINTX_2s = 821,
- AArch64_FRINTX_4s = 822,
- AArch64_FRINTXdd = 823,
- AArch64_FRINTXss = 824,
- AArch64_FRINTZ_2d = 825,
- AArch64_FRINTZ_2s = 826,
- AArch64_FRINTZ_4s = 827,
- AArch64_FRINTZdd = 828,
- AArch64_FRINTZss = 829,
- AArch64_FRSQRTE_2d = 830,
- AArch64_FRSQRTE_2s = 831,
- AArch64_FRSQRTE_4s = 832,
- AArch64_FRSQRTEdd = 833,
- AArch64_FRSQRTEss = 834,
- AArch64_FRSQRTSddd = 835,
- AArch64_FRSQRTSsss = 836,
- AArch64_FRSQRTSvvv_2D = 837,
- AArch64_FRSQRTSvvv_2S = 838,
- AArch64_FRSQRTSvvv_4S = 839,
- AArch64_FSQRT_2d = 840,
- AArch64_FSQRT_2s = 841,
- AArch64_FSQRT_4s = 842,
- AArch64_FSQRTdd = 843,
- AArch64_FSQRTss = 844,
- AArch64_FSUBddd = 845,
- AArch64_FSUBsss = 846,
- AArch64_FSUBvvv_2D = 847,
- AArch64_FSUBvvv_2S = 848,
- AArch64_FSUBvvv_4S = 849,
- AArch64_HINTi = 850,
- AArch64_HLTi = 851,
- AArch64_HVCi = 852,
- AArch64_ICi = 853,
- AArch64_ICix = 854,
- AArch64_INSELb = 855,
- AArch64_INSELd = 856,
- AArch64_INSELh = 857,
- AArch64_INSELs = 858,
- AArch64_INSbw = 859,
- AArch64_INSdx = 860,
- AArch64_INShw = 861,
- AArch64_INSsw = 862,
- AArch64_ISBi = 863,
- AArch64_LD1LN_B = 864,
- AArch64_LD1LN_D = 865,
- AArch64_LD1LN_H = 866,
- AArch64_LD1LN_S = 867,
- AArch64_LD1LN_WB_B_fixed = 868,
- AArch64_LD1LN_WB_B_register = 869,
- AArch64_LD1LN_WB_D_fixed = 870,
- AArch64_LD1LN_WB_D_register = 871,
- AArch64_LD1LN_WB_H_fixed = 872,
- AArch64_LD1LN_WB_H_register = 873,
- AArch64_LD1LN_WB_S_fixed = 874,
- AArch64_LD1LN_WB_S_register = 875,
- AArch64_LD1R_16B = 876,
- AArch64_LD1R_1D = 877,
- AArch64_LD1R_2D = 878,
- AArch64_LD1R_2S = 879,
- AArch64_LD1R_4H = 880,
- AArch64_LD1R_4S = 881,
- AArch64_LD1R_8B = 882,
- AArch64_LD1R_8H = 883,
- AArch64_LD1R_WB_16B_fixed = 884,
- AArch64_LD1R_WB_16B_register = 885,
- AArch64_LD1R_WB_1D_fixed = 886,
- AArch64_LD1R_WB_1D_register = 887,
- AArch64_LD1R_WB_2D_fixed = 888,
- AArch64_LD1R_WB_2D_register = 889,
- AArch64_LD1R_WB_2S_fixed = 890,
- AArch64_LD1R_WB_2S_register = 891,
- AArch64_LD1R_WB_4H_fixed = 892,
- AArch64_LD1R_WB_4H_register = 893,
- AArch64_LD1R_WB_4S_fixed = 894,
- AArch64_LD1R_WB_4S_register = 895,
- AArch64_LD1R_WB_8B_fixed = 896,
- AArch64_LD1R_WB_8B_register = 897,
- AArch64_LD1R_WB_8H_fixed = 898,
- AArch64_LD1R_WB_8H_register = 899,
- AArch64_LD1WB_16B_fixed = 900,
- AArch64_LD1WB_16B_register = 901,
- AArch64_LD1WB_1D_fixed = 902,
- AArch64_LD1WB_1D_register = 903,
- AArch64_LD1WB_2D_fixed = 904,
- AArch64_LD1WB_2D_register = 905,
- AArch64_LD1WB_2S_fixed = 906,
- AArch64_LD1WB_2S_register = 907,
- AArch64_LD1WB_4H_fixed = 908,
- AArch64_LD1WB_4H_register = 909,
- AArch64_LD1WB_4S_fixed = 910,
- AArch64_LD1WB_4S_register = 911,
- AArch64_LD1WB_8B_fixed = 912,
- AArch64_LD1WB_8B_register = 913,
- AArch64_LD1WB_8H_fixed = 914,
- AArch64_LD1WB_8H_register = 915,
- AArch64_LD1_16B = 916,
- AArch64_LD1_1D = 917,
- AArch64_LD1_2D = 918,
- AArch64_LD1_2S = 919,
- AArch64_LD1_4H = 920,
- AArch64_LD1_4S = 921,
- AArch64_LD1_8B = 922,
- AArch64_LD1_8H = 923,
- AArch64_LD1x2WB_16B_fixed = 924,
- AArch64_LD1x2WB_16B_register = 925,
- AArch64_LD1x2WB_1D_fixed = 926,
- AArch64_LD1x2WB_1D_register = 927,
- AArch64_LD1x2WB_2D_fixed = 928,
- AArch64_LD1x2WB_2D_register = 929,
- AArch64_LD1x2WB_2S_fixed = 930,
- AArch64_LD1x2WB_2S_register = 931,
- AArch64_LD1x2WB_4H_fixed = 932,
- AArch64_LD1x2WB_4H_register = 933,
- AArch64_LD1x2WB_4S_fixed = 934,
- AArch64_LD1x2WB_4S_register = 935,
- AArch64_LD1x2WB_8B_fixed = 936,
- AArch64_LD1x2WB_8B_register = 937,
- AArch64_LD1x2WB_8H_fixed = 938,
- AArch64_LD1x2WB_8H_register = 939,
- AArch64_LD1x2_16B = 940,
- AArch64_LD1x2_1D = 941,
- AArch64_LD1x2_2D = 942,
- AArch64_LD1x2_2S = 943,
- AArch64_LD1x2_4H = 944,
- AArch64_LD1x2_4S = 945,
- AArch64_LD1x2_8B = 946,
- AArch64_LD1x2_8H = 947,
- AArch64_LD1x3WB_16B_fixed = 948,
- AArch64_LD1x3WB_16B_register = 949,
- AArch64_LD1x3WB_1D_fixed = 950,
- AArch64_LD1x3WB_1D_register = 951,
- AArch64_LD1x3WB_2D_fixed = 952,
- AArch64_LD1x3WB_2D_register = 953,
- AArch64_LD1x3WB_2S_fixed = 954,
- AArch64_LD1x3WB_2S_register = 955,
- AArch64_LD1x3WB_4H_fixed = 956,
- AArch64_LD1x3WB_4H_register = 957,
- AArch64_LD1x3WB_4S_fixed = 958,
- AArch64_LD1x3WB_4S_register = 959,
- AArch64_LD1x3WB_8B_fixed = 960,
- AArch64_LD1x3WB_8B_register = 961,
- AArch64_LD1x3WB_8H_fixed = 962,
- AArch64_LD1x3WB_8H_register = 963,
- AArch64_LD1x3_16B = 964,
- AArch64_LD1x3_1D = 965,
- AArch64_LD1x3_2D = 966,
- AArch64_LD1x3_2S = 967,
- AArch64_LD1x3_4H = 968,
- AArch64_LD1x3_4S = 969,
- AArch64_LD1x3_8B = 970,
- AArch64_LD1x3_8H = 971,
- AArch64_LD1x4WB_16B_fixed = 972,
- AArch64_LD1x4WB_16B_register = 973,
- AArch64_LD1x4WB_1D_fixed = 974,
- AArch64_LD1x4WB_1D_register = 975,
- AArch64_LD1x4WB_2D_fixed = 976,
- AArch64_LD1x4WB_2D_register = 977,
- AArch64_LD1x4WB_2S_fixed = 978,
- AArch64_LD1x4WB_2S_register = 979,
- AArch64_LD1x4WB_4H_fixed = 980,
- AArch64_LD1x4WB_4H_register = 981,
- AArch64_LD1x4WB_4S_fixed = 982,
- AArch64_LD1x4WB_4S_register = 983,
- AArch64_LD1x4WB_8B_fixed = 984,
- AArch64_LD1x4WB_8B_register = 985,
- AArch64_LD1x4WB_8H_fixed = 986,
- AArch64_LD1x4WB_8H_register = 987,
- AArch64_LD1x4_16B = 988,
- AArch64_LD1x4_1D = 989,
- AArch64_LD1x4_2D = 990,
- AArch64_LD1x4_2S = 991,
- AArch64_LD1x4_4H = 992,
- AArch64_LD1x4_4S = 993,
- AArch64_LD1x4_8B = 994,
- AArch64_LD1x4_8H = 995,
- AArch64_LD2LN_B = 996,
- AArch64_LD2LN_D = 997,
- AArch64_LD2LN_H = 998,
- AArch64_LD2LN_S = 999,
- AArch64_LD2LN_WB_B_fixed = 1000,
- AArch64_LD2LN_WB_B_register = 1001,
- AArch64_LD2LN_WB_D_fixed = 1002,
- AArch64_LD2LN_WB_D_register = 1003,
- AArch64_LD2LN_WB_H_fixed = 1004,
- AArch64_LD2LN_WB_H_register = 1005,
- AArch64_LD2LN_WB_S_fixed = 1006,
- AArch64_LD2LN_WB_S_register = 1007,
- AArch64_LD2R_16B = 1008,
- AArch64_LD2R_1D = 1009,
- AArch64_LD2R_2D = 1010,
- AArch64_LD2R_2S = 1011,
- AArch64_LD2R_4H = 1012,
- AArch64_LD2R_4S = 1013,
- AArch64_LD2R_8B = 1014,
- AArch64_LD2R_8H = 1015,
- AArch64_LD2R_WB_16B_fixed = 1016,
- AArch64_LD2R_WB_16B_register = 1017,
- AArch64_LD2R_WB_1D_fixed = 1018,
- AArch64_LD2R_WB_1D_register = 1019,
- AArch64_LD2R_WB_2D_fixed = 1020,
- AArch64_LD2R_WB_2D_register = 1021,
- AArch64_LD2R_WB_2S_fixed = 1022,
- AArch64_LD2R_WB_2S_register = 1023,
- AArch64_LD2R_WB_4H_fixed = 1024,
- AArch64_LD2R_WB_4H_register = 1025,
- AArch64_LD2R_WB_4S_fixed = 1026,
- AArch64_LD2R_WB_4S_register = 1027,
- AArch64_LD2R_WB_8B_fixed = 1028,
- AArch64_LD2R_WB_8B_register = 1029,
- AArch64_LD2R_WB_8H_fixed = 1030,
- AArch64_LD2R_WB_8H_register = 1031,
- AArch64_LD2WB_16B_fixed = 1032,
- AArch64_LD2WB_16B_register = 1033,
- AArch64_LD2WB_2D_fixed = 1034,
- AArch64_LD2WB_2D_register = 1035,
- AArch64_LD2WB_2S_fixed = 1036,
- AArch64_LD2WB_2S_register = 1037,
- AArch64_LD2WB_4H_fixed = 1038,
- AArch64_LD2WB_4H_register = 1039,
- AArch64_LD2WB_4S_fixed = 1040,
- AArch64_LD2WB_4S_register = 1041,
- AArch64_LD2WB_8B_fixed = 1042,
- AArch64_LD2WB_8B_register = 1043,
- AArch64_LD2WB_8H_fixed = 1044,
- AArch64_LD2WB_8H_register = 1045,
- AArch64_LD2_16B = 1046,
- AArch64_LD2_2D = 1047,
- AArch64_LD2_2S = 1048,
- AArch64_LD2_4H = 1049,
- AArch64_LD2_4S = 1050,
- AArch64_LD2_8B = 1051,
- AArch64_LD2_8H = 1052,
- AArch64_LD3LN_B = 1053,
- AArch64_LD3LN_D = 1054,
- AArch64_LD3LN_H = 1055,
- AArch64_LD3LN_S = 1056,
- AArch64_LD3LN_WB_B_fixed = 1057,
- AArch64_LD3LN_WB_B_register = 1058,
- AArch64_LD3LN_WB_D_fixed = 1059,
- AArch64_LD3LN_WB_D_register = 1060,
- AArch64_LD3LN_WB_H_fixed = 1061,
- AArch64_LD3LN_WB_H_register = 1062,
- AArch64_LD3LN_WB_S_fixed = 1063,
- AArch64_LD3LN_WB_S_register = 1064,
- AArch64_LD3R_16B = 1065,
- AArch64_LD3R_1D = 1066,
- AArch64_LD3R_2D = 1067,
- AArch64_LD3R_2S = 1068,
- AArch64_LD3R_4H = 1069,
- AArch64_LD3R_4S = 1070,
- AArch64_LD3R_8B = 1071,
- AArch64_LD3R_8H = 1072,
- AArch64_LD3R_WB_16B_fixed = 1073,
- AArch64_LD3R_WB_16B_register = 1074,
- AArch64_LD3R_WB_1D_fixed = 1075,
- AArch64_LD3R_WB_1D_register = 1076,
- AArch64_LD3R_WB_2D_fixed = 1077,
- AArch64_LD3R_WB_2D_register = 1078,
- AArch64_LD3R_WB_2S_fixed = 1079,
- AArch64_LD3R_WB_2S_register = 1080,
- AArch64_LD3R_WB_4H_fixed = 1081,
- AArch64_LD3R_WB_4H_register = 1082,
- AArch64_LD3R_WB_4S_fixed = 1083,
- AArch64_LD3R_WB_4S_register = 1084,
- AArch64_LD3R_WB_8B_fixed = 1085,
- AArch64_LD3R_WB_8B_register = 1086,
- AArch64_LD3R_WB_8H_fixed = 1087,
- AArch64_LD3R_WB_8H_register = 1088,
- AArch64_LD3WB_16B_fixed = 1089,
- AArch64_LD3WB_16B_register = 1090,
- AArch64_LD3WB_2D_fixed = 1091,
- AArch64_LD3WB_2D_register = 1092,
- AArch64_LD3WB_2S_fixed = 1093,
- AArch64_LD3WB_2S_register = 1094,
- AArch64_LD3WB_4H_fixed = 1095,
- AArch64_LD3WB_4H_register = 1096,
- AArch64_LD3WB_4S_fixed = 1097,
- AArch64_LD3WB_4S_register = 1098,
- AArch64_LD3WB_8B_fixed = 1099,
- AArch64_LD3WB_8B_register = 1100,
- AArch64_LD3WB_8H_fixed = 1101,
- AArch64_LD3WB_8H_register = 1102,
- AArch64_LD3_16B = 1103,
- AArch64_LD3_2D = 1104,
- AArch64_LD3_2S = 1105,
- AArch64_LD3_4H = 1106,
- AArch64_LD3_4S = 1107,
- AArch64_LD3_8B = 1108,
- AArch64_LD3_8H = 1109,
- AArch64_LD4LN_B = 1110,
- AArch64_LD4LN_D = 1111,
- AArch64_LD4LN_H = 1112,
- AArch64_LD4LN_S = 1113,
- AArch64_LD4LN_WB_B_fixed = 1114,
- AArch64_LD4LN_WB_B_register = 1115,
- AArch64_LD4LN_WB_D_fixed = 1116,
- AArch64_LD4LN_WB_D_register = 1117,
- AArch64_LD4LN_WB_H_fixed = 1118,
- AArch64_LD4LN_WB_H_register = 1119,
- AArch64_LD4LN_WB_S_fixed = 1120,
- AArch64_LD4LN_WB_S_register = 1121,
- AArch64_LD4R_16B = 1122,
- AArch64_LD4R_1D = 1123,
- AArch64_LD4R_2D = 1124,
- AArch64_LD4R_2S = 1125,
- AArch64_LD4R_4H = 1126,
- AArch64_LD4R_4S = 1127,
- AArch64_LD4R_8B = 1128,
- AArch64_LD4R_8H = 1129,
- AArch64_LD4R_WB_16B_fixed = 1130,
- AArch64_LD4R_WB_16B_register = 1131,
- AArch64_LD4R_WB_1D_fixed = 1132,
- AArch64_LD4R_WB_1D_register = 1133,
- AArch64_LD4R_WB_2D_fixed = 1134,
- AArch64_LD4R_WB_2D_register = 1135,
- AArch64_LD4R_WB_2S_fixed = 1136,
- AArch64_LD4R_WB_2S_register = 1137,
- AArch64_LD4R_WB_4H_fixed = 1138,
- AArch64_LD4R_WB_4H_register = 1139,
- AArch64_LD4R_WB_4S_fixed = 1140,
- AArch64_LD4R_WB_4S_register = 1141,
- AArch64_LD4R_WB_8B_fixed = 1142,
- AArch64_LD4R_WB_8B_register = 1143,
- AArch64_LD4R_WB_8H_fixed = 1144,
- AArch64_LD4R_WB_8H_register = 1145,
- AArch64_LD4WB_16B_fixed = 1146,
- AArch64_LD4WB_16B_register = 1147,
- AArch64_LD4WB_2D_fixed = 1148,
- AArch64_LD4WB_2D_register = 1149,
- AArch64_LD4WB_2S_fixed = 1150,
- AArch64_LD4WB_2S_register = 1151,
- AArch64_LD4WB_4H_fixed = 1152,
- AArch64_LD4WB_4H_register = 1153,
- AArch64_LD4WB_4S_fixed = 1154,
- AArch64_LD4WB_4S_register = 1155,
- AArch64_LD4WB_8B_fixed = 1156,
- AArch64_LD4WB_8B_register = 1157,
- AArch64_LD4WB_8H_fixed = 1158,
- AArch64_LD4WB_8H_register = 1159,
- AArch64_LD4_16B = 1160,
- AArch64_LD4_2D = 1161,
- AArch64_LD4_2S = 1162,
- AArch64_LD4_4H = 1163,
- AArch64_LD4_4S = 1164,
- AArch64_LD4_8B = 1165,
- AArch64_LD4_8H = 1166,
- AArch64_LDAR_byte = 1167,
- AArch64_LDAR_dword = 1168,
- AArch64_LDAR_hword = 1169,
- AArch64_LDAR_word = 1170,
- AArch64_LDAXP_dword = 1171,
- AArch64_LDAXP_word = 1172,
- AArch64_LDAXR_byte = 1173,
- AArch64_LDAXR_dword = 1174,
- AArch64_LDAXR_hword = 1175,
- AArch64_LDAXR_word = 1176,
- AArch64_LDPSWx = 1177,
- AArch64_LDPSWx_PostInd = 1178,
- AArch64_LDPSWx_PreInd = 1179,
- AArch64_LDRSBw = 1180,
- AArch64_LDRSBw_PostInd = 1181,
- AArch64_LDRSBw_PreInd = 1182,
- AArch64_LDRSBw_U = 1183,
- AArch64_LDRSBw_Wm_RegOffset = 1184,
- AArch64_LDRSBw_Xm_RegOffset = 1185,
- AArch64_LDRSBx = 1186,
- AArch64_LDRSBx_PostInd = 1187,
- AArch64_LDRSBx_PreInd = 1188,
- AArch64_LDRSBx_U = 1189,
- AArch64_LDRSBx_Wm_RegOffset = 1190,
- AArch64_LDRSBx_Xm_RegOffset = 1191,
- AArch64_LDRSHw = 1192,
- AArch64_LDRSHw_PostInd = 1193,
- AArch64_LDRSHw_PreInd = 1194,
- AArch64_LDRSHw_U = 1195,
- AArch64_LDRSHw_Wm_RegOffset = 1196,
- AArch64_LDRSHw_Xm_RegOffset = 1197,
- AArch64_LDRSHx = 1198,
- AArch64_LDRSHx_PostInd = 1199,
- AArch64_LDRSHx_PreInd = 1200,
- AArch64_LDRSHx_U = 1201,
- AArch64_LDRSHx_Wm_RegOffset = 1202,
- AArch64_LDRSHx_Xm_RegOffset = 1203,
- AArch64_LDRSWx = 1204,
- AArch64_LDRSWx_PostInd = 1205,
- AArch64_LDRSWx_PreInd = 1206,
- AArch64_LDRSWx_Wm_RegOffset = 1207,
- AArch64_LDRSWx_Xm_RegOffset = 1208,
- AArch64_LDRSWx_lit = 1209,
- AArch64_LDRd_lit = 1210,
- AArch64_LDRq_lit = 1211,
- AArch64_LDRs_lit = 1212,
- AArch64_LDRw_lit = 1213,
- AArch64_LDRx_lit = 1214,
- AArch64_LDTRSBw = 1215,
- AArch64_LDTRSBx = 1216,
- AArch64_LDTRSHw = 1217,
- AArch64_LDTRSHx = 1218,
- AArch64_LDTRSWx = 1219,
- AArch64_LDURSWx = 1220,
- AArch64_LDXP_dword = 1221,
- AArch64_LDXP_word = 1222,
- AArch64_LDXR_byte = 1223,
- AArch64_LDXR_dword = 1224,
- AArch64_LDXR_hword = 1225,
- AArch64_LDXR_word = 1226,
- AArch64_LS16_LDR = 1227,
- AArch64_LS16_LDUR = 1228,
- AArch64_LS16_PostInd_LDR = 1229,
- AArch64_LS16_PostInd_STR = 1230,
- AArch64_LS16_PreInd_LDR = 1231,
- AArch64_LS16_PreInd_STR = 1232,
- AArch64_LS16_STR = 1233,
- AArch64_LS16_STUR = 1234,
- AArch64_LS16_UnPriv_LDR = 1235,
- AArch64_LS16_UnPriv_STR = 1236,
- AArch64_LS16_Wm_RegOffset_LDR = 1237,
- AArch64_LS16_Wm_RegOffset_STR = 1238,
- AArch64_LS16_Xm_RegOffset_LDR = 1239,
- AArch64_LS16_Xm_RegOffset_STR = 1240,
- AArch64_LS32_LDR = 1241,
- AArch64_LS32_LDUR = 1242,
- AArch64_LS32_PostInd_LDR = 1243,
- AArch64_LS32_PostInd_STR = 1244,
- AArch64_LS32_PreInd_LDR = 1245,
- AArch64_LS32_PreInd_STR = 1246,
- AArch64_LS32_STR = 1247,
- AArch64_LS32_STUR = 1248,
- AArch64_LS32_UnPriv_LDR = 1249,
- AArch64_LS32_UnPriv_STR = 1250,
- AArch64_LS32_Wm_RegOffset_LDR = 1251,
- AArch64_LS32_Wm_RegOffset_STR = 1252,
- AArch64_LS32_Xm_RegOffset_LDR = 1253,
- AArch64_LS32_Xm_RegOffset_STR = 1254,
- AArch64_LS64_LDR = 1255,
- AArch64_LS64_LDUR = 1256,
- AArch64_LS64_PostInd_LDR = 1257,
- AArch64_LS64_PostInd_STR = 1258,
- AArch64_LS64_PreInd_LDR = 1259,
- AArch64_LS64_PreInd_STR = 1260,
- AArch64_LS64_STR = 1261,
- AArch64_LS64_STUR = 1262,
- AArch64_LS64_UnPriv_LDR = 1263,
- AArch64_LS64_UnPriv_STR = 1264,
- AArch64_LS64_Wm_RegOffset_LDR = 1265,
- AArch64_LS64_Wm_RegOffset_STR = 1266,
- AArch64_LS64_Xm_RegOffset_LDR = 1267,
- AArch64_LS64_Xm_RegOffset_STR = 1268,
- AArch64_LS8_LDR = 1269,
- AArch64_LS8_LDUR = 1270,
- AArch64_LS8_PostInd_LDR = 1271,
- AArch64_LS8_PostInd_STR = 1272,
- AArch64_LS8_PreInd_LDR = 1273,
- AArch64_LS8_PreInd_STR = 1274,
- AArch64_LS8_STR = 1275,
- AArch64_LS8_STUR = 1276,
- AArch64_LS8_UnPriv_LDR = 1277,
- AArch64_LS8_UnPriv_STR = 1278,
- AArch64_LS8_Wm_RegOffset_LDR = 1279,
- AArch64_LS8_Wm_RegOffset_STR = 1280,
- AArch64_LS8_Xm_RegOffset_LDR = 1281,
- AArch64_LS8_Xm_RegOffset_STR = 1282,
- AArch64_LSFP128_LDR = 1283,
- AArch64_LSFP128_LDUR = 1284,
- AArch64_LSFP128_PostInd_LDR = 1285,
- AArch64_LSFP128_PostInd_STR = 1286,
- AArch64_LSFP128_PreInd_LDR = 1287,
- AArch64_LSFP128_PreInd_STR = 1288,
- AArch64_LSFP128_STR = 1289,
- AArch64_LSFP128_STUR = 1290,
- AArch64_LSFP128_Wm_RegOffset_LDR = 1291,
- AArch64_LSFP128_Wm_RegOffset_STR = 1292,
- AArch64_LSFP128_Xm_RegOffset_LDR = 1293,
- AArch64_LSFP128_Xm_RegOffset_STR = 1294,
- AArch64_LSFP16_LDR = 1295,
- AArch64_LSFP16_LDUR = 1296,
- AArch64_LSFP16_PostInd_LDR = 1297,
- AArch64_LSFP16_PostInd_STR = 1298,
- AArch64_LSFP16_PreInd_LDR = 1299,
- AArch64_LSFP16_PreInd_STR = 1300,
- AArch64_LSFP16_STR = 1301,
- AArch64_LSFP16_STUR = 1302,
- AArch64_LSFP16_Wm_RegOffset_LDR = 1303,
- AArch64_LSFP16_Wm_RegOffset_STR = 1304,
- AArch64_LSFP16_Xm_RegOffset_LDR = 1305,
- AArch64_LSFP16_Xm_RegOffset_STR = 1306,
- AArch64_LSFP32_LDR = 1307,
- AArch64_LSFP32_LDUR = 1308,
- AArch64_LSFP32_PostInd_LDR = 1309,
- AArch64_LSFP32_PostInd_STR = 1310,
- AArch64_LSFP32_PreInd_LDR = 1311,
- AArch64_LSFP32_PreInd_STR = 1312,
- AArch64_LSFP32_STR = 1313,
- AArch64_LSFP32_STUR = 1314,
- AArch64_LSFP32_Wm_RegOffset_LDR = 1315,
- AArch64_LSFP32_Wm_RegOffset_STR = 1316,
- AArch64_LSFP32_Xm_RegOffset_LDR = 1317,
- AArch64_LSFP32_Xm_RegOffset_STR = 1318,
- AArch64_LSFP64_LDR = 1319,
- AArch64_LSFP64_LDUR = 1320,
- AArch64_LSFP64_PostInd_LDR = 1321,
- AArch64_LSFP64_PostInd_STR = 1322,
- AArch64_LSFP64_PreInd_LDR = 1323,
- AArch64_LSFP64_PreInd_STR = 1324,
- AArch64_LSFP64_STR = 1325,
- AArch64_LSFP64_STUR = 1326,
- AArch64_LSFP64_Wm_RegOffset_LDR = 1327,
- AArch64_LSFP64_Wm_RegOffset_STR = 1328,
- AArch64_LSFP64_Xm_RegOffset_LDR = 1329,
- AArch64_LSFP64_Xm_RegOffset_STR = 1330,
- AArch64_LSFP8_LDR = 1331,
- AArch64_LSFP8_LDUR = 1332,
- AArch64_LSFP8_PostInd_LDR = 1333,
- AArch64_LSFP8_PostInd_STR = 1334,
- AArch64_LSFP8_PreInd_LDR = 1335,
- AArch64_LSFP8_PreInd_STR = 1336,
- AArch64_LSFP8_STR = 1337,
- AArch64_LSFP8_STUR = 1338,
- AArch64_LSFP8_Wm_RegOffset_LDR = 1339,
- AArch64_LSFP8_Wm_RegOffset_STR = 1340,
- AArch64_LSFP8_Xm_RegOffset_LDR = 1341,
- AArch64_LSFP8_Xm_RegOffset_STR = 1342,
- AArch64_LSFPPair128_LDR = 1343,
- AArch64_LSFPPair128_NonTemp_LDR = 1344,
- AArch64_LSFPPair128_NonTemp_STR = 1345,
- AArch64_LSFPPair128_PostInd_LDR = 1346,
- AArch64_LSFPPair128_PostInd_STR = 1347,
- AArch64_LSFPPair128_PreInd_LDR = 1348,
- AArch64_LSFPPair128_PreInd_STR = 1349,
- AArch64_LSFPPair128_STR = 1350,
- AArch64_LSFPPair32_LDR = 1351,
- AArch64_LSFPPair32_NonTemp_LDR = 1352,
- AArch64_LSFPPair32_NonTemp_STR = 1353,
- AArch64_LSFPPair32_PostInd_LDR = 1354,
- AArch64_LSFPPair32_PostInd_STR = 1355,
- AArch64_LSFPPair32_PreInd_LDR = 1356,
- AArch64_LSFPPair32_PreInd_STR = 1357,
- AArch64_LSFPPair32_STR = 1358,
- AArch64_LSFPPair64_LDR = 1359,
- AArch64_LSFPPair64_NonTemp_LDR = 1360,
- AArch64_LSFPPair64_NonTemp_STR = 1361,
- AArch64_LSFPPair64_PostInd_LDR = 1362,
- AArch64_LSFPPair64_PostInd_STR = 1363,
- AArch64_LSFPPair64_PreInd_LDR = 1364,
- AArch64_LSFPPair64_PreInd_STR = 1365,
- AArch64_LSFPPair64_STR = 1366,
- AArch64_LSLVwww = 1367,
- AArch64_LSLVxxx = 1368,
- AArch64_LSLwwi = 1369,
- AArch64_LSLxxi = 1370,
- AArch64_LSPair32_LDR = 1371,
- AArch64_LSPair32_NonTemp_LDR = 1372,
- AArch64_LSPair32_NonTemp_STR = 1373,
- AArch64_LSPair32_PostInd_LDR = 1374,
- AArch64_LSPair32_PostInd_STR = 1375,
- AArch64_LSPair32_PreInd_LDR = 1376,
- AArch64_LSPair32_PreInd_STR = 1377,
- AArch64_LSPair32_STR = 1378,
- AArch64_LSPair64_LDR = 1379,
- AArch64_LSPair64_NonTemp_LDR = 1380,
- AArch64_LSPair64_NonTemp_STR = 1381,
- AArch64_LSPair64_PostInd_LDR = 1382,
- AArch64_LSPair64_PostInd_STR = 1383,
- AArch64_LSPair64_PreInd_LDR = 1384,
- AArch64_LSPair64_PreInd_STR = 1385,
- AArch64_LSPair64_STR = 1386,
- AArch64_LSRVwww = 1387,
- AArch64_LSRVxxx = 1388,
- AArch64_LSRwwi = 1389,
- AArch64_LSRxxi = 1390,
- AArch64_MADDwwww = 1391,
- AArch64_MADDxxxx = 1392,
- AArch64_MLAvve_2s4s = 1393,
- AArch64_MLAvve_4h8h = 1394,
- AArch64_MLAvve_4s4s = 1395,
- AArch64_MLAvve_8h8h = 1396,
- AArch64_MLAvvv_16B = 1397,
- AArch64_MLAvvv_2S = 1398,
- AArch64_MLAvvv_4H = 1399,
- AArch64_MLAvvv_4S = 1400,
- AArch64_MLAvvv_8B = 1401,
- AArch64_MLAvvv_8H = 1402,
- AArch64_MLSvve_2s4s = 1403,
- AArch64_MLSvve_4h8h = 1404,
- AArch64_MLSvve_4s4s = 1405,
- AArch64_MLSvve_8h8h = 1406,
- AArch64_MLSvvv_16B = 1407,
- AArch64_MLSvvv_2S = 1408,
- AArch64_MLSvvv_4H = 1409,
- AArch64_MLSvvv_4S = 1410,
- AArch64_MLSvvv_8B = 1411,
- AArch64_MLSvvv_8H = 1412,
- AArch64_MOVIdi = 1413,
- AArch64_MOVIvi_16B = 1414,
- AArch64_MOVIvi_2D = 1415,
- AArch64_MOVIvi_8B = 1416,
- AArch64_MOVIvi_lsl_2S = 1417,
- AArch64_MOVIvi_lsl_4H = 1418,
- AArch64_MOVIvi_lsl_4S = 1419,
- AArch64_MOVIvi_lsl_8H = 1420,
- AArch64_MOVIvi_msl_2S = 1421,
- AArch64_MOVIvi_msl_4S = 1422,
- AArch64_MOVKwii = 1423,
- AArch64_MOVKxii = 1424,
- AArch64_MOVNwii = 1425,
- AArch64_MOVNxii = 1426,
- AArch64_MOVZwii = 1427,
- AArch64_MOVZxii = 1428,
- AArch64_MRSxi = 1429,
- AArch64_MSRii = 1430,
- AArch64_MSRix = 1431,
- AArch64_MSUBwwww = 1432,
- AArch64_MSUBxxxx = 1433,
- AArch64_MULve_2s4s = 1434,
- AArch64_MULve_4h8h = 1435,
- AArch64_MULve_4s4s = 1436,
- AArch64_MULve_8h8h = 1437,
- AArch64_MULvvv_16B = 1438,
- AArch64_MULvvv_2S = 1439,
- AArch64_MULvvv_4H = 1440,
- AArch64_MULvvv_4S = 1441,
- AArch64_MULvvv_8B = 1442,
- AArch64_MULvvv_8H = 1443,
- AArch64_MVNIvi_lsl_2S = 1444,
- AArch64_MVNIvi_lsl_4H = 1445,
- AArch64_MVNIvi_lsl_4S = 1446,
- AArch64_MVNIvi_lsl_8H = 1447,
- AArch64_MVNIvi_msl_2S = 1448,
- AArch64_MVNIvi_msl_4S = 1449,
- AArch64_MVNww_asr = 1450,
- AArch64_MVNww_lsl = 1451,
- AArch64_MVNww_lsr = 1452,
- AArch64_MVNww_ror = 1453,
- AArch64_MVNxx_asr = 1454,
- AArch64_MVNxx_lsl = 1455,
- AArch64_MVNxx_lsr = 1456,
- AArch64_MVNxx_ror = 1457,
- AArch64_NEG16b = 1458,
- AArch64_NEG2d = 1459,
- AArch64_NEG2s = 1460,
- AArch64_NEG4h = 1461,
- AArch64_NEG4s = 1462,
- AArch64_NEG8b = 1463,
- AArch64_NEG8h = 1464,
- AArch64_NEGdd = 1465,
- AArch64_NOT16b = 1466,
- AArch64_NOT8b = 1467,
- AArch64_ORNvvv_16B = 1468,
- AArch64_ORNvvv_8B = 1469,
- AArch64_ORNwww_asr = 1470,
- AArch64_ORNwww_lsl = 1471,
- AArch64_ORNwww_lsr = 1472,
- AArch64_ORNwww_ror = 1473,
- AArch64_ORNxxx_asr = 1474,
- AArch64_ORNxxx_lsl = 1475,
- AArch64_ORNxxx_lsr = 1476,
- AArch64_ORNxxx_ror = 1477,
- AArch64_ORRvi_lsl_2S = 1478,
- AArch64_ORRvi_lsl_4H = 1479,
- AArch64_ORRvi_lsl_4S = 1480,
- AArch64_ORRvi_lsl_8H = 1481,
- AArch64_ORRvvv_16B = 1482,
- AArch64_ORRvvv_8B = 1483,
- AArch64_ORRwwi = 1484,
- AArch64_ORRwww_asr = 1485,
- AArch64_ORRwww_lsl = 1486,
- AArch64_ORRwww_lsr = 1487,
- AArch64_ORRwww_ror = 1488,
- AArch64_ORRxxi = 1489,
- AArch64_ORRxxx_asr = 1490,
- AArch64_ORRxxx_lsl = 1491,
- AArch64_ORRxxx_lsr = 1492,
- AArch64_ORRxxx_ror = 1493,
- AArch64_PMULL2vvv_1q2d = 1494,
- AArch64_PMULL2vvv_8h16b = 1495,
- AArch64_PMULLvvv_1q1d = 1496,
- AArch64_PMULLvvv_8h8b = 1497,
- AArch64_PMULvvv_16B = 1498,
- AArch64_PMULvvv_8B = 1499,
- AArch64_PRFM = 1500,
- AArch64_PRFM_Wm_RegOffset = 1501,
- AArch64_PRFM_Xm_RegOffset = 1502,
- AArch64_PRFM_lit = 1503,
- AArch64_PRFUM = 1504,
- AArch64_QRSHRUNvvi_16B = 1505,
- AArch64_QRSHRUNvvi_2S = 1506,
- AArch64_QRSHRUNvvi_4H = 1507,
- AArch64_QRSHRUNvvi_4S = 1508,
- AArch64_QRSHRUNvvi_8B = 1509,
- AArch64_QRSHRUNvvi_8H = 1510,
- AArch64_QSHRUNvvi_16B = 1511,
- AArch64_QSHRUNvvi_2S = 1512,
- AArch64_QSHRUNvvi_4H = 1513,
- AArch64_QSHRUNvvi_4S = 1514,
- AArch64_QSHRUNvvi_8B = 1515,
- AArch64_QSHRUNvvi_8H = 1516,
- AArch64_RADDHN2vvv_16b8h = 1517,
- AArch64_RADDHN2vvv_4s2d = 1518,
- AArch64_RADDHN2vvv_8h4s = 1519,
- AArch64_RADDHNvvv_2s2d = 1520,
- AArch64_RADDHNvvv_4h4s = 1521,
- AArch64_RADDHNvvv_8b8h = 1522,
- AArch64_RBIT16b = 1523,
- AArch64_RBIT8b = 1524,
- AArch64_RBITww = 1525,
- AArch64_RBITxx = 1526,
- AArch64_RET = 1527,
- AArch64_RETx = 1528,
- AArch64_REV16_16b = 1529,
- AArch64_REV16_8b = 1530,
- AArch64_REV16ww = 1531,
- AArch64_REV16xx = 1532,
- AArch64_REV32_16b = 1533,
- AArch64_REV32_4h = 1534,
- AArch64_REV32_8b = 1535,
- AArch64_REV32_8h = 1536,
- AArch64_REV32xx = 1537,
- AArch64_REV64_16b = 1538,
- AArch64_REV64_2s = 1539,
- AArch64_REV64_4h = 1540,
- AArch64_REV64_4s = 1541,
- AArch64_REV64_8b = 1542,
- AArch64_REV64_8h = 1543,
- AArch64_REVww = 1544,
- AArch64_REVxx = 1545,
- AArch64_RORVwww = 1546,
- AArch64_RORVxxx = 1547,
- AArch64_RSHRNvvi_16B = 1548,
- AArch64_RSHRNvvi_2S = 1549,
- AArch64_RSHRNvvi_4H = 1550,
- AArch64_RSHRNvvi_4S = 1551,
- AArch64_RSHRNvvi_8B = 1552,
- AArch64_RSHRNvvi_8H = 1553,
- AArch64_RSUBHN2vvv_16b8h = 1554,
- AArch64_RSUBHN2vvv_4s2d = 1555,
- AArch64_RSUBHN2vvv_8h4s = 1556,
- AArch64_RSUBHNvvv_2s2d = 1557,
- AArch64_RSUBHNvvv_4h4s = 1558,
- AArch64_RSUBHNvvv_8b8h = 1559,
- AArch64_SABAL2vvv_2d2s = 1560,
- AArch64_SABAL2vvv_4s4h = 1561,
- AArch64_SABAL2vvv_8h8b = 1562,
- AArch64_SABALvvv_2d2s = 1563,
- AArch64_SABALvvv_4s4h = 1564,
- AArch64_SABALvvv_8h8b = 1565,
- AArch64_SABAvvv_16B = 1566,
- AArch64_SABAvvv_2S = 1567,
- AArch64_SABAvvv_4H = 1568,
- AArch64_SABAvvv_4S = 1569,
- AArch64_SABAvvv_8B = 1570,
- AArch64_SABAvvv_8H = 1571,
- AArch64_SABDL2vvv_2d2s = 1572,
- AArch64_SABDL2vvv_4s4h = 1573,
- AArch64_SABDL2vvv_8h8b = 1574,
- AArch64_SABDLvvv_2d2s = 1575,
- AArch64_SABDLvvv_4s4h = 1576,
- AArch64_SABDLvvv_8h8b = 1577,
- AArch64_SABDvvv_16B = 1578,
- AArch64_SABDvvv_2S = 1579,
- AArch64_SABDvvv_4H = 1580,
- AArch64_SABDvvv_4S = 1581,
- AArch64_SABDvvv_8B = 1582,
- AArch64_SABDvvv_8H = 1583,
- AArch64_SADALP16b8h = 1584,
- AArch64_SADALP2s1d = 1585,
- AArch64_SADALP4h2s = 1586,
- AArch64_SADALP4s2d = 1587,
- AArch64_SADALP8b4h = 1588,
- AArch64_SADALP8h4s = 1589,
- AArch64_SADDL2vvv_2d4s = 1590,
- AArch64_SADDL2vvv_4s8h = 1591,
- AArch64_SADDL2vvv_8h16b = 1592,
- AArch64_SADDLP16b8h = 1593,
- AArch64_SADDLP2s1d = 1594,
- AArch64_SADDLP4h2s = 1595,
- AArch64_SADDLP4s2d = 1596,
- AArch64_SADDLP8b4h = 1597,
- AArch64_SADDLP8h4s = 1598,
- AArch64_SADDLV_1d4s = 1599,
- AArch64_SADDLV_1h16b = 1600,
- AArch64_SADDLV_1h8b = 1601,
- AArch64_SADDLV_1s4h = 1602,
- AArch64_SADDLV_1s8h = 1603,
- AArch64_SADDLvvv_2d2s = 1604,
- AArch64_SADDLvvv_4s4h = 1605,
- AArch64_SADDLvvv_8h8b = 1606,
- AArch64_SADDW2vvv_2d4s = 1607,
- AArch64_SADDW2vvv_4s8h = 1608,
- AArch64_SADDW2vvv_8h16b = 1609,
- AArch64_SADDWvvv_2d2s = 1610,
- AArch64_SADDWvvv_4s4h = 1611,
- AArch64_SADDWvvv_8h8b = 1612,
- AArch64_SBCSwww = 1613,
- AArch64_SBCSxxx = 1614,
- AArch64_SBCwww = 1615,
- AArch64_SBCxxx = 1616,
- AArch64_SBFIZwwii = 1617,
- AArch64_SBFIZxxii = 1618,
- AArch64_SBFMwwii = 1619,
- AArch64_SBFMxxii = 1620,
- AArch64_SBFXwwii = 1621,
- AArch64_SBFXxxii = 1622,
- AArch64_SCVTF_2d = 1623,
- AArch64_SCVTF_2s = 1624,
- AArch64_SCVTF_4s = 1625,
- AArch64_SCVTF_Nddi = 1626,
- AArch64_SCVTF_Nssi = 1627,
- AArch64_SCVTFdd = 1628,
- AArch64_SCVTFdw = 1629,
- AArch64_SCVTFdwi = 1630,
- AArch64_SCVTFdx = 1631,
- AArch64_SCVTFdxi = 1632,
- AArch64_SCVTFss = 1633,
- AArch64_SCVTFsw = 1634,
- AArch64_SCVTFswi = 1635,
- AArch64_SCVTFsx = 1636,
- AArch64_SCVTFsxi = 1637,
- AArch64_SDIVwww = 1638,
- AArch64_SDIVxxx = 1639,
- AArch64_SHA1C = 1640,
- AArch64_SHA1H = 1641,
- AArch64_SHA1M = 1642,
- AArch64_SHA1P = 1643,
- AArch64_SHA1SU0 = 1644,
- AArch64_SHA1SU1 = 1645,
- AArch64_SHA256H = 1646,
- AArch64_SHA256H2 = 1647,
- AArch64_SHA256SU0 = 1648,
- AArch64_SHA256SU1 = 1649,
- AArch64_SHADDvvv_16B = 1650,
- AArch64_SHADDvvv_2S = 1651,
- AArch64_SHADDvvv_4H = 1652,
- AArch64_SHADDvvv_4S = 1653,
- AArch64_SHADDvvv_8B = 1654,
- AArch64_SHADDvvv_8H = 1655,
- AArch64_SHLL16b8h = 1656,
- AArch64_SHLL2s2d = 1657,
- AArch64_SHLL4h4s = 1658,
- AArch64_SHLL4s2d = 1659,
- AArch64_SHLL8b8h = 1660,
- AArch64_SHLL8h4s = 1661,
- AArch64_SHLddi = 1662,
- AArch64_SHLvvi_16B = 1663,
- AArch64_SHLvvi_2D = 1664,
- AArch64_SHLvvi_2S = 1665,
- AArch64_SHLvvi_4H = 1666,
- AArch64_SHLvvi_4S = 1667,
- AArch64_SHLvvi_8B = 1668,
- AArch64_SHLvvi_8H = 1669,
- AArch64_SHRNvvi_16B = 1670,
- AArch64_SHRNvvi_2S = 1671,
- AArch64_SHRNvvi_4H = 1672,
- AArch64_SHRNvvi_4S = 1673,
- AArch64_SHRNvvi_8B = 1674,
- AArch64_SHRNvvi_8H = 1675,
- AArch64_SHSUBvvv_16B = 1676,
- AArch64_SHSUBvvv_2S = 1677,
- AArch64_SHSUBvvv_4H = 1678,
- AArch64_SHSUBvvv_4S = 1679,
- AArch64_SHSUBvvv_8B = 1680,
- AArch64_SHSUBvvv_8H = 1681,
- AArch64_SLI = 1682,
- AArch64_SLIvvi_16B = 1683,
- AArch64_SLIvvi_2D = 1684,
- AArch64_SLIvvi_2S = 1685,
- AArch64_SLIvvi_4H = 1686,
- AArch64_SLIvvi_4S = 1687,
- AArch64_SLIvvi_8B = 1688,
- AArch64_SLIvvi_8H = 1689,
- AArch64_SMADDLxwwx = 1690,
- AArch64_SMAXPvvv_16B = 1691,
- AArch64_SMAXPvvv_2S = 1692,
- AArch64_SMAXPvvv_4H = 1693,
- AArch64_SMAXPvvv_4S = 1694,
- AArch64_SMAXPvvv_8B = 1695,
- AArch64_SMAXPvvv_8H = 1696,
- AArch64_SMAXV_1b16b = 1697,
- AArch64_SMAXV_1b8b = 1698,
- AArch64_SMAXV_1h4h = 1699,
- AArch64_SMAXV_1h8h = 1700,
- AArch64_SMAXV_1s4s = 1701,
- AArch64_SMAXvvv_16B = 1702,
- AArch64_SMAXvvv_2S = 1703,
- AArch64_SMAXvvv_4H = 1704,
- AArch64_SMAXvvv_4S = 1705,
- AArch64_SMAXvvv_8B = 1706,
- AArch64_SMAXvvv_8H = 1707,
- AArch64_SMCi = 1708,
- AArch64_SMINPvvv_16B = 1709,
- AArch64_SMINPvvv_2S = 1710,
- AArch64_SMINPvvv_4H = 1711,
- AArch64_SMINPvvv_4S = 1712,
- AArch64_SMINPvvv_8B = 1713,
- AArch64_SMINPvvv_8H = 1714,
- AArch64_SMINV_1b16b = 1715,
- AArch64_SMINV_1b8b = 1716,
- AArch64_SMINV_1h4h = 1717,
- AArch64_SMINV_1h8h = 1718,
- AArch64_SMINV_1s4s = 1719,
- AArch64_SMINvvv_16B = 1720,
- AArch64_SMINvvv_2S = 1721,
- AArch64_SMINvvv_4H = 1722,
- AArch64_SMINvvv_4S = 1723,
- AArch64_SMINvvv_8B = 1724,
- AArch64_SMINvvv_8H = 1725,
- AArch64_SMLAL2vvv_2d4s = 1726,
- AArch64_SMLAL2vvv_4s8h = 1727,
- AArch64_SMLAL2vvv_8h16b = 1728,
- AArch64_SMLALvve_2d2s = 1729,
- AArch64_SMLALvve_2d4s = 1730,
- AArch64_SMLALvve_4s4h = 1731,
- AArch64_SMLALvve_4s8h = 1732,
- AArch64_SMLALvvv_2d2s = 1733,
- AArch64_SMLALvvv_4s4h = 1734,
- AArch64_SMLALvvv_8h8b = 1735,
- AArch64_SMLSL2vvv_2d4s = 1736,
- AArch64_SMLSL2vvv_4s8h = 1737,
- AArch64_SMLSL2vvv_8h16b = 1738,
- AArch64_SMLSLvve_2d2s = 1739,
- AArch64_SMLSLvve_2d4s = 1740,
- AArch64_SMLSLvve_4s4h = 1741,
- AArch64_SMLSLvve_4s8h = 1742,
- AArch64_SMLSLvvv_2d2s = 1743,
- AArch64_SMLSLvvv_4s4h = 1744,
- AArch64_SMLSLvvv_8h8b = 1745,
- AArch64_SMOVwb = 1746,
- AArch64_SMOVwh = 1747,
- AArch64_SMOVxb = 1748,
- AArch64_SMOVxh = 1749,
- AArch64_SMOVxs = 1750,
- AArch64_SMSUBLxwwx = 1751,
- AArch64_SMULHxxx = 1752,
- AArch64_SMULL2vvv_2d4s = 1753,
- AArch64_SMULL2vvv_4s8h = 1754,
- AArch64_SMULL2vvv_8h16b = 1755,
- AArch64_SMULLve_2d2s = 1756,
- AArch64_SMULLve_2d4s = 1757,
- AArch64_SMULLve_4s4h = 1758,
- AArch64_SMULLve_4s8h = 1759,
- AArch64_SMULLvvv_2d2s = 1760,
- AArch64_SMULLvvv_4s4h = 1761,
- AArch64_SMULLvvv_8h8b = 1762,
- AArch64_SQABS16b = 1763,
- AArch64_SQABS2d = 1764,
- AArch64_SQABS2s = 1765,
- AArch64_SQABS4h = 1766,
- AArch64_SQABS4s = 1767,
- AArch64_SQABS8b = 1768,
- AArch64_SQABS8h = 1769,
- AArch64_SQABSbb = 1770,
- AArch64_SQABSdd = 1771,
- AArch64_SQABShh = 1772,
- AArch64_SQABSss = 1773,
- AArch64_SQADDbbb = 1774,
- AArch64_SQADDddd = 1775,
- AArch64_SQADDhhh = 1776,
- AArch64_SQADDsss = 1777,
- AArch64_SQADDvvv_16B = 1778,
- AArch64_SQADDvvv_2D = 1779,
- AArch64_SQADDvvv_2S = 1780,
- AArch64_SQADDvvv_4H = 1781,
- AArch64_SQADDvvv_4S = 1782,
- AArch64_SQADDvvv_8B = 1783,
- AArch64_SQADDvvv_8H = 1784,
- AArch64_SQDMLAL2vvv_2d4s = 1785,
- AArch64_SQDMLAL2vvv_4s8h = 1786,
- AArch64_SQDMLALdss = 1787,
- AArch64_SQDMLALdsv_2S = 1788,
- AArch64_SQDMLALdsv_4S = 1789,
- AArch64_SQDMLALshh = 1790,
- AArch64_SQDMLALshv_4H = 1791,
- AArch64_SQDMLALshv_8H = 1792,
- AArch64_SQDMLALvve_2d2s = 1793,
- AArch64_SQDMLALvve_2d4s = 1794,
- AArch64_SQDMLALvve_4s4h = 1795,
- AArch64_SQDMLALvve_4s8h = 1796,
- AArch64_SQDMLALvvv_2d2s = 1797,
- AArch64_SQDMLALvvv_4s4h = 1798,
- AArch64_SQDMLSL2vvv_2d4s = 1799,
- AArch64_SQDMLSL2vvv_4s8h = 1800,
- AArch64_SQDMLSLdss = 1801,
- AArch64_SQDMLSLdsv_2S = 1802,
- AArch64_SQDMLSLdsv_4S = 1803,
- AArch64_SQDMLSLshh = 1804,
- AArch64_SQDMLSLshv_4H = 1805,
- AArch64_SQDMLSLshv_8H = 1806,
- AArch64_SQDMLSLvve_2d2s = 1807,
- AArch64_SQDMLSLvve_2d4s = 1808,
- AArch64_SQDMLSLvve_4s4h = 1809,
- AArch64_SQDMLSLvve_4s8h = 1810,
- AArch64_SQDMLSLvvv_2d2s = 1811,
- AArch64_SQDMLSLvvv_4s4h = 1812,
- AArch64_SQDMULHhhh = 1813,
- AArch64_SQDMULHhhv_4H = 1814,
- AArch64_SQDMULHhhv_8H = 1815,
- AArch64_SQDMULHsss = 1816,
- AArch64_SQDMULHssv_2S = 1817,
- AArch64_SQDMULHssv_4S = 1818,
- AArch64_SQDMULHve_2s4s = 1819,
- AArch64_SQDMULHve_4h8h = 1820,
- AArch64_SQDMULHve_4s4s = 1821,
- AArch64_SQDMULHve_8h8h = 1822,
- AArch64_SQDMULHvvv_2S = 1823,
- AArch64_SQDMULHvvv_4H = 1824,
- AArch64_SQDMULHvvv_4S = 1825,
- AArch64_SQDMULHvvv_8H = 1826,
- AArch64_SQDMULL2vvv_2d4s = 1827,
- AArch64_SQDMULL2vvv_4s8h = 1828,
- AArch64_SQDMULLdss = 1829,
- AArch64_SQDMULLdsv_2S = 1830,
- AArch64_SQDMULLdsv_4S = 1831,
- AArch64_SQDMULLshh = 1832,
- AArch64_SQDMULLshv_4H = 1833,
- AArch64_SQDMULLshv_8H = 1834,
- AArch64_SQDMULLve_2d2s = 1835,
- AArch64_SQDMULLve_2d4s = 1836,
- AArch64_SQDMULLve_4s4h = 1837,
- AArch64_SQDMULLve_4s8h = 1838,
- AArch64_SQDMULLvvv_2d2s = 1839,
- AArch64_SQDMULLvvv_4s4h = 1840,
- AArch64_SQNEG16b = 1841,
- AArch64_SQNEG2d = 1842,
- AArch64_SQNEG2s = 1843,
- AArch64_SQNEG4h = 1844,
- AArch64_SQNEG4s = 1845,
- AArch64_SQNEG8b = 1846,
- AArch64_SQNEG8h = 1847,
- AArch64_SQNEGbb = 1848,
- AArch64_SQNEGdd = 1849,
- AArch64_SQNEGhh = 1850,
- AArch64_SQNEGss = 1851,
- AArch64_SQRDMULHhhh = 1852,
- AArch64_SQRDMULHhhv_4H = 1853,
- AArch64_SQRDMULHhhv_8H = 1854,
- AArch64_SQRDMULHsss = 1855,
- AArch64_SQRDMULHssv_2S = 1856,
- AArch64_SQRDMULHssv_4S = 1857,
- AArch64_SQRDMULHve_2s4s = 1858,
- AArch64_SQRDMULHve_4h8h = 1859,
- AArch64_SQRDMULHve_4s4s = 1860,
- AArch64_SQRDMULHve_8h8h = 1861,
- AArch64_SQRDMULHvvv_2S = 1862,
- AArch64_SQRDMULHvvv_4H = 1863,
- AArch64_SQRDMULHvvv_4S = 1864,
- AArch64_SQRDMULHvvv_8H = 1865,
- AArch64_SQRSHLbbb = 1866,
- AArch64_SQRSHLddd = 1867,
- AArch64_SQRSHLhhh = 1868,
- AArch64_SQRSHLsss = 1869,
- AArch64_SQRSHLvvv_16B = 1870,
- AArch64_SQRSHLvvv_2D = 1871,
- AArch64_SQRSHLvvv_2S = 1872,
- AArch64_SQRSHLvvv_4H = 1873,
- AArch64_SQRSHLvvv_4S = 1874,
- AArch64_SQRSHLvvv_8B = 1875,
- AArch64_SQRSHLvvv_8H = 1876,
- AArch64_SQRSHRNbhi = 1877,
- AArch64_SQRSHRNhsi = 1878,
- AArch64_SQRSHRNsdi = 1879,
- AArch64_SQRSHRNvvi_16B = 1880,
- AArch64_SQRSHRNvvi_2S = 1881,
- AArch64_SQRSHRNvvi_4H = 1882,
- AArch64_SQRSHRNvvi_4S = 1883,
- AArch64_SQRSHRNvvi_8B = 1884,
- AArch64_SQRSHRNvvi_8H = 1885,
- AArch64_SQRSHRUNbhi = 1886,
- AArch64_SQRSHRUNhsi = 1887,
- AArch64_SQRSHRUNsdi = 1888,
- AArch64_SQSHLUbbi = 1889,
- AArch64_SQSHLUddi = 1890,
- AArch64_SQSHLUhhi = 1891,
- AArch64_SQSHLUssi = 1892,
- AArch64_SQSHLUvvi_16B = 1893,
- AArch64_SQSHLUvvi_2D = 1894,
- AArch64_SQSHLUvvi_2S = 1895,
- AArch64_SQSHLUvvi_4H = 1896,
- AArch64_SQSHLUvvi_4S = 1897,
- AArch64_SQSHLUvvi_8B = 1898,
- AArch64_SQSHLUvvi_8H = 1899,
- AArch64_SQSHLbbb = 1900,
- AArch64_SQSHLbbi = 1901,
- AArch64_SQSHLddd = 1902,
- AArch64_SQSHLddi = 1903,
- AArch64_SQSHLhhh = 1904,
- AArch64_SQSHLhhi = 1905,
- AArch64_SQSHLssi = 1906,
- AArch64_SQSHLsss = 1907,
- AArch64_SQSHLvvi_16B = 1908,
- AArch64_SQSHLvvi_2D = 1909,
- AArch64_SQSHLvvi_2S = 1910,
- AArch64_SQSHLvvi_4H = 1911,
- AArch64_SQSHLvvi_4S = 1912,
- AArch64_SQSHLvvi_8B = 1913,
- AArch64_SQSHLvvi_8H = 1914,
- AArch64_SQSHLvvv_16B = 1915,
- AArch64_SQSHLvvv_2D = 1916,
- AArch64_SQSHLvvv_2S = 1917,
- AArch64_SQSHLvvv_4H = 1918,
- AArch64_SQSHLvvv_4S = 1919,
- AArch64_SQSHLvvv_8B = 1920,
- AArch64_SQSHLvvv_8H = 1921,
- AArch64_SQSHRNbhi = 1922,
- AArch64_SQSHRNhsi = 1923,
- AArch64_SQSHRNsdi = 1924,
- AArch64_SQSHRNvvi_16B = 1925,
- AArch64_SQSHRNvvi_2S = 1926,
- AArch64_SQSHRNvvi_4H = 1927,
- AArch64_SQSHRNvvi_4S = 1928,
- AArch64_SQSHRNvvi_8B = 1929,
- AArch64_SQSHRNvvi_8H = 1930,
- AArch64_SQSHRUNbhi = 1931,
- AArch64_SQSHRUNhsi = 1932,
- AArch64_SQSHRUNsdi = 1933,
- AArch64_SQSUBbbb = 1934,
- AArch64_SQSUBddd = 1935,
- AArch64_SQSUBhhh = 1936,
- AArch64_SQSUBsss = 1937,
- AArch64_SQSUBvvv_16B = 1938,
- AArch64_SQSUBvvv_2D = 1939,
- AArch64_SQSUBvvv_2S = 1940,
- AArch64_SQSUBvvv_4H = 1941,
- AArch64_SQSUBvvv_4S = 1942,
- AArch64_SQSUBvvv_8B = 1943,
- AArch64_SQSUBvvv_8H = 1944,
- AArch64_SQXTN2d2s = 1945,
- AArch64_SQXTN2d4s = 1946,
- AArch64_SQXTN4s4h = 1947,
- AArch64_SQXTN4s8h = 1948,
- AArch64_SQXTN8h16b = 1949,
- AArch64_SQXTN8h8b = 1950,
- AArch64_SQXTNbh = 1951,
- AArch64_SQXTNhs = 1952,
- AArch64_SQXTNsd = 1953,
- AArch64_SQXTUN2d2s = 1954,
- AArch64_SQXTUN2d4s = 1955,
- AArch64_SQXTUN4s4h = 1956,
- AArch64_SQXTUN4s8h = 1957,
- AArch64_SQXTUN8h16b = 1958,
- AArch64_SQXTUN8h8b = 1959,
- AArch64_SQXTUNbh = 1960,
- AArch64_SQXTUNhs = 1961,
- AArch64_SQXTUNsd = 1962,
- AArch64_SRHADDvvv_16B = 1963,
- AArch64_SRHADDvvv_2S = 1964,
- AArch64_SRHADDvvv_4H = 1965,
- AArch64_SRHADDvvv_4S = 1966,
- AArch64_SRHADDvvv_8B = 1967,
- AArch64_SRHADDvvv_8H = 1968,
- AArch64_SRI = 1969,
- AArch64_SRIvvi_16B = 1970,
- AArch64_SRIvvi_2D = 1971,
- AArch64_SRIvvi_2S = 1972,
- AArch64_SRIvvi_4H = 1973,
- AArch64_SRIvvi_4S = 1974,
- AArch64_SRIvvi_8B = 1975,
- AArch64_SRIvvi_8H = 1976,
- AArch64_SRSHLddd = 1977,
- AArch64_SRSHLvvv_16B = 1978,
- AArch64_SRSHLvvv_2D = 1979,
- AArch64_SRSHLvvv_2S = 1980,
- AArch64_SRSHLvvv_4H = 1981,
- AArch64_SRSHLvvv_4S = 1982,
- AArch64_SRSHLvvv_8B = 1983,
- AArch64_SRSHLvvv_8H = 1984,
- AArch64_SRSHRddi = 1985,
- AArch64_SRSHRvvi_16B = 1986,
- AArch64_SRSHRvvi_2D = 1987,
- AArch64_SRSHRvvi_2S = 1988,
- AArch64_SRSHRvvi_4H = 1989,
- AArch64_SRSHRvvi_4S = 1990,
- AArch64_SRSHRvvi_8B = 1991,
- AArch64_SRSHRvvi_8H = 1992,
- AArch64_SRSRA = 1993,
- AArch64_SRSRAvvi_16B = 1994,
- AArch64_SRSRAvvi_2D = 1995,
- AArch64_SRSRAvvi_2S = 1996,
- AArch64_SRSRAvvi_4H = 1997,
- AArch64_SRSRAvvi_4S = 1998,
- AArch64_SRSRAvvi_8B = 1999,
- AArch64_SRSRAvvi_8H = 2000,
- AArch64_SSHLLvvi_16B = 2001,
- AArch64_SSHLLvvi_2S = 2002,
- AArch64_SSHLLvvi_4H = 2003,
- AArch64_SSHLLvvi_4S = 2004,
- AArch64_SSHLLvvi_8B = 2005,
- AArch64_SSHLLvvi_8H = 2006,
- AArch64_SSHLddd = 2007,
- AArch64_SSHLvvv_16B = 2008,
- AArch64_SSHLvvv_2D = 2009,
- AArch64_SSHLvvv_2S = 2010,
- AArch64_SSHLvvv_4H = 2011,
- AArch64_SSHLvvv_4S = 2012,
- AArch64_SSHLvvv_8B = 2013,
- AArch64_SSHLvvv_8H = 2014,
- AArch64_SSHRddi = 2015,
- AArch64_SSHRvvi_16B = 2016,
- AArch64_SSHRvvi_2D = 2017,
- AArch64_SSHRvvi_2S = 2018,
- AArch64_SSHRvvi_4H = 2019,
- AArch64_SSHRvvi_4S = 2020,
- AArch64_SSHRvvi_8B = 2021,
- AArch64_SSHRvvi_8H = 2022,
- AArch64_SSRA = 2023,
- AArch64_SSRAvvi_16B = 2024,
- AArch64_SSRAvvi_2D = 2025,
- AArch64_SSRAvvi_2S = 2026,
- AArch64_SSRAvvi_4H = 2027,
- AArch64_SSRAvvi_4S = 2028,
- AArch64_SSRAvvi_8B = 2029,
- AArch64_SSRAvvi_8H = 2030,
- AArch64_SSUBL2vvv_2d4s = 2031,
- AArch64_SSUBL2vvv_4s8h = 2032,
- AArch64_SSUBL2vvv_8h16b = 2033,
- AArch64_SSUBLvvv_2d2s = 2034,
- AArch64_SSUBLvvv_4s4h = 2035,
- AArch64_SSUBLvvv_8h8b = 2036,
- AArch64_SSUBW2vvv_2d4s = 2037,
- AArch64_SSUBW2vvv_4s8h = 2038,
- AArch64_SSUBW2vvv_8h16b = 2039,
- AArch64_SSUBWvvv_2d2s = 2040,
- AArch64_SSUBWvvv_4s4h = 2041,
- AArch64_SSUBWvvv_8h8b = 2042,
- AArch64_ST1LN_B = 2043,
- AArch64_ST1LN_D = 2044,
- AArch64_ST1LN_H = 2045,
- AArch64_ST1LN_S = 2046,
- AArch64_ST1LN_WB_B_fixed = 2047,
- AArch64_ST1LN_WB_B_register = 2048,
- AArch64_ST1LN_WB_D_fixed = 2049,
- AArch64_ST1LN_WB_D_register = 2050,
- AArch64_ST1LN_WB_H_fixed = 2051,
- AArch64_ST1LN_WB_H_register = 2052,
- AArch64_ST1LN_WB_S_fixed = 2053,
- AArch64_ST1LN_WB_S_register = 2054,
- AArch64_ST1WB_16B_fixed = 2055,
- AArch64_ST1WB_16B_register = 2056,
- AArch64_ST1WB_1D_fixed = 2057,
- AArch64_ST1WB_1D_register = 2058,
- AArch64_ST1WB_2D_fixed = 2059,
- AArch64_ST1WB_2D_register = 2060,
- AArch64_ST1WB_2S_fixed = 2061,
- AArch64_ST1WB_2S_register = 2062,
- AArch64_ST1WB_4H_fixed = 2063,
- AArch64_ST1WB_4H_register = 2064,
- AArch64_ST1WB_4S_fixed = 2065,
- AArch64_ST1WB_4S_register = 2066,
- AArch64_ST1WB_8B_fixed = 2067,
- AArch64_ST1WB_8B_register = 2068,
- AArch64_ST1WB_8H_fixed = 2069,
- AArch64_ST1WB_8H_register = 2070,
- AArch64_ST1_16B = 2071,
- AArch64_ST1_1D = 2072,
- AArch64_ST1_2D = 2073,
- AArch64_ST1_2S = 2074,
- AArch64_ST1_4H = 2075,
- AArch64_ST1_4S = 2076,
- AArch64_ST1_8B = 2077,
- AArch64_ST1_8H = 2078,
- AArch64_ST1x2WB_16B_fixed = 2079,
- AArch64_ST1x2WB_16B_register = 2080,
- AArch64_ST1x2WB_1D_fixed = 2081,
- AArch64_ST1x2WB_1D_register = 2082,
- AArch64_ST1x2WB_2D_fixed = 2083,
- AArch64_ST1x2WB_2D_register = 2084,
- AArch64_ST1x2WB_2S_fixed = 2085,
- AArch64_ST1x2WB_2S_register = 2086,
- AArch64_ST1x2WB_4H_fixed = 2087,
- AArch64_ST1x2WB_4H_register = 2088,
- AArch64_ST1x2WB_4S_fixed = 2089,
- AArch64_ST1x2WB_4S_register = 2090,
- AArch64_ST1x2WB_8B_fixed = 2091,
- AArch64_ST1x2WB_8B_register = 2092,
- AArch64_ST1x2WB_8H_fixed = 2093,
- AArch64_ST1x2WB_8H_register = 2094,
- AArch64_ST1x2_16B = 2095,
- AArch64_ST1x2_1D = 2096,
- AArch64_ST1x2_2D = 2097,
- AArch64_ST1x2_2S = 2098,
- AArch64_ST1x2_4H = 2099,
- AArch64_ST1x2_4S = 2100,
- AArch64_ST1x2_8B = 2101,
- AArch64_ST1x2_8H = 2102,
- AArch64_ST1x3WB_16B_fixed = 2103,
- AArch64_ST1x3WB_16B_register = 2104,
- AArch64_ST1x3WB_1D_fixed = 2105,
- AArch64_ST1x3WB_1D_register = 2106,
- AArch64_ST1x3WB_2D_fixed = 2107,
- AArch64_ST1x3WB_2D_register = 2108,
- AArch64_ST1x3WB_2S_fixed = 2109,
- AArch64_ST1x3WB_2S_register = 2110,
- AArch64_ST1x3WB_4H_fixed = 2111,
- AArch64_ST1x3WB_4H_register = 2112,
- AArch64_ST1x3WB_4S_fixed = 2113,
- AArch64_ST1x3WB_4S_register = 2114,
- AArch64_ST1x3WB_8B_fixed = 2115,
- AArch64_ST1x3WB_8B_register = 2116,
- AArch64_ST1x3WB_8H_fixed = 2117,
- AArch64_ST1x3WB_8H_register = 2118,
- AArch64_ST1x3_16B = 2119,
- AArch64_ST1x3_1D = 2120,
- AArch64_ST1x3_2D = 2121,
- AArch64_ST1x3_2S = 2122,
- AArch64_ST1x3_4H = 2123,
- AArch64_ST1x3_4S = 2124,
- AArch64_ST1x3_8B = 2125,
- AArch64_ST1x3_8H = 2126,
- AArch64_ST1x4WB_16B_fixed = 2127,
- AArch64_ST1x4WB_16B_register = 2128,
- AArch64_ST1x4WB_1D_fixed = 2129,
- AArch64_ST1x4WB_1D_register = 2130,
- AArch64_ST1x4WB_2D_fixed = 2131,
- AArch64_ST1x4WB_2D_register = 2132,
- AArch64_ST1x4WB_2S_fixed = 2133,
- AArch64_ST1x4WB_2S_register = 2134,
- AArch64_ST1x4WB_4H_fixed = 2135,
- AArch64_ST1x4WB_4H_register = 2136,
- AArch64_ST1x4WB_4S_fixed = 2137,
- AArch64_ST1x4WB_4S_register = 2138,
- AArch64_ST1x4WB_8B_fixed = 2139,
- AArch64_ST1x4WB_8B_register = 2140,
- AArch64_ST1x4WB_8H_fixed = 2141,
- AArch64_ST1x4WB_8H_register = 2142,
- AArch64_ST1x4_16B = 2143,
- AArch64_ST1x4_1D = 2144,
- AArch64_ST1x4_2D = 2145,
- AArch64_ST1x4_2S = 2146,
- AArch64_ST1x4_4H = 2147,
- AArch64_ST1x4_4S = 2148,
- AArch64_ST1x4_8B = 2149,
- AArch64_ST1x4_8H = 2150,
- AArch64_ST2LN_B = 2151,
- AArch64_ST2LN_D = 2152,
- AArch64_ST2LN_H = 2153,
- AArch64_ST2LN_S = 2154,
- AArch64_ST2LN_WB_B_fixed = 2155,
- AArch64_ST2LN_WB_B_register = 2156,
- AArch64_ST2LN_WB_D_fixed = 2157,
- AArch64_ST2LN_WB_D_register = 2158,
- AArch64_ST2LN_WB_H_fixed = 2159,
- AArch64_ST2LN_WB_H_register = 2160,
- AArch64_ST2LN_WB_S_fixed = 2161,
- AArch64_ST2LN_WB_S_register = 2162,
- AArch64_ST2WB_16B_fixed = 2163,
- AArch64_ST2WB_16B_register = 2164,
- AArch64_ST2WB_2D_fixed = 2165,
- AArch64_ST2WB_2D_register = 2166,
- AArch64_ST2WB_2S_fixed = 2167,
- AArch64_ST2WB_2S_register = 2168,
- AArch64_ST2WB_4H_fixed = 2169,
- AArch64_ST2WB_4H_register = 2170,
- AArch64_ST2WB_4S_fixed = 2171,
- AArch64_ST2WB_4S_register = 2172,
- AArch64_ST2WB_8B_fixed = 2173,
- AArch64_ST2WB_8B_register = 2174,
- AArch64_ST2WB_8H_fixed = 2175,
- AArch64_ST2WB_8H_register = 2176,
- AArch64_ST2_16B = 2177,
- AArch64_ST2_2D = 2178,
- AArch64_ST2_2S = 2179,
- AArch64_ST2_4H = 2180,
- AArch64_ST2_4S = 2181,
- AArch64_ST2_8B = 2182,
- AArch64_ST2_8H = 2183,
- AArch64_ST3LN_B = 2184,
- AArch64_ST3LN_D = 2185,
- AArch64_ST3LN_H = 2186,
- AArch64_ST3LN_S = 2187,
- AArch64_ST3LN_WB_B_fixed = 2188,
- AArch64_ST3LN_WB_B_register = 2189,
- AArch64_ST3LN_WB_D_fixed = 2190,
- AArch64_ST3LN_WB_D_register = 2191,
- AArch64_ST3LN_WB_H_fixed = 2192,
- AArch64_ST3LN_WB_H_register = 2193,
- AArch64_ST3LN_WB_S_fixed = 2194,
- AArch64_ST3LN_WB_S_register = 2195,
- AArch64_ST3WB_16B_fixed = 2196,
- AArch64_ST3WB_16B_register = 2197,
- AArch64_ST3WB_2D_fixed = 2198,
- AArch64_ST3WB_2D_register = 2199,
- AArch64_ST3WB_2S_fixed = 2200,
- AArch64_ST3WB_2S_register = 2201,
- AArch64_ST3WB_4H_fixed = 2202,
- AArch64_ST3WB_4H_register = 2203,
- AArch64_ST3WB_4S_fixed = 2204,
- AArch64_ST3WB_4S_register = 2205,
- AArch64_ST3WB_8B_fixed = 2206,
- AArch64_ST3WB_8B_register = 2207,
- AArch64_ST3WB_8H_fixed = 2208,
- AArch64_ST3WB_8H_register = 2209,
- AArch64_ST3_16B = 2210,
- AArch64_ST3_2D = 2211,
- AArch64_ST3_2S = 2212,
- AArch64_ST3_4H = 2213,
- AArch64_ST3_4S = 2214,
- AArch64_ST3_8B = 2215,
- AArch64_ST3_8H = 2216,
- AArch64_ST4LN_B = 2217,
- AArch64_ST4LN_D = 2218,
- AArch64_ST4LN_H = 2219,
- AArch64_ST4LN_S = 2220,
- AArch64_ST4LN_WB_B_fixed = 2221,
- AArch64_ST4LN_WB_B_register = 2222,
- AArch64_ST4LN_WB_D_fixed = 2223,
- AArch64_ST4LN_WB_D_register = 2224,
- AArch64_ST4LN_WB_H_fixed = 2225,
- AArch64_ST4LN_WB_H_register = 2226,
- AArch64_ST4LN_WB_S_fixed = 2227,
- AArch64_ST4LN_WB_S_register = 2228,
- AArch64_ST4WB_16B_fixed = 2229,
- AArch64_ST4WB_16B_register = 2230,
- AArch64_ST4WB_2D_fixed = 2231,
- AArch64_ST4WB_2D_register = 2232,
- AArch64_ST4WB_2S_fixed = 2233,
- AArch64_ST4WB_2S_register = 2234,
- AArch64_ST4WB_4H_fixed = 2235,
- AArch64_ST4WB_4H_register = 2236,
- AArch64_ST4WB_4S_fixed = 2237,
- AArch64_ST4WB_4S_register = 2238,
- AArch64_ST4WB_8B_fixed = 2239,
- AArch64_ST4WB_8B_register = 2240,
- AArch64_ST4WB_8H_fixed = 2241,
- AArch64_ST4WB_8H_register = 2242,
- AArch64_ST4_16B = 2243,
- AArch64_ST4_2D = 2244,
- AArch64_ST4_2S = 2245,
- AArch64_ST4_4H = 2246,
- AArch64_ST4_4S = 2247,
- AArch64_ST4_8B = 2248,
- AArch64_ST4_8H = 2249,
- AArch64_STLR_byte = 2250,
- AArch64_STLR_dword = 2251,
- AArch64_STLR_hword = 2252,
- AArch64_STLR_word = 2253,
- AArch64_STLXP_dword = 2254,
- AArch64_STLXP_word = 2255,
- AArch64_STLXR_byte = 2256,
- AArch64_STLXR_dword = 2257,
- AArch64_STLXR_hword = 2258,
- AArch64_STLXR_word = 2259,
- AArch64_STXP_dword = 2260,
- AArch64_STXP_word = 2261,
- AArch64_STXR_byte = 2262,
- AArch64_STXR_dword = 2263,
- AArch64_STXR_hword = 2264,
- AArch64_STXR_word = 2265,
- AArch64_SUBHN2vvv_16b8h = 2266,
- AArch64_SUBHN2vvv_4s2d = 2267,
- AArch64_SUBHN2vvv_8h4s = 2268,
- AArch64_SUBHNvvv_2s2d = 2269,
- AArch64_SUBHNvvv_4h4s = 2270,
- AArch64_SUBHNvvv_8b8h = 2271,
- AArch64_SUBSwww_asr = 2272,
- AArch64_SUBSwww_lsl = 2273,
- AArch64_SUBSwww_lsr = 2274,
- AArch64_SUBSwww_sxtb = 2275,
- AArch64_SUBSwww_sxth = 2276,
- AArch64_SUBSwww_sxtw = 2277,
- AArch64_SUBSwww_sxtx = 2278,
- AArch64_SUBSwww_uxtb = 2279,
- AArch64_SUBSwww_uxth = 2280,
- AArch64_SUBSwww_uxtw = 2281,
- AArch64_SUBSwww_uxtx = 2282,
- AArch64_SUBSxxw_sxtb = 2283,
- AArch64_SUBSxxw_sxth = 2284,
- AArch64_SUBSxxw_sxtw = 2285,
- AArch64_SUBSxxw_uxtb = 2286,
- AArch64_SUBSxxw_uxth = 2287,
- AArch64_SUBSxxw_uxtw = 2288,
- AArch64_SUBSxxx_asr = 2289,
- AArch64_SUBSxxx_lsl = 2290,
- AArch64_SUBSxxx_lsr = 2291,
- AArch64_SUBSxxx_sxtx = 2292,
- AArch64_SUBSxxx_uxtx = 2293,
- AArch64_SUBddd = 2294,
- AArch64_SUBvvv_16B = 2295,
- AArch64_SUBvvv_2D = 2296,
- AArch64_SUBvvv_2S = 2297,
- AArch64_SUBvvv_4H = 2298,
- AArch64_SUBvvv_4S = 2299,
- AArch64_SUBvvv_8B = 2300,
- AArch64_SUBvvv_8H = 2301,
- AArch64_SUBwwi_lsl0_S = 2302,
- AArch64_SUBwwi_lsl0_cmp = 2303,
- AArch64_SUBwwi_lsl0_s = 2304,
- AArch64_SUBwwi_lsl12_S = 2305,
- AArch64_SUBwwi_lsl12_cmp = 2306,
- AArch64_SUBwwi_lsl12_s = 2307,
- AArch64_SUBwww_asr = 2308,
- AArch64_SUBwww_lsl = 2309,
- AArch64_SUBwww_lsr = 2310,
- AArch64_SUBwww_sxtb = 2311,
- AArch64_SUBwww_sxth = 2312,
- AArch64_SUBwww_sxtw = 2313,
- AArch64_SUBwww_sxtx = 2314,
- AArch64_SUBwww_uxtb = 2315,
- AArch64_SUBwww_uxth = 2316,
- AArch64_SUBwww_uxtw = 2317,
- AArch64_SUBwww_uxtx = 2318,
- AArch64_SUBxxi_lsl0_S = 2319,
- AArch64_SUBxxi_lsl0_cmp = 2320,
- AArch64_SUBxxi_lsl0_s = 2321,
- AArch64_SUBxxi_lsl12_S = 2322,
- AArch64_SUBxxi_lsl12_cmp = 2323,
- AArch64_SUBxxi_lsl12_s = 2324,
- AArch64_SUBxxw_sxtb = 2325,
- AArch64_SUBxxw_sxth = 2326,
- AArch64_SUBxxw_sxtw = 2327,
- AArch64_SUBxxw_uxtb = 2328,
- AArch64_SUBxxw_uxth = 2329,
- AArch64_SUBxxw_uxtw = 2330,
- AArch64_SUBxxx_asr = 2331,
- AArch64_SUBxxx_lsl = 2332,
- AArch64_SUBxxx_lsr = 2333,
- AArch64_SUBxxx_sxtx = 2334,
- AArch64_SUBxxx_uxtx = 2335,
- AArch64_SUQADD16b = 2336,
- AArch64_SUQADD2d = 2337,
- AArch64_SUQADD2s = 2338,
- AArch64_SUQADD4h = 2339,
- AArch64_SUQADD4s = 2340,
- AArch64_SUQADD8b = 2341,
- AArch64_SUQADD8h = 2342,
- AArch64_SUQADDbb = 2343,
- AArch64_SUQADDdd = 2344,
- AArch64_SUQADDhh = 2345,
- AArch64_SUQADDss = 2346,
- AArch64_SVCi = 2347,
- AArch64_SXTBww = 2348,
- AArch64_SXTBxw = 2349,
- AArch64_SXTHww = 2350,
- AArch64_SXTHxw = 2351,
- AArch64_SXTWxw = 2352,
- AArch64_SYSLxicci = 2353,
- AArch64_SYSiccix = 2354,
- AArch64_TAIL_BRx = 2355,
- AArch64_TAIL_Bimm = 2356,
- AArch64_TBL1_16b = 2357,
- AArch64_TBL1_8b = 2358,
- AArch64_TBL2_16b = 2359,
- AArch64_TBL2_8b = 2360,
- AArch64_TBL3_16b = 2361,
- AArch64_TBL3_8b = 2362,
- AArch64_TBL4_16b = 2363,
- AArch64_TBL4_8b = 2364,
- AArch64_TBNZwii = 2365,
- AArch64_TBNZxii = 2366,
- AArch64_TBX1_16b = 2367,
- AArch64_TBX1_8b = 2368,
- AArch64_TBX2_16b = 2369,
- AArch64_TBX2_8b = 2370,
- AArch64_TBX3_16b = 2371,
- AArch64_TBX3_8b = 2372,
- AArch64_TBX4_16b = 2373,
- AArch64_TBX4_8b = 2374,
- AArch64_TBZwii = 2375,
- AArch64_TBZxii = 2376,
- AArch64_TC_RETURNdi = 2377,
- AArch64_TC_RETURNxi = 2378,
- AArch64_TLBIi = 2379,
- AArch64_TLBIix = 2380,
- AArch64_TLSDESCCALL = 2381,
- AArch64_TLSDESC_BLRx = 2382,
- AArch64_TRN1vvv_16b = 2383,
- AArch64_TRN1vvv_2d = 2384,
- AArch64_TRN1vvv_2s = 2385,
- AArch64_TRN1vvv_4h = 2386,
- AArch64_TRN1vvv_4s = 2387,
- AArch64_TRN1vvv_8b = 2388,
- AArch64_TRN1vvv_8h = 2389,
- AArch64_TRN2vvv_16b = 2390,
- AArch64_TRN2vvv_2d = 2391,
- AArch64_TRN2vvv_2s = 2392,
- AArch64_TRN2vvv_4h = 2393,
- AArch64_TRN2vvv_4s = 2394,
- AArch64_TRN2vvv_8b = 2395,
- AArch64_TRN2vvv_8h = 2396,
- AArch64_TSTww_asr = 2397,
- AArch64_TSTww_lsl = 2398,
- AArch64_TSTww_lsr = 2399,
- AArch64_TSTww_ror = 2400,
- AArch64_TSTxx_asr = 2401,
- AArch64_TSTxx_lsl = 2402,
- AArch64_TSTxx_lsr = 2403,
- AArch64_TSTxx_ror = 2404,
- AArch64_UABAL2vvv_2d2s = 2405,
- AArch64_UABAL2vvv_4s4h = 2406,
- AArch64_UABAL2vvv_8h8b = 2407,
- AArch64_UABALvvv_2d2s = 2408,
- AArch64_UABALvvv_4s4h = 2409,
- AArch64_UABALvvv_8h8b = 2410,
- AArch64_UABAvvv_16B = 2411,
- AArch64_UABAvvv_2S = 2412,
- AArch64_UABAvvv_4H = 2413,
- AArch64_UABAvvv_4S = 2414,
- AArch64_UABAvvv_8B = 2415,
- AArch64_UABAvvv_8H = 2416,
- AArch64_UABDL2vvv_2d2s = 2417,
- AArch64_UABDL2vvv_4s4h = 2418,
- AArch64_UABDL2vvv_8h8b = 2419,
- AArch64_UABDLvvv_2d2s = 2420,
- AArch64_UABDLvvv_4s4h = 2421,
- AArch64_UABDLvvv_8h8b = 2422,
- AArch64_UABDvvv_16B = 2423,
- AArch64_UABDvvv_2S = 2424,
- AArch64_UABDvvv_4H = 2425,
- AArch64_UABDvvv_4S = 2426,
- AArch64_UABDvvv_8B = 2427,
- AArch64_UABDvvv_8H = 2428,
- AArch64_UADALP16b8h = 2429,
- AArch64_UADALP2s1d = 2430,
- AArch64_UADALP4h2s = 2431,
- AArch64_UADALP4s2d = 2432,
- AArch64_UADALP8b4h = 2433,
- AArch64_UADALP8h4s = 2434,
- AArch64_UADDL2vvv_2d4s = 2435,
- AArch64_UADDL2vvv_4s8h = 2436,
- AArch64_UADDL2vvv_8h16b = 2437,
- AArch64_UADDLP16b8h = 2438,
- AArch64_UADDLP2s1d = 2439,
- AArch64_UADDLP4h2s = 2440,
- AArch64_UADDLP4s2d = 2441,
- AArch64_UADDLP8b4h = 2442,
- AArch64_UADDLP8h4s = 2443,
- AArch64_UADDLV_1d4s = 2444,
- AArch64_UADDLV_1h16b = 2445,
- AArch64_UADDLV_1h8b = 2446,
- AArch64_UADDLV_1s4h = 2447,
- AArch64_UADDLV_1s8h = 2448,
- AArch64_UADDLvvv_2d2s = 2449,
- AArch64_UADDLvvv_4s4h = 2450,
- AArch64_UADDLvvv_8h8b = 2451,
- AArch64_UADDW2vvv_2d4s = 2452,
- AArch64_UADDW2vvv_4s8h = 2453,
- AArch64_UADDW2vvv_8h16b = 2454,
- AArch64_UADDWvvv_2d2s = 2455,
- AArch64_UADDWvvv_4s4h = 2456,
- AArch64_UADDWvvv_8h8b = 2457,
- AArch64_UBFIZwwii = 2458,
- AArch64_UBFIZxxii = 2459,
- AArch64_UBFMwwii = 2460,
- AArch64_UBFMxxii = 2461,
- AArch64_UBFXwwii = 2462,
- AArch64_UBFXxxii = 2463,
- AArch64_UCVTF_2d = 2464,
- AArch64_UCVTF_2s = 2465,
- AArch64_UCVTF_4s = 2466,
- AArch64_UCVTF_Nddi = 2467,
- AArch64_UCVTF_Nssi = 2468,
- AArch64_UCVTFdd = 2469,
- AArch64_UCVTFdw = 2470,
- AArch64_UCVTFdwi = 2471,
- AArch64_UCVTFdx = 2472,
- AArch64_UCVTFdxi = 2473,
- AArch64_UCVTFss = 2474,
- AArch64_UCVTFsw = 2475,
- AArch64_UCVTFswi = 2476,
- AArch64_UCVTFsx = 2477,
- AArch64_UCVTFsxi = 2478,
- AArch64_UDIVwww = 2479,
- AArch64_UDIVxxx = 2480,
- AArch64_UHADDvvv_16B = 2481,
- AArch64_UHADDvvv_2S = 2482,
- AArch64_UHADDvvv_4H = 2483,
- AArch64_UHADDvvv_4S = 2484,
- AArch64_UHADDvvv_8B = 2485,
- AArch64_UHADDvvv_8H = 2486,
- AArch64_UHSUBvvv_16B = 2487,
- AArch64_UHSUBvvv_2S = 2488,
- AArch64_UHSUBvvv_4H = 2489,
- AArch64_UHSUBvvv_4S = 2490,
- AArch64_UHSUBvvv_8B = 2491,
- AArch64_UHSUBvvv_8H = 2492,
- AArch64_UMADDLxwwx = 2493,
- AArch64_UMAXPvvv_16B = 2494,
- AArch64_UMAXPvvv_2S = 2495,
- AArch64_UMAXPvvv_4H = 2496,
- AArch64_UMAXPvvv_4S = 2497,
- AArch64_UMAXPvvv_8B = 2498,
- AArch64_UMAXPvvv_8H = 2499,
- AArch64_UMAXV_1b16b = 2500,
- AArch64_UMAXV_1b8b = 2501,
- AArch64_UMAXV_1h4h = 2502,
- AArch64_UMAXV_1h8h = 2503,
- AArch64_UMAXV_1s4s = 2504,
- AArch64_UMAXvvv_16B = 2505,
- AArch64_UMAXvvv_2S = 2506,
- AArch64_UMAXvvv_4H = 2507,
- AArch64_UMAXvvv_4S = 2508,
- AArch64_UMAXvvv_8B = 2509,
- AArch64_UMAXvvv_8H = 2510,
- AArch64_UMINPvvv_16B = 2511,
- AArch64_UMINPvvv_2S = 2512,
- AArch64_UMINPvvv_4H = 2513,
- AArch64_UMINPvvv_4S = 2514,
- AArch64_UMINPvvv_8B = 2515,
- AArch64_UMINPvvv_8H = 2516,
- AArch64_UMINV_1b16b = 2517,
- AArch64_UMINV_1b8b = 2518,
- AArch64_UMINV_1h4h = 2519,
- AArch64_UMINV_1h8h = 2520,
- AArch64_UMINV_1s4s = 2521,
- AArch64_UMINvvv_16B = 2522,
- AArch64_UMINvvv_2S = 2523,
- AArch64_UMINvvv_4H = 2524,
- AArch64_UMINvvv_4S = 2525,
- AArch64_UMINvvv_8B = 2526,
- AArch64_UMINvvv_8H = 2527,
- AArch64_UMLAL2vvv_2d4s = 2528,
- AArch64_UMLAL2vvv_4s8h = 2529,
- AArch64_UMLAL2vvv_8h16b = 2530,
- AArch64_UMLALvve_2d2s = 2531,
- AArch64_UMLALvve_2d4s = 2532,
- AArch64_UMLALvve_4s4h = 2533,
- AArch64_UMLALvve_4s8h = 2534,
- AArch64_UMLALvvv_2d2s = 2535,
- AArch64_UMLALvvv_4s4h = 2536,
- AArch64_UMLALvvv_8h8b = 2537,
- AArch64_UMLSL2vvv_2d4s = 2538,
- AArch64_UMLSL2vvv_4s8h = 2539,
- AArch64_UMLSL2vvv_8h16b = 2540,
- AArch64_UMLSLvve_2d2s = 2541,
- AArch64_UMLSLvve_2d4s = 2542,
- AArch64_UMLSLvve_4s4h = 2543,
- AArch64_UMLSLvve_4s8h = 2544,
- AArch64_UMLSLvvv_2d2s = 2545,
- AArch64_UMLSLvvv_4s4h = 2546,
- AArch64_UMLSLvvv_8h8b = 2547,
- AArch64_UMOVwb = 2548,
- AArch64_UMOVwh = 2549,
- AArch64_UMOVws = 2550,
- AArch64_UMOVxd = 2551,
- AArch64_UMSUBLxwwx = 2552,
- AArch64_UMULHxxx = 2553,
- AArch64_UMULL2vvv_2d4s = 2554,
- AArch64_UMULL2vvv_4s8h = 2555,
- AArch64_UMULL2vvv_8h16b = 2556,
- AArch64_UMULLve_2d2s = 2557,
- AArch64_UMULLve_2d4s = 2558,
- AArch64_UMULLve_4s4h = 2559,
- AArch64_UMULLve_4s8h = 2560,
- AArch64_UMULLvvv_2d2s = 2561,
- AArch64_UMULLvvv_4s4h = 2562,
- AArch64_UMULLvvv_8h8b = 2563,
- AArch64_UQADDbbb = 2564,
- AArch64_UQADDddd = 2565,
- AArch64_UQADDhhh = 2566,
- AArch64_UQADDsss = 2567,
- AArch64_UQADDvvv_16B = 2568,
- AArch64_UQADDvvv_2D = 2569,
- AArch64_UQADDvvv_2S = 2570,
- AArch64_UQADDvvv_4H = 2571,
- AArch64_UQADDvvv_4S = 2572,
- AArch64_UQADDvvv_8B = 2573,
- AArch64_UQADDvvv_8H = 2574,
- AArch64_UQRSHLbbb = 2575,
- AArch64_UQRSHLddd = 2576,
- AArch64_UQRSHLhhh = 2577,
- AArch64_UQRSHLsss = 2578,
- AArch64_UQRSHLvvv_16B = 2579,
- AArch64_UQRSHLvvv_2D = 2580,
- AArch64_UQRSHLvvv_2S = 2581,
- AArch64_UQRSHLvvv_4H = 2582,
- AArch64_UQRSHLvvv_4S = 2583,
- AArch64_UQRSHLvvv_8B = 2584,
- AArch64_UQRSHLvvv_8H = 2585,
- AArch64_UQRSHRNbhi = 2586,
- AArch64_UQRSHRNhsi = 2587,
- AArch64_UQRSHRNsdi = 2588,
- AArch64_UQRSHRNvvi_16B = 2589,
- AArch64_UQRSHRNvvi_2S = 2590,
- AArch64_UQRSHRNvvi_4H = 2591,
- AArch64_UQRSHRNvvi_4S = 2592,
- AArch64_UQRSHRNvvi_8B = 2593,
- AArch64_UQRSHRNvvi_8H = 2594,
- AArch64_UQSHLbbb = 2595,
- AArch64_UQSHLbbi = 2596,
- AArch64_UQSHLddd = 2597,
- AArch64_UQSHLddi = 2598,
- AArch64_UQSHLhhh = 2599,
- AArch64_UQSHLhhi = 2600,
- AArch64_UQSHLssi = 2601,
- AArch64_UQSHLsss = 2602,
- AArch64_UQSHLvvi_16B = 2603,
- AArch64_UQSHLvvi_2D = 2604,
- AArch64_UQSHLvvi_2S = 2605,
- AArch64_UQSHLvvi_4H = 2606,
- AArch64_UQSHLvvi_4S = 2607,
- AArch64_UQSHLvvi_8B = 2608,
- AArch64_UQSHLvvi_8H = 2609,
- AArch64_UQSHLvvv_16B = 2610,
- AArch64_UQSHLvvv_2D = 2611,
- AArch64_UQSHLvvv_2S = 2612,
- AArch64_UQSHLvvv_4H = 2613,
- AArch64_UQSHLvvv_4S = 2614,
- AArch64_UQSHLvvv_8B = 2615,
- AArch64_UQSHLvvv_8H = 2616,
- AArch64_UQSHRNbhi = 2617,
- AArch64_UQSHRNhsi = 2618,
- AArch64_UQSHRNsdi = 2619,
- AArch64_UQSHRNvvi_16B = 2620,
- AArch64_UQSHRNvvi_2S = 2621,
- AArch64_UQSHRNvvi_4H = 2622,
- AArch64_UQSHRNvvi_4S = 2623,
- AArch64_UQSHRNvvi_8B = 2624,
- AArch64_UQSHRNvvi_8H = 2625,
- AArch64_UQSUBbbb = 2626,
- AArch64_UQSUBddd = 2627,
- AArch64_UQSUBhhh = 2628,
- AArch64_UQSUBsss = 2629,
- AArch64_UQSUBvvv_16B = 2630,
- AArch64_UQSUBvvv_2D = 2631,
- AArch64_UQSUBvvv_2S = 2632,
- AArch64_UQSUBvvv_4H = 2633,
- AArch64_UQSUBvvv_4S = 2634,
- AArch64_UQSUBvvv_8B = 2635,
- AArch64_UQSUBvvv_8H = 2636,
- AArch64_UQXTN2d2s = 2637,
- AArch64_UQXTN2d4s = 2638,
- AArch64_UQXTN4s4h = 2639,
- AArch64_UQXTN4s8h = 2640,
- AArch64_UQXTN8h16b = 2641,
- AArch64_UQXTN8h8b = 2642,
- AArch64_UQXTNbh = 2643,
- AArch64_UQXTNhs = 2644,
- AArch64_UQXTNsd = 2645,
- AArch64_URECPE2s = 2646,
- AArch64_URECPE4s = 2647,
- AArch64_URHADDvvv_16B = 2648,
- AArch64_URHADDvvv_2S = 2649,
- AArch64_URHADDvvv_4H = 2650,
- AArch64_URHADDvvv_4S = 2651,
- AArch64_URHADDvvv_8B = 2652,
- AArch64_URHADDvvv_8H = 2653,
- AArch64_URSHLddd = 2654,
- AArch64_URSHLvvv_16B = 2655,
- AArch64_URSHLvvv_2D = 2656,
- AArch64_URSHLvvv_2S = 2657,
- AArch64_URSHLvvv_4H = 2658,
- AArch64_URSHLvvv_4S = 2659,
- AArch64_URSHLvvv_8B = 2660,
- AArch64_URSHLvvv_8H = 2661,
- AArch64_URSHRddi = 2662,
- AArch64_URSHRvvi_16B = 2663,
- AArch64_URSHRvvi_2D = 2664,
- AArch64_URSHRvvi_2S = 2665,
- AArch64_URSHRvvi_4H = 2666,
- AArch64_URSHRvvi_4S = 2667,
- AArch64_URSHRvvi_8B = 2668,
- AArch64_URSHRvvi_8H = 2669,
- AArch64_URSQRTE2s = 2670,
- AArch64_URSQRTE4s = 2671,
- AArch64_URSRA = 2672,
- AArch64_URSRAvvi_16B = 2673,
- AArch64_URSRAvvi_2D = 2674,
- AArch64_URSRAvvi_2S = 2675,
- AArch64_URSRAvvi_4H = 2676,
- AArch64_URSRAvvi_4S = 2677,
- AArch64_URSRAvvi_8B = 2678,
- AArch64_URSRAvvi_8H = 2679,
- AArch64_USHLLvvi_16B = 2680,
- AArch64_USHLLvvi_2S = 2681,
- AArch64_USHLLvvi_4H = 2682,
- AArch64_USHLLvvi_4S = 2683,
- AArch64_USHLLvvi_8B = 2684,
- AArch64_USHLLvvi_8H = 2685,
- AArch64_USHLddd = 2686,
- AArch64_USHLvvv_16B = 2687,
- AArch64_USHLvvv_2D = 2688,
- AArch64_USHLvvv_2S = 2689,
- AArch64_USHLvvv_4H = 2690,
- AArch64_USHLvvv_4S = 2691,
- AArch64_USHLvvv_8B = 2692,
- AArch64_USHLvvv_8H = 2693,
- AArch64_USHRddi = 2694,
- AArch64_USHRvvi_16B = 2695,
- AArch64_USHRvvi_2D = 2696,
- AArch64_USHRvvi_2S = 2697,
- AArch64_USHRvvi_4H = 2698,
- AArch64_USHRvvi_4S = 2699,
- AArch64_USHRvvi_8B = 2700,
- AArch64_USHRvvi_8H = 2701,
- AArch64_USQADD16b = 2702,
- AArch64_USQADD2d = 2703,
- AArch64_USQADD2s = 2704,
- AArch64_USQADD4h = 2705,
- AArch64_USQADD4s = 2706,
- AArch64_USQADD8b = 2707,
- AArch64_USQADD8h = 2708,
- AArch64_USQADDbb = 2709,
- AArch64_USQADDdd = 2710,
- AArch64_USQADDhh = 2711,
- AArch64_USQADDss = 2712,
- AArch64_USRA = 2713,
- AArch64_USRAvvi_16B = 2714,
- AArch64_USRAvvi_2D = 2715,
- AArch64_USRAvvi_2S = 2716,
- AArch64_USRAvvi_4H = 2717,
- AArch64_USRAvvi_4S = 2718,
- AArch64_USRAvvi_8B = 2719,
- AArch64_USRAvvi_8H = 2720,
- AArch64_USUBL2vvv_2d4s = 2721,
- AArch64_USUBL2vvv_4s8h = 2722,
- AArch64_USUBL2vvv_8h16b = 2723,
- AArch64_USUBLvvv_2d2s = 2724,
- AArch64_USUBLvvv_4s4h = 2725,
- AArch64_USUBLvvv_8h8b = 2726,
- AArch64_USUBW2vvv_2d4s = 2727,
- AArch64_USUBW2vvv_4s8h = 2728,
- AArch64_USUBW2vvv_8h16b = 2729,
- AArch64_USUBWvvv_2d2s = 2730,
- AArch64_USUBWvvv_4s4h = 2731,
- AArch64_USUBWvvv_8h8b = 2732,
- AArch64_UXTBww = 2733,
- AArch64_UXTBxw = 2734,
- AArch64_UXTHww = 2735,
- AArch64_UXTHxw = 2736,
- AArch64_UZP1vvv_16b = 2737,
- AArch64_UZP1vvv_2d = 2738,
- AArch64_UZP1vvv_2s = 2739,
- AArch64_UZP1vvv_4h = 2740,
- AArch64_UZP1vvv_4s = 2741,
- AArch64_UZP1vvv_8b = 2742,
- AArch64_UZP1vvv_8h = 2743,
- AArch64_UZP2vvv_16b = 2744,
- AArch64_UZP2vvv_2d = 2745,
- AArch64_UZP2vvv_2s = 2746,
- AArch64_UZP2vvv_4h = 2747,
- AArch64_UZP2vvv_4s = 2748,
- AArch64_UZP2vvv_8b = 2749,
- AArch64_UZP2vvv_8h = 2750,
- AArch64_VCVTf2xs_2D = 2751,
- AArch64_VCVTf2xs_2S = 2752,
- AArch64_VCVTf2xs_4S = 2753,
- AArch64_VCVTf2xu_2D = 2754,
- AArch64_VCVTf2xu_2S = 2755,
- AArch64_VCVTf2xu_4S = 2756,
- AArch64_VCVTxs2f_2D = 2757,
- AArch64_VCVTxs2f_2S = 2758,
- AArch64_VCVTxs2f_4S = 2759,
- AArch64_VCVTxu2f_2D = 2760,
- AArch64_VCVTxu2f_2S = 2761,
- AArch64_VCVTxu2f_4S = 2762,
- AArch64_XTN2d2s = 2763,
- AArch64_XTN2d4s = 2764,
- AArch64_XTN4s4h = 2765,
- AArch64_XTN4s8h = 2766,
- AArch64_XTN8h16b = 2767,
- AArch64_XTN8h8b = 2768,
- AArch64_ZIP1vvv_16b = 2769,
- AArch64_ZIP1vvv_2d = 2770,
- AArch64_ZIP1vvv_2s = 2771,
- AArch64_ZIP1vvv_4h = 2772,
- AArch64_ZIP1vvv_4s = 2773,
- AArch64_ZIP1vvv_8b = 2774,
- AArch64_ZIP1vvv_8h = 2775,
- AArch64_ZIP2vvv_16b = 2776,
- AArch64_ZIP2vvv_2d = 2777,
- AArch64_ZIP2vvv_2s = 2778,
- AArch64_ZIP2vvv_4h = 2779,
- AArch64_ZIP2vvv_4s = 2780,
- AArch64_ZIP2vvv_8b = 2781,
- AArch64_ZIP2vvv_8h = 2782,
- AArch64_INSTRUCTION_LIST_END = 2783
+ AArch64_LOAD_STACK_GUARD = 19,
+ AArch64_ABSv16i8 = 20,
+ AArch64_ABSv1i64 = 21,
+ AArch64_ABSv2i32 = 22,
+ AArch64_ABSv2i64 = 23,
+ AArch64_ABSv4i16 = 24,
+ AArch64_ABSv4i32 = 25,
+ AArch64_ABSv8i16 = 26,
+ AArch64_ABSv8i8 = 27,
+ AArch64_ADCSWr = 28,
+ AArch64_ADCSXr = 29,
+ AArch64_ADCWr = 30,
+ AArch64_ADCXr = 31,
+ AArch64_ADDHNv2i64_v2i32 = 32,
+ AArch64_ADDHNv2i64_v4i32 = 33,
+ AArch64_ADDHNv4i32_v4i16 = 34,
+ AArch64_ADDHNv4i32_v8i16 = 35,
+ AArch64_ADDHNv8i16_v16i8 = 36,
+ AArch64_ADDHNv8i16_v8i8 = 37,
+ AArch64_ADDPv16i8 = 38,
+ AArch64_ADDPv2i32 = 39,
+ AArch64_ADDPv2i64 = 40,
+ AArch64_ADDPv2i64p = 41,
+ AArch64_ADDPv4i16 = 42,
+ AArch64_ADDPv4i32 = 43,
+ AArch64_ADDPv8i16 = 44,
+ AArch64_ADDPv8i8 = 45,
+ AArch64_ADDSWri = 46,
+ AArch64_ADDSWrr = 47,
+ AArch64_ADDSWrs = 48,
+ AArch64_ADDSWrx = 49,
+ AArch64_ADDSXri = 50,
+ AArch64_ADDSXrr = 51,
+ AArch64_ADDSXrs = 52,
+ AArch64_ADDSXrx = 53,
+ AArch64_ADDSXrx64 = 54,
+ AArch64_ADDVv16i8v = 55,
+ AArch64_ADDVv4i16v = 56,
+ AArch64_ADDVv4i32v = 57,
+ AArch64_ADDVv8i16v = 58,
+ AArch64_ADDVv8i8v = 59,
+ AArch64_ADDWri = 60,
+ AArch64_ADDWrr = 61,
+ AArch64_ADDWrs = 62,
+ AArch64_ADDWrx = 63,
+ AArch64_ADDXri = 64,
+ AArch64_ADDXrr = 65,
+ AArch64_ADDXrs = 66,
+ AArch64_ADDXrx = 67,
+ AArch64_ADDXrx64 = 68,
+ AArch64_ADDv16i8 = 69,
+ AArch64_ADDv1i64 = 70,
+ AArch64_ADDv2i32 = 71,
+ AArch64_ADDv2i64 = 72,
+ AArch64_ADDv4i16 = 73,
+ AArch64_ADDv4i32 = 74,
+ AArch64_ADDv8i16 = 75,
+ AArch64_ADDv8i8 = 76,
+ AArch64_ADJCALLSTACKDOWN = 77,
+ AArch64_ADJCALLSTACKUP = 78,
+ AArch64_ADR = 79,
+ AArch64_ADRP = 80,
+ AArch64_AESDrr = 81,
+ AArch64_AESErr = 82,
+ AArch64_AESIMCrr = 83,
+ AArch64_AESMCrr = 84,
+ AArch64_ANDSWri = 85,
+ AArch64_ANDSWrr = 86,
+ AArch64_ANDSWrs = 87,
+ AArch64_ANDSXri = 88,
+ AArch64_ANDSXrr = 89,
+ AArch64_ANDSXrs = 90,
+ AArch64_ANDWri = 91,
+ AArch64_ANDWrr = 92,
+ AArch64_ANDWrs = 93,
+ AArch64_ANDXri = 94,
+ AArch64_ANDXrr = 95,
+ AArch64_ANDXrs = 96,
+ AArch64_ANDv16i8 = 97,
+ AArch64_ANDv8i8 = 98,
+ AArch64_ASRVWr = 99,
+ AArch64_ASRVXr = 100,
+ AArch64_B = 101,
+ AArch64_BFMWri = 102,
+ AArch64_BFMXri = 103,
+ AArch64_BICSWrr = 104,
+ AArch64_BICSWrs = 105,
+ AArch64_BICSXrr = 106,
+ AArch64_BICSXrs = 107,
+ AArch64_BICWrr = 108,
+ AArch64_BICWrs = 109,
+ AArch64_BICXrr = 110,
+ AArch64_BICXrs = 111,
+ AArch64_BICv16i8 = 112,
+ AArch64_BICv2i32 = 113,
+ AArch64_BICv4i16 = 114,
+ AArch64_BICv4i32 = 115,
+ AArch64_BICv8i16 = 116,
+ AArch64_BICv8i8 = 117,
+ AArch64_BIFv16i8 = 118,
+ AArch64_BIFv8i8 = 119,
+ AArch64_BITv16i8 = 120,
+ AArch64_BITv8i8 = 121,
+ AArch64_BL = 122,
+ AArch64_BLR = 123,
+ AArch64_BR = 124,
+ AArch64_BRK = 125,
+ AArch64_BSLv16i8 = 126,
+ AArch64_BSLv8i8 = 127,
+ AArch64_Bcc = 128,
+ AArch64_CBNZW = 129,
+ AArch64_CBNZX = 130,
+ AArch64_CBZW = 131,
+ AArch64_CBZX = 132,
+ AArch64_CCMNWi = 133,
+ AArch64_CCMNWr = 134,
+ AArch64_CCMNXi = 135,
+ AArch64_CCMNXr = 136,
+ AArch64_CCMPWi = 137,
+ AArch64_CCMPWr = 138,
+ AArch64_CCMPXi = 139,
+ AArch64_CCMPXr = 140,
+ AArch64_CLREX = 141,
+ AArch64_CLSWr = 142,
+ AArch64_CLSXr = 143,
+ AArch64_CLSv16i8 = 144,
+ AArch64_CLSv2i32 = 145,
+ AArch64_CLSv4i16 = 146,
+ AArch64_CLSv4i32 = 147,
+ AArch64_CLSv8i16 = 148,
+ AArch64_CLSv8i8 = 149,
+ AArch64_CLZWr = 150,
+ AArch64_CLZXr = 151,
+ AArch64_CLZv16i8 = 152,
+ AArch64_CLZv2i32 = 153,
+ AArch64_CLZv4i16 = 154,
+ AArch64_CLZv4i32 = 155,
+ AArch64_CLZv8i16 = 156,
+ AArch64_CLZv8i8 = 157,
+ AArch64_CMEQv16i8 = 158,
+ AArch64_CMEQv16i8rz = 159,
+ AArch64_CMEQv1i64 = 160,
+ AArch64_CMEQv1i64rz = 161,
+ AArch64_CMEQv2i32 = 162,
+ AArch64_CMEQv2i32rz = 163,
+ AArch64_CMEQv2i64 = 164,
+ AArch64_CMEQv2i64rz = 165,
+ AArch64_CMEQv4i16 = 166,
+ AArch64_CMEQv4i16rz = 167,
+ AArch64_CMEQv4i32 = 168,
+ AArch64_CMEQv4i32rz = 169,
+ AArch64_CMEQv8i16 = 170,
+ AArch64_CMEQv8i16rz = 171,
+ AArch64_CMEQv8i8 = 172,
+ AArch64_CMEQv8i8rz = 173,
+ AArch64_CMGEv16i8 = 174,
+ AArch64_CMGEv16i8rz = 175,
+ AArch64_CMGEv1i64 = 176,
+ AArch64_CMGEv1i64rz = 177,
+ AArch64_CMGEv2i32 = 178,
+ AArch64_CMGEv2i32rz = 179,
+ AArch64_CMGEv2i64 = 180,
+ AArch64_CMGEv2i64rz = 181,
+ AArch64_CMGEv4i16 = 182,
+ AArch64_CMGEv4i16rz = 183,
+ AArch64_CMGEv4i32 = 184,
+ AArch64_CMGEv4i32rz = 185,
+ AArch64_CMGEv8i16 = 186,
+ AArch64_CMGEv8i16rz = 187,
+ AArch64_CMGEv8i8 = 188,
+ AArch64_CMGEv8i8rz = 189,
+ AArch64_CMGTv16i8 = 190,
+ AArch64_CMGTv16i8rz = 191,
+ AArch64_CMGTv1i64 = 192,
+ AArch64_CMGTv1i64rz = 193,
+ AArch64_CMGTv2i32 = 194,
+ AArch64_CMGTv2i32rz = 195,
+ AArch64_CMGTv2i64 = 196,
+ AArch64_CMGTv2i64rz = 197,
+ AArch64_CMGTv4i16 = 198,
+ AArch64_CMGTv4i16rz = 199,
+ AArch64_CMGTv4i32 = 200,
+ AArch64_CMGTv4i32rz = 201,
+ AArch64_CMGTv8i16 = 202,
+ AArch64_CMGTv8i16rz = 203,
+ AArch64_CMGTv8i8 = 204,
+ AArch64_CMGTv8i8rz = 205,
+ AArch64_CMHIv16i8 = 206,
+ AArch64_CMHIv1i64 = 207,
+ AArch64_CMHIv2i32 = 208,
+ AArch64_CMHIv2i64 = 209,
+ AArch64_CMHIv4i16 = 210,
+ AArch64_CMHIv4i32 = 211,
+ AArch64_CMHIv8i16 = 212,
+ AArch64_CMHIv8i8 = 213,
+ AArch64_CMHSv16i8 = 214,
+ AArch64_CMHSv1i64 = 215,
+ AArch64_CMHSv2i32 = 216,
+ AArch64_CMHSv2i64 = 217,
+ AArch64_CMHSv4i16 = 218,
+ AArch64_CMHSv4i32 = 219,
+ AArch64_CMHSv8i16 = 220,
+ AArch64_CMHSv8i8 = 221,
+ AArch64_CMLEv16i8rz = 222,
+ AArch64_CMLEv1i64rz = 223,
+ AArch64_CMLEv2i32rz = 224,
+ AArch64_CMLEv2i64rz = 225,
+ AArch64_CMLEv4i16rz = 226,
+ AArch64_CMLEv4i32rz = 227,
+ AArch64_CMLEv8i16rz = 228,
+ AArch64_CMLEv8i8rz = 229,
+ AArch64_CMLTv16i8rz = 230,
+ AArch64_CMLTv1i64rz = 231,
+ AArch64_CMLTv2i32rz = 232,
+ AArch64_CMLTv2i64rz = 233,
+ AArch64_CMLTv4i16rz = 234,
+ AArch64_CMLTv4i32rz = 235,
+ AArch64_CMLTv8i16rz = 236,
+ AArch64_CMLTv8i8rz = 237,
+ AArch64_CMTSTv16i8 = 238,
+ AArch64_CMTSTv1i64 = 239,
+ AArch64_CMTSTv2i32 = 240,
+ AArch64_CMTSTv2i64 = 241,
+ AArch64_CMTSTv4i16 = 242,
+ AArch64_CMTSTv4i32 = 243,
+ AArch64_CMTSTv8i16 = 244,
+ AArch64_CMTSTv8i8 = 245,
+ AArch64_CNTv16i8 = 246,
+ AArch64_CNTv8i8 = 247,
+ AArch64_CPYi16 = 248,
+ AArch64_CPYi32 = 249,
+ AArch64_CPYi64 = 250,
+ AArch64_CPYi8 = 251,
+ AArch64_CRC32Brr = 252,
+ AArch64_CRC32CBrr = 253,
+ AArch64_CRC32CHrr = 254,
+ AArch64_CRC32CWrr = 255,
+ AArch64_CRC32CXrr = 256,
+ AArch64_CRC32Hrr = 257,
+ AArch64_CRC32Wrr = 258,
+ AArch64_CRC32Xrr = 259,
+ AArch64_CSELWr = 260,
+ AArch64_CSELXr = 261,
+ AArch64_CSINCWr = 262,
+ AArch64_CSINCXr = 263,
+ AArch64_CSINVWr = 264,
+ AArch64_CSINVXr = 265,
+ AArch64_CSNEGWr = 266,
+ AArch64_CSNEGXr = 267,
+ AArch64_DCPS1 = 268,
+ AArch64_DCPS2 = 269,
+ AArch64_DCPS3 = 270,
+ AArch64_DMB = 271,
+ AArch64_DRPS = 272,
+ AArch64_DSB = 273,
+ AArch64_DUPv16i8gpr = 274,
+ AArch64_DUPv16i8lane = 275,
+ AArch64_DUPv2i32gpr = 276,
+ AArch64_DUPv2i32lane = 277,
+ AArch64_DUPv2i64gpr = 278,
+ AArch64_DUPv2i64lane = 279,
+ AArch64_DUPv4i16gpr = 280,
+ AArch64_DUPv4i16lane = 281,
+ AArch64_DUPv4i32gpr = 282,
+ AArch64_DUPv4i32lane = 283,
+ AArch64_DUPv8i16gpr = 284,
+ AArch64_DUPv8i16lane = 285,
+ AArch64_DUPv8i8gpr = 286,
+ AArch64_DUPv8i8lane = 287,
+ AArch64_EONWrr = 288,
+ AArch64_EONWrs = 289,
+ AArch64_EONXrr = 290,
+ AArch64_EONXrs = 291,
+ AArch64_EORWri = 292,
+ AArch64_EORWrr = 293,
+ AArch64_EORWrs = 294,
+ AArch64_EORXri = 295,
+ AArch64_EORXrr = 296,
+ AArch64_EORXrs = 297,
+ AArch64_EORv16i8 = 298,
+ AArch64_EORv8i8 = 299,
+ AArch64_ERET = 300,
+ AArch64_EXTRWrri = 301,
+ AArch64_EXTRXrri = 302,
+ AArch64_EXTv16i8 = 303,
+ AArch64_EXTv8i8 = 304,
+ AArch64_F128CSEL = 305,
+ AArch64_FABD32 = 306,
+ AArch64_FABD64 = 307,
+ AArch64_FABDv2f32 = 308,
+ AArch64_FABDv2f64 = 309,
+ AArch64_FABDv4f32 = 310,
+ AArch64_FABSDr = 311,
+ AArch64_FABSSr = 312,
+ AArch64_FABSv2f32 = 313,
+ AArch64_FABSv2f64 = 314,
+ AArch64_FABSv4f32 = 315,
+ AArch64_FACGE32 = 316,
+ AArch64_FACGE64 = 317,
+ AArch64_FACGEv2f32 = 318,
+ AArch64_FACGEv2f64 = 319,
+ AArch64_FACGEv4f32 = 320,
+ AArch64_FACGT32 = 321,
+ AArch64_FACGT64 = 322,
+ AArch64_FACGTv2f32 = 323,
+ AArch64_FACGTv2f64 = 324,
+ AArch64_FACGTv4f32 = 325,
+ AArch64_FADDDrr = 326,
+ AArch64_FADDPv2f32 = 327,
+ AArch64_FADDPv2f64 = 328,
+ AArch64_FADDPv2i32p = 329,
+ AArch64_FADDPv2i64p = 330,
+ AArch64_FADDPv4f32 = 331,
+ AArch64_FADDSrr = 332,
+ AArch64_FADDv2f32 = 333,
+ AArch64_FADDv2f64 = 334,
+ AArch64_FADDv4f32 = 335,
+ AArch64_FCCMPDrr = 336,
+ AArch64_FCCMPEDrr = 337,
+ AArch64_FCCMPESrr = 338,
+ AArch64_FCCMPSrr = 339,
+ AArch64_FCMEQ32 = 340,
+ AArch64_FCMEQ64 = 341,
+ AArch64_FCMEQv1i32rz = 342,
+ AArch64_FCMEQv1i64rz = 343,
+ AArch64_FCMEQv2f32 = 344,
+ AArch64_FCMEQv2f64 = 345,
+ AArch64_FCMEQv2i32rz = 346,
+ AArch64_FCMEQv2i64rz = 347,
+ AArch64_FCMEQv4f32 = 348,
+ AArch64_FCMEQv4i32rz = 349,
+ AArch64_FCMGE32 = 350,
+ AArch64_FCMGE64 = 351,
+ AArch64_FCMGEv1i32rz = 352,
+ AArch64_FCMGEv1i64rz = 353,
+ AArch64_FCMGEv2f32 = 354,
+ AArch64_FCMGEv2f64 = 355,
+ AArch64_FCMGEv2i32rz = 356,
+ AArch64_FCMGEv2i64rz = 357,
+ AArch64_FCMGEv4f32 = 358,
+ AArch64_FCMGEv4i32rz = 359,
+ AArch64_FCMGT32 = 360,
+ AArch64_FCMGT64 = 361,
+ AArch64_FCMGTv1i32rz = 362,
+ AArch64_FCMGTv1i64rz = 363,
+ AArch64_FCMGTv2f32 = 364,
+ AArch64_FCMGTv2f64 = 365,
+ AArch64_FCMGTv2i32rz = 366,
+ AArch64_FCMGTv2i64rz = 367,
+ AArch64_FCMGTv4f32 = 368,
+ AArch64_FCMGTv4i32rz = 369,
+ AArch64_FCMLEv1i32rz = 370,
+ AArch64_FCMLEv1i64rz = 371,
+ AArch64_FCMLEv2i32rz = 372,
+ AArch64_FCMLEv2i64rz = 373,
+ AArch64_FCMLEv4i32rz = 374,
+ AArch64_FCMLTv1i32rz = 375,
+ AArch64_FCMLTv1i64rz = 376,
+ AArch64_FCMLTv2i32rz = 377,
+ AArch64_FCMLTv2i64rz = 378,
+ AArch64_FCMLTv4i32rz = 379,
+ AArch64_FCMPDri = 380,
+ AArch64_FCMPDrr = 381,
+ AArch64_FCMPEDri = 382,
+ AArch64_FCMPEDrr = 383,
+ AArch64_FCMPESri = 384,
+ AArch64_FCMPESrr = 385,
+ AArch64_FCMPSri = 386,
+ AArch64_FCMPSrr = 387,
+ AArch64_FCSELDrrr = 388,
+ AArch64_FCSELSrrr = 389,
+ AArch64_FCVTASUWDr = 390,
+ AArch64_FCVTASUWSr = 391,
+ AArch64_FCVTASUXDr = 392,
+ AArch64_FCVTASUXSr = 393,
+ AArch64_FCVTASv1i32 = 394,
+ AArch64_FCVTASv1i64 = 395,
+ AArch64_FCVTASv2f32 = 396,
+ AArch64_FCVTASv2f64 = 397,
+ AArch64_FCVTASv4f32 = 398,
+ AArch64_FCVTAUUWDr = 399,
+ AArch64_FCVTAUUWSr = 400,
+ AArch64_FCVTAUUXDr = 401,
+ AArch64_FCVTAUUXSr = 402,
+ AArch64_FCVTAUv1i32 = 403,
+ AArch64_FCVTAUv1i64 = 404,
+ AArch64_FCVTAUv2f32 = 405,
+ AArch64_FCVTAUv2f64 = 406,
+ AArch64_FCVTAUv4f32 = 407,
+ AArch64_FCVTDHr = 408,
+ AArch64_FCVTDSr = 409,
+ AArch64_FCVTHDr = 410,
+ AArch64_FCVTHSr = 411,
+ AArch64_FCVTLv2i32 = 412,
+ AArch64_FCVTLv4i16 = 413,
+ AArch64_FCVTLv4i32 = 414,
+ AArch64_FCVTLv8i16 = 415,
+ AArch64_FCVTMSUWDr = 416,
+ AArch64_FCVTMSUWSr = 417,
+ AArch64_FCVTMSUXDr = 418,
+ AArch64_FCVTMSUXSr = 419,
+ AArch64_FCVTMSv1i32 = 420,
+ AArch64_FCVTMSv1i64 = 421,
+ AArch64_FCVTMSv2f32 = 422,
+ AArch64_FCVTMSv2f64 = 423,
+ AArch64_FCVTMSv4f32 = 424,
+ AArch64_FCVTMUUWDr = 425,
+ AArch64_FCVTMUUWSr = 426,
+ AArch64_FCVTMUUXDr = 427,
+ AArch64_FCVTMUUXSr = 428,
+ AArch64_FCVTMUv1i32 = 429,
+ AArch64_FCVTMUv1i64 = 430,
+ AArch64_FCVTMUv2f32 = 431,
+ AArch64_FCVTMUv2f64 = 432,
+ AArch64_FCVTMUv4f32 = 433,
+ AArch64_FCVTNSUWDr = 434,
+ AArch64_FCVTNSUWSr = 435,
+ AArch64_FCVTNSUXDr = 436,
+ AArch64_FCVTNSUXSr = 437,
+ AArch64_FCVTNSv1i32 = 438,
+ AArch64_FCVTNSv1i64 = 439,
+ AArch64_FCVTNSv2f32 = 440,
+ AArch64_FCVTNSv2f64 = 441,
+ AArch64_FCVTNSv4f32 = 442,
+ AArch64_FCVTNUUWDr = 443,
+ AArch64_FCVTNUUWSr = 444,
+ AArch64_FCVTNUUXDr = 445,
+ AArch64_FCVTNUUXSr = 446,
+ AArch64_FCVTNUv1i32 = 447,
+ AArch64_FCVTNUv1i64 = 448,
+ AArch64_FCVTNUv2f32 = 449,
+ AArch64_FCVTNUv2f64 = 450,
+ AArch64_FCVTNUv4f32 = 451,
+ AArch64_FCVTNv2i32 = 452,
+ AArch64_FCVTNv4i16 = 453,
+ AArch64_FCVTNv4i32 = 454,
+ AArch64_FCVTNv8i16 = 455,
+ AArch64_FCVTPSUWDr = 456,
+ AArch64_FCVTPSUWSr = 457,
+ AArch64_FCVTPSUXDr = 458,
+ AArch64_FCVTPSUXSr = 459,
+ AArch64_FCVTPSv1i32 = 460,
+ AArch64_FCVTPSv1i64 = 461,
+ AArch64_FCVTPSv2f32 = 462,
+ AArch64_FCVTPSv2f64 = 463,
+ AArch64_FCVTPSv4f32 = 464,
+ AArch64_FCVTPUUWDr = 465,
+ AArch64_FCVTPUUWSr = 466,
+ AArch64_FCVTPUUXDr = 467,
+ AArch64_FCVTPUUXSr = 468,
+ AArch64_FCVTPUv1i32 = 469,
+ AArch64_FCVTPUv1i64 = 470,
+ AArch64_FCVTPUv2f32 = 471,
+ AArch64_FCVTPUv2f64 = 472,
+ AArch64_FCVTPUv4f32 = 473,
+ AArch64_FCVTSDr = 474,
+ AArch64_FCVTSHr = 475,
+ AArch64_FCVTXNv1i64 = 476,
+ AArch64_FCVTXNv2f32 = 477,
+ AArch64_FCVTXNv4f32 = 478,
+ AArch64_FCVTZSSWDri = 479,
+ AArch64_FCVTZSSWSri = 480,
+ AArch64_FCVTZSSXDri = 481,
+ AArch64_FCVTZSSXSri = 482,
+ AArch64_FCVTZSUWDr = 483,
+ AArch64_FCVTZSUWSr = 484,
+ AArch64_FCVTZSUXDr = 485,
+ AArch64_FCVTZSUXSr = 486,
+ AArch64_FCVTZS_IntSWDri = 487,
+ AArch64_FCVTZS_IntSWSri = 488,
+ AArch64_FCVTZS_IntSXDri = 489,
+ AArch64_FCVTZS_IntSXSri = 490,
+ AArch64_FCVTZS_IntUWDr = 491,
+ AArch64_FCVTZS_IntUWSr = 492,
+ AArch64_FCVTZS_IntUXDr = 493,
+ AArch64_FCVTZS_IntUXSr = 494,
+ AArch64_FCVTZS_Intv2f32 = 495,
+ AArch64_FCVTZS_Intv2f64 = 496,
+ AArch64_FCVTZS_Intv4f32 = 497,
+ AArch64_FCVTZSd = 498,
+ AArch64_FCVTZSs = 499,
+ AArch64_FCVTZSv1i32 = 500,
+ AArch64_FCVTZSv1i64 = 501,
+ AArch64_FCVTZSv2f32 = 502,
+ AArch64_FCVTZSv2f64 = 503,
+ AArch64_FCVTZSv2i32_shift = 504,
+ AArch64_FCVTZSv2i64_shift = 505,
+ AArch64_FCVTZSv4f32 = 506,
+ AArch64_FCVTZSv4i32_shift = 507,
+ AArch64_FCVTZUSWDri = 508,
+ AArch64_FCVTZUSWSri = 509,
+ AArch64_FCVTZUSXDri = 510,
+ AArch64_FCVTZUSXSri = 511,
+ AArch64_FCVTZUUWDr = 512,
+ AArch64_FCVTZUUWSr = 513,
+ AArch64_FCVTZUUXDr = 514,
+ AArch64_FCVTZUUXSr = 515,
+ AArch64_FCVTZU_IntSWDri = 516,
+ AArch64_FCVTZU_IntSWSri = 517,
+ AArch64_FCVTZU_IntSXDri = 518,
+ AArch64_FCVTZU_IntSXSri = 519,
+ AArch64_FCVTZU_IntUWDr = 520,
+ AArch64_FCVTZU_IntUWSr = 521,
+ AArch64_FCVTZU_IntUXDr = 522,
+ AArch64_FCVTZU_IntUXSr = 523,
+ AArch64_FCVTZU_Intv2f32 = 524,
+ AArch64_FCVTZU_Intv2f64 = 525,
+ AArch64_FCVTZU_Intv4f32 = 526,
+ AArch64_FCVTZUd = 527,
+ AArch64_FCVTZUs = 528,
+ AArch64_FCVTZUv1i32 = 529,
+ AArch64_FCVTZUv1i64 = 530,
+ AArch64_FCVTZUv2f32 = 531,
+ AArch64_FCVTZUv2f64 = 532,
+ AArch64_FCVTZUv2i32_shift = 533,
+ AArch64_FCVTZUv2i64_shift = 534,
+ AArch64_FCVTZUv4f32 = 535,
+ AArch64_FCVTZUv4i32_shift = 536,
+ AArch64_FDIVDrr = 537,
+ AArch64_FDIVSrr = 538,
+ AArch64_FDIVv2f32 = 539,
+ AArch64_FDIVv2f64 = 540,
+ AArch64_FDIVv4f32 = 541,
+ AArch64_FMADDDrrr = 542,
+ AArch64_FMADDSrrr = 543,
+ AArch64_FMAXDrr = 544,
+ AArch64_FMAXNMDrr = 545,
+ AArch64_FMAXNMPv2f32 = 546,
+ AArch64_FMAXNMPv2f64 = 547,
+ AArch64_FMAXNMPv2i32p = 548,
+ AArch64_FMAXNMPv2i64p = 549,
+ AArch64_FMAXNMPv4f32 = 550,
+ AArch64_FMAXNMSrr = 551,
+ AArch64_FMAXNMVv4i32v = 552,
+ AArch64_FMAXNMv2f32 = 553,
+ AArch64_FMAXNMv2f64 = 554,
+ AArch64_FMAXNMv4f32 = 555,
+ AArch64_FMAXPv2f32 = 556,
+ AArch64_FMAXPv2f64 = 557,
+ AArch64_FMAXPv2i32p = 558,
+ AArch64_FMAXPv2i64p = 559,
+ AArch64_FMAXPv4f32 = 560,
+ AArch64_FMAXSrr = 561,
+ AArch64_FMAXVv4i32v = 562,
+ AArch64_FMAXv2f32 = 563,
+ AArch64_FMAXv2f64 = 564,
+ AArch64_FMAXv4f32 = 565,
+ AArch64_FMINDrr = 566,
+ AArch64_FMINNMDrr = 567,
+ AArch64_FMINNMPv2f32 = 568,
+ AArch64_FMINNMPv2f64 = 569,
+ AArch64_FMINNMPv2i32p = 570,
+ AArch64_FMINNMPv2i64p = 571,
+ AArch64_FMINNMPv4f32 = 572,
+ AArch64_FMINNMSrr = 573,
+ AArch64_FMINNMVv4i32v = 574,
+ AArch64_FMINNMv2f32 = 575,
+ AArch64_FMINNMv2f64 = 576,
+ AArch64_FMINNMv4f32 = 577,
+ AArch64_FMINPv2f32 = 578,
+ AArch64_FMINPv2f64 = 579,
+ AArch64_FMINPv2i32p = 580,
+ AArch64_FMINPv2i64p = 581,
+ AArch64_FMINPv4f32 = 582,
+ AArch64_FMINSrr = 583,
+ AArch64_FMINVv4i32v = 584,
+ AArch64_FMINv2f32 = 585,
+ AArch64_FMINv2f64 = 586,
+ AArch64_FMINv4f32 = 587,
+ AArch64_FMLAv1i32_indexed = 588,
+ AArch64_FMLAv1i64_indexed = 589,
+ AArch64_FMLAv2f32 = 590,
+ AArch64_FMLAv2f64 = 591,
+ AArch64_FMLAv2i32_indexed = 592,
+ AArch64_FMLAv2i64_indexed = 593,
+ AArch64_FMLAv4f32 = 594,
+ AArch64_FMLAv4i32_indexed = 595,
+ AArch64_FMLSv1i32_indexed = 596,
+ AArch64_FMLSv1i64_indexed = 597,
+ AArch64_FMLSv2f32 = 598,
+ AArch64_FMLSv2f64 = 599,
+ AArch64_FMLSv2i32_indexed = 600,
+ AArch64_FMLSv2i64_indexed = 601,
+ AArch64_FMLSv4f32 = 602,
+ AArch64_FMLSv4i32_indexed = 603,
+ AArch64_FMOVDXHighr = 604,
+ AArch64_FMOVDXr = 605,
+ AArch64_FMOVDi = 606,
+ AArch64_FMOVDr = 607,
+ AArch64_FMOVSWr = 608,
+ AArch64_FMOVSi = 609,
+ AArch64_FMOVSr = 610,
+ AArch64_FMOVWSr = 611,
+ AArch64_FMOVXDHighr = 612,
+ AArch64_FMOVXDr = 613,
+ AArch64_FMOVv2f32_ns = 614,
+ AArch64_FMOVv2f64_ns = 615,
+ AArch64_FMOVv4f32_ns = 616,
+ AArch64_FMSUBDrrr = 617,
+ AArch64_FMSUBSrrr = 618,
+ AArch64_FMULDrr = 619,
+ AArch64_FMULSrr = 620,
+ AArch64_FMULX32 = 621,
+ AArch64_FMULX64 = 622,
+ AArch64_FMULXv1i32_indexed = 623,
+ AArch64_FMULXv1i64_indexed = 624,
+ AArch64_FMULXv2f32 = 625,
+ AArch64_FMULXv2f64 = 626,
+ AArch64_FMULXv2i32_indexed = 627,
+ AArch64_FMULXv2i64_indexed = 628,
+ AArch64_FMULXv4f32 = 629,
+ AArch64_FMULXv4i32_indexed = 630,
+ AArch64_FMULv1i32_indexed = 631,
+ AArch64_FMULv1i64_indexed = 632,
+ AArch64_FMULv2f32 = 633,
+ AArch64_FMULv2f64 = 634,
+ AArch64_FMULv2i32_indexed = 635,
+ AArch64_FMULv2i64_indexed = 636,
+ AArch64_FMULv4f32 = 637,
+ AArch64_FMULv4i32_indexed = 638,
+ AArch64_FNEGDr = 639,
+ AArch64_FNEGSr = 640,
+ AArch64_FNEGv2f32 = 641,
+ AArch64_FNEGv2f64 = 642,
+ AArch64_FNEGv4f32 = 643,
+ AArch64_FNMADDDrrr = 644,
+ AArch64_FNMADDSrrr = 645,
+ AArch64_FNMSUBDrrr = 646,
+ AArch64_FNMSUBSrrr = 647,
+ AArch64_FNMULDrr = 648,
+ AArch64_FNMULSrr = 649,
+ AArch64_FRECPEv1i32 = 650,
+ AArch64_FRECPEv1i64 = 651,
+ AArch64_FRECPEv2f32 = 652,
+ AArch64_FRECPEv2f64 = 653,
+ AArch64_FRECPEv4f32 = 654,
+ AArch64_FRECPS32 = 655,
+ AArch64_FRECPS64 = 656,
+ AArch64_FRECPSv2f32 = 657,
+ AArch64_FRECPSv2f64 = 658,
+ AArch64_FRECPSv4f32 = 659,
+ AArch64_FRECPXv1i32 = 660,
+ AArch64_FRECPXv1i64 = 661,
+ AArch64_FRINTADr = 662,
+ AArch64_FRINTASr = 663,
+ AArch64_FRINTAv2f32 = 664,
+ AArch64_FRINTAv2f64 = 665,
+ AArch64_FRINTAv4f32 = 666,
+ AArch64_FRINTIDr = 667,
+ AArch64_FRINTISr = 668,
+ AArch64_FRINTIv2f32 = 669,
+ AArch64_FRINTIv2f64 = 670,
+ AArch64_FRINTIv4f32 = 671,
+ AArch64_FRINTMDr = 672,
+ AArch64_FRINTMSr = 673,
+ AArch64_FRINTMv2f32 = 674,
+ AArch64_FRINTMv2f64 = 675,
+ AArch64_FRINTMv4f32 = 676,
+ AArch64_FRINTNDr = 677,
+ AArch64_FRINTNSr = 678,
+ AArch64_FRINTNv2f32 = 679,
+ AArch64_FRINTNv2f64 = 680,
+ AArch64_FRINTNv4f32 = 681,
+ AArch64_FRINTPDr = 682,
+ AArch64_FRINTPSr = 683,
+ AArch64_FRINTPv2f32 = 684,
+ AArch64_FRINTPv2f64 = 685,
+ AArch64_FRINTPv4f32 = 686,
+ AArch64_FRINTXDr = 687,
+ AArch64_FRINTXSr = 688,
+ AArch64_FRINTXv2f32 = 689,
+ AArch64_FRINTXv2f64 = 690,
+ AArch64_FRINTXv4f32 = 691,
+ AArch64_FRINTZDr = 692,
+ AArch64_FRINTZSr = 693,
+ AArch64_FRINTZv2f32 = 694,
+ AArch64_FRINTZv2f64 = 695,
+ AArch64_FRINTZv4f32 = 696,
+ AArch64_FRSQRTEv1i32 = 697,
+ AArch64_FRSQRTEv1i64 = 698,
+ AArch64_FRSQRTEv2f32 = 699,
+ AArch64_FRSQRTEv2f64 = 700,
+ AArch64_FRSQRTEv4f32 = 701,
+ AArch64_FRSQRTS32 = 702,
+ AArch64_FRSQRTS64 = 703,
+ AArch64_FRSQRTSv2f32 = 704,
+ AArch64_FRSQRTSv2f64 = 705,
+ AArch64_FRSQRTSv4f32 = 706,
+ AArch64_FSQRTDr = 707,
+ AArch64_FSQRTSr = 708,
+ AArch64_FSQRTv2f32 = 709,
+ AArch64_FSQRTv2f64 = 710,
+ AArch64_FSQRTv4f32 = 711,
+ AArch64_FSUBDrr = 712,
+ AArch64_FSUBSrr = 713,
+ AArch64_FSUBv2f32 = 714,
+ AArch64_FSUBv2f64 = 715,
+ AArch64_FSUBv4f32 = 716,
+ AArch64_HINT = 717,
+ AArch64_HLT = 718,
+ AArch64_HVC = 719,
+ AArch64_INSvi16gpr = 720,
+ AArch64_INSvi16lane = 721,
+ AArch64_INSvi32gpr = 722,
+ AArch64_INSvi32lane = 723,
+ AArch64_INSvi64gpr = 724,
+ AArch64_INSvi64lane = 725,
+ AArch64_INSvi8gpr = 726,
+ AArch64_INSvi8lane = 727,
+ AArch64_ISB = 728,
+ AArch64_LD1Fourv16b = 729,
+ AArch64_LD1Fourv16b_POST = 730,
+ AArch64_LD1Fourv1d = 731,
+ AArch64_LD1Fourv1d_POST = 732,
+ AArch64_LD1Fourv2d = 733,
+ AArch64_LD1Fourv2d_POST = 734,
+ AArch64_LD1Fourv2s = 735,
+ AArch64_LD1Fourv2s_POST = 736,
+ AArch64_LD1Fourv4h = 737,
+ AArch64_LD1Fourv4h_POST = 738,
+ AArch64_LD1Fourv4s = 739,
+ AArch64_LD1Fourv4s_POST = 740,
+ AArch64_LD1Fourv8b = 741,
+ AArch64_LD1Fourv8b_POST = 742,
+ AArch64_LD1Fourv8h = 743,
+ AArch64_LD1Fourv8h_POST = 744,
+ AArch64_LD1Onev16b = 745,
+ AArch64_LD1Onev16b_POST = 746,
+ AArch64_LD1Onev1d = 747,
+ AArch64_LD1Onev1d_POST = 748,
+ AArch64_LD1Onev2d = 749,
+ AArch64_LD1Onev2d_POST = 750,
+ AArch64_LD1Onev2s = 751,
+ AArch64_LD1Onev2s_POST = 752,
+ AArch64_LD1Onev4h = 753,
+ AArch64_LD1Onev4h_POST = 754,
+ AArch64_LD1Onev4s = 755,
+ AArch64_LD1Onev4s_POST = 756,
+ AArch64_LD1Onev8b = 757,
+ AArch64_LD1Onev8b_POST = 758,
+ AArch64_LD1Onev8h = 759,
+ AArch64_LD1Onev8h_POST = 760,
+ AArch64_LD1Rv16b = 761,
+ AArch64_LD1Rv16b_POST = 762,
+ AArch64_LD1Rv1d = 763,
+ AArch64_LD1Rv1d_POST = 764,
+ AArch64_LD1Rv2d = 765,
+ AArch64_LD1Rv2d_POST = 766,
+ AArch64_LD1Rv2s = 767,
+ AArch64_LD1Rv2s_POST = 768,
+ AArch64_LD1Rv4h = 769,
+ AArch64_LD1Rv4h_POST = 770,
+ AArch64_LD1Rv4s = 771,
+ AArch64_LD1Rv4s_POST = 772,
+ AArch64_LD1Rv8b = 773,
+ AArch64_LD1Rv8b_POST = 774,
+ AArch64_LD1Rv8h = 775,
+ AArch64_LD1Rv8h_POST = 776,
+ AArch64_LD1Threev16b = 777,
+ AArch64_LD1Threev16b_POST = 778,
+ AArch64_LD1Threev1d = 779,
+ AArch64_LD1Threev1d_POST = 780,
+ AArch64_LD1Threev2d = 781,
+ AArch64_LD1Threev2d_POST = 782,
+ AArch64_LD1Threev2s = 783,
+ AArch64_LD1Threev2s_POST = 784,
+ AArch64_LD1Threev4h = 785,
+ AArch64_LD1Threev4h_POST = 786,
+ AArch64_LD1Threev4s = 787,
+ AArch64_LD1Threev4s_POST = 788,
+ AArch64_LD1Threev8b = 789,
+ AArch64_LD1Threev8b_POST = 790,
+ AArch64_LD1Threev8h = 791,
+ AArch64_LD1Threev8h_POST = 792,
+ AArch64_LD1Twov16b = 793,
+ AArch64_LD1Twov16b_POST = 794,
+ AArch64_LD1Twov1d = 795,
+ AArch64_LD1Twov1d_POST = 796,
+ AArch64_LD1Twov2d = 797,
+ AArch64_LD1Twov2d_POST = 798,
+ AArch64_LD1Twov2s = 799,
+ AArch64_LD1Twov2s_POST = 800,
+ AArch64_LD1Twov4h = 801,
+ AArch64_LD1Twov4h_POST = 802,
+ AArch64_LD1Twov4s = 803,
+ AArch64_LD1Twov4s_POST = 804,
+ AArch64_LD1Twov8b = 805,
+ AArch64_LD1Twov8b_POST = 806,
+ AArch64_LD1Twov8h = 807,
+ AArch64_LD1Twov8h_POST = 808,
+ AArch64_LD1i16 = 809,
+ AArch64_LD1i16_POST = 810,
+ AArch64_LD1i32 = 811,
+ AArch64_LD1i32_POST = 812,
+ AArch64_LD1i64 = 813,
+ AArch64_LD1i64_POST = 814,
+ AArch64_LD1i8 = 815,
+ AArch64_LD1i8_POST = 816,
+ AArch64_LD2Rv16b = 817,
+ AArch64_LD2Rv16b_POST = 818,
+ AArch64_LD2Rv1d = 819,
+ AArch64_LD2Rv1d_POST = 820,
+ AArch64_LD2Rv2d = 821,
+ AArch64_LD2Rv2d_POST = 822,
+ AArch64_LD2Rv2s = 823,
+ AArch64_LD2Rv2s_POST = 824,
+ AArch64_LD2Rv4h = 825,
+ AArch64_LD2Rv4h_POST = 826,
+ AArch64_LD2Rv4s = 827,
+ AArch64_LD2Rv4s_POST = 828,
+ AArch64_LD2Rv8b = 829,
+ AArch64_LD2Rv8b_POST = 830,
+ AArch64_LD2Rv8h = 831,
+ AArch64_LD2Rv8h_POST = 832,
+ AArch64_LD2Twov16b = 833,
+ AArch64_LD2Twov16b_POST = 834,
+ AArch64_LD2Twov2d = 835,
+ AArch64_LD2Twov2d_POST = 836,
+ AArch64_LD2Twov2s = 837,
+ AArch64_LD2Twov2s_POST = 838,
+ AArch64_LD2Twov4h = 839,
+ AArch64_LD2Twov4h_POST = 840,
+ AArch64_LD2Twov4s = 841,
+ AArch64_LD2Twov4s_POST = 842,
+ AArch64_LD2Twov8b = 843,
+ AArch64_LD2Twov8b_POST = 844,
+ AArch64_LD2Twov8h = 845,
+ AArch64_LD2Twov8h_POST = 846,
+ AArch64_LD2i16 = 847,
+ AArch64_LD2i16_POST = 848,
+ AArch64_LD2i32 = 849,
+ AArch64_LD2i32_POST = 850,
+ AArch64_LD2i64 = 851,
+ AArch64_LD2i64_POST = 852,
+ AArch64_LD2i8 = 853,
+ AArch64_LD2i8_POST = 854,
+ AArch64_LD3Rv16b = 855,
+ AArch64_LD3Rv16b_POST = 856,
+ AArch64_LD3Rv1d = 857,
+ AArch64_LD3Rv1d_POST = 858,
+ AArch64_LD3Rv2d = 859,
+ AArch64_LD3Rv2d_POST = 860,
+ AArch64_LD3Rv2s = 861,
+ AArch64_LD3Rv2s_POST = 862,
+ AArch64_LD3Rv4h = 863,
+ AArch64_LD3Rv4h_POST = 864,
+ AArch64_LD3Rv4s = 865,
+ AArch64_LD3Rv4s_POST = 866,
+ AArch64_LD3Rv8b = 867,
+ AArch64_LD3Rv8b_POST = 868,
+ AArch64_LD3Rv8h = 869,
+ AArch64_LD3Rv8h_POST = 870,
+ AArch64_LD3Threev16b = 871,
+ AArch64_LD3Threev16b_POST = 872,
+ AArch64_LD3Threev2d = 873,
+ AArch64_LD3Threev2d_POST = 874,
+ AArch64_LD3Threev2s = 875,
+ AArch64_LD3Threev2s_POST = 876,
+ AArch64_LD3Threev4h = 877,
+ AArch64_LD3Threev4h_POST = 878,
+ AArch64_LD3Threev4s = 879,
+ AArch64_LD3Threev4s_POST = 880,
+ AArch64_LD3Threev8b = 881,
+ AArch64_LD3Threev8b_POST = 882,
+ AArch64_LD3Threev8h = 883,
+ AArch64_LD3Threev8h_POST = 884,
+ AArch64_LD3i16 = 885,
+ AArch64_LD3i16_POST = 886,
+ AArch64_LD3i32 = 887,
+ AArch64_LD3i32_POST = 888,
+ AArch64_LD3i64 = 889,
+ AArch64_LD3i64_POST = 890,
+ AArch64_LD3i8 = 891,
+ AArch64_LD3i8_POST = 892,
+ AArch64_LD4Fourv16b = 893,
+ AArch64_LD4Fourv16b_POST = 894,
+ AArch64_LD4Fourv2d = 895,
+ AArch64_LD4Fourv2d_POST = 896,
+ AArch64_LD4Fourv2s = 897,
+ AArch64_LD4Fourv2s_POST = 898,
+ AArch64_LD4Fourv4h = 899,
+ AArch64_LD4Fourv4h_POST = 900,
+ AArch64_LD4Fourv4s = 901,
+ AArch64_LD4Fourv4s_POST = 902,
+ AArch64_LD4Fourv8b = 903,
+ AArch64_LD4Fourv8b_POST = 904,
+ AArch64_LD4Fourv8h = 905,
+ AArch64_LD4Fourv8h_POST = 906,
+ AArch64_LD4Rv16b = 907,
+ AArch64_LD4Rv16b_POST = 908,
+ AArch64_LD4Rv1d = 909,
+ AArch64_LD4Rv1d_POST = 910,
+ AArch64_LD4Rv2d = 911,
+ AArch64_LD4Rv2d_POST = 912,
+ AArch64_LD4Rv2s = 913,
+ AArch64_LD4Rv2s_POST = 914,
+ AArch64_LD4Rv4h = 915,
+ AArch64_LD4Rv4h_POST = 916,
+ AArch64_LD4Rv4s = 917,
+ AArch64_LD4Rv4s_POST = 918,
+ AArch64_LD4Rv8b = 919,
+ AArch64_LD4Rv8b_POST = 920,
+ AArch64_LD4Rv8h = 921,
+ AArch64_LD4Rv8h_POST = 922,
+ AArch64_LD4i16 = 923,
+ AArch64_LD4i16_POST = 924,
+ AArch64_LD4i32 = 925,
+ AArch64_LD4i32_POST = 926,
+ AArch64_LD4i64 = 927,
+ AArch64_LD4i64_POST = 928,
+ AArch64_LD4i8 = 929,
+ AArch64_LD4i8_POST = 930,
+ AArch64_LDARB = 931,
+ AArch64_LDARH = 932,
+ AArch64_LDARW = 933,
+ AArch64_LDARX = 934,
+ AArch64_LDAXPW = 935,
+ AArch64_LDAXPX = 936,
+ AArch64_LDAXRB = 937,
+ AArch64_LDAXRH = 938,
+ AArch64_LDAXRW = 939,
+ AArch64_LDAXRX = 940,
+ AArch64_LDNPDi = 941,
+ AArch64_LDNPQi = 942,
+ AArch64_LDNPSi = 943,
+ AArch64_LDNPWi = 944,
+ AArch64_LDNPXi = 945,
+ AArch64_LDPDi = 946,
+ AArch64_LDPDpost = 947,
+ AArch64_LDPDpre = 948,
+ AArch64_LDPQi = 949,
+ AArch64_LDPQpost = 950,
+ AArch64_LDPQpre = 951,
+ AArch64_LDPSWi = 952,
+ AArch64_LDPSWpost = 953,
+ AArch64_LDPSWpre = 954,
+ AArch64_LDPSi = 955,
+ AArch64_LDPSpost = 956,
+ AArch64_LDPSpre = 957,
+ AArch64_LDPWi = 958,
+ AArch64_LDPWpost = 959,
+ AArch64_LDPWpre = 960,
+ AArch64_LDPXi = 961,
+ AArch64_LDPXpost = 962,
+ AArch64_LDPXpre = 963,
+ AArch64_LDRBBpost = 964,
+ AArch64_LDRBBpre = 965,
+ AArch64_LDRBBroW = 966,
+ AArch64_LDRBBroX = 967,
+ AArch64_LDRBBui = 968,
+ AArch64_LDRBpost = 969,
+ AArch64_LDRBpre = 970,
+ AArch64_LDRBroW = 971,
+ AArch64_LDRBroX = 972,
+ AArch64_LDRBui = 973,
+ AArch64_LDRDl = 974,
+ AArch64_LDRDpost = 975,
+ AArch64_LDRDpre = 976,
+ AArch64_LDRDroW = 977,
+ AArch64_LDRDroX = 978,
+ AArch64_LDRDui = 979,
+ AArch64_LDRHHpost = 980,
+ AArch64_LDRHHpre = 981,
+ AArch64_LDRHHroW = 982,
+ AArch64_LDRHHroX = 983,
+ AArch64_LDRHHui = 984,
+ AArch64_LDRHpost = 985,
+ AArch64_LDRHpre = 986,
+ AArch64_LDRHroW = 987,
+ AArch64_LDRHroX = 988,
+ AArch64_LDRHui = 989,
+ AArch64_LDRQl = 990,
+ AArch64_LDRQpost = 991,
+ AArch64_LDRQpre = 992,
+ AArch64_LDRQroW = 993,
+ AArch64_LDRQroX = 994,
+ AArch64_LDRQui = 995,
+ AArch64_LDRSBWpost = 996,
+ AArch64_LDRSBWpre = 997,
+ AArch64_LDRSBWroW = 998,
+ AArch64_LDRSBWroX = 999,
+ AArch64_LDRSBWui = 1000,
+ AArch64_LDRSBXpost = 1001,
+ AArch64_LDRSBXpre = 1002,
+ AArch64_LDRSBXroW = 1003,
+ AArch64_LDRSBXroX = 1004,
+ AArch64_LDRSBXui = 1005,
+ AArch64_LDRSHWpost = 1006,
+ AArch64_LDRSHWpre = 1007,
+ AArch64_LDRSHWroW = 1008,
+ AArch64_LDRSHWroX = 1009,
+ AArch64_LDRSHWui = 1010,
+ AArch64_LDRSHXpost = 1011,
+ AArch64_LDRSHXpre = 1012,
+ AArch64_LDRSHXroW = 1013,
+ AArch64_LDRSHXroX = 1014,
+ AArch64_LDRSHXui = 1015,
+ AArch64_LDRSWl = 1016,
+ AArch64_LDRSWpost = 1017,
+ AArch64_LDRSWpre = 1018,
+ AArch64_LDRSWroW = 1019,
+ AArch64_LDRSWroX = 1020,
+ AArch64_LDRSWui = 1021,
+ AArch64_LDRSl = 1022,
+ AArch64_LDRSpost = 1023,
+ AArch64_LDRSpre = 1024,
+ AArch64_LDRSroW = 1025,
+ AArch64_LDRSroX = 1026,
+ AArch64_LDRSui = 1027,
+ AArch64_LDRWl = 1028,
+ AArch64_LDRWpost = 1029,
+ AArch64_LDRWpre = 1030,
+ AArch64_LDRWroW = 1031,
+ AArch64_LDRWroX = 1032,
+ AArch64_LDRWui = 1033,
+ AArch64_LDRXl = 1034,
+ AArch64_LDRXpost = 1035,
+ AArch64_LDRXpre = 1036,
+ AArch64_LDRXroW = 1037,
+ AArch64_LDRXroX = 1038,
+ AArch64_LDRXui = 1039,
+ AArch64_LDTRBi = 1040,
+ AArch64_LDTRHi = 1041,
+ AArch64_LDTRSBWi = 1042,
+ AArch64_LDTRSBXi = 1043,
+ AArch64_LDTRSHWi = 1044,
+ AArch64_LDTRSHXi = 1045,
+ AArch64_LDTRSWi = 1046,
+ AArch64_LDTRWi = 1047,
+ AArch64_LDTRXi = 1048,
+ AArch64_LDURBBi = 1049,
+ AArch64_LDURBi = 1050,
+ AArch64_LDURDi = 1051,
+ AArch64_LDURHHi = 1052,
+ AArch64_LDURHi = 1053,
+ AArch64_LDURQi = 1054,
+ AArch64_LDURSBWi = 1055,
+ AArch64_LDURSBXi = 1056,
+ AArch64_LDURSHWi = 1057,
+ AArch64_LDURSHXi = 1058,
+ AArch64_LDURSWi = 1059,
+ AArch64_LDURSi = 1060,
+ AArch64_LDURWi = 1061,
+ AArch64_LDURXi = 1062,
+ AArch64_LDXPW = 1063,
+ AArch64_LDXPX = 1064,
+ AArch64_LDXRB = 1065,
+ AArch64_LDXRH = 1066,
+ AArch64_LDXRW = 1067,
+ AArch64_LDXRX = 1068,
+ AArch64_LOADgot = 1069,
+ AArch64_LSLVWr = 1070,
+ AArch64_LSLVXr = 1071,
+ AArch64_LSRVWr = 1072,
+ AArch64_LSRVXr = 1073,
+ AArch64_MADDWrrr = 1074,
+ AArch64_MADDXrrr = 1075,
+ AArch64_MLAv16i8 = 1076,
+ AArch64_MLAv2i32 = 1077,
+ AArch64_MLAv2i32_indexed = 1078,
+ AArch64_MLAv4i16 = 1079,
+ AArch64_MLAv4i16_indexed = 1080,
+ AArch64_MLAv4i32 = 1081,
+ AArch64_MLAv4i32_indexed = 1082,
+ AArch64_MLAv8i16 = 1083,
+ AArch64_MLAv8i16_indexed = 1084,
+ AArch64_MLAv8i8 = 1085,
+ AArch64_MLSv16i8 = 1086,
+ AArch64_MLSv2i32 = 1087,
+ AArch64_MLSv2i32_indexed = 1088,
+ AArch64_MLSv4i16 = 1089,
+ AArch64_MLSv4i16_indexed = 1090,
+ AArch64_MLSv4i32 = 1091,
+ AArch64_MLSv4i32_indexed = 1092,
+ AArch64_MLSv8i16 = 1093,
+ AArch64_MLSv8i16_indexed = 1094,
+ AArch64_MLSv8i8 = 1095,
+ AArch64_MOVID = 1096,
+ AArch64_MOVIv16b_ns = 1097,
+ AArch64_MOVIv2d_ns = 1098,
+ AArch64_MOVIv2i32 = 1099,
+ AArch64_MOVIv2s_msl = 1100,
+ AArch64_MOVIv4i16 = 1101,
+ AArch64_MOVIv4i32 = 1102,
+ AArch64_MOVIv4s_msl = 1103,
+ AArch64_MOVIv8b_ns = 1104,
+ AArch64_MOVIv8i16 = 1105,
+ AArch64_MOVKWi = 1106,
+ AArch64_MOVKXi = 1107,
+ AArch64_MOVNWi = 1108,
+ AArch64_MOVNXi = 1109,
+ AArch64_MOVZWi = 1110,
+ AArch64_MOVZXi = 1111,
+ AArch64_MOVaddr = 1112,
+ AArch64_MOVaddrBA = 1113,
+ AArch64_MOVaddrCP = 1114,
+ AArch64_MOVaddrEXT = 1115,
+ AArch64_MOVaddrJT = 1116,
+ AArch64_MOVaddrTLS = 1117,
+ AArch64_MOVi32imm = 1118,
+ AArch64_MOVi64imm = 1119,
+ AArch64_MRS = 1120,
+ AArch64_MSR = 1121,
+ AArch64_MSRpstate = 1122,
+ AArch64_MSUBWrrr = 1123,
+ AArch64_MSUBXrrr = 1124,
+ AArch64_MULv16i8 = 1125,
+ AArch64_MULv2i32 = 1126,
+ AArch64_MULv2i32_indexed = 1127,
+ AArch64_MULv4i16 = 1128,
+ AArch64_MULv4i16_indexed = 1129,
+ AArch64_MULv4i32 = 1130,
+ AArch64_MULv4i32_indexed = 1131,
+ AArch64_MULv8i16 = 1132,
+ AArch64_MULv8i16_indexed = 1133,
+ AArch64_MULv8i8 = 1134,
+ AArch64_MVNIv2i32 = 1135,
+ AArch64_MVNIv2s_msl = 1136,
+ AArch64_MVNIv4i16 = 1137,
+ AArch64_MVNIv4i32 = 1138,
+ AArch64_MVNIv4s_msl = 1139,
+ AArch64_MVNIv8i16 = 1140,
+ AArch64_NEGv16i8 = 1141,
+ AArch64_NEGv1i64 = 1142,
+ AArch64_NEGv2i32 = 1143,
+ AArch64_NEGv2i64 = 1144,
+ AArch64_NEGv4i16 = 1145,
+ AArch64_NEGv4i32 = 1146,
+ AArch64_NEGv8i16 = 1147,
+ AArch64_NEGv8i8 = 1148,
+ AArch64_NOTv16i8 = 1149,
+ AArch64_NOTv8i8 = 1150,
+ AArch64_ORNWrr = 1151,
+ AArch64_ORNWrs = 1152,
+ AArch64_ORNXrr = 1153,
+ AArch64_ORNXrs = 1154,
+ AArch64_ORNv16i8 = 1155,
+ AArch64_ORNv8i8 = 1156,
+ AArch64_ORRWri = 1157,
+ AArch64_ORRWrr = 1158,
+ AArch64_ORRWrs = 1159,
+ AArch64_ORRXri = 1160,
+ AArch64_ORRXrr = 1161,
+ AArch64_ORRXrs = 1162,
+ AArch64_ORRv16i8 = 1163,
+ AArch64_ORRv2i32 = 1164,
+ AArch64_ORRv4i16 = 1165,
+ AArch64_ORRv4i32 = 1166,
+ AArch64_ORRv8i16 = 1167,
+ AArch64_ORRv8i8 = 1168,
+ AArch64_PMULLv16i8 = 1169,
+ AArch64_PMULLv1i64 = 1170,
+ AArch64_PMULLv2i64 = 1171,
+ AArch64_PMULLv8i8 = 1172,
+ AArch64_PMULv16i8 = 1173,
+ AArch64_PMULv8i8 = 1174,
+ AArch64_PRFMl = 1175,
+ AArch64_PRFMroW = 1176,
+ AArch64_PRFMroX = 1177,
+ AArch64_PRFMui = 1178,
+ AArch64_PRFUMi = 1179,
+ AArch64_RADDHNv2i64_v2i32 = 1180,
+ AArch64_RADDHNv2i64_v4i32 = 1181,
+ AArch64_RADDHNv4i32_v4i16 = 1182,
+ AArch64_RADDHNv4i32_v8i16 = 1183,
+ AArch64_RADDHNv8i16_v16i8 = 1184,
+ AArch64_RADDHNv8i16_v8i8 = 1185,
+ AArch64_RBITWr = 1186,
+ AArch64_RBITXr = 1187,
+ AArch64_RBITv16i8 = 1188,
+ AArch64_RBITv8i8 = 1189,
+ AArch64_RET = 1190,
+ AArch64_RET_ReallyLR = 1191,
+ AArch64_REV16Wr = 1192,
+ AArch64_REV16Xr = 1193,
+ AArch64_REV16v16i8 = 1194,
+ AArch64_REV16v8i8 = 1195,
+ AArch64_REV32Xr = 1196,
+ AArch64_REV32v16i8 = 1197,
+ AArch64_REV32v4i16 = 1198,
+ AArch64_REV32v8i16 = 1199,
+ AArch64_REV32v8i8 = 1200,
+ AArch64_REV64v16i8 = 1201,
+ AArch64_REV64v2i32 = 1202,
+ AArch64_REV64v4i16 = 1203,
+ AArch64_REV64v4i32 = 1204,
+ AArch64_REV64v8i16 = 1205,
+ AArch64_REV64v8i8 = 1206,
+ AArch64_REVWr = 1207,
+ AArch64_REVXr = 1208,
+ AArch64_RORVWr = 1209,
+ AArch64_RORVXr = 1210,
+ AArch64_RSHRNv16i8_shift = 1211,
+ AArch64_RSHRNv2i32_shift = 1212,
+ AArch64_RSHRNv4i16_shift = 1213,
+ AArch64_RSHRNv4i32_shift = 1214,
+ AArch64_RSHRNv8i16_shift = 1215,
+ AArch64_RSHRNv8i8_shift = 1216,
+ AArch64_RSUBHNv2i64_v2i32 = 1217,
+ AArch64_RSUBHNv2i64_v4i32 = 1218,
+ AArch64_RSUBHNv4i32_v4i16 = 1219,
+ AArch64_RSUBHNv4i32_v8i16 = 1220,
+ AArch64_RSUBHNv8i16_v16i8 = 1221,
+ AArch64_RSUBHNv8i16_v8i8 = 1222,
+ AArch64_SABALv16i8_v8i16 = 1223,
+ AArch64_SABALv2i32_v2i64 = 1224,
+ AArch64_SABALv4i16_v4i32 = 1225,
+ AArch64_SABALv4i32_v2i64 = 1226,
+ AArch64_SABALv8i16_v4i32 = 1227,
+ AArch64_SABALv8i8_v8i16 = 1228,
+ AArch64_SABAv16i8 = 1229,
+ AArch64_SABAv2i32 = 1230,
+ AArch64_SABAv4i16 = 1231,
+ AArch64_SABAv4i32 = 1232,
+ AArch64_SABAv8i16 = 1233,
+ AArch64_SABAv8i8 = 1234,
+ AArch64_SABDLv16i8_v8i16 = 1235,
+ AArch64_SABDLv2i32_v2i64 = 1236,
+ AArch64_SABDLv4i16_v4i32 = 1237,
+ AArch64_SABDLv4i32_v2i64 = 1238,
+ AArch64_SABDLv8i16_v4i32 = 1239,
+ AArch64_SABDLv8i8_v8i16 = 1240,
+ AArch64_SABDv16i8 = 1241,
+ AArch64_SABDv2i32 = 1242,
+ AArch64_SABDv4i16 = 1243,
+ AArch64_SABDv4i32 = 1244,
+ AArch64_SABDv8i16 = 1245,
+ AArch64_SABDv8i8 = 1246,
+ AArch64_SADALPv16i8_v8i16 = 1247,
+ AArch64_SADALPv2i32_v1i64 = 1248,
+ AArch64_SADALPv4i16_v2i32 = 1249,
+ AArch64_SADALPv4i32_v2i64 = 1250,
+ AArch64_SADALPv8i16_v4i32 = 1251,
+ AArch64_SADALPv8i8_v4i16 = 1252,
+ AArch64_SADDLPv16i8_v8i16 = 1253,
+ AArch64_SADDLPv2i32_v1i64 = 1254,
+ AArch64_SADDLPv4i16_v2i32 = 1255,
+ AArch64_SADDLPv4i32_v2i64 = 1256,
+ AArch64_SADDLPv8i16_v4i32 = 1257,
+ AArch64_SADDLPv8i8_v4i16 = 1258,
+ AArch64_SADDLVv16i8v = 1259,
+ AArch64_SADDLVv4i16v = 1260,
+ AArch64_SADDLVv4i32v = 1261,
+ AArch64_SADDLVv8i16v = 1262,
+ AArch64_SADDLVv8i8v = 1263,
+ AArch64_SADDLv16i8_v8i16 = 1264,
+ AArch64_SADDLv2i32_v2i64 = 1265,
+ AArch64_SADDLv4i16_v4i32 = 1266,
+ AArch64_SADDLv4i32_v2i64 = 1267,
+ AArch64_SADDLv8i16_v4i32 = 1268,
+ AArch64_SADDLv8i8_v8i16 = 1269,
+ AArch64_SADDWv16i8_v8i16 = 1270,
+ AArch64_SADDWv2i32_v2i64 = 1271,
+ AArch64_SADDWv4i16_v4i32 = 1272,
+ AArch64_SADDWv4i32_v2i64 = 1273,
+ AArch64_SADDWv8i16_v4i32 = 1274,
+ AArch64_SADDWv8i8_v8i16 = 1275,
+ AArch64_SBCSWr = 1276,
+ AArch64_SBCSXr = 1277,
+ AArch64_SBCWr = 1278,
+ AArch64_SBCXr = 1279,
+ AArch64_SBFMWri = 1280,
+ AArch64_SBFMXri = 1281,
+ AArch64_SCVTFSWDri = 1282,
+ AArch64_SCVTFSWSri = 1283,
+ AArch64_SCVTFSXDri = 1284,
+ AArch64_SCVTFSXSri = 1285,
+ AArch64_SCVTFUWDri = 1286,
+ AArch64_SCVTFUWSri = 1287,
+ AArch64_SCVTFUXDri = 1288,
+ AArch64_SCVTFUXSri = 1289,
+ AArch64_SCVTFd = 1290,
+ AArch64_SCVTFs = 1291,
+ AArch64_SCVTFv1i32 = 1292,
+ AArch64_SCVTFv1i64 = 1293,
+ AArch64_SCVTFv2f32 = 1294,
+ AArch64_SCVTFv2f64 = 1295,
+ AArch64_SCVTFv2i32_shift = 1296,
+ AArch64_SCVTFv2i64_shift = 1297,
+ AArch64_SCVTFv4f32 = 1298,
+ AArch64_SCVTFv4i32_shift = 1299,
+ AArch64_SDIVWr = 1300,
+ AArch64_SDIVXr = 1301,
+ AArch64_SDIV_IntWr = 1302,
+ AArch64_SDIV_IntXr = 1303,
+ AArch64_SHA1Crrr = 1304,
+ AArch64_SHA1Hrr = 1305,
+ AArch64_SHA1Mrrr = 1306,
+ AArch64_SHA1Prrr = 1307,
+ AArch64_SHA1SU0rrr = 1308,
+ AArch64_SHA1SU1rr = 1309,
+ AArch64_SHA256H2rrr = 1310,
+ AArch64_SHA256Hrrr = 1311,
+ AArch64_SHA256SU0rr = 1312,
+ AArch64_SHA256SU1rrr = 1313,
+ AArch64_SHADDv16i8 = 1314,
+ AArch64_SHADDv2i32 = 1315,
+ AArch64_SHADDv4i16 = 1316,
+ AArch64_SHADDv4i32 = 1317,
+ AArch64_SHADDv8i16 = 1318,
+ AArch64_SHADDv8i8 = 1319,
+ AArch64_SHLLv16i8 = 1320,
+ AArch64_SHLLv2i32 = 1321,
+ AArch64_SHLLv4i16 = 1322,
+ AArch64_SHLLv4i32 = 1323,
+ AArch64_SHLLv8i16 = 1324,
+ AArch64_SHLLv8i8 = 1325,
+ AArch64_SHLd = 1326,
+ AArch64_SHLv16i8_shift = 1327,
+ AArch64_SHLv2i32_shift = 1328,
+ AArch64_SHLv2i64_shift = 1329,
+ AArch64_SHLv4i16_shift = 1330,
+ AArch64_SHLv4i32_shift = 1331,
+ AArch64_SHLv8i16_shift = 1332,
+ AArch64_SHLv8i8_shift = 1333,
+ AArch64_SHRNv16i8_shift = 1334,
+ AArch64_SHRNv2i32_shift = 1335,
+ AArch64_SHRNv4i16_shift = 1336,
+ AArch64_SHRNv4i32_shift = 1337,
+ AArch64_SHRNv8i16_shift = 1338,
+ AArch64_SHRNv8i8_shift = 1339,
+ AArch64_SHSUBv16i8 = 1340,
+ AArch64_SHSUBv2i32 = 1341,
+ AArch64_SHSUBv4i16 = 1342,
+ AArch64_SHSUBv4i32 = 1343,
+ AArch64_SHSUBv8i16 = 1344,
+ AArch64_SHSUBv8i8 = 1345,
+ AArch64_SLId = 1346,
+ AArch64_SLIv16i8_shift = 1347,
+ AArch64_SLIv2i32_shift = 1348,
+ AArch64_SLIv2i64_shift = 1349,
+ AArch64_SLIv4i16_shift = 1350,
+ AArch64_SLIv4i32_shift = 1351,
+ AArch64_SLIv8i16_shift = 1352,
+ AArch64_SLIv8i8_shift = 1353,
+ AArch64_SMADDLrrr = 1354,
+ AArch64_SMAXPv16i8 = 1355,
+ AArch64_SMAXPv2i32 = 1356,
+ AArch64_SMAXPv4i16 = 1357,
+ AArch64_SMAXPv4i32 = 1358,
+ AArch64_SMAXPv8i16 = 1359,
+ AArch64_SMAXPv8i8 = 1360,
+ AArch64_SMAXVv16i8v = 1361,
+ AArch64_SMAXVv4i16v = 1362,
+ AArch64_SMAXVv4i32v = 1363,
+ AArch64_SMAXVv8i16v = 1364,
+ AArch64_SMAXVv8i8v = 1365,
+ AArch64_SMAXv16i8 = 1366,
+ AArch64_SMAXv2i32 = 1367,
+ AArch64_SMAXv4i16 = 1368,
+ AArch64_SMAXv4i32 = 1369,
+ AArch64_SMAXv8i16 = 1370,
+ AArch64_SMAXv8i8 = 1371,
+ AArch64_SMC = 1372,
+ AArch64_SMINPv16i8 = 1373,
+ AArch64_SMINPv2i32 = 1374,
+ AArch64_SMINPv4i16 = 1375,
+ AArch64_SMINPv4i32 = 1376,
+ AArch64_SMINPv8i16 = 1377,
+ AArch64_SMINPv8i8 = 1378,
+ AArch64_SMINVv16i8v = 1379,
+ AArch64_SMINVv4i16v = 1380,
+ AArch64_SMINVv4i32v = 1381,
+ AArch64_SMINVv8i16v = 1382,
+ AArch64_SMINVv8i8v = 1383,
+ AArch64_SMINv16i8 = 1384,
+ AArch64_SMINv2i32 = 1385,
+ AArch64_SMINv4i16 = 1386,
+ AArch64_SMINv4i32 = 1387,
+ AArch64_SMINv8i16 = 1388,
+ AArch64_SMINv8i8 = 1389,
+ AArch64_SMLALv16i8_v8i16 = 1390,
+ AArch64_SMLALv2i32_indexed = 1391,
+ AArch64_SMLALv2i32_v2i64 = 1392,
+ AArch64_SMLALv4i16_indexed = 1393,
+ AArch64_SMLALv4i16_v4i32 = 1394,
+ AArch64_SMLALv4i32_indexed = 1395,
+ AArch64_SMLALv4i32_v2i64 = 1396,
+ AArch64_SMLALv8i16_indexed = 1397,
+ AArch64_SMLALv8i16_v4i32 = 1398,
+ AArch64_SMLALv8i8_v8i16 = 1399,
+ AArch64_SMLSLv16i8_v8i16 = 1400,
+ AArch64_SMLSLv2i32_indexed = 1401,
+ AArch64_SMLSLv2i32_v2i64 = 1402,
+ AArch64_SMLSLv4i16_indexed = 1403,
+ AArch64_SMLSLv4i16_v4i32 = 1404,
+ AArch64_SMLSLv4i32_indexed = 1405,
+ AArch64_SMLSLv4i32_v2i64 = 1406,
+ AArch64_SMLSLv8i16_indexed = 1407,
+ AArch64_SMLSLv8i16_v4i32 = 1408,
+ AArch64_SMLSLv8i8_v8i16 = 1409,
+ AArch64_SMOVvi16to32 = 1410,
+ AArch64_SMOVvi16to64 = 1411,
+ AArch64_SMOVvi32to64 = 1412,
+ AArch64_SMOVvi8to32 = 1413,
+ AArch64_SMOVvi8to64 = 1414,
+ AArch64_SMSUBLrrr = 1415,
+ AArch64_SMULHrr = 1416,
+ AArch64_SMULLv16i8_v8i16 = 1417,
+ AArch64_SMULLv2i32_indexed = 1418,
+ AArch64_SMULLv2i32_v2i64 = 1419,
+ AArch64_SMULLv4i16_indexed = 1420,
+ AArch64_SMULLv4i16_v4i32 = 1421,
+ AArch64_SMULLv4i32_indexed = 1422,
+ AArch64_SMULLv4i32_v2i64 = 1423,
+ AArch64_SMULLv8i16_indexed = 1424,
+ AArch64_SMULLv8i16_v4i32 = 1425,
+ AArch64_SMULLv8i8_v8i16 = 1426,
+ AArch64_SQABSv16i8 = 1427,
+ AArch64_SQABSv1i16 = 1428,
+ AArch64_SQABSv1i32 = 1429,
+ AArch64_SQABSv1i64 = 1430,
+ AArch64_SQABSv1i8 = 1431,
+ AArch64_SQABSv2i32 = 1432,
+ AArch64_SQABSv2i64 = 1433,
+ AArch64_SQABSv4i16 = 1434,
+ AArch64_SQABSv4i32 = 1435,
+ AArch64_SQABSv8i16 = 1436,
+ AArch64_SQABSv8i8 = 1437,
+ AArch64_SQADDv16i8 = 1438,
+ AArch64_SQADDv1i16 = 1439,
+ AArch64_SQADDv1i32 = 1440,
+ AArch64_SQADDv1i64 = 1441,
+ AArch64_SQADDv1i8 = 1442,
+ AArch64_SQADDv2i32 = 1443,
+ AArch64_SQADDv2i64 = 1444,
+ AArch64_SQADDv4i16 = 1445,
+ AArch64_SQADDv4i32 = 1446,
+ AArch64_SQADDv8i16 = 1447,
+ AArch64_SQADDv8i8 = 1448,
+ AArch64_SQDMLALi16 = 1449,
+ AArch64_SQDMLALi32 = 1450,
+ AArch64_SQDMLALv1i32_indexed = 1451,
+ AArch64_SQDMLALv1i64_indexed = 1452,
+ AArch64_SQDMLALv2i32_indexed = 1453,
+ AArch64_SQDMLALv2i32_v2i64 = 1454,
+ AArch64_SQDMLALv4i16_indexed = 1455,
+ AArch64_SQDMLALv4i16_v4i32 = 1456,
+ AArch64_SQDMLALv4i32_indexed = 1457,
+ AArch64_SQDMLALv4i32_v2i64 = 1458,
+ AArch64_SQDMLALv8i16_indexed = 1459,
+ AArch64_SQDMLALv8i16_v4i32 = 1460,
+ AArch64_SQDMLSLi16 = 1461,
+ AArch64_SQDMLSLi32 = 1462,
+ AArch64_SQDMLSLv1i32_indexed = 1463,
+ AArch64_SQDMLSLv1i64_indexed = 1464,
+ AArch64_SQDMLSLv2i32_indexed = 1465,
+ AArch64_SQDMLSLv2i32_v2i64 = 1466,
+ AArch64_SQDMLSLv4i16_indexed = 1467,
+ AArch64_SQDMLSLv4i16_v4i32 = 1468,
+ AArch64_SQDMLSLv4i32_indexed = 1469,
+ AArch64_SQDMLSLv4i32_v2i64 = 1470,
+ AArch64_SQDMLSLv8i16_indexed = 1471,
+ AArch64_SQDMLSLv8i16_v4i32 = 1472,
+ AArch64_SQDMULHv1i16 = 1473,
+ AArch64_SQDMULHv1i16_indexed = 1474,
+ AArch64_SQDMULHv1i32 = 1475,
+ AArch64_SQDMULHv1i32_indexed = 1476,
+ AArch64_SQDMULHv2i32 = 1477,
+ AArch64_SQDMULHv2i32_indexed = 1478,
+ AArch64_SQDMULHv4i16 = 1479,
+ AArch64_SQDMULHv4i16_indexed = 1480,
+ AArch64_SQDMULHv4i32 = 1481,
+ AArch64_SQDMULHv4i32_indexed = 1482,
+ AArch64_SQDMULHv8i16 = 1483,
+ AArch64_SQDMULHv8i16_indexed = 1484,
+ AArch64_SQDMULLi16 = 1485,
+ AArch64_SQDMULLi32 = 1486,
+ AArch64_SQDMULLv1i32_indexed = 1487,
+ AArch64_SQDMULLv1i64_indexed = 1488,
+ AArch64_SQDMULLv2i32_indexed = 1489,
+ AArch64_SQDMULLv2i32_v2i64 = 1490,
+ AArch64_SQDMULLv4i16_indexed = 1491,
+ AArch64_SQDMULLv4i16_v4i32 = 1492,
+ AArch64_SQDMULLv4i32_indexed = 1493,
+ AArch64_SQDMULLv4i32_v2i64 = 1494,
+ AArch64_SQDMULLv8i16_indexed = 1495,
+ AArch64_SQDMULLv8i16_v4i32 = 1496,
+ AArch64_SQNEGv16i8 = 1497,
+ AArch64_SQNEGv1i16 = 1498,
+ AArch64_SQNEGv1i32 = 1499,
+ AArch64_SQNEGv1i64 = 1500,
+ AArch64_SQNEGv1i8 = 1501,
+ AArch64_SQNEGv2i32 = 1502,
+ AArch64_SQNEGv2i64 = 1503,
+ AArch64_SQNEGv4i16 = 1504,
+ AArch64_SQNEGv4i32 = 1505,
+ AArch64_SQNEGv8i16 = 1506,
+ AArch64_SQNEGv8i8 = 1507,
+ AArch64_SQRDMULHv1i16 = 1508,
+ AArch64_SQRDMULHv1i16_indexed = 1509,
+ AArch64_SQRDMULHv1i32 = 1510,
+ AArch64_SQRDMULHv1i32_indexed = 1511,
+ AArch64_SQRDMULHv2i32 = 1512,
+ AArch64_SQRDMULHv2i32_indexed = 1513,
+ AArch64_SQRDMULHv4i16 = 1514,
+ AArch64_SQRDMULHv4i16_indexed = 1515,
+ AArch64_SQRDMULHv4i32 = 1516,
+ AArch64_SQRDMULHv4i32_indexed = 1517,
+ AArch64_SQRDMULHv8i16 = 1518,
+ AArch64_SQRDMULHv8i16_indexed = 1519,
+ AArch64_SQRSHLv16i8 = 1520,
+ AArch64_SQRSHLv1i16 = 1521,
+ AArch64_SQRSHLv1i32 = 1522,
+ AArch64_SQRSHLv1i64 = 1523,
+ AArch64_SQRSHLv1i8 = 1524,
+ AArch64_SQRSHLv2i32 = 1525,
+ AArch64_SQRSHLv2i64 = 1526,
+ AArch64_SQRSHLv4i16 = 1527,
+ AArch64_SQRSHLv4i32 = 1528,
+ AArch64_SQRSHLv8i16 = 1529,
+ AArch64_SQRSHLv8i8 = 1530,
+ AArch64_SQRSHRNb = 1531,
+ AArch64_SQRSHRNh = 1532,
+ AArch64_SQRSHRNs = 1533,
+ AArch64_SQRSHRNv16i8_shift = 1534,
+ AArch64_SQRSHRNv2i32_shift = 1535,
+ AArch64_SQRSHRNv4i16_shift = 1536,
+ AArch64_SQRSHRNv4i32_shift = 1537,
+ AArch64_SQRSHRNv8i16_shift = 1538,
+ AArch64_SQRSHRNv8i8_shift = 1539,
+ AArch64_SQRSHRUNb = 1540,
+ AArch64_SQRSHRUNh = 1541,
+ AArch64_SQRSHRUNs = 1542,
+ AArch64_SQRSHRUNv16i8_shift = 1543,
+ AArch64_SQRSHRUNv2i32_shift = 1544,
+ AArch64_SQRSHRUNv4i16_shift = 1545,
+ AArch64_SQRSHRUNv4i32_shift = 1546,
+ AArch64_SQRSHRUNv8i16_shift = 1547,
+ AArch64_SQRSHRUNv8i8_shift = 1548,
+ AArch64_SQSHLUb = 1549,
+ AArch64_SQSHLUd = 1550,
+ AArch64_SQSHLUh = 1551,
+ AArch64_SQSHLUs = 1552,
+ AArch64_SQSHLUv16i8_shift = 1553,
+ AArch64_SQSHLUv2i32_shift = 1554,
+ AArch64_SQSHLUv2i64_shift = 1555,
+ AArch64_SQSHLUv4i16_shift = 1556,
+ AArch64_SQSHLUv4i32_shift = 1557,
+ AArch64_SQSHLUv8i16_shift = 1558,
+ AArch64_SQSHLUv8i8_shift = 1559,
+ AArch64_SQSHLb = 1560,
+ AArch64_SQSHLd = 1561,
+ AArch64_SQSHLh = 1562,
+ AArch64_SQSHLs = 1563,
+ AArch64_SQSHLv16i8 = 1564,
+ AArch64_SQSHLv16i8_shift = 1565,
+ AArch64_SQSHLv1i16 = 1566,
+ AArch64_SQSHLv1i32 = 1567,
+ AArch64_SQSHLv1i64 = 1568,
+ AArch64_SQSHLv1i8 = 1569,
+ AArch64_SQSHLv2i32 = 1570,
+ AArch64_SQSHLv2i32_shift = 1571,
+ AArch64_SQSHLv2i64 = 1572,
+ AArch64_SQSHLv2i64_shift = 1573,
+ AArch64_SQSHLv4i16 = 1574,
+ AArch64_SQSHLv4i16_shift = 1575,
+ AArch64_SQSHLv4i32 = 1576,
+ AArch64_SQSHLv4i32_shift = 1577,
+ AArch64_SQSHLv8i16 = 1578,
+ AArch64_SQSHLv8i16_shift = 1579,
+ AArch64_SQSHLv8i8 = 1580,
+ AArch64_SQSHLv8i8_shift = 1581,
+ AArch64_SQSHRNb = 1582,
+ AArch64_SQSHRNh = 1583,
+ AArch64_SQSHRNs = 1584,
+ AArch64_SQSHRNv16i8_shift = 1585,
+ AArch64_SQSHRNv2i32_shift = 1586,
+ AArch64_SQSHRNv4i16_shift = 1587,
+ AArch64_SQSHRNv4i32_shift = 1588,
+ AArch64_SQSHRNv8i16_shift = 1589,
+ AArch64_SQSHRNv8i8_shift = 1590,
+ AArch64_SQSHRUNb = 1591,
+ AArch64_SQSHRUNh = 1592,
+ AArch64_SQSHRUNs = 1593,
+ AArch64_SQSHRUNv16i8_shift = 1594,
+ AArch64_SQSHRUNv2i32_shift = 1595,
+ AArch64_SQSHRUNv4i16_shift = 1596,
+ AArch64_SQSHRUNv4i32_shift = 1597,
+ AArch64_SQSHRUNv8i16_shift = 1598,
+ AArch64_SQSHRUNv8i8_shift = 1599,
+ AArch64_SQSUBv16i8 = 1600,
+ AArch64_SQSUBv1i16 = 1601,
+ AArch64_SQSUBv1i32 = 1602,
+ AArch64_SQSUBv1i64 = 1603,
+ AArch64_SQSUBv1i8 = 1604,
+ AArch64_SQSUBv2i32 = 1605,
+ AArch64_SQSUBv2i64 = 1606,
+ AArch64_SQSUBv4i16 = 1607,
+ AArch64_SQSUBv4i32 = 1608,
+ AArch64_SQSUBv8i16 = 1609,
+ AArch64_SQSUBv8i8 = 1610,
+ AArch64_SQXTNv16i8 = 1611,
+ AArch64_SQXTNv1i16 = 1612,
+ AArch64_SQXTNv1i32 = 1613,
+ AArch64_SQXTNv1i8 = 1614,
+ AArch64_SQXTNv2i32 = 1615,
+ AArch64_SQXTNv4i16 = 1616,
+ AArch64_SQXTNv4i32 = 1617,
+ AArch64_SQXTNv8i16 = 1618,
+ AArch64_SQXTNv8i8 = 1619,
+ AArch64_SQXTUNv16i8 = 1620,
+ AArch64_SQXTUNv1i16 = 1621,
+ AArch64_SQXTUNv1i32 = 1622,
+ AArch64_SQXTUNv1i8 = 1623,
+ AArch64_SQXTUNv2i32 = 1624,
+ AArch64_SQXTUNv4i16 = 1625,
+ AArch64_SQXTUNv4i32 = 1626,
+ AArch64_SQXTUNv8i16 = 1627,
+ AArch64_SQXTUNv8i8 = 1628,
+ AArch64_SRHADDv16i8 = 1629,
+ AArch64_SRHADDv2i32 = 1630,
+ AArch64_SRHADDv4i16 = 1631,
+ AArch64_SRHADDv4i32 = 1632,
+ AArch64_SRHADDv8i16 = 1633,
+ AArch64_SRHADDv8i8 = 1634,
+ AArch64_SRId = 1635,
+ AArch64_SRIv16i8_shift = 1636,
+ AArch64_SRIv2i32_shift = 1637,
+ AArch64_SRIv2i64_shift = 1638,
+ AArch64_SRIv4i16_shift = 1639,
+ AArch64_SRIv4i32_shift = 1640,
+ AArch64_SRIv8i16_shift = 1641,
+ AArch64_SRIv8i8_shift = 1642,
+ AArch64_SRSHLv16i8 = 1643,
+ AArch64_SRSHLv1i64 = 1644,
+ AArch64_SRSHLv2i32 = 1645,
+ AArch64_SRSHLv2i64 = 1646,
+ AArch64_SRSHLv4i16 = 1647,
+ AArch64_SRSHLv4i32 = 1648,
+ AArch64_SRSHLv8i16 = 1649,
+ AArch64_SRSHLv8i8 = 1650,
+ AArch64_SRSHRd = 1651,
+ AArch64_SRSHRv16i8_shift = 1652,
+ AArch64_SRSHRv2i32_shift = 1653,
+ AArch64_SRSHRv2i64_shift = 1654,
+ AArch64_SRSHRv4i16_shift = 1655,
+ AArch64_SRSHRv4i32_shift = 1656,
+ AArch64_SRSHRv8i16_shift = 1657,
+ AArch64_SRSHRv8i8_shift = 1658,
+ AArch64_SRSRAd = 1659,
+ AArch64_SRSRAv16i8_shift = 1660,
+ AArch64_SRSRAv2i32_shift = 1661,
+ AArch64_SRSRAv2i64_shift = 1662,
+ AArch64_SRSRAv4i16_shift = 1663,
+ AArch64_SRSRAv4i32_shift = 1664,
+ AArch64_SRSRAv8i16_shift = 1665,
+ AArch64_SRSRAv8i8_shift = 1666,
+ AArch64_SSHLLv16i8_shift = 1667,
+ AArch64_SSHLLv2i32_shift = 1668,
+ AArch64_SSHLLv4i16_shift = 1669,
+ AArch64_SSHLLv4i32_shift = 1670,
+ AArch64_SSHLLv8i16_shift = 1671,
+ AArch64_SSHLLv8i8_shift = 1672,
+ AArch64_SSHLv16i8 = 1673,
+ AArch64_SSHLv1i64 = 1674,
+ AArch64_SSHLv2i32 = 1675,
+ AArch64_SSHLv2i64 = 1676,
+ AArch64_SSHLv4i16 = 1677,
+ AArch64_SSHLv4i32 = 1678,
+ AArch64_SSHLv8i16 = 1679,
+ AArch64_SSHLv8i8 = 1680,
+ AArch64_SSHRd = 1681,
+ AArch64_SSHRv16i8_shift = 1682,
+ AArch64_SSHRv2i32_shift = 1683,
+ AArch64_SSHRv2i64_shift = 1684,
+ AArch64_SSHRv4i16_shift = 1685,
+ AArch64_SSHRv4i32_shift = 1686,
+ AArch64_SSHRv8i16_shift = 1687,
+ AArch64_SSHRv8i8_shift = 1688,
+ AArch64_SSRAd = 1689,
+ AArch64_SSRAv16i8_shift = 1690,
+ AArch64_SSRAv2i32_shift = 1691,
+ AArch64_SSRAv2i64_shift = 1692,
+ AArch64_SSRAv4i16_shift = 1693,
+ AArch64_SSRAv4i32_shift = 1694,
+ AArch64_SSRAv8i16_shift = 1695,
+ AArch64_SSRAv8i8_shift = 1696,
+ AArch64_SSUBLv16i8_v8i16 = 1697,
+ AArch64_SSUBLv2i32_v2i64 = 1698,
+ AArch64_SSUBLv4i16_v4i32 = 1699,
+ AArch64_SSUBLv4i32_v2i64 = 1700,
+ AArch64_SSUBLv8i16_v4i32 = 1701,
+ AArch64_SSUBLv8i8_v8i16 = 1702,
+ AArch64_SSUBWv16i8_v8i16 = 1703,
+ AArch64_SSUBWv2i32_v2i64 = 1704,
+ AArch64_SSUBWv4i16_v4i32 = 1705,
+ AArch64_SSUBWv4i32_v2i64 = 1706,
+ AArch64_SSUBWv8i16_v4i32 = 1707,
+ AArch64_SSUBWv8i8_v8i16 = 1708,
+ AArch64_ST1Fourv16b = 1709,
+ AArch64_ST1Fourv16b_POST = 1710,
+ AArch64_ST1Fourv1d = 1711,
+ AArch64_ST1Fourv1d_POST = 1712,
+ AArch64_ST1Fourv2d = 1713,
+ AArch64_ST1Fourv2d_POST = 1714,
+ AArch64_ST1Fourv2s = 1715,
+ AArch64_ST1Fourv2s_POST = 1716,
+ AArch64_ST1Fourv4h = 1717,
+ AArch64_ST1Fourv4h_POST = 1718,
+ AArch64_ST1Fourv4s = 1719,
+ AArch64_ST1Fourv4s_POST = 1720,
+ AArch64_ST1Fourv8b = 1721,
+ AArch64_ST1Fourv8b_POST = 1722,
+ AArch64_ST1Fourv8h = 1723,
+ AArch64_ST1Fourv8h_POST = 1724,
+ AArch64_ST1Onev16b = 1725,
+ AArch64_ST1Onev16b_POST = 1726,
+ AArch64_ST1Onev1d = 1727,
+ AArch64_ST1Onev1d_POST = 1728,
+ AArch64_ST1Onev2d = 1729,
+ AArch64_ST1Onev2d_POST = 1730,
+ AArch64_ST1Onev2s = 1731,
+ AArch64_ST1Onev2s_POST = 1732,
+ AArch64_ST1Onev4h = 1733,
+ AArch64_ST1Onev4h_POST = 1734,
+ AArch64_ST1Onev4s = 1735,
+ AArch64_ST1Onev4s_POST = 1736,
+ AArch64_ST1Onev8b = 1737,
+ AArch64_ST1Onev8b_POST = 1738,
+ AArch64_ST1Onev8h = 1739,
+ AArch64_ST1Onev8h_POST = 1740,
+ AArch64_ST1Threev16b = 1741,
+ AArch64_ST1Threev16b_POST = 1742,
+ AArch64_ST1Threev1d = 1743,
+ AArch64_ST1Threev1d_POST = 1744,
+ AArch64_ST1Threev2d = 1745,
+ AArch64_ST1Threev2d_POST = 1746,
+ AArch64_ST1Threev2s = 1747,
+ AArch64_ST1Threev2s_POST = 1748,
+ AArch64_ST1Threev4h = 1749,
+ AArch64_ST1Threev4h_POST = 1750,
+ AArch64_ST1Threev4s = 1751,
+ AArch64_ST1Threev4s_POST = 1752,
+ AArch64_ST1Threev8b = 1753,
+ AArch64_ST1Threev8b_POST = 1754,
+ AArch64_ST1Threev8h = 1755,
+ AArch64_ST1Threev8h_POST = 1756,
+ AArch64_ST1Twov16b = 1757,
+ AArch64_ST1Twov16b_POST = 1758,
+ AArch64_ST1Twov1d = 1759,
+ AArch64_ST1Twov1d_POST = 1760,
+ AArch64_ST1Twov2d = 1761,
+ AArch64_ST1Twov2d_POST = 1762,
+ AArch64_ST1Twov2s = 1763,
+ AArch64_ST1Twov2s_POST = 1764,
+ AArch64_ST1Twov4h = 1765,
+ AArch64_ST1Twov4h_POST = 1766,
+ AArch64_ST1Twov4s = 1767,
+ AArch64_ST1Twov4s_POST = 1768,
+ AArch64_ST1Twov8b = 1769,
+ AArch64_ST1Twov8b_POST = 1770,
+ AArch64_ST1Twov8h = 1771,
+ AArch64_ST1Twov8h_POST = 1772,
+ AArch64_ST1i16 = 1773,
+ AArch64_ST1i16_POST = 1774,
+ AArch64_ST1i32 = 1775,
+ AArch64_ST1i32_POST = 1776,
+ AArch64_ST1i64 = 1777,
+ AArch64_ST1i64_POST = 1778,
+ AArch64_ST1i8 = 1779,
+ AArch64_ST1i8_POST = 1780,
+ AArch64_ST2Twov16b = 1781,
+ AArch64_ST2Twov16b_POST = 1782,
+ AArch64_ST2Twov2d = 1783,
+ AArch64_ST2Twov2d_POST = 1784,
+ AArch64_ST2Twov2s = 1785,
+ AArch64_ST2Twov2s_POST = 1786,
+ AArch64_ST2Twov4h = 1787,
+ AArch64_ST2Twov4h_POST = 1788,
+ AArch64_ST2Twov4s = 1789,
+ AArch64_ST2Twov4s_POST = 1790,
+ AArch64_ST2Twov8b = 1791,
+ AArch64_ST2Twov8b_POST = 1792,
+ AArch64_ST2Twov8h = 1793,
+ AArch64_ST2Twov8h_POST = 1794,
+ AArch64_ST2i16 = 1795,
+ AArch64_ST2i16_POST = 1796,
+ AArch64_ST2i32 = 1797,
+ AArch64_ST2i32_POST = 1798,
+ AArch64_ST2i64 = 1799,
+ AArch64_ST2i64_POST = 1800,
+ AArch64_ST2i8 = 1801,
+ AArch64_ST2i8_POST = 1802,
+ AArch64_ST3Threev16b = 1803,
+ AArch64_ST3Threev16b_POST = 1804,
+ AArch64_ST3Threev2d = 1805,
+ AArch64_ST3Threev2d_POST = 1806,
+ AArch64_ST3Threev2s = 1807,
+ AArch64_ST3Threev2s_POST = 1808,
+ AArch64_ST3Threev4h = 1809,
+ AArch64_ST3Threev4h_POST = 1810,
+ AArch64_ST3Threev4s = 1811,
+ AArch64_ST3Threev4s_POST = 1812,
+ AArch64_ST3Threev8b = 1813,
+ AArch64_ST3Threev8b_POST = 1814,
+ AArch64_ST3Threev8h = 1815,
+ AArch64_ST3Threev8h_POST = 1816,
+ AArch64_ST3i16 = 1817,
+ AArch64_ST3i16_POST = 1818,
+ AArch64_ST3i32 = 1819,
+ AArch64_ST3i32_POST = 1820,
+ AArch64_ST3i64 = 1821,
+ AArch64_ST3i64_POST = 1822,
+ AArch64_ST3i8 = 1823,
+ AArch64_ST3i8_POST = 1824,
+ AArch64_ST4Fourv16b = 1825,
+ AArch64_ST4Fourv16b_POST = 1826,
+ AArch64_ST4Fourv2d = 1827,
+ AArch64_ST4Fourv2d_POST = 1828,
+ AArch64_ST4Fourv2s = 1829,
+ AArch64_ST4Fourv2s_POST = 1830,
+ AArch64_ST4Fourv4h = 1831,
+ AArch64_ST4Fourv4h_POST = 1832,
+ AArch64_ST4Fourv4s = 1833,
+ AArch64_ST4Fourv4s_POST = 1834,
+ AArch64_ST4Fourv8b = 1835,
+ AArch64_ST4Fourv8b_POST = 1836,
+ AArch64_ST4Fourv8h = 1837,
+ AArch64_ST4Fourv8h_POST = 1838,
+ AArch64_ST4i16 = 1839,
+ AArch64_ST4i16_POST = 1840,
+ AArch64_ST4i32 = 1841,
+ AArch64_ST4i32_POST = 1842,
+ AArch64_ST4i64 = 1843,
+ AArch64_ST4i64_POST = 1844,
+ AArch64_ST4i8 = 1845,
+ AArch64_ST4i8_POST = 1846,
+ AArch64_STLRB = 1847,
+ AArch64_STLRH = 1848,
+ AArch64_STLRW = 1849,
+ AArch64_STLRX = 1850,
+ AArch64_STLXPW = 1851,
+ AArch64_STLXPX = 1852,
+ AArch64_STLXRB = 1853,
+ AArch64_STLXRH = 1854,
+ AArch64_STLXRW = 1855,
+ AArch64_STLXRX = 1856,
+ AArch64_STNPDi = 1857,
+ AArch64_STNPQi = 1858,
+ AArch64_STNPSi = 1859,
+ AArch64_STNPWi = 1860,
+ AArch64_STNPXi = 1861,
+ AArch64_STPDi = 1862,
+ AArch64_STPDpost = 1863,
+ AArch64_STPDpre = 1864,
+ AArch64_STPQi = 1865,
+ AArch64_STPQpost = 1866,
+ AArch64_STPQpre = 1867,
+ AArch64_STPSi = 1868,
+ AArch64_STPSpost = 1869,
+ AArch64_STPSpre = 1870,
+ AArch64_STPWi = 1871,
+ AArch64_STPWpost = 1872,
+ AArch64_STPWpre = 1873,
+ AArch64_STPXi = 1874,
+ AArch64_STPXpost = 1875,
+ AArch64_STPXpre = 1876,
+ AArch64_STRBBpost = 1877,
+ AArch64_STRBBpre = 1878,
+ AArch64_STRBBroW = 1879,
+ AArch64_STRBBroX = 1880,
+ AArch64_STRBBui = 1881,
+ AArch64_STRBpost = 1882,
+ AArch64_STRBpre = 1883,
+ AArch64_STRBroW = 1884,
+ AArch64_STRBroX = 1885,
+ AArch64_STRBui = 1886,
+ AArch64_STRDpost = 1887,
+ AArch64_STRDpre = 1888,
+ AArch64_STRDroW = 1889,
+ AArch64_STRDroX = 1890,
+ AArch64_STRDui = 1891,
+ AArch64_STRHHpost = 1892,
+ AArch64_STRHHpre = 1893,
+ AArch64_STRHHroW = 1894,
+ AArch64_STRHHroX = 1895,
+ AArch64_STRHHui = 1896,
+ AArch64_STRHpost = 1897,
+ AArch64_STRHpre = 1898,
+ AArch64_STRHroW = 1899,
+ AArch64_STRHroX = 1900,
+ AArch64_STRHui = 1901,
+ AArch64_STRQpost = 1902,
+ AArch64_STRQpre = 1903,
+ AArch64_STRQroW = 1904,
+ AArch64_STRQroX = 1905,
+ AArch64_STRQui = 1906,
+ AArch64_STRSpost = 1907,
+ AArch64_STRSpre = 1908,
+ AArch64_STRSroW = 1909,
+ AArch64_STRSroX = 1910,
+ AArch64_STRSui = 1911,
+ AArch64_STRWpost = 1912,
+ AArch64_STRWpre = 1913,
+ AArch64_STRWroW = 1914,
+ AArch64_STRWroX = 1915,
+ AArch64_STRWui = 1916,
+ AArch64_STRXpost = 1917,
+ AArch64_STRXpre = 1918,
+ AArch64_STRXroW = 1919,
+ AArch64_STRXroX = 1920,
+ AArch64_STRXui = 1921,
+ AArch64_STTRBi = 1922,
+ AArch64_STTRHi = 1923,
+ AArch64_STTRWi = 1924,
+ AArch64_STTRXi = 1925,
+ AArch64_STURBBi = 1926,
+ AArch64_STURBi = 1927,
+ AArch64_STURDi = 1928,
+ AArch64_STURHHi = 1929,
+ AArch64_STURHi = 1930,
+ AArch64_STURQi = 1931,
+ AArch64_STURSi = 1932,
+ AArch64_STURWi = 1933,
+ AArch64_STURXi = 1934,
+ AArch64_STXPW = 1935,
+ AArch64_STXPX = 1936,
+ AArch64_STXRB = 1937,
+ AArch64_STXRH = 1938,
+ AArch64_STXRW = 1939,
+ AArch64_STXRX = 1940,
+ AArch64_SUBHNv2i64_v2i32 = 1941,
+ AArch64_SUBHNv2i64_v4i32 = 1942,
+ AArch64_SUBHNv4i32_v4i16 = 1943,
+ AArch64_SUBHNv4i32_v8i16 = 1944,
+ AArch64_SUBHNv8i16_v16i8 = 1945,
+ AArch64_SUBHNv8i16_v8i8 = 1946,
+ AArch64_SUBSWri = 1947,
+ AArch64_SUBSWrr = 1948,
+ AArch64_SUBSWrs = 1949,
+ AArch64_SUBSWrx = 1950,
+ AArch64_SUBSXri = 1951,
+ AArch64_SUBSXrr = 1952,
+ AArch64_SUBSXrs = 1953,
+ AArch64_SUBSXrx = 1954,
+ AArch64_SUBSXrx64 = 1955,
+ AArch64_SUBWri = 1956,
+ AArch64_SUBWrr = 1957,
+ AArch64_SUBWrs = 1958,
+ AArch64_SUBWrx = 1959,
+ AArch64_SUBXri = 1960,
+ AArch64_SUBXrr = 1961,
+ AArch64_SUBXrs = 1962,
+ AArch64_SUBXrx = 1963,
+ AArch64_SUBXrx64 = 1964,
+ AArch64_SUBv16i8 = 1965,
+ AArch64_SUBv1i64 = 1966,
+ AArch64_SUBv2i32 = 1967,
+ AArch64_SUBv2i64 = 1968,
+ AArch64_SUBv4i16 = 1969,
+ AArch64_SUBv4i32 = 1970,
+ AArch64_SUBv8i16 = 1971,
+ AArch64_SUBv8i8 = 1972,
+ AArch64_SUQADDv16i8 = 1973,
+ AArch64_SUQADDv1i16 = 1974,
+ AArch64_SUQADDv1i32 = 1975,
+ AArch64_SUQADDv1i64 = 1976,
+ AArch64_SUQADDv1i8 = 1977,
+ AArch64_SUQADDv2i32 = 1978,
+ AArch64_SUQADDv2i64 = 1979,
+ AArch64_SUQADDv4i16 = 1980,
+ AArch64_SUQADDv4i32 = 1981,
+ AArch64_SUQADDv8i16 = 1982,
+ AArch64_SUQADDv8i8 = 1983,
+ AArch64_SVC = 1984,
+ AArch64_SYSLxt = 1985,
+ AArch64_SYSxt = 1986,
+ AArch64_TBLv16i8Four = 1987,
+ AArch64_TBLv16i8One = 1988,
+ AArch64_TBLv16i8Three = 1989,
+ AArch64_TBLv16i8Two = 1990,
+ AArch64_TBLv8i8Four = 1991,
+ AArch64_TBLv8i8One = 1992,
+ AArch64_TBLv8i8Three = 1993,
+ AArch64_TBLv8i8Two = 1994,
+ AArch64_TBNZW = 1995,
+ AArch64_TBNZX = 1996,
+ AArch64_TBXv16i8Four = 1997,
+ AArch64_TBXv16i8One = 1998,
+ AArch64_TBXv16i8Three = 1999,
+ AArch64_TBXv16i8Two = 2000,
+ AArch64_TBXv8i8Four = 2001,
+ AArch64_TBXv8i8One = 2002,
+ AArch64_TBXv8i8Three = 2003,
+ AArch64_TBXv8i8Two = 2004,
+ AArch64_TBZW = 2005,
+ AArch64_TBZX = 2006,
+ AArch64_TCRETURNdi = 2007,
+ AArch64_TCRETURNri = 2008,
+ AArch64_TLSDESCCALL = 2009,
+ AArch64_TLSDESC_BLR = 2010,
+ AArch64_TRN1v16i8 = 2011,
+ AArch64_TRN1v2i32 = 2012,
+ AArch64_TRN1v2i64 = 2013,
+ AArch64_TRN1v4i16 = 2014,
+ AArch64_TRN1v4i32 = 2015,
+ AArch64_TRN1v8i16 = 2016,
+ AArch64_TRN1v8i8 = 2017,
+ AArch64_TRN2v16i8 = 2018,
+ AArch64_TRN2v2i32 = 2019,
+ AArch64_TRN2v2i64 = 2020,
+ AArch64_TRN2v4i16 = 2021,
+ AArch64_TRN2v4i32 = 2022,
+ AArch64_TRN2v8i16 = 2023,
+ AArch64_TRN2v8i8 = 2024,
+ AArch64_UABALv16i8_v8i16 = 2025,
+ AArch64_UABALv2i32_v2i64 = 2026,
+ AArch64_UABALv4i16_v4i32 = 2027,
+ AArch64_UABALv4i32_v2i64 = 2028,
+ AArch64_UABALv8i16_v4i32 = 2029,
+ AArch64_UABALv8i8_v8i16 = 2030,
+ AArch64_UABAv16i8 = 2031,
+ AArch64_UABAv2i32 = 2032,
+ AArch64_UABAv4i16 = 2033,
+ AArch64_UABAv4i32 = 2034,
+ AArch64_UABAv8i16 = 2035,
+ AArch64_UABAv8i8 = 2036,
+ AArch64_UABDLv16i8_v8i16 = 2037,
+ AArch64_UABDLv2i32_v2i64 = 2038,
+ AArch64_UABDLv4i16_v4i32 = 2039,
+ AArch64_UABDLv4i32_v2i64 = 2040,
+ AArch64_UABDLv8i16_v4i32 = 2041,
+ AArch64_UABDLv8i8_v8i16 = 2042,
+ AArch64_UABDv16i8 = 2043,
+ AArch64_UABDv2i32 = 2044,
+ AArch64_UABDv4i16 = 2045,
+ AArch64_UABDv4i32 = 2046,
+ AArch64_UABDv8i16 = 2047,
+ AArch64_UABDv8i8 = 2048,
+ AArch64_UADALPv16i8_v8i16 = 2049,
+ AArch64_UADALPv2i32_v1i64 = 2050,
+ AArch64_UADALPv4i16_v2i32 = 2051,
+ AArch64_UADALPv4i32_v2i64 = 2052,
+ AArch64_UADALPv8i16_v4i32 = 2053,
+ AArch64_UADALPv8i8_v4i16 = 2054,
+ AArch64_UADDLPv16i8_v8i16 = 2055,
+ AArch64_UADDLPv2i32_v1i64 = 2056,
+ AArch64_UADDLPv4i16_v2i32 = 2057,
+ AArch64_UADDLPv4i32_v2i64 = 2058,
+ AArch64_UADDLPv8i16_v4i32 = 2059,
+ AArch64_UADDLPv8i8_v4i16 = 2060,
+ AArch64_UADDLVv16i8v = 2061,
+ AArch64_UADDLVv4i16v = 2062,
+ AArch64_UADDLVv4i32v = 2063,
+ AArch64_UADDLVv8i16v = 2064,
+ AArch64_UADDLVv8i8v = 2065,
+ AArch64_UADDLv16i8_v8i16 = 2066,
+ AArch64_UADDLv2i32_v2i64 = 2067,
+ AArch64_UADDLv4i16_v4i32 = 2068,
+ AArch64_UADDLv4i32_v2i64 = 2069,
+ AArch64_UADDLv8i16_v4i32 = 2070,
+ AArch64_UADDLv8i8_v8i16 = 2071,
+ AArch64_UADDWv16i8_v8i16 = 2072,
+ AArch64_UADDWv2i32_v2i64 = 2073,
+ AArch64_UADDWv4i16_v4i32 = 2074,
+ AArch64_UADDWv4i32_v2i64 = 2075,
+ AArch64_UADDWv8i16_v4i32 = 2076,
+ AArch64_UADDWv8i8_v8i16 = 2077,
+ AArch64_UBFMWri = 2078,
+ AArch64_UBFMXri = 2079,
+ AArch64_UCVTFSWDri = 2080,
+ AArch64_UCVTFSWSri = 2081,
+ AArch64_UCVTFSXDri = 2082,
+ AArch64_UCVTFSXSri = 2083,
+ AArch64_UCVTFUWDri = 2084,
+ AArch64_UCVTFUWSri = 2085,
+ AArch64_UCVTFUXDri = 2086,
+ AArch64_UCVTFUXSri = 2087,
+ AArch64_UCVTFd = 2088,
+ AArch64_UCVTFs = 2089,
+ AArch64_UCVTFv1i32 = 2090,
+ AArch64_UCVTFv1i64 = 2091,
+ AArch64_UCVTFv2f32 = 2092,
+ AArch64_UCVTFv2f64 = 2093,
+ AArch64_UCVTFv2i32_shift = 2094,
+ AArch64_UCVTFv2i64_shift = 2095,
+ AArch64_UCVTFv4f32 = 2096,
+ AArch64_UCVTFv4i32_shift = 2097,
+ AArch64_UDIVWr = 2098,
+ AArch64_UDIVXr = 2099,
+ AArch64_UDIV_IntWr = 2100,
+ AArch64_UDIV_IntXr = 2101,
+ AArch64_UHADDv16i8 = 2102,
+ AArch64_UHADDv2i32 = 2103,
+ AArch64_UHADDv4i16 = 2104,
+ AArch64_UHADDv4i32 = 2105,
+ AArch64_UHADDv8i16 = 2106,
+ AArch64_UHADDv8i8 = 2107,
+ AArch64_UHSUBv16i8 = 2108,
+ AArch64_UHSUBv2i32 = 2109,
+ AArch64_UHSUBv4i16 = 2110,
+ AArch64_UHSUBv4i32 = 2111,
+ AArch64_UHSUBv8i16 = 2112,
+ AArch64_UHSUBv8i8 = 2113,
+ AArch64_UMADDLrrr = 2114,
+ AArch64_UMAXPv16i8 = 2115,
+ AArch64_UMAXPv2i32 = 2116,
+ AArch64_UMAXPv4i16 = 2117,
+ AArch64_UMAXPv4i32 = 2118,
+ AArch64_UMAXPv8i16 = 2119,
+ AArch64_UMAXPv8i8 = 2120,
+ AArch64_UMAXVv16i8v = 2121,
+ AArch64_UMAXVv4i16v = 2122,
+ AArch64_UMAXVv4i32v = 2123,
+ AArch64_UMAXVv8i16v = 2124,
+ AArch64_UMAXVv8i8v = 2125,
+ AArch64_UMAXv16i8 = 2126,
+ AArch64_UMAXv2i32 = 2127,
+ AArch64_UMAXv4i16 = 2128,
+ AArch64_UMAXv4i32 = 2129,
+ AArch64_UMAXv8i16 = 2130,
+ AArch64_UMAXv8i8 = 2131,
+ AArch64_UMINPv16i8 = 2132,
+ AArch64_UMINPv2i32 = 2133,
+ AArch64_UMINPv4i16 = 2134,
+ AArch64_UMINPv4i32 = 2135,
+ AArch64_UMINPv8i16 = 2136,
+ AArch64_UMINPv8i8 = 2137,
+ AArch64_UMINVv16i8v = 2138,
+ AArch64_UMINVv4i16v = 2139,
+ AArch64_UMINVv4i32v = 2140,
+ AArch64_UMINVv8i16v = 2141,
+ AArch64_UMINVv8i8v = 2142,
+ AArch64_UMINv16i8 = 2143,
+ AArch64_UMINv2i32 = 2144,
+ AArch64_UMINv4i16 = 2145,
+ AArch64_UMINv4i32 = 2146,
+ AArch64_UMINv8i16 = 2147,
+ AArch64_UMINv8i8 = 2148,
+ AArch64_UMLALv16i8_v8i16 = 2149,
+ AArch64_UMLALv2i32_indexed = 2150,
+ AArch64_UMLALv2i32_v2i64 = 2151,
+ AArch64_UMLALv4i16_indexed = 2152,
+ AArch64_UMLALv4i16_v4i32 = 2153,
+ AArch64_UMLALv4i32_indexed = 2154,
+ AArch64_UMLALv4i32_v2i64 = 2155,
+ AArch64_UMLALv8i16_indexed = 2156,
+ AArch64_UMLALv8i16_v4i32 = 2157,
+ AArch64_UMLALv8i8_v8i16 = 2158,
+ AArch64_UMLSLv16i8_v8i16 = 2159,
+ AArch64_UMLSLv2i32_indexed = 2160,
+ AArch64_UMLSLv2i32_v2i64 = 2161,
+ AArch64_UMLSLv4i16_indexed = 2162,
+ AArch64_UMLSLv4i16_v4i32 = 2163,
+ AArch64_UMLSLv4i32_indexed = 2164,
+ AArch64_UMLSLv4i32_v2i64 = 2165,
+ AArch64_UMLSLv8i16_indexed = 2166,
+ AArch64_UMLSLv8i16_v4i32 = 2167,
+ AArch64_UMLSLv8i8_v8i16 = 2168,
+ AArch64_UMOVvi16 = 2169,
+ AArch64_UMOVvi32 = 2170,
+ AArch64_UMOVvi64 = 2171,
+ AArch64_UMOVvi8 = 2172,
+ AArch64_UMSUBLrrr = 2173,
+ AArch64_UMULHrr = 2174,
+ AArch64_UMULLv16i8_v8i16 = 2175,
+ AArch64_UMULLv2i32_indexed = 2176,
+ AArch64_UMULLv2i32_v2i64 = 2177,
+ AArch64_UMULLv4i16_indexed = 2178,
+ AArch64_UMULLv4i16_v4i32 = 2179,
+ AArch64_UMULLv4i32_indexed = 2180,
+ AArch64_UMULLv4i32_v2i64 = 2181,
+ AArch64_UMULLv8i16_indexed = 2182,
+ AArch64_UMULLv8i16_v4i32 = 2183,
+ AArch64_UMULLv8i8_v8i16 = 2184,
+ AArch64_UQADDv16i8 = 2185,
+ AArch64_UQADDv1i16 = 2186,
+ AArch64_UQADDv1i32 = 2187,
+ AArch64_UQADDv1i64 = 2188,
+ AArch64_UQADDv1i8 = 2189,
+ AArch64_UQADDv2i32 = 2190,
+ AArch64_UQADDv2i64 = 2191,
+ AArch64_UQADDv4i16 = 2192,
+ AArch64_UQADDv4i32 = 2193,
+ AArch64_UQADDv8i16 = 2194,
+ AArch64_UQADDv8i8 = 2195,
+ AArch64_UQRSHLv16i8 = 2196,
+ AArch64_UQRSHLv1i16 = 2197,
+ AArch64_UQRSHLv1i32 = 2198,
+ AArch64_UQRSHLv1i64 = 2199,
+ AArch64_UQRSHLv1i8 = 2200,
+ AArch64_UQRSHLv2i32 = 2201,
+ AArch64_UQRSHLv2i64 = 2202,
+ AArch64_UQRSHLv4i16 = 2203,
+ AArch64_UQRSHLv4i32 = 2204,
+ AArch64_UQRSHLv8i16 = 2205,
+ AArch64_UQRSHLv8i8 = 2206,
+ AArch64_UQRSHRNb = 2207,
+ AArch64_UQRSHRNh = 2208,
+ AArch64_UQRSHRNs = 2209,
+ AArch64_UQRSHRNv16i8_shift = 2210,
+ AArch64_UQRSHRNv2i32_shift = 2211,
+ AArch64_UQRSHRNv4i16_shift = 2212,
+ AArch64_UQRSHRNv4i32_shift = 2213,
+ AArch64_UQRSHRNv8i16_shift = 2214,
+ AArch64_UQRSHRNv8i8_shift = 2215,
+ AArch64_UQSHLb = 2216,
+ AArch64_UQSHLd = 2217,
+ AArch64_UQSHLh = 2218,
+ AArch64_UQSHLs = 2219,
+ AArch64_UQSHLv16i8 = 2220,
+ AArch64_UQSHLv16i8_shift = 2221,
+ AArch64_UQSHLv1i16 = 2222,
+ AArch64_UQSHLv1i32 = 2223,
+ AArch64_UQSHLv1i64 = 2224,
+ AArch64_UQSHLv1i8 = 2225,
+ AArch64_UQSHLv2i32 = 2226,
+ AArch64_UQSHLv2i32_shift = 2227,
+ AArch64_UQSHLv2i64 = 2228,
+ AArch64_UQSHLv2i64_shift = 2229,
+ AArch64_UQSHLv4i16 = 2230,
+ AArch64_UQSHLv4i16_shift = 2231,
+ AArch64_UQSHLv4i32 = 2232,
+ AArch64_UQSHLv4i32_shift = 2233,
+ AArch64_UQSHLv8i16 = 2234,
+ AArch64_UQSHLv8i16_shift = 2235,
+ AArch64_UQSHLv8i8 = 2236,
+ AArch64_UQSHLv8i8_shift = 2237,
+ AArch64_UQSHRNb = 2238,
+ AArch64_UQSHRNh = 2239,
+ AArch64_UQSHRNs = 2240,
+ AArch64_UQSHRNv16i8_shift = 2241,
+ AArch64_UQSHRNv2i32_shift = 2242,
+ AArch64_UQSHRNv4i16_shift = 2243,
+ AArch64_UQSHRNv4i32_shift = 2244,
+ AArch64_UQSHRNv8i16_shift = 2245,
+ AArch64_UQSHRNv8i8_shift = 2246,
+ AArch64_UQSUBv16i8 = 2247,
+ AArch64_UQSUBv1i16 = 2248,
+ AArch64_UQSUBv1i32 = 2249,
+ AArch64_UQSUBv1i64 = 2250,
+ AArch64_UQSUBv1i8 = 2251,
+ AArch64_UQSUBv2i32 = 2252,
+ AArch64_UQSUBv2i64 = 2253,
+ AArch64_UQSUBv4i16 = 2254,
+ AArch64_UQSUBv4i32 = 2255,
+ AArch64_UQSUBv8i16 = 2256,
+ AArch64_UQSUBv8i8 = 2257,
+ AArch64_UQXTNv16i8 = 2258,
+ AArch64_UQXTNv1i16 = 2259,
+ AArch64_UQXTNv1i32 = 2260,
+ AArch64_UQXTNv1i8 = 2261,
+ AArch64_UQXTNv2i32 = 2262,
+ AArch64_UQXTNv4i16 = 2263,
+ AArch64_UQXTNv4i32 = 2264,
+ AArch64_UQXTNv8i16 = 2265,
+ AArch64_UQXTNv8i8 = 2266,
+ AArch64_URECPEv2i32 = 2267,
+ AArch64_URECPEv4i32 = 2268,
+ AArch64_URHADDv16i8 = 2269,
+ AArch64_URHADDv2i32 = 2270,
+ AArch64_URHADDv4i16 = 2271,
+ AArch64_URHADDv4i32 = 2272,
+ AArch64_URHADDv8i16 = 2273,
+ AArch64_URHADDv8i8 = 2274,
+ AArch64_URSHLv16i8 = 2275,
+ AArch64_URSHLv1i64 = 2276,
+ AArch64_URSHLv2i32 = 2277,
+ AArch64_URSHLv2i64 = 2278,
+ AArch64_URSHLv4i16 = 2279,
+ AArch64_URSHLv4i32 = 2280,
+ AArch64_URSHLv8i16 = 2281,
+ AArch64_URSHLv8i8 = 2282,
+ AArch64_URSHRd = 2283,
+ AArch64_URSHRv16i8_shift = 2284,
+ AArch64_URSHRv2i32_shift = 2285,
+ AArch64_URSHRv2i64_shift = 2286,
+ AArch64_URSHRv4i16_shift = 2287,
+ AArch64_URSHRv4i32_shift = 2288,
+ AArch64_URSHRv8i16_shift = 2289,
+ AArch64_URSHRv8i8_shift = 2290,
+ AArch64_URSQRTEv2i32 = 2291,
+ AArch64_URSQRTEv4i32 = 2292,
+ AArch64_URSRAd = 2293,
+ AArch64_URSRAv16i8_shift = 2294,
+ AArch64_URSRAv2i32_shift = 2295,
+ AArch64_URSRAv2i64_shift = 2296,
+ AArch64_URSRAv4i16_shift = 2297,
+ AArch64_URSRAv4i32_shift = 2298,
+ AArch64_URSRAv8i16_shift = 2299,
+ AArch64_URSRAv8i8_shift = 2300,
+ AArch64_USHLLv16i8_shift = 2301,
+ AArch64_USHLLv2i32_shift = 2302,
+ AArch64_USHLLv4i16_shift = 2303,
+ AArch64_USHLLv4i32_shift = 2304,
+ AArch64_USHLLv8i16_shift = 2305,
+ AArch64_USHLLv8i8_shift = 2306,
+ AArch64_USHLv16i8 = 2307,
+ AArch64_USHLv1i64 = 2308,
+ AArch64_USHLv2i32 = 2309,
+ AArch64_USHLv2i64 = 2310,
+ AArch64_USHLv4i16 = 2311,
+ AArch64_USHLv4i32 = 2312,
+ AArch64_USHLv8i16 = 2313,
+ AArch64_USHLv8i8 = 2314,
+ AArch64_USHRd = 2315,
+ AArch64_USHRv16i8_shift = 2316,
+ AArch64_USHRv2i32_shift = 2317,
+ AArch64_USHRv2i64_shift = 2318,
+ AArch64_USHRv4i16_shift = 2319,
+ AArch64_USHRv4i32_shift = 2320,
+ AArch64_USHRv8i16_shift = 2321,
+ AArch64_USHRv8i8_shift = 2322,
+ AArch64_USQADDv16i8 = 2323,
+ AArch64_USQADDv1i16 = 2324,
+ AArch64_USQADDv1i32 = 2325,
+ AArch64_USQADDv1i64 = 2326,
+ AArch64_USQADDv1i8 = 2327,
+ AArch64_USQADDv2i32 = 2328,
+ AArch64_USQADDv2i64 = 2329,
+ AArch64_USQADDv4i16 = 2330,
+ AArch64_USQADDv4i32 = 2331,
+ AArch64_USQADDv8i16 = 2332,
+ AArch64_USQADDv8i8 = 2333,
+ AArch64_USRAd = 2334,
+ AArch64_USRAv16i8_shift = 2335,
+ AArch64_USRAv2i32_shift = 2336,
+ AArch64_USRAv2i64_shift = 2337,
+ AArch64_USRAv4i16_shift = 2338,
+ AArch64_USRAv4i32_shift = 2339,
+ AArch64_USRAv8i16_shift = 2340,
+ AArch64_USRAv8i8_shift = 2341,
+ AArch64_USUBLv16i8_v8i16 = 2342,
+ AArch64_USUBLv2i32_v2i64 = 2343,
+ AArch64_USUBLv4i16_v4i32 = 2344,
+ AArch64_USUBLv4i32_v2i64 = 2345,
+ AArch64_USUBLv8i16_v4i32 = 2346,
+ AArch64_USUBLv8i8_v8i16 = 2347,
+ AArch64_USUBWv16i8_v8i16 = 2348,
+ AArch64_USUBWv2i32_v2i64 = 2349,
+ AArch64_USUBWv4i16_v4i32 = 2350,
+ AArch64_USUBWv4i32_v2i64 = 2351,
+ AArch64_USUBWv8i16_v4i32 = 2352,
+ AArch64_USUBWv8i8_v8i16 = 2353,
+ AArch64_UZP1v16i8 = 2354,
+ AArch64_UZP1v2i32 = 2355,
+ AArch64_UZP1v2i64 = 2356,
+ AArch64_UZP1v4i16 = 2357,
+ AArch64_UZP1v4i32 = 2358,
+ AArch64_UZP1v8i16 = 2359,
+ AArch64_UZP1v8i8 = 2360,
+ AArch64_UZP2v16i8 = 2361,
+ AArch64_UZP2v2i32 = 2362,
+ AArch64_UZP2v2i64 = 2363,
+ AArch64_UZP2v4i16 = 2364,
+ AArch64_UZP2v4i32 = 2365,
+ AArch64_UZP2v8i16 = 2366,
+ AArch64_UZP2v8i8 = 2367,
+ AArch64_XTNv16i8 = 2368,
+ AArch64_XTNv2i32 = 2369,
+ AArch64_XTNv4i16 = 2370,
+ AArch64_XTNv4i32 = 2371,
+ AArch64_XTNv8i16 = 2372,
+ AArch64_XTNv8i8 = 2373,
+ AArch64_ZIP1v16i8 = 2374,
+ AArch64_ZIP1v2i32 = 2375,
+ AArch64_ZIP1v2i64 = 2376,
+ AArch64_ZIP1v4i16 = 2377,
+ AArch64_ZIP1v4i32 = 2378,
+ AArch64_ZIP1v8i16 = 2379,
+ AArch64_ZIP1v8i8 = 2380,
+ AArch64_ZIP2v16i8 = 2381,
+ AArch64_ZIP2v2i32 = 2382,
+ AArch64_ZIP2v2i64 = 2383,
+ AArch64_ZIP2v4i16 = 2384,
+ AArch64_ZIP2v4i32 = 2385,
+ AArch64_ZIP2v8i16 = 2386,
+ AArch64_ZIP2v8i8 = 2387,
+ AArch64_INSTRUCTION_LIST_END = 2388
};
#endif // GET_INSTRINFO_ENUM
diff --git a/arch/AArch64/AArch64GenRegisterInfo.inc b/arch/AArch64/AArch64GenRegisterInfo.inc
index 7f5f43f..a1e29e7 100644
--- a/arch/AArch64/AArch64GenRegisterInfo.inc
+++ b/arch/AArch64/AArch64GenRegisterInfo.inc
@@ -15,233 +15,233 @@
enum {
AArch64_NoRegister,
- AArch64_NZCV = 1,
- AArch64_WSP = 2,
- AArch64_WZR = 3,
- AArch64_XSP = 4,
- AArch64_XZR = 5,
- AArch64_B0 = 6,
- AArch64_B1 = 7,
- AArch64_B2 = 8,
- AArch64_B3 = 9,
- AArch64_B4 = 10,
- AArch64_B5 = 11,
- AArch64_B6 = 12,
- AArch64_B7 = 13,
- AArch64_B8 = 14,
- AArch64_B9 = 15,
- AArch64_B10 = 16,
- AArch64_B11 = 17,
- AArch64_B12 = 18,
- AArch64_B13 = 19,
- AArch64_B14 = 20,
- AArch64_B15 = 21,
- AArch64_B16 = 22,
- AArch64_B17 = 23,
- AArch64_B18 = 24,
- AArch64_B19 = 25,
- AArch64_B20 = 26,
- AArch64_B21 = 27,
- AArch64_B22 = 28,
- AArch64_B23 = 29,
- AArch64_B24 = 30,
- AArch64_B25 = 31,
- AArch64_B26 = 32,
- AArch64_B27 = 33,
- AArch64_B28 = 34,
- AArch64_B29 = 35,
- AArch64_B30 = 36,
- AArch64_B31 = 37,
- AArch64_D0 = 38,
- AArch64_D1 = 39,
- AArch64_D2 = 40,
- AArch64_D3 = 41,
- AArch64_D4 = 42,
- AArch64_D5 = 43,
- AArch64_D6 = 44,
- AArch64_D7 = 45,
- AArch64_D8 = 46,
- AArch64_D9 = 47,
- AArch64_D10 = 48,
- AArch64_D11 = 49,
- AArch64_D12 = 50,
- AArch64_D13 = 51,
- AArch64_D14 = 52,
- AArch64_D15 = 53,
- AArch64_D16 = 54,
- AArch64_D17 = 55,
- AArch64_D18 = 56,
- AArch64_D19 = 57,
- AArch64_D20 = 58,
- AArch64_D21 = 59,
- AArch64_D22 = 60,
- AArch64_D23 = 61,
- AArch64_D24 = 62,
- AArch64_D25 = 63,
- AArch64_D26 = 64,
- AArch64_D27 = 65,
- AArch64_D28 = 66,
- AArch64_D29 = 67,
- AArch64_D30 = 68,
- AArch64_D31 = 69,
- AArch64_H0 = 70,
- AArch64_H1 = 71,
- AArch64_H2 = 72,
- AArch64_H3 = 73,
- AArch64_H4 = 74,
- AArch64_H5 = 75,
- AArch64_H6 = 76,
- AArch64_H7 = 77,
- AArch64_H8 = 78,
- AArch64_H9 = 79,
- AArch64_H10 = 80,
- AArch64_H11 = 81,
- AArch64_H12 = 82,
- AArch64_H13 = 83,
- AArch64_H14 = 84,
- AArch64_H15 = 85,
- AArch64_H16 = 86,
- AArch64_H17 = 87,
- AArch64_H18 = 88,
- AArch64_H19 = 89,
- AArch64_H20 = 90,
- AArch64_H21 = 91,
- AArch64_H22 = 92,
- AArch64_H23 = 93,
- AArch64_H24 = 94,
- AArch64_H25 = 95,
- AArch64_H26 = 96,
- AArch64_H27 = 97,
- AArch64_H28 = 98,
- AArch64_H29 = 99,
- AArch64_H30 = 100,
- AArch64_H31 = 101,
- AArch64_Q0 = 102,
- AArch64_Q1 = 103,
- AArch64_Q2 = 104,
- AArch64_Q3 = 105,
- AArch64_Q4 = 106,
- AArch64_Q5 = 107,
- AArch64_Q6 = 108,
- AArch64_Q7 = 109,
- AArch64_Q8 = 110,
- AArch64_Q9 = 111,
- AArch64_Q10 = 112,
- AArch64_Q11 = 113,
- AArch64_Q12 = 114,
- AArch64_Q13 = 115,
- AArch64_Q14 = 116,
- AArch64_Q15 = 117,
- AArch64_Q16 = 118,
- AArch64_Q17 = 119,
- AArch64_Q18 = 120,
- AArch64_Q19 = 121,
- AArch64_Q20 = 122,
- AArch64_Q21 = 123,
- AArch64_Q22 = 124,
- AArch64_Q23 = 125,
- AArch64_Q24 = 126,
- AArch64_Q25 = 127,
- AArch64_Q26 = 128,
- AArch64_Q27 = 129,
- AArch64_Q28 = 130,
- AArch64_Q29 = 131,
- AArch64_Q30 = 132,
- AArch64_Q31 = 133,
- AArch64_S0 = 134,
- AArch64_S1 = 135,
- AArch64_S2 = 136,
- AArch64_S3 = 137,
- AArch64_S4 = 138,
- AArch64_S5 = 139,
- AArch64_S6 = 140,
- AArch64_S7 = 141,
- AArch64_S8 = 142,
- AArch64_S9 = 143,
- AArch64_S10 = 144,
- AArch64_S11 = 145,
- AArch64_S12 = 146,
- AArch64_S13 = 147,
- AArch64_S14 = 148,
- AArch64_S15 = 149,
- AArch64_S16 = 150,
- AArch64_S17 = 151,
- AArch64_S18 = 152,
- AArch64_S19 = 153,
- AArch64_S20 = 154,
- AArch64_S21 = 155,
- AArch64_S22 = 156,
- AArch64_S23 = 157,
- AArch64_S24 = 158,
- AArch64_S25 = 159,
- AArch64_S26 = 160,
- AArch64_S27 = 161,
- AArch64_S28 = 162,
- AArch64_S29 = 163,
- AArch64_S30 = 164,
- AArch64_S31 = 165,
- AArch64_W0 = 166,
- AArch64_W1 = 167,
- AArch64_W2 = 168,
- AArch64_W3 = 169,
- AArch64_W4 = 170,
- AArch64_W5 = 171,
- AArch64_W6 = 172,
- AArch64_W7 = 173,
- AArch64_W8 = 174,
- AArch64_W9 = 175,
- AArch64_W10 = 176,
- AArch64_W11 = 177,
- AArch64_W12 = 178,
- AArch64_W13 = 179,
- AArch64_W14 = 180,
- AArch64_W15 = 181,
- AArch64_W16 = 182,
- AArch64_W17 = 183,
- AArch64_W18 = 184,
- AArch64_W19 = 185,
- AArch64_W20 = 186,
- AArch64_W21 = 187,
- AArch64_W22 = 188,
- AArch64_W23 = 189,
- AArch64_W24 = 190,
- AArch64_W25 = 191,
- AArch64_W26 = 192,
- AArch64_W27 = 193,
- AArch64_W28 = 194,
- AArch64_W29 = 195,
- AArch64_W30 = 196,
- AArch64_X0 = 197,
- AArch64_X1 = 198,
- AArch64_X2 = 199,
- AArch64_X3 = 200,
- AArch64_X4 = 201,
- AArch64_X5 = 202,
- AArch64_X6 = 203,
- AArch64_X7 = 204,
- AArch64_X8 = 205,
- AArch64_X9 = 206,
- AArch64_X10 = 207,
- AArch64_X11 = 208,
- AArch64_X12 = 209,
- AArch64_X13 = 210,
- AArch64_X14 = 211,
- AArch64_X15 = 212,
- AArch64_X16 = 213,
- AArch64_X17 = 214,
- AArch64_X18 = 215,
- AArch64_X19 = 216,
- AArch64_X20 = 217,
- AArch64_X21 = 218,
- AArch64_X22 = 219,
- AArch64_X23 = 220,
- AArch64_X24 = 221,
- AArch64_X25 = 222,
- AArch64_X26 = 223,
- AArch64_X27 = 224,
- AArch64_X28 = 225,
- AArch64_X29 = 226,
- AArch64_X30 = 227,
+ AArch64_FP = 1,
+ AArch64_LR = 2,
+ AArch64_NZCV = 3,
+ AArch64_SP = 4,
+ AArch64_WSP = 5,
+ AArch64_WZR = 6,
+ AArch64_XZR = 7,
+ AArch64_B0 = 8,
+ AArch64_B1 = 9,
+ AArch64_B2 = 10,
+ AArch64_B3 = 11,
+ AArch64_B4 = 12,
+ AArch64_B5 = 13,
+ AArch64_B6 = 14,
+ AArch64_B7 = 15,
+ AArch64_B8 = 16,
+ AArch64_B9 = 17,
+ AArch64_B10 = 18,
+ AArch64_B11 = 19,
+ AArch64_B12 = 20,
+ AArch64_B13 = 21,
+ AArch64_B14 = 22,
+ AArch64_B15 = 23,
+ AArch64_B16 = 24,
+ AArch64_B17 = 25,
+ AArch64_B18 = 26,
+ AArch64_B19 = 27,
+ AArch64_B20 = 28,
+ AArch64_B21 = 29,
+ AArch64_B22 = 30,
+ AArch64_B23 = 31,
+ AArch64_B24 = 32,
+ AArch64_B25 = 33,
+ AArch64_B26 = 34,
+ AArch64_B27 = 35,
+ AArch64_B28 = 36,
+ AArch64_B29 = 37,
+ AArch64_B30 = 38,
+ AArch64_B31 = 39,
+ AArch64_D0 = 40,
+ AArch64_D1 = 41,
+ AArch64_D2 = 42,
+ AArch64_D3 = 43,
+ AArch64_D4 = 44,
+ AArch64_D5 = 45,
+ AArch64_D6 = 46,
+ AArch64_D7 = 47,
+ AArch64_D8 = 48,
+ AArch64_D9 = 49,
+ AArch64_D10 = 50,
+ AArch64_D11 = 51,
+ AArch64_D12 = 52,
+ AArch64_D13 = 53,
+ AArch64_D14 = 54,
+ AArch64_D15 = 55,
+ AArch64_D16 = 56,
+ AArch64_D17 = 57,
+ AArch64_D18 = 58,
+ AArch64_D19 = 59,
+ AArch64_D20 = 60,
+ AArch64_D21 = 61,
+ AArch64_D22 = 62,
+ AArch64_D23 = 63,
+ AArch64_D24 = 64,
+ AArch64_D25 = 65,
+ AArch64_D26 = 66,
+ AArch64_D27 = 67,
+ AArch64_D28 = 68,
+ AArch64_D29 = 69,
+ AArch64_D30 = 70,
+ AArch64_D31 = 71,
+ AArch64_H0 = 72,
+ AArch64_H1 = 73,
+ AArch64_H2 = 74,
+ AArch64_H3 = 75,
+ AArch64_H4 = 76,
+ AArch64_H5 = 77,
+ AArch64_H6 = 78,
+ AArch64_H7 = 79,
+ AArch64_H8 = 80,
+ AArch64_H9 = 81,
+ AArch64_H10 = 82,
+ AArch64_H11 = 83,
+ AArch64_H12 = 84,
+ AArch64_H13 = 85,
+ AArch64_H14 = 86,
+ AArch64_H15 = 87,
+ AArch64_H16 = 88,
+ AArch64_H17 = 89,
+ AArch64_H18 = 90,
+ AArch64_H19 = 91,
+ AArch64_H20 = 92,
+ AArch64_H21 = 93,
+ AArch64_H22 = 94,
+ AArch64_H23 = 95,
+ AArch64_H24 = 96,
+ AArch64_H25 = 97,
+ AArch64_H26 = 98,
+ AArch64_H27 = 99,
+ AArch64_H28 = 100,
+ AArch64_H29 = 101,
+ AArch64_H30 = 102,
+ AArch64_H31 = 103,
+ AArch64_Q0 = 104,
+ AArch64_Q1 = 105,
+ AArch64_Q2 = 106,
+ AArch64_Q3 = 107,
+ AArch64_Q4 = 108,
+ AArch64_Q5 = 109,
+ AArch64_Q6 = 110,
+ AArch64_Q7 = 111,
+ AArch64_Q8 = 112,
+ AArch64_Q9 = 113,
+ AArch64_Q10 = 114,
+ AArch64_Q11 = 115,
+ AArch64_Q12 = 116,
+ AArch64_Q13 = 117,
+ AArch64_Q14 = 118,
+ AArch64_Q15 = 119,
+ AArch64_Q16 = 120,
+ AArch64_Q17 = 121,
+ AArch64_Q18 = 122,
+ AArch64_Q19 = 123,
+ AArch64_Q20 = 124,
+ AArch64_Q21 = 125,
+ AArch64_Q22 = 126,
+ AArch64_Q23 = 127,
+ AArch64_Q24 = 128,
+ AArch64_Q25 = 129,
+ AArch64_Q26 = 130,
+ AArch64_Q27 = 131,
+ AArch64_Q28 = 132,
+ AArch64_Q29 = 133,
+ AArch64_Q30 = 134,
+ AArch64_Q31 = 135,
+ AArch64_S0 = 136,
+ AArch64_S1 = 137,
+ AArch64_S2 = 138,
+ AArch64_S3 = 139,
+ AArch64_S4 = 140,
+ AArch64_S5 = 141,
+ AArch64_S6 = 142,
+ AArch64_S7 = 143,
+ AArch64_S8 = 144,
+ AArch64_S9 = 145,
+ AArch64_S10 = 146,
+ AArch64_S11 = 147,
+ AArch64_S12 = 148,
+ AArch64_S13 = 149,
+ AArch64_S14 = 150,
+ AArch64_S15 = 151,
+ AArch64_S16 = 152,
+ AArch64_S17 = 153,
+ AArch64_S18 = 154,
+ AArch64_S19 = 155,
+ AArch64_S20 = 156,
+ AArch64_S21 = 157,
+ AArch64_S22 = 158,
+ AArch64_S23 = 159,
+ AArch64_S24 = 160,
+ AArch64_S25 = 161,
+ AArch64_S26 = 162,
+ AArch64_S27 = 163,
+ AArch64_S28 = 164,
+ AArch64_S29 = 165,
+ AArch64_S30 = 166,
+ AArch64_S31 = 167,
+ AArch64_W0 = 168,
+ AArch64_W1 = 169,
+ AArch64_W2 = 170,
+ AArch64_W3 = 171,
+ AArch64_W4 = 172,
+ AArch64_W5 = 173,
+ AArch64_W6 = 174,
+ AArch64_W7 = 175,
+ AArch64_W8 = 176,
+ AArch64_W9 = 177,
+ AArch64_W10 = 178,
+ AArch64_W11 = 179,
+ AArch64_W12 = 180,
+ AArch64_W13 = 181,
+ AArch64_W14 = 182,
+ AArch64_W15 = 183,
+ AArch64_W16 = 184,
+ AArch64_W17 = 185,
+ AArch64_W18 = 186,
+ AArch64_W19 = 187,
+ AArch64_W20 = 188,
+ AArch64_W21 = 189,
+ AArch64_W22 = 190,
+ AArch64_W23 = 191,
+ AArch64_W24 = 192,
+ AArch64_W25 = 193,
+ AArch64_W26 = 194,
+ AArch64_W27 = 195,
+ AArch64_W28 = 196,
+ AArch64_W29 = 197,
+ AArch64_W30 = 198,
+ AArch64_X0 = 199,
+ AArch64_X1 = 200,
+ AArch64_X2 = 201,
+ AArch64_X3 = 202,
+ AArch64_X4 = 203,
+ AArch64_X5 = 204,
+ AArch64_X6 = 205,
+ AArch64_X7 = 206,
+ AArch64_X8 = 207,
+ AArch64_X9 = 208,
+ AArch64_X10 = 209,
+ AArch64_X11 = 210,
+ AArch64_X12 = 211,
+ AArch64_X13 = 212,
+ AArch64_X14 = 213,
+ AArch64_X15 = 214,
+ AArch64_X16 = 215,
+ AArch64_X17 = 216,
+ AArch64_X18 = 217,
+ AArch64_X19 = 218,
+ AArch64_X20 = 219,
+ AArch64_X21 = 220,
+ AArch64_X22 = 221,
+ AArch64_X23 = 222,
+ AArch64_X24 = 223,
+ AArch64_X25 = 224,
+ AArch64_X26 = 225,
+ AArch64_X27 = 226,
+ AArch64_X28 = 227,
AArch64_D0_D1 = 228,
AArch64_D1_D2 = 229,
AArch64_D2_D3 = 230,
@@ -274,38 +274,38 @@
AArch64_D29_D30 = 257,
AArch64_D30_D31 = 258,
AArch64_D31_D0 = 259,
- AArch64_Q0_Q1 = 260,
- AArch64_Q1_Q2 = 261,
- AArch64_Q2_Q3 = 262,
- AArch64_Q3_Q4 = 263,
- AArch64_Q4_Q5 = 264,
- AArch64_Q5_Q6 = 265,
- AArch64_Q6_Q7 = 266,
- AArch64_Q7_Q8 = 267,
- AArch64_Q8_Q9 = 268,
- AArch64_Q9_Q10 = 269,
- AArch64_Q10_Q11 = 270,
- AArch64_Q11_Q12 = 271,
- AArch64_Q12_Q13 = 272,
- AArch64_Q13_Q14 = 273,
- AArch64_Q14_Q15 = 274,
- AArch64_Q15_Q16 = 275,
- AArch64_Q16_Q17 = 276,
- AArch64_Q17_Q18 = 277,
- AArch64_Q18_Q19 = 278,
- AArch64_Q19_Q20 = 279,
- AArch64_Q20_Q21 = 280,
- AArch64_Q21_Q22 = 281,
- AArch64_Q22_Q23 = 282,
- AArch64_Q23_Q24 = 283,
- AArch64_Q24_Q25 = 284,
- AArch64_Q25_Q26 = 285,
- AArch64_Q26_Q27 = 286,
- AArch64_Q27_Q28 = 287,
- AArch64_Q28_Q29 = 288,
- AArch64_Q29_Q30 = 289,
- AArch64_Q30_Q31 = 290,
- AArch64_Q31_Q0 = 291,
+ AArch64_D0_D1_D2_D3 = 260,
+ AArch64_D1_D2_D3_D4 = 261,
+ AArch64_D2_D3_D4_D5 = 262,
+ AArch64_D3_D4_D5_D6 = 263,
+ AArch64_D4_D5_D6_D7 = 264,
+ AArch64_D5_D6_D7_D8 = 265,
+ AArch64_D6_D7_D8_D9 = 266,
+ AArch64_D7_D8_D9_D10 = 267,
+ AArch64_D8_D9_D10_D11 = 268,
+ AArch64_D9_D10_D11_D12 = 269,
+ AArch64_D10_D11_D12_D13 = 270,
+ AArch64_D11_D12_D13_D14 = 271,
+ AArch64_D12_D13_D14_D15 = 272,
+ AArch64_D13_D14_D15_D16 = 273,
+ AArch64_D14_D15_D16_D17 = 274,
+ AArch64_D15_D16_D17_D18 = 275,
+ AArch64_D16_D17_D18_D19 = 276,
+ AArch64_D17_D18_D19_D20 = 277,
+ AArch64_D18_D19_D20_D21 = 278,
+ AArch64_D19_D20_D21_D22 = 279,
+ AArch64_D20_D21_D22_D23 = 280,
+ AArch64_D21_D22_D23_D24 = 281,
+ AArch64_D22_D23_D24_D25 = 282,
+ AArch64_D23_D24_D25_D26 = 283,
+ AArch64_D24_D25_D26_D27 = 284,
+ AArch64_D25_D26_D27_D28 = 285,
+ AArch64_D26_D27_D28_D29 = 286,
+ AArch64_D27_D28_D29_D30 = 287,
+ AArch64_D28_D29_D30_D31 = 288,
+ AArch64_D29_D30_D31_D0 = 289,
+ AArch64_D30_D31_D0_D1 = 290,
+ AArch64_D31_D0_D1_D2 = 291,
AArch64_D0_D1_D2 = 292,
AArch64_D1_D2_D3 = 293,
AArch64_D2_D3_D4 = 294,
@@ -338,102 +338,102 @@
AArch64_D29_D30_D31 = 321,
AArch64_D30_D31_D0 = 322,
AArch64_D31_D0_D1 = 323,
- AArch64_Q0_Q1_Q2 = 324,
- AArch64_Q1_Q2_Q3 = 325,
- AArch64_Q2_Q3_Q4 = 326,
- AArch64_Q3_Q4_Q5 = 327,
- AArch64_Q4_Q5_Q6 = 328,
- AArch64_Q5_Q6_Q7 = 329,
- AArch64_Q6_Q7_Q8 = 330,
- AArch64_Q7_Q8_Q9 = 331,
- AArch64_Q8_Q9_Q10 = 332,
- AArch64_Q9_Q10_Q11 = 333,
- AArch64_Q10_Q11_Q12 = 334,
- AArch64_Q11_Q12_Q13 = 335,
- AArch64_Q12_Q13_Q14 = 336,
- AArch64_Q13_Q14_Q15 = 337,
- AArch64_Q14_Q15_Q16 = 338,
- AArch64_Q15_Q16_Q17 = 339,
- AArch64_Q16_Q17_Q18 = 340,
- AArch64_Q17_Q18_Q19 = 341,
- AArch64_Q18_Q19_Q20 = 342,
- AArch64_Q19_Q20_Q21 = 343,
- AArch64_Q20_Q21_Q22 = 344,
- AArch64_Q21_Q22_Q23 = 345,
- AArch64_Q22_Q23_Q24 = 346,
- AArch64_Q23_Q24_Q25 = 347,
- AArch64_Q24_Q25_Q26 = 348,
- AArch64_Q25_Q26_Q27 = 349,
- AArch64_Q26_Q27_Q28 = 350,
- AArch64_Q27_Q28_Q29 = 351,
- AArch64_Q28_Q29_Q30 = 352,
- AArch64_Q29_Q30_Q31 = 353,
- AArch64_Q30_Q31_Q0 = 354,
- AArch64_Q31_Q0_Q1 = 355,
- AArch64_D0_D1_D2_D3 = 356,
- AArch64_D1_D2_D3_D4 = 357,
- AArch64_D2_D3_D4_D5 = 358,
- AArch64_D3_D4_D5_D6 = 359,
- AArch64_D4_D5_D6_D7 = 360,
- AArch64_D5_D6_D7_D8 = 361,
- AArch64_D6_D7_D8_D9 = 362,
- AArch64_D7_D8_D9_D10 = 363,
- AArch64_D8_D9_D10_D11 = 364,
- AArch64_D9_D10_D11_D12 = 365,
- AArch64_D10_D11_D12_D13 = 366,
- AArch64_D11_D12_D13_D14 = 367,
- AArch64_D12_D13_D14_D15 = 368,
- AArch64_D13_D14_D15_D16 = 369,
- AArch64_D14_D15_D16_D17 = 370,
- AArch64_D15_D16_D17_D18 = 371,
- AArch64_D16_D17_D18_D19 = 372,
- AArch64_D17_D18_D19_D20 = 373,
- AArch64_D18_D19_D20_D21 = 374,
- AArch64_D19_D20_D21_D22 = 375,
- AArch64_D20_D21_D22_D23 = 376,
- AArch64_D21_D22_D23_D24 = 377,
- AArch64_D22_D23_D24_D25 = 378,
- AArch64_D23_D24_D25_D26 = 379,
- AArch64_D24_D25_D26_D27 = 380,
- AArch64_D25_D26_D27_D28 = 381,
- AArch64_D26_D27_D28_D29 = 382,
- AArch64_D27_D28_D29_D30 = 383,
- AArch64_D28_D29_D30_D31 = 384,
- AArch64_D29_D30_D31_D0 = 385,
- AArch64_D30_D31_D0_D1 = 386,
- AArch64_D31_D0_D1_D2 = 387,
- AArch64_Q0_Q1_Q2_Q3 = 388,
- AArch64_Q1_Q2_Q3_Q4 = 389,
- AArch64_Q2_Q3_Q4_Q5 = 390,
- AArch64_Q3_Q4_Q5_Q6 = 391,
- AArch64_Q4_Q5_Q6_Q7 = 392,
- AArch64_Q5_Q6_Q7_Q8 = 393,
- AArch64_Q6_Q7_Q8_Q9 = 394,
- AArch64_Q7_Q8_Q9_Q10 = 395,
- AArch64_Q8_Q9_Q10_Q11 = 396,
- AArch64_Q9_Q10_Q11_Q12 = 397,
- AArch64_Q10_Q11_Q12_Q13 = 398,
- AArch64_Q11_Q12_Q13_Q14 = 399,
- AArch64_Q12_Q13_Q14_Q15 = 400,
- AArch64_Q13_Q14_Q15_Q16 = 401,
- AArch64_Q14_Q15_Q16_Q17 = 402,
- AArch64_Q15_Q16_Q17_Q18 = 403,
- AArch64_Q16_Q17_Q18_Q19 = 404,
- AArch64_Q17_Q18_Q19_Q20 = 405,
- AArch64_Q18_Q19_Q20_Q21 = 406,
- AArch64_Q19_Q20_Q21_Q22 = 407,
- AArch64_Q20_Q21_Q22_Q23 = 408,
- AArch64_Q21_Q22_Q23_Q24 = 409,
- AArch64_Q22_Q23_Q24_Q25 = 410,
- AArch64_Q23_Q24_Q25_Q26 = 411,
- AArch64_Q24_Q25_Q26_Q27 = 412,
- AArch64_Q25_Q26_Q27_Q28 = 413,
- AArch64_Q26_Q27_Q28_Q29 = 414,
- AArch64_Q27_Q28_Q29_Q30 = 415,
- AArch64_Q28_Q29_Q30_Q31 = 416,
- AArch64_Q29_Q30_Q31_Q0 = 417,
- AArch64_Q30_Q31_Q0_Q1 = 418,
- AArch64_Q31_Q0_Q1_Q2 = 419,
+ AArch64_Q0_Q1 = 324,
+ AArch64_Q1_Q2 = 325,
+ AArch64_Q2_Q3 = 326,
+ AArch64_Q3_Q4 = 327,
+ AArch64_Q4_Q5 = 328,
+ AArch64_Q5_Q6 = 329,
+ AArch64_Q6_Q7 = 330,
+ AArch64_Q7_Q8 = 331,
+ AArch64_Q8_Q9 = 332,
+ AArch64_Q9_Q10 = 333,
+ AArch64_Q10_Q11 = 334,
+ AArch64_Q11_Q12 = 335,
+ AArch64_Q12_Q13 = 336,
+ AArch64_Q13_Q14 = 337,
+ AArch64_Q14_Q15 = 338,
+ AArch64_Q15_Q16 = 339,
+ AArch64_Q16_Q17 = 340,
+ AArch64_Q17_Q18 = 341,
+ AArch64_Q18_Q19 = 342,
+ AArch64_Q19_Q20 = 343,
+ AArch64_Q20_Q21 = 344,
+ AArch64_Q21_Q22 = 345,
+ AArch64_Q22_Q23 = 346,
+ AArch64_Q23_Q24 = 347,
+ AArch64_Q24_Q25 = 348,
+ AArch64_Q25_Q26 = 349,
+ AArch64_Q26_Q27 = 350,
+ AArch64_Q27_Q28 = 351,
+ AArch64_Q28_Q29 = 352,
+ AArch64_Q29_Q30 = 353,
+ AArch64_Q30_Q31 = 354,
+ AArch64_Q31_Q0 = 355,
+ AArch64_Q0_Q1_Q2_Q3 = 356,
+ AArch64_Q1_Q2_Q3_Q4 = 357,
+ AArch64_Q2_Q3_Q4_Q5 = 358,
+ AArch64_Q3_Q4_Q5_Q6 = 359,
+ AArch64_Q4_Q5_Q6_Q7 = 360,
+ AArch64_Q5_Q6_Q7_Q8 = 361,
+ AArch64_Q6_Q7_Q8_Q9 = 362,
+ AArch64_Q7_Q8_Q9_Q10 = 363,
+ AArch64_Q8_Q9_Q10_Q11 = 364,
+ AArch64_Q9_Q10_Q11_Q12 = 365,
+ AArch64_Q10_Q11_Q12_Q13 = 366,
+ AArch64_Q11_Q12_Q13_Q14 = 367,
+ AArch64_Q12_Q13_Q14_Q15 = 368,
+ AArch64_Q13_Q14_Q15_Q16 = 369,
+ AArch64_Q14_Q15_Q16_Q17 = 370,
+ AArch64_Q15_Q16_Q17_Q18 = 371,
+ AArch64_Q16_Q17_Q18_Q19 = 372,
+ AArch64_Q17_Q18_Q19_Q20 = 373,
+ AArch64_Q18_Q19_Q20_Q21 = 374,
+ AArch64_Q19_Q20_Q21_Q22 = 375,
+ AArch64_Q20_Q21_Q22_Q23 = 376,
+ AArch64_Q21_Q22_Q23_Q24 = 377,
+ AArch64_Q22_Q23_Q24_Q25 = 378,
+ AArch64_Q23_Q24_Q25_Q26 = 379,
+ AArch64_Q24_Q25_Q26_Q27 = 380,
+ AArch64_Q25_Q26_Q27_Q28 = 381,
+ AArch64_Q26_Q27_Q28_Q29 = 382,
+ AArch64_Q27_Q28_Q29_Q30 = 383,
+ AArch64_Q28_Q29_Q30_Q31 = 384,
+ AArch64_Q29_Q30_Q31_Q0 = 385,
+ AArch64_Q30_Q31_Q0_Q1 = 386,
+ AArch64_Q31_Q0_Q1_Q2 = 387,
+ AArch64_Q0_Q1_Q2 = 388,
+ AArch64_Q1_Q2_Q3 = 389,
+ AArch64_Q2_Q3_Q4 = 390,
+ AArch64_Q3_Q4_Q5 = 391,
+ AArch64_Q4_Q5_Q6 = 392,
+ AArch64_Q5_Q6_Q7 = 393,
+ AArch64_Q6_Q7_Q8 = 394,
+ AArch64_Q7_Q8_Q9 = 395,
+ AArch64_Q8_Q9_Q10 = 396,
+ AArch64_Q9_Q10_Q11 = 397,
+ AArch64_Q10_Q11_Q12 = 398,
+ AArch64_Q11_Q12_Q13 = 399,
+ AArch64_Q12_Q13_Q14 = 400,
+ AArch64_Q13_Q14_Q15 = 401,
+ AArch64_Q14_Q15_Q16 = 402,
+ AArch64_Q15_Q16_Q17 = 403,
+ AArch64_Q16_Q17_Q18 = 404,
+ AArch64_Q17_Q18_Q19 = 405,
+ AArch64_Q18_Q19_Q20 = 406,
+ AArch64_Q19_Q20_Q21 = 407,
+ AArch64_Q20_Q21_Q22 = 408,
+ AArch64_Q21_Q22_Q23 = 409,
+ AArch64_Q22_Q23_Q24 = 410,
+ AArch64_Q23_Q24_Q25 = 411,
+ AArch64_Q24_Q25_Q26 = 412,
+ AArch64_Q25_Q26_Q27 = 413,
+ AArch64_Q26_Q27_Q28 = 414,
+ AArch64_Q27_Q28_Q29 = 415,
+ AArch64_Q28_Q29_Q30 = 416,
+ AArch64_Q29_Q30_Q31 = 417,
+ AArch64_Q30_Q31_Q0 = 418,
+ AArch64_Q31_Q0_Q1 = 419,
AArch64_NUM_TARGET_REGS // 420
};
@@ -441,121 +441,112 @@
enum {
AArch64_FPR8RegClassID = 0,
AArch64_FPR16RegClassID = 1,
- AArch64_FPR32RegClassID = 2,
- AArch64_GPR32RegClassID = 3,
- AArch64_GPR32wspRegClassID = 4,
- AArch64_GPR32nowzrRegClassID = 5,
- AArch64_FlagClassRegClassID = 6,
- AArch64_RwspRegClassID = 7,
- AArch64_FPR64RegClassID = 8,
- AArch64_GPR64RegClassID = 9,
- AArch64_GPR64xspRegClassID = 10,
- AArch64_GPR64noxzrRegClassID = 11,
- AArch64_tcGPR64RegClassID = 12,
- AArch64_FPR64LoRegClassID = 13,
- AArch64_RxspRegClassID = 14,
- AArch64_DPairRegClassID = 15,
- AArch64_DPair_with_dsub_0_in_FPR64LoRegClassID = 16,
- AArch64_DPair_with_dsub_1_in_FPR64LoRegClassID = 17,
- AArch64_DPair_with_dsub_0_in_FPR64Lo_and_DPair_with_dsub_1_in_FPR64LoRegClassID = 18,
- AArch64_FPR128RegClassID = 19,
- AArch64_FPR128LoRegClassID = 20,
- AArch64_DTripleRegClassID = 21,
- AArch64_DTriple_with_dsub_0_in_FPR64LoRegClassID = 22,
- AArch64_DTriple_with_dsub_1_in_FPR64LoRegClassID = 23,
- AArch64_DTriple_with_dsub_2_in_FPR64LoRegClassID = 24,
- AArch64_DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_1_in_FPR64LoRegClassID = 25,
- AArch64_DTriple_with_dsub_1_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64LoRegClassID = 26,
- AArch64_DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64LoRegClassID = 27,
- AArch64_DQuadRegClassID = 28,
- AArch64_DQuad_with_dsub_0_in_FPR64LoRegClassID = 29,
- AArch64_DQuad_with_dsub_1_in_FPR64LoRegClassID = 30,
- AArch64_DQuad_with_dsub_2_in_FPR64LoRegClassID = 31,
- AArch64_DQuad_with_dsub_3_in_FPR64LoRegClassID = 32,
- AArch64_DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_1_in_FPR64LoRegClassID = 33,
- AArch64_DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64LoRegClassID = 34,
- AArch64_DQuad_with_dsub_2_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoRegClassID = 35,
- AArch64_DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64LoRegClassID = 36,
- AArch64_DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoRegClassID = 37,
- AArch64_DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoRegClassID = 38,
- AArch64_QPairRegClassID = 39,
- AArch64_QPair_with_qsub_0_in_FPR128LoRegClassID = 40,
- AArch64_QPair_with_qsub_1_in_FPR128LoRegClassID = 41,
- AArch64_QPair_with_qsub_0_in_FPR128Lo_and_QPair_with_qsub_1_in_FPR128LoRegClassID = 42,
- AArch64_QTripleRegClassID = 43,
- AArch64_QTriple_with_qsub_0_in_FPR128LoRegClassID = 44,
- AArch64_QTriple_with_qsub_1_in_FPR128LoRegClassID = 45,
- AArch64_QTriple_with_qsub_2_in_FPR128LoRegClassID = 46,
- AArch64_QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_1_in_FPR128LoRegClassID = 47,
- AArch64_QTriple_with_qsub_1_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128LoRegClassID = 48,
- AArch64_QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128LoRegClassID = 49,
- AArch64_QQuadRegClassID = 50,
- AArch64_QQuad_with_qsub_0_in_FPR128LoRegClassID = 51,
- AArch64_QQuad_with_qsub_1_in_FPR128LoRegClassID = 52,
- AArch64_QQuad_with_qsub_2_in_FPR128LoRegClassID = 53,
- AArch64_QQuad_with_qsub_3_in_FPR128LoRegClassID = 54,
- AArch64_QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_1_in_FPR128LoRegClassID = 55,
- AArch64_QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128LoRegClassID = 56,
- AArch64_QQuad_with_qsub_2_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoRegClassID = 57,
- AArch64_QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128LoRegClassID = 58,
- AArch64_QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoRegClassID = 59,
- AArch64_QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoRegClassID = 60
+ AArch64_GPR32allRegClassID = 2,
+ AArch64_FPR32RegClassID = 3,
+ AArch64_GPR32RegClassID = 4,
+ AArch64_GPR32spRegClassID = 5,
+ AArch64_GPR32commonRegClassID = 6,
+ AArch64_CCRRegClassID = 7,
+ AArch64_GPR32sponlyRegClassID = 8,
+ AArch64_GPR64allRegClassID = 9,
+ AArch64_FPR64RegClassID = 10,
+ AArch64_GPR64RegClassID = 11,
+ AArch64_GPR64spRegClassID = 12,
+ AArch64_GPR64commonRegClassID = 13,
+ AArch64_tcGPR64RegClassID = 14,
+ AArch64_GPR64sponlyRegClassID = 15,
+ AArch64_DDRegClassID = 16,
+ AArch64_FPR128RegClassID = 17,
+ AArch64_FPR128_loRegClassID = 18,
+ AArch64_DDDRegClassID = 19,
+ AArch64_DDDDRegClassID = 20,
+ AArch64_QQRegClassID = 21,
+ AArch64_QQ_with_qsub0_in_FPR128_loRegClassID = 22,
+ AArch64_QQ_with_qsub1_in_FPR128_loRegClassID = 23,
+ AArch64_QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loRegClassID = 24,
+ AArch64_QQQRegClassID = 25,
+ AArch64_QQQ_with_qsub0_in_FPR128_loRegClassID = 26,
+ AArch64_QQQ_with_qsub1_in_FPR128_loRegClassID = 27,
+ AArch64_QQQ_with_qsub2_in_FPR128_loRegClassID = 28,
+ AArch64_QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loRegClassID = 29,
+ AArch64_QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID = 30,
+ AArch64_QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID = 31,
+ AArch64_QQQQRegClassID = 32,
+ AArch64_QQQQ_with_qsub0_in_FPR128_loRegClassID = 33,
+ AArch64_QQQQ_with_qsub1_in_FPR128_loRegClassID = 34,
+ AArch64_QQQQ_with_qsub2_in_FPR128_loRegClassID = 35,
+ AArch64_QQQQ_with_qsub3_in_FPR128_loRegClassID = 36,
+ AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClassID = 37,
+ AArch64_QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID = 38,
+ AArch64_QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 39,
+ AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID = 40,
+ AArch64_QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 41,
+ AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 42
+};
+
+// Register alternate name indices
+enum {
+ AArch64_NoRegAltName, // 0
+ AArch64_vlist1, // 1
+ AArch64_vreg, // 2
+ AArch64_NUM_TARGET_REG_ALT_NAMES = 3
};
// Subregister indices
enum {
AArch64_NoSubRegister,
- AArch64_dsub_0, // 1
- AArch64_dsub_1, // 2
- AArch64_dsub_2, // 3
- AArch64_dsub_3, // 4
- AArch64_qqsub, // 5
- AArch64_qsub_0, // 6
- AArch64_qsub_1, // 7
- AArch64_qsub_2, // 8
- AArch64_qsub_3, // 9
- AArch64_sub_8, // 10
- AArch64_sub_16, // 11
- AArch64_sub_32, // 12
- AArch64_sub_64, // 13
- AArch64_sub_128, // 14
- AArch64_dsub_1_then_sub_8, // 15
- AArch64_dsub_1_then_sub_16, // 16
- AArch64_dsub_1_then_sub_32, // 17
- AArch64_qsub_1_then_sub_8, // 18
- AArch64_qsub_1_then_sub_16, // 19
- AArch64_qsub_1_then_sub_32, // 20
- AArch64_qsub_1_then_sub_64, // 21
- AArch64_dsub_2_then_sub_8, // 22
- AArch64_dsub_2_then_sub_16, // 23
- AArch64_dsub_2_then_sub_32, // 24
- AArch64_qsub_2_then_sub_8, // 25
- AArch64_qsub_2_then_sub_16, // 26
- AArch64_qsub_2_then_sub_32, // 27
- AArch64_qsub_2_then_sub_64, // 28
- AArch64_dsub_3_then_sub_8, // 29
- AArch64_dsub_3_then_sub_16, // 30
- AArch64_dsub_3_then_sub_32, // 31
- AArch64_qsub_3_then_sub_8, // 32
- AArch64_qsub_3_then_sub_16, // 33
- AArch64_qsub_3_then_sub_32, // 34
- AArch64_qsub_3_then_sub_64, // 35
- AArch64_sub_64_qsub_1_then_sub_64, // 36
- AArch64_dsub_0_dsub_1, // 37
- AArch64_dsub_1_dsub_2, // 38
- AArch64_qsub_0_qsub_1, // 39
- AArch64_qsub_1_qsub_2, // 40
- AArch64_sub_64_qsub_1_then_sub_64_qsub_2_then_sub_64, // 41
- AArch64_qsub_1_then_sub_64_qsub_2_then_sub_64, // 42
- AArch64_dsub_0_dsub_1_dsub_2, // 43
- AArch64_dsub_1_dsub_2_dsub_3, // 44
- AArch64_dsub_2_dsub_3, // 45
- AArch64_qsub_0_qsub_1_qsub_2, // 46
- AArch64_qsub_1_qsub_2_qsub_3, // 47
- AArch64_qsub_2_qsub_3, // 48
- AArch64_sub_64_qsub_1_then_sub_64_qsub_2_then_sub_64_qsub_3_then_sub_64, // 49
- AArch64_qsub_1_then_sub_64_qsub_2_then_sub_64_qsub_3_then_sub_64, // 50
- AArch64_qsub_2_then_sub_64_qsub_3_then_sub_64, // 51
+ AArch64_bsub, // 1
+ AArch64_dsub, // 2
+ AArch64_dsub0, // 3
+ AArch64_dsub1, // 4
+ AArch64_dsub2, // 5
+ AArch64_dsub3, // 6
+ AArch64_hsub, // 7
+ AArch64_qhisub, // 8
+ AArch64_qsub, // 9
+ AArch64_qsub0, // 10
+ AArch64_qsub1, // 11
+ AArch64_qsub2, // 12
+ AArch64_qsub3, // 13
+ AArch64_ssub, // 14
+ AArch64_sub_32, // 15
+ AArch64_dsub1_then_bsub, // 16
+ AArch64_dsub1_then_hsub, // 17
+ AArch64_dsub1_then_ssub, // 18
+ AArch64_dsub3_then_bsub, // 19
+ AArch64_dsub3_then_hsub, // 20
+ AArch64_dsub3_then_ssub, // 21
+ AArch64_dsub2_then_bsub, // 22
+ AArch64_dsub2_then_hsub, // 23
+ AArch64_dsub2_then_ssub, // 24
+ AArch64_qsub1_then_bsub, // 25
+ AArch64_qsub1_then_dsub, // 26
+ AArch64_qsub1_then_hsub, // 27
+ AArch64_qsub1_then_ssub, // 28
+ AArch64_qsub3_then_bsub, // 29
+ AArch64_qsub3_then_dsub, // 30
+ AArch64_qsub3_then_hsub, // 31
+ AArch64_qsub3_then_ssub, // 32
+ AArch64_qsub2_then_bsub, // 33
+ AArch64_qsub2_then_dsub, // 34
+ AArch64_qsub2_then_hsub, // 35
+ AArch64_qsub2_then_ssub, // 36
+ AArch64_dsub0_dsub1, // 37
+ AArch64_dsub0_dsub1_dsub2, // 38
+ AArch64_dsub1_dsub2, // 39
+ AArch64_dsub1_dsub2_dsub3, // 40
+ AArch64_dsub2_dsub3, // 41
+ AArch64_dsub_qsub1_then_dsub, // 42
+ AArch64_dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub, // 43
+ AArch64_dsub_qsub1_then_dsub_qsub2_then_dsub, // 44
+ AArch64_qsub0_qsub1, // 45
+ AArch64_qsub0_qsub1_qsub2, // 46
+ AArch64_qsub1_qsub2, // 47
+ AArch64_qsub1_qsub2_qsub3, // 48
+ AArch64_qsub2_qsub3, // 49
+ AArch64_qsub1_then_dsub_qsub2_then_dsub, // 50
+ AArch64_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub, // 51
+ AArch64_qsub2_then_dsub_qsub3_then_dsub, // 52
AArch64_NUM_TARGET_SUBREGS
};
@@ -577,1176 +568,973 @@
#undef GET_REGINFO_MC_DESC
static MCPhysReg AArch64RegDiffLists[] = {
- /* 0 */ 3, 1, 1, 1, 0,
- /* 5 */ 64, 64, 65440, 64, 125, 1, 31, 1, 30, 1, 1, 30, 1, 1, 29, 1, 1, 1, 29, 1, 1, 1, 0,
- /* 28 */ 157, 1, 62, 1, 1, 61, 1, 1, 1, 0,
- /* 38 */ 65151, 1, 1, 1, 0,
- /* 43 */ 65183, 1, 1, 1, 0,
- /* 48 */ 3, 1, 1, 0,
- /* 52 */ 64, 64, 65440, 64, 126, 31, 1, 31, 1, 30, 1, 1, 30, 1, 1, 29, 1, 1, 1, 29, 1, 1, 0,
- /* 75 */ 3, 29, 1, 1, 0,
- /* 80 */ 158, 31, 33, 30, 1, 33, 29, 1, 1, 0,
- /* 90 */ 32, 31, 1, 31, 1, 30, 1, 1, 30, 1, 1, 0,
- /* 102 */ 63, 1, 62, 1, 1, 0,
- /* 108 */ 65215, 1, 1, 0,
- /* 112 */ 65247, 1, 1, 0,
- /* 116 */ 3, 1, 0,
- /* 119 */ 64, 64, 65440, 64, 125, 1, 31, 1, 31, 1, 30, 1, 1, 30, 1, 1, 29, 1, 1, 1, 29, 1, 0,
- /* 142 */ 3, 1, 29, 1, 0,
- /* 147 */ 157, 1, 63, 1, 30, 33, 1, 29, 1, 0,
- /* 157 */ 32, 32, 31, 1, 31, 1, 30, 1, 1, 30, 1, 0,
- /* 169 */ 3, 30, 1, 0,
- /* 173 */ 64, 31, 33, 30, 1, 0,
- /* 179 */ 32, 31, 1, 31, 1, 0,
- /* 185 */ 63, 1, 0,
- /* 188 */ 65282, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 220, 1, 0,
- /* 203 */ 65282, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 252, 1, 0,
- /* 218 */ 65279, 1, 0,
- /* 221 */ 65311, 1, 0,
- /* 224 */ 2, 0,
- /* 226 */ 64, 64, 65440, 64, 125, 1, 31, 1, 30, 1, 1, 30, 1, 1, 30, 1, 1, 29, 1, 1, 1, 29, 0,
- /* 249 */ 3, 1, 1, 29, 0,
- /* 254 */ 157, 1, 62, 1, 1, 62, 1, 1, 29, 0,
- /* 264 */ 32, 31, 1, 31, 1, 31, 1, 30, 1, 1, 30, 0,
- /* 276 */ 3, 1, 30, 0,
- /* 280 */ 63, 1, 63, 1, 30, 0,
- /* 286 */ 32, 32, 31, 1, 31, 0,
- /* 292 */ 3, 31, 0,
- /* 295 */ 64, 31, 0,
- /* 298 */ 32, 0,
- /* 300 */ 65378, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 221, 0,
- /* 312 */ 65378, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 253, 0,
- /* 324 */ 65374, 0,
- /* 326 */ 65405, 0,
- /* 328 */ 65437, 0,
- /* 330 */ 65218, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 251, 1, 63, 1, 65441, 0,
- /* 352 */ 65314, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 252, 32, 65505, 63, 65441, 0,
- /* 373 */ 65250, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 251, 32, 1, 31, 65473, 95, 1, 65441, 126, 65473, 65441, 0,
- /* 405 */ 65469, 0,
- /* 407 */ 65346, 96, 65472, 65472, 1, 96, 65472, 65472, 0,
- /* 416 */ 65346, 96, 65472, 65472, 33, 96, 65472, 65472, 0,
- /* 425 */ 65472, 96, 65472, 65472, 0,
- /* 430 */ 65218, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 219, 1, 63, 1, 65473, 0,
- /* 452 */ 65218, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 251, 1, 63, 1, 65473, 0,
- /* 474 */ 65314, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 220, 32, 1, 31, 65473, 0,
- /* 495 */ 65314, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 252, 32, 1, 31, 65473, 0,
- /* 516 */ 65250, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 251, 32, 65505, 63, 65441, 127, 65505, 65473, 126, 65441, 65473, 0,
- /* 548 */ 65250, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 219, 32, 1, 31, 65473, 95, 1, 65473, 94, 65473, 65473, 0,
- /* 580 */ 65250, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 251, 32, 1, 31, 65473, 95, 1, 65473, 94, 65473, 65473, 0,
- /* 612 */ 65218, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 251, 65505, 95, 65505, 65473, 0,
- /* 634 */ 65501, 0,
- /* 636 */ 65282, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 252, 65505, 0,
- /* 651 */ 65533, 0,
- /* 653 */ 65534, 0,
- /* 655 */ 65535, 0,
+ /* 0 */ 65185, 1, 1, 1, 0,
+ /* 5 */ 65281, 1, 1, 1, 0,
+ /* 10 */ 5, 29, 1, 1, 0,
+ /* 15 */ 65153, 1, 1, 0,
+ /* 19 */ 65249, 1, 1, 0,
+ /* 23 */ 5, 1, 29, 1, 0,
+ /* 28 */ 5, 30, 1, 0,
+ /* 32 */ 65284, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 218, 1, 0,
+ /* 47 */ 65284, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 250, 1, 0,
+ /* 62 */ 65217, 1, 0,
+ /* 65 */ 65313, 1, 0,
+ /* 68 */ 64, 64, 65440, 64, 123, 1, 62, 65503, 34, 65503, 34, 65503, 1, 63, 1, 62, 65503, 34, 65503, 34, 65503, 1, 0,
+ /* 91 */ 219, 1, 62, 65503, 34, 65503, 34, 65503, 1, 0,
+ /* 101 */ 64, 64, 65440, 64, 124, 31, 33, 65504, 62, 65503, 34, 65503, 1, 33, 31, 33, 65504, 62, 65503, 34, 65503, 1, 0,
+ /* 124 */ 220, 31, 33, 65504, 62, 65503, 34, 65503, 1, 0,
+ /* 134 */ 63, 65503, 34, 65503, 1, 64, 63, 65503, 34, 65503, 1, 0,
+ /* 146 */ 64, 64, 65440, 64, 123, 1, 63, 1, 65503, 1, 62, 65503, 1, 33, 1, 63, 1, 65503, 1, 62, 65503, 1, 0,
+ /* 169 */ 219, 1, 63, 1, 65503, 1, 62, 65503, 1, 0,
+ /* 179 */ 64, 65504, 63, 65503, 1, 33, 64, 65504, 63, 65503, 1, 0,
+ /* 191 */ 65503, 1, 128, 65503, 1, 0,
+ /* 197 */ 3, 0,
+ /* 199 */ 4, 0,
+ /* 201 */ 5, 1, 1, 29, 0,
+ /* 206 */ 64, 64, 65440, 64, 123, 1, 62, 1, 65503, 34, 65503, 1, 29, 34, 1, 62, 1, 65503, 34, 65503, 1, 29, 0,
+ /* 229 */ 219, 1, 62, 1, 65503, 34, 65503, 1, 29, 0,
+ /* 239 */ 5, 1, 30, 0,
+ /* 243 */ 63, 1, 65503, 1, 30, 34, 63, 1, 65503, 1, 30, 0,
+ /* 255 */ 5, 31, 0,
+ /* 258 */ 65504, 31, 97, 65504, 31, 0,
+ /* 264 */ 96, 0,
+ /* 266 */ 196, 0,
+ /* 268 */ 65316, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 219, 0,
+ /* 280 */ 65316, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 251, 0,
+ /* 292 */ 65339, 0,
+ /* 294 */ 65340, 0,
+ /* 296 */ 65374, 0,
+ /* 298 */ 65405, 0,
+ /* 300 */ 65437, 0,
+ /* 302 */ 65252, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 218, 64, 32, 1, 65440, 0,
+ /* 323 */ 65252, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 250, 64, 32, 1, 65440, 0,
+ /* 344 */ 65252, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 250, 64, 32, 65505, 65440, 0,
+ /* 365 */ 65284, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 249, 32, 32, 32, 64, 65473, 64, 65441, 65471, 64, 65441, 0,
+ /* 397 */ 65316, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 249, 64, 65473, 64, 65441, 0,
+ /* 419 */ 65469, 0,
+ /* 421 */ 65348, 96, 65472, 65472, 1, 96, 65472, 65472, 0,
+ /* 430 */ 65348, 96, 65472, 65472, 33, 96, 65472, 65472, 0,
+ /* 439 */ 65472, 96, 65472, 65472, 0,
+ /* 444 */ 65284, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 249, 32, 32, 32, 64, 65441, 64, 65473, 65439, 64, 65473, 0,
+ /* 476 */ 65284, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 217, 32, 32, 32, 64, 65473, 64, 65473, 65439, 64, 65473, 0,
+ /* 508 */ 65284, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 249, 32, 32, 32, 64, 65473, 64, 65473, 65439, 64, 65473, 0,
+ /* 540 */ 65316, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 249, 64, 65441, 64, 65473, 0,
+ /* 562 */ 65316, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 217, 64, 65473, 64, 65473, 0,
+ /* 584 */ 65316, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 249, 64, 65473, 64, 65473, 0,
+ /* 606 */ 65501, 0,
+ /* 608 */ 65284, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 250, 65505, 0,
+ /* 623 */ 65533, 0,
+ /* 625 */ 65535, 0,
};
static uint16_t AArch64SubRegIdxLists[] = {
- /* 0 */ 13, 12, 11, 10, 0,
- /* 5 */ 12, 0,
- /* 7 */ 1, 12, 11, 10, 2, 17, 16, 15, 0,
- /* 16 */ 6, 13, 12, 11, 10, 7, 21, 20, 19, 18, 36, 0,
- /* 28 */ 1, 12, 11, 10, 2, 17, 16, 15, 3, 24, 23, 22, 37, 38, 0,
- /* 43 */ 6, 13, 12, 11, 10, 7, 21, 20, 19, 18, 8, 28, 27, 26, 25, 36, 39, 40, 41, 42, 0,
- /* 64 */ 1, 12, 11, 10, 2, 17, 16, 15, 3, 24, 23, 22, 4, 31, 30, 29, 37, 38, 43, 44, 45, 0,
- /* 86 */ 6, 13, 12, 11, 10, 7, 21, 20, 19, 18, 8, 28, 27, 26, 25, 9, 35, 34, 33, 32, 36, 39, 40, 41, 42, 46, 47, 48, 49, 50, 51, 0,
+ /* 0 */ 2, 14, 7, 1, 0,
+ /* 5 */ 15, 0,
+ /* 7 */ 3, 14, 7, 1, 4, 18, 17, 16, 0,
+ /* 16 */ 3, 14, 7, 1, 4, 18, 17, 16, 5, 24, 23, 22, 37, 39, 0,
+ /* 31 */ 3, 14, 7, 1, 4, 18, 17, 16, 5, 24, 23, 22, 6, 21, 20, 19, 37, 38, 39, 40, 41, 0,
+ /* 53 */ 10, 2, 14, 7, 1, 11, 26, 28, 27, 25, 42, 0,
+ /* 65 */ 10, 2, 14, 7, 1, 11, 26, 28, 27, 25, 12, 34, 36, 35, 33, 42, 44, 45, 47, 50, 0,
+ /* 86 */ 10, 2, 14, 7, 1, 11, 26, 28, 27, 25, 12, 34, 36, 35, 33, 13, 30, 32, 31, 29, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 0,
};
static MCRegisterDesc AArch64RegDesc[] = { // Descriptors
{ 3, 0, 0, 0, 0 },
- { 1542, 4, 4, 4, 10481 },
- { 1526, 4, 224, 4, 10481 },
- { 1534, 4, 224, 4, 10481 },
- { 1530, 653, 4, 5, 10417 },
- { 1538, 653, 4, 5, 10417 },
- { 150, 4, 52, 4, 10417 },
- { 339, 4, 119, 4, 10417 },
- { 484, 4, 226, 4, 10417 },
- { 629, 4, 5, 4, 10417 },
- { 772, 4, 5, 4, 10417 },
- { 915, 4, 5, 4, 10417 },
- { 1058, 4, 5, 4, 10417 },
- { 1201, 4, 5, 4, 10417 },
- { 1344, 4, 5, 4, 10417 },
- { 1487, 4, 5, 4, 10417 },
- { 0, 4, 5, 4, 10417 },
- { 195, 4, 5, 4, 10417 },
- { 382, 4, 5, 4, 10417 },
- { 525, 4, 5, 4, 10417 },
- { 668, 4, 5, 4, 10417 },
- { 811, 4, 5, 4, 10417 },
- { 954, 4, 5, 4, 10417 },
- { 1097, 4, 5, 4, 10417 },
- { 1240, 4, 5, 4, 10417 },
- { 1383, 4, 5, 4, 10417 },
- { 46, 4, 5, 4, 10417 },
- { 243, 4, 5, 4, 10417 },
- { 432, 4, 5, 4, 10417 },
- { 577, 4, 5, 4, 10417 },
- { 720, 4, 5, 4, 10417 },
- { 863, 4, 5, 4, 10417 },
- { 1006, 4, 5, 4, 10417 },
- { 1149, 4, 5, 4, 10417 },
- { 1292, 4, 5, 4, 10417 },
- { 1435, 4, 5, 4, 10417 },
- { 98, 4, 5, 4, 10417 },
- { 295, 4, 5, 4, 10417 },
- { 165, 412, 55, 1, 10145 },
- { 353, 412, 122, 1, 10145 },
- { 497, 412, 229, 1, 10145 },
- { 641, 412, 8, 1, 10145 },
- { 784, 412, 8, 1, 10145 },
- { 927, 412, 8, 1, 10145 },
- { 1070, 412, 8, 1, 10145 },
- { 1213, 412, 8, 1, 10145 },
- { 1356, 412, 8, 1, 10145 },
- { 1499, 412, 8, 1, 10145 },
- { 13, 412, 8, 1, 10145 },
- { 209, 412, 8, 1, 10145 },
- { 397, 412, 8, 1, 10145 },
- { 541, 412, 8, 1, 10145 },
- { 684, 412, 8, 1, 10145 },
- { 827, 412, 8, 1, 10145 },
- { 970, 412, 8, 1, 10145 },
- { 1113, 412, 8, 1, 10145 },
- { 1256, 412, 8, 1, 10145 },
- { 1399, 412, 8, 1, 10145 },
- { 62, 412, 8, 1, 10145 },
- { 259, 412, 8, 1, 10145 },
- { 448, 412, 8, 1, 10145 },
- { 593, 412, 8, 1, 10145 },
- { 736, 412, 8, 1, 10145 },
- { 879, 412, 8, 1, 10145 },
- { 1022, 412, 8, 1, 10145 },
- { 1165, 412, 8, 1, 10145 },
- { 1308, 412, 8, 1, 10145 },
- { 1451, 412, 8, 1, 10145 },
- { 114, 412, 8, 1, 10145 },
- { 311, 412, 8, 1, 10145 },
- { 168, 414, 53, 3, 6481 },
- { 356, 414, 120, 3, 6481 },
- { 500, 414, 227, 3, 6481 },
- { 644, 414, 6, 3, 6481 },
- { 787, 414, 6, 3, 6481 },
- { 930, 414, 6, 3, 6481 },
- { 1073, 414, 6, 3, 6481 },
- { 1216, 414, 6, 3, 6481 },
- { 1359, 414, 6, 3, 6481 },
- { 1502, 414, 6, 3, 6481 },
- { 17, 414, 6, 3, 6481 },
- { 213, 414, 6, 3, 6481 },
- { 401, 414, 6, 3, 6481 },
- { 545, 414, 6, 3, 6481 },
- { 688, 414, 6, 3, 6481 },
- { 831, 414, 6, 3, 6481 },
- { 974, 414, 6, 3, 6481 },
- { 1117, 414, 6, 3, 6481 },
- { 1260, 414, 6, 3, 6481 },
- { 1403, 414, 6, 3, 6481 },
- { 66, 414, 6, 3, 6481 },
- { 263, 414, 6, 3, 6481 },
- { 452, 414, 6, 3, 6481 },
- { 597, 414, 6, 3, 6481 },
- { 740, 414, 6, 3, 6481 },
- { 883, 414, 6, 3, 6481 },
- { 1026, 414, 6, 3, 6481 },
- { 1169, 414, 6, 3, 6481 },
- { 1312, 414, 6, 3, 6481 },
- { 1455, 414, 6, 3, 6481 },
- { 118, 414, 6, 3, 6481 },
- { 315, 414, 6, 3, 6481 },
- { 183, 425, 80, 0, 5249 },
- { 370, 425, 147, 0, 5249 },
- { 513, 425, 254, 0, 5249 },
- { 656, 425, 28, 0, 5249 },
- { 799, 425, 28, 0, 5249 },
- { 942, 425, 28, 0, 5249 },
- { 1085, 425, 28, 0, 5249 },
- { 1228, 425, 28, 0, 5249 },
- { 1371, 425, 28, 0, 5249 },
- { 1514, 425, 28, 0, 5249 },
- { 30, 425, 28, 0, 5249 },
- { 227, 425, 28, 0, 5249 },
- { 416, 425, 28, 0, 5249 },
- { 561, 425, 28, 0, 5249 },
- { 704, 425, 28, 0, 5249 },
- { 847, 425, 28, 0, 5249 },
- { 990, 425, 28, 0, 5249 },
- { 1133, 425, 28, 0, 5249 },
- { 1276, 425, 28, 0, 5249 },
- { 1419, 425, 28, 0, 5249 },
- { 82, 425, 28, 0, 5249 },
- { 279, 425, 28, 0, 5249 },
- { 468, 425, 28, 0, 5249 },
- { 613, 425, 28, 0, 5249 },
- { 756, 425, 28, 0, 5249 },
- { 899, 425, 28, 0, 5249 },
- { 1042, 425, 28, 0, 5249 },
- { 1185, 425, 28, 0, 5249 },
- { 1328, 425, 28, 0, 5249 },
- { 1471, 425, 28, 0, 5249 },
- { 134, 425, 28, 0, 5249 },
- { 331, 425, 28, 0, 5249 },
- { 186, 413, 54, 2, 5217 },
- { 373, 413, 121, 2, 5217 },
- { 516, 413, 228, 2, 5217 },
- { 659, 413, 7, 2, 5217 },
- { 802, 413, 7, 2, 5217 },
- { 945, 413, 7, 2, 5217 },
- { 1088, 413, 7, 2, 5217 },
- { 1231, 413, 7, 2, 5217 },
- { 1374, 413, 7, 2, 5217 },
- { 1517, 413, 7, 2, 5217 },
- { 34, 413, 7, 2, 5217 },
- { 231, 413, 7, 2, 5217 },
- { 420, 413, 7, 2, 5217 },
- { 565, 413, 7, 2, 5217 },
- { 708, 413, 7, 2, 5217 },
- { 851, 413, 7, 2, 5217 },
- { 994, 413, 7, 2, 5217 },
- { 1137, 413, 7, 2, 5217 },
- { 1280, 413, 7, 2, 5217 },
- { 1423, 413, 7, 2, 5217 },
- { 86, 413, 7, 2, 5217 },
- { 283, 413, 7, 2, 5217 },
- { 472, 413, 7, 2, 5217 },
- { 617, 413, 7, 2, 5217 },
- { 760, 413, 7, 2, 5217 },
- { 903, 413, 7, 2, 5217 },
- { 1046, 413, 7, 2, 5217 },
- { 1189, 413, 7, 2, 5217 },
- { 1332, 413, 7, 2, 5217 },
- { 1475, 413, 7, 2, 5217 },
- { 138, 413, 7, 2, 5217 },
- { 335, 413, 7, 2, 5217 },
- { 189, 4, 290, 4, 5217 },
- { 376, 4, 290, 4, 5217 },
- { 519, 4, 290, 4, 5217 },
- { 662, 4, 290, 4, 5217 },
- { 805, 4, 290, 4, 5217 },
- { 948, 4, 290, 4, 5217 },
- { 1091, 4, 290, 4, 5217 },
- { 1234, 4, 290, 4, 5217 },
- { 1377, 4, 290, 4, 5217 },
- { 1520, 4, 290, 4, 5217 },
- { 38, 4, 290, 4, 5217 },
- { 235, 4, 290, 4, 5217 },
- { 424, 4, 290, 4, 5217 },
- { 569, 4, 290, 4, 5217 },
- { 712, 4, 290, 4, 5217 },
- { 855, 4, 290, 4, 5217 },
- { 998, 4, 290, 4, 5217 },
- { 1141, 4, 290, 4, 5217 },
- { 1284, 4, 290, 4, 5217 },
- { 1427, 4, 290, 4, 5217 },
- { 90, 4, 290, 4, 5217 },
- { 287, 4, 290, 4, 5217 },
- { 476, 4, 290, 4, 5217 },
- { 621, 4, 290, 4, 5217 },
- { 764, 4, 290, 4, 5217 },
- { 907, 4, 290, 4, 5217 },
- { 1050, 4, 290, 4, 5217 },
- { 1193, 4, 290, 4, 5217 },
- { 1336, 4, 290, 4, 5217 },
- { 1479, 4, 290, 4, 5217 },
- { 142, 4, 290, 4, 5217 },
- { 192, 649, 4, 5, 5185 },
- { 379, 649, 4, 5, 5185 },
- { 522, 649, 4, 5, 5185 },
- { 665, 649, 4, 5, 5185 },
- { 808, 649, 4, 5, 5185 },
- { 951, 649, 4, 5, 5185 },
- { 1094, 649, 4, 5, 5185 },
- { 1237, 649, 4, 5, 5185 },
- { 1380, 649, 4, 5, 5185 },
- { 1523, 649, 4, 5, 5185 },
- { 42, 649, 4, 5, 5185 },
- { 239, 649, 4, 5, 5185 },
- { 428, 649, 4, 5, 5185 },
- { 573, 649, 4, 5, 5185 },
- { 716, 649, 4, 5, 5185 },
- { 859, 649, 4, 5, 5185 },
- { 1002, 649, 4, 5, 5185 },
- { 1145, 649, 4, 5, 5185 },
- { 1288, 649, 4, 5, 5185 },
- { 1431, 649, 4, 5, 5185 },
- { 94, 649, 4, 5, 5185 },
- { 291, 649, 4, 5, 5185 },
- { 480, 649, 4, 5, 5185 },
- { 625, 649, 4, 5, 5185 },
- { 768, 649, 4, 5, 5185 },
- { 911, 649, 4, 5, 5185 },
- { 1054, 649, 4, 5, 5185 },
- { 1197, 649, 4, 5, 5185 },
- { 1340, 649, 4, 5, 5185 },
- { 1483, 649, 4, 5, 5185 },
- { 146, 649, 4, 5, 5185 },
- { 350, 416, 157, 7, 3537 },
- { 494, 416, 264, 7, 3537 },
- { 638, 416, 90, 7, 3537 },
- { 781, 416, 90, 7, 3537 },
- { 924, 416, 90, 7, 3537 },
- { 1067, 416, 90, 7, 3537 },
- { 1210, 416, 90, 7, 3537 },
- { 1353, 416, 90, 7, 3537 },
- { 1496, 416, 90, 7, 3537 },
- { 10, 416, 90, 7, 3537 },
- { 205, 416, 90, 7, 3537 },
- { 393, 416, 90, 7, 3537 },
- { 537, 416, 90, 7, 3537 },
- { 680, 416, 90, 7, 3537 },
- { 823, 416, 90, 7, 3537 },
- { 966, 416, 90, 7, 3537 },
- { 1109, 416, 90, 7, 3537 },
- { 1252, 416, 90, 7, 3537 },
- { 1395, 416, 90, 7, 3537 },
- { 58, 416, 90, 7, 3537 },
- { 255, 416, 90, 7, 3537 },
- { 444, 416, 90, 7, 3537 },
- { 589, 416, 90, 7, 3537 },
- { 732, 416, 90, 7, 3537 },
- { 875, 416, 90, 7, 3537 },
- { 1018, 416, 90, 7, 3537 },
- { 1161, 416, 90, 7, 3537 },
- { 1304, 416, 90, 7, 3537 },
- { 1447, 416, 90, 7, 3537 },
- { 110, 416, 90, 7, 3537 },
- { 307, 416, 90, 7, 3537 },
- { 161, 407, 90, 7, 4672 },
- { 367, 300, 173, 16, 1856 },
- { 510, 300, 280, 16, 3489 },
- { 653, 300, 102, 16, 3489 },
- { 796, 300, 102, 16, 3489 },
- { 939, 300, 102, 16, 3489 },
- { 1082, 300, 102, 16, 3489 },
- { 1225, 300, 102, 16, 3489 },
- { 1368, 300, 102, 16, 3489 },
- { 1511, 300, 102, 16, 3489 },
- { 27, 300, 102, 16, 3489 },
- { 223, 300, 102, 16, 3489 },
- { 412, 300, 102, 16, 3489 },
- { 557, 300, 102, 16, 3489 },
- { 700, 300, 102, 16, 3489 },
- { 843, 300, 102, 16, 3489 },
- { 986, 300, 102, 16, 3489 },
- { 1129, 300, 102, 16, 3489 },
- { 1272, 300, 102, 16, 3489 },
- { 1415, 300, 102, 16, 3489 },
- { 78, 300, 102, 16, 3489 },
- { 275, 300, 102, 16, 3489 },
- { 464, 300, 102, 16, 3489 },
- { 609, 300, 102, 16, 3489 },
- { 752, 300, 102, 16, 3489 },
- { 895, 300, 102, 16, 3489 },
- { 1038, 300, 102, 16, 3489 },
- { 1181, 300, 102, 16, 3489 },
- { 1324, 300, 102, 16, 3489 },
- { 1467, 300, 102, 16, 3489 },
- { 130, 300, 102, 16, 3489 },
- { 327, 300, 102, 16, 3489 },
- { 179, 312, 102, 16, 4672 },
- { 491, 188, 286, 28, 1793 },
- { 635, 188, 179, 28, 1793 },
- { 778, 188, 179, 28, 1793 },
- { 921, 188, 179, 28, 1793 },
- { 1064, 188, 179, 28, 1793 },
- { 1207, 188, 179, 28, 1793 },
- { 1350, 188, 179, 28, 1793 },
- { 1493, 188, 179, 28, 1793 },
- { 7, 188, 179, 28, 1793 },
- { 202, 188, 179, 28, 1793 },
- { 389, 188, 179, 28, 1793 },
- { 533, 188, 179, 28, 1793 },
- { 676, 188, 179, 28, 1793 },
- { 819, 188, 179, 28, 1793 },
- { 962, 188, 179, 28, 1793 },
- { 1105, 188, 179, 28, 1793 },
- { 1248, 188, 179, 28, 1793 },
- { 1391, 188, 179, 28, 1793 },
- { 54, 188, 179, 28, 1793 },
- { 251, 188, 179, 28, 1793 },
- { 440, 188, 179, 28, 1793 },
- { 585, 188, 179, 28, 1793 },
- { 728, 188, 179, 28, 1793 },
- { 871, 188, 179, 28, 1793 },
- { 1014, 188, 179, 28, 1793 },
- { 1157, 188, 179, 28, 1793 },
- { 1300, 188, 179, 28, 1793 },
- { 1443, 188, 179, 28, 1793 },
- { 106, 188, 179, 28, 1793 },
- { 303, 188, 179, 28, 1793 },
- { 157, 203, 179, 28, 2704 },
- { 346, 636, 179, 28, 4416 },
- { 507, 474, 295, 43, 768 },
- { 650, 474, 185, 43, 1729 },
- { 793, 474, 185, 43, 1729 },
- { 936, 474, 185, 43, 1729 },
- { 1079, 474, 185, 43, 1729 },
- { 1222, 474, 185, 43, 1729 },
- { 1365, 474, 185, 43, 1729 },
- { 1508, 474, 185, 43, 1729 },
- { 24, 474, 185, 43, 1729 },
- { 220, 474, 185, 43, 1729 },
- { 408, 474, 185, 43, 1729 },
- { 553, 474, 185, 43, 1729 },
- { 696, 474, 185, 43, 1729 },
- { 839, 474, 185, 43, 1729 },
- { 982, 474, 185, 43, 1729 },
- { 1125, 474, 185, 43, 1729 },
- { 1268, 474, 185, 43, 1729 },
- { 1411, 474, 185, 43, 1729 },
- { 74, 474, 185, 43, 1729 },
- { 271, 474, 185, 43, 1729 },
- { 460, 474, 185, 43, 1729 },
- { 605, 474, 185, 43, 1729 },
- { 748, 474, 185, 43, 1729 },
- { 891, 474, 185, 43, 1729 },
- { 1034, 474, 185, 43, 1729 },
- { 1177, 474, 185, 43, 1729 },
- { 1320, 474, 185, 43, 1729 },
- { 1463, 474, 185, 43, 1729 },
- { 126, 474, 185, 43, 1729 },
- { 323, 474, 185, 43, 1729 },
- { 175, 495, 185, 43, 2704 },
- { 363, 352, 185, 43, 4416 },
- { 632, 430, 298, 64, 689 },
- { 775, 430, 298, 64, 689 },
- { 918, 430, 298, 64, 689 },
- { 1061, 430, 298, 64, 689 },
- { 1204, 430, 298, 64, 689 },
- { 1347, 430, 298, 64, 689 },
- { 1490, 430, 298, 64, 689 },
- { 4, 430, 298, 64, 689 },
- { 199, 430, 298, 64, 689 },
- { 386, 430, 298, 64, 689 },
- { 529, 430, 298, 64, 689 },
- { 672, 430, 298, 64, 689 },
- { 815, 430, 298, 64, 689 },
- { 958, 430, 298, 64, 689 },
- { 1101, 430, 298, 64, 689 },
- { 1244, 430, 298, 64, 689 },
- { 1387, 430, 298, 64, 689 },
- { 50, 430, 298, 64, 689 },
- { 247, 430, 298, 64, 689 },
- { 436, 430, 298, 64, 689 },
- { 581, 430, 298, 64, 689 },
- { 724, 430, 298, 64, 689 },
- { 867, 430, 298, 64, 689 },
- { 1010, 430, 298, 64, 689 },
- { 1153, 430, 298, 64, 689 },
- { 1296, 430, 298, 64, 689 },
- { 1439, 430, 298, 64, 689 },
- { 102, 430, 298, 64, 689 },
- { 299, 430, 298, 64, 689 },
- { 153, 452, 298, 64, 1200 },
- { 342, 330, 298, 64, 2272 },
- { 487, 612, 298, 64, 3984 },
- { 647, 548, 4, 86, 0 },
- { 790, 548, 4, 86, 609 },
- { 933, 548, 4, 86, 609 },
- { 1076, 548, 4, 86, 609 },
- { 1219, 548, 4, 86, 609 },
- { 1362, 548, 4, 86, 609 },
- { 1505, 548, 4, 86, 609 },
- { 21, 548, 4, 86, 609 },
- { 217, 548, 4, 86, 609 },
- { 405, 548, 4, 86, 609 },
- { 549, 548, 4, 86, 609 },
- { 692, 548, 4, 86, 609 },
- { 835, 548, 4, 86, 609 },
- { 978, 548, 4, 86, 609 },
- { 1121, 548, 4, 86, 609 },
- { 1264, 548, 4, 86, 609 },
- { 1407, 548, 4, 86, 609 },
- { 70, 548, 4, 86, 609 },
- { 267, 548, 4, 86, 609 },
- { 456, 548, 4, 86, 609 },
- { 601, 548, 4, 86, 609 },
- { 744, 548, 4, 86, 609 },
- { 887, 548, 4, 86, 609 },
- { 1030, 548, 4, 86, 609 },
- { 1173, 548, 4, 86, 609 },
- { 1316, 548, 4, 86, 609 },
- { 1459, 548, 4, 86, 609 },
- { 122, 548, 4, 86, 609 },
- { 319, 548, 4, 86, 609 },
- { 171, 580, 4, 86, 1200 },
- { 359, 373, 4, 86, 2272 },
- { 503, 516, 4, 86, 3984 },
+ { 1518, 266, 4, 5, 10001 },
+ { 1525, 266, 4, 5, 10001 },
+ { 1536, 4, 4, 4, 10001 },
+ { 1522, 3, 4, 5, 3152 },
+ { 1521, 4, 625, 4, 3152 },
+ { 1528, 4, 3, 4, 3184 },
+ { 1532, 625, 4, 5, 3184 },
+ { 146, 4, 101, 4, 9969 },
+ { 335, 4, 146, 4, 9969 },
+ { 480, 4, 206, 4, 9969 },
+ { 625, 4, 68, 4, 9969 },
+ { 768, 4, 68, 4, 9969 },
+ { 911, 4, 68, 4, 9969 },
+ { 1054, 4, 68, 4, 9969 },
+ { 1197, 4, 68, 4, 9969 },
+ { 1340, 4, 68, 4, 9969 },
+ { 1479, 4, 68, 4, 9969 },
+ { 0, 4, 68, 4, 9969 },
+ { 191, 4, 68, 4, 9969 },
+ { 378, 4, 68, 4, 9969 },
+ { 521, 4, 68, 4, 9969 },
+ { 664, 4, 68, 4, 9969 },
+ { 807, 4, 68, 4, 9969 },
+ { 950, 4, 68, 4, 9969 },
+ { 1093, 4, 68, 4, 9969 },
+ { 1236, 4, 68, 4, 9969 },
+ { 1379, 4, 68, 4, 9969 },
+ { 46, 4, 68, 4, 9969 },
+ { 239, 4, 68, 4, 9969 },
+ { 428, 4, 68, 4, 9969 },
+ { 573, 4, 68, 4, 9969 },
+ { 716, 4, 68, 4, 9969 },
+ { 859, 4, 68, 4, 9969 },
+ { 1002, 4, 68, 4, 9969 },
+ { 1145, 4, 68, 4, 9969 },
+ { 1288, 4, 68, 4, 9969 },
+ { 1431, 4, 68, 4, 9969 },
+ { 98, 4, 68, 4, 9969 },
+ { 291, 4, 68, 4, 9969 },
+ { 161, 426, 104, 1, 9697 },
+ { 349, 426, 149, 1, 9697 },
+ { 493, 426, 209, 1, 9697 },
+ { 637, 426, 71, 1, 9697 },
+ { 780, 426, 71, 1, 9697 },
+ { 923, 426, 71, 1, 9697 },
+ { 1066, 426, 71, 1, 9697 },
+ { 1209, 426, 71, 1, 9697 },
+ { 1352, 426, 71, 1, 9697 },
+ { 1491, 426, 71, 1, 9697 },
+ { 13, 426, 71, 1, 9697 },
+ { 205, 426, 71, 1, 9697 },
+ { 393, 426, 71, 1, 9697 },
+ { 537, 426, 71, 1, 9697 },
+ { 680, 426, 71, 1, 9697 },
+ { 823, 426, 71, 1, 9697 },
+ { 966, 426, 71, 1, 9697 },
+ { 1109, 426, 71, 1, 9697 },
+ { 1252, 426, 71, 1, 9697 },
+ { 1395, 426, 71, 1, 9697 },
+ { 62, 426, 71, 1, 9697 },
+ { 255, 426, 71, 1, 9697 },
+ { 444, 426, 71, 1, 9697 },
+ { 589, 426, 71, 1, 9697 },
+ { 732, 426, 71, 1, 9697 },
+ { 875, 426, 71, 1, 9697 },
+ { 1018, 426, 71, 1, 9697 },
+ { 1161, 426, 71, 1, 9697 },
+ { 1304, 426, 71, 1, 9697 },
+ { 1447, 426, 71, 1, 9697 },
+ { 114, 426, 71, 1, 9697 },
+ { 307, 426, 71, 1, 9697 },
+ { 164, 428, 102, 3, 6705 },
+ { 352, 428, 147, 3, 6705 },
+ { 496, 428, 207, 3, 6705 },
+ { 640, 428, 69, 3, 6705 },
+ { 783, 428, 69, 3, 6705 },
+ { 926, 428, 69, 3, 6705 },
+ { 1069, 428, 69, 3, 6705 },
+ { 1212, 428, 69, 3, 6705 },
+ { 1355, 428, 69, 3, 6705 },
+ { 1494, 428, 69, 3, 6705 },
+ { 17, 428, 69, 3, 6705 },
+ { 209, 428, 69, 3, 6705 },
+ { 397, 428, 69, 3, 6705 },
+ { 541, 428, 69, 3, 6705 },
+ { 684, 428, 69, 3, 6705 },
+ { 827, 428, 69, 3, 6705 },
+ { 970, 428, 69, 3, 6705 },
+ { 1113, 428, 69, 3, 6705 },
+ { 1256, 428, 69, 3, 6705 },
+ { 1399, 428, 69, 3, 6705 },
+ { 66, 428, 69, 3, 6705 },
+ { 259, 428, 69, 3, 6705 },
+ { 448, 428, 69, 3, 6705 },
+ { 593, 428, 69, 3, 6705 },
+ { 736, 428, 69, 3, 6705 },
+ { 879, 428, 69, 3, 6705 },
+ { 1022, 428, 69, 3, 6705 },
+ { 1165, 428, 69, 3, 6705 },
+ { 1308, 428, 69, 3, 6705 },
+ { 1451, 428, 69, 3, 6705 },
+ { 118, 428, 69, 3, 6705 },
+ { 311, 428, 69, 3, 6705 },
+ { 179, 439, 124, 0, 4801 },
+ { 366, 439, 169, 0, 4801 },
+ { 509, 439, 229, 0, 4801 },
+ { 652, 439, 91, 0, 4801 },
+ { 795, 439, 91, 0, 4801 },
+ { 938, 439, 91, 0, 4801 },
+ { 1081, 439, 91, 0, 4801 },
+ { 1224, 439, 91, 0, 4801 },
+ { 1367, 439, 91, 0, 4801 },
+ { 1506, 439, 91, 0, 4801 },
+ { 30, 439, 91, 0, 4801 },
+ { 223, 439, 91, 0, 4801 },
+ { 412, 439, 91, 0, 4801 },
+ { 557, 439, 91, 0, 4801 },
+ { 700, 439, 91, 0, 4801 },
+ { 843, 439, 91, 0, 4801 },
+ { 986, 439, 91, 0, 4801 },
+ { 1129, 439, 91, 0, 4801 },
+ { 1272, 439, 91, 0, 4801 },
+ { 1415, 439, 91, 0, 4801 },
+ { 82, 439, 91, 0, 4801 },
+ { 275, 439, 91, 0, 4801 },
+ { 464, 439, 91, 0, 4801 },
+ { 609, 439, 91, 0, 4801 },
+ { 752, 439, 91, 0, 4801 },
+ { 895, 439, 91, 0, 4801 },
+ { 1038, 439, 91, 0, 4801 },
+ { 1181, 439, 91, 0, 4801 },
+ { 1324, 439, 91, 0, 4801 },
+ { 1467, 439, 91, 0, 4801 },
+ { 134, 439, 91, 0, 4801 },
+ { 327, 439, 91, 0, 4801 },
+ { 182, 427, 103, 2, 4769 },
+ { 369, 427, 148, 2, 4769 },
+ { 512, 427, 208, 2, 4769 },
+ { 655, 427, 70, 2, 4769 },
+ { 798, 427, 70, 2, 4769 },
+ { 941, 427, 70, 2, 4769 },
+ { 1084, 427, 70, 2, 4769 },
+ { 1227, 427, 70, 2, 4769 },
+ { 1370, 427, 70, 2, 4769 },
+ { 1509, 427, 70, 2, 4769 },
+ { 34, 427, 70, 2, 4769 },
+ { 227, 427, 70, 2, 4769 },
+ { 416, 427, 70, 2, 4769 },
+ { 561, 427, 70, 2, 4769 },
+ { 704, 427, 70, 2, 4769 },
+ { 847, 427, 70, 2, 4769 },
+ { 990, 427, 70, 2, 4769 },
+ { 1133, 427, 70, 2, 4769 },
+ { 1276, 427, 70, 2, 4769 },
+ { 1419, 427, 70, 2, 4769 },
+ { 86, 427, 70, 2, 4769 },
+ { 279, 427, 70, 2, 4769 },
+ { 468, 427, 70, 2, 4769 },
+ { 613, 427, 70, 2, 4769 },
+ { 756, 427, 70, 2, 4769 },
+ { 899, 427, 70, 2, 4769 },
+ { 1042, 427, 70, 2, 4769 },
+ { 1185, 427, 70, 2, 4769 },
+ { 1328, 427, 70, 2, 4769 },
+ { 1471, 427, 70, 2, 4769 },
+ { 138, 427, 70, 2, 4769 },
+ { 331, 427, 70, 2, 4769 },
+ { 185, 4, 256, 4, 4769 },
+ { 372, 4, 256, 4, 4769 },
+ { 515, 4, 256, 4, 4769 },
+ { 658, 4, 256, 4, 4769 },
+ { 801, 4, 256, 4, 4769 },
+ { 944, 4, 256, 4, 4769 },
+ { 1087, 4, 256, 4, 4769 },
+ { 1230, 4, 256, 4, 4769 },
+ { 1373, 4, 256, 4, 4769 },
+ { 1512, 4, 256, 4, 4769 },
+ { 38, 4, 256, 4, 4769 },
+ { 231, 4, 256, 4, 4769 },
+ { 420, 4, 256, 4, 4769 },
+ { 565, 4, 256, 4, 4769 },
+ { 708, 4, 256, 4, 4769 },
+ { 851, 4, 256, 4, 4769 },
+ { 994, 4, 256, 4, 4769 },
+ { 1137, 4, 256, 4, 4769 },
+ { 1280, 4, 256, 4, 4769 },
+ { 1423, 4, 256, 4, 4769 },
+ { 90, 4, 256, 4, 4769 },
+ { 283, 4, 256, 4, 4769 },
+ { 472, 4, 256, 4, 4769 },
+ { 617, 4, 256, 4, 4769 },
+ { 760, 4, 256, 4, 4769 },
+ { 903, 4, 256, 4, 4769 },
+ { 1046, 4, 256, 4, 4769 },
+ { 1189, 4, 256, 4, 4769 },
+ { 1332, 4, 256, 4, 4769 },
+ { 1475, 4, 294, 4, 4673 },
+ { 142, 4, 294, 4, 4673 },
+ { 188, 621, 4, 5, 4737 },
+ { 375, 621, 4, 5, 4737 },
+ { 518, 621, 4, 5, 4737 },
+ { 661, 621, 4, 5, 4737 },
+ { 804, 621, 4, 5, 4737 },
+ { 947, 621, 4, 5, 4737 },
+ { 1090, 621, 4, 5, 4737 },
+ { 1233, 621, 4, 5, 4737 },
+ { 1376, 621, 4, 5, 4737 },
+ { 1515, 621, 4, 5, 4737 },
+ { 42, 621, 4, 5, 4737 },
+ { 235, 621, 4, 5, 4737 },
+ { 424, 621, 4, 5, 4737 },
+ { 569, 621, 4, 5, 4737 },
+ { 712, 621, 4, 5, 4737 },
+ { 855, 621, 4, 5, 4737 },
+ { 998, 621, 4, 5, 4737 },
+ { 1141, 621, 4, 5, 4737 },
+ { 1284, 621, 4, 5, 4737 },
+ { 1427, 621, 4, 5, 4737 },
+ { 94, 621, 4, 5, 4737 },
+ { 287, 621, 4, 5, 4737 },
+ { 476, 621, 4, 5, 4737 },
+ { 621, 621, 4, 5, 4737 },
+ { 764, 621, 4, 5, 4737 },
+ { 907, 621, 4, 5, 4737 },
+ { 1050, 621, 4, 5, 4737 },
+ { 1193, 621, 4, 5, 4737 },
+ { 1336, 621, 4, 5, 4737 },
+ { 346, 430, 179, 7, 1041 },
+ { 490, 430, 243, 7, 1041 },
+ { 634, 430, 134, 7, 1041 },
+ { 777, 430, 134, 7, 1041 },
+ { 920, 430, 134, 7, 1041 },
+ { 1063, 430, 134, 7, 1041 },
+ { 1206, 430, 134, 7, 1041 },
+ { 1349, 430, 134, 7, 1041 },
+ { 1488, 430, 134, 7, 1041 },
+ { 10, 430, 134, 7, 1041 },
+ { 201, 430, 134, 7, 1041 },
+ { 389, 430, 134, 7, 1041 },
+ { 533, 430, 134, 7, 1041 },
+ { 676, 430, 134, 7, 1041 },
+ { 819, 430, 134, 7, 1041 },
+ { 962, 430, 134, 7, 1041 },
+ { 1105, 430, 134, 7, 1041 },
+ { 1248, 430, 134, 7, 1041 },
+ { 1391, 430, 134, 7, 1041 },
+ { 58, 430, 134, 7, 1041 },
+ { 251, 430, 134, 7, 1041 },
+ { 440, 430, 134, 7, 1041 },
+ { 585, 430, 134, 7, 1041 },
+ { 728, 430, 134, 7, 1041 },
+ { 871, 430, 134, 7, 1041 },
+ { 1014, 430, 134, 7, 1041 },
+ { 1157, 430, 134, 7, 1041 },
+ { 1300, 430, 134, 7, 1041 },
+ { 1443, 430, 134, 7, 1041 },
+ { 110, 430, 134, 7, 1041 },
+ { 303, 430, 134, 7, 1041 },
+ { 157, 421, 134, 7, 4080 },
+ { 628, 562, 264, 31, 81 },
+ { 771, 562, 264, 31, 81 },
+ { 914, 562, 264, 31, 81 },
+ { 1057, 562, 264, 31, 81 },
+ { 1200, 562, 264, 31, 81 },
+ { 1343, 562, 264, 31, 81 },
+ { 1482, 562, 264, 31, 81 },
+ { 4, 562, 264, 31, 81 },
+ { 195, 562, 264, 31, 81 },
+ { 382, 562, 264, 31, 81 },
+ { 525, 562, 264, 31, 81 },
+ { 668, 562, 264, 31, 81 },
+ { 811, 562, 264, 31, 81 },
+ { 954, 562, 264, 31, 81 },
+ { 1097, 562, 264, 31, 81 },
+ { 1240, 562, 264, 31, 81 },
+ { 1383, 562, 264, 31, 81 },
+ { 50, 562, 264, 31, 81 },
+ { 243, 562, 264, 31, 81 },
+ { 432, 562, 264, 31, 81 },
+ { 577, 562, 264, 31, 81 },
+ { 720, 562, 264, 31, 81 },
+ { 863, 562, 264, 31, 81 },
+ { 1006, 562, 264, 31, 81 },
+ { 1149, 562, 264, 31, 81 },
+ { 1292, 562, 264, 31, 81 },
+ { 1435, 562, 264, 31, 81 },
+ { 102, 562, 264, 31, 81 },
+ { 295, 562, 264, 31, 81 },
+ { 149, 584, 264, 31, 160 },
+ { 338, 397, 264, 31, 368 },
+ { 483, 540, 264, 31, 3216 },
+ { 487, 32, 258, 16, 305 },
+ { 631, 32, 191, 16, 305 },
+ { 774, 32, 191, 16, 305 },
+ { 917, 32, 191, 16, 305 },
+ { 1060, 32, 191, 16, 305 },
+ { 1203, 32, 191, 16, 305 },
+ { 1346, 32, 191, 16, 305 },
+ { 1485, 32, 191, 16, 305 },
+ { 7, 32, 191, 16, 305 },
+ { 198, 32, 191, 16, 305 },
+ { 385, 32, 191, 16, 305 },
+ { 529, 32, 191, 16, 305 },
+ { 672, 32, 191, 16, 305 },
+ { 815, 32, 191, 16, 305 },
+ { 958, 32, 191, 16, 305 },
+ { 1101, 32, 191, 16, 305 },
+ { 1244, 32, 191, 16, 305 },
+ { 1387, 32, 191, 16, 305 },
+ { 54, 32, 191, 16, 305 },
+ { 247, 32, 191, 16, 305 },
+ { 436, 32, 191, 16, 305 },
+ { 581, 32, 191, 16, 305 },
+ { 724, 32, 191, 16, 305 },
+ { 867, 32, 191, 16, 305 },
+ { 1010, 32, 191, 16, 305 },
+ { 1153, 32, 191, 16, 305 },
+ { 1296, 32, 191, 16, 305 },
+ { 1439, 32, 191, 16, 305 },
+ { 106, 32, 191, 16, 305 },
+ { 299, 32, 191, 16, 305 },
+ { 153, 47, 191, 16, 448 },
+ { 342, 608, 191, 16, 3824 },
+ { 363, 268, 185, 53, 993 },
+ { 506, 268, 249, 53, 993 },
+ { 649, 268, 140, 53, 993 },
+ { 792, 268, 140, 53, 993 },
+ { 935, 268, 140, 53, 993 },
+ { 1078, 268, 140, 53, 993 },
+ { 1221, 268, 140, 53, 993 },
+ { 1364, 268, 140, 53, 993 },
+ { 1503, 268, 140, 53, 993 },
+ { 27, 268, 140, 53, 993 },
+ { 219, 268, 140, 53, 993 },
+ { 408, 268, 140, 53, 993 },
+ { 553, 268, 140, 53, 993 },
+ { 696, 268, 140, 53, 993 },
+ { 839, 268, 140, 53, 993 },
+ { 982, 268, 140, 53, 993 },
+ { 1125, 268, 140, 53, 993 },
+ { 1268, 268, 140, 53, 993 },
+ { 1411, 268, 140, 53, 993 },
+ { 78, 268, 140, 53, 993 },
+ { 271, 268, 140, 53, 993 },
+ { 460, 268, 140, 53, 993 },
+ { 605, 268, 140, 53, 993 },
+ { 748, 268, 140, 53, 993 },
+ { 891, 268, 140, 53, 993 },
+ { 1034, 268, 140, 53, 993 },
+ { 1177, 268, 140, 53, 993 },
+ { 1320, 268, 140, 53, 993 },
+ { 1463, 268, 140, 53, 993 },
+ { 130, 268, 140, 53, 993 },
+ { 323, 268, 140, 53, 993 },
+ { 175, 280, 140, 53, 4080 },
+ { 643, 476, 4, 86, 1 },
+ { 786, 476, 4, 86, 1 },
+ { 929, 476, 4, 86, 1 },
+ { 1072, 476, 4, 86, 1 },
+ { 1215, 476, 4, 86, 1 },
+ { 1358, 476, 4, 86, 1 },
+ { 1497, 476, 4, 86, 1 },
+ { 21, 476, 4, 86, 1 },
+ { 213, 476, 4, 86, 1 },
+ { 401, 476, 4, 86, 1 },
+ { 545, 476, 4, 86, 1 },
+ { 688, 476, 4, 86, 1 },
+ { 831, 476, 4, 86, 1 },
+ { 974, 476, 4, 86, 1 },
+ { 1117, 476, 4, 86, 1 },
+ { 1260, 476, 4, 86, 1 },
+ { 1403, 476, 4, 86, 1 },
+ { 70, 476, 4, 86, 1 },
+ { 263, 476, 4, 86, 1 },
+ { 452, 476, 4, 86, 1 },
+ { 597, 476, 4, 86, 1 },
+ { 740, 476, 4, 86, 1 },
+ { 883, 476, 4, 86, 1 },
+ { 1026, 476, 4, 86, 1 },
+ { 1169, 476, 4, 86, 1 },
+ { 1312, 476, 4, 86, 1 },
+ { 1455, 476, 4, 86, 1 },
+ { 122, 476, 4, 86, 1 },
+ { 315, 476, 4, 86, 1 },
+ { 167, 508, 4, 86, 160 },
+ { 355, 365, 4, 86, 368 },
+ { 499, 444, 4, 86, 3216 },
+ { 503, 302, 261, 65, 241 },
+ { 646, 302, 88, 65, 241 },
+ { 789, 302, 88, 65, 241 },
+ { 932, 302, 88, 65, 241 },
+ { 1075, 302, 88, 65, 241 },
+ { 1218, 302, 88, 65, 241 },
+ { 1361, 302, 88, 65, 241 },
+ { 1500, 302, 88, 65, 241 },
+ { 24, 302, 88, 65, 241 },
+ { 216, 302, 88, 65, 241 },
+ { 404, 302, 88, 65, 241 },
+ { 549, 302, 88, 65, 241 },
+ { 692, 302, 88, 65, 241 },
+ { 835, 302, 88, 65, 241 },
+ { 978, 302, 88, 65, 241 },
+ { 1121, 302, 88, 65, 241 },
+ { 1264, 302, 88, 65, 241 },
+ { 1407, 302, 88, 65, 241 },
+ { 74, 302, 88, 65, 241 },
+ { 267, 302, 88, 65, 241 },
+ { 456, 302, 88, 65, 241 },
+ { 601, 302, 88, 65, 241 },
+ { 744, 302, 88, 65, 241 },
+ { 887, 302, 88, 65, 241 },
+ { 1030, 302, 88, 65, 241 },
+ { 1173, 302, 88, 65, 241 },
+ { 1316, 302, 88, 65, 241 },
+ { 1459, 302, 88, 65, 241 },
+ { 126, 302, 88, 65, 241 },
+ { 319, 302, 88, 65, 241 },
+ { 171, 323, 88, 65, 448 },
+ { 359, 344, 88, 65, 3824 },
};
// FPR8 Register Class...
- static uint16_t FPR8[] = {
+ static MCPhysReg FPR8[] = {
AArch64_B0, AArch64_B1, AArch64_B2, AArch64_B3, AArch64_B4, AArch64_B5, AArch64_B6, AArch64_B7, AArch64_B8, AArch64_B9, AArch64_B10, AArch64_B11, AArch64_B12, AArch64_B13, AArch64_B14, AArch64_B15, AArch64_B16, AArch64_B17, AArch64_B18, AArch64_B19, AArch64_B20, AArch64_B21, AArch64_B22, AArch64_B23, AArch64_B24, AArch64_B25, AArch64_B26, AArch64_B27, AArch64_B28, AArch64_B29, AArch64_B30, AArch64_B31,
};
// FPR8 Bit set.
static uint8_t FPR8Bits[] = {
- 0xc0, 0xff, 0xff, 0xff, 0x3f,
+ 0x00, 0xff, 0xff, 0xff, 0xff,
};
// FPR16 Register Class...
- static uint16_t FPR16[] = {
+ static MCPhysReg FPR16[] = {
AArch64_H0, AArch64_H1, AArch64_H2, AArch64_H3, AArch64_H4, AArch64_H5, AArch64_H6, AArch64_H7, AArch64_H8, AArch64_H9, AArch64_H10, AArch64_H11, AArch64_H12, AArch64_H13, AArch64_H14, AArch64_H15, AArch64_H16, AArch64_H17, AArch64_H18, AArch64_H19, AArch64_H20, AArch64_H21, AArch64_H22, AArch64_H23, AArch64_H24, AArch64_H25, AArch64_H26, AArch64_H27, AArch64_H28, AArch64_H29, AArch64_H30, AArch64_H31,
};
// FPR16 Bit set.
static uint8_t FPR16Bits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+ };
+
+ // GPR32all Register Class...
+ static MCPhysReg GPR32all[] = {
+ AArch64_W0, AArch64_W1, AArch64_W2, AArch64_W3, AArch64_W4, AArch64_W5, AArch64_W6, AArch64_W7, AArch64_W8, AArch64_W9, AArch64_W10, AArch64_W11, AArch64_W12, AArch64_W13, AArch64_W14, AArch64_W15, AArch64_W16, AArch64_W17, AArch64_W18, AArch64_W19, AArch64_W20, AArch64_W21, AArch64_W22, AArch64_W23, AArch64_W24, AArch64_W25, AArch64_W26, AArch64_W27, AArch64_W28, AArch64_W29, AArch64_W30, AArch64_WZR, AArch64_WSP,
+ };
+
+ // GPR32all Bit set.
+ static uint8_t GPR32allBits[] = {
+ 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f,
};
// FPR32 Register Class...
- static uint16_t FPR32[] = {
+ static MCPhysReg FPR32[] = {
AArch64_S0, AArch64_S1, AArch64_S2, AArch64_S3, AArch64_S4, AArch64_S5, AArch64_S6, AArch64_S7, AArch64_S8, AArch64_S9, AArch64_S10, AArch64_S11, AArch64_S12, AArch64_S13, AArch64_S14, AArch64_S15, AArch64_S16, AArch64_S17, AArch64_S18, AArch64_S19, AArch64_S20, AArch64_S21, AArch64_S22, AArch64_S23, AArch64_S24, AArch64_S25, AArch64_S26, AArch64_S27, AArch64_S28, AArch64_S29, AArch64_S30, AArch64_S31,
};
// FPR32 Bit set.
static uint8_t FPR32Bits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
};
// GPR32 Register Class...
- static uint16_t GPR32[] = {
+ static MCPhysReg GPR32[] = {
AArch64_W0, AArch64_W1, AArch64_W2, AArch64_W3, AArch64_W4, AArch64_W5, AArch64_W6, AArch64_W7, AArch64_W8, AArch64_W9, AArch64_W10, AArch64_W11, AArch64_W12, AArch64_W13, AArch64_W14, AArch64_W15, AArch64_W16, AArch64_W17, AArch64_W18, AArch64_W19, AArch64_W20, AArch64_W21, AArch64_W22, AArch64_W23, AArch64_W24, AArch64_W25, AArch64_W26, AArch64_W27, AArch64_W28, AArch64_W29, AArch64_W30, AArch64_WZR,
};
// GPR32 Bit set.
static uint8_t GPR32Bits[] = {
- 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f,
};
- // GPR32wsp Register Class...
- static uint16_t GPR32wsp[] = {
+ // GPR32sp Register Class...
+ static MCPhysReg GPR32sp[] = {
AArch64_W0, AArch64_W1, AArch64_W2, AArch64_W3, AArch64_W4, AArch64_W5, AArch64_W6, AArch64_W7, AArch64_W8, AArch64_W9, AArch64_W10, AArch64_W11, AArch64_W12, AArch64_W13, AArch64_W14, AArch64_W15, AArch64_W16, AArch64_W17, AArch64_W18, AArch64_W19, AArch64_W20, AArch64_W21, AArch64_W22, AArch64_W23, AArch64_W24, AArch64_W25, AArch64_W26, AArch64_W27, AArch64_W28, AArch64_W29, AArch64_W30, AArch64_WSP,
};
- // GPR32wsp Bit set.
- static uint8_t GPR32wspBits[] = {
- 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f,
+ // GPR32sp Bit set.
+ static uint8_t GPR32spBits[] = {
+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f,
};
- // GPR32nowzr Register Class...
- static uint16_t GPR32nowzr[] = {
+ // GPR32common Register Class...
+ static MCPhysReg GPR32common[] = {
AArch64_W0, AArch64_W1, AArch64_W2, AArch64_W3, AArch64_W4, AArch64_W5, AArch64_W6, AArch64_W7, AArch64_W8, AArch64_W9, AArch64_W10, AArch64_W11, AArch64_W12, AArch64_W13, AArch64_W14, AArch64_W15, AArch64_W16, AArch64_W17, AArch64_W18, AArch64_W19, AArch64_W20, AArch64_W21, AArch64_W22, AArch64_W23, AArch64_W24, AArch64_W25, AArch64_W26, AArch64_W27, AArch64_W28, AArch64_W29, AArch64_W30,
};
- // GPR32nowzr Bit set.
- static uint8_t GPR32nowzrBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f,
+ // GPR32common Bit set.
+ static uint8_t GPR32commonBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f,
};
- // FlagClass Register Class...
- static uint16_t FlagClass[] = {
+ // CCR Register Class...
+ static MCPhysReg CCR[] = {
AArch64_NZCV,
};
- // FlagClass Bit set.
- static uint8_t FlagClassBits[] = {
- 0x02,
+ // CCR Bit set.
+ static uint8_t CCRBits[] = {
+ 0x08,
};
- // Rwsp Register Class...
- static uint16_t Rwsp[] = {
+ // GPR32sponly Register Class...
+ static MCPhysReg GPR32sponly[] = {
AArch64_WSP,
};
- // Rwsp Bit set.
- static uint8_t RwspBits[] = {
- 0x04,
+ // GPR32sponly Bit set.
+ static uint8_t GPR32sponlyBits[] = {
+ 0x20,
+ };
+
+ // GPR64all Register Class...
+ static MCPhysReg GPR64all[] = {
+ AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_FP, AArch64_LR, AArch64_XZR, AArch64_SP,
+ };
+
+ // GPR64all Bit set.
+ static uint8_t GPR64allBits[] = {
+ 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f,
};
// FPR64 Register Class...
- static uint16_t FPR64[] = {
+ static MCPhysReg FPR64[] = {
AArch64_D0, AArch64_D1, AArch64_D2, AArch64_D3, AArch64_D4, AArch64_D5, AArch64_D6, AArch64_D7, AArch64_D8, AArch64_D9, AArch64_D10, AArch64_D11, AArch64_D12, AArch64_D13, AArch64_D14, AArch64_D15, AArch64_D16, AArch64_D17, AArch64_D18, AArch64_D19, AArch64_D20, AArch64_D21, AArch64_D22, AArch64_D23, AArch64_D24, AArch64_D25, AArch64_D26, AArch64_D27, AArch64_D28, AArch64_D29, AArch64_D30, AArch64_D31,
};
// FPR64 Bit set.
static uint8_t FPR64Bits[] = {
- 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
};
// GPR64 Register Class...
- static uint16_t GPR64[] = {
- AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_X29, AArch64_X30, AArch64_XZR,
+ static MCPhysReg GPR64[] = {
+ AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_FP, AArch64_LR, AArch64_XZR,
};
// GPR64 Bit set.
static uint8_t GPR64Bits[] = {
- 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x0f,
+ 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f,
};
- // GPR64xsp Register Class...
- static uint16_t GPR64xsp[] = {
- AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_X29, AArch64_X30, AArch64_XSP,
+ // GPR64sp Register Class...
+ static MCPhysReg GPR64sp[] = {
+ AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_FP, AArch64_LR, AArch64_SP,
};
- // GPR64xsp Bit set.
- static uint8_t GPR64xspBits[] = {
- 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x0f,
+ // GPR64sp Bit set.
+ static uint8_t GPR64spBits[] = {
+ 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f,
};
- // GPR64noxzr Register Class...
- static uint16_t GPR64noxzr[] = {
- AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_X29, AArch64_X30,
+ // GPR64common Register Class...
+ static MCPhysReg GPR64common[] = {
+ AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18, AArch64_X19, AArch64_X20, AArch64_X21, AArch64_X22, AArch64_X23, AArch64_X24, AArch64_X25, AArch64_X26, AArch64_X27, AArch64_X28, AArch64_FP, AArch64_LR,
};
- // GPR64noxzr Bit set.
- static uint8_t GPR64noxzrBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x0f,
+ // GPR64common Bit set.
+ static uint8_t GPR64commonBits[] = {
+ 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f,
};
// tcGPR64 Register Class...
- static uint16_t tcGPR64[] = {
- AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18,
+ static MCPhysReg tcGPR64[] = {
+ AArch64_X0, AArch64_X1, AArch64_X2, AArch64_X3, AArch64_X4, AArch64_X5, AArch64_X6, AArch64_X7, AArch64_X8, AArch64_X9, AArch64_X10, AArch64_X11, AArch64_X12, AArch64_X13, AArch64_X14, AArch64_X15, AArch64_X16, AArch64_X17, AArch64_X18,
};
// tcGPR64 Bit set.
static uint8_t tcGPR64Bits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xdf, 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x03,
};
- // FPR64Lo Register Class...
- static uint16_t FPR64Lo[] = {
- AArch64_D0, AArch64_D1, AArch64_D2, AArch64_D3, AArch64_D4, AArch64_D5, AArch64_D6, AArch64_D7, AArch64_D8, AArch64_D9, AArch64_D10, AArch64_D11, AArch64_D12, AArch64_D13, AArch64_D14, AArch64_D15,
+ // GPR64sponly Register Class...
+ static MCPhysReg GPR64sponly[] = {
+ AArch64_SP,
};
- // FPR64Lo Bit set.
- static uint8_t FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f,
- };
-
- // Rxsp Register Class...
- static uint16_t Rxsp[] = {
- AArch64_XSP,
- };
-
- // Rxsp Bit set.
- static uint8_t RxspBits[] = {
+ // GPR64sponly Bit set.
+ static uint8_t GPR64sponlyBits[] = {
0x10,
};
- // DPair Register Class...
- static uint16_t DPair[] = {
+ // DD Register Class...
+ static MCPhysReg DD[] = {
AArch64_D0_D1, AArch64_D1_D2, AArch64_D2_D3, AArch64_D3_D4, AArch64_D4_D5, AArch64_D5_D6, AArch64_D6_D7, AArch64_D7_D8, AArch64_D8_D9, AArch64_D9_D10, AArch64_D10_D11, AArch64_D11_D12, AArch64_D12_D13, AArch64_D13_D14, AArch64_D14_D15, AArch64_D15_D16, AArch64_D16_D17, AArch64_D17_D18, AArch64_D18_D19, AArch64_D19_D20, AArch64_D20_D21, AArch64_D21_D22, AArch64_D22_D23, AArch64_D23_D24, AArch64_D24_D25, AArch64_D25_D26, AArch64_D26_D27, AArch64_D27_D28, AArch64_D28_D29, AArch64_D29_D30, AArch64_D30_D31, AArch64_D31_D0,
};
- // DPair Bit set.
- static uint8_t DPairBits[] = {
+ // DD Bit set.
+ static uint8_t DDBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f,
};
- // DPair_with_dsub_0_in_FPR64Lo Register Class...
- static uint16_t DPair_with_dsub_0_in_FPR64Lo[] = {
- AArch64_D0_D1, AArch64_D1_D2, AArch64_D2_D3, AArch64_D3_D4, AArch64_D4_D5, AArch64_D5_D6, AArch64_D6_D7, AArch64_D7_D8, AArch64_D8_D9, AArch64_D9_D10, AArch64_D10_D11, AArch64_D11_D12, AArch64_D12_D13, AArch64_D13_D14, AArch64_D14_D15, AArch64_D15_D16,
- };
-
- // DPair_with_dsub_0_in_FPR64Lo Bit set.
- static uint8_t DPair_with_dsub_0_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f,
- };
-
- // DPair_with_dsub_1_in_FPR64Lo Register Class...
- static uint16_t DPair_with_dsub_1_in_FPR64Lo[] = {
- AArch64_D0_D1, AArch64_D1_D2, AArch64_D2_D3, AArch64_D3_D4, AArch64_D4_D5, AArch64_D5_D6, AArch64_D6_D7, AArch64_D7_D8, AArch64_D8_D9, AArch64_D9_D10, AArch64_D10_D11, AArch64_D11_D12, AArch64_D12_D13, AArch64_D13_D14, AArch64_D14_D15, AArch64_D31_D0,
- };
-
- // DPair_with_dsub_1_in_FPR64Lo Bit set.
- static uint8_t DPair_with_dsub_1_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08,
- };
-
- // DPair_with_dsub_0_in_FPR64Lo_and_DPair_with_dsub_1_in_FPR64Lo Register Class...
- static uint16_t DPair_with_dsub_0_in_FPR64Lo_and_DPair_with_dsub_1_in_FPR64Lo[] = {
- AArch64_D0_D1, AArch64_D1_D2, AArch64_D2_D3, AArch64_D3_D4, AArch64_D4_D5, AArch64_D5_D6, AArch64_D6_D7, AArch64_D7_D8, AArch64_D8_D9, AArch64_D9_D10, AArch64_D10_D11, AArch64_D11_D12, AArch64_D12_D13, AArch64_D13_D14, AArch64_D14_D15,
- };
-
- // DPair_with_dsub_0_in_FPR64Lo_and_DPair_with_dsub_1_in_FPR64Lo Bit set.
- static uint8_t DPair_with_dsub_0_in_FPR64Lo_and_DPair_with_dsub_1_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07,
- };
-
// FPR128 Register Class...
- static uint16_t FPR128[] = {
+ static MCPhysReg FPR128[] = {
AArch64_Q0, AArch64_Q1, AArch64_Q2, AArch64_Q3, AArch64_Q4, AArch64_Q5, AArch64_Q6, AArch64_Q7, AArch64_Q8, AArch64_Q9, AArch64_Q10, AArch64_Q11, AArch64_Q12, AArch64_Q13, AArch64_Q14, AArch64_Q15, AArch64_Q16, AArch64_Q17, AArch64_Q18, AArch64_Q19, AArch64_Q20, AArch64_Q21, AArch64_Q22, AArch64_Q23, AArch64_Q24, AArch64_Q25, AArch64_Q26, AArch64_Q27, AArch64_Q28, AArch64_Q29, AArch64_Q30, AArch64_Q31,
};
// FPR128 Bit set.
static uint8_t FPR128Bits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
};
- // FPR128Lo Register Class...
- static uint16_t FPR128Lo[] = {
+ // FPR128_lo Register Class...
+ static MCPhysReg FPR128_lo[] = {
AArch64_Q0, AArch64_Q1, AArch64_Q2, AArch64_Q3, AArch64_Q4, AArch64_Q5, AArch64_Q6, AArch64_Q7, AArch64_Q8, AArch64_Q9, AArch64_Q10, AArch64_Q11, AArch64_Q12, AArch64_Q13, AArch64_Q14, AArch64_Q15,
};
- // FPR128Lo Bit set.
- static uint8_t FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f,
+ // FPR128_lo Bit set.
+ static uint8_t FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff,
};
- // DTriple Register Class...
- static uint16_t DTriple[] = {
+ // DDD Register Class...
+ static MCPhysReg DDD[] = {
AArch64_D0_D1_D2, AArch64_D1_D2_D3, AArch64_D2_D3_D4, AArch64_D3_D4_D5, AArch64_D4_D5_D6, AArch64_D5_D6_D7, AArch64_D6_D7_D8, AArch64_D7_D8_D9, AArch64_D8_D9_D10, AArch64_D9_D10_D11, AArch64_D10_D11_D12, AArch64_D11_D12_D13, AArch64_D12_D13_D14, AArch64_D13_D14_D15, AArch64_D14_D15_D16, AArch64_D15_D16_D17, AArch64_D16_D17_D18, AArch64_D17_D18_D19, AArch64_D18_D19_D20, AArch64_D19_D20_D21, AArch64_D20_D21_D22, AArch64_D21_D22_D23, AArch64_D22_D23_D24, AArch64_D23_D24_D25, AArch64_D24_D25_D26, AArch64_D25_D26_D27, AArch64_D26_D27_D28, AArch64_D27_D28_D29, AArch64_D28_D29_D30, AArch64_D29_D30_D31, AArch64_D30_D31_D0, AArch64_D31_D0_D1,
};
- // DTriple Bit set.
- static uint8_t DTripleBits[] = {
+ // DDD Bit set.
+ static uint8_t DDDBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f,
};
- // DTriple_with_dsub_0_in_FPR64Lo Register Class...
- static uint16_t DTriple_with_dsub_0_in_FPR64Lo[] = {
- AArch64_D0_D1_D2, AArch64_D1_D2_D3, AArch64_D2_D3_D4, AArch64_D3_D4_D5, AArch64_D4_D5_D6, AArch64_D5_D6_D7, AArch64_D6_D7_D8, AArch64_D7_D8_D9, AArch64_D8_D9_D10, AArch64_D9_D10_D11, AArch64_D10_D11_D12, AArch64_D11_D12_D13, AArch64_D12_D13_D14, AArch64_D13_D14_D15, AArch64_D14_D15_D16, AArch64_D15_D16_D17,
- };
-
- // DTriple_with_dsub_0_in_FPR64Lo Bit set.
- static uint8_t DTriple_with_dsub_0_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f,
- };
-
- // DTriple_with_dsub_1_in_FPR64Lo Register Class...
- static uint16_t DTriple_with_dsub_1_in_FPR64Lo[] = {
- AArch64_D0_D1_D2, AArch64_D1_D2_D3, AArch64_D2_D3_D4, AArch64_D3_D4_D5, AArch64_D4_D5_D6, AArch64_D5_D6_D7, AArch64_D6_D7_D8, AArch64_D7_D8_D9, AArch64_D8_D9_D10, AArch64_D9_D10_D11, AArch64_D10_D11_D12, AArch64_D11_D12_D13, AArch64_D12_D13_D14, AArch64_D13_D14_D15, AArch64_D14_D15_D16, AArch64_D31_D0_D1,
- };
-
- // DTriple_with_dsub_1_in_FPR64Lo Bit set.
- static uint8_t DTriple_with_dsub_1_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08,
- };
-
- // DTriple_with_dsub_2_in_FPR64Lo Register Class...
- static uint16_t DTriple_with_dsub_2_in_FPR64Lo[] = {
- AArch64_D0_D1_D2, AArch64_D1_D2_D3, AArch64_D2_D3_D4, AArch64_D3_D4_D5, AArch64_D4_D5_D6, AArch64_D5_D6_D7, AArch64_D6_D7_D8, AArch64_D7_D8_D9, AArch64_D8_D9_D10, AArch64_D9_D10_D11, AArch64_D10_D11_D12, AArch64_D11_D12_D13, AArch64_D12_D13_D14, AArch64_D13_D14_D15, AArch64_D30_D31_D0, AArch64_D31_D0_D1,
- };
-
- // DTriple_with_dsub_2_in_FPR64Lo Bit set.
- static uint8_t DTriple_with_dsub_2_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c,
- };
-
- // DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_1_in_FPR64Lo Register Class...
- static uint16_t DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_1_in_FPR64Lo[] = {
- AArch64_D0_D1_D2, AArch64_D1_D2_D3, AArch64_D2_D3_D4, AArch64_D3_D4_D5, AArch64_D4_D5_D6, AArch64_D5_D6_D7, AArch64_D6_D7_D8, AArch64_D7_D8_D9, AArch64_D8_D9_D10, AArch64_D9_D10_D11, AArch64_D10_D11_D12, AArch64_D11_D12_D13, AArch64_D12_D13_D14, AArch64_D13_D14_D15, AArch64_D14_D15_D16,
- };
-
- // DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_1_in_FPR64Lo Bit set.
- static uint8_t DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_1_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07,
- };
-
- // DTriple_with_dsub_1_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64Lo Register Class...
- static uint16_t DTriple_with_dsub_1_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64Lo[] = {
- AArch64_D0_D1_D2, AArch64_D1_D2_D3, AArch64_D2_D3_D4, AArch64_D3_D4_D5, AArch64_D4_D5_D6, AArch64_D5_D6_D7, AArch64_D6_D7_D8, AArch64_D7_D8_D9, AArch64_D8_D9_D10, AArch64_D9_D10_D11, AArch64_D10_D11_D12, AArch64_D11_D12_D13, AArch64_D12_D13_D14, AArch64_D13_D14_D15, AArch64_D31_D0_D1,
- };
-
- // DTriple_with_dsub_1_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64Lo Bit set.
- static uint8_t DTriple_with_dsub_1_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08,
- };
-
- // DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64Lo Register Class...
- static uint16_t DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64Lo[] = {
- AArch64_D0_D1_D2, AArch64_D1_D2_D3, AArch64_D2_D3_D4, AArch64_D3_D4_D5, AArch64_D4_D5_D6, AArch64_D5_D6_D7, AArch64_D6_D7_D8, AArch64_D7_D8_D9, AArch64_D8_D9_D10, AArch64_D9_D10_D11, AArch64_D10_D11_D12, AArch64_D11_D12_D13, AArch64_D12_D13_D14, AArch64_D13_D14_D15,
- };
-
- // DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64Lo Bit set.
- static uint8_t DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03,
- };
-
- // DQuad Register Class...
- static uint16_t DQuad[] = {
+ // DDDD Register Class...
+ static MCPhysReg DDDD[] = {
AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D13_D14_D15_D16, AArch64_D14_D15_D16_D17, AArch64_D15_D16_D17_D18, AArch64_D16_D17_D18_D19, AArch64_D17_D18_D19_D20, AArch64_D18_D19_D20_D21, AArch64_D19_D20_D21_D22, AArch64_D20_D21_D22_D23, AArch64_D21_D22_D23_D24, AArch64_D22_D23_D24_D25, AArch64_D23_D24_D25_D26, AArch64_D24_D25_D26_D27, AArch64_D25_D26_D27_D28, AArch64_D26_D27_D28_D29, AArch64_D27_D28_D29_D30, AArch64_D28_D29_D30_D31, AArch64_D29_D30_D31_D0, AArch64_D30_D31_D0_D1, AArch64_D31_D0_D1_D2,
};
- // DQuad Bit set.
- static uint8_t DQuadBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f,
- };
-
- // DQuad_with_dsub_0_in_FPR64Lo Register Class...
- static uint16_t DQuad_with_dsub_0_in_FPR64Lo[] = {
- AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D13_D14_D15_D16, AArch64_D14_D15_D16_D17, AArch64_D15_D16_D17_D18,
- };
-
- // DQuad_with_dsub_0_in_FPR64Lo Bit set.
- static uint8_t DQuad_with_dsub_0_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f,
- };
-
- // DQuad_with_dsub_1_in_FPR64Lo Register Class...
- static uint16_t DQuad_with_dsub_1_in_FPR64Lo[] = {
- AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D13_D14_D15_D16, AArch64_D14_D15_D16_D17, AArch64_D31_D0_D1_D2,
- };
-
- // DQuad_with_dsub_1_in_FPR64Lo Bit set.
- static uint8_t DQuad_with_dsub_1_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08,
- };
-
- // DQuad_with_dsub_2_in_FPR64Lo Register Class...
- static uint16_t DQuad_with_dsub_2_in_FPR64Lo[] = {
- AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D13_D14_D15_D16, AArch64_D30_D31_D0_D1, AArch64_D31_D0_D1_D2,
- };
-
- // DQuad_with_dsub_2_in_FPR64Lo Bit set.
- static uint8_t DQuad_with_dsub_2_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c,
- };
-
- // DQuad_with_dsub_3_in_FPR64Lo Register Class...
- static uint16_t DQuad_with_dsub_3_in_FPR64Lo[] = {
- AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D29_D30_D31_D0, AArch64_D30_D31_D0_D1, AArch64_D31_D0_D1_D2,
- };
-
- // DQuad_with_dsub_3_in_FPR64Lo Bit set.
- static uint8_t DQuad_with_dsub_3_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0e,
- };
-
- // DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_1_in_FPR64Lo Register Class...
- static uint16_t DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_1_in_FPR64Lo[] = {
- AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D13_D14_D15_D16, AArch64_D14_D15_D16_D17,
- };
-
- // DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_1_in_FPR64Lo Bit set.
- static uint8_t DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_1_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07,
- };
-
- // DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64Lo Register Class...
- static uint16_t DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64Lo[] = {
- AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D13_D14_D15_D16, AArch64_D31_D0_D1_D2,
- };
-
- // DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64Lo Bit set.
- static uint8_t DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08,
- };
-
- // DQuad_with_dsub_2_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo Register Class...
- static uint16_t DQuad_with_dsub_2_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo[] = {
- AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D30_D31_D0_D1, AArch64_D31_D0_D1_D2,
- };
-
- // DQuad_with_dsub_2_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo Bit set.
- static uint8_t DQuad_with_dsub_2_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0c,
- };
-
- // DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64Lo Register Class...
- static uint16_t DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64Lo[] = {
- AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D13_D14_D15_D16,
- };
-
- // DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64Lo Bit set.
- static uint8_t DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03,
- };
-
- // DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo Register Class...
- static uint16_t DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo[] = {
- AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15, AArch64_D31_D0_D1_D2,
- };
-
- // DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo Bit set.
- static uint8_t DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x08,
- };
-
- // DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo Register Class...
- static uint16_t DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo[] = {
- AArch64_D0_D1_D2_D3, AArch64_D1_D2_D3_D4, AArch64_D2_D3_D4_D5, AArch64_D3_D4_D5_D6, AArch64_D4_D5_D6_D7, AArch64_D5_D6_D7_D8, AArch64_D6_D7_D8_D9, AArch64_D7_D8_D9_D10, AArch64_D8_D9_D10_D11, AArch64_D9_D10_D11_D12, AArch64_D10_D11_D12_D13, AArch64_D11_D12_D13_D14, AArch64_D12_D13_D14_D15,
- };
-
- // DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo Bit set.
- static uint8_t DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01,
- };
-
- // QPair Register Class...
- static uint16_t QPair[] = {
- AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q15_Q16, AArch64_Q16_Q17, AArch64_Q17_Q18, AArch64_Q18_Q19, AArch64_Q19_Q20, AArch64_Q20_Q21, AArch64_Q21_Q22, AArch64_Q22_Q23, AArch64_Q23_Q24, AArch64_Q24_Q25, AArch64_Q25_Q26, AArch64_Q26_Q27, AArch64_Q27_Q28, AArch64_Q28_Q29, AArch64_Q29_Q30, AArch64_Q30_Q31, AArch64_Q31_Q0,
- };
-
- // QPair Bit set.
- static uint8_t QPairBits[] = {
+ // DDDD Bit set.
+ static uint8_t DDDDBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f,
};
- // QPair_with_qsub_0_in_FPR128Lo Register Class...
- static uint16_t QPair_with_qsub_0_in_FPR128Lo[] = {
- AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q15_Q16,
+ // QQ Register Class...
+ static MCPhysReg QQ[] = {
+ AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q15_Q16, AArch64_Q16_Q17, AArch64_Q17_Q18, AArch64_Q18_Q19, AArch64_Q19_Q20, AArch64_Q20_Q21, AArch64_Q21_Q22, AArch64_Q22_Q23, AArch64_Q23_Q24, AArch64_Q24_Q25, AArch64_Q25_Q26, AArch64_Q26_Q27, AArch64_Q27_Q28, AArch64_Q28_Q29, AArch64_Q29_Q30, AArch64_Q30_Q31, AArch64_Q31_Q0,
};
- // QPair_with_qsub_0_in_FPR128Lo Bit set.
- static uint8_t QPair_with_qsub_0_in_FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f,
- };
-
- // QPair_with_qsub_1_in_FPR128Lo Register Class...
- static uint16_t QPair_with_qsub_1_in_FPR128Lo[] = {
- AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q31_Q0,
- };
-
- // QPair_with_qsub_1_in_FPR128Lo Bit set.
- static uint8_t QPair_with_qsub_1_in_FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08,
- };
-
- // QPair_with_qsub_0_in_FPR128Lo_and_QPair_with_qsub_1_in_FPR128Lo Register Class...
- static uint16_t QPair_with_qsub_0_in_FPR128Lo_and_QPair_with_qsub_1_in_FPR128Lo[] = {
- AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15,
- };
-
- // QPair_with_qsub_0_in_FPR128Lo_and_QPair_with_qsub_1_in_FPR128Lo Bit set.
- static uint8_t QPair_with_qsub_0_in_FPR128Lo_and_QPair_with_qsub_1_in_FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07,
- };
-
- // QTriple Register Class...
- static uint16_t QTriple[] = {
- AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, AArch64_Q15_Q16_Q17, AArch64_Q16_Q17_Q18, AArch64_Q17_Q18_Q19, AArch64_Q18_Q19_Q20, AArch64_Q19_Q20_Q21, AArch64_Q20_Q21_Q22, AArch64_Q21_Q22_Q23, AArch64_Q22_Q23_Q24, AArch64_Q23_Q24_Q25, AArch64_Q24_Q25_Q26, AArch64_Q25_Q26_Q27, AArch64_Q26_Q27_Q28, AArch64_Q27_Q28_Q29, AArch64_Q28_Q29_Q30, AArch64_Q29_Q30_Q31, AArch64_Q30_Q31_Q0, AArch64_Q31_Q0_Q1,
- };
-
- // QTriple Bit set.
- static uint8_t QTripleBits[] = {
+ // QQ Bit set.
+ static uint8_t QQBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f,
};
- // QTriple_with_qsub_0_in_FPR128Lo Register Class...
- static uint16_t QTriple_with_qsub_0_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, AArch64_Q15_Q16_Q17,
+ // QQ_with_qsub0_in_FPR128_lo Register Class...
+ static MCPhysReg QQ_with_qsub0_in_FPR128_lo[] = {
+ AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q15_Q16,
};
- // QTriple_with_qsub_0_in_FPR128Lo Bit set.
- static uint8_t QTriple_with_qsub_0_in_FPR128LoBits[] = {
+ // QQ_with_qsub0_in_FPR128_lo Bit set.
+ static uint8_t QQ_with_qsub0_in_FPR128_loBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f,
};
- // QTriple_with_qsub_1_in_FPR128Lo Register Class...
- static uint16_t QTriple_with_qsub_1_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, AArch64_Q31_Q0_Q1,
+ // QQ_with_qsub1_in_FPR128_lo Register Class...
+ static MCPhysReg QQ_with_qsub1_in_FPR128_lo[] = {
+ AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15, AArch64_Q31_Q0,
};
- // QTriple_with_qsub_1_in_FPR128Lo Bit set.
- static uint8_t QTriple_with_qsub_1_in_FPR128LoBits[] = {
+ // QQ_with_qsub1_in_FPR128_lo Bit set.
+ static uint8_t QQ_with_qsub1_in_FPR128_loBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08,
};
- // QTriple_with_qsub_2_in_FPR128Lo Register Class...
- static uint16_t QTriple_with_qsub_2_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q30_Q31_Q0, AArch64_Q31_Q0_Q1,
+ // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo Register Class...
+ static MCPhysReg QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo[] = {
+ AArch64_Q0_Q1, AArch64_Q1_Q2, AArch64_Q2_Q3, AArch64_Q3_Q4, AArch64_Q4_Q5, AArch64_Q5_Q6, AArch64_Q6_Q7, AArch64_Q7_Q8, AArch64_Q8_Q9, AArch64_Q9_Q10, AArch64_Q10_Q11, AArch64_Q11_Q12, AArch64_Q12_Q13, AArch64_Q13_Q14, AArch64_Q14_Q15,
};
- // QTriple_with_qsub_2_in_FPR128Lo Bit set.
- static uint8_t QTriple_with_qsub_2_in_FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c,
- };
-
- // QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_1_in_FPR128Lo Register Class...
- static uint16_t QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_1_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16,
- };
-
- // QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_1_in_FPR128Lo Bit set.
- static uint8_t QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_1_in_FPR128LoBits[] = {
+ // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo Bit set.
+ static uint8_t QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07,
};
- // QTriple_with_qsub_1_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128Lo Register Class...
- static uint16_t QTriple_with_qsub_1_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q31_Q0_Q1,
+ // QQQ Register Class...
+ static MCPhysReg QQQ[] = {
+ AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, AArch64_Q15_Q16_Q17, AArch64_Q16_Q17_Q18, AArch64_Q17_Q18_Q19, AArch64_Q18_Q19_Q20, AArch64_Q19_Q20_Q21, AArch64_Q20_Q21_Q22, AArch64_Q21_Q22_Q23, AArch64_Q22_Q23_Q24, AArch64_Q23_Q24_Q25, AArch64_Q24_Q25_Q26, AArch64_Q25_Q26_Q27, AArch64_Q26_Q27_Q28, AArch64_Q27_Q28_Q29, AArch64_Q28_Q29_Q30, AArch64_Q29_Q30_Q31, AArch64_Q30_Q31_Q0, AArch64_Q31_Q0_Q1,
};
- // QTriple_with_qsub_1_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128Lo Bit set.
- static uint8_t QTriple_with_qsub_1_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08,
- };
-
- // QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128Lo Register Class...
- static uint16_t QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15,
- };
-
- // QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128Lo Bit set.
- static uint8_t QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03,
- };
-
- // QQuad Register Class...
- static uint16_t QQuad[] = {
- AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, AArch64_Q15_Q16_Q17_Q18, AArch64_Q16_Q17_Q18_Q19, AArch64_Q17_Q18_Q19_Q20, AArch64_Q18_Q19_Q20_Q21, AArch64_Q19_Q20_Q21_Q22, AArch64_Q20_Q21_Q22_Q23, AArch64_Q21_Q22_Q23_Q24, AArch64_Q22_Q23_Q24_Q25, AArch64_Q23_Q24_Q25_Q26, AArch64_Q24_Q25_Q26_Q27, AArch64_Q25_Q26_Q27_Q28, AArch64_Q26_Q27_Q28_Q29, AArch64_Q27_Q28_Q29_Q30, AArch64_Q28_Q29_Q30_Q31, AArch64_Q29_Q30_Q31_Q0, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2,
- };
-
- // QQuad Bit set.
- static uint8_t QQuadBits[] = {
+ // QQQ Bit set.
+ static uint8_t QQQBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f,
};
- // QQuad_with_qsub_0_in_FPR128Lo Register Class...
- static uint16_t QQuad_with_qsub_0_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, AArch64_Q15_Q16_Q17_Q18,
+ // QQQ_with_qsub0_in_FPR128_lo Register Class...
+ static MCPhysReg QQQ_with_qsub0_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, AArch64_Q15_Q16_Q17,
};
- // QQuad_with_qsub_0_in_FPR128Lo Bit set.
- static uint8_t QQuad_with_qsub_0_in_FPR128LoBits[] = {
+ // QQQ_with_qsub0_in_FPR128_lo Bit set.
+ static uint8_t QQQ_with_qsub0_in_FPR128_loBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f,
};
- // QQuad_with_qsub_1_in_FPR128Lo Register Class...
- static uint16_t QQuad_with_qsub_1_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, AArch64_Q31_Q0_Q1_Q2,
+ // QQQ_with_qsub1_in_FPR128_lo Register Class...
+ static MCPhysReg QQQ_with_qsub1_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16, AArch64_Q31_Q0_Q1,
};
- // QQuad_with_qsub_1_in_FPR128Lo Bit set.
- static uint8_t QQuad_with_qsub_1_in_FPR128LoBits[] = {
+ // QQQ_with_qsub1_in_FPR128_lo Bit set.
+ static uint8_t QQQ_with_qsub1_in_FPR128_loBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08,
};
- // QQuad_with_qsub_2_in_FPR128Lo Register Class...
- static uint16_t QQuad_with_qsub_2_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2,
+ // QQQ_with_qsub2_in_FPR128_lo Register Class...
+ static MCPhysReg QQQ_with_qsub2_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q30_Q31_Q0, AArch64_Q31_Q0_Q1,
};
- // QQuad_with_qsub_2_in_FPR128Lo Bit set.
- static uint8_t QQuad_with_qsub_2_in_FPR128LoBits[] = {
+ // QQQ_with_qsub2_in_FPR128_lo Bit set.
+ static uint8_t QQQ_with_qsub2_in_FPR128_loBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c,
};
- // QQuad_with_qsub_3_in_FPR128Lo Register Class...
- static uint16_t QQuad_with_qsub_3_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q29_Q30_Q31_Q0, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2,
+ // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo Register Class...
+ static MCPhysReg QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q14_Q15_Q16,
};
- // QQuad_with_qsub_3_in_FPR128Lo Bit set.
- static uint8_t QQuad_with_qsub_3_in_FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0e,
- };
-
- // QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_1_in_FPR128Lo Register Class...
- static uint16_t QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_1_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17,
- };
-
- // QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_1_in_FPR128Lo Bit set.
- static uint8_t QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_1_in_FPR128LoBits[] = {
+ // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo Bit set.
+ static uint8_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07,
};
- // QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128Lo Register Class...
- static uint16_t QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q31_Q0_Q1_Q2,
+ // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Register Class...
+ static MCPhysReg QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15, AArch64_Q31_Q0_Q1,
};
- // QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128Lo Bit set.
- static uint8_t QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128LoBits[] = {
+ // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Bit set.
+ static uint8_t QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08,
};
- // QQuad_with_qsub_2_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo Register Class...
- static uint16_t QQuad_with_qsub_2_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2,
+ // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Register Class...
+ static MCPhysReg QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2, AArch64_Q1_Q2_Q3, AArch64_Q2_Q3_Q4, AArch64_Q3_Q4_Q5, AArch64_Q4_Q5_Q6, AArch64_Q5_Q6_Q7, AArch64_Q6_Q7_Q8, AArch64_Q7_Q8_Q9, AArch64_Q8_Q9_Q10, AArch64_Q9_Q10_Q11, AArch64_Q10_Q11_Q12, AArch64_Q11_Q12_Q13, AArch64_Q12_Q13_Q14, AArch64_Q13_Q14_Q15,
};
- // QQuad_with_qsub_2_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo Bit set.
- static uint8_t QQuad_with_qsub_2_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0c,
- };
-
- // QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128Lo Register Class...
- static uint16_t QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128Lo[] = {
- AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16,
- };
-
- // QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128Lo Bit set.
- static uint8_t QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128LoBits[] = {
+ // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Bit set.
+ static uint8_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03,
};
- // QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo Register Class...
- static uint16_t QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo[] = {
+ // QQQQ Register Class...
+ static MCPhysReg QQQQ[] = {
+ AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, AArch64_Q15_Q16_Q17_Q18, AArch64_Q16_Q17_Q18_Q19, AArch64_Q17_Q18_Q19_Q20, AArch64_Q18_Q19_Q20_Q21, AArch64_Q19_Q20_Q21_Q22, AArch64_Q20_Q21_Q22_Q23, AArch64_Q21_Q22_Q23_Q24, AArch64_Q22_Q23_Q24_Q25, AArch64_Q23_Q24_Q25_Q26, AArch64_Q24_Q25_Q26_Q27, AArch64_Q25_Q26_Q27_Q28, AArch64_Q26_Q27_Q28_Q29, AArch64_Q27_Q28_Q29_Q30, AArch64_Q28_Q29_Q30_Q31, AArch64_Q29_Q30_Q31_Q0, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2,
+ };
+
+ // QQQQ Bit set.
+ static uint8_t QQQQBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f,
+ };
+
+ // QQQQ_with_qsub0_in_FPR128_lo Register Class...
+ static MCPhysReg QQQQ_with_qsub0_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, AArch64_Q15_Q16_Q17_Q18,
+ };
+
+ // QQQQ_with_qsub0_in_FPR128_lo Bit set.
+ static uint8_t QQQQ_with_qsub0_in_FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f,
+ };
+
+ // QQQQ_with_qsub1_in_FPR128_lo Register Class...
+ static MCPhysReg QQQQ_with_qsub1_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17, AArch64_Q31_Q0_Q1_Q2,
+ };
+
+ // QQQQ_with_qsub1_in_FPR128_lo Bit set.
+ static uint8_t QQQQ_with_qsub1_in_FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08,
+ };
+
+ // QQQQ_with_qsub2_in_FPR128_lo Register Class...
+ static MCPhysReg QQQQ_with_qsub2_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2,
+ };
+
+ // QQQQ_with_qsub2_in_FPR128_lo Bit set.
+ static uint8_t QQQQ_with_qsub2_in_FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c,
+ };
+
+ // QQQQ_with_qsub3_in_FPR128_lo Register Class...
+ static MCPhysReg QQQQ_with_qsub3_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q29_Q30_Q31_Q0, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2,
+ };
+
+ // QQQQ_with_qsub3_in_FPR128_lo Bit set.
+ static uint8_t QQQQ_with_qsub3_in_FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0e,
+ };
+
+ // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo Register Class...
+ static MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q14_Q15_Q16_Q17,
+ };
+
+ // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo Bit set.
+ static uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07,
+ };
+
+ // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Register Class...
+ static MCPhysReg QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16, AArch64_Q31_Q0_Q1_Q2,
+ };
+
+ // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Bit set.
+ static uint8_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08,
+ };
+
+ // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class...
+ static MCPhysReg QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q30_Q31_Q0_Q1, AArch64_Q31_Q0_Q1_Q2,
+ };
+
+ // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set.
+ static uint8_t QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0c,
+ };
+
+ // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Register Class...
+ static MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo[] = {
+ AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q13_Q14_Q15_Q16,
+ };
+
+ // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Bit set.
+ static uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03,
+ };
+
+ // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class...
+ static MCPhysReg QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = {
AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15, AArch64_Q31_Q0_Q1_Q2,
};
- // QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo Bit set.
- static uint8_t QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x08,
+ // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set.
+ static uint8_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x08,
};
- // QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo Register Class...
- static uint16_t QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo[] = {
+ // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class...
+ static MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = {
AArch64_Q0_Q1_Q2_Q3, AArch64_Q1_Q2_Q3_Q4, AArch64_Q2_Q3_Q4_Q5, AArch64_Q3_Q4_Q5_Q6, AArch64_Q4_Q5_Q6_Q7, AArch64_Q5_Q6_Q7_Q8, AArch64_Q6_Q7_Q8_Q9, AArch64_Q7_Q8_Q9_Q10, AArch64_Q8_Q9_Q10_Q11, AArch64_Q9_Q10_Q11_Q12, AArch64_Q10_Q11_Q12_Q13, AArch64_Q11_Q12_Q13_Q14, AArch64_Q12_Q13_Q14_Q15,
};
- // QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo Bit set.
- static uint8_t QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoBits[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01,
+ // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set.
+ static uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01,
};
static MCRegisterClass AArch64MCRegisterClasses[] = {
{ "FPR8", FPR8, FPR8Bits, 32, sizeof(FPR8Bits), AArch64_FPR8RegClassID, 1, 1, 1, 1 },
{ "FPR16", FPR16, FPR16Bits, 32, sizeof(FPR16Bits), AArch64_FPR16RegClassID, 2, 2, 1, 1 },
+ { "GPR32all", GPR32all, GPR32allBits, 33, sizeof(GPR32allBits), AArch64_GPR32allRegClassID, 4, 4, 1, 1 },
{ "FPR32", FPR32, FPR32Bits, 32, sizeof(FPR32Bits), AArch64_FPR32RegClassID, 4, 4, 1, 1 },
{ "GPR32", GPR32, GPR32Bits, 32, sizeof(GPR32Bits), AArch64_GPR32RegClassID, 4, 4, 1, 1 },
- { "GPR32wsp", GPR32wsp, GPR32wspBits, 32, sizeof(GPR32wspBits), AArch64_GPR32wspRegClassID, 4, 4, 1, 1 },
- { "GPR32nowzr", GPR32nowzr, GPR32nowzrBits, 31, sizeof(GPR32nowzrBits), AArch64_GPR32nowzrRegClassID, 4, 4, 1, 1 },
- { "FlagClass", FlagClass, FlagClassBits, 1, sizeof(FlagClassBits), AArch64_FlagClassRegClassID, 4, 4, -1, 0 },
- { "Rwsp", Rwsp, RwspBits, 1, sizeof(RwspBits), AArch64_RwspRegClassID, 4, 4, 1, 1 },
+ { "GPR32sp", GPR32sp, GPR32spBits, 32, sizeof(GPR32spBits), AArch64_GPR32spRegClassID, 4, 4, 1, 1 },
+ { "GPR32common", GPR32common, GPR32commonBits, 31, sizeof(GPR32commonBits), AArch64_GPR32commonRegClassID, 4, 4, 1, 1 },
+ { "CCR", CCR, CCRBits, 1, sizeof(CCRBits), AArch64_CCRRegClassID, 4, 4, -1, 0 },
+ { "GPR32sponly", GPR32sponly, GPR32sponlyBits, 1, sizeof(GPR32sponlyBits), AArch64_GPR32sponlyRegClassID, 4, 4, 1, 1 },
+ { "GPR64all", GPR64all, GPR64allBits, 33, sizeof(GPR64allBits), AArch64_GPR64allRegClassID, 8, 8, 1, 1 },
{ "FPR64", FPR64, FPR64Bits, 32, sizeof(FPR64Bits), AArch64_FPR64RegClassID, 8, 8, 1, 1 },
{ "GPR64", GPR64, GPR64Bits, 32, sizeof(GPR64Bits), AArch64_GPR64RegClassID, 8, 8, 1, 1 },
- { "GPR64xsp", GPR64xsp, GPR64xspBits, 32, sizeof(GPR64xspBits), AArch64_GPR64xspRegClassID, 8, 8, 1, 1 },
- { "GPR64noxzr", GPR64noxzr, GPR64noxzrBits, 31, sizeof(GPR64noxzrBits), AArch64_GPR64noxzrRegClassID, 8, 8, 1, 1 },
- { "tcGPR64", tcGPR64, tcGPR64Bits, 18, sizeof(tcGPR64Bits), AArch64_tcGPR64RegClassID, 8, 8, 1, 1 },
- { "FPR64Lo", FPR64Lo, FPR64LoBits, 16, sizeof(FPR64LoBits), AArch64_FPR64LoRegClassID, 8, 8, 1, 1 },
- { "Rxsp", Rxsp, RxspBits, 1, sizeof(RxspBits), AArch64_RxspRegClassID, 8, 8, 1, 1 },
- { "DPair", DPair, DPairBits, 32, sizeof(DPairBits), AArch64_DPairRegClassID, 16, 8, 1, 1 },
- { "DPair_with_dsub_0_in_FPR64Lo", DPair_with_dsub_0_in_FPR64Lo, DPair_with_dsub_0_in_FPR64LoBits, 16, sizeof(DPair_with_dsub_0_in_FPR64LoBits), AArch64_DPair_with_dsub_0_in_FPR64LoRegClassID, 16, 8, 1, 1 },
- { "DPair_with_dsub_1_in_FPR64Lo", DPair_with_dsub_1_in_FPR64Lo, DPair_with_dsub_1_in_FPR64LoBits, 16, sizeof(DPair_with_dsub_1_in_FPR64LoBits), AArch64_DPair_with_dsub_1_in_FPR64LoRegClassID, 16, 8, 1, 1 },
- { "DPair_with_dsub_0_in_FPR64Lo_and_DPair_with_dsub_1_in_FPR64Lo", DPair_with_dsub_0_in_FPR64Lo_and_DPair_with_dsub_1_in_FPR64Lo, DPair_with_dsub_0_in_FPR64Lo_and_DPair_with_dsub_1_in_FPR64LoBits, 15, sizeof(DPair_with_dsub_0_in_FPR64Lo_and_DPair_with_dsub_1_in_FPR64LoBits), AArch64_DPair_with_dsub_0_in_FPR64Lo_and_DPair_with_dsub_1_in_FPR64LoRegClassID, 16, 8, 1, 1 },
+ { "GPR64sp", GPR64sp, GPR64spBits, 32, sizeof(GPR64spBits), AArch64_GPR64spRegClassID, 8, 8, 1, 1 },
+ { "GPR64common", GPR64common, GPR64commonBits, 31, sizeof(GPR64commonBits), AArch64_GPR64commonRegClassID, 8, 8, 1, 1 },
+ { "tcGPR64", tcGPR64, tcGPR64Bits, 19, sizeof(tcGPR64Bits), AArch64_tcGPR64RegClassID, 8, 8, 1, 1 },
+ { "GPR64sponly", GPR64sponly, GPR64sponlyBits, 1, sizeof(GPR64sponlyBits), AArch64_GPR64sponlyRegClassID, 8, 8, 1, 1 },
+ { "DD", DD, DDBits, 32, sizeof(DDBits), AArch64_DDRegClassID, 16, 8, 1, 1 },
{ "FPR128", FPR128, FPR128Bits, 32, sizeof(FPR128Bits), AArch64_FPR128RegClassID, 16, 16, 1, 1 },
- { "FPR128Lo", FPR128Lo, FPR128LoBits, 16, sizeof(FPR128LoBits), AArch64_FPR128LoRegClassID, 16, 16, 1, 1 },
- { "DTriple", DTriple, DTripleBits, 32, sizeof(DTripleBits), AArch64_DTripleRegClassID, 24, 8, 1, 1 },
- { "DTriple_with_dsub_0_in_FPR64Lo", DTriple_with_dsub_0_in_FPR64Lo, DTriple_with_dsub_0_in_FPR64LoBits, 16, sizeof(DTriple_with_dsub_0_in_FPR64LoBits), AArch64_DTriple_with_dsub_0_in_FPR64LoRegClassID, 24, 8, 1, 1 },
- { "DTriple_with_dsub_1_in_FPR64Lo", DTriple_with_dsub_1_in_FPR64Lo, DTriple_with_dsub_1_in_FPR64LoBits, 16, sizeof(DTriple_with_dsub_1_in_FPR64LoBits), AArch64_DTriple_with_dsub_1_in_FPR64LoRegClassID, 24, 8, 1, 1 },
- { "DTriple_with_dsub_2_in_FPR64Lo", DTriple_with_dsub_2_in_FPR64Lo, DTriple_with_dsub_2_in_FPR64LoBits, 16, sizeof(DTriple_with_dsub_2_in_FPR64LoBits), AArch64_DTriple_with_dsub_2_in_FPR64LoRegClassID, 24, 8, 1, 1 },
- { "DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_1_in_FPR64Lo", DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_1_in_FPR64Lo, DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_1_in_FPR64LoBits, 15, sizeof(DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_1_in_FPR64LoBits), AArch64_DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_1_in_FPR64LoRegClassID, 24, 8, 1, 1 },
- { "DTriple_with_dsub_1_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64Lo", DTriple_with_dsub_1_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64Lo, DTriple_with_dsub_1_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64LoBits, 15, sizeof(DTriple_with_dsub_1_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64LoBits), AArch64_DTriple_with_dsub_1_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64LoRegClassID, 24, 8, 1, 1 },
- { "DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64Lo", DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64Lo, DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64LoBits, 14, sizeof(DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64LoBits), AArch64_DTriple_with_dsub_0_in_FPR64Lo_and_DTriple_with_dsub_2_in_FPR64LoRegClassID, 24, 8, 1, 1 },
- { "DQuad", DQuad, DQuadBits, 32, sizeof(DQuadBits), AArch64_DQuadRegClassID, 32, 8, 1, 1 },
- { "DQuad_with_dsub_0_in_FPR64Lo", DQuad_with_dsub_0_in_FPR64Lo, DQuad_with_dsub_0_in_FPR64LoBits, 16, sizeof(DQuad_with_dsub_0_in_FPR64LoBits), AArch64_DQuad_with_dsub_0_in_FPR64LoRegClassID, 32, 8, 1, 1 },
- { "DQuad_with_dsub_1_in_FPR64Lo", DQuad_with_dsub_1_in_FPR64Lo, DQuad_with_dsub_1_in_FPR64LoBits, 16, sizeof(DQuad_with_dsub_1_in_FPR64LoBits), AArch64_DQuad_with_dsub_1_in_FPR64LoRegClassID, 32, 8, 1, 1 },
- { "DQuad_with_dsub_2_in_FPR64Lo", DQuad_with_dsub_2_in_FPR64Lo, DQuad_with_dsub_2_in_FPR64LoBits, 16, sizeof(DQuad_with_dsub_2_in_FPR64LoBits), AArch64_DQuad_with_dsub_2_in_FPR64LoRegClassID, 32, 8, 1, 1 },
- { "DQuad_with_dsub_3_in_FPR64Lo", DQuad_with_dsub_3_in_FPR64Lo, DQuad_with_dsub_3_in_FPR64LoBits, 16, sizeof(DQuad_with_dsub_3_in_FPR64LoBits), AArch64_DQuad_with_dsub_3_in_FPR64LoRegClassID, 32, 8, 1, 1 },
- { "DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_1_in_FPR64Lo", DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_1_in_FPR64Lo, DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_1_in_FPR64LoBits, 15, sizeof(DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_1_in_FPR64LoBits), AArch64_DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_1_in_FPR64LoRegClassID, 32, 8, 1, 1 },
- { "DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64Lo", DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64Lo, DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64LoBits, 15, sizeof(DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64LoBits), AArch64_DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64LoRegClassID, 32, 8, 1, 1 },
- { "DQuad_with_dsub_2_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo", DQuad_with_dsub_2_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo, DQuad_with_dsub_2_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoBits, 15, sizeof(DQuad_with_dsub_2_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoBits), AArch64_DQuad_with_dsub_2_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoRegClassID, 32, 8, 1, 1 },
- { "DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64Lo", DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64Lo, DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64LoBits, 14, sizeof(DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64LoBits), AArch64_DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_2_in_FPR64LoRegClassID, 32, 8, 1, 1 },
- { "DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo", DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo, DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoBits, 14, sizeof(DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoBits), AArch64_DQuad_with_dsub_1_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoRegClassID, 32, 8, 1, 1 },
- { "DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo", DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64Lo, DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoBits, 13, sizeof(DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoBits), AArch64_DQuad_with_dsub_0_in_FPR64Lo_and_DQuad_with_dsub_3_in_FPR64LoRegClassID, 32, 8, 1, 1 },
- { "QPair", QPair, QPairBits, 32, sizeof(QPairBits), AArch64_QPairRegClassID, 32, 16, 1, 1 },
- { "QPair_with_qsub_0_in_FPR128Lo", QPair_with_qsub_0_in_FPR128Lo, QPair_with_qsub_0_in_FPR128LoBits, 16, sizeof(QPair_with_qsub_0_in_FPR128LoBits), AArch64_QPair_with_qsub_0_in_FPR128LoRegClassID, 32, 16, 1, 1 },
- { "QPair_with_qsub_1_in_FPR128Lo", QPair_with_qsub_1_in_FPR128Lo, QPair_with_qsub_1_in_FPR128LoBits, 16, sizeof(QPair_with_qsub_1_in_FPR128LoBits), AArch64_QPair_with_qsub_1_in_FPR128LoRegClassID, 32, 16, 1, 1 },
- { "QPair_with_qsub_0_in_FPR128Lo_and_QPair_with_qsub_1_in_FPR128Lo", QPair_with_qsub_0_in_FPR128Lo_and_QPair_with_qsub_1_in_FPR128Lo, QPair_with_qsub_0_in_FPR128Lo_and_QPair_with_qsub_1_in_FPR128LoBits, 15, sizeof(QPair_with_qsub_0_in_FPR128Lo_and_QPair_with_qsub_1_in_FPR128LoBits), AArch64_QPair_with_qsub_0_in_FPR128Lo_and_QPair_with_qsub_1_in_FPR128LoRegClassID, 32, 16, 1, 1 },
- { "QTriple", QTriple, QTripleBits, 32, sizeof(QTripleBits), AArch64_QTripleRegClassID, 48, 16, 1, 1 },
- { "QTriple_with_qsub_0_in_FPR128Lo", QTriple_with_qsub_0_in_FPR128Lo, QTriple_with_qsub_0_in_FPR128LoBits, 16, sizeof(QTriple_with_qsub_0_in_FPR128LoBits), AArch64_QTriple_with_qsub_0_in_FPR128LoRegClassID, 48, 16, 1, 1 },
- { "QTriple_with_qsub_1_in_FPR128Lo", QTriple_with_qsub_1_in_FPR128Lo, QTriple_with_qsub_1_in_FPR128LoBits, 16, sizeof(QTriple_with_qsub_1_in_FPR128LoBits), AArch64_QTriple_with_qsub_1_in_FPR128LoRegClassID, 48, 16, 1, 1 },
- { "QTriple_with_qsub_2_in_FPR128Lo", QTriple_with_qsub_2_in_FPR128Lo, QTriple_with_qsub_2_in_FPR128LoBits, 16, sizeof(QTriple_with_qsub_2_in_FPR128LoBits), AArch64_QTriple_with_qsub_2_in_FPR128LoRegClassID, 48, 16, 1, 1 },
- { "QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_1_in_FPR128Lo", QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_1_in_FPR128Lo, QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_1_in_FPR128LoBits, 15, sizeof(QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_1_in_FPR128LoBits), AArch64_QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_1_in_FPR128LoRegClassID, 48, 16, 1, 1 },
- { "QTriple_with_qsub_1_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128Lo", QTriple_with_qsub_1_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128Lo, QTriple_with_qsub_1_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128LoBits, 15, sizeof(QTriple_with_qsub_1_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128LoBits), AArch64_QTriple_with_qsub_1_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128LoRegClassID, 48, 16, 1, 1 },
- { "QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128Lo", QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128Lo, QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128LoBits, 14, sizeof(QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128LoBits), AArch64_QTriple_with_qsub_0_in_FPR128Lo_and_QTriple_with_qsub_2_in_FPR128LoRegClassID, 48, 16, 1, 1 },
- { "QQuad", QQuad, QQuadBits, 32, sizeof(QQuadBits), AArch64_QQuadRegClassID, 64, 16, 1, 1 },
- { "QQuad_with_qsub_0_in_FPR128Lo", QQuad_with_qsub_0_in_FPR128Lo, QQuad_with_qsub_0_in_FPR128LoBits, 16, sizeof(QQuad_with_qsub_0_in_FPR128LoBits), AArch64_QQuad_with_qsub_0_in_FPR128LoRegClassID, 64, 16, 1, 1 },
- { "QQuad_with_qsub_1_in_FPR128Lo", QQuad_with_qsub_1_in_FPR128Lo, QQuad_with_qsub_1_in_FPR128LoBits, 16, sizeof(QQuad_with_qsub_1_in_FPR128LoBits), AArch64_QQuad_with_qsub_1_in_FPR128LoRegClassID, 64, 16, 1, 1 },
- { "QQuad_with_qsub_2_in_FPR128Lo", QQuad_with_qsub_2_in_FPR128Lo, QQuad_with_qsub_2_in_FPR128LoBits, 16, sizeof(QQuad_with_qsub_2_in_FPR128LoBits), AArch64_QQuad_with_qsub_2_in_FPR128LoRegClassID, 64, 16, 1, 1 },
- { "QQuad_with_qsub_3_in_FPR128Lo", QQuad_with_qsub_3_in_FPR128Lo, QQuad_with_qsub_3_in_FPR128LoBits, 16, sizeof(QQuad_with_qsub_3_in_FPR128LoBits), AArch64_QQuad_with_qsub_3_in_FPR128LoRegClassID, 64, 16, 1, 1 },
- { "QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_1_in_FPR128Lo", QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_1_in_FPR128Lo, QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_1_in_FPR128LoBits, 15, sizeof(QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_1_in_FPR128LoBits), AArch64_QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_1_in_FPR128LoRegClassID, 64, 16, 1, 1 },
- { "QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128Lo", QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128Lo, QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128LoBits, 15, sizeof(QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128LoBits), AArch64_QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128LoRegClassID, 64, 16, 1, 1 },
- { "QQuad_with_qsub_2_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo", QQuad_with_qsub_2_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo, QQuad_with_qsub_2_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoBits, 15, sizeof(QQuad_with_qsub_2_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoBits), AArch64_QQuad_with_qsub_2_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoRegClassID, 64, 16, 1, 1 },
- { "QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128Lo", QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128Lo, QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128LoBits, 14, sizeof(QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128LoBits), AArch64_QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_2_in_FPR128LoRegClassID, 64, 16, 1, 1 },
- { "QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo", QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo, QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoBits, 14, sizeof(QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoBits), AArch64_QQuad_with_qsub_1_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoRegClassID, 64, 16, 1, 1 },
- { "QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo", QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128Lo, QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoBits, 13, sizeof(QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoBits), AArch64_QQuad_with_qsub_0_in_FPR128Lo_and_QQuad_with_qsub_3_in_FPR128LoRegClassID, 64, 16, 1, 1 },
+ { "FPR128_lo", FPR128_lo, FPR128_loBits, 16, sizeof(FPR128_loBits), AArch64_FPR128_loRegClassID, 16, 16, 1, 1 },
+ { "DDD", DDD, DDDBits, 32, sizeof(DDDBits), AArch64_DDDRegClassID, 24, 8, 1, 1 },
+ { "DDDD", DDDD, DDDDBits, 32, sizeof(DDDDBits), AArch64_DDDDRegClassID, 32, 8, 1, 1 },
+ { "QQ", QQ, QQBits, 32, sizeof(QQBits), AArch64_QQRegClassID, 32, 16, 1, 1 },
+ { "QQ_with_qsub0_in_FPR128_lo", QQ_with_qsub0_in_FPR128_lo, QQ_with_qsub0_in_FPR128_loBits, 16, sizeof(QQ_with_qsub0_in_FPR128_loBits), AArch64_QQ_with_qsub0_in_FPR128_loRegClassID, 32, 16, 1, 1 },
+ { "QQ_with_qsub1_in_FPR128_lo", QQ_with_qsub1_in_FPR128_lo, QQ_with_qsub1_in_FPR128_loBits, 16, sizeof(QQ_with_qsub1_in_FPR128_loBits), AArch64_QQ_with_qsub1_in_FPR128_loRegClassID, 32, 16, 1, 1 },
+ { "QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo", QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo, QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loBits, 15, sizeof(QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loBits), AArch64_QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loRegClassID, 32, 16, 1, 1 },
+ { "QQQ", QQQ, QQQBits, 32, sizeof(QQQBits), AArch64_QQQRegClassID, 48, 16, 1, 1 },
+ { "QQQ_with_qsub0_in_FPR128_lo", QQQ_with_qsub0_in_FPR128_lo, QQQ_with_qsub0_in_FPR128_loBits, 16, sizeof(QQQ_with_qsub0_in_FPR128_loBits), AArch64_QQQ_with_qsub0_in_FPR128_loRegClassID, 48, 16, 1, 1 },
+ { "QQQ_with_qsub1_in_FPR128_lo", QQQ_with_qsub1_in_FPR128_lo, QQQ_with_qsub1_in_FPR128_loBits, 16, sizeof(QQQ_with_qsub1_in_FPR128_loBits), AArch64_QQQ_with_qsub1_in_FPR128_loRegClassID, 48, 16, 1, 1 },
+ { "QQQ_with_qsub2_in_FPR128_lo", QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub2_in_FPR128_loBits, 16, sizeof(QQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQ_with_qsub2_in_FPR128_loRegClassID, 48, 16, 1, 1 },
+ { "QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo", QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo, QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loBits, 15, sizeof(QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loBits), AArch64_QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loRegClassID, 48, 16, 1, 1 },
+ { "QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo", QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits, 15, sizeof(QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID, 48, 16, 1, 1 },
+ { "QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo", QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits, 14, sizeof(QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID, 48, 16, 1, 1 },
+ { "QQQQ", QQQQ, QQQQBits, 32, sizeof(QQQQBits), AArch64_QQQQRegClassID, 64, 16, 1, 1 },
+ { "QQQQ_with_qsub0_in_FPR128_lo", QQQQ_with_qsub0_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_loBits, 16, sizeof(QQQQ_with_qsub0_in_FPR128_loBits), AArch64_QQQQ_with_qsub0_in_FPR128_loRegClassID, 64, 16, 1, 1 },
+ { "QQQQ_with_qsub1_in_FPR128_lo", QQQQ_with_qsub1_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_loBits, 16, sizeof(QQQQ_with_qsub1_in_FPR128_loBits), AArch64_QQQQ_with_qsub1_in_FPR128_loRegClassID, 64, 16, 1, 1 },
+ { "QQQQ_with_qsub2_in_FPR128_lo", QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub2_in_FPR128_loBits, 16, sizeof(QQQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQQ_with_qsub2_in_FPR128_loRegClassID, 64, 16, 1, 1 },
+ { "QQQQ_with_qsub3_in_FPR128_lo", QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub3_in_FPR128_loBits, 16, sizeof(QQQQ_with_qsub3_in_FPR128_loBits), AArch64_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 },
+ { "QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo", QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loBits, 15, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loBits), AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClassID, 64, 16, 1, 1 },
+ { "QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo", QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits, 15, sizeof(QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID, 64, 16, 1, 1 },
+ { "QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo", QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 15, sizeof(QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64_QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 },
+ { "QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo", QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits, 14, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits), AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID, 64, 16, 1, 1 },
+ { "QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo", QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 14, sizeof(QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64_QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 },
+ { "QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo", QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 13, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64_QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 },
};
#endif // GET_REGINFO_MC_DESC
diff --git a/arch/AArch64/AArch64GenSubtargetInfo.inc b/arch/AArch64/AArch64GenSubtargetInfo.inc
index 45f2603..b27093e 100644
--- a/arch/AArch64/AArch64GenSubtargetInfo.inc
+++ b/arch/AArch64/AArch64GenSubtargetInfo.inc
@@ -14,9 +14,15 @@
#undef GET_SUBTARGETINFO_ENUM
enum {
- AArch64_FeatureCrypto = 1ULL << 0,
- AArch64_FeatureFPARMv8 = 1ULL << 1,
- AArch64_FeatureNEON = 1ULL << 2
+ AArch64_FeatureCRC = 1ULL << 0,
+ AArch64_FeatureCrypto = 1ULL << 1,
+ AArch64_FeatureFPARMv8 = 1ULL << 2,
+ AArch64_FeatureNEON = 1ULL << 3,
+ AArch64_FeatureZCRegMove = 1ULL << 4,
+ AArch64_FeatureZCZeroing = 1ULL << 5,
+ AArch64_ProcA53 = 1ULL << 6,
+ AArch64_ProcA57 = 1ULL << 7,
+ AArch64_ProcCyclone = 1ULL << 8
};
#endif // GET_SUBTARGETINFO_ENUM
diff --git a/arch/AArch64/AArch64InstPrinter.c b/arch/AArch64/AArch64InstPrinter.c
index 5e921be..bc3c7ad 100644
--- a/arch/AArch64/AArch64InstPrinter.c
+++ b/arch/AArch64/AArch64InstPrinter.c
@@ -29,9 +29,21 @@
#include "../../MathExtras.h"
#include "AArch64Mapping.h"
+#include "AArch64AddressingModes.h"
-static char *getRegisterName(unsigned RegNo);
+#define GET_REGINFO_ENUM
+#include "AArch64GenRegisterInfo.inc"
+
+#define GET_INSTRINFO_ENUM
+#include "AArch64GenInstrInfo.inc"
+
+
+static char *getRegisterName(unsigned RegNo, int AltIdx);
static void printOperand(MCInst *MI, unsigned OpNo, SStream *O);
+static bool printSysAlias(MCInst *MI, SStream *O);
+static char *printAliasInstr(MCInst *MI, SStream *OS, void *info);
+static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI);
+static void printShifter(MCInst *MI, unsigned OpNum, SStream *O);
static void set_mem_access(MCInst *MI, bool status)
{
@@ -51,577 +63,986 @@
}
}
-static int64_t unpackSignedImm(int BitWidth, uint64_t Value)
+void AArch64_printInst(MCInst *MI, SStream *O, void *Info)
{
- //assert(!(Value & ~((1ULL << BitWidth)-1)) && "immediate not n-bit");
- if (Value & (1ULL << (BitWidth - 1)))
- return (int64_t)Value - (1LL << BitWidth);
- else
- return Value;
-}
+ // Check for special encodings and print the canonical alias instead.
+ unsigned Opcode = MCInst_getOpcode(MI);
+ int LSB;
+ int Width;
+ char *mnem;
-static void printOffsetSImm9Operand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *MOImm = MCInst_getOperand(MI, OpNum);
- int32_t Imm = (int32_t)unpackSignedImm(9, MCOperand_getImm(MOImm));
+ if (Opcode == AArch64_SYSxt && printSysAlias(MI, O))
+ return;
- if (Imm >=0) {
- if (Imm > HEX_THRESHOLD)
- SStream_concat(O, "#0x%x", Imm);
- else
- SStream_concat(O, "#%u", Imm);
- } else {
- if (Imm < -HEX_THRESHOLD)
- SStream_concat(O, "#-0x%x", -Imm);
- else
- SStream_concat(O, "#-%u", -Imm);
- }
+ // SBFM/UBFM should print to a nicer aliased form if possible.
+ if (Opcode == AArch64_SBFMXri || Opcode == AArch64_SBFMWri ||
+ Opcode == AArch64_UBFMXri || Opcode == AArch64_UBFMWri) {
+ MCOperand *Op0 = MCInst_getOperand(MI, 0);
+ MCOperand *Op1 = MCInst_getOperand(MI, 1);
+ MCOperand *Op2 = MCInst_getOperand(MI, 2);
+ MCOperand *Op3 = MCInst_getOperand(MI, 3);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Imm;
- MI->flat_insn->detail->arm64.op_count++;
- }
-}
+ bool IsSigned = (Opcode == AArch64_SBFMXri || Opcode == AArch64_SBFMWri);
+ bool Is64Bit = (Opcode == AArch64_SBFMXri || Opcode == AArch64_UBFMXri);
-static void printAddrRegExtendOperand(MCInst *MI, unsigned OpNum,
- SStream *O, unsigned MemSize, unsigned RmSize)
-{
- unsigned ExtImm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
- unsigned OptionHi = ExtImm >> 1;
- unsigned S = ExtImm & 1;
- bool IsLSL = OptionHi == 1 && RmSize == 64;
+ if (MCOperand_isImm(Op2) && MCOperand_getImm(Op2) == 0 && MCOperand_isImm(Op3)) {
+ char *AsmMnemonic = NULL;
- char *Ext = NULL;
- switch (OptionHi) {
- case 1:
- if (RmSize == 32) {
- Ext = "uxtw";
- if (MI->csh->detail)
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].ext = ARM64_EXT_UXTW;
- } else {
- Ext = "lsl";
+ switch (MCOperand_getImm(Op3)) {
+ default:
+ break;
+ case 7:
+ if (IsSigned)
+ AsmMnemonic = "sxtb";
+ else if (!Is64Bit)
+ AsmMnemonic = "uxtb";
+ break;
+ case 15:
+ if (IsSigned)
+ AsmMnemonic = "sxth";
+ else if (!Is64Bit)
+ AsmMnemonic = "uxth";
+ break;
+ case 31:
+ // *xtw is only valid for signed 64-bit operations.
+ if (Is64Bit && IsSigned)
+ AsmMnemonic = "sxtw";
+ break;
}
- break;
- case 3:
- if (RmSize == 32) {
- Ext = "sxtw";
- if (MI->csh->detail)
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].ext = ARM64_EXT_SXTW;
- } else {
- Ext = "sxtx";
- if (MI->csh->detail)
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].ext = ARM64_EXT_SXTX;
- }
- break;
- default:
- break; //llvm_unreachable("Incorrect Option on load/store (reg offset)");
- }
- SStream_concat0(O, Ext);
- if (S) {
- unsigned ShiftAmt = Log2_32(MemSize);
- if (ShiftAmt > HEX_THRESHOLD)
- SStream_concat(O, " #0x%x", ShiftAmt);
- else
- SStream_concat(O, " #%u", ShiftAmt);
- if (MI->csh->detail) {
- if (MI->csh->doing_mem) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.type = ARM64_SFT_LSL;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.value = ShiftAmt;
- } else {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = ShiftAmt;
+ if (AsmMnemonic) {
+ SStream_concat(O, "%s\t%s, %s", AsmMnemonic,
+ getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName),
+ getRegisterName(getWRegFromXReg(MCOperand_getReg(Op1)), AArch64_NoRegAltName));
+
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = getWRegFromXReg(MCOperand_getReg(Op1));
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+
+ MCInst_setOpcodePub(MI, AArch64_map_insn(AsmMnemonic));
+
+ return;
}
}
- } else if (IsLSL) {
- SStream_concat0(O, " #0");
- }
-}
-static void printAddSubImmLSL0Operand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *Imm12Op = MCInst_getOperand(MI, OpNum);
+ // All immediate shifts are aliases, implemented using the Bitfield
+ // instruction. In all cases the immediate shift amount shift must be in
+ // the range 0 to (reg.size -1).
+ if (MCOperand_isImm(Op2) && MCOperand_isImm(Op3)) {
+ char *AsmMnemonic = NULL;
+ int shift = 0;
+ int64_t immr = MCOperand_getImm(Op2);
+ int64_t imms = MCOperand_getImm(Op3);
- if (MCOperand_isImm(Imm12Op)) {
- int64_t Imm12 = MCOperand_getImm(Imm12Op);
- //assert(Imm12 >= 0 && "Invalid immediate for add/sub imm");
- if (Imm12 > HEX_THRESHOLD)
- SStream_concat(O, "#0x%"PRIx64, Imm12);
- else
- SStream_concat(O, "#%u"PRIu64, Imm12);
+ if (Opcode == AArch64_UBFMWri && imms != 0x1F && ((imms + 1) == immr)) {
+ AsmMnemonic = "lsl";
+ shift = 31 - imms;
+ } else if (Opcode == AArch64_UBFMXri && imms != 0x3f &&
+ ((imms + 1 == immr))) {
+ AsmMnemonic = "lsl";
+ shift = 63 - imms;
+ } else if (Opcode == AArch64_UBFMWri && imms == 0x1f) {
+ AsmMnemonic = "lsr";
+ shift = immr;
+ } else if (Opcode == AArch64_UBFMXri && imms == 0x3f) {
+ AsmMnemonic = "lsr";
+ shift = immr;
+ } else if (Opcode == AArch64_SBFMWri && imms == 0x1f) {
+ AsmMnemonic = "asr";
+ shift = immr;
+ } else if (Opcode == AArch64_SBFMXri && imms == 0x3f) {
+ AsmMnemonic = "asr";
+ shift = immr;
+ }
+
+ if (AsmMnemonic) {
+ SStream_concat(O, "%s\t%s, %s, ", AsmMnemonic,
+ getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName),
+ getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName));
+
+ printInt32Bang(O, shift);
+
+ MCInst_setOpcodePub(MI, AArch64_map_insn(AsmMnemonic));
+
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = shift;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+
+ return;
+ }
+ }
+
+ // SBFIZ/UBFIZ aliases
+ if (MCOperand_getImm(Op2) > MCOperand_getImm(Op3)) {
+ SStream_concat(O, "%s\t%s, %s ", (IsSigned ? "sbfiz" : "ubfiz"),
+ getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName),
+ getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName));
+ printInt32Bang(O, (int)((Is64Bit ? 64 : 32) - MCOperand_getImm(Op2)));
+ SStream_concat0(O, ", ");
+ printInt32Bang(O, (int)MCOperand_getImm(Op3) + 1);
+
+ MCInst_setOpcodePub(MI, AArch64_map_insn(IsSigned ? "sbfiz" : "ubfiz"));
+
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (Is64Bit ? 64 : 32) - MCOperand_getImm(Op2);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op3) + 1;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+
+ return;
+ }
+
+ // Otherwise SBFX/UBFX is the preferred form
+ SStream_concat(O, "%s\t%s, %s ", (IsSigned ? "sbfx" : "ubfx"),
+ getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName),
+ getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName));
+ printInt32Bang(O, (int)MCOperand_getImm(Op2));
+ SStream_concat0(O, ", ");
+ printInt32Bang(O, (int)MCOperand_getImm(Op3) - MCOperand_getImm(Op2) + 1);
+
+ MCInst_setOpcodePub(MI, AArch64_map_insn(IsSigned ? "sbfx" : "ubfx"));
+
if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1);
+ MI->flat_insn->detail->arm64.op_count++;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int32_t)Imm12;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op2);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op3) - MCOperand_getImm(Op2) + 1;
MI->flat_insn->detail->arm64.op_count++;
}
- }
-}
-static void printAddSubImmLSL12Operand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- printAddSubImmLSL0Operand(MI, OpNum, O);
-
- SStream_concat0(O, ", lsl #12");
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = 12;
- }
-}
-
-static void printBareImmOperand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *MO = MCInst_getOperand(MI, OpNum);
- uint64_t imm = MCOperand_getImm(MO);
- if (imm > HEX_THRESHOLD)
- SStream_concat(O, "0x%"PRIx64, imm);
- else
- SStream_concat(O, "%"PRIu64, imm);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int32_t)imm;
- MI->flat_insn->detail->arm64.op_count++;
- }
-}
-
-static void printBFILSBOperand(MCInst *MI, unsigned OpNum,
- SStream *O, unsigned RegWidth)
-{
- MCOperand *ImmROp = MCInst_getOperand(MI, OpNum);
- unsigned LSB = MCOperand_getImm(ImmROp) == 0 ? 0 : RegWidth - (unsigned int)MCOperand_getImm(ImmROp);
-
- if (LSB > HEX_THRESHOLD)
- SStream_concat(O, "#0x%x", LSB);
- else
- SStream_concat(O, "#%u", LSB);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB;
- MI->flat_insn->detail->arm64.op_count++;
- }
-}
-
-static void printBFIWidthOperand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *ImmSOp = MCInst_getOperand(MI, OpNum);
- unsigned Width = (unsigned int)MCOperand_getImm(ImmSOp) + 1;
-
- if (Width > HEX_THRESHOLD)
- SStream_concat(O, "#0x%x", Width);
- else
- SStream_concat(O, "#%u", Width);
-}
-
-static void printBFXWidthOperand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *ImmSOp = MCInst_getOperand(MI, OpNum);
- MCOperand *ImmROp = MCInst_getOperand(MI, OpNum - 1);
-
- unsigned ImmR = (unsigned int)MCOperand_getImm(ImmROp);
- unsigned ImmS = (unsigned int)MCOperand_getImm(ImmSOp);
-
- //assert(ImmS >= ImmR && "Invalid ImmR, ImmS combination for bitfield extract");
-
- if (ImmS - ImmR + 1 > HEX_THRESHOLD)
- SStream_concat(O, "#0x%x", (ImmS - ImmR + 1));
- else
- SStream_concat(O, "#%u", (ImmS - ImmR + 1));
-
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = ImmS - ImmR + 1;
- MI->flat_insn->detail->arm64.op_count++;
- }
-}
-
-static void printCRxOperand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *CRx = MCInst_getOperand(MI, OpNum);
- SStream_concat(O, "c%"PRIu64, MCOperand_getImm(CRx));
-
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_CIMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int32_t)MCOperand_getImm(CRx);
- MI->flat_insn->detail->arm64.op_count++;
- }
-}
-
-static void printCVTFixedPosOperand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *ScaleOp = MCInst_getOperand(MI, OpNum);
-
- if (64 - MCOperand_getImm(ScaleOp) > HEX_THRESHOLD)
- SStream_concat(O, "#0x%x", 64 - MCOperand_getImm(ScaleOp));
- else
- SStream_concat(O, "#%u", 64 - MCOperand_getImm(ScaleOp));
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = 64 - (int32_t)MCOperand_getImm(ScaleOp);
- MI->flat_insn->detail->arm64.op_count++;
- }
-}
-
-static void printFPImmOperand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *MOImm8 = MCInst_getOperand(MI, OpNum);
-
- //assert(MOImm8.isImm()
- // && "Immediate operand required for floating-point immediate inst");
-
- uint32_t Imm8 = (uint32_t)MCOperand_getImm(MOImm8);
- uint32_t Fraction = Imm8 & 0xf;
- uint32_t Exponent = (Imm8 >> 4) & 0x7;
- uint32_t Negative = (Imm8 >> 7) & 0x1;
-
- float Val = 1.0f + Fraction / 16.0f;
-
- // That is:
- // 000 -> 2^1, 001 -> 2^2, 010 -> 2^3, 011 -> 2^4,
- // 100 -> 2^-3, 101 -> 2^-2, 110 -> 2^-1, 111 -> 2^0
- if (Exponent & 0x4) {
- Val /= 1 << (7 - Exponent);
- } else {
- Val *= 1 << (Exponent + 1);
- }
-
- Val = Negative ? -Val : Val;
-
- //o << '#' << format("%.8f", Val);
- SStream_concat(O, "#%.8f", Val);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_FP;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].fp = Val;
- MI->flat_insn->detail->arm64.op_count++;
- }
-}
-
-static void printFPZeroOperand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- SStream_concat0(O, "#0.0");
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_FP;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].fp = 0;
- MI->flat_insn->detail->arm64.op_count++;
- }
-}
-
-static void printCondCodeOperand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *MO = MCInst_getOperand(MI, OpNum);
- SStream_concat0(O, A64CondCodeToString((A64CC_CondCodes)(MCOperand_getImm(MO))));
- if (MI->csh->detail)
- MI->flat_insn->detail->arm64.cc = MCOperand_getImm(MO) + 1;
-}
-
-static void printLabelOperand(MCInst *MI, unsigned OpNum,
- SStream *O, unsigned field_width, unsigned scale)
-{
- MCOperand *MO = MCInst_getOperand(MI, OpNum);
- uint64_t UImm, Sign;
- int64_t SImm, tmp;
-
- if (!MCOperand_isImm(MO)) {
- printOperand(MI, OpNum, O);
return;
}
- // The immediate of LDR (lit) instructions is a signed 19-bit immediate, which
- // is multiplied by 4 (because all A64 instructions are 32-bits wide).
- UImm = MCOperand_getImm(MO);
- Sign = UImm & (1LL << (field_width - 1));
- SImm = scale * ((UImm & ~Sign) - Sign);
+ if (Opcode == AArch64_BFMXri || Opcode == AArch64_BFMWri) {
+ MCOperand *Op0 = MCInst_getOperand(MI, 0); // Op1 == Op0
+ MCOperand *Op2 = MCInst_getOperand(MI, 2);
+ int ImmR = MCOperand_getImm(MCInst_getOperand(MI, 3));
+ int ImmS = MCOperand_getImm(MCInst_getOperand(MI, 4));
- // this is a relative address, so add with the address
- // of current instruction
- SImm += MI->address;
+ // BFI alias
+ if (ImmS < ImmR) {
+ int BitWidth = Opcode == AArch64_BFMXri ? 64 : 32;
+ LSB = (BitWidth - ImmR) % BitWidth;
+ Width = ImmS + 1;
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int32_t)SImm;
- MI->flat_insn->detail->arm64.op_count++;
- }
+ SStream_concat(O, "bfi\t%s, %s, ",
+ getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName),
+ getRegisterName(MCOperand_getReg(Op2), AArch64_NoRegAltName));
+ printInt32Bang(O, LSB);
+ SStream_concat0(O, ", ");
+ printInt32Bang(O, Width);
+ MCInst_setOpcodePub(MI, AArch64_map_insn("bfi"));
- if (SImm >= 0) {
- if (SImm > HEX_THRESHOLD)
- SStream_concat(O, "#0x%"PRIx64, SImm);
- else
- SStream_concat(O, "#%"PRIu64, SImm);
- } else {
- tmp = -(int64_t)SImm;
- if (SImm < -HEX_THRESHOLD)
- SStream_concat(O, "#-0x%"PRIx64, tmp);
- else
- SStream_concat(O, "#-%"PRIu64, tmp);
- }
-}
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op2);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB;
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Width;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
-static void printLogicalImmOperand(MCInst *MI, unsigned OpNum,
- SStream *O, unsigned RegWidth)
-{
- MCOperand *MO = MCInst_getOperand(MI, OpNum);
- uint64_t Val;
- A64Imms_isLogicalImmBits(RegWidth, (uint32_t)MCOperand_getImm(MO), &Val);
- if (Val > HEX_THRESHOLD)
- SStream_concat(O, "#0x%"PRIx64, Val);
- else
- SStream_concat(O, "#%"PRIu64, Val);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int32_t)Val;
- MI->flat_insn->detail->arm64.op_count++;
- }
-}
+ return;
+ }
-static void printOffsetUImm12Operand(MCInst *MI, unsigned OpNum,
- SStream *O, int MemSize)
-{
- MCOperand *MOImm = MCInst_getOperand(MI, OpNum);
-
- if (MCOperand_isImm(MOImm)) {
- uint32_t Imm = (uint32_t)MCOperand_getImm(MOImm) * MemSize;
-
- if (Imm > HEX_THRESHOLD)
- SStream_concat(O, "#0x%x", Imm);
- else
- SStream_concat(O, "#%u", Imm);
+ LSB = ImmR;
+ Width = ImmS - ImmR + 1;
+ // Otherwise BFXIL the preferred form
+ SStream_concat(O, "bfxil\t%s, %s, ",
+ getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName),
+ getRegisterName(MCOperand_getReg(Op2), AArch64_NoRegAltName));
+ printInt32Bang(O, LSB);
+ SStream_concat0(O, ", ");
+ printInt32Bang(O, Width);
+ MCInst_setOpcodePub(MI, AArch64_map_insn("bfxil"));
if (MI->csh->detail) {
- if (MI->csh->doing_mem) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = Imm;
- } else {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Imm;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op2);
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB;
+ MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Width;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+
+ return;
+ }
+
+ mnem = printAliasInstr(MI, O, Info);
+ if (mnem) {
+ MCInst_setOpcodePub(MI, AArch64_map_insn(mnem));
+ cs_mem_free(mnem);
+ } else {
+ printInstruction(MI, O, Info);
+ }
+}
+
+#if 0
+static bool isTblTbxInstruction(unsigned Opcode, char **Layout, bool *IsTbx)
+{
+ switch (Opcode) {
+ case AArch64_TBXv8i8One:
+ case AArch64_TBXv8i8Two:
+ case AArch64_TBXv8i8Three:
+ case AArch64_TBXv8i8Four:
+ *IsTbx = true;
+ *Layout = ".8b";
+ return true;
+ case AArch64_TBLv8i8One:
+ case AArch64_TBLv8i8Two:
+ case AArch64_TBLv8i8Three:
+ case AArch64_TBLv8i8Four:
+ *IsTbx = false;
+ *Layout = ".8b";
+ return true;
+ case AArch64_TBXv16i8One:
+ case AArch64_TBXv16i8Two:
+ case AArch64_TBXv16i8Three:
+ case AArch64_TBXv16i8Four:
+ *IsTbx = true;
+ *Layout = ".16b";
+ return true;
+ case AArch64_TBLv16i8One:
+ case AArch64_TBLv16i8Two:
+ case AArch64_TBLv16i8Three:
+ case AArch64_TBLv16i8Four:
+ *IsTbx = false;
+ *Layout = ".16b";
+ return true;
+ default:
+ return false;
+ }
+}
+
+struct LdStNInstrDesc {
+ unsigned Opcode;
+ char *Mnemonic;
+ char *Layout;
+ int ListOperand;
+ bool HasLane;
+ int NaturalOffset;
+};
+
+static struct LdStNInstrDesc LdStNInstInfo[] = {
+ { AArch64_LD1i8, "ld1", ".b", 1, true, 0 },
+ { AArch64_LD1i16, "ld1", ".h", 1, true, 0 },
+ { AArch64_LD1i32, "ld1", ".s", 1, true, 0 },
+ { AArch64_LD1i64, "ld1", ".d", 1, true, 0 },
+ { AArch64_LD1i8_POST, "ld1", ".b", 2, true, 1 },
+ { AArch64_LD1i16_POST, "ld1", ".h", 2, true, 2 },
+ { AArch64_LD1i32_POST, "ld1", ".s", 2, true, 4 },
+ { AArch64_LD1i64_POST, "ld1", ".d", 2, true, 8 },
+ { AArch64_LD1Rv16b, "ld1r", ".16b", 0, false, 0 },
+ { AArch64_LD1Rv8h, "ld1r", ".8h", 0, false, 0 },
+ { AArch64_LD1Rv4s, "ld1r", ".4s", 0, false, 0 },
+ { AArch64_LD1Rv2d, "ld1r", ".2d", 0, false, 0 },
+ { AArch64_LD1Rv8b, "ld1r", ".8b", 0, false, 0 },
+ { AArch64_LD1Rv4h, "ld1r", ".4h", 0, false, 0 },
+ { AArch64_LD1Rv2s, "ld1r", ".2s", 0, false, 0 },
+ { AArch64_LD1Rv1d, "ld1r", ".1d", 0, false, 0 },
+ { AArch64_LD1Rv16b_POST, "ld1r", ".16b", 1, false, 1 },
+ { AArch64_LD1Rv8h_POST, "ld1r", ".8h", 1, false, 2 },
+ { AArch64_LD1Rv4s_POST, "ld1r", ".4s", 1, false, 4 },
+ { AArch64_LD1Rv2d_POST, "ld1r", ".2d", 1, false, 8 },
+ { AArch64_LD1Rv8b_POST, "ld1r", ".8b", 1, false, 1 },
+ { AArch64_LD1Rv4h_POST, "ld1r", ".4h", 1, false, 2 },
+ { AArch64_LD1Rv2s_POST, "ld1r", ".2s", 1, false, 4 },
+ { AArch64_LD1Rv1d_POST, "ld1r", ".1d", 1, false, 8 },
+ { AArch64_LD1Onev16b, "ld1", ".16b", 0, false, 0 },
+ { AArch64_LD1Onev8h, "ld1", ".8h", 0, false, 0 },
+ { AArch64_LD1Onev4s, "ld1", ".4s", 0, false, 0 },
+ { AArch64_LD1Onev2d, "ld1", ".2d", 0, false, 0 },
+ { AArch64_LD1Onev8b, "ld1", ".8b", 0, false, 0 },
+ { AArch64_LD1Onev4h, "ld1", ".4h", 0, false, 0 },
+ { AArch64_LD1Onev2s, "ld1", ".2s", 0, false, 0 },
+ { AArch64_LD1Onev1d, "ld1", ".1d", 0, false, 0 },
+ { AArch64_LD1Onev16b_POST, "ld1", ".16b", 1, false, 16 },
+ { AArch64_LD1Onev8h_POST, "ld1", ".8h", 1, false, 16 },
+ { AArch64_LD1Onev4s_POST, "ld1", ".4s", 1, false, 16 },
+ { AArch64_LD1Onev2d_POST, "ld1", ".2d", 1, false, 16 },
+ { AArch64_LD1Onev8b_POST, "ld1", ".8b", 1, false, 8 },
+ { AArch64_LD1Onev4h_POST, "ld1", ".4h", 1, false, 8 },
+ { AArch64_LD1Onev2s_POST, "ld1", ".2s", 1, false, 8 },
+ { AArch64_LD1Onev1d_POST, "ld1", ".1d", 1, false, 8 },
+ { AArch64_LD1Twov16b, "ld1", ".16b", 0, false, 0 },
+ { AArch64_LD1Twov8h, "ld1", ".8h", 0, false, 0 },
+ { AArch64_LD1Twov4s, "ld1", ".4s", 0, false, 0 },
+ { AArch64_LD1Twov2d, "ld1", ".2d", 0, false, 0 },
+ { AArch64_LD1Twov8b, "ld1", ".8b", 0, false, 0 },
+ { AArch64_LD1Twov4h, "ld1", ".4h", 0, false, 0 },
+ { AArch64_LD1Twov2s, "ld1", ".2s", 0, false, 0 },
+ { AArch64_LD1Twov1d, "ld1", ".1d", 0, false, 0 },
+ { AArch64_LD1Twov16b_POST, "ld1", ".16b", 1, false, 32 },
+ { AArch64_LD1Twov8h_POST, "ld1", ".8h", 1, false, 32 },
+ { AArch64_LD1Twov4s_POST, "ld1", ".4s", 1, false, 32 },
+ { AArch64_LD1Twov2d_POST, "ld1", ".2d", 1, false, 32 },
+ { AArch64_LD1Twov8b_POST, "ld1", ".8b", 1, false, 16 },
+ { AArch64_LD1Twov4h_POST, "ld1", ".4h", 1, false, 16 },
+ { AArch64_LD1Twov2s_POST, "ld1", ".2s", 1, false, 16 },
+ { AArch64_LD1Twov1d_POST, "ld1", ".1d", 1, false, 16 },
+ { AArch64_LD1Threev16b, "ld1", ".16b", 0, false, 0 },
+ { AArch64_LD1Threev8h, "ld1", ".8h", 0, false, 0 },
+ { AArch64_LD1Threev4s, "ld1", ".4s", 0, false, 0 },
+ { AArch64_LD1Threev2d, "ld1", ".2d", 0, false, 0 },
+ { AArch64_LD1Threev8b, "ld1", ".8b", 0, false, 0 },
+ { AArch64_LD1Threev4h, "ld1", ".4h", 0, false, 0 },
+ { AArch64_LD1Threev2s, "ld1", ".2s", 0, false, 0 },
+ { AArch64_LD1Threev1d, "ld1", ".1d", 0, false, 0 },
+ { AArch64_LD1Threev16b_POST, "ld1", ".16b", 1, false, 48 },
+ { AArch64_LD1Threev8h_POST, "ld1", ".8h", 1, false, 48 },
+ { AArch64_LD1Threev4s_POST, "ld1", ".4s", 1, false, 48 },
+ { AArch64_LD1Threev2d_POST, "ld1", ".2d", 1, false, 48 },
+ { AArch64_LD1Threev8b_POST, "ld1", ".8b", 1, false, 24 },
+ { AArch64_LD1Threev4h_POST, "ld1", ".4h", 1, false, 24 },
+ { AArch64_LD1Threev2s_POST, "ld1", ".2s", 1, false, 24 },
+ { AArch64_LD1Threev1d_POST, "ld1", ".1d", 1, false, 24 },
+ { AArch64_LD1Fourv16b, "ld1", ".16b", 0, false, 0 },
+ { AArch64_LD1Fourv8h, "ld1", ".8h", 0, false, 0 },
+ { AArch64_LD1Fourv4s, "ld1", ".4s", 0, false, 0 },
+ { AArch64_LD1Fourv2d, "ld1", ".2d", 0, false, 0 },
+ { AArch64_LD1Fourv8b, "ld1", ".8b", 0, false, 0 },
+ { AArch64_LD1Fourv4h, "ld1", ".4h", 0, false, 0 },
+ { AArch64_LD1Fourv2s, "ld1", ".2s", 0, false, 0 },
+ { AArch64_LD1Fourv1d, "ld1", ".1d", 0, false, 0 },
+ { AArch64_LD1Fourv16b_POST, "ld1", ".16b", 1, false, 64 },
+ { AArch64_LD1Fourv8h_POST, "ld1", ".8h", 1, false, 64 },
+ { AArch64_LD1Fourv4s_POST, "ld1", ".4s", 1, false, 64 },
+ { AArch64_LD1Fourv2d_POST, "ld1", ".2d", 1, false, 64 },
+ { AArch64_LD1Fourv8b_POST, "ld1", ".8b", 1, false, 32 },
+ { AArch64_LD1Fourv4h_POST, "ld1", ".4h", 1, false, 32 },
+ { AArch64_LD1Fourv2s_POST, "ld1", ".2s", 1, false, 32 },
+ { AArch64_LD1Fourv1d_POST, "ld1", ".1d", 1, false, 32 },
+ { AArch64_LD2i8, "ld2", ".b", 1, true, 0 },
+ { AArch64_LD2i16, "ld2", ".h", 1, true, 0 },
+ { AArch64_LD2i32, "ld2", ".s", 1, true, 0 },
+ { AArch64_LD2i64, "ld2", ".d", 1, true, 0 },
+ { AArch64_LD2i8_POST, "ld2", ".b", 2, true, 2 },
+ { AArch64_LD2i16_POST, "ld2", ".h", 2, true, 4 },
+ { AArch64_LD2i32_POST, "ld2", ".s", 2, true, 8 },
+ { AArch64_LD2i64_POST, "ld2", ".d", 2, true, 16 },
+ { AArch64_LD2Rv16b, "ld2r", ".16b", 0, false, 0 },
+ { AArch64_LD2Rv8h, "ld2r", ".8h", 0, false, 0 },
+ { AArch64_LD2Rv4s, "ld2r", ".4s", 0, false, 0 },
+ { AArch64_LD2Rv2d, "ld2r", ".2d", 0, false, 0 },
+ { AArch64_LD2Rv8b, "ld2r", ".8b", 0, false, 0 },
+ { AArch64_LD2Rv4h, "ld2r", ".4h", 0, false, 0 },
+ { AArch64_LD2Rv2s, "ld2r", ".2s", 0, false, 0 },
+ { AArch64_LD2Rv1d, "ld2r", ".1d", 0, false, 0 },
+ { AArch64_LD2Rv16b_POST, "ld2r", ".16b", 1, false, 2 },
+ { AArch64_LD2Rv8h_POST, "ld2r", ".8h", 1, false, 4 },
+ { AArch64_LD2Rv4s_POST, "ld2r", ".4s", 1, false, 8 },
+ { AArch64_LD2Rv2d_POST, "ld2r", ".2d", 1, false, 16 },
+ { AArch64_LD2Rv8b_POST, "ld2r", ".8b", 1, false, 2 },
+ { AArch64_LD2Rv4h_POST, "ld2r", ".4h", 1, false, 4 },
+ { AArch64_LD2Rv2s_POST, "ld2r", ".2s", 1, false, 8 },
+ { AArch64_LD2Rv1d_POST, "ld2r", ".1d", 1, false, 16 },
+ { AArch64_LD2Twov16b, "ld2", ".16b", 0, false, 0 },
+ { AArch64_LD2Twov8h, "ld2", ".8h", 0, false, 0 },
+ { AArch64_LD2Twov4s, "ld2", ".4s", 0, false, 0 },
+ { AArch64_LD2Twov2d, "ld2", ".2d", 0, false, 0 },
+ { AArch64_LD2Twov8b, "ld2", ".8b", 0, false, 0 },
+ { AArch64_LD2Twov4h, "ld2", ".4h", 0, false, 0 },
+ { AArch64_LD2Twov2s, "ld2", ".2s", 0, false, 0 },
+ { AArch64_LD2Twov16b_POST, "ld2", ".16b", 1, false, 32 },
+ { AArch64_LD2Twov8h_POST, "ld2", ".8h", 1, false, 32 },
+ { AArch64_LD2Twov4s_POST, "ld2", ".4s", 1, false, 32 },
+ { AArch64_LD2Twov2d_POST, "ld2", ".2d", 1, false, 32 },
+ { AArch64_LD2Twov8b_POST, "ld2", ".8b", 1, false, 16 },
+ { AArch64_LD2Twov4h_POST, "ld2", ".4h", 1, false, 16 },
+ { AArch64_LD2Twov2s_POST, "ld2", ".2s", 1, false, 16 },
+ { AArch64_LD3i8, "ld3", ".b", 1, true, 0 },
+ { AArch64_LD3i16, "ld3", ".h", 1, true, 0 },
+ { AArch64_LD3i32, "ld3", ".s", 1, true, 0 },
+ { AArch64_LD3i64, "ld3", ".d", 1, true, 0 },
+ { AArch64_LD3i8_POST, "ld3", ".b", 2, true, 3 },
+ { AArch64_LD3i16_POST, "ld3", ".h", 2, true, 6 },
+ { AArch64_LD3i32_POST, "ld3", ".s", 2, true, 12 },
+ { AArch64_LD3i64_POST, "ld3", ".d", 2, true, 24 },
+ { AArch64_LD3Rv16b, "ld3r", ".16b", 0, false, 0 },
+ { AArch64_LD3Rv8h, "ld3r", ".8h", 0, false, 0 },
+ { AArch64_LD3Rv4s, "ld3r", ".4s", 0, false, 0 },
+ { AArch64_LD3Rv2d, "ld3r", ".2d", 0, false, 0 },
+ { AArch64_LD3Rv8b, "ld3r", ".8b", 0, false, 0 },
+ { AArch64_LD3Rv4h, "ld3r", ".4h", 0, false, 0 },
+ { AArch64_LD3Rv2s, "ld3r", ".2s", 0, false, 0 },
+ { AArch64_LD3Rv1d, "ld3r", ".1d", 0, false, 0 },
+ { AArch64_LD3Rv16b_POST, "ld3r", ".16b", 1, false, 3 },
+ { AArch64_LD3Rv8h_POST, "ld3r", ".8h", 1, false, 6 },
+ { AArch64_LD3Rv4s_POST, "ld3r", ".4s", 1, false, 12 },
+ { AArch64_LD3Rv2d_POST, "ld3r", ".2d", 1, false, 24 },
+ { AArch64_LD3Rv8b_POST, "ld3r", ".8b", 1, false, 3 },
+ { AArch64_LD3Rv4h_POST, "ld3r", ".4h", 1, false, 6 },
+ { AArch64_LD3Rv2s_POST, "ld3r", ".2s", 1, false, 12 },
+ { AArch64_LD3Rv1d_POST, "ld3r", ".1d", 1, false, 24 },
+ { AArch64_LD3Threev16b, "ld3", ".16b", 0, false, 0 },
+ { AArch64_LD3Threev8h, "ld3", ".8h", 0, false, 0 },
+ { AArch64_LD3Threev4s, "ld3", ".4s", 0, false, 0 },
+ { AArch64_LD3Threev2d, "ld3", ".2d", 0, false, 0 },
+ { AArch64_LD3Threev8b, "ld3", ".8b", 0, false, 0 },
+ { AArch64_LD3Threev4h, "ld3", ".4h", 0, false, 0 },
+ { AArch64_LD3Threev2s, "ld3", ".2s", 0, false, 0 },
+ { AArch64_LD3Threev16b_POST, "ld3", ".16b", 1, false, 48 },
+ { AArch64_LD3Threev8h_POST, "ld3", ".8h", 1, false, 48 },
+ { AArch64_LD3Threev4s_POST, "ld3", ".4s", 1, false, 48 },
+ { AArch64_LD3Threev2d_POST, "ld3", ".2d", 1, false, 48 },
+ { AArch64_LD3Threev8b_POST, "ld3", ".8b", 1, false, 24 },
+ { AArch64_LD3Threev4h_POST, "ld3", ".4h", 1, false, 24 },
+ { AArch64_LD3Threev2s_POST, "ld3", ".2s", 1, false, 24 },
+ { AArch64_LD4i8, "ld4", ".b", 1, true, 0 },
+ { AArch64_LD4i16, "ld4", ".h", 1, true, 0 },
+ { AArch64_LD4i32, "ld4", ".s", 1, true, 0 },
+ { AArch64_LD4i64, "ld4", ".d", 1, true, 0 },
+ { AArch64_LD4i8_POST, "ld4", ".b", 2, true, 4 },
+ { AArch64_LD4i16_POST, "ld4", ".h", 2, true, 8 },
+ { AArch64_LD4i32_POST, "ld4", ".s", 2, true, 16 },
+ { AArch64_LD4i64_POST, "ld4", ".d", 2, true, 32 },
+ { AArch64_LD4Rv16b, "ld4r", ".16b", 0, false, 0 },
+ { AArch64_LD4Rv8h, "ld4r", ".8h", 0, false, 0 },
+ { AArch64_LD4Rv4s, "ld4r", ".4s", 0, false, 0 },
+ { AArch64_LD4Rv2d, "ld4r", ".2d", 0, false, 0 },
+ { AArch64_LD4Rv8b, "ld4r", ".8b", 0, false, 0 },
+ { AArch64_LD4Rv4h, "ld4r", ".4h", 0, false, 0 },
+ { AArch64_LD4Rv2s, "ld4r", ".2s", 0, false, 0 },
+ { AArch64_LD4Rv1d, "ld4r", ".1d", 0, false, 0 },
+ { AArch64_LD4Rv16b_POST, "ld4r", ".16b", 1, false, 4 },
+ { AArch64_LD4Rv8h_POST, "ld4r", ".8h", 1, false, 8 },
+ { AArch64_LD4Rv4s_POST, "ld4r", ".4s", 1, false, 16 },
+ { AArch64_LD4Rv2d_POST, "ld4r", ".2d", 1, false, 32 },
+ { AArch64_LD4Rv8b_POST, "ld4r", ".8b", 1, false, 4 },
+ { AArch64_LD4Rv4h_POST, "ld4r", ".4h", 1, false, 8 },
+ { AArch64_LD4Rv2s_POST, "ld4r", ".2s", 1, false, 16 },
+ { AArch64_LD4Rv1d_POST, "ld4r", ".1d", 1, false, 32 },
+ { AArch64_LD4Fourv16b, "ld4", ".16b", 0, false, 0 },
+ { AArch64_LD4Fourv8h, "ld4", ".8h", 0, false, 0 },
+ { AArch64_LD4Fourv4s, "ld4", ".4s", 0, false, 0 },
+ { AArch64_LD4Fourv2d, "ld4", ".2d", 0, false, 0 },
+ { AArch64_LD4Fourv8b, "ld4", ".8b", 0, false, 0 },
+ { AArch64_LD4Fourv4h, "ld4", ".4h", 0, false, 0 },
+ { AArch64_LD4Fourv2s, "ld4", ".2s", 0, false, 0 },
+ { AArch64_LD4Fourv16b_POST, "ld4", ".16b", 1, false, 64 },
+ { AArch64_LD4Fourv8h_POST, "ld4", ".8h", 1, false, 64 },
+ { AArch64_LD4Fourv4s_POST, "ld4", ".4s", 1, false, 64 },
+ { AArch64_LD4Fourv2d_POST, "ld4", ".2d", 1, false, 64 },
+ { AArch64_LD4Fourv8b_POST, "ld4", ".8b", 1, false, 32 },
+ { AArch64_LD4Fourv4h_POST, "ld4", ".4h", 1, false, 32 },
+ { AArch64_LD4Fourv2s_POST, "ld4", ".2s", 1, false, 32 },
+ { AArch64_ST1i8, "st1", ".b", 0, true, 0 },
+ { AArch64_ST1i16, "st1", ".h", 0, true, 0 },
+ { AArch64_ST1i32, "st1", ".s", 0, true, 0 },
+ { AArch64_ST1i64, "st1", ".d", 0, true, 0 },
+ { AArch64_ST1i8_POST, "st1", ".b", 1, true, 1 },
+ { AArch64_ST1i16_POST, "st1", ".h", 1, true, 2 },
+ { AArch64_ST1i32_POST, "st1", ".s", 1, true, 4 },
+ { AArch64_ST1i64_POST, "st1", ".d", 1, true, 8 },
+ { AArch64_ST1Onev16b, "st1", ".16b", 0, false, 0 },
+ { AArch64_ST1Onev8h, "st1", ".8h", 0, false, 0 },
+ { AArch64_ST1Onev4s, "st1", ".4s", 0, false, 0 },
+ { AArch64_ST1Onev2d, "st1", ".2d", 0, false, 0 },
+ { AArch64_ST1Onev8b, "st1", ".8b", 0, false, 0 },
+ { AArch64_ST1Onev4h, "st1", ".4h", 0, false, 0 },
+ { AArch64_ST1Onev2s, "st1", ".2s", 0, false, 0 },
+ { AArch64_ST1Onev1d, "st1", ".1d", 0, false, 0 },
+ { AArch64_ST1Onev16b_POST, "st1", ".16b", 1, false, 16 },
+ { AArch64_ST1Onev8h_POST, "st1", ".8h", 1, false, 16 },
+ { AArch64_ST1Onev4s_POST, "st1", ".4s", 1, false, 16 },
+ { AArch64_ST1Onev2d_POST, "st1", ".2d", 1, false, 16 },
+ { AArch64_ST1Onev8b_POST, "st1", ".8b", 1, false, 8 },
+ { AArch64_ST1Onev4h_POST, "st1", ".4h", 1, false, 8 },
+ { AArch64_ST1Onev2s_POST, "st1", ".2s", 1, false, 8 },
+ { AArch64_ST1Onev1d_POST, "st1", ".1d", 1, false, 8 },
+ { AArch64_ST1Twov16b, "st1", ".16b", 0, false, 0 },
+ { AArch64_ST1Twov8h, "st1", ".8h", 0, false, 0 },
+ { AArch64_ST1Twov4s, "st1", ".4s", 0, false, 0 },
+ { AArch64_ST1Twov2d, "st1", ".2d", 0, false, 0 },
+ { AArch64_ST1Twov8b, "st1", ".8b", 0, false, 0 },
+ { AArch64_ST1Twov4h, "st1", ".4h", 0, false, 0 },
+ { AArch64_ST1Twov2s, "st1", ".2s", 0, false, 0 },
+ { AArch64_ST1Twov1d, "st1", ".1d", 0, false, 0 },
+ { AArch64_ST1Twov16b_POST, "st1", ".16b", 1, false, 32 },
+ { AArch64_ST1Twov8h_POST, "st1", ".8h", 1, false, 32 },
+ { AArch64_ST1Twov4s_POST, "st1", ".4s", 1, false, 32 },
+ { AArch64_ST1Twov2d_POST, "st1", ".2d", 1, false, 32 },
+ { AArch64_ST1Twov8b_POST, "st1", ".8b", 1, false, 16 },
+ { AArch64_ST1Twov4h_POST, "st1", ".4h", 1, false, 16 },
+ { AArch64_ST1Twov2s_POST, "st1", ".2s", 1, false, 16 },
+ { AArch64_ST1Twov1d_POST, "st1", ".1d", 1, false, 16 },
+ { AArch64_ST1Threev16b, "st1", ".16b", 0, false, 0 },
+ { AArch64_ST1Threev8h, "st1", ".8h", 0, false, 0 },
+ { AArch64_ST1Threev4s, "st1", ".4s", 0, false, 0 },
+ { AArch64_ST1Threev2d, "st1", ".2d", 0, false, 0 },
+ { AArch64_ST1Threev8b, "st1", ".8b", 0, false, 0 },
+ { AArch64_ST1Threev4h, "st1", ".4h", 0, false, 0 },
+ { AArch64_ST1Threev2s, "st1", ".2s", 0, false, 0 },
+ { AArch64_ST1Threev1d, "st1", ".1d", 0, false, 0 },
+ { AArch64_ST1Threev16b_POST, "st1", ".16b", 1, false, 48 },
+ { AArch64_ST1Threev8h_POST, "st1", ".8h", 1, false, 48 },
+ { AArch64_ST1Threev4s_POST, "st1", ".4s", 1, false, 48 },
+ { AArch64_ST1Threev2d_POST, "st1", ".2d", 1, false, 48 },
+ { AArch64_ST1Threev8b_POST, "st1", ".8b", 1, false, 24 },
+ { AArch64_ST1Threev4h_POST, "st1", ".4h", 1, false, 24 },
+ { AArch64_ST1Threev2s_POST, "st1", ".2s", 1, false, 24 },
+ { AArch64_ST1Threev1d_POST, "st1", ".1d", 1, false, 24 },
+ { AArch64_ST1Fourv16b, "st1", ".16b", 0, false, 0 },
+ { AArch64_ST1Fourv8h, "st1", ".8h", 0, false, 0 },
+ { AArch64_ST1Fourv4s, "st1", ".4s", 0, false, 0 },
+ { AArch64_ST1Fourv2d, "st1", ".2d", 0, false, 0 },
+ { AArch64_ST1Fourv8b, "st1", ".8b", 0, false, 0 },
+ { AArch64_ST1Fourv4h, "st1", ".4h", 0, false, 0 },
+ { AArch64_ST1Fourv2s, "st1", ".2s", 0, false, 0 },
+ { AArch64_ST1Fourv1d, "st1", ".1d", 0, false, 0 },
+ { AArch64_ST1Fourv16b_POST, "st1", ".16b", 1, false, 64 },
+ { AArch64_ST1Fourv8h_POST, "st1", ".8h", 1, false, 64 },
+ { AArch64_ST1Fourv4s_POST, "st1", ".4s", 1, false, 64 },
+ { AArch64_ST1Fourv2d_POST, "st1", ".2d", 1, false, 64 },
+ { AArch64_ST1Fourv8b_POST, "st1", ".8b", 1, false, 32 },
+ { AArch64_ST1Fourv4h_POST, "st1", ".4h", 1, false, 32 },
+ { AArch64_ST1Fourv2s_POST, "st1", ".2s", 1, false, 32 },
+ { AArch64_ST1Fourv1d_POST, "st1", ".1d", 1, false, 32 },
+ { AArch64_ST2i8, "st2", ".b", 0, true, 0 },
+ { AArch64_ST2i16, "st2", ".h", 0, true, 0 },
+ { AArch64_ST2i32, "st2", ".s", 0, true, 0 },
+ { AArch64_ST2i64, "st2", ".d", 0, true, 0 },
+ { AArch64_ST2i8_POST, "st2", ".b", 1, true, 2 },
+ { AArch64_ST2i16_POST, "st2", ".h", 1, true, 4 },
+ { AArch64_ST2i32_POST, "st2", ".s", 1, true, 8 },
+ { AArch64_ST2i64_POST, "st2", ".d", 1, true, 16 },
+ { AArch64_ST2Twov16b, "st2", ".16b", 0, false, 0 },
+ { AArch64_ST2Twov8h, "st2", ".8h", 0, false, 0 },
+ { AArch64_ST2Twov4s, "st2", ".4s", 0, false, 0 },
+ { AArch64_ST2Twov2d, "st2", ".2d", 0, false, 0 },
+ { AArch64_ST2Twov8b, "st2", ".8b", 0, false, 0 },
+ { AArch64_ST2Twov4h, "st2", ".4h", 0, false, 0 },
+ { AArch64_ST2Twov2s, "st2", ".2s", 0, false, 0 },
+ { AArch64_ST2Twov16b_POST, "st2", ".16b", 1, false, 32 },
+ { AArch64_ST2Twov8h_POST, "st2", ".8h", 1, false, 32 },
+ { AArch64_ST2Twov4s_POST, "st2", ".4s", 1, false, 32 },
+ { AArch64_ST2Twov2d_POST, "st2", ".2d", 1, false, 32 },
+ { AArch64_ST2Twov8b_POST, "st2", ".8b", 1, false, 16 },
+ { AArch64_ST2Twov4h_POST, "st2", ".4h", 1, false, 16 },
+ { AArch64_ST2Twov2s_POST, "st2", ".2s", 1, false, 16 },
+ { AArch64_ST3i8, "st3", ".b", 0, true, 0 },
+ { AArch64_ST3i16, "st3", ".h", 0, true, 0 },
+ { AArch64_ST3i32, "st3", ".s", 0, true, 0 },
+ { AArch64_ST3i64, "st3", ".d", 0, true, 0 },
+ { AArch64_ST3i8_POST, "st3", ".b", 1, true, 3 },
+ { AArch64_ST3i16_POST, "st3", ".h", 1, true, 6 },
+ { AArch64_ST3i32_POST, "st3", ".s", 1, true, 12 },
+ { AArch64_ST3i64_POST, "st3", ".d", 1, true, 24 },
+ { AArch64_ST3Threev16b, "st3", ".16b", 0, false, 0 },
+ { AArch64_ST3Threev8h, "st3", ".8h", 0, false, 0 },
+ { AArch64_ST3Threev4s, "st3", ".4s", 0, false, 0 },
+ { AArch64_ST3Threev2d, "st3", ".2d", 0, false, 0 },
+ { AArch64_ST3Threev8b, "st3", ".8b", 0, false, 0 },
+ { AArch64_ST3Threev4h, "st3", ".4h", 0, false, 0 },
+ { AArch64_ST3Threev2s, "st3", ".2s", 0, false, 0 },
+ { AArch64_ST3Threev16b_POST, "st3", ".16b", 1, false, 48 },
+ { AArch64_ST3Threev8h_POST, "st3", ".8h", 1, false, 48 },
+ { AArch64_ST3Threev4s_POST, "st3", ".4s", 1, false, 48 },
+ { AArch64_ST3Threev2d_POST, "st3", ".2d", 1, false, 48 },
+ { AArch64_ST3Threev8b_POST, "st3", ".8b", 1, false, 24 },
+ { AArch64_ST3Threev4h_POST, "st3", ".4h", 1, false, 24 },
+ { AArch64_ST3Threev2s_POST, "st3", ".2s", 1, false, 24 },
+ { AArch64_ST4i8, "st4", ".b", 0, true, 0 },
+ { AArch64_ST4i16, "st4", ".h", 0, true, 0 },
+ { AArch64_ST4i32, "st4", ".s", 0, true, 0 },
+ { AArch64_ST4i64, "st4", ".d", 0, true, 0 },
+ { AArch64_ST4i8_POST, "st4", ".b", 1, true, 4 },
+ { AArch64_ST4i16_POST, "st4", ".h", 1, true, 8 },
+ { AArch64_ST4i32_POST, "st4", ".s", 1, true, 16 },
+ { AArch64_ST4i64_POST, "st4", ".d", 1, true, 32 },
+ { AArch64_ST4Fourv16b, "st4", ".16b", 0, false, 0 },
+ { AArch64_ST4Fourv8h, "st4", ".8h", 0, false, 0 },
+ { AArch64_ST4Fourv4s, "st4", ".4s", 0, false, 0 },
+ { AArch64_ST4Fourv2d, "st4", ".2d", 0, false, 0 },
+ { AArch64_ST4Fourv8b, "st4", ".8b", 0, false, 0 },
+ { AArch64_ST4Fourv4h, "st4", ".4h", 0, false, 0 },
+ { AArch64_ST4Fourv2s, "st4", ".2s", 0, false, 0 },
+ { AArch64_ST4Fourv16b_POST, "st4", ".16b", 1, false, 64 },
+ { AArch64_ST4Fourv8h_POST, "st4", ".8h", 1, false, 64 },
+ { AArch64_ST4Fourv4s_POST, "st4", ".4s", 1, false, 64 },
+ { AArch64_ST4Fourv2d_POST, "st4", ".2d", 1, false, 64 },
+ { AArch64_ST4Fourv8b_POST, "st4", ".8b", 1, false, 32 },
+ { AArch64_ST4Fourv4h_POST, "st4", ".4h", 1, false, 32 },
+ { AArch64_ST4Fourv2s_POST, "st4", ".2s", 1, false, 32 },
+};
+
+static LdStNInstrDesc *getLdStNInstrDesc(unsigned Opcode)
+{
+ unsigned Idx;
+
+ for (Idx = 0; Idx != ARR_SIZE(LdStNInstInfo); ++Idx)
+ if (LdStNInstInfo[Idx].Opcode == Opcode)
+ return &LdStNInstInfo[Idx];
+
+ return NULL;
+}
+
+static void printAMNoIndex(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ SStream_concat(O, "[%s]", getRegisterName(MCOperand_getReg(MCInst_getOperand(MI, OpNum)), AArch64_NoRegAltName));
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = MCInst_getOperand(MI, OpNum);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG_INVALID;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = 0;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+}
+
+static void printAMIndexedWB(MCInst *MI, unsigned OpNum, unsigned Scale, SStream *O)
+{
+ MCOperand *MO1 = MCInst_getOperand(MI, OpNum + 1);
+
+ SStream_concat(O, "[%s", getRegisterName(MCOperand_getReg(MCInst_getOperand(MI, OpNum)), AArch64_NoRegAltName));
+
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG_INVALID;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = 0;
+ }
+
+ if (MCOperand_isImm(MO1)) {
+ int64_t val = Scale * MCOperand_getImm(MO1);
+ printInt64Bang(O, val);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = val;
+ }
+ }
+
+ SStream_concat0(O, "]");
+
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+}
+
+static void printImplicitlyTypedVectorList(MCInst *MI, unsigned OpNum, SStream *O, MCRegisterInfo *MRI)
+{
+ printVectorList(MI, OpNum, O, "", MRI, 0, 0);
+}
+
+#endif
+
+static bool printSysAlias(MCInst *MI, SStream *O)
+{
+ // unsigned Opcode = MCInst_getOpcode(MI);
+ //assert(Opcode == AArch64_SYSxt && "Invalid opcode for SYS alias!");
+
+ char *Asm = NULL;
+ MCOperand *Op1 = MCInst_getOperand(MI, 0);
+ MCOperand *Cn = MCInst_getOperand(MI, 1);
+ MCOperand *Cm = MCInst_getOperand(MI, 2);
+ MCOperand *Op2 = MCInst_getOperand(MI, 3);
+
+ unsigned Op1Val = MCOperand_getImm(Op1);
+ unsigned CnVal = MCOperand_getImm(Cn);
+ unsigned CmVal = MCOperand_getImm(Cm);
+ unsigned Op2Val = MCOperand_getImm(Op2);
+ unsigned insn_id, op_ic = 0, op_dc = 0, op_at = 0, op_tlbi = 0;
+
+ if (CnVal == 7) {
+ switch (CmVal) {
+ default:
+ break;
+
+ // IC aliases
+ case 1:
+ if (Op1Val == 0 && Op2Val == 0) {
+ Asm = "ic\tialluis";
+ insn_id = ARM64_INS_IC;
+ op_ic = ARM64_IC_IALLUIS;
+ }
+ break;
+ case 5:
+ if (Op1Val == 0 && Op2Val == 0) {
+ Asm = "ic\tiallu";
+ insn_id = ARM64_INS_IC;
+ op_ic = ARM64_IC_IALLU;
+ } else if (Op1Val == 3 && Op2Val == 1) {
+ Asm = "ic\tivau";
+ insn_id = ARM64_INS_IC;
+ op_ic = ARM64_IC_IVAU;
+ }
+ break;
+
+ // DC aliases
+ case 4:
+ if (Op1Val == 3 && Op2Val == 1) {
+ Asm = "dc\tzva";
+ insn_id = ARM64_INS_DC;
+ op_dc = ARM64_DC_ZVA;
+ }
+ break;
+ case 6:
+ if (Op1Val == 0 && Op2Val == 1) {
+ Asm = "dc\tivac";
+ insn_id = ARM64_INS_DC;
+ op_dc = ARM64_DC_IVAC;
+ }
+ if (Op1Val == 0 && Op2Val == 2) {
+ Asm = "dc\tisw";
+ insn_id = ARM64_INS_DC;
+ op_dc = ARM64_DC_ISW;
+ }
+ break;
+ case 10:
+ if (Op1Val == 3 && Op2Val == 1) {
+ Asm = "dc\tcvac";
+ insn_id = ARM64_INS_DC;
+ op_dc = ARM64_DC_CVAC;
+ } else if (Op1Val == 0 && Op2Val == 2) {
+ Asm = "dc\tcsw";
+ insn_id = ARM64_INS_DC;
+ op_dc = ARM64_DC_CSW;
+ }
+ break;
+ case 11:
+ if (Op1Val == 3 && Op2Val == 1) {
+ Asm = "dc\tcvau";
+ insn_id = ARM64_INS_DC;
+ op_dc = ARM64_DC_CVAU;
+ }
+ break;
+ case 14:
+ if (Op1Val == 3 && Op2Val == 1) {
+ Asm = "dc\tcivac";
+ insn_id = ARM64_INS_DC;
+ op_dc = ARM64_DC_CIVAC;
+ } else if (Op1Val == 0 && Op2Val == 2) {
+ Asm = "dc\tcisw";
+ insn_id = ARM64_INS_DC;
+ op_dc = ARM64_DC_CISW;
+ }
+ break;
+
+ // AT aliases
+ case 8:
+ switch (Op1Val) {
+ default:
+ break;
+ case 0:
+ switch (Op2Val) {
+ default:
+ break;
+ case 0: Asm = "at\ts1e1r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E1R; break;
+ case 1: Asm = "at\ts1e1w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E1W; break;
+ case 2: Asm = "at\ts1e0r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E0R; break;
+ case 3: Asm = "at\ts1e0w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E0W; break;
+ }
+ break;
+ case 4:
+ switch (Op2Val) {
+ default:
+ break;
+ case 0: Asm = "at\ts1e2r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E2R; break;
+ case 1: Asm = "at\ts1e2w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E2W; break;
+ case 4: Asm = "at\ts12e1r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E1R; break;
+ case 5: Asm = "at\ts12e1w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E1W; break;
+ case 6: Asm = "at\ts12e0r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E0R; break;
+ case 7: Asm = "at\ts12e0w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E0W; break;
+ }
+ break;
+ case 6:
+ switch (Op2Val) {
+ default:
+ break;
+ case 0: Asm = "at\ts1e3r"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E3R; break;
+ case 1: Asm = "at\ts1e3w"; insn_id = ARM64_INS_AT; op_at = ARM64_AT_S1E3W; break;
+ }
+ break;
+ }
+ break;
+ }
+ } else if (CnVal == 8) {
+ // TLBI aliases
+ switch (CmVal) {
+ default:
+ break;
+ case 3:
+ switch (Op1Val) {
+ default:
+ break;
+ case 0:
+ switch (Op2Val) {
+ default:
+ break;
+ case 0: Asm = "tlbi\tvmalle1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VMALLE1IS; break;
+ case 1: Asm = "tlbi\tvae1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE1IS; break;
+ case 2: Asm = "tlbi\taside1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ASIDE1IS; break;
+ case 3: Asm = "tlbi\tvaae1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAAE1IS; break;
+ case 5: Asm = "tlbi\tvale1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE1IS; break;
+ case 7: Asm = "tlbi\tvaale1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAALE1IS; break;
+ }
+ break;
+ case 4:
+ switch (Op2Val) {
+ default:
+ break;
+ case 0: Asm = "tlbi\talle2is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE2IS; break;
+ case 1: Asm = "tlbi\tvae2is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE2IS; break;
+ case 4: Asm = "tlbi\talle1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE1IS; break;
+ case 5: Asm = "tlbi\tvale2is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE2IS; break;
+ case 6: Asm = "tlbi\tvmalls12e1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VMALLS12E1IS; break;
+ }
+ break;
+ case 6:
+ switch (Op2Val) {
+ default:
+ break;
+ case 0: Asm = "tlbi\talle3is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE3IS; break;
+ case 1: Asm = "tlbi\tvae3is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE3IS; break;
+ case 5: Asm = "tlbi\tvale3is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE3IS; break;
+ }
+ break;
+ }
+ break;
+ case 0:
+ switch (Op1Val) {
+ default:
+ break;
+ case 4:
+ switch (Op2Val) {
+ default:
+ break;
+ case 1: Asm = "tlbi\tipas2e1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_IPAS2E1IS; break;
+ case 5: Asm = "tlbi\tipas2le1is"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_IPAS2LE1IS; break;
+ }
+ break;
+ }
+ break;
+ case 4:
+ switch (Op1Val) {
+ default:
+ break;
+ case 4:
+ switch (Op2Val) {
+ default:
+ break;
+ case 1: Asm = "tlbi\tipas2e1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_IPAS2E1; break;
+ case 5: Asm = "tlbi\tipas2le1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_IPAS2LE1; break;
+ }
+ break;
+ }
+ break;
+ case 7:
+ switch (Op1Val) {
+ default:
+ break;
+ case 0:
+ switch (Op2Val) {
+ default:
+ break;
+ case 0: Asm = "tlbi\tvmalle1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VMALLE1; break;
+ case 1: Asm = "tlbi\tvae1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE1; break;
+ case 2: Asm = "tlbi\taside1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ASIDE1; break;
+ case 3: Asm = "tlbi\tvaae1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAAE1; break;
+ case 5: Asm = "tlbi\tvale1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE1; break;
+ case 7: Asm = "tlbi\tvaale1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAALE1; break;
+ }
+ break;
+ case 4:
+ switch (Op2Val) {
+ default:
+ break;
+ case 0: Asm = "tlbi\talle2"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE2; break;
+ case 1: Asm = "tlbi\tvae2"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE2; break;
+ case 4: Asm = "tlbi\talle1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE1; break;
+ case 5: Asm = "tlbi\tvale2"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE2; break;
+ case 6: Asm = "tlbi\tvmalls12e1"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VMALLS12E1; break;
+ }
+ break;
+ case 6:
+ switch (Op2Val) {
+ default:
+ break;
+ case 0: Asm = "tlbi\talle3"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_ALLE3; break;
+ case 1: Asm = "tlbi\tvae3"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VAE3; break;
+ case 5: Asm = "tlbi\tvale3"; insn_id = ARM64_INS_TLBI; op_tlbi = ARM64_TLBI_VALE3; break;
+ }
+ break;
+ }
+ break;
+ }
+ }
+
+ if (Asm) {
+ MCInst_setOpcodePub(MI, insn_id);
+ SStream_concat0(O, Asm);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_SYS;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].sys = op_ic + op_dc + op_at + op_tlbi;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+
+ if (!strstr(Asm, "all")) {
+ unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, 4));
+ SStream_concat(O, ", %s", getRegisterName(Reg, AArch64_NoRegAltName));
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
}
}
}
-}
-static void printShiftOperand(MCInst *MI, unsigned OpNum,
- SStream *O, A64SE_ShiftExtSpecifiers Shift)
-{
- MCOperand *MO = MCInst_getOperand(MI, OpNum);
- unsigned int imm;
-
- // LSL #0 is not printed
- if (Shift == A64SE_LSL && MCOperand_isImm(MO) && MCOperand_getImm(MO) == 0)
- return;
-
- switch (Shift) {
- case A64SE_LSL: SStream_concat0(O, "lsl"); break;
- case A64SE_LSR: SStream_concat0(O, "lsr"); break;
- case A64SE_ASR: SStream_concat0(O, "asr"); break;
- case A64SE_ROR: SStream_concat0(O, "ror"); break;
- default: break; // llvm_unreachable("Invalid shift specifier in logical instruction");
- }
-
- imm = (unsigned int)MCOperand_getImm(MO);
- if (imm > HEX_THRESHOLD)
- SStream_concat(O, " #0x%x", imm);
- else
- SStream_concat(O, " #%u", imm);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = Shift + 1;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = imm;
- }
-}
-
-static void printMoveWideImmOperand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *UImm16MO = MCInst_getOperand(MI, OpNum);
- MCOperand *ShiftMO = MCInst_getOperand(MI, OpNum + 1);
-
- if (MCOperand_isImm(UImm16MO)) {
- uint64_t imm = MCOperand_getImm(UImm16MO);
- if (imm > HEX_THRESHOLD)
- SStream_concat(O, "#0x%"PRIx64, imm);
- else
- SStream_concat(O, "#%"PRIu64, imm);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int32_t)imm;
- MI->flat_insn->detail->arm64.op_count++;
- }
-
- if (MCOperand_getImm(ShiftMO) != 0) {
- unsigned int shift = (unsigned int)MCOperand_getImm(ShiftMO) * 16;
- if (shift > HEX_THRESHOLD)
- SStream_concat(O, ", lsl #0x%x", shift);
- else
- SStream_concat(O, ", lsl #%u", shift);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = shift;
- }
- }
-
- return;
- }
-}
-
-static void printNamedImmOperand(MCInst *MI, unsigned OpNum, SStream *O, NamedImmMapper *Mapper)
-{
- bool ValidName;
- MCOperand *MO = MCInst_getOperand(MI, OpNum);
- char *Name = NamedImmMapper_toString(Mapper, (uint32_t)MCOperand_getImm(MO), &ValidName);
-
- if (ValidName)
- SStream_concat0(O, Name);
- else {
- uint64_t imm = MCOperand_getImm(MO);
- if (imm > HEX_THRESHOLD)
- SStream_concat(O, "#0x%"PRIx64, imm);
- else
- SStream_concat(O, "#%"PRIu64, imm);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int32_t)imm;
- MI->flat_insn->detail->arm64.op_count++;
- }
- }
-}
-
-static void printSysRegOperand(SysRegMapper *Mapper,
- MCInst *MI, unsigned OpNum, SStream *O)
-{
- bool ValidName;
- char Name[128];
-
- MCOperand *MO = MCInst_getOperand(MI, OpNum);
-
- SysRegMapper_toString(Mapper, (uint32_t)MCOperand_getImm(MO), &ValidName, Name);
- if (ValidName) {
- SStream_concat0(O, Name);
- }
-}
-
-#define GET_REGINFO_ENUM
-#include "AArch64GenRegisterInfo.inc"
-
-static inline bool isStackReg(unsigned RegNo)
-{
- return RegNo == AArch64_XSP || RegNo == AArch64_WSP;
-}
-
-static void printRegExtendOperand(MCInst *MI, unsigned OpNum, SStream *O,
- A64SE_ShiftExtSpecifiers Ext)
-{
- // FIXME: In principle TableGen should be able to detect this itself far more
- // easily. We will only accumulate more of these hacks.
- unsigned Reg0 = MCOperand_getReg(MCInst_getOperand(MI, 0));
- unsigned Reg1 = MCOperand_getReg(MCInst_getOperand(MI, 1));
- MCOperand *MO;
-
- if (isStackReg(Reg0) || isStackReg(Reg1)) {
- A64SE_ShiftExtSpecifiers LSLEquiv;
-
- if (Reg0 == AArch64_XSP || Reg1 == AArch64_XSP)
- LSLEquiv = A64SE_UXTX;
- else
- LSLEquiv = A64SE_UXTW;
-
- if (Ext == LSLEquiv) {
- unsigned int shift = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
- if (shift > HEX_THRESHOLD)
- SStream_concat(O, "lsl #0x%x", shift);
- else
- SStream_concat(O, "lsl #%u", shift);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = shift;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].ext = Ext - 4;
- }
- return;
- }
- }
-
- switch (Ext) {
- case A64SE_UXTB: SStream_concat0(O, "uxtb"); break;
- case A64SE_UXTH: SStream_concat0(O, "uxth"); break;
- case A64SE_UXTW: SStream_concat0(O, "uxtw"); break;
- case A64SE_UXTX: SStream_concat0(O, "uxtx"); break;
- case A64SE_SXTB: SStream_concat0(O, "sxtb"); break;
- case A64SE_SXTH: SStream_concat0(O, "sxth"); break;
- case A64SE_SXTW: SStream_concat0(O, "sxtw"); break;
- case A64SE_SXTX: SStream_concat0(O, "sxtx"); break;
- default: break; //llvm_unreachable("Unexpected shift type for printing");
- }
-
- if (MI->csh->detail)
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].ext = Ext - 4;
- MO = MCInst_getOperand(MI, OpNum);
- if (MCOperand_getImm(MO) != 0) {
- unsigned int shift = (unsigned int)MCOperand_getImm(MO);
- if (shift > HEX_THRESHOLD)
- SStream_concat(O, " #0x%x", shift);
- else
- SStream_concat(O, " #%u", shift);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = shift;
- }
- }
-}
-
-static void printSImm7ScaledOperand(MCInst *MI, unsigned OpNum,
- SStream *O, int MemScale)
-{
- MCOperand *MOImm = MCInst_getOperand(MI, OpNum);
- int32_t Imm = (int32_t)unpackSignedImm(7, MCOperand_getImm(MOImm));
- int64_t res;
-
- res = (int64_t)Imm * MemScale;
- if (res >= 0) {
- if (res > HEX_THRESHOLD)
- SStream_concat(O, "#0x%"PRIx64, res);
- else
- SStream_concat(O, "#%"PRIu64, res);
- } else {
- if (res < -HEX_THRESHOLD)
- SStream_concat(O, "#-0x%"PRIx64, -res);
- else
- SStream_concat(O, "#-%"PRIu64, -res);
- }
-
- if (MI->csh->detail) {
- if (MI->csh->doing_mem) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)res;
- } else {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int32_t)res;
- MI->flat_insn->detail->arm64.op_count++;
- }
- }
-}
-
-// TODO: handle this Vd register??
-static void printVPRRegister(MCInst *MI, unsigned OpNo, SStream *O)
-{
- unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNo));
-#ifndef CAPSTONE_DIET
- char *Name = cs_strdup(getRegisterName(Reg));
- Name[0] = 'v';
- SStream_concat0(O, Name);
- cs_mem_free(Name);
-#endif
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
- MI->flat_insn->detail->arm64.op_count++;
- }
+ return Asm != NULL;
}
static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNo);
+
if (MCOperand_isReg(Op)) {
unsigned Reg = MCOperand_getReg(Op);
- SStream_concat0(O, getRegisterName(Reg));
+ SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName));
if (MI->csh->detail) {
if (MI->csh->doing_mem) {
if (MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base == ARM64_REG_INVALID) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = Reg;
- } else {
+ }
+ else if (MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index == ARM64_REG_INVALID) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = Reg;
}
} else {
@@ -631,222 +1052,766 @@
}
}
} else if (MCOperand_isImm(Op)) {
- int64_t imm = MCOperand_getImm(Op);
- if (imm >= 0) {
- if (imm > HEX_THRESHOLD)
- SStream_concat(O, "#0x%"PRIx64, imm);
- else
- SStream_concat(O, "#%"PRIu64, imm);
- } else {
- if (imm < -HEX_THRESHOLD)
- SStream_concat(O, "#-0x%"PRIx64, -imm);
- else
- SStream_concat(O, "#-%"PRIu64, -imm);
- }
-
+ int imm = (int)MCOperand_getImm(Op);
+ printInt32Bang(O, imm);
if (MI->csh->detail) {
if (MI->csh->doing_mem) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)imm;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = imm;
} else {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int32_t)imm;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm;
MI->flat_insn->detail->arm64.op_count++;
}
}
}
}
-#define GET_INSTRINFO_ENUM
-#include "AArch64GenInstrInfo.inc"
+static void printHexImm(MCInst *MI, unsigned OpNo, SStream *O)
+{
+ MCOperand *Op = MCInst_getOperand(MI, OpNo);
+ SStream_concat(O, "#%#llx", MCOperand_getImm(Op));
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op);
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+}
-static void printNeonMovImmShiftOperand(MCInst *MI, unsigned OpNum,
- SStream *O, A64SE_ShiftExtSpecifiers Ext, bool isHalf)
+static void printPostIncOperand(MCInst *MI, unsigned OpNo,
+ unsigned Imm, SStream *O)
+{
+ MCOperand *Op = MCInst_getOperand(MI, OpNo);
+
+ if (MCOperand_isReg(Op)) {
+ unsigned Reg = MCOperand_getReg(Op);
+ if (Reg == AArch64_XZR) {
+ printInt32Bang(O, Imm);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Imm;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ } else {
+ SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName));
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ }
+ }
+ //llvm_unreachable("unknown operand kind in printPostIncOperand64");
+}
+
+static void printPostIncOperand2(MCInst *MI, unsigned OpNo, SStream *O, int Amount)
+{
+ printPostIncOperand(MI, OpNo, Amount, O);
+}
+
+static void printVRegOperand(MCInst *MI, unsigned OpNo, SStream *O)
+{
+ MCOperand *Op = MCInst_getOperand(MI, OpNo);
+ //assert(Op.isReg() && "Non-register vreg operand!");
+ unsigned Reg = MCOperand_getReg(Op);
+ SStream_concat0(O, getRegisterName(Reg, AArch64_vreg));
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = AArch64_map_vregister(Reg);
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+}
+
+static void printSysCROperand(MCInst *MI, unsigned OpNo, SStream *O)
+{
+ MCOperand *Op = MCInst_getOperand(MI, OpNo);
+ //assert(Op.isImm() && "System instruction C[nm] operands must be immediates!");
+ SStream_concat(O, "c%u", MCOperand_getImm(Op));
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_CIMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op);
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+}
+
+static void printAddSubImm(MCInst *MI, unsigned OpNum, SStream *O)
{
MCOperand *MO = MCInst_getOperand(MI, OpNum);
- int64_t Imm;
- //assert(MO.isImm() &&
- // "Immediate operand required for Neon vector immediate inst.");
+ if (MCOperand_isImm(MO)) {
+ unsigned Val = (MCOperand_getImm(MO) & 0xfff);
+ //assert(Val == MO.getImm() && "Add/sub immediate out of range!");
+ unsigned Shift = AArch64_AM_getShiftValue(MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)));
- bool IsLSL = false;
- if (Ext == A64SE_LSL)
- IsLSL = true;
- else if (Ext != A64SE_MSL) {
- //llvm_unreachable("Invalid shift specifier in movi instruction");
+ printInt32Bang(O, Val);
+
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+
+ if (Shift != 0)
+ printShifter(MI, OpNum + 1, O);
}
+}
- Imm = MCOperand_getImm(MO);
+static void printLogicalImm32(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ uint64_t Val = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
- // MSL and LSLH accepts encoded shift amount 0 or 1.
- if ((!IsLSL || (IsLSL && isHalf)) && Imm != 0 && Imm != 1) {
- // llvm_unreachable("Invalid shift amount in movi instruction");
+ Val = AArch64_AM_decodeLogicalImmediate(Val, 32);
+ printInt32Bang(O, (int)Val);
+
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
+ MI->flat_insn->detail->arm64.op_count++;
}
+}
- // LSH accepts encoded shift amount 0, 1, 2 or 3.
- if (IsLSL && (Imm < 0 || Imm > 3)) {
- //llvm_unreachable("Invalid shift amount in movi instruction");
+static void printLogicalImm64(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ uint64_t Val = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
+ Val = AArch64_AM_decodeLogicalImmediate(Val, 64);
+ printInt64Bang(O, Val);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
+ MI->flat_insn->detail->arm64.op_count++;
}
+}
- // Print shift amount as multiple of 8 with MSL encoded shift amount
- // 0 and 1 printed as 8 and 16.
- if (!IsLSL)
- Imm++;
- Imm *= 8;
+static void printShifter(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ unsigned Val = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
- // LSL #0 is not printed
- if (IsLSL) {
- if (Imm == 0)
+ // LSL #0 should not be printed.
+ if (AArch64_AM_getShiftType(Val) == AArch64_AM_LSL &&
+ AArch64_AM_getShiftValue(Val) == 0)
+ return;
+
+ SStream_concat(O, ", %s ", AArch64_AM_getShiftExtendName(AArch64_AM_getShiftType(Val)));
+ printInt32Bang(O, AArch64_AM_getShiftValue(Val));
+ if (MI->csh->detail) {
+ arm64_shifter shifter = ARM64_SFT_INVALID;
+ switch(AArch64_AM_getShiftType(Val)) {
+ default: // never reach
+ case AArch64_AM_LSL:
+ shifter = ARM64_SFT_LSL;
+ break;
+ case AArch64_AM_LSR:
+ shifter = ARM64_SFT_LSR;
+ break;
+ case AArch64_AM_ASR:
+ shifter = ARM64_SFT_ASR;
+ break;
+ case AArch64_AM_ROR:
+ shifter = ARM64_SFT_ROR;
+ break;
+ case AArch64_AM_MSL:
+ shifter = ARM64_SFT_MSL;
+ break;
+ }
+
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = shifter;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = AArch64_AM_getShiftValue(Val);
+ }
+}
+
+static void printShiftedRegister(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ SStream_concat0(O, getRegisterName(MCOperand_getReg(MCInst_getOperand(MI, OpNum)), AArch64_NoRegAltName));
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ printShifter(MI, OpNum + 1, O);
+}
+
+static void printArithExtend(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ unsigned Val = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
+ AArch64_AM_ShiftExtendType ExtType = AArch64_AM_getArithExtendType(Val);
+ unsigned ShiftVal = AArch64_AM_getArithShiftValue(Val);
+
+ // If the destination or first source register operand is [W]SP, print
+ // UXTW/UXTX as LSL, and if the shift amount is also zero, print nothing at
+ // all.
+ if (ExtType == AArch64_AM_UXTW || ExtType == AArch64_AM_UXTX) {
+ unsigned Dest = MCOperand_getReg(MCInst_getOperand(MI, 0));
+ unsigned Src1 = MCOperand_getReg(MCInst_getOperand(MI, 1));
+ if ( ((Dest == AArch64_SP || Src1 == AArch64_SP) &&
+ ExtType == AArch64_AM_UXTX) ||
+ ((Dest == AArch64_WSP || Src1 == AArch64_WSP) &&
+ ExtType == AArch64_AM_UXTW) ) {
+ if (ShiftVal != 0) {
+ SStream_concat0(O, ", lsl ");
+ printInt32Bang(O, ShiftVal);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = ShiftVal;
+ }
+ }
+
return;
- SStream_concat0(O, ", lsl");
- if (MI->csh->detail)
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
- } else {
- SStream_concat0(O, ", msl");
- if (MI->csh->detail)
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_MSL;
+ }
}
- if (Imm >= 0) {
- if (Imm > HEX_THRESHOLD)
- SStream_concat(O, " #0x%"PRIx64, Imm);
- else
- SStream_concat(O, " #%"PRIu64, Imm);
- } else {
- if (Imm < -HEX_THRESHOLD)
- SStream_concat(O, " #-0x%"PRIx64, -Imm);
- else
- SStream_concat(O, " #-%"PRIu64, -Imm);
+ SStream_concat(O, ", %s", AArch64_AM_getShiftExtendName(ExtType));
+ if (MI->csh->detail) {
+ arm64_extender ext = ARM64_EXT_INVALID;
+ switch(ExtType) {
+ default: // never reach
+ case AArch64_AM_UXTB:
+ ext = ARM64_EXT_UXTW;
+ break;
+ case AArch64_AM_UXTH:
+ ext = ARM64_EXT_UXTW;
+ break;
+ case AArch64_AM_UXTW:
+ ext = ARM64_EXT_UXTW;
+ break;
+ case AArch64_AM_UXTX:
+ ext = ARM64_EXT_UXTW;
+ break;
+ case AArch64_AM_SXTB:
+ ext = ARM64_EXT_UXTW;
+ break;
+ case AArch64_AM_SXTH:
+ ext = ARM64_EXT_UXTW;
+ break;
+ case AArch64_AM_SXTW:
+ ext = ARM64_EXT_UXTW;
+ break;
+ case AArch64_AM_SXTX:
+ ext = ARM64_EXT_UXTW;
+ break;
+ }
+
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].ext = ext;
}
+ if (ShiftVal != 0) {
+ SStream_concat0(O, " ");
+ printInt32Bang(O, ShiftVal);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = ShiftVal;
+ }
+ }
+}
+
+static void printExtendedRegister(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+
+ SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName));
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+
+ printArithExtend(MI, OpNum + 1, O);
+}
+
+static void printMemExtend(MCInst *MI, unsigned OpNum, SStream *O, char SrcRegKind, unsigned Width)
+{
+ unsigned SignExtend = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
+ unsigned DoShift = MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1));
+
+ // sxtw, sxtx, uxtw or lsl (== uxtx)
+ bool IsLSL = !SignExtend && SrcRegKind == 'x';
+ if (IsLSL) {
+ SStream_concat0(O, "lsl");
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.type = ARM64_SFT_LSL;
+ }
+ } else {
+ SStream_concat(O, "%cxt%c", (SignExtend ? 's' : 'u'), SrcRegKind);
+ if (MI->csh->detail) {
+ if (!SignExtend) {
+ switch(SrcRegKind) {
+ default: break;
+ case 'b':
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_UXTB;
+ break;
+ case 'h':
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_UXTH;
+ break;
+ case 'w':
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_UXTW;
+ break;
+ case 'x':
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_UXTX;
+ break;
+ }
+ } else {
+ switch(SrcRegKind) {
+ default: break;
+ case 'b':
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTB;
+ break;
+ case 'h':
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTH;
+ break;
+ case 'w':
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTW;
+ break;
+ case 'x':
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].ext = ARM64_EXT_SXTX;
+ break;
+ }
+ }
+ }
+ }
+
+ if (DoShift || IsLSL) {
+ SStream_concat(O, " #%u", Log2_32(Width / 8));
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.type = ARM64_SFT_LSL;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].shift.value = Log2_32(Width / 8);
+ }
+ }
+}
+
+static void printCondCode(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ A64CC_CondCode CC = (A64CC_CondCode)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
+ SStream_concat0(O, getCondCodeName(CC));
+
if (MI->csh->detail)
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = (unsigned int)Imm;
+ MI->flat_insn->detail->arm64.cc = (arm64_cc)(CC + 1);
}
-static void printNeonUImm0Operand(MCInst *MI, unsigned OpNum, SStream *O)
+static void printInverseCondCode(MCInst *MI, unsigned OpNum, SStream *O)
{
- SStream_concat0(O, "#0");
- // FIXME: vector ZERO
+ A64CC_CondCode CC = (A64CC_CondCode)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
+ SStream_concat0(O, getCondCodeName(getInvertedCondCode(CC)));
+
if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = 0;
- MI->flat_insn->detail->arm64.op_count++;
+ MI->flat_insn->detail->arm64.cc = (arm64_cc)(getInvertedCondCode(CC) + 1);
}
}
-static void printUImmHexOperand(MCInst *MI, unsigned OpNum, SStream *O)
+static void printImmScale(MCInst *MI, unsigned OpNum, SStream *O, int Scale)
{
- MCOperand *MOUImm = MCInst_getOperand(MI, OpNum);
+ int64_t val = Scale * MCOperand_getImm(MCInst_getOperand(MI, OpNum));
- //assert(MOUImm.isImm() &&
- // "Immediate operand required for Neon vector immediate inst.");
-
- unsigned Imm = (unsigned int)MCOperand_getImm(MOUImm);
-
- if (Imm > HEX_THRESHOLD)
- SStream_concat(O, "#0x%x", Imm);
- else
- SStream_concat(O, "#%u", Imm);
- if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Imm;
- MI->flat_insn->detail->arm64.op_count++;
- }
-}
-
-static void printUImmBareOperand(MCInst *MI, unsigned OpNum, SStream *O)
-{
- MCOperand *MOUImm = MCInst_getOperand(MI, OpNum);
-
- //assert(MOUImm.isImm()
- // && "Immediate operand required for Neon vector immediate inst.");
-
- unsigned Imm = (unsigned int)MCOperand_getImm(MOUImm);
- if (Imm > HEX_THRESHOLD)
- SStream_concat(O, "0x%x", Imm);
- else
- SStream_concat(O, "%u", Imm);
+ printInt64Bang(O, val);
if (MI->csh->detail) {
if (MI->csh->doing_mem) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = Imm;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = val;
} else {
- // FIXME: never has false branch??
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = val;
+ MI->flat_insn->detail->arm64.op_count++;
}
}
}
-static void printNeonUImm64MaskOperand(MCInst *MI, unsigned OpNum, SStream *O)
+static void printUImm12Offset(MCInst *MI, unsigned OpNum, unsigned Scale, SStream *O)
{
- MCOperand *MOUImm8 = MCInst_getOperand(MI, OpNum);
+ MCOperand *MO = MCInst_getOperand(MI, OpNum);
- //assert(MOUImm8.isImm() &&
- // "Immediate operand required for Neon vector immediate bytemask inst.");
-
- uint32_t UImm8 = (uint32_t)MCOperand_getImm(MOUImm8);
- uint64_t Mask = 0;
-
- // Replicates 0x00 or 0xff byte in a 64-bit vector
- unsigned ByteNum;
- for (ByteNum = 0; ByteNum < 8; ++ByteNum) {
- if ((UImm8 >> ByteNum) & 1)
- Mask |= (uint64_t)0xff << (8 * ByteNum);
+ if (MCOperand_isImm(MO)) {
+ int64_t val = Scale * MCOperand_getImm(MO);
+ printInt64Bang(O, val);
+ if (MI->csh->detail) {
+ if (MI->csh->doing_mem) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = val;
+ } else {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = val;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ }
}
+}
- if (Mask > HEX_THRESHOLD)
- SStream_concat(O, "#0x%"PRIx64, Mask);
- else
- SStream_concat(O, "#%"PRIu64, Mask);
+static void printUImm12Offset2(MCInst *MI, unsigned OpNum, SStream *O, int Scale)
+{
+ printUImm12Offset(MI, OpNum, Scale, O);
+}
+
+static void printPrefetchOp(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ unsigned prfop = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
+ bool Valid;
+ char *Name = A64NamedImmMapper_toString(&A64PRFM_PRFMMapper, prfop, &Valid);
+
+ if (Valid) {
+ SStream_concat0(O, Name);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_PREFETCH;
+ // we have to plus 1 to prfop because 0 is a valid value of prfop
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].prefetch = prfop + 1;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ } else {
+ printInt32Bang(O, prfop);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = prfop;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ }
+}
+
+static void printFPImmOperand(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ MCOperand *MO = MCInst_getOperand(MI, OpNum);
+ float FPImm = MCOperand_isFPImm(MO) ? MCOperand_getFPImm(MO) : AArch64_AM_getFPImmFloat(MCOperand_getImm(MO));
+
+ // 8 decimal places are enough to perfectly represent permitted floats.
+ SStream_concat(O, "#%.8f", FPImm);
if (MI->csh->detail) {
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
- MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int32_t)Mask;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_FP;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].fp = FPImm;
MI->flat_insn->detail->arm64.op_count++;
}
}
-static void printMRSOperand(MCInst *MI, unsigned OpNum, SStream *O)
+//static unsigned getNextVectorRegister(unsigned Reg, unsigned Stride = 1)
+static unsigned getNextVectorRegister(unsigned Reg, unsigned Stride)
{
- printSysRegOperand(&AArch64_MRSMapper, MI, OpNum, O);
+ while (Stride--) {
+ switch (Reg) {
+ default:
+ // llvm_unreachable("Vector register expected!");
+ case AArch64_Q0: Reg = AArch64_Q1; break;
+ case AArch64_Q1: Reg = AArch64_Q2; break;
+ case AArch64_Q2: Reg = AArch64_Q3; break;
+ case AArch64_Q3: Reg = AArch64_Q4; break;
+ case AArch64_Q4: Reg = AArch64_Q5; break;
+ case AArch64_Q5: Reg = AArch64_Q6; break;
+ case AArch64_Q6: Reg = AArch64_Q7; break;
+ case AArch64_Q7: Reg = AArch64_Q8; break;
+ case AArch64_Q8: Reg = AArch64_Q9; break;
+ case AArch64_Q9: Reg = AArch64_Q10; break;
+ case AArch64_Q10: Reg = AArch64_Q11; break;
+ case AArch64_Q11: Reg = AArch64_Q12; break;
+ case AArch64_Q12: Reg = AArch64_Q13; break;
+ case AArch64_Q13: Reg = AArch64_Q14; break;
+ case AArch64_Q14: Reg = AArch64_Q15; break;
+ case AArch64_Q15: Reg = AArch64_Q16; break;
+ case AArch64_Q16: Reg = AArch64_Q17; break;
+ case AArch64_Q17: Reg = AArch64_Q18; break;
+ case AArch64_Q18: Reg = AArch64_Q19; break;
+ case AArch64_Q19: Reg = AArch64_Q20; break;
+ case AArch64_Q20: Reg = AArch64_Q21; break;
+ case AArch64_Q21: Reg = AArch64_Q22; break;
+ case AArch64_Q22: Reg = AArch64_Q23; break;
+ case AArch64_Q23: Reg = AArch64_Q24; break;
+ case AArch64_Q24: Reg = AArch64_Q25; break;
+ case AArch64_Q25: Reg = AArch64_Q26; break;
+ case AArch64_Q26: Reg = AArch64_Q27; break;
+ case AArch64_Q27: Reg = AArch64_Q28; break;
+ case AArch64_Q28: Reg = AArch64_Q29; break;
+ case AArch64_Q29: Reg = AArch64_Q30; break;
+ case AArch64_Q30: Reg = AArch64_Q31; break;
+ // Vector lists can wrap around.
+ case AArch64_Q31: Reg = AArch64_Q0; break;
+ }
+ }
+
+ return Reg;
}
-static void printMSROperand(MCInst *MI, unsigned OpNum, SStream *O)
+static void printVectorList(MCInst *MI, unsigned OpNum, SStream *O, char *LayoutSuffix, MCRegisterInfo *MRI, arm64_vas vas, arm64_vess vess)
{
- printSysRegOperand(&AArch64_MSRMapper, MI, OpNum, O);
-}
-
-// If Count > 1, there are two valid kinds of vector list:
-// (1) {Vn.layout, Vn+1.layout, ... , Vm.layout}
-// (2) {Vn.layout - Vm.layout}
-// We choose the first kind as output.
-static void printVectorList(MCInst *MI, unsigned OpNum,
- SStream *O, A64Layout_VectorLayout Layout, unsigned Count, MCRegisterInfo *MRI)
-{
-#ifndef CAPSTONE_DIET
- //assert(Count >= 1 && Count <= 4 && "Invalid Number of Vectors");
+#define GETREGCLASS_CONTAIN0(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), _reg)
unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
- const char *LayoutStr = A64VectorLayoutToString(Layout);
- SStream_concat0(O, "{");
- if (Count > 1) { // Print sub registers separately
- bool IsVec64 = (Layout < A64Layout_VL_16B);
- unsigned SubRegIdx = IsVec64 ? AArch64_dsub_0 : AArch64_qsub_0;
- unsigned I;
- for (I = 0; I < Count; I++) {
- char *Name = cs_strdup(getRegisterName(MCRegisterInfo_getSubReg(MRI, Reg, SubRegIdx++)));
- Name[0] = 'v';
- SStream_concat(O, "%s%s", Name, LayoutStr);
- if (I != Count - 1)
- SStream_concat0(O, ", ");
- cs_mem_free(Name);
- }
- } else { // Print the register directly when NumVecs is 1.
- char *Name = cs_strdup(getRegisterName(Reg));
- Name[0] = 'v';
- SStream_concat(O, "%s%s", Name, LayoutStr);
- cs_mem_free(Name);
+ unsigned NumRegs = 1, FirstReg, i;
+
+ SStream_concat0(O, "{ ");
+
+ // Work out how many registers there are in the list (if there is an actual
+ // list).
+ if (GETREGCLASS_CONTAIN0(AArch64_DDRegClassID , Reg) ||
+ GETREGCLASS_CONTAIN0(AArch64_QQRegClassID, Reg))
+ NumRegs = 2;
+ else if (GETREGCLASS_CONTAIN0(AArch64_DDDRegClassID, Reg) ||
+ GETREGCLASS_CONTAIN0(AArch64_QQQRegClassID, Reg))
+ NumRegs = 3;
+ else if (GETREGCLASS_CONTAIN0(AArch64_DDDDRegClassID, Reg) ||
+ GETREGCLASS_CONTAIN0(AArch64_QQQQRegClassID, Reg))
+ NumRegs = 4;
+
+ // Now forget about the list and find out what the first register is.
+ if ((FirstReg = MCRegisterInfo_getSubReg(MRI, Reg, AArch64_dsub0)))
+ Reg = FirstReg;
+ else if ((FirstReg = MCRegisterInfo_getSubReg(MRI, Reg, AArch64_qsub0)))
+ Reg = FirstReg;
+
+ // If it's a D-reg, we need to promote it to the equivalent Q-reg before
+ // printing (otherwise getRegisterName fails).
+ if (GETREGCLASS_CONTAIN0(AArch64_FPR64RegClassID, Reg)) {
+ MCRegisterClass *FPR128RC = MCRegisterInfo_getRegClass(MRI, AArch64_FPR128RegClassID);
+ Reg = MCRegisterInfo_getMatchingSuperReg(MRI, Reg, AArch64_dsub, FPR128RC);
}
- SStream_concat0(O, "}");
+
+ for (i = 0; i < NumRegs; ++i, Reg = getNextVectorRegister(Reg, 1)) {
+ SStream_concat(O, "%s%s", getRegisterName(Reg, AArch64_vreg), LayoutSuffix);
+ if (i + 1 != NumRegs)
+ SStream_concat0(O, ", ");
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = AArch64_map_vregister(Reg);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].vas = vas;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].vess = vess;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ }
+
+ SStream_concat0(O, " }");
+}
+
+static void printTypedVectorList(MCInst *MI, unsigned OpNum, SStream *O, unsigned NumLanes, char LaneKind, MCRegisterInfo *MRI)
+{
+ char Suffix[32];
+ arm64_vas vas = 0;
+ arm64_vess vess = 0;
+
+ if (NumLanes) {
+ snprintf(Suffix, sizeof(Suffix), ".%u%c", NumLanes, LaneKind);
+ switch(LaneKind) {
+ default: break;
+ case 'b':
+ switch(NumLanes) {
+ default: break;
+ case 8:
+ vas = ARM64_VAS_8B;
+ break;
+ case 16:
+ vas = ARM64_VAS_16B;
+ break;
+ }
+ break;
+ case 'h':
+ switch(NumLanes) {
+ default: break;
+ case 4:
+ vas = ARM64_VAS_4H;
+ break;
+ case 8:
+ vas = ARM64_VAS_8H;
+ break;
+ }
+ break;
+ case 's':
+ switch(NumLanes) {
+ default: break;
+ case 2:
+ vas = ARM64_VAS_2S;
+ break;
+ case 4:
+ vas = ARM64_VAS_4S;
+ break;
+ }
+ break;
+ case 'd':
+ switch(NumLanes) {
+ default: break;
+ case 1:
+ vas = ARM64_VAS_1D;
+ break;
+ case 2:
+ vas = ARM64_VAS_2D;
+ break;
+ }
+ break;
+ case 'q':
+ switch(NumLanes) {
+ default: break;
+ case 1:
+ vas = ARM64_VAS_1Q;
+ break;
+ }
+ break;
+ }
+ } else {
+ snprintf(Suffix, sizeof(Suffix), ".%c", LaneKind);
+ switch(LaneKind) {
+ default: break;
+ case 'b':
+ vess = ARM64_VESS_B;
+ break;
+ case 'h':
+ vess = ARM64_VESS_H;
+ break;
+ case 's':
+ vess = ARM64_VESS_S;
+ break;
+ case 'd':
+ vess = ARM64_VESS_D;
+ break;
+ }
+ }
+
+ printVectorList(MI, OpNum, O, Suffix, MRI, vas, vess);
+}
+
+static void printVectorIndex(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ SStream_concat0(O, "[");
+ printInt32(O, (int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)));
+ SStream_concat0(O, "]");
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].vector_index = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
+ }
+}
+
+static void printAlignedLabel(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ MCOperand *Op = MCInst_getOperand(MI, OpNum);
+
+ // If the label has already been resolved to an immediate offset (say, when
+ // we're running the disassembler), just print the immediate.
+ if (MCOperand_isImm(Op)) {
+ printInt64Bang(O, MCOperand_getImm(Op) << 2);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op) << 2;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ return;
+ }
+
+#if 0
+ // If the branch target is simply an address then print it in hex.
+ const MCConstantExpr *BranchTarget =
+ dyn_cast<MCConstantExpr>(MI->getOperand(OpNum).getExpr());
+ int64_t Address;
+ if (BranchTarget && BranchTarget->EvaluateAsAbsolute(Address)) {
+ O << "0x";
+ O.write_hex(Address);
+ } else {
+ // Otherwise, just print the expression.
+ O << *MI->getOperand(OpNum).getExpr();
+ }
#endif
}
+static void printAdrpLabel(MCInst *MI, unsigned OpNum, SStream *O)
+{
+ MCOperand *Op = MCInst_getOperand(MI, OpNum);
+
+ // If the label has already been resolved to an immediate offset (say, when
+ // we're running the disassembler), just print the immediate.
+ if (MCOperand_isImm(Op)) {
+ printInt64Bang(O, MCOperand_getImm(Op) << 12);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = MCOperand_getImm(Op) << 12;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ return;
+ }
+}
+
+static void printBarrierOption(MCInst *MI, unsigned OpNo, SStream *O)
+{
+ unsigned Val = MCOperand_getImm(MCInst_getOperand(MI, OpNo));
+ unsigned Opcode = MCInst_getOpcode(MI);
+ bool Valid;
+ char *Name;
+
+ if (Opcode == AArch64_ISB)
+ Name = A64NamedImmMapper_toString(&A64ISB_ISBMapper, Val, &Valid);
+ else
+ Name = A64NamedImmMapper_toString(&A64DB_DBarrierMapper, Val, &Valid);
+
+ if (Valid) {
+ SStream_concat0(O, Name);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_BARRIER;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].barrier = Val;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ } else {
+ printUInt32Bang(O, Val);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ }
+}
+
+static void printMRSSystemRegister(MCInst *MI, unsigned OpNo, SStream *O)
+{
+ unsigned Val = MCOperand_getImm(MCInst_getOperand(MI, OpNo));
+ bool Valid;
+ char Name[128];
+
+ A64SysRegMapper_toString(&AArch64_MRSMapper, Val, &Valid, Name);
+
+ if (Valid) {
+ SStream_concat0(O, Name);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG_MRS;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Val;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ }
+}
+
+static void printMSRSystemRegister(MCInst *MI, unsigned OpNo, SStream *O)
+{
+ unsigned Val = MCOperand_getImm(MCInst_getOperand(MI, OpNo));
+ bool Valid;
+ char Name[128];
+
+ A64SysRegMapper_toString(&AArch64_MSRMapper, Val, &Valid, Name);
+
+ if (Valid) {
+ SStream_concat0(O, Name);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG_MSR;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Val;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ }
+}
+
+static void printSystemPStateField(MCInst *MI, unsigned OpNo, SStream *O)
+{
+ unsigned Val = MCOperand_getImm(MCInst_getOperand(MI, OpNo));
+ bool Valid;
+ char *Name;
+
+ Name = A64NamedImmMapper_toString(&A64PState_PStateMapper, Val, &Valid);
+ if (Valid) {
+ SStream_concat0(O, Name);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_PSTATE;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].pstate = Val;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+ } else {
+ printInt32Bang(O, Val);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+}
+
+static void printSIMDType10Operand(MCInst *MI, unsigned OpNo, SStream *O)
+{
+ unsigned RawVal = MCOperand_getImm(MCInst_getOperand(MI, OpNo));
+ uint64_t Val = AArch64_AM_decodeAdvSIMDModImmType10(RawVal);
+ SStream_concat(O, "#%#016llx", Val);
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+}
+
+
#define PRINT_ALIAS_INSTR
#include "AArch64GenAsmWriter.inc"
@@ -860,17 +1825,4 @@
flat_insn->detail->arm64.writeback = true;
}
-void AArch64_printInst(MCInst *MI, SStream *O, void *Info)
-{
- char *mnem;
-
- mnem = printAliasInstr(MI, O, Info);
- if (mnem) {
- MCInst_setOpcodePub(MI, AArch64_map_insn(mnem));
- cs_mem_free(mnem);
- } else {
- printInstruction(MI, O, Info);
- }
-}
-
#endif
diff --git a/arch/AArch64/AArch64Mapping.c b/arch/AArch64/AArch64Mapping.c
index 765af53..87ae02f 100644
--- a/arch/AArch64/AArch64Mapping.c
+++ b/arch/AArch64/AArch64Mapping.c
@@ -16,11 +16,13 @@
#ifndef CAPSTONE_DIET
static name_map reg_name_maps[] = {
{ ARM64_REG_INVALID, NULL },
- //=========
+
+ { ARM64_REG_X29, "x29"},
+ { ARM64_REG_X30, "x30"},
{ ARM64_REG_NZCV, "nzcv"},
+ { ARM64_REG_SP, "sp"},
{ ARM64_REG_WSP, "wsp"},
{ ARM64_REG_WZR, "wzr"},
- { ARM64_REG_SP, "sp"},
{ ARM64_REG_XZR, "xzr"},
{ ARM64_REG_B0, "b0"},
{ ARM64_REG_B1, "b1"},
@@ -242,8 +244,39 @@
{ ARM64_REG_X26, "x26"},
{ ARM64_REG_X27, "x27"},
{ ARM64_REG_X28, "x28"},
- { ARM64_REG_X29, "x29"},
- { ARM64_REG_X30, "x30"},
+
+ { ARM64_REG_V0, "v0"},
+ { ARM64_REG_V1, "v1"},
+ { ARM64_REG_V2, "v2"},
+ { ARM64_REG_V3, "v3"},
+ { ARM64_REG_V4, "v4"},
+ { ARM64_REG_V5, "v5"},
+ { ARM64_REG_V6, "v6"},
+ { ARM64_REG_V7, "v7"},
+ { ARM64_REG_V8, "v8"},
+ { ARM64_REG_V9, "v9"},
+ { ARM64_REG_V10, "v10"},
+ { ARM64_REG_V11, "v11"},
+ { ARM64_REG_V12, "v12"},
+ { ARM64_REG_V13, "v13"},
+ { ARM64_REG_V14, "v14"},
+ { ARM64_REG_V15, "v15"},
+ { ARM64_REG_V16, "v16"},
+ { ARM64_REG_V17, "v17"},
+ { ARM64_REG_V18, "v18"},
+ { ARM64_REG_V19, "v19"},
+ { ARM64_REG_V20, "v20"},
+ { ARM64_REG_V21, "v21"},
+ { ARM64_REG_V22, "v22"},
+ { ARM64_REG_V23, "v23"},
+ { ARM64_REG_V24, "v24"},
+ { ARM64_REG_V25, "v25"},
+ { ARM64_REG_V26, "v26"},
+ { ARM64_REG_V27, "v27"},
+ { ARM64_REG_V28, "v28"},
+ { ARM64_REG_V29, "v29"},
+ { ARM64_REG_V30, "v30"},
+ { ARM64_REG_V31, "v31"},
};
#endif
@@ -269,997 +302,565 @@
},
{
- AArch64_ABS16b, ARM64_INS_ABS,
+ AArch64_ABSv16i8, ARM64_INS_ABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ABS2d, ARM64_INS_ABS,
+ AArch64_ABSv1i64, ARM64_INS_ABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ABS2s, ARM64_INS_ABS,
+ AArch64_ABSv2i32, ARM64_INS_ABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ABS4h, ARM64_INS_ABS,
+ AArch64_ABSv2i64, ARM64_INS_ABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ABS4s, ARM64_INS_ABS,
+ AArch64_ABSv4i16, ARM64_INS_ABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ABS8b, ARM64_INS_ABS,
+ AArch64_ABSv4i32, ARM64_INS_ABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ABS8h, ARM64_INS_ABS,
+ AArch64_ABSv8i16, ARM64_INS_ABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ABSdd, ARM64_INS_ABS,
+ AArch64_ABSv8i8, ARM64_INS_ABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADCSwww, ARM64_INS_ADC,
+ AArch64_ADCSWr, ARM64_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADCSxxx, ARM64_INS_ADC,
+ AArch64_ADCSXr, ARM64_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADCwww, ARM64_INS_ADC,
+ AArch64_ADCWr, ARM64_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADCxxx, ARM64_INS_ADC,
+ AArch64_ADCXr, ARM64_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDHN2vvv_16b8h, ARM64_INS_ADDHN2,
+ AArch64_ADDHNv2i64_v2i32, ARM64_INS_ADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDHN2vvv_4s2d, ARM64_INS_ADDHN2,
+ AArch64_ADDHNv2i64_v4i32, ARM64_INS_ADDHN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDHN2vvv_8h4s, ARM64_INS_ADDHN2,
+ AArch64_ADDHNv4i32_v4i16, ARM64_INS_ADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDHNvvv_2s2d, ARM64_INS_ADDHN,
+ AArch64_ADDHNv4i32_v8i16, ARM64_INS_ADDHN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDHNvvv_4h4s, ARM64_INS_ADDHN,
+ AArch64_ADDHNv8i16_v16i8, ARM64_INS_ADDHN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDHNvvv_8b8h, ARM64_INS_ADDHN,
+ AArch64_ADDHNv8i16_v8i8, ARM64_INS_ADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDP_16B, ARM64_INS_ADDP,
+ AArch64_ADDPv16i8, ARM64_INS_ADDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDP_2D, ARM64_INS_ADDP,
+ AArch64_ADDPv2i32, ARM64_INS_ADDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDP_2S, ARM64_INS_ADDP,
+ AArch64_ADDPv2i64, ARM64_INS_ADDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDP_4H, ARM64_INS_ADDP,
+ AArch64_ADDPv2i64p, ARM64_INS_ADDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDP_4S, ARM64_INS_ADDP,
+ AArch64_ADDPv4i16, ARM64_INS_ADDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDP_8B, ARM64_INS_ADDP,
+ AArch64_ADDPv4i32, ARM64_INS_ADDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDP_8H, ARM64_INS_ADDP,
+ AArch64_ADDPv8i16, ARM64_INS_ADDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDPvv_D_2D, ARM64_INS_ADDP,
+ AArch64_ADDPv8i8, ARM64_INS_ADDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDSwww_asr, ARM64_INS_ADD,
+ AArch64_ADDSWri, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDSwww_lsl, ARM64_INS_ADD,
+ AArch64_ADDSWrs, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDSwww_lsr, ARM64_INS_ADD,
+ AArch64_ADDSWrx, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDSwww_sxtb, ARM64_INS_ADD,
+ AArch64_ADDSXri, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDSwww_sxth, ARM64_INS_ADD,
+ AArch64_ADDSXrs, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDSwww_sxtw, ARM64_INS_ADD,
+ AArch64_ADDSXrx, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDSwww_sxtx, ARM64_INS_ADD,
+ AArch64_ADDSXrx64, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDSwww_uxtb, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSwww_uxth, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSwww_uxtw, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSwww_uxtx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxw_sxtb, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxw_sxth, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxw_sxtw, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxw_uxtb, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxw_uxth, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxw_uxtw, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxx_asr, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxx_lsl, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxx_lsr, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxx_sxtx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSxxx_uxtx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDV_1b16b, ARM64_INS_ADDV,
+ AArch64_ADDVv16i8v, ARM64_INS_ADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDV_1b8b, ARM64_INS_ADDV,
+ AArch64_ADDVv4i16v, ARM64_INS_ADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDV_1h4h, ARM64_INS_ADDV,
+ AArch64_ADDVv4i32v, ARM64_INS_ADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDV_1h8h, ARM64_INS_ADDV,
+ AArch64_ADDVv8i16v, ARM64_INS_ADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDV_1s4s, ARM64_INS_ADDV,
+ AArch64_ADDVv8i8v, ARM64_INS_ADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDddd, ARM64_INS_ADD,
+ AArch64_ADDWri, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ADDWrs, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ADDWrx, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ADDXri, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ADDXrs, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ADDXrx, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ADDXrx64, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ADDv16i8, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDvvv_16B, ARM64_INS_ADD,
+ AArch64_ADDv1i64, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDvvv_2D, ARM64_INS_ADD,
+ AArch64_ADDv2i32, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDvvv_2S, ARM64_INS_ADD,
+ AArch64_ADDv2i64, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDvvv_4H, ARM64_INS_ADD,
+ AArch64_ADDv4i16, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDvvv_4S, ARM64_INS_ADD,
+ AArch64_ADDv4i32, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDvvv_8B, ARM64_INS_ADD,
+ AArch64_ADDv8i16, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDvvv_8H, ARM64_INS_ADD,
+ AArch64_ADDv8i8, ARM64_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ADDwwi_lsl0_S, ARM64_INS_ADD,
+ AArch64_ADR, ARM64_INS_ADR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ADRP, ARM64_INS_ADRP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_AESDrr, ARM64_INS_AESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_AESErr, ARM64_INS_AESE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_AESIMCrr, ARM64_INS_AESIMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_AESMCrr, ARM64_INS_AESMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ANDSWri, ARM64_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDwwi_lsl0_cmp, ARM64_INS_CMN,
+ AArch64_ANDSWrs, ARM64_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDwwi_lsl0_s, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDwwi_lsl12_S, ARM64_INS_ADD,
+ AArch64_ANDSXri, ARM64_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDwwi_lsl12_cmp, ARM64_INS_CMN,
+ AArch64_ANDSXrs, ARM64_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDwwi_lsl12_s, ARM64_INS_ADD,
+ AArch64_ANDWri, ARM64_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDwww_asr, ARM64_INS_ADD,
+ AArch64_ANDWrs, ARM64_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDwww_lsl, ARM64_INS_ADD,
+ AArch64_ANDXri, ARM64_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDwww_lsr, ARM64_INS_ADD,
+ AArch64_ANDXrs, ARM64_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ADDwww_sxtb, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDwww_sxth, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDwww_sxtw, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDwww_sxtx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDwww_uxtb, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDwww_uxth, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDwww_uxtw, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDwww_uxtx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxi_lsl0_S, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxi_lsl0_cmp, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxi_lsl0_s, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxi_lsl12_S, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxi_lsl12_cmp, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxi_lsl12_s, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxw_sxtb, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxw_sxth, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxw_sxtw, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxw_uxtb, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxw_uxth, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxw_uxtw, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxx_asr, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxx_lsl, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxx_lsr, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxx_sxtx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDxxx_uxtx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADRPxi, ARM64_INS_ADRP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADRxi, ARM64_INS_ADR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_AESD, ARM64_INS_AESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_AESE, ARM64_INS_AESE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_AESIMC, ARM64_INS_AESIMC,
+ AArch64_ANDv16i8, ARM64_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_AESMC, ARM64_INS_AESMC,
+ AArch64_ANDv8i8, ARM64_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ANDSwwi, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSwww_asr, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSwww_lsl, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSwww_lsr, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSwww_ror, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSxxi, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSxxx_asr, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSxxx_lsl, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSxxx_lsr, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSxxx_ror, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDvvv_16B, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDvvv_8B, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDwwi, ARM64_INS_AND,
+ AArch64_ASRVWr, ARM64_INS_ASR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ANDwww_asr, ARM64_INS_AND,
+ AArch64_ASRVXr, ARM64_INS_ASR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ANDwww_lsl, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDwww_lsr, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDwww_ror, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDxxi, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDxxx_asr, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDxxx_lsl, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDxxx_lsr, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDxxx_ror, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ASRVwww, ARM64_INS_ASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ASRVxxx, ARM64_INS_ASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ASRwwi, ARM64_INS_ASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ASRxxi, ARM64_INS_ASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ATix, ARM64_INS_AT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BFIwwii, ARM64_INS_BFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BFIxxii, ARM64_INS_BFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BFMwwii, ARM64_INS_BFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BFMxxii, ARM64_INS_BFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BFXILwwii, ARM64_INS_BFXIL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BFXILxxii, ARM64_INS_BFXIL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICSwww_asr, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICSwww_lsl, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICSwww_lsr, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICSwww_ror, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICSxxx_asr, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICSxxx_lsl, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICSxxx_lsr, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICSxxx_ror, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICvi_lsl_2S, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICvi_lsl_4H, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICvi_lsl_4S, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICvi_lsl_8H, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICvvv_16B, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICvvv_8B, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICwww_asr, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICwww_lsl, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICwww_lsr, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICwww_ror, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICxxx_asr, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICxxx_lsl, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICxxx_lsr, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICxxx_ror, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BIFvvv_16B, ARM64_INS_BIF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BIFvvv_8B, ARM64_INS_BIF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BITvvv_16B, ARM64_INS_BIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BITvvv_8B, ARM64_INS_BIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BLRx, ARM64_INS_BLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_X30, 0 }, { 0 }, 1, 1
-#endif
- },
- {
- AArch64_BLimm, ARM64_INS_BL,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_X30, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_BRKi, ARM64_INS_BRK,
+ AArch64_B, ARM64_INS_B,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 1, 0
#endif
},
{
- AArch64_BRx, ARM64_INS_BR,
+ AArch64_BFMWri, ARM64_INS_BFM,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_BSLvvv_16B, ARM64_INS_BSL,
+ AArch64_BFMXri, ARM64_INS_BFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BICSWrs, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BICSXrs, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BICWrs, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BICXrs, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BICv16i8, ARM64_INS_BIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_BSLvvv_8B, ARM64_INS_BSL,
+ AArch64_BICv2i32, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BICv4i16, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BICv4i32, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BICv8i16, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BICv8i8, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BIFv16i8, ARM64_INS_BIF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BIFv8i8, ARM64_INS_BIF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BITv16i8, ARM64_INS_BIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BITv8i8, ARM64_INS_BIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BL, ARM64_INS_BL,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_SP, 0 }, { ARM64_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BLR, ARM64_INS_BLR,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_SP, 0 }, { ARM64_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BR, ARM64_INS_BR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+ },
+ {
+ AArch64_BRK, ARM64_INS_BRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BSLv16i8, ARM64_INS_BSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_BSLv8i8, ARM64_INS_BSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
@@ -1271,1111 +872,859 @@
#endif
},
{
- AArch64_Bimm, ARM64_INS_B,
+ AArch64_CBNZW, ARM64_INS_CBNZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 1, 0
#endif
},
{
- AArch64_CBNZw, ARM64_INS_CBNZ,
+ AArch64_CBNZX, ARM64_INS_CBNZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 1, 0
#endif
},
{
- AArch64_CBNZx, ARM64_INS_CBNZ,
+ AArch64_CBZW, ARM64_INS_CBZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 1, 0
#endif
},
{
- AArch64_CBZw, ARM64_INS_CBZ,
+ AArch64_CBZX, ARM64_INS_CBZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 1, 0
#endif
},
{
- AArch64_CBZx, ARM64_INS_CBZ,
+ AArch64_CCMNWi, ARM64_INS_CCMN,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CCMNwi, ARM64_INS_CCMN,
+ AArch64_CCMNWr, ARM64_INS_CCMN,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CCMNww, ARM64_INS_CCMN,
+ AArch64_CCMNXi, ARM64_INS_CCMN,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CCMNxi, ARM64_INS_CCMN,
+ AArch64_CCMNXr, ARM64_INS_CCMN,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CCMNxx, ARM64_INS_CCMN,
+ AArch64_CCMPWi, ARM64_INS_CCMP,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CCMPwi, ARM64_INS_CCMP,
+ AArch64_CCMPWr, ARM64_INS_CCMP,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CCMPww, ARM64_INS_CCMP,
+ AArch64_CCMPXi, ARM64_INS_CCMP,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CCMPxi, ARM64_INS_CCMP,
+ AArch64_CCMPXr, ARM64_INS_CCMP,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CCMPxx, ARM64_INS_CCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLREXi, ARM64_INS_CLREX,
+ AArch64_CLREX, ARM64_INS_CLREX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CLS16b, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLS2s, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLS4h, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLS4s, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLS8b, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLS8h, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLSww, ARM64_INS_CLS,
+ AArch64_CLSWr, ARM64_INS_CLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CLSxx, ARM64_INS_CLS,
+ AArch64_CLSXr, ARM64_INS_CLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CLZ16b, ARM64_INS_CLZ,
+ AArch64_CLSv16i8, ARM64_INS_CLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CLZ2s, ARM64_INS_CLZ,
+ AArch64_CLSv2i32, ARM64_INS_CLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CLZ4h, ARM64_INS_CLZ,
+ AArch64_CLSv4i16, ARM64_INS_CLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CLZ4s, ARM64_INS_CLZ,
+ AArch64_CLSv4i32, ARM64_INS_CLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CLZ8b, ARM64_INS_CLZ,
+ AArch64_CLSv8i16, ARM64_INS_CLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CLZ8h, ARM64_INS_CLZ,
+ AArch64_CLSv8i8, ARM64_INS_CLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CLZww, ARM64_INS_CLZ,
+ AArch64_CLZWr, ARM64_INS_CLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CLZxx, ARM64_INS_CLZ,
+ AArch64_CLZXr, ARM64_INS_CLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CMEQddd, ARM64_INS_CMEQ,
+ AArch64_CLZv16i8, ARM64_INS_CLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQddi, ARM64_INS_CMEQ,
+ AArch64_CLZv2i32, ARM64_INS_CLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvi_16B, ARM64_INS_CMEQ,
+ AArch64_CLZv4i16, ARM64_INS_CLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvi_2D, ARM64_INS_CMEQ,
+ AArch64_CLZv4i32, ARM64_INS_CLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvi_2S, ARM64_INS_CMEQ,
+ AArch64_CLZv8i16, ARM64_INS_CLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvi_4H, ARM64_INS_CMEQ,
+ AArch64_CLZv8i8, ARM64_INS_CLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvi_4S, ARM64_INS_CMEQ,
+ AArch64_CMEQv16i8, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvi_8B, ARM64_INS_CMEQ,
+ AArch64_CMEQv16i8rz, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvi_8H, ARM64_INS_CMEQ,
+ AArch64_CMEQv1i64, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvv_16B, ARM64_INS_CMEQ,
+ AArch64_CMEQv1i64rz, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvv_2D, ARM64_INS_CMEQ,
+ AArch64_CMEQv2i32, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvv_2S, ARM64_INS_CMEQ,
+ AArch64_CMEQv2i32rz, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvv_4H, ARM64_INS_CMEQ,
+ AArch64_CMEQv2i64, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvv_4S, ARM64_INS_CMEQ,
+ AArch64_CMEQv2i64rz, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvv_8B, ARM64_INS_CMEQ,
+ AArch64_CMEQv4i16, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMEQvvv_8H, ARM64_INS_CMEQ,
+ AArch64_CMEQv4i16rz, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEddd, ARM64_INS_CMGE,
+ AArch64_CMEQv4i32, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEddi, ARM64_INS_CMGE,
+ AArch64_CMEQv4i32rz, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvi_16B, ARM64_INS_CMGE,
+ AArch64_CMEQv8i16, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvi_2D, ARM64_INS_CMGE,
+ AArch64_CMEQv8i16rz, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvi_2S, ARM64_INS_CMGE,
+ AArch64_CMEQv8i8, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvi_4H, ARM64_INS_CMGE,
+ AArch64_CMEQv8i8rz, ARM64_INS_CMEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvi_4S, ARM64_INS_CMGE,
+ AArch64_CMGEv16i8, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvi_8B, ARM64_INS_CMGE,
+ AArch64_CMGEv16i8rz, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvi_8H, ARM64_INS_CMGE,
+ AArch64_CMGEv1i64, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvv_16B, ARM64_INS_CMGE,
+ AArch64_CMGEv1i64rz, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvv_2D, ARM64_INS_CMGE,
+ AArch64_CMGEv2i32, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvv_2S, ARM64_INS_CMGE,
+ AArch64_CMGEv2i32rz, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvv_4H, ARM64_INS_CMGE,
+ AArch64_CMGEv2i64, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvv_4S, ARM64_INS_CMGE,
+ AArch64_CMGEv2i64rz, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvv_8B, ARM64_INS_CMGE,
+ AArch64_CMGEv4i16, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGEvvv_8H, ARM64_INS_CMGE,
+ AArch64_CMGEv4i16rz, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTddd, ARM64_INS_CMGT,
+ AArch64_CMGEv4i32, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTddi, ARM64_INS_CMGT,
+ AArch64_CMGEv4i32rz, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvi_16B, ARM64_INS_CMGT,
+ AArch64_CMGEv8i16, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvi_2D, ARM64_INS_CMGT,
+ AArch64_CMGEv8i16rz, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvi_2S, ARM64_INS_CMGT,
+ AArch64_CMGEv8i8, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvi_4H, ARM64_INS_CMGT,
+ AArch64_CMGEv8i8rz, ARM64_INS_CMGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvi_4S, ARM64_INS_CMGT,
+ AArch64_CMGTv16i8, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvi_8B, ARM64_INS_CMGT,
+ AArch64_CMGTv16i8rz, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvi_8H, ARM64_INS_CMGT,
+ AArch64_CMGTv1i64, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvv_16B, ARM64_INS_CMGT,
+ AArch64_CMGTv1i64rz, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvv_2D, ARM64_INS_CMGT,
+ AArch64_CMGTv2i32, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvv_2S, ARM64_INS_CMGT,
+ AArch64_CMGTv2i32rz, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvv_4H, ARM64_INS_CMGT,
+ AArch64_CMGTv2i64, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvv_4S, ARM64_INS_CMGT,
+ AArch64_CMGTv2i64rz, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvv_8B, ARM64_INS_CMGT,
+ AArch64_CMGTv4i16, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMGTvvv_8H, ARM64_INS_CMGT,
+ AArch64_CMGTv4i16rz, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHIddd, ARM64_INS_CMHI,
+ AArch64_CMGTv4i32, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHIvvv_16B, ARM64_INS_CMHI,
+ AArch64_CMGTv4i32rz, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHIvvv_2D, ARM64_INS_CMHI,
+ AArch64_CMGTv8i16, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHIvvv_2S, ARM64_INS_CMHI,
+ AArch64_CMGTv8i16rz, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHIvvv_4H, ARM64_INS_CMHI,
+ AArch64_CMGTv8i8, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHIvvv_4S, ARM64_INS_CMHI,
+ AArch64_CMGTv8i8rz, ARM64_INS_CMGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHIvvv_8B, ARM64_INS_CMHI,
+ AArch64_CMHIv16i8, ARM64_INS_CMHI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHIvvv_8H, ARM64_INS_CMHI,
+ AArch64_CMHIv1i64, ARM64_INS_CMHI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHSddd, ARM64_INS_CMHS,
+ AArch64_CMHIv2i32, ARM64_INS_CMHI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHSvvv_16B, ARM64_INS_CMHS,
+ AArch64_CMHIv2i64, ARM64_INS_CMHI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHSvvv_2D, ARM64_INS_CMHS,
+ AArch64_CMHIv4i16, ARM64_INS_CMHI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHSvvv_2S, ARM64_INS_CMHS,
+ AArch64_CMHIv4i32, ARM64_INS_CMHI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHSvvv_4H, ARM64_INS_CMHS,
+ AArch64_CMHIv8i16, ARM64_INS_CMHI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHSvvv_4S, ARM64_INS_CMHS,
+ AArch64_CMHIv8i8, ARM64_INS_CMHI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHSvvv_8B, ARM64_INS_CMHS,
+ AArch64_CMHSv16i8, ARM64_INS_CMHS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMHSvvv_8H, ARM64_INS_CMHS,
+ AArch64_CMHSv1i64, ARM64_INS_CMHS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLEddi, ARM64_INS_CMLE,
+ AArch64_CMHSv2i32, ARM64_INS_CMHS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLEvvi_16B, ARM64_INS_CMLE,
+ AArch64_CMHSv2i64, ARM64_INS_CMHS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLEvvi_2D, ARM64_INS_CMLE,
+ AArch64_CMHSv4i16, ARM64_INS_CMHS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLEvvi_2S, ARM64_INS_CMLE,
+ AArch64_CMHSv4i32, ARM64_INS_CMHS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLEvvi_4H, ARM64_INS_CMLE,
+ AArch64_CMHSv8i16, ARM64_INS_CMHS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLEvvi_4S, ARM64_INS_CMLE,
+ AArch64_CMHSv8i8, ARM64_INS_CMHS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLEvvi_8B, ARM64_INS_CMLE,
+ AArch64_CMLEv16i8rz, ARM64_INS_CMLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLEvvi_8H, ARM64_INS_CMLE,
+ AArch64_CMLEv1i64rz, ARM64_INS_CMLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLTddi, ARM64_INS_CMLT,
+ AArch64_CMLEv2i32rz, ARM64_INS_CMLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLTvvi_16B, ARM64_INS_CMLT,
+ AArch64_CMLEv2i64rz, ARM64_INS_CMLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLTvvi_2D, ARM64_INS_CMLT,
+ AArch64_CMLEv4i16rz, ARM64_INS_CMLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLTvvi_2S, ARM64_INS_CMLT,
+ AArch64_CMLEv4i32rz, ARM64_INS_CMLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLTvvi_4H, ARM64_INS_CMLT,
+ AArch64_CMLEv8i16rz, ARM64_INS_CMLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLTvvi_4S, ARM64_INS_CMLT,
+ AArch64_CMLEv8i8rz, ARM64_INS_CMLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLTvvi_8B, ARM64_INS_CMLT,
+ AArch64_CMLTv16i8rz, ARM64_INS_CMLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMLTvvi_8H, ARM64_INS_CMLT,
+ AArch64_CMLTv1i64rz, ARM64_INS_CMLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_asr, ARM64_INS_CMN,
+ AArch64_CMLTv2i32rz, ARM64_INS_CMLT,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_lsl, ARM64_INS_CMN,
+ AArch64_CMLTv2i64rz, ARM64_INS_CMLT,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_lsr, ARM64_INS_CMN,
+ AArch64_CMLTv4i16rz, ARM64_INS_CMLT,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_sxtb, ARM64_INS_CMN,
+ AArch64_CMLTv4i32rz, ARM64_INS_CMLT,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_sxth, ARM64_INS_CMN,
+ AArch64_CMLTv8i16rz, ARM64_INS_CMLT,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_sxtw, ARM64_INS_CMN,
+ AArch64_CMLTv8i8rz, ARM64_INS_CMLT,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_sxtx, ARM64_INS_CMN,
+ AArch64_CMTSTv16i8, ARM64_INS_CMTST,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_uxtb, ARM64_INS_CMN,
+ AArch64_CMTSTv1i64, ARM64_INS_CMTST,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_uxth, ARM64_INS_CMN,
+ AArch64_CMTSTv2i32, ARM64_INS_CMTST,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_uxtw, ARM64_INS_CMN,
+ AArch64_CMTSTv2i64, ARM64_INS_CMTST,
#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMNww_uxtx, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxw_sxtb, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxw_sxth, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxw_sxtw, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxw_uxtb, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxw_uxth, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxw_uxtw, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxx_asr, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxx_lsl, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxx_lsr, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxx_sxtx, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMNxx_uxtx, ARM64_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_asr, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_lsl, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_lsr, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_sxtb, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_sxth, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_sxtw, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_sxtx, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_uxtb, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_uxth, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_uxtw, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPww_uxtx, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxw_sxtb, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxw_sxth, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxw_sxtw, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxw_uxtb, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxw_uxth, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxw_uxtw, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxx_asr, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxx_lsl, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxx_lsr, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxx_sxtx, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMPxx_uxtx, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMTSTddd, ARM64_INS_CMTST,
+ AArch64_CMTSTv4i16, ARM64_INS_CMTST,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMTSTvvv_16B, ARM64_INS_CMTST,
+ AArch64_CMTSTv4i32, ARM64_INS_CMTST,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMTSTvvv_2D, ARM64_INS_CMTST,
+ AArch64_CMTSTv8i16, ARM64_INS_CMTST,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMTSTvvv_2S, ARM64_INS_CMTST,
+ AArch64_CMTSTv8i8, ARM64_INS_CMTST,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMTSTvvv_4H, ARM64_INS_CMTST,
+ AArch64_CNTv16i8, ARM64_INS_CNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMTSTvvv_4S, ARM64_INS_CMTST,
+ AArch64_CNTv8i8, ARM64_INS_CNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMTSTvvv_8B, ARM64_INS_CMTST,
+ AArch64_CPYi16, ARM64_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CMTSTvvv_8H, ARM64_INS_CMTST,
+ AArch64_CPYi32, ARM64_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CNT16b, ARM64_INS_CNT,
+ AArch64_CPYi64, ARM64_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CNT8b, ARM64_INS_CNT,
+ AArch64_CPYi8, ARM64_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_CRC32B_www, ARM64_INS_CRC32B,
+ AArch64_CRC32Brr, ARM64_INS_CRC32B,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
#endif
},
{
- AArch64_CRC32CB_www, ARM64_INS_CRC32CB,
+ AArch64_CRC32CBrr, ARM64_INS_CRC32CB,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
#endif
},
{
- AArch64_CRC32CH_www, ARM64_INS_CRC32CH,
+ AArch64_CRC32CHrr, ARM64_INS_CRC32CH,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
#endif
},
{
- AArch64_CRC32CW_www, ARM64_INS_CRC32CW,
+ AArch64_CRC32CWrr, ARM64_INS_CRC32CW,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
#endif
},
{
- AArch64_CRC32CX_wwx, ARM64_INS_CRC32CX,
+ AArch64_CRC32CXrr, ARM64_INS_CRC32CX,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
#endif
},
{
- AArch64_CRC32H_www, ARM64_INS_CRC32H,
+ AArch64_CRC32Hrr, ARM64_INS_CRC32H,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
#endif
},
{
- AArch64_CRC32W_www, ARM64_INS_CRC32W,
+ AArch64_CRC32Wrr, ARM64_INS_CRC32W,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
#endif
},
{
- AArch64_CRC32X_wwx, ARM64_INS_CRC32X,
+ AArch64_CRC32Xrr, ARM64_INS_CRC32X,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
#endif
},
{
- AArch64_CSELwwwc, ARM64_INS_CSEL,
+ AArch64_CSELWr, ARM64_INS_CSEL,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CSELxxxc, ARM64_INS_CSEL,
+ AArch64_CSELXr, ARM64_INS_CSEL,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CSINCwwwc, ARM64_INS_CSINC,
+ AArch64_CSINCWr, ARM64_INS_CSINC,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CSINCxxxc, ARM64_INS_CSINC,
+ AArch64_CSINCXr, ARM64_INS_CSINC,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CSINVwwwc, ARM64_INS_CSINV,
+ AArch64_CSINVWr, ARM64_INS_CSINV,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CSINVxxxc, ARM64_INS_CSINV,
+ AArch64_CSINVXr, ARM64_INS_CSINV,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CSNEGwwwc, ARM64_INS_CSNEG,
+ AArch64_CSNEGWr, ARM64_INS_CSNEG,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_CSNEGxxxc, ARM64_INS_CSNEG,
+ AArch64_CSNEGXr, ARM64_INS_CSNEG,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_DCPS1i, ARM64_INS_DCPS1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_DCPS2i, ARM64_INS_DCPS2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_DCPS3i, ARM64_INS_DCPS3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_DCix, ARM64_INS_DC,
+ AArch64_DCPS1, ARM64_INS_DCPS1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_DMBi, ARM64_INS_DMB,
+ AArch64_DCPS2, ARM64_INS_DCPS2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_DCPS3, ARM64_INS_DCPS3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_DMB, ARM64_INS_DMB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
@@ -2383,14123 +1732,12533 @@
{
AArch64_DRPS, ARM64_INS_DRPS,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_DSBi, ARM64_INS_DSB,
+ AArch64_DSB, ARM64_INS_DSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_DUP16b, ARM64_INS_DUP,
+ AArch64_DUPv16i8gpr, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUP2d, ARM64_INS_DUP,
+ AArch64_DUPv16i8lane, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUP2s, ARM64_INS_DUP,
+ AArch64_DUPv2i32gpr, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUP4h, ARM64_INS_DUP,
+ AArch64_DUPv2i32lane, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUP4s, ARM64_INS_DUP,
+ AArch64_DUPv2i64gpr, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUP8b, ARM64_INS_DUP,
+ AArch64_DUPv2i64lane, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUP8h, ARM64_INS_DUP,
+ AArch64_DUPv4i16gpr, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUPELT16b, ARM64_INS_DUP,
+ AArch64_DUPv4i16lane, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUPELT2d, ARM64_INS_DUP,
+ AArch64_DUPv4i32gpr, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUPELT2s, ARM64_INS_DUP,
+ AArch64_DUPv4i32lane, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUPELT4h, ARM64_INS_DUP,
+ AArch64_DUPv8i16gpr, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUPELT4s, ARM64_INS_DUP,
+ AArch64_DUPv8i16lane, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUPELT8b, ARM64_INS_DUP,
+ AArch64_DUPv8i8gpr, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUPELT8h, ARM64_INS_DUP,
+ AArch64_DUPv8i8lane, ARM64_INS_DUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_DUPbv_B, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPdv_D, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPhv_H, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPsv_S, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_EONwww_asr, ARM64_INS_EON,
+ AArch64_EONWrs, ARM64_INS_EON,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_EONwww_lsl, ARM64_INS_EON,
+ AArch64_EONXrs, ARM64_INS_EON,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_EONwww_lsr, ARM64_INS_EON,
+ AArch64_EORWri, ARM64_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_EONwww_ror, ARM64_INS_EON,
+ AArch64_EORWrs, ARM64_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_EONxxx_asr, ARM64_INS_EON,
+ AArch64_EORXri, ARM64_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_EONxxx_lsl, ARM64_INS_EON,
+ AArch64_EORXrs, ARM64_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_EONxxx_lsr, ARM64_INS_EON,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EONxxx_ror, ARM64_INS_EON,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORvvv_16B, ARM64_INS_EOR,
+ AArch64_EORv16i8, ARM64_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_EORvvv_8B, ARM64_INS_EOR,
+ AArch64_EORv8i8, ARM64_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_EORwwi, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORwww_asr, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORwww_lsl, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORwww_lsr, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORwww_ror, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORxxi, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORxxx_asr, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORxxx_lsl, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORxxx_lsr, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORxxx_ror, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
AArch64_ERET, ARM64_INS_ERET,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_EXTRwwwi, ARM64_INS_EXTR,
+ AArch64_EXTRWrri, ARM64_INS_EXTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_EXTRxxxi, ARM64_INS_EXTR,
+ AArch64_EXTRXrri, ARM64_INS_EXTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_EXTvvvi_16b, ARM64_INS_EXT,
+ AArch64_EXTv16i8, ARM64_INS_EXT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_EXTvvvi_8b, ARM64_INS_EXT,
+ AArch64_EXTv8i8, ARM64_INS_EXT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FABDddd, ARM64_INS_FABD,
+ AArch64_FABD32, ARM64_INS_FABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FABDsss, ARM64_INS_FABD,
+ AArch64_FABD64, ARM64_INS_FABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FABDvvv_2D, ARM64_INS_FABD,
+ AArch64_FABDv2f32, ARM64_INS_FABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FABDvvv_2S, ARM64_INS_FABD,
+ AArch64_FABDv2f64, ARM64_INS_FABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FABDvvv_4S, ARM64_INS_FABD,
+ AArch64_FABDv4f32, ARM64_INS_FABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FABS2d, ARM64_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABS2s, ARM64_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABS4s, ARM64_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABSdd, ARM64_INS_FABS,
+ AArch64_FABSDr, ARM64_INS_FABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FABSss, ARM64_INS_FABS,
+ AArch64_FABSSr, ARM64_INS_FABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FACGEddd, ARM64_INS_FACGE,
+ AArch64_FABSv2f32, ARM64_INS_FABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FACGEsss, ARM64_INS_FACGE,
+ AArch64_FABSv2f64, ARM64_INS_FABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FACGEvvv_2D, ARM64_INS_FACGE,
+ AArch64_FABSv4f32, ARM64_INS_FABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FACGEvvv_2S, ARM64_INS_FACGE,
+ AArch64_FACGE32, ARM64_INS_FACGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FACGEvvv_4S, ARM64_INS_FACGE,
+ AArch64_FACGE64, ARM64_INS_FACGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FACGTddd, ARM64_INS_FACGT,
+ AArch64_FACGEv2f32, ARM64_INS_FACGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FACGTsss, ARM64_INS_FACGT,
+ AArch64_FACGEv2f64, ARM64_INS_FACGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FACGTvvv_2D, ARM64_INS_FACGT,
+ AArch64_FACGEv4f32, ARM64_INS_FACGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FACGTvvv_2S, ARM64_INS_FACGT,
+ AArch64_FACGT32, ARM64_INS_FACGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FACGTvvv_4S, ARM64_INS_FACGT,
+ AArch64_FACGT64, ARM64_INS_FACGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FADDP_2D, ARM64_INS_FADDP,
+ AArch64_FACGTv2f32, ARM64_INS_FACGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FADDP_2S, ARM64_INS_FADDP,
+ AArch64_FACGTv2f64, ARM64_INS_FACGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FADDP_4S, ARM64_INS_FADDP,
+ AArch64_FACGTv4f32, ARM64_INS_FACGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FADDPvv_D_2D, ARM64_INS_FADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDPvv_S_2S, ARM64_INS_FADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDddd, ARM64_INS_FADD,
+ AArch64_FADDDrr, ARM64_INS_FADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FADDsss, ARM64_INS_FADD,
+ AArch64_FADDPv2f32, ARM64_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FADDPv2f64, ARM64_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FADDPv2i32p, ARM64_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FADDPv2i64p, ARM64_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FADDPv4f32, ARM64_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FADDSrr, ARM64_INS_FADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FADDvvv_2D, ARM64_INS_FADD,
+ AArch64_FADDv2f32, ARM64_INS_FADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FADDvvv_2S, ARM64_INS_FADD,
+ AArch64_FADDv2f64, ARM64_INS_FADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FADDvvv_4S, ARM64_INS_FADD,
+ AArch64_FADDv4f32, ARM64_INS_FADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCCMPEdd, ARM64_INS_FCCMPE,
+ AArch64_FCCMPDrr, ARM64_INS_FCCMP,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCCMPEDrr, ARM64_INS_FCCMPE,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCCMPESrr, ARM64_INS_FCCMPE,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCCMPSrr, ARM64_INS_FCCMP,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMEQ32, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMEQ64, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMEQv1i32rz, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMEQv1i64rz, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMEQv2f32, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMEQv2f64, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMEQv2i32rz, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMEQv2i64rz, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMEQv4f32, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMEQv4i32rz, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGE32, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGE64, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGEv1i32rz, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGEv1i64rz, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGEv2f32, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGEv2f64, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGEv2i32rz, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGEv2i64rz, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGEv4f32, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGEv4i32rz, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGT32, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGT64, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGTv1i32rz, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGTv1i64rz, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGTv2f32, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGTv2f64, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGTv2i32rz, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGTv2i64rz, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGTv4f32, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMGTv4i32rz, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMLEv1i32rz, ARM64_INS_FCMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMLEv1i64rz, ARM64_INS_FCMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMLEv2i32rz, ARM64_INS_FCMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMLEv2i64rz, ARM64_INS_FCMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMLEv4i32rz, ARM64_INS_FCMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMLTv1i32rz, ARM64_INS_FCMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMLTv1i64rz, ARM64_INS_FCMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMLTv2i32rz, ARM64_INS_FCMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMLTv2i64rz, ARM64_INS_FCMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMLTv4i32rz, ARM64_INS_FCMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_FCMPDri, ARM64_INS_FCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCCMPEss, ARM64_INS_FCCMPE,
+ AArch64_FCMPDrr, ARM64_INS_FCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCCMPdd, ARM64_INS_FCCMP,
+ AArch64_FCMPEDri, ARM64_INS_FCMPE,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCCMPss, ARM64_INS_FCCMP,
+ AArch64_FCMPEDrr, ARM64_INS_FCMPE,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCMEQZddi, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQZssi, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQddd, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQsss, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQvvi_2D, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQvvi_2S, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQvvi_4S, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQvvv_2D, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQvvv_2S, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQvvv_4S, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEZddi, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEZssi, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEddd, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEsss, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEvvi_2D, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEvvi_2S, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEvvi_4S, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEvvv_2D, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEvvv_2S, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEvvv_4S, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTZddi, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTZssi, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTddd, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTsss, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTvvi_2D, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTvvi_2S, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTvvi_4S, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTvvv_2D, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTvvv_2S, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTvvv_4S, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLEZddi, ARM64_INS_FCMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLEZssi, ARM64_INS_FCMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLEvvi_2D, ARM64_INS_FCMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLEvvi_2S, ARM64_INS_FCMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLEvvi_4S, ARM64_INS_FCMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLTZddi, ARM64_INS_FCMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLTZssi, ARM64_INS_FCMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLTvvi_2D, ARM64_INS_FCMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLTvvi_2S, ARM64_INS_FCMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLTvvi_4S, ARM64_INS_FCMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPdd_quiet, ARM64_INS_FCMP,
+ AArch64_FCMPESri, ARM64_INS_FCMPE,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCMPdd_sig, ARM64_INS_FCMPE,
+ AArch64_FCMPESrr, ARM64_INS_FCMPE,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCMPdi_quiet, ARM64_INS_FCMP,
+ AArch64_FCMPSri, ARM64_INS_FCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCMPdi_sig, ARM64_INS_FCMPE,
+ AArch64_FCMPSrr, ARM64_INS_FCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCMPsi_quiet, ARM64_INS_FCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPsi_sig, ARM64_INS_FCMPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPss_quiet, ARM64_INS_FCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPss_sig, ARM64_INS_FCMPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCSELdddc, ARM64_INS_FCSEL,
+ AArch64_FCSELDrrr, ARM64_INS_FCSEL,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCSELsssc, ARM64_INS_FCSEL,
+ AArch64_FCSELSrrr, ARM64_INS_FCSEL,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTAS_2d, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAS_2s, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAS_4s, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASdd, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASss, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASwd, ARM64_INS_FCVTAS,
+ AArch64_FCVTASUWDr, ARM64_INS_FCVTAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTASws, ARM64_INS_FCVTAS,
+ AArch64_FCVTASUWSr, ARM64_INS_FCVTAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTASxd, ARM64_INS_FCVTAS,
+ AArch64_FCVTASUXDr, ARM64_INS_FCVTAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTASxs, ARM64_INS_FCVTAS,
+ AArch64_FCVTASUXSr, ARM64_INS_FCVTAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTAU_2d, ARM64_INS_FCVTAU,
+ AArch64_FCVTASv1i32, ARM64_INS_FCVTAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTAU_2s, ARM64_INS_FCVTAU,
+ AArch64_FCVTASv1i64, ARM64_INS_FCVTAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTAU_4s, ARM64_INS_FCVTAU,
+ AArch64_FCVTASv2f32, ARM64_INS_FCVTAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTAUdd, ARM64_INS_FCVTAU,
+ AArch64_FCVTASv2f64, ARM64_INS_FCVTAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTAUss, ARM64_INS_FCVTAU,
+ AArch64_FCVTASv4f32, ARM64_INS_FCVTAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTAUwd, ARM64_INS_FCVTAU,
+ AArch64_FCVTAUUWDr, ARM64_INS_FCVTAU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTAUws, ARM64_INS_FCVTAU,
+ AArch64_FCVTAUUWSr, ARM64_INS_FCVTAU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTAUxd, ARM64_INS_FCVTAU,
+ AArch64_FCVTAUUXDr, ARM64_INS_FCVTAU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTAUxs, ARM64_INS_FCVTAU,
+ AArch64_FCVTAUUXSr, ARM64_INS_FCVTAU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTL2s2d, ARM64_INS_FCVTL,
+ AArch64_FCVTAUv1i32, ARM64_INS_FCVTAU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTL4h4s, ARM64_INS_FCVTL,
+ AArch64_FCVTAUv1i64, ARM64_INS_FCVTAU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTL4s2d, ARM64_INS_FCVTL2,
+ AArch64_FCVTAUv2f32, ARM64_INS_FCVTAU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTL8h4s, ARM64_INS_FCVTL2,
+ AArch64_FCVTAUv2f64, ARM64_INS_FCVTAU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMS_2d, ARM64_INS_FCVTMS,
+ AArch64_FCVTAUv4f32, ARM64_INS_FCVTAU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMS_2s, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMS_4s, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSdd, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSss, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSwd, ARM64_INS_FCVTMS,
+ AArch64_FCVTDHr, ARM64_INS_FCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMSws, ARM64_INS_FCVTMS,
+ AArch64_FCVTDSr, ARM64_INS_FCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMSxd, ARM64_INS_FCVTMS,
+ AArch64_FCVTHDr, ARM64_INS_FCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMSxs, ARM64_INS_FCVTMS,
+ AArch64_FCVTHSr, ARM64_INS_FCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMU_2d, ARM64_INS_FCVTMU,
+ AArch64_FCVTLv2i32, ARM64_INS_FCVTL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMU_2s, ARM64_INS_FCVTMU,
+ AArch64_FCVTLv4i16, ARM64_INS_FCVTL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMU_4s, ARM64_INS_FCVTMU,
+ AArch64_FCVTLv4i32, ARM64_INS_FCVTL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMUdd, ARM64_INS_FCVTMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMUss, ARM64_INS_FCVTMU,
+ AArch64_FCVTLv8i16, ARM64_INS_FCVTL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMUwd, ARM64_INS_FCVTMU,
+ AArch64_FCVTMSUWDr, ARM64_INS_FCVTMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMUws, ARM64_INS_FCVTMU,
+ AArch64_FCVTMSUWSr, ARM64_INS_FCVTMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMUxd, ARM64_INS_FCVTMU,
+ AArch64_FCVTMSUXDr, ARM64_INS_FCVTMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTMUxs, ARM64_INS_FCVTMU,
+ AArch64_FCVTMSUXSr, ARM64_INS_FCVTMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTN2d2s, ARM64_INS_FCVTN,
+ AArch64_FCVTMSv1i32, ARM64_INS_FCVTMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTN2d4s, ARM64_INS_FCVTN2,
+ AArch64_FCVTMSv1i64, ARM64_INS_FCVTMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTN4s4h, ARM64_INS_FCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTN4s8h, ARM64_INS_FCVTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNS_2d, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNS_2s, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNS_4s, ARM64_INS_FCVTNS,
+ AArch64_FCVTMSv2f32, ARM64_INS_FCVTMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNSdd, ARM64_INS_FCVTNS,
+ AArch64_FCVTMSv2f64, ARM64_INS_FCVTMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNSss, ARM64_INS_FCVTNS,
+ AArch64_FCVTMSv4f32, ARM64_INS_FCVTMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNSwd, ARM64_INS_FCVTNS,
+ AArch64_FCVTMUUWDr, ARM64_INS_FCVTMU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNSws, ARM64_INS_FCVTNS,
+ AArch64_FCVTMUUWSr, ARM64_INS_FCVTMU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNSxd, ARM64_INS_FCVTNS,
+ AArch64_FCVTMUUXDr, ARM64_INS_FCVTMU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNSxs, ARM64_INS_FCVTNS,
+ AArch64_FCVTMUUXSr, ARM64_INS_FCVTMU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNU_2d, ARM64_INS_FCVTNU,
+ AArch64_FCVTMUv1i32, ARM64_INS_FCVTMU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNU_2s, ARM64_INS_FCVTNU,
+ AArch64_FCVTMUv1i64, ARM64_INS_FCVTMU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNU_4s, ARM64_INS_FCVTNU,
+ AArch64_FCVTMUv2f32, ARM64_INS_FCVTMU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNUdd, ARM64_INS_FCVTNU,
+ AArch64_FCVTMUv2f64, ARM64_INS_FCVTMU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNUss, ARM64_INS_FCVTNU,
+ AArch64_FCVTMUv4f32, ARM64_INS_FCVTMU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNUwd, ARM64_INS_FCVTNU,
+ AArch64_FCVTNSUWDr, ARM64_INS_FCVTNS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNUws, ARM64_INS_FCVTNU,
+ AArch64_FCVTNSUWSr, ARM64_INS_FCVTNS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNUxd, ARM64_INS_FCVTNU,
+ AArch64_FCVTNSUXDr, ARM64_INS_FCVTNS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTNUxs, ARM64_INS_FCVTNU,
+ AArch64_FCVTNSUXSr, ARM64_INS_FCVTNS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPS_2d, ARM64_INS_FCVTPS,
+ AArch64_FCVTNSv1i32, ARM64_INS_FCVTNS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPS_2s, ARM64_INS_FCVTPS,
+ AArch64_FCVTNSv1i64, ARM64_INS_FCVTNS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPS_4s, ARM64_INS_FCVTPS,
+ AArch64_FCVTNSv2f32, ARM64_INS_FCVTNS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPSdd, ARM64_INS_FCVTPS,
+ AArch64_FCVTNSv2f64, ARM64_INS_FCVTNS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPSss, ARM64_INS_FCVTPS,
+ AArch64_FCVTNSv4f32, ARM64_INS_FCVTNS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPSwd, ARM64_INS_FCVTPS,
+ AArch64_FCVTNUUWDr, ARM64_INS_FCVTNU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPSws, ARM64_INS_FCVTPS,
+ AArch64_FCVTNUUWSr, ARM64_INS_FCVTNU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPSxd, ARM64_INS_FCVTPS,
+ AArch64_FCVTNUUXDr, ARM64_INS_FCVTNU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPSxs, ARM64_INS_FCVTPS,
+ AArch64_FCVTNUUXSr, ARM64_INS_FCVTNU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPU_2d, ARM64_INS_FCVTPU,
+ AArch64_FCVTNUv1i32, ARM64_INS_FCVTNU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPU_2s, ARM64_INS_FCVTPU,
+ AArch64_FCVTNUv1i64, ARM64_INS_FCVTNU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPU_4s, ARM64_INS_FCVTPU,
+ AArch64_FCVTNUv2f32, ARM64_INS_FCVTNU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPUdd, ARM64_INS_FCVTPU,
+ AArch64_FCVTNUv2f64, ARM64_INS_FCVTNU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPUss, ARM64_INS_FCVTPU,
+ AArch64_FCVTNUv4f32, ARM64_INS_FCVTNU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPUwd, ARM64_INS_FCVTPU,
+ AArch64_FCVTNv2i32, ARM64_INS_FCVTN,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPUws, ARM64_INS_FCVTPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPUxd, ARM64_INS_FCVTPU,
+ AArch64_FCVTNv4i16, ARM64_INS_FCVTN,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTPUxs, ARM64_INS_FCVTPU,
+ AArch64_FCVTNv4i32, ARM64_INS_FCVTN2,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTXN, ARM64_INS_FCVTXN,
+ AArch64_FCVTNv8i16, ARM64_INS_FCVTN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTXN2d2s, ARM64_INS_FCVTXN,
+ AArch64_FCVTPSUWDr, ARM64_INS_FCVTPS,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTXN2d4s, ARM64_INS_FCVTXN2,
+ AArch64_FCVTPSUWSr, ARM64_INS_FCVTPS,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZS_2d, ARM64_INS_FCVTZS,
+ AArch64_FCVTPSUXDr, ARM64_INS_FCVTPS,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZS_2s, ARM64_INS_FCVTZS,
+ AArch64_FCVTPSUXSr, ARM64_INS_FCVTPS,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZS_4s, ARM64_INS_FCVTZS,
+ AArch64_FCVTPSv1i32, ARM64_INS_FCVTPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZS_Nddi, ARM64_INS_FCVTZS,
+ AArch64_FCVTPSv1i64, ARM64_INS_FCVTPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZS_Nssi, ARM64_INS_FCVTZS,
+ AArch64_FCVTPSv2f32, ARM64_INS_FCVTPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZSdd, ARM64_INS_FCVTZS,
+ AArch64_FCVTPSv2f64, ARM64_INS_FCVTPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZSss, ARM64_INS_FCVTZS,
+ AArch64_FCVTPSv4f32, ARM64_INS_FCVTPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZSwd, ARM64_INS_FCVTZS,
+ AArch64_FCVTPUUWDr, ARM64_INS_FCVTPU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZSwdi, ARM64_INS_FCVTZS,
+ AArch64_FCVTPUUWSr, ARM64_INS_FCVTPU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZSws, ARM64_INS_FCVTZS,
+ AArch64_FCVTPUUXDr, ARM64_INS_FCVTPU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZSwsi, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSxd, ARM64_INS_FCVTZS,
+ AArch64_FCVTPUUXSr, ARM64_INS_FCVTPU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZSxdi, ARM64_INS_FCVTZS,
+ AArch64_FCVTPUv1i32, ARM64_INS_FCVTPU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZSxs, ARM64_INS_FCVTZS,
+ AArch64_FCVTPUv1i64, ARM64_INS_FCVTPU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZSxsi, ARM64_INS_FCVTZS,
+ AArch64_FCVTPUv2f32, ARM64_INS_FCVTPU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZU_2d, ARM64_INS_FCVTZU,
+ AArch64_FCVTPUv2f64, ARM64_INS_FCVTPU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZU_2s, ARM64_INS_FCVTZU,
+ AArch64_FCVTPUv4f32, ARM64_INS_FCVTPU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZU_4s, ARM64_INS_FCVTZU,
+ AArch64_FCVTSDr, ARM64_INS_FCVT,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZU_Nddi, ARM64_INS_FCVTZU,
+ AArch64_FCVTSHr, ARM64_INS_FCVT,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZU_Nssi, ARM64_INS_FCVTZU,
+ AArch64_FCVTXNv1i64, ARM64_INS_FCVTXN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZUdd, ARM64_INS_FCVTZU,
+ AArch64_FCVTXNv2f32, ARM64_INS_FCVTXN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZUss, ARM64_INS_FCVTZU,
+ AArch64_FCVTXNv4f32, ARM64_INS_FCVTXN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZUwd, ARM64_INS_FCVTZU,
+ AArch64_FCVTZSSWDri, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZUwdi, ARM64_INS_FCVTZU,
+ AArch64_FCVTZSSWSri, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZUws, ARM64_INS_FCVTZU,
+ AArch64_FCVTZSSXDri, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZUwsi, ARM64_INS_FCVTZU,
+ AArch64_FCVTZSSXSri, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZUxd, ARM64_INS_FCVTZU,
+ AArch64_FCVTZSUWDr, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZUxdi, ARM64_INS_FCVTZU,
+ AArch64_FCVTZSUWSr, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZUxs, ARM64_INS_FCVTZU,
+ AArch64_FCVTZSUXDr, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTZUxsi, ARM64_INS_FCVTZU,
+ AArch64_FCVTZSUXSr, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTdh, ARM64_INS_FCVT,
+ AArch64_FCVTZS_IntSWDri, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTds, ARM64_INS_FCVT,
+ AArch64_FCVTZS_IntSWSri, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVThd, ARM64_INS_FCVT,
+ AArch64_FCVTZS_IntSXDri, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVThs, ARM64_INS_FCVT,
+ AArch64_FCVTZS_IntSXSri, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTsd, ARM64_INS_FCVT,
+ AArch64_FCVTZS_IntUWDr, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FCVTsh, ARM64_INS_FCVT,
+ AArch64_FCVTZS_IntUWSr, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FDIVddd, ARM64_INS_FDIV,
+ AArch64_FCVTZS_IntUXDr, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FDIVsss, ARM64_INS_FDIV,
+ AArch64_FCVTZS_IntUXSr, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FDIVvvv_2D, ARM64_INS_FDIV,
+ AArch64_FCVTZS_Intv2f32, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FDIVvvv_2S, ARM64_INS_FDIV,
+ AArch64_FCVTZS_Intv2f64, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FDIVvvv_4S, ARM64_INS_FDIV,
+ AArch64_FCVTZS_Intv4f32, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMADDdddd, ARM64_INS_FMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMADDssss, ARM64_INS_FMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMPvv_D_2D, ARM64_INS_FMAXNMP,
+ AArch64_FCVTZSd, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXNMPvv_S_2S, ARM64_INS_FMAXNMP,
+ AArch64_FCVTZSs, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXNMPvvv_2D, ARM64_INS_FMAXNMP,
+ AArch64_FCVTZSv1i32, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXNMPvvv_2S, ARM64_INS_FMAXNMP,
+ AArch64_FCVTZSv1i64, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXNMPvvv_4S, ARM64_INS_FMAXNMP,
+ AArch64_FCVTZSv2f32, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXNMV_1s4s, ARM64_INS_FMAXNMV,
+ AArch64_FCVTZSv2f64, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXNMddd, ARM64_INS_FMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMsss, ARM64_INS_FMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMvvv_2D, ARM64_INS_FMAXNM,
+ AArch64_FCVTZSv2i32_shift, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXNMvvv_2S, ARM64_INS_FMAXNM,
+ AArch64_FCVTZSv2i64_shift, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXNMvvv_4S, ARM64_INS_FMAXNM,
+ AArch64_FCVTZSv4f32, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXPvv_D_2D, ARM64_INS_FMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXPvv_S_2S, ARM64_INS_FMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXPvvv_2D, ARM64_INS_FMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXPvvv_2S, ARM64_INS_FMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXPvvv_4S, ARM64_INS_FMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXV_1s4s, ARM64_INS_FMAXV,
+ AArch64_FCVTZSv4i32_shift, ARM64_INS_FCVTZS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXddd, ARM64_INS_FMAX,
+ AArch64_FCVTZUSWDri, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXsss, ARM64_INS_FMAX,
+ AArch64_FCVTZUSWSri, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXvvv_2D, ARM64_INS_FMAX,
+ AArch64_FCVTZUSXDri, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXvvv_2S, ARM64_INS_FMAX,
+ AArch64_FCVTZUSXSri, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMAXvvv_4S, ARM64_INS_FMAX,
+ AArch64_FCVTZUUWDr, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINNMPvv_D_2D, ARM64_INS_FMINNMP,
+ AArch64_FCVTZUUWSr, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINNMPvv_S_2S, ARM64_INS_FMINNMP,
+ AArch64_FCVTZUUXDr, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINNMPvvv_2D, ARM64_INS_FMINNMP,
+ AArch64_FCVTZUUXSr, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINNMPvvv_2S, ARM64_INS_FMINNMP,
+ AArch64_FCVTZU_IntSWDri, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINNMPvvv_4S, ARM64_INS_FMINNMP,
+ AArch64_FCVTZU_IntSWSri, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINNMV_1s4s, ARM64_INS_FMINNMV,
+ AArch64_FCVTZU_IntSXDri, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINNMddd, ARM64_INS_FMINNM,
+ AArch64_FCVTZU_IntSXSri, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINNMsss, ARM64_INS_FMINNM,
+ AArch64_FCVTZU_IntUWDr, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINNMvvv_2D, ARM64_INS_FMINNM,
+ AArch64_FCVTZU_IntUWSr, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINNMvvv_2S, ARM64_INS_FMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMvvv_4S, ARM64_INS_FMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINPvv_D_2D, ARM64_INS_FMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINPvv_S_2S, ARM64_INS_FMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINPvvv_2D, ARM64_INS_FMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINPvvv_2S, ARM64_INS_FMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINPvvv_4S, ARM64_INS_FMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINV_1s4s, ARM64_INS_FMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINddd, ARM64_INS_FMIN,
+ AArch64_FCVTZU_IntUXDr, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINsss, ARM64_INS_FMIN,
+ AArch64_FCVTZU_IntUXSr, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMINvvv_2D, ARM64_INS_FMIN,
+ AArch64_FCVTZU_Intv2f32, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMINvvv_2S, ARM64_INS_FMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINvvv_4S, ARM64_INS_FMIN,
+ AArch64_FCVTZU_Intv2f64, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLAddv_2D, ARM64_INS_FMLA,
+ AArch64_FCVTZU_Intv4f32, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLAssv_4S, ARM64_INS_FMLA,
+ AArch64_FCVTZUd, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLAvve_2d2d, ARM64_INS_FMLA,
+ AArch64_FCVTZUs, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLAvve_2s4s, ARM64_INS_FMLA,
+ AArch64_FCVTZUv1i32, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLAvve_4s4s, ARM64_INS_FMLA,
+ AArch64_FCVTZUv1i64, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLAvvv_2D, ARM64_INS_FMLA,
+ AArch64_FCVTZUv2f32, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLAvvv_2S, ARM64_INS_FMLA,
+ AArch64_FCVTZUv2f64, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLAvvv_4S, ARM64_INS_FMLA,
+ AArch64_FCVTZUv2i32_shift, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLSddv_2D, ARM64_INS_FMLS,
+ AArch64_FCVTZUv2i64_shift, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLSssv_4S, ARM64_INS_FMLS,
+ AArch64_FCVTZUv4f32, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLSvve_2d2d, ARM64_INS_FMLS,
+ AArch64_FCVTZUv4i32_shift, ARM64_INS_FCVTZU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLSvve_2s4s, ARM64_INS_FMLS,
+ AArch64_FDIVDrr, ARM64_INS_FDIV,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMLSvve_4s4s, ARM64_INS_FMLS,
+ AArch64_FDIVSrr, ARM64_INS_FDIV,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMLSvvv_2D, ARM64_INS_FMLS,
+ AArch64_FDIVv2f32, ARM64_INS_FDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLSvvv_2S, ARM64_INS_FMLS,
+ AArch64_FDIVv2f64, ARM64_INS_FDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMLSvvv_4S, ARM64_INS_FMLS,
+ AArch64_FDIVv4f32, ARM64_INS_FDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVdd, ARM64_INS_FMOV,
+ AArch64_FMADDDrrr, ARM64_INS_FMADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVdi, ARM64_INS_FMOV,
+ AArch64_FMADDSrrr, ARM64_INS_FMADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVdx, ARM64_INS_FMOV,
+ AArch64_FMAXDrr, ARM64_INS_FMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVsi, ARM64_INS_FMOV,
+ AArch64_FMAXNMDrr, ARM64_INS_FMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVss, ARM64_INS_FMOV,
+ AArch64_FMAXNMPv2f32, ARM64_INS_FMAXNMP,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVsw, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVvi_2D, ARM64_INS_FMOV,
+ AArch64_FMAXNMPv2f64, ARM64_INS_FMAXNMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVvi_2S, ARM64_INS_FMOV,
+ AArch64_FMAXNMPv2i32p, ARM64_INS_FMAXNMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVvi_4S, ARM64_INS_FMOV,
+ AArch64_FMAXNMPv2i64p, ARM64_INS_FMAXNMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVvx, ARM64_INS_FMOV,
+ AArch64_FMAXNMPv4f32, ARM64_INS_FMAXNMP,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVws, ARM64_INS_FMOV,
+ AArch64_FMAXNMSrr, ARM64_INS_FMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMOVxd, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVxv, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMSUBdddd, ARM64_INS_FMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMSUBssss, ARM64_INS_FMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULXddd, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULXddv_2D, ARM64_INS_FMULX,
+ AArch64_FMAXNMVv4i32v, ARM64_INS_FMAXNMV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULXsss, ARM64_INS_FMULX,
+ AArch64_FMAXNMv2f32, ARM64_INS_FMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULXssv_4S, ARM64_INS_FMULX,
+ AArch64_FMAXNMv2f64, ARM64_INS_FMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULXve_2d2d, ARM64_INS_FMULX,
+ AArch64_FMAXNMv4f32, ARM64_INS_FMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULXve_2s4s, ARM64_INS_FMULX,
+ AArch64_FMAXPv2f32, ARM64_INS_FMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULXve_4s4s, ARM64_INS_FMULX,
+ AArch64_FMAXPv2f64, ARM64_INS_FMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULXvvv_2D, ARM64_INS_FMULX,
+ AArch64_FMAXPv2i32p, ARM64_INS_FMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULXvvv_2S, ARM64_INS_FMULX,
+ AArch64_FMAXPv2i64p, ARM64_INS_FMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULXvvv_4S, ARM64_INS_FMULX,
+ AArch64_FMAXPv4f32, ARM64_INS_FMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULddd, ARM64_INS_FMUL,
+ AArch64_FMAXSrr, ARM64_INS_FMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMULddv_2D, ARM64_INS_FMUL,
+ AArch64_FMAXVv4i32v, ARM64_INS_FMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULsss, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULssv_4S, ARM64_INS_FMUL,
+ AArch64_FMAXv2f32, ARM64_INS_FMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULve_2d2d, ARM64_INS_FMUL,
+ AArch64_FMAXv2f64, ARM64_INS_FMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULve_2s4s, ARM64_INS_FMUL,
+ AArch64_FMAXv4f32, ARM64_INS_FMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULve_4s4s, ARM64_INS_FMUL,
+ AArch64_FMINDrr, ARM64_INS_FMIN,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMULvvv_2D, ARM64_INS_FMUL,
+ AArch64_FMINNMDrr, ARM64_INS_FMINNM,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FMULvvv_2S, ARM64_INS_FMUL,
+ AArch64_FMINNMPv2f32, ARM64_INS_FMINNMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FMULvvv_4S, ARM64_INS_FMUL,
+ AArch64_FMINNMPv2f64, ARM64_INS_FMINNMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FNEG2d, ARM64_INS_FNEG,
+ AArch64_FMINNMPv2i32p, ARM64_INS_FMINNMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FNEG2s, ARM64_INS_FNEG,
+ AArch64_FMINNMPv2i64p, ARM64_INS_FMINNMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FNEG4s, ARM64_INS_FNEG,
+ AArch64_FMINNMPv4f32, ARM64_INS_FMINNMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FNEGdd, ARM64_INS_FNEG,
+ AArch64_FMINNMSrr, ARM64_INS_FMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FNEGss, ARM64_INS_FNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMADDdddd, ARM64_INS_FNMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMADDssss, ARM64_INS_FNMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMSUBdddd, ARM64_INS_FNMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMSUBssss, ARM64_INS_FNMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMULddd, ARM64_INS_FNMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMULsss, ARM64_INS_FNMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPE_2d, ARM64_INS_FRECPE,
+ AArch64_FMINNMVv4i32v, ARM64_INS_FMINNMV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPE_2s, ARM64_INS_FRECPE,
+ AArch64_FMINNMv2f32, ARM64_INS_FMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPE_4s, ARM64_INS_FRECPE,
+ AArch64_FMINNMv2f64, ARM64_INS_FMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPEdd, ARM64_INS_FRECPE,
+ AArch64_FMINNMv4f32, ARM64_INS_FMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPEss, ARM64_INS_FRECPE,
+ AArch64_FMINPv2f32, ARM64_INS_FMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPSddd, ARM64_INS_FRECPS,
+ AArch64_FMINPv2f64, ARM64_INS_FMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPSsss, ARM64_INS_FRECPS,
+ AArch64_FMINPv2i32p, ARM64_INS_FMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPSvvv_2D, ARM64_INS_FRECPS,
+ AArch64_FMINPv2i64p, ARM64_INS_FMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPSvvv_2S, ARM64_INS_FRECPS,
+ AArch64_FMINPv4f32, ARM64_INS_FMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPSvvv_4S, ARM64_INS_FRECPS,
+ AArch64_FMINSrr, ARM64_INS_FMIN,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPXdd, ARM64_INS_FRECPX,
+ AArch64_FMINVv4i32v, ARM64_INS_FMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRECPXss, ARM64_INS_FRECPX,
+ AArch64_FMINv2f32, ARM64_INS_FMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTA_2d, ARM64_INS_FRINTA,
+ AArch64_FMINv2f64, ARM64_INS_FMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTA_2s, ARM64_INS_FRINTA,
+ AArch64_FMINv4f32, ARM64_INS_FMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTA_4s, ARM64_INS_FRINTA,
+ AArch64_FMLAv1i32_indexed, ARM64_INS_FMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTAdd, ARM64_INS_FRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTAss, ARM64_INS_FRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTI_2d, ARM64_INS_FRINTI,
+ AArch64_FMLAv1i64_indexed, ARM64_INS_FMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTI_2s, ARM64_INS_FRINTI,
+ AArch64_FMLAv2f32, ARM64_INS_FMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTI_4s, ARM64_INS_FRINTI,
+ AArch64_FMLAv2f64, ARM64_INS_FMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTIdd, ARM64_INS_FRINTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTIss, ARM64_INS_FRINTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTM_2d, ARM64_INS_FRINTM,
+ AArch64_FMLAv2i32_indexed, ARM64_INS_FMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTM_2s, ARM64_INS_FRINTM,
+ AArch64_FMLAv2i64_indexed, ARM64_INS_FMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTM_4s, ARM64_INS_FRINTM,
+ AArch64_FMLAv4f32, ARM64_INS_FMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTMdd, ARM64_INS_FRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTMss, ARM64_INS_FRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTN_2d, ARM64_INS_FRINTN,
+ AArch64_FMLAv4i32_indexed, ARM64_INS_FMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTN_2s, ARM64_INS_FRINTN,
+ AArch64_FMLSv1i32_indexed, ARM64_INS_FMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTN_4s, ARM64_INS_FRINTN,
+ AArch64_FMLSv1i64_indexed, ARM64_INS_FMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTNdd, ARM64_INS_FRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTNss, ARM64_INS_FRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTP_2d, ARM64_INS_FRINTP,
+ AArch64_FMLSv2f32, ARM64_INS_FMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTP_2s, ARM64_INS_FRINTP,
+ AArch64_FMLSv2f64, ARM64_INS_FMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTP_4s, ARM64_INS_FRINTP,
+ AArch64_FMLSv2i32_indexed, ARM64_INS_FMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTPdd, ARM64_INS_FRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTPss, ARM64_INS_FRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTX_2d, ARM64_INS_FRINTX,
+ AArch64_FMLSv2i64_indexed, ARM64_INS_FMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTX_2s, ARM64_INS_FRINTX,
+ AArch64_FMLSv4f32, ARM64_INS_FMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTX_4s, ARM64_INS_FRINTX,
+ AArch64_FMLSv4i32_indexed, ARM64_INS_FMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTXdd, ARM64_INS_FRINTX,
+ AArch64_FMOVDXHighr, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTXss, ARM64_INS_FRINTX,
+ AArch64_FMOVDXr, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTZ_2d, ARM64_INS_FRINTZ,
+ AArch64_FMOVDi, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTZ_2s, ARM64_INS_FRINTZ,
+ AArch64_FMOVDr, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTZ_4s, ARM64_INS_FRINTZ,
+ AArch64_FMOVSWr, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTZdd, ARM64_INS_FRINTZ,
+ AArch64_FMOVSi, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FRINTZss, ARM64_INS_FRINTZ,
+ AArch64_FMOVSr, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FRSQRTE_2d, ARM64_INS_FRSQRTE,
+ AArch64_FMOVWSr, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FRSQRTE_2s, ARM64_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTE_4s, ARM64_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTEdd, ARM64_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTEss, ARM64_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTSddd, ARM64_INS_FRSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTSsss, ARM64_INS_FRSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTSvvv_2D, ARM64_INS_FRSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTSvvv_2S, ARM64_INS_FRSQRTS,
+ AArch64_FMOVXDHighr, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FRSQRTSvvv_4S, ARM64_INS_FRSQRTS,
+ AArch64_FMOVXDr, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FSQRT_2d, ARM64_INS_FSQRT,
+ AArch64_FMOVv2f32_ns, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FSQRT_2s, ARM64_INS_FSQRT,
+ AArch64_FMOVv2f64_ns, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FSQRT_4s, ARM64_INS_FSQRT,
+ AArch64_FMOVv4f32_ns, ARM64_INS_FMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FSQRTdd, ARM64_INS_FSQRT,
+ AArch64_FMSUBDrrr, ARM64_INS_FMSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FSQRTss, ARM64_INS_FSQRT,
+ AArch64_FMSUBSrrr, ARM64_INS_FMSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FSUBddd, ARM64_INS_FSUB,
+ AArch64_FMULDrr, ARM64_INS_FMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FSUBsss, ARM64_INS_FSUB,
+ AArch64_FMULSrr, ARM64_INS_FMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_FSUBvvv_2D, ARM64_INS_FSUB,
+ AArch64_FMULX32, ARM64_INS_FMULX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FSUBvvv_2S, ARM64_INS_FSUB,
+ AArch64_FMULX64, ARM64_INS_FMULX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_FSUBvvv_4S, ARM64_INS_FSUB,
+ AArch64_FMULXv1i32_indexed, ARM64_INS_FMULX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_HINTi, ARM64_INS_HINT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_HLTi, ARM64_INS_HLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_HVCi, ARM64_INS_HVC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_ICi, ARM64_INS_IC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ICix, ARM64_INS_IC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_INSELb, ARM64_INS_INS,
+ AArch64_FMULXv1i64_indexed, ARM64_INS_FMULX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_INSELd, ARM64_INS_INS,
+ AArch64_FMULXv2f32, ARM64_INS_FMULX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_INSELh, ARM64_INS_INS,
+ AArch64_FMULXv2f64, ARM64_INS_FMULX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_INSELs, ARM64_INS_INS,
+ AArch64_FMULXv2i32_indexed, ARM64_INS_FMULX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_INSbw, ARM64_INS_INS,
+ AArch64_FMULXv2i64_indexed, ARM64_INS_FMULX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_INSdx, ARM64_INS_INS,
+ AArch64_FMULXv4f32, ARM64_INS_FMULX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_INShw, ARM64_INS_INS,
+ AArch64_FMULXv4i32_indexed, ARM64_INS_FMULX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_INSsw, ARM64_INS_INS,
+ AArch64_FMULv1i32_indexed, ARM64_INS_FMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ISBi, ARM64_INS_ISB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1LN_B, ARM64_INS_LD1,
+ AArch64_FMULv1i64_indexed, ARM64_INS_FMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_D, ARM64_INS_LD1,
+ AArch64_FMULv2f32, ARM64_INS_FMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_H, ARM64_INS_LD1,
+ AArch64_FMULv2f64, ARM64_INS_FMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_S, ARM64_INS_LD1,
+ AArch64_FMULv2i32_indexed, ARM64_INS_FMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_WB_B_fixed, ARM64_INS_LD1,
+ AArch64_FMULv2i64_indexed, ARM64_INS_FMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_WB_B_register, ARM64_INS_LD1,
+ AArch64_FMULv4f32, ARM64_INS_FMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_WB_D_fixed, ARM64_INS_LD1,
+ AArch64_FMULv4i32_indexed, ARM64_INS_FMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_WB_D_register, ARM64_INS_LD1,
+ AArch64_FNEGDr, ARM64_INS_FNEG,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_WB_H_fixed, ARM64_INS_LD1,
+ AArch64_FNEGSr, ARM64_INS_FNEG,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_WB_H_register, ARM64_INS_LD1,
+ AArch64_FNEGv2f32, ARM64_INS_FNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_WB_S_fixed, ARM64_INS_LD1,
+ AArch64_FNEGv2f64, ARM64_INS_FNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1LN_WB_S_register, ARM64_INS_LD1,
+ AArch64_FNEGv4f32, ARM64_INS_FNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_16B, ARM64_INS_LD1R,
+ AArch64_FNMADDDrrr, ARM64_INS_FNMADD,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_1D, ARM64_INS_LD1R,
+ AArch64_FNMADDSrrr, ARM64_INS_FNMADD,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_2D, ARM64_INS_LD1R,
+ AArch64_FNMSUBDrrr, ARM64_INS_FNMSUB,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_2S, ARM64_INS_LD1R,
+ AArch64_FNMSUBSrrr, ARM64_INS_FNMSUB,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_4H, ARM64_INS_LD1R,
+ AArch64_FNMULDrr, ARM64_INS_FNMUL,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_4S, ARM64_INS_LD1R,
+ AArch64_FNMULSrr, ARM64_INS_FNMUL,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_8B, ARM64_INS_LD1R,
+ AArch64_FRECPEv1i32, ARM64_INS_FRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_8H, ARM64_INS_LD1R,
+ AArch64_FRECPEv1i64, ARM64_INS_FRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_16B_fixed, ARM64_INS_LD1R,
+ AArch64_FRECPEv2f32, ARM64_INS_FRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_16B_register, ARM64_INS_LD1R,
+ AArch64_FRECPEv2f64, ARM64_INS_FRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_1D_fixed, ARM64_INS_LD1R,
+ AArch64_FRECPEv4f32, ARM64_INS_FRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_1D_register, ARM64_INS_LD1R,
+ AArch64_FRECPS32, ARM64_INS_FRECPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_2D_fixed, ARM64_INS_LD1R,
+ AArch64_FRECPS64, ARM64_INS_FRECPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_2D_register, ARM64_INS_LD1R,
+ AArch64_FRECPSv2f32, ARM64_INS_FRECPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_2S_fixed, ARM64_INS_LD1R,
+ AArch64_FRECPSv2f64, ARM64_INS_FRECPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_2S_register, ARM64_INS_LD1R,
+ AArch64_FRECPSv4f32, ARM64_INS_FRECPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_4H_fixed, ARM64_INS_LD1R,
+ AArch64_FRECPXv1i32, ARM64_INS_FRECPX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_4H_register, ARM64_INS_LD1R,
+ AArch64_FRECPXv1i64, ARM64_INS_FRECPX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_4S_fixed, ARM64_INS_LD1R,
+ AArch64_FRINTADr, ARM64_INS_FRINTA,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_4S_register, ARM64_INS_LD1R,
+ AArch64_FRINTASr, ARM64_INS_FRINTA,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_8B_fixed, ARM64_INS_LD1R,
+ AArch64_FRINTAv2f32, ARM64_INS_FRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_8B_register, ARM64_INS_LD1R,
+ AArch64_FRINTAv2f64, ARM64_INS_FRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_8H_fixed, ARM64_INS_LD1R,
+ AArch64_FRINTAv4f32, ARM64_INS_FRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1R_WB_8H_register, ARM64_INS_LD1R,
+ AArch64_FRINTIDr, ARM64_INS_FRINTI,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_16B_fixed, ARM64_INS_LD1,
+ AArch64_FRINTISr, ARM64_INS_FRINTI,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_16B_register, ARM64_INS_LD1,
+ AArch64_FRINTIv2f32, ARM64_INS_FRINTI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_1D_fixed, ARM64_INS_LD1,
+ AArch64_FRINTIv2f64, ARM64_INS_FRINTI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_1D_register, ARM64_INS_LD1,
+ AArch64_FRINTIv4f32, ARM64_INS_FRINTI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_2D_fixed, ARM64_INS_LD1,
+ AArch64_FRINTMDr, ARM64_INS_FRINTM,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_2D_register, ARM64_INS_LD1,
+ AArch64_FRINTMSr, ARM64_INS_FRINTM,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_2S_fixed, ARM64_INS_LD1,
+ AArch64_FRINTMv2f32, ARM64_INS_FRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_2S_register, ARM64_INS_LD1,
+ AArch64_FRINTMv2f64, ARM64_INS_FRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_4H_fixed, ARM64_INS_LD1,
+ AArch64_FRINTMv4f32, ARM64_INS_FRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_4H_register, ARM64_INS_LD1,
+ AArch64_FRINTNDr, ARM64_INS_FRINTN,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_4S_fixed, ARM64_INS_LD1,
+ AArch64_FRINTNSr, ARM64_INS_FRINTN,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_4S_register, ARM64_INS_LD1,
+ AArch64_FRINTNv2f32, ARM64_INS_FRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_8B_fixed, ARM64_INS_LD1,
+ AArch64_FRINTNv2f64, ARM64_INS_FRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_8B_register, ARM64_INS_LD1,
+ AArch64_FRINTNv4f32, ARM64_INS_FRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_8H_fixed, ARM64_INS_LD1,
+ AArch64_FRINTPDr, ARM64_INS_FRINTP,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1WB_8H_register, ARM64_INS_LD1,
+ AArch64_FRINTPSr, ARM64_INS_FRINTP,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1_16B, ARM64_INS_LD1,
+ AArch64_FRINTPv2f32, ARM64_INS_FRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1_1D, ARM64_INS_LD1,
+ AArch64_FRINTPv2f64, ARM64_INS_FRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1_2D, ARM64_INS_LD1,
+ AArch64_FRINTPv4f32, ARM64_INS_FRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1_2S, ARM64_INS_LD1,
+ AArch64_FRINTXDr, ARM64_INS_FRINTX,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1_4H, ARM64_INS_LD1,
+ AArch64_FRINTXSr, ARM64_INS_FRINTX,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1_4S, ARM64_INS_LD1,
+ AArch64_FRINTXv2f32, ARM64_INS_FRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1_8B, ARM64_INS_LD1,
+ AArch64_FRINTXv2f64, ARM64_INS_FRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1_8H, ARM64_INS_LD1,
+ AArch64_FRINTXv4f32, ARM64_INS_FRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_16B_fixed, ARM64_INS_LD1,
+ AArch64_FRINTZDr, ARM64_INS_FRINTZ,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_16B_register, ARM64_INS_LD1,
+ AArch64_FRINTZSr, ARM64_INS_FRINTZ,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_1D_fixed, ARM64_INS_LD1,
+ AArch64_FRINTZv2f32, ARM64_INS_FRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_1D_register, ARM64_INS_LD1,
+ AArch64_FRINTZv2f64, ARM64_INS_FRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_2D_fixed, ARM64_INS_LD1,
+ AArch64_FRINTZv4f32, ARM64_INS_FRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_2D_register, ARM64_INS_LD1,
+ AArch64_FRSQRTEv1i32, ARM64_INS_FRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_2S_fixed, ARM64_INS_LD1,
+ AArch64_FRSQRTEv1i64, ARM64_INS_FRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_2S_register, ARM64_INS_LD1,
+ AArch64_FRSQRTEv2f32, ARM64_INS_FRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_4H_fixed, ARM64_INS_LD1,
+ AArch64_FRSQRTEv2f64, ARM64_INS_FRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_4H_register, ARM64_INS_LD1,
+ AArch64_FRSQRTEv4f32, ARM64_INS_FRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_4S_fixed, ARM64_INS_LD1,
+ AArch64_FRSQRTS32, ARM64_INS_FRSQRTS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_4S_register, ARM64_INS_LD1,
+ AArch64_FRSQRTS64, ARM64_INS_FRSQRTS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_8B_fixed, ARM64_INS_LD1,
+ AArch64_FRSQRTSv2f32, ARM64_INS_FRSQRTS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_8B_register, ARM64_INS_LD1,
+ AArch64_FRSQRTSv2f64, ARM64_INS_FRSQRTS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_8H_fixed, ARM64_INS_LD1,
+ AArch64_FRSQRTSv4f32, ARM64_INS_FRSQRTS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2WB_8H_register, ARM64_INS_LD1,
+ AArch64_FSQRTDr, ARM64_INS_FSQRT,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2_16B, ARM64_INS_LD1,
+ AArch64_FSQRTSr, ARM64_INS_FSQRT,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2_1D, ARM64_INS_LD1,
+ AArch64_FSQRTv2f32, ARM64_INS_FSQRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2_2D, ARM64_INS_LD1,
+ AArch64_FSQRTv2f64, ARM64_INS_FSQRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2_2S, ARM64_INS_LD1,
+ AArch64_FSQRTv4f32, ARM64_INS_FSQRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2_4H, ARM64_INS_LD1,
+ AArch64_FSUBDrr, ARM64_INS_FSUB,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2_4S, ARM64_INS_LD1,
+ AArch64_FSUBSrr, ARM64_INS_FSUB,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2_8B, ARM64_INS_LD1,
+ AArch64_FSUBv2f32, ARM64_INS_FSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x2_8H, ARM64_INS_LD1,
+ AArch64_FSUBv2f64, ARM64_INS_FSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_16B_fixed, ARM64_INS_LD1,
+ AArch64_FSUBv4f32, ARM64_INS_FSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_16B_register, ARM64_INS_LD1,
+ AArch64_HINT, ARM64_INS_HINT,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_1D_fixed, ARM64_INS_LD1,
+ AArch64_HLT, ARM64_INS_HLT,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_1D_register, ARM64_INS_LD1,
+ AArch64_HVC, ARM64_INS_HVC,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_2D_fixed, ARM64_INS_LD1,
+ AArch64_INSvi16gpr, ARM64_INS_INS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_2D_register, ARM64_INS_LD1,
+ AArch64_INSvi16lane, ARM64_INS_INS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_2S_fixed, ARM64_INS_LD1,
+ AArch64_INSvi32gpr, ARM64_INS_INS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_2S_register, ARM64_INS_LD1,
+ AArch64_INSvi32lane, ARM64_INS_INS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_4H_fixed, ARM64_INS_LD1,
+ AArch64_INSvi64gpr, ARM64_INS_INS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_4H_register, ARM64_INS_LD1,
+ AArch64_INSvi64lane, ARM64_INS_INS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_4S_fixed, ARM64_INS_LD1,
+ AArch64_INSvi8gpr, ARM64_INS_INS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_4S_register, ARM64_INS_LD1,
+ AArch64_INSvi8lane, ARM64_INS_INS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_8B_fixed, ARM64_INS_LD1,
+ AArch64_ISB, ARM64_INS_ISB,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_8B_register, ARM64_INS_LD1,
+ AArch64_LD1Fourv16b, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_8H_fixed, ARM64_INS_LD1,
+ AArch64_LD1Fourv16b_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3WB_8H_register, ARM64_INS_LD1,
+ AArch64_LD1Fourv1d, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3_16B, ARM64_INS_LD1,
+ AArch64_LD1Fourv1d_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3_1D, ARM64_INS_LD1,
+ AArch64_LD1Fourv2d, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3_2D, ARM64_INS_LD1,
+ AArch64_LD1Fourv2d_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3_2S, ARM64_INS_LD1,
+ AArch64_LD1Fourv2s, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3_4H, ARM64_INS_LD1,
+ AArch64_LD1Fourv2s_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3_4S, ARM64_INS_LD1,
+ AArch64_LD1Fourv4h, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3_8B, ARM64_INS_LD1,
+ AArch64_LD1Fourv4h_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x3_8H, ARM64_INS_LD1,
+ AArch64_LD1Fourv4s, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_16B_fixed, ARM64_INS_LD1,
+ AArch64_LD1Fourv4s_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_16B_register, ARM64_INS_LD1,
+ AArch64_LD1Fourv8b, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_1D_fixed, ARM64_INS_LD1,
+ AArch64_LD1Fourv8b_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_1D_register, ARM64_INS_LD1,
+ AArch64_LD1Fourv8h, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_2D_fixed, ARM64_INS_LD1,
+ AArch64_LD1Fourv8h_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_2D_register, ARM64_INS_LD1,
+ AArch64_LD1Onev16b, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_2S_fixed, ARM64_INS_LD1,
+ AArch64_LD1Onev16b_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_2S_register, ARM64_INS_LD1,
+ AArch64_LD1Onev1d, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_4H_fixed, ARM64_INS_LD1,
+ AArch64_LD1Onev1d_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_4H_register, ARM64_INS_LD1,
+ AArch64_LD1Onev2d, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_4S_fixed, ARM64_INS_LD1,
+ AArch64_LD1Onev2d_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_4S_register, ARM64_INS_LD1,
+ AArch64_LD1Onev2s, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_8B_fixed, ARM64_INS_LD1,
+ AArch64_LD1Onev2s_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_8B_register, ARM64_INS_LD1,
+ AArch64_LD1Onev4h, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_8H_fixed, ARM64_INS_LD1,
+ AArch64_LD1Onev4h_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4WB_8H_register, ARM64_INS_LD1,
+ AArch64_LD1Onev4s, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4_16B, ARM64_INS_LD1,
+ AArch64_LD1Onev4s_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4_1D, ARM64_INS_LD1,
+ AArch64_LD1Onev8b, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4_2D, ARM64_INS_LD1,
+ AArch64_LD1Onev8b_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4_2S, ARM64_INS_LD1,
+ AArch64_LD1Onev8h, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4_4H, ARM64_INS_LD1,
+ AArch64_LD1Onev8h_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4_4S, ARM64_INS_LD1,
+ AArch64_LD1Rv16b, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4_8B, ARM64_INS_LD1,
+ AArch64_LD1Rv16b_POST, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD1x4_8H, ARM64_INS_LD1,
+ AArch64_LD1Rv1d, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_B, ARM64_INS_LD2,
+ AArch64_LD1Rv1d_POST, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_D, ARM64_INS_LD2,
+ AArch64_LD1Rv2d, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_H, ARM64_INS_LD2,
+ AArch64_LD1Rv2d_POST, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_S, ARM64_INS_LD2,
+ AArch64_LD1Rv2s, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_WB_B_fixed, ARM64_INS_LD2,
+ AArch64_LD1Rv2s_POST, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_WB_B_register, ARM64_INS_LD2,
+ AArch64_LD1Rv4h, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_WB_D_fixed, ARM64_INS_LD2,
+ AArch64_LD1Rv4h_POST, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_WB_D_register, ARM64_INS_LD2,
+ AArch64_LD1Rv4s, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_WB_H_fixed, ARM64_INS_LD2,
+ AArch64_LD1Rv4s_POST, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_WB_H_register, ARM64_INS_LD2,
+ AArch64_LD1Rv8b, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_WB_S_fixed, ARM64_INS_LD2,
+ AArch64_LD1Rv8b_POST, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2LN_WB_S_register, ARM64_INS_LD2,
+ AArch64_LD1Rv8h, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_16B, ARM64_INS_LD2R,
+ AArch64_LD1Rv8h_POST, ARM64_INS_LD1R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_1D, ARM64_INS_LD2R,
+ AArch64_LD1Threev16b, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_2D, ARM64_INS_LD2R,
+ AArch64_LD1Threev16b_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_2S, ARM64_INS_LD2R,
+ AArch64_LD1Threev1d, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_4H, ARM64_INS_LD2R,
+ AArch64_LD1Threev1d_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_4S, ARM64_INS_LD2R,
+ AArch64_LD1Threev2d, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_8B, ARM64_INS_LD2R,
+ AArch64_LD1Threev2d_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_8H, ARM64_INS_LD2R,
+ AArch64_LD1Threev2s, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_16B_fixed, ARM64_INS_LD2R,
+ AArch64_LD1Threev2s_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_16B_register, ARM64_INS_LD2R,
+ AArch64_LD1Threev4h, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_1D_fixed, ARM64_INS_LD2R,
+ AArch64_LD1Threev4h_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_1D_register, ARM64_INS_LD2R,
+ AArch64_LD1Threev4s, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_2D_fixed, ARM64_INS_LD2R,
+ AArch64_LD1Threev4s_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_2D_register, ARM64_INS_LD2R,
+ AArch64_LD1Threev8b, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_2S_fixed, ARM64_INS_LD2R,
+ AArch64_LD1Threev8b_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_2S_register, ARM64_INS_LD2R,
+ AArch64_LD1Threev8h, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_4H_fixed, ARM64_INS_LD2R,
+ AArch64_LD1Threev8h_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_4H_register, ARM64_INS_LD2R,
+ AArch64_LD1Twov16b, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_4S_fixed, ARM64_INS_LD2R,
+ AArch64_LD1Twov16b_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_4S_register, ARM64_INS_LD2R,
+ AArch64_LD1Twov1d, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_8B_fixed, ARM64_INS_LD2R,
+ AArch64_LD1Twov1d_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_8B_register, ARM64_INS_LD2R,
+ AArch64_LD1Twov2d, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_8H_fixed, ARM64_INS_LD2R,
+ AArch64_LD1Twov2d_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2R_WB_8H_register, ARM64_INS_LD2R,
+ AArch64_LD1Twov2s, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_16B_fixed, ARM64_INS_LD2,
+ AArch64_LD1Twov2s_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_16B_register, ARM64_INS_LD2,
+ AArch64_LD1Twov4h, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_2D_fixed, ARM64_INS_LD2,
+ AArch64_LD1Twov4h_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_2D_register, ARM64_INS_LD2,
+ AArch64_LD1Twov4s, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_2S_fixed, ARM64_INS_LD2,
+ AArch64_LD1Twov4s_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_2S_register, ARM64_INS_LD2,
+ AArch64_LD1Twov8b, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_4H_fixed, ARM64_INS_LD2,
+ AArch64_LD1Twov8b_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_4H_register, ARM64_INS_LD2,
+ AArch64_LD1Twov8h, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_4S_fixed, ARM64_INS_LD2,
+ AArch64_LD1Twov8h_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_4S_register, ARM64_INS_LD2,
+ AArch64_LD1i16, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_8B_fixed, ARM64_INS_LD2,
+ AArch64_LD1i16_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_8B_register, ARM64_INS_LD2,
+ AArch64_LD1i32, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_8H_fixed, ARM64_INS_LD2,
+ AArch64_LD1i32_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2WB_8H_register, ARM64_INS_LD2,
+ AArch64_LD1i64, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2_16B, ARM64_INS_LD2,
+ AArch64_LD1i64_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2_2D, ARM64_INS_LD2,
+ AArch64_LD1i8, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2_2S, ARM64_INS_LD2,
+ AArch64_LD1i8_POST, ARM64_INS_LD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2_4H, ARM64_INS_LD2,
+ AArch64_LD2Rv16b, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2_4S, ARM64_INS_LD2,
+ AArch64_LD2Rv16b_POST, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2_8B, ARM64_INS_LD2,
+ AArch64_LD2Rv1d, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD2_8H, ARM64_INS_LD2,
+ AArch64_LD2Rv1d_POST, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_B, ARM64_INS_LD3,
+ AArch64_LD2Rv2d, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_D, ARM64_INS_LD3,
+ AArch64_LD2Rv2d_POST, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_H, ARM64_INS_LD3,
+ AArch64_LD2Rv2s, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_S, ARM64_INS_LD3,
+ AArch64_LD2Rv2s_POST, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_WB_B_fixed, ARM64_INS_LD3,
+ AArch64_LD2Rv4h, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_WB_B_register, ARM64_INS_LD3,
+ AArch64_LD2Rv4h_POST, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_WB_D_fixed, ARM64_INS_LD3,
+ AArch64_LD2Rv4s, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_WB_D_register, ARM64_INS_LD3,
+ AArch64_LD2Rv4s_POST, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_WB_H_fixed, ARM64_INS_LD3,
+ AArch64_LD2Rv8b, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_WB_H_register, ARM64_INS_LD3,
+ AArch64_LD2Rv8b_POST, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_WB_S_fixed, ARM64_INS_LD3,
+ AArch64_LD2Rv8h, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3LN_WB_S_register, ARM64_INS_LD3,
+ AArch64_LD2Rv8h_POST, ARM64_INS_LD2R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_16B, ARM64_INS_LD3R,
+ AArch64_LD2Twov16b, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_1D, ARM64_INS_LD3R,
+ AArch64_LD2Twov16b_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_2D, ARM64_INS_LD3R,
+ AArch64_LD2Twov2d, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_2S, ARM64_INS_LD3R,
+ AArch64_LD2Twov2d_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_4H, ARM64_INS_LD3R,
+ AArch64_LD2Twov2s, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_4S, ARM64_INS_LD3R,
+ AArch64_LD2Twov2s_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_8B, ARM64_INS_LD3R,
+ AArch64_LD2Twov4h, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_8H, ARM64_INS_LD3R,
+ AArch64_LD2Twov4h_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_16B_fixed, ARM64_INS_LD3R,
+ AArch64_LD2Twov4s, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_16B_register, ARM64_INS_LD3R,
+ AArch64_LD2Twov4s_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_1D_fixed, ARM64_INS_LD3R,
+ AArch64_LD2Twov8b, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_1D_register, ARM64_INS_LD3R,
+ AArch64_LD2Twov8b_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_2D_fixed, ARM64_INS_LD3R,
+ AArch64_LD2Twov8h, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_2D_register, ARM64_INS_LD3R,
+ AArch64_LD2Twov8h_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_2S_fixed, ARM64_INS_LD3R,
+ AArch64_LD2i16, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_2S_register, ARM64_INS_LD3R,
+ AArch64_LD2i16_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_4H_fixed, ARM64_INS_LD3R,
+ AArch64_LD2i32, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_4H_register, ARM64_INS_LD3R,
+ AArch64_LD2i32_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_4S_fixed, ARM64_INS_LD3R,
+ AArch64_LD2i64, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_4S_register, ARM64_INS_LD3R,
+ AArch64_LD2i64_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_8B_fixed, ARM64_INS_LD3R,
+ AArch64_LD2i8, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_8B_register, ARM64_INS_LD3R,
+ AArch64_LD2i8_POST, ARM64_INS_LD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_8H_fixed, ARM64_INS_LD3R,
+ AArch64_LD3Rv16b, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3R_WB_8H_register, ARM64_INS_LD3R,
+ AArch64_LD3Rv16b_POST, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_16B_fixed, ARM64_INS_LD3,
+ AArch64_LD3Rv1d, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_16B_register, ARM64_INS_LD3,
+ AArch64_LD3Rv1d_POST, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_2D_fixed, ARM64_INS_LD3,
+ AArch64_LD3Rv2d, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_2D_register, ARM64_INS_LD3,
+ AArch64_LD3Rv2d_POST, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_2S_fixed, ARM64_INS_LD3,
+ AArch64_LD3Rv2s, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_2S_register, ARM64_INS_LD3,
+ AArch64_LD3Rv2s_POST, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_4H_fixed, ARM64_INS_LD3,
+ AArch64_LD3Rv4h, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_4H_register, ARM64_INS_LD3,
+ AArch64_LD3Rv4h_POST, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_4S_fixed, ARM64_INS_LD3,
+ AArch64_LD3Rv4s, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_4S_register, ARM64_INS_LD3,
+ AArch64_LD3Rv4s_POST, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_8B_fixed, ARM64_INS_LD3,
+ AArch64_LD3Rv8b, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_8B_register, ARM64_INS_LD3,
+ AArch64_LD3Rv8b_POST, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_8H_fixed, ARM64_INS_LD3,
+ AArch64_LD3Rv8h, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3WB_8H_register, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3_16B, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3_2D, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3_2S, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3_4H, ARM64_INS_LD3,
+ AArch64_LD3Rv8h_POST, ARM64_INS_LD3R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3_4S, ARM64_INS_LD3,
+ AArch64_LD3Threev16b, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3_8B, ARM64_INS_LD3,
+ AArch64_LD3Threev16b_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD3_8H, ARM64_INS_LD3,
+ AArch64_LD3Threev2d, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_B, ARM64_INS_LD4,
+ AArch64_LD3Threev2d_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_D, ARM64_INS_LD4,
+ AArch64_LD3Threev2s, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_H, ARM64_INS_LD4,
+ AArch64_LD3Threev2s_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_S, ARM64_INS_LD4,
+ AArch64_LD3Threev4h, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_WB_B_fixed, ARM64_INS_LD4,
+ AArch64_LD3Threev4h_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_WB_B_register, ARM64_INS_LD4,
+ AArch64_LD3Threev4s, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_WB_D_fixed, ARM64_INS_LD4,
+ AArch64_LD3Threev4s_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_WB_D_register, ARM64_INS_LD4,
+ AArch64_LD3Threev8b, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_WB_H_fixed, ARM64_INS_LD4,
+ AArch64_LD3Threev8b_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_WB_H_register, ARM64_INS_LD4,
+ AArch64_LD3Threev8h, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_WB_S_fixed, ARM64_INS_LD4,
+ AArch64_LD3Threev8h_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4LN_WB_S_register, ARM64_INS_LD4,
+ AArch64_LD3i16, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_16B, ARM64_INS_LD4R,
+ AArch64_LD3i16_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_1D, ARM64_INS_LD4R,
+ AArch64_LD3i32, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_2D, ARM64_INS_LD4R,
+ AArch64_LD3i32_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_2S, ARM64_INS_LD4R,
+ AArch64_LD3i64, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_4H, ARM64_INS_LD4R,
+ AArch64_LD3i64_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_4S, ARM64_INS_LD4R,
+ AArch64_LD3i8, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_8B, ARM64_INS_LD4R,
+ AArch64_LD3i8_POST, ARM64_INS_LD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_8H, ARM64_INS_LD4R,
+ AArch64_LD4Fourv16b, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_16B_fixed, ARM64_INS_LD4R,
+ AArch64_LD4Fourv16b_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_16B_register, ARM64_INS_LD4R,
+ AArch64_LD4Fourv2d, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_1D_fixed, ARM64_INS_LD4R,
+ AArch64_LD4Fourv2d_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_1D_register, ARM64_INS_LD4R,
+ AArch64_LD4Fourv2s, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_2D_fixed, ARM64_INS_LD4R,
+ AArch64_LD4Fourv2s_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_2D_register, ARM64_INS_LD4R,
+ AArch64_LD4Fourv4h, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_2S_fixed, ARM64_INS_LD4R,
+ AArch64_LD4Fourv4h_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_2S_register, ARM64_INS_LD4R,
+ AArch64_LD4Fourv4s, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_4H_fixed, ARM64_INS_LD4R,
+ AArch64_LD4Fourv4s_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_4H_register, ARM64_INS_LD4R,
+ AArch64_LD4Fourv8b, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_4S_fixed, ARM64_INS_LD4R,
+ AArch64_LD4Fourv8b_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_4S_register, ARM64_INS_LD4R,
+ AArch64_LD4Fourv8h, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_8B_fixed, ARM64_INS_LD4R,
+ AArch64_LD4Fourv8h_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_8B_register, ARM64_INS_LD4R,
+ AArch64_LD4Rv16b, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_8H_fixed, ARM64_INS_LD4R,
+ AArch64_LD4Rv16b_POST, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4R_WB_8H_register, ARM64_INS_LD4R,
+ AArch64_LD4Rv1d, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_16B_fixed, ARM64_INS_LD4,
+ AArch64_LD4Rv1d_POST, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_16B_register, ARM64_INS_LD4,
+ AArch64_LD4Rv2d, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_2D_fixed, ARM64_INS_LD4,
+ AArch64_LD4Rv2d_POST, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_2D_register, ARM64_INS_LD4,
+ AArch64_LD4Rv2s, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_2S_fixed, ARM64_INS_LD4,
+ AArch64_LD4Rv2s_POST, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_2S_register, ARM64_INS_LD4,
+ AArch64_LD4Rv4h, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_4H_fixed, ARM64_INS_LD4,
+ AArch64_LD4Rv4h_POST, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_4H_register, ARM64_INS_LD4,
+ AArch64_LD4Rv4s, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_4S_fixed, ARM64_INS_LD4,
+ AArch64_LD4Rv4s_POST, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_4S_register, ARM64_INS_LD4,
+ AArch64_LD4Rv8b, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_8B_fixed, ARM64_INS_LD4,
+ AArch64_LD4Rv8b_POST, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_8B_register, ARM64_INS_LD4,
+ AArch64_LD4Rv8h, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_8H_fixed, ARM64_INS_LD4,
+ AArch64_LD4Rv8h_POST, ARM64_INS_LD4R,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4WB_8H_register, ARM64_INS_LD4,
+ AArch64_LD4i16, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4_16B, ARM64_INS_LD4,
+ AArch64_LD4i16_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4_2D, ARM64_INS_LD4,
+ AArch64_LD4i32, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4_2S, ARM64_INS_LD4,
+ AArch64_LD4i32_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4_4H, ARM64_INS_LD4,
+ AArch64_LD4i64, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4_4S, ARM64_INS_LD4,
+ AArch64_LD4i64_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4_8B, ARM64_INS_LD4,
+ AArch64_LD4i8, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LD4_8H, ARM64_INS_LD4,
+ AArch64_LD4i8_POST, ARM64_INS_LD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_LDAR_byte, ARM64_INS_LDARB,
+ AArch64_LDARB, ARM64_INS_LDARB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDAR_dword, ARM64_INS_LDAR,
+ AArch64_LDARH, ARM64_INS_LDARH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDAR_hword, ARM64_INS_LDARH,
+ AArch64_LDARW, ARM64_INS_LDAR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDAR_word, ARM64_INS_LDAR,
+ AArch64_LDARX, ARM64_INS_LDAR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDAXP_dword, ARM64_INS_LDAXP,
+ AArch64_LDAXPW, ARM64_INS_LDAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDAXP_word, ARM64_INS_LDAXP,
+ AArch64_LDAXPX, ARM64_INS_LDAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDAXR_byte, ARM64_INS_LDAXRB,
+ AArch64_LDAXRB, ARM64_INS_LDAXRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDAXR_dword, ARM64_INS_LDAXR,
+ AArch64_LDAXRH, ARM64_INS_LDAXRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDAXR_hword, ARM64_INS_LDAXRH,
+ AArch64_LDAXRW, ARM64_INS_LDAXR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDAXR_word, ARM64_INS_LDAXR,
+ AArch64_LDAXRX, ARM64_INS_LDAXR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDPSWx, ARM64_INS_LDPSW,
+ AArch64_LDNPDi, ARM64_INS_LDNP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDPSWx_PostInd, ARM64_INS_LDPSW,
+ AArch64_LDNPQi, ARM64_INS_LDNP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDPSWx_PreInd, ARM64_INS_LDPSW,
+ AArch64_LDNPSi, ARM64_INS_LDNP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBw, ARM64_INS_LDRSB,
+ AArch64_LDNPWi, ARM64_INS_LDNP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBw_PostInd, ARM64_INS_LDRSB,
+ AArch64_LDNPXi, ARM64_INS_LDNP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBw_PreInd, ARM64_INS_LDRSB,
+ AArch64_LDPDi, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBw_U, ARM64_INS_LDURSB,
+ AArch64_LDPDpost, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBw_Wm_RegOffset, ARM64_INS_LDRSB,
+ AArch64_LDPDpre, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBw_Xm_RegOffset, ARM64_INS_LDRSB,
+ AArch64_LDPQi, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBx, ARM64_INS_LDRSB,
+ AArch64_LDPQpost, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBx_PostInd, ARM64_INS_LDRSB,
+ AArch64_LDPQpre, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBx_PreInd, ARM64_INS_LDRSB,
+ AArch64_LDPSWi, ARM64_INS_LDPSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBx_U, ARM64_INS_LDURSB,
+ AArch64_LDPSWpost, ARM64_INS_LDPSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBx_Wm_RegOffset, ARM64_INS_LDRSB,
+ AArch64_LDPSWpre, ARM64_INS_LDPSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSBx_Xm_RegOffset, ARM64_INS_LDRSB,
+ AArch64_LDPSi, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHw, ARM64_INS_LDRSH,
+ AArch64_LDPSpost, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHw_PostInd, ARM64_INS_LDRSH,
+ AArch64_LDPSpre, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHw_PreInd, ARM64_INS_LDRSH,
+ AArch64_LDPWi, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHw_U, ARM64_INS_LDURSH,
+ AArch64_LDPWpost, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHw_Wm_RegOffset, ARM64_INS_LDRSH,
+ AArch64_LDPWpre, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHw_Xm_RegOffset, ARM64_INS_LDRSH,
+ AArch64_LDPXi, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHx, ARM64_INS_LDRSH,
+ AArch64_LDPXpost, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHx_PostInd, ARM64_INS_LDRSH,
+ AArch64_LDPXpre, ARM64_INS_LDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHx_PreInd, ARM64_INS_LDRSH,
+ AArch64_LDRBBpost, ARM64_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHx_U, ARM64_INS_LDURSH,
+ AArch64_LDRBBpre, ARM64_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHx_Wm_RegOffset, ARM64_INS_LDRSH,
+ AArch64_LDRBBroW, ARM64_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSHx_Xm_RegOffset, ARM64_INS_LDRSH,
+ AArch64_LDRBBroX, ARM64_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSWx, ARM64_INS_LDRSW,
+ AArch64_LDRBBui, ARM64_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSWx_PostInd, ARM64_INS_LDRSW,
+ AArch64_LDRBpost, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSWx_PreInd, ARM64_INS_LDRSW,
+ AArch64_LDRBpre, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSWx_Wm_RegOffset, ARM64_INS_LDRSW,
+ AArch64_LDRBroW, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSWx_Xm_RegOffset, ARM64_INS_LDRSW,
+ AArch64_LDRBroX, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRSWx_lit, ARM64_INS_LDRSW,
+ AArch64_LDRBui, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRd_lit, ARM64_INS_LDR,
+ AArch64_LDRDl, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRq_lit, ARM64_INS_LDR,
+ AArch64_LDRDpost, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRs_lit, ARM64_INS_LDR,
+ AArch64_LDRDpre, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRw_lit, ARM64_INS_LDR,
+ AArch64_LDRDroW, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDRx_lit, ARM64_INS_LDR,
+ AArch64_LDRDroX, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDTRSBw, ARM64_INS_LDTRSB,
+ AArch64_LDRDui, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDTRSBx, ARM64_INS_LDTRSB,
+ AArch64_LDRHHpost, ARM64_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDTRSHw, ARM64_INS_LDTRSH,
+ AArch64_LDRHHpre, ARM64_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDTRSHx, ARM64_INS_LDTRSH,
+ AArch64_LDRHHroW, ARM64_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDTRSWx, ARM64_INS_LDTRSW,
+ AArch64_LDRHHroX, ARM64_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDURSWx, ARM64_INS_LDURSW,
+ AArch64_LDRHHui, ARM64_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDXP_dword, ARM64_INS_LDXP,
+ AArch64_LDRHpost, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDXP_word, ARM64_INS_LDXP,
+ AArch64_LDRHpre, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDXR_byte, ARM64_INS_LDXRB,
+ AArch64_LDRHroW, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDXR_dword, ARM64_INS_LDXR,
+ AArch64_LDRHroX, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDXR_hword, ARM64_INS_LDXRH,
+ AArch64_LDRHui, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LDXR_word, ARM64_INS_LDXR,
+ AArch64_LDRQl, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_LDR, ARM64_INS_LDRH,
+ AArch64_LDRQpost, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_LDUR, ARM64_INS_LDURH,
+ AArch64_LDRQpre, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_PostInd_LDR, ARM64_INS_LDRH,
+ AArch64_LDRQroW, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_PostInd_STR, ARM64_INS_STRH,
+ AArch64_LDRQroX, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_PreInd_LDR, ARM64_INS_LDRH,
+ AArch64_LDRQui, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_PreInd_STR, ARM64_INS_STRH,
+ AArch64_LDRSBWpost, ARM64_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_STR, ARM64_INS_STRH,
+ AArch64_LDRSBWpre, ARM64_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_STUR, ARM64_INS_STURH,
+ AArch64_LDRSBWroW, ARM64_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_UnPriv_LDR, ARM64_INS_LDTRH,
+ AArch64_LDRSBWroX, ARM64_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_UnPriv_STR, ARM64_INS_STTRH,
+ AArch64_LDRSBWui, ARM64_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_Wm_RegOffset_LDR, ARM64_INS_LDRH,
+ AArch64_LDRSBXpost, ARM64_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_Wm_RegOffset_STR, ARM64_INS_STRH,
+ AArch64_LDRSBXpre, ARM64_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_Xm_RegOffset_LDR, ARM64_INS_LDRH,
+ AArch64_LDRSBXroW, ARM64_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS16_Xm_RegOffset_STR, ARM64_INS_STRH,
+ AArch64_LDRSBXroX, ARM64_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_LDR, ARM64_INS_LDR,
+ AArch64_LDRSBXui, ARM64_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_LDUR, ARM64_INS_LDUR,
+ AArch64_LDRSHWpost, ARM64_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_PostInd_LDR, ARM64_INS_LDR,
+ AArch64_LDRSHWpre, ARM64_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_PostInd_STR, ARM64_INS_STR,
+ AArch64_LDRSHWroW, ARM64_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_PreInd_LDR, ARM64_INS_LDR,
+ AArch64_LDRSHWroX, ARM64_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_PreInd_STR, ARM64_INS_STR,
+ AArch64_LDRSHWui, ARM64_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_STR, ARM64_INS_STR,
+ AArch64_LDRSHXpost, ARM64_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_STUR, ARM64_INS_STUR,
+ AArch64_LDRSHXpre, ARM64_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_UnPriv_LDR, ARM64_INS_LDTR,
+ AArch64_LDRSHXroW, ARM64_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_UnPriv_STR, ARM64_INS_STTR,
+ AArch64_LDRSHXroX, ARM64_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_Wm_RegOffset_LDR, ARM64_INS_LDR,
+ AArch64_LDRSHXui, ARM64_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_Wm_RegOffset_STR, ARM64_INS_STR,
+ AArch64_LDRSWl, ARM64_INS_LDRSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_Xm_RegOffset_LDR, ARM64_INS_LDR,
+ AArch64_LDRSWpost, ARM64_INS_LDRSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS32_Xm_RegOffset_STR, ARM64_INS_STR,
+ AArch64_LDRSWpre, ARM64_INS_LDRSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_LDR, ARM64_INS_LDR,
+ AArch64_LDRSWroW, ARM64_INS_LDRSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_LDUR, ARM64_INS_LDUR,
+ AArch64_LDRSWroX, ARM64_INS_LDRSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_PostInd_LDR, ARM64_INS_LDR,
+ AArch64_LDRSWui, ARM64_INS_LDRSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_PostInd_STR, ARM64_INS_STR,
+ AArch64_LDRSl, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_PreInd_LDR, ARM64_INS_LDR,
+ AArch64_LDRSpost, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_PreInd_STR, ARM64_INS_STR,
+ AArch64_LDRSpre, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_STR, ARM64_INS_STR,
+ AArch64_LDRSroW, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_STUR, ARM64_INS_STUR,
+ AArch64_LDRSroX, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_UnPriv_LDR, ARM64_INS_LDTR,
+ AArch64_LDRSui, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_UnPriv_STR, ARM64_INS_STTR,
+ AArch64_LDRWl, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_Wm_RegOffset_LDR, ARM64_INS_LDR,
+ AArch64_LDRWpost, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_Wm_RegOffset_STR, ARM64_INS_STR,
+ AArch64_LDRWpre, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_Xm_RegOffset_LDR, ARM64_INS_LDR,
+ AArch64_LDRWroW, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS64_Xm_RegOffset_STR, ARM64_INS_STR,
+ AArch64_LDRWroX, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_LDR, ARM64_INS_LDRB,
+ AArch64_LDRWui, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_LDUR, ARM64_INS_LDURB,
+ AArch64_LDRXl, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_PostInd_LDR, ARM64_INS_LDRB,
+ AArch64_LDRXpost, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_PostInd_STR, ARM64_INS_STRB,
+ AArch64_LDRXpre, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_PreInd_LDR, ARM64_INS_LDRB,
+ AArch64_LDRXroW, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_PreInd_STR, ARM64_INS_STRB,
+ AArch64_LDRXroX, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_STR, ARM64_INS_STRB,
+ AArch64_LDRXui, ARM64_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_STUR, ARM64_INS_STURB,
+ AArch64_LDTRBi, ARM64_INS_LDTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_UnPriv_LDR, ARM64_INS_LDTRB,
+ AArch64_LDTRHi, ARM64_INS_LDTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_UnPriv_STR, ARM64_INS_STTRB,
+ AArch64_LDTRSBWi, ARM64_INS_LDTRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_Wm_RegOffset_LDR, ARM64_INS_LDRB,
+ AArch64_LDTRSBXi, ARM64_INS_LDTRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_Wm_RegOffset_STR, ARM64_INS_STRB,
+ AArch64_LDTRSHWi, ARM64_INS_LDTRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_Xm_RegOffset_LDR, ARM64_INS_LDRB,
+ AArch64_LDTRSHXi, ARM64_INS_LDTRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LS8_Xm_RegOffset_STR, ARM64_INS_STRB,
+ AArch64_LDTRSWi, ARM64_INS_LDTRSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSFP128_LDR, ARM64_INS_LDR,
+ AArch64_LDTRWi, ARM64_INS_LDTR,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSFP128_LDUR, ARM64_INS_LDUR,
+ AArch64_LDTRXi, ARM64_INS_LDTR,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSFP128_PostInd_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP128_PostInd_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP128_PreInd_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP128_PreInd_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP128_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP128_STUR, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP128_Wm_RegOffset_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP128_Wm_RegOffset_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP128_Xm_RegOffset_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP128_Xm_RegOffset_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_LDUR, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_PostInd_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_PostInd_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_PreInd_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_PreInd_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_STUR, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_Wm_RegOffset_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_Wm_RegOffset_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_Xm_RegOffset_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP16_Xm_RegOffset_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_LDUR, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_PostInd_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_PostInd_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_PreInd_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_PreInd_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_STUR, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_Wm_RegOffset_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_Wm_RegOffset_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_Xm_RegOffset_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP32_Xm_RegOffset_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_LDUR, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_PostInd_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_PostInd_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_PreInd_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_PreInd_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_STUR, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_Wm_RegOffset_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_Wm_RegOffset_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_Xm_RegOffset_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP64_Xm_RegOffset_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_LDUR, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_PostInd_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_PostInd_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_PreInd_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_PreInd_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_STUR, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_Wm_RegOffset_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_Wm_RegOffset_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_Xm_RegOffset_LDR, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFP8_Xm_RegOffset_STR, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair128_LDR, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair128_NonTemp_LDR, ARM64_INS_LDNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair128_NonTemp_STR, ARM64_INS_STNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair128_PostInd_LDR, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair128_PostInd_STR, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair128_PreInd_LDR, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair128_PreInd_STR, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair128_STR, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair32_LDR, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair32_NonTemp_LDR, ARM64_INS_LDNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair32_NonTemp_STR, ARM64_INS_STNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair32_PostInd_LDR, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair32_PostInd_STR, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair32_PreInd_LDR, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair32_PreInd_STR, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair32_STR, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair64_LDR, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair64_NonTemp_LDR, ARM64_INS_LDNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair64_NonTemp_STR, ARM64_INS_STNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair64_PostInd_LDR, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair64_PostInd_STR, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair64_PreInd_LDR, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair64_PreInd_STR, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSFPPair64_STR, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSLVwww, ARM64_INS_LSL,
+ AArch64_LDURBBi, ARM64_INS_LDURB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSLVxxx, ARM64_INS_LSL,
+ AArch64_LDURBi, ARM64_INS_LDUR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSLwwi, ARM64_INS_LSL,
+ AArch64_LDURDi, ARM64_INS_LDUR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSLxxi, ARM64_INS_LSL,
+ AArch64_LDURHHi, ARM64_INS_LDURH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair32_LDR, ARM64_INS_LDP,
+ AArch64_LDURHi, ARM64_INS_LDUR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair32_NonTemp_LDR, ARM64_INS_LDNP,
+ AArch64_LDURQi, ARM64_INS_LDUR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair32_NonTemp_STR, ARM64_INS_STNP,
+ AArch64_LDURSBWi, ARM64_INS_LDURSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair32_PostInd_LDR, ARM64_INS_LDP,
+ AArch64_LDURSBXi, ARM64_INS_LDURSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair32_PostInd_STR, ARM64_INS_STP,
+ AArch64_LDURSHWi, ARM64_INS_LDURSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair32_PreInd_LDR, ARM64_INS_LDP,
+ AArch64_LDURSHXi, ARM64_INS_LDURSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair32_PreInd_STR, ARM64_INS_STP,
+ AArch64_LDURSWi, ARM64_INS_LDURSW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair32_STR, ARM64_INS_STP,
+ AArch64_LDURSi, ARM64_INS_LDUR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair64_LDR, ARM64_INS_LDP,
+ AArch64_LDURWi, ARM64_INS_LDUR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair64_NonTemp_LDR, ARM64_INS_LDNP,
+ AArch64_LDURXi, ARM64_INS_LDUR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair64_NonTemp_STR, ARM64_INS_STNP,
+ AArch64_LDXPW, ARM64_INS_LDXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair64_PostInd_LDR, ARM64_INS_LDP,
+ AArch64_LDXPX, ARM64_INS_LDXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair64_PostInd_STR, ARM64_INS_STP,
+ AArch64_LDXRB, ARM64_INS_LDXRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair64_PreInd_LDR, ARM64_INS_LDP,
+ AArch64_LDXRH, ARM64_INS_LDXRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair64_PreInd_STR, ARM64_INS_STP,
+ AArch64_LDXRW, ARM64_INS_LDXR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSPair64_STR, ARM64_INS_STP,
+ AArch64_LDXRX, ARM64_INS_LDXR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSRVwww, ARM64_INS_LSR,
+ AArch64_LSLVWr, ARM64_INS_LSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSRVxxx, ARM64_INS_LSR,
+ AArch64_LSLVXr, ARM64_INS_LSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSRwwi, ARM64_INS_LSR,
+ AArch64_LSRVWr, ARM64_INS_LSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_LSRxxi, ARM64_INS_LSR,
+ AArch64_LSRVXr, ARM64_INS_LSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MADDwwww, ARM64_INS_MADD,
+ AArch64_MADDWrrr, ARM64_INS_MADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MADDxxxx, ARM64_INS_MADD,
+ AArch64_MADDXrrr, ARM64_INS_MADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MLAvve_2s4s, ARM64_INS_MLA,
+ AArch64_MLAv16i8, ARM64_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLAvve_4h8h, ARM64_INS_MLA,
+ AArch64_MLAv2i32, ARM64_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLAvve_4s4s, ARM64_INS_MLA,
+ AArch64_MLAv2i32_indexed, ARM64_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLAvve_8h8h, ARM64_INS_MLA,
+ AArch64_MLAv4i16, ARM64_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLAvvv_16B, ARM64_INS_MLA,
+ AArch64_MLAv4i16_indexed, ARM64_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLAvvv_2S, ARM64_INS_MLA,
+ AArch64_MLAv4i32, ARM64_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLAvvv_4H, ARM64_INS_MLA,
+ AArch64_MLAv4i32_indexed, ARM64_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLAvvv_4S, ARM64_INS_MLA,
+ AArch64_MLAv8i16, ARM64_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLAvvv_8B, ARM64_INS_MLA,
+ AArch64_MLAv8i16_indexed, ARM64_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLAvvv_8H, ARM64_INS_MLA,
+ AArch64_MLAv8i8, ARM64_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLSvve_2s4s, ARM64_INS_MLS,
+ AArch64_MLSv16i8, ARM64_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLSvve_4h8h, ARM64_INS_MLS,
+ AArch64_MLSv2i32, ARM64_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLSvve_4s4s, ARM64_INS_MLS,
+ AArch64_MLSv2i32_indexed, ARM64_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLSvve_8h8h, ARM64_INS_MLS,
+ AArch64_MLSv4i16, ARM64_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLSvvv_16B, ARM64_INS_MLS,
+ AArch64_MLSv4i16_indexed, ARM64_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLSvvv_2S, ARM64_INS_MLS,
+ AArch64_MLSv4i32, ARM64_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLSvvv_4H, ARM64_INS_MLS,
+ AArch64_MLSv4i32_indexed, ARM64_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLSvvv_4S, ARM64_INS_MLS,
+ AArch64_MLSv8i16, ARM64_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLSvvv_8B, ARM64_INS_MLS,
+ AArch64_MLSv8i16_indexed, ARM64_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MLSvvv_8H, ARM64_INS_MLS,
+ AArch64_MLSv8i8, ARM64_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVIdi, ARM64_INS_MOVI,
+ AArch64_MOVID, ARM64_INS_MOVI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVIvi_16B, ARM64_INS_MOVI,
+ AArch64_MOVIv16b_ns, ARM64_INS_MOVI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVIvi_2D, ARM64_INS_MOVI,
+ AArch64_MOVIv2d_ns, ARM64_INS_MOVI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVIvi_8B, ARM64_INS_MOVI,
+ AArch64_MOVIv2i32, ARM64_INS_MOVI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVIvi_lsl_2S, ARM64_INS_MOVI,
+ AArch64_MOVIv2s_msl, ARM64_INS_MOVI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVIvi_lsl_4H, ARM64_INS_MOVI,
+ AArch64_MOVIv4i16, ARM64_INS_MOVI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVIvi_lsl_4S, ARM64_INS_MOVI,
+ AArch64_MOVIv4i32, ARM64_INS_MOVI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVIvi_lsl_8H, ARM64_INS_MOVI,
+ AArch64_MOVIv4s_msl, ARM64_INS_MOVI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVIvi_msl_2S, ARM64_INS_MOVI,
+ AArch64_MOVIv8b_ns, ARM64_INS_MOVI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVIvi_msl_4S, ARM64_INS_MOVI,
+ AArch64_MOVIv8i16, ARM64_INS_MOVI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MOVKwii, ARM64_INS_MOVK,
+ AArch64_MOVKWi, ARM64_INS_MOVK,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MOVKxii, ARM64_INS_MOVK,
+ AArch64_MOVKXi, ARM64_INS_MOVK,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MOVNwii, ARM64_INS_MOVN,
+ AArch64_MOVNWi, ARM64_INS_MOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MOVNxii, ARM64_INS_MOVN,
+ AArch64_MOVNXi, ARM64_INS_MOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MOVZwii, ARM64_INS_MOVZ,
+ AArch64_MOVZWi, ARM64_INS_MOVZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MOVZxii, ARM64_INS_MOVZ,
+ AArch64_MOVZXi, ARM64_INS_MOVZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MRSxi, ARM64_INS_MRS,
+ AArch64_MRS, ARM64_INS_MRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MSRii, ARM64_INS_MSR,
+ AArch64_MSR, ARM64_INS_MSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MSRix, ARM64_INS_MSR,
+ AArch64_MSRpstate, ARM64_INS_MSR,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MSUBwwww, ARM64_INS_MSUB,
+ AArch64_MSUBWrrr, ARM64_INS_MSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MSUBxxxx, ARM64_INS_MSUB,
+ AArch64_MSUBXrrr, ARM64_INS_MSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_MULve_2s4s, ARM64_INS_MUL,
+ AArch64_MULv16i8, ARM64_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MULve_4h8h, ARM64_INS_MUL,
+ AArch64_MULv2i32, ARM64_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MULve_4s4s, ARM64_INS_MUL,
+ AArch64_MULv2i32_indexed, ARM64_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MULve_8h8h, ARM64_INS_MUL,
+ AArch64_MULv4i16, ARM64_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MULvvv_16B, ARM64_INS_MUL,
+ AArch64_MULv4i16_indexed, ARM64_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MULvvv_2S, ARM64_INS_MUL,
+ AArch64_MULv4i32, ARM64_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MULvvv_4H, ARM64_INS_MUL,
+ AArch64_MULv4i32_indexed, ARM64_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MULvvv_4S, ARM64_INS_MUL,
+ AArch64_MULv8i16, ARM64_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MULvvv_8B, ARM64_INS_MUL,
+ AArch64_MULv8i16_indexed, ARM64_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MULvvv_8H, ARM64_INS_MUL,
+ AArch64_MULv8i8, ARM64_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MVNIvi_lsl_2S, ARM64_INS_MVNI,
+ AArch64_MVNIv2i32, ARM64_INS_MVNI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MVNIvi_lsl_4H, ARM64_INS_MVNI,
+ AArch64_MVNIv2s_msl, ARM64_INS_MVNI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MVNIvi_lsl_4S, ARM64_INS_MVNI,
+ AArch64_MVNIv4i16, ARM64_INS_MVNI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MVNIvi_lsl_8H, ARM64_INS_MVNI,
+ AArch64_MVNIv4i32, ARM64_INS_MVNI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MVNIvi_msl_2S, ARM64_INS_MVNI,
+ AArch64_MVNIv4s_msl, ARM64_INS_MVNI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MVNIvi_msl_4S, ARM64_INS_MVNI,
+ AArch64_MVNIv8i16, ARM64_INS_MVNI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_MVNww_asr, ARM64_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNww_lsl, ARM64_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNww_lsr, ARM64_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNww_ror, ARM64_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNxx_asr, ARM64_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNxx_lsl, ARM64_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNxx_lsr, ARM64_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNxx_ror, ARM64_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEG16b, ARM64_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEG2d, ARM64_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEG2s, ARM64_INS_NEG,
+ AArch64_NEGv16i8, ARM64_INS_NEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_NEG4h, ARM64_INS_NEG,
+ AArch64_NEGv1i64, ARM64_INS_NEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_NEG4s, ARM64_INS_NEG,
+ AArch64_NEGv2i32, ARM64_INS_NEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_NEG8b, ARM64_INS_NEG,
+ AArch64_NEGv2i64, ARM64_INS_NEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_NEG8h, ARM64_INS_NEG,
+ AArch64_NEGv4i16, ARM64_INS_NEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_NEGdd, ARM64_INS_NEG,
+ AArch64_NEGv4i32, ARM64_INS_NEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_NOT16b, ARM64_INS_NOT,
+ AArch64_NEGv8i16, ARM64_INS_NEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_NOT8b, ARM64_INS_NOT,
+ AArch64_NEGv8i8, ARM64_INS_NEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORNvvv_16B, ARM64_INS_ORN,
+ AArch64_NOTv16i8, ARM64_INS_NOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORNvvv_8B, ARM64_INS_ORN,
+ AArch64_NOTv8i8, ARM64_INS_NOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORNwww_asr, ARM64_INS_ORN,
+ AArch64_ORNWrs, ARM64_INS_ORN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ORNwww_lsl, ARM64_INS_ORN,
+ AArch64_ORNXrs, ARM64_INS_ORN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ORNwww_lsr, ARM64_INS_ORN,
+ AArch64_ORNv16i8, ARM64_INS_ORN,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORNwww_ror, ARM64_INS_ORN,
+ AArch64_ORNv8i8, ARM64_INS_ORN,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORNxxx_asr, ARM64_INS_ORN,
+ AArch64_ORRWri, ARM64_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ORNxxx_lsl, ARM64_INS_ORN,
+ AArch64_ORRWrs, ARM64_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ORNxxx_lsr, ARM64_INS_ORN,
+ AArch64_ORRXri, ARM64_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ORNxxx_ror, ARM64_INS_ORN,
+ AArch64_ORRXrs, ARM64_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_ORRvi_lsl_2S, ARM64_INS_ORR,
+ AArch64_ORRv16i8, ARM64_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORRvi_lsl_4H, ARM64_INS_ORR,
+ AArch64_ORRv2i32, ARM64_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORRvi_lsl_4S, ARM64_INS_ORR,
+ AArch64_ORRv4i16, ARM64_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORRvi_lsl_8H, ARM64_INS_ORR,
+ AArch64_ORRv4i32, ARM64_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORRvvv_16B, ARM64_INS_ORR,
+ AArch64_ORRv8i16, ARM64_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORRvvv_8B, ARM64_INS_ORR,
+ AArch64_ORRv8i8, ARM64_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ORRwwi, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRwww_asr, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRwww_lsl, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRwww_lsr, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRwww_ror, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRxxi, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRxxx_asr, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRxxx_lsl, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRxxx_lsr, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRxxx_ror, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_PMULL2vvv_1q2d, ARM64_INS_PMULL2,
+ AArch64_PMULLv16i8, ARM64_INS_PMULL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_PMULL2vvv_8h16b, ARM64_INS_PMULL2,
+ AArch64_PMULLv1i64, ARM64_INS_PMULL,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
#endif
},
{
- AArch64_PMULLvvv_1q1d, ARM64_INS_PMULL,
+ AArch64_PMULLv2i64, ARM64_INS_PMULL2,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
#endif
},
{
- AArch64_PMULLvvv_8h8b, ARM64_INS_PMULL,
+ AArch64_PMULLv8i8, ARM64_INS_PMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_PMULvvv_16B, ARM64_INS_PMUL,
+ AArch64_PMULv16i8, ARM64_INS_PMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_PMULvvv_8B, ARM64_INS_PMUL,
+ AArch64_PMULv8i8, ARM64_INS_PMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_PRFM, ARM64_INS_PRFM,
+ AArch64_PRFMl, ARM64_INS_PRFM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_PRFM_Wm_RegOffset, ARM64_INS_PRFM,
+ AArch64_PRFMroW, ARM64_INS_PRFM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_PRFM_Xm_RegOffset, ARM64_INS_PRFM,
+ AArch64_PRFMroX, ARM64_INS_PRFM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_PRFM_lit, ARM64_INS_PRFM,
+ AArch64_PRFMui, ARM64_INS_PRFM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_PRFUM, ARM64_INS_PRFUM,
+ AArch64_PRFUMi, ARM64_INS_PRFUM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_QRSHRUNvvi_16B, ARM64_INS_SQRSHRUN2,
+ AArch64_RADDHNv2i64_v2i32, ARM64_INS_RADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_QRSHRUNvvi_2S, ARM64_INS_SQRSHRUN,
+ AArch64_RADDHNv2i64_v4i32, ARM64_INS_RADDHN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_QRSHRUNvvi_4H, ARM64_INS_SQRSHRUN,
+ AArch64_RADDHNv4i32_v4i16, ARM64_INS_RADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_QRSHRUNvvi_4S, ARM64_INS_SQRSHRUN2,
+ AArch64_RADDHNv4i32_v8i16, ARM64_INS_RADDHN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_QRSHRUNvvi_8B, ARM64_INS_SQRSHRUN,
+ AArch64_RADDHNv8i16_v16i8, ARM64_INS_RADDHN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_QRSHRUNvvi_8H, ARM64_INS_SQRSHRUN2,
+ AArch64_RADDHNv8i16_v8i8, ARM64_INS_RADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_QSHRUNvvi_16B, ARM64_INS_SQSHRUN2,
+ AArch64_RBITWr, ARM64_INS_RBIT,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_QSHRUNvvi_2S, ARM64_INS_SQSHRUN,
+ AArch64_RBITXr, ARM64_INS_RBIT,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_QSHRUNvvi_4H, ARM64_INS_SQSHRUN,
+ AArch64_RBITv16i8, ARM64_INS_RBIT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_QSHRUNvvi_4S, ARM64_INS_SQSHRUN2,
+ AArch64_RBITv8i8, ARM64_INS_RBIT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_QSHRUNvvi_8B, ARM64_INS_SQSHRUN,
+ AArch64_RET, ARM64_INS_RET,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+ { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_QSHRUNvvi_8H, ARM64_INS_SQSHRUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHN2vvv_16b8h, ARM64_INS_RADDHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHN2vvv_4s2d, ARM64_INS_RADDHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHN2vvv_8h4s, ARM64_INS_RADDHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHNvvv_2s2d, ARM64_INS_RADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHNvvv_4h4s, ARM64_INS_RADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHNvvv_8b8h, ARM64_INS_RADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RBIT16b, ARM64_INS_RBIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RBIT8b, ARM64_INS_RBIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RBITww, ARM64_INS_RBIT,
+ AArch64_REV16Wr, ARM64_INS_REV16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_RBITxx, ARM64_INS_RBIT,
+ AArch64_REV16Xr, ARM64_INS_REV16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_RETx, ARM64_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- AArch64_REV16_16b, ARM64_INS_REV16,
+ AArch64_REV16v16i8, ARM64_INS_REV16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV16_8b, ARM64_INS_REV16,
+ AArch64_REV16v8i8, ARM64_INS_REV16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV16ww, ARM64_INS_REV16,
+ AArch64_REV32Xr, ARM64_INS_REV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_REV16xx, ARM64_INS_REV16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV32_16b, ARM64_INS_REV32,
+ AArch64_REV32v16i8, ARM64_INS_REV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV32_4h, ARM64_INS_REV32,
+ AArch64_REV32v4i16, ARM64_INS_REV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV32_8b, ARM64_INS_REV32,
+ AArch64_REV32v8i16, ARM64_INS_REV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV32_8h, ARM64_INS_REV32,
+ AArch64_REV32v8i8, ARM64_INS_REV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV32xx, ARM64_INS_REV32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV64_16b, ARM64_INS_REV64,
+ AArch64_REV64v16i8, ARM64_INS_REV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV64_2s, ARM64_INS_REV64,
+ AArch64_REV64v2i32, ARM64_INS_REV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV64_4h, ARM64_INS_REV64,
+ AArch64_REV64v4i16, ARM64_INS_REV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV64_4s, ARM64_INS_REV64,
+ AArch64_REV64v4i32, ARM64_INS_REV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV64_8b, ARM64_INS_REV64,
+ AArch64_REV64v8i16, ARM64_INS_REV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REV64_8h, ARM64_INS_REV64,
+ AArch64_REV64v8i8, ARM64_INS_REV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_REVww, ARM64_INS_REV,
+ AArch64_REVWr, ARM64_INS_REV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_REVxx, ARM64_INS_REV,
+ AArch64_REVXr, ARM64_INS_REV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_RORVwww, ARM64_INS_ROR,
+ AArch64_RORVWr, ARM64_INS_ROR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_RORVxxx, ARM64_INS_ROR,
+ AArch64_RORVXr, ARM64_INS_ROR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_RSHRNvvi_16B, ARM64_INS_RSHRN2,
+ AArch64_RSHRNv16i8_shift, ARM64_INS_RSHRN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSHRNvvi_2S, ARM64_INS_RSHRN,
+ AArch64_RSHRNv2i32_shift, ARM64_INS_RSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSHRNvvi_4H, ARM64_INS_RSHRN,
+ AArch64_RSHRNv4i16_shift, ARM64_INS_RSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSHRNvvi_4S, ARM64_INS_RSHRN2,
+ AArch64_RSHRNv4i32_shift, ARM64_INS_RSHRN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSHRNvvi_8B, ARM64_INS_RSHRN,
+ AArch64_RSHRNv8i16_shift, ARM64_INS_RSHRN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSHRNvvi_8H, ARM64_INS_RSHRN2,
+ AArch64_RSHRNv8i8_shift, ARM64_INS_RSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSUBHN2vvv_16b8h, ARM64_INS_RSUBHN2,
+ AArch64_RSUBHNv2i64_v2i32, ARM64_INS_RSUBHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSUBHN2vvv_4s2d, ARM64_INS_RSUBHN2,
+ AArch64_RSUBHNv2i64_v4i32, ARM64_INS_RSUBHN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSUBHN2vvv_8h4s, ARM64_INS_RSUBHN2,
+ AArch64_RSUBHNv4i32_v4i16, ARM64_INS_RSUBHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSUBHNvvv_2s2d, ARM64_INS_RSUBHN,
+ AArch64_RSUBHNv4i32_v8i16, ARM64_INS_RSUBHN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSUBHNvvv_4h4s, ARM64_INS_RSUBHN,
+ AArch64_RSUBHNv8i16_v16i8, ARM64_INS_RSUBHN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_RSUBHNvvv_8b8h, ARM64_INS_RSUBHN,
+ AArch64_RSUBHNv8i16_v8i8, ARM64_INS_RSUBHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABAL2vvv_2d2s, ARM64_INS_SABAL2,
+ AArch64_SABALv16i8_v8i16, ARM64_INS_SABAL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABAL2vvv_4s4h, ARM64_INS_SABAL2,
+ AArch64_SABALv2i32_v2i64, ARM64_INS_SABAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABAL2vvv_8h8b, ARM64_INS_SABAL2,
+ AArch64_SABALv4i16_v4i32, ARM64_INS_SABAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABALvvv_2d2s, ARM64_INS_SABAL,
+ AArch64_SABALv4i32_v2i64, ARM64_INS_SABAL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABALvvv_4s4h, ARM64_INS_SABAL,
+ AArch64_SABALv8i16_v4i32, ARM64_INS_SABAL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABALvvv_8h8b, ARM64_INS_SABAL,
+ AArch64_SABALv8i8_v8i16, ARM64_INS_SABAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABAvvv_16B, ARM64_INS_SABA,
+ AArch64_SABAv16i8, ARM64_INS_SABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABAvvv_2S, ARM64_INS_SABA,
+ AArch64_SABAv2i32, ARM64_INS_SABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABAvvv_4H, ARM64_INS_SABA,
+ AArch64_SABAv4i16, ARM64_INS_SABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABAvvv_4S, ARM64_INS_SABA,
+ AArch64_SABAv4i32, ARM64_INS_SABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABAvvv_8B, ARM64_INS_SABA,
+ AArch64_SABAv8i16, ARM64_INS_SABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABAvvv_8H, ARM64_INS_SABA,
+ AArch64_SABAv8i8, ARM64_INS_SABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDL2vvv_2d2s, ARM64_INS_SABDL2,
+ AArch64_SABDLv16i8_v8i16, ARM64_INS_SABDL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDL2vvv_4s4h, ARM64_INS_SABDL2,
+ AArch64_SABDLv2i32_v2i64, ARM64_INS_SABDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDL2vvv_8h8b, ARM64_INS_SABDL2,
+ AArch64_SABDLv4i16_v4i32, ARM64_INS_SABDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDLvvv_2d2s, ARM64_INS_SABDL,
+ AArch64_SABDLv4i32_v2i64, ARM64_INS_SABDL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDLvvv_4s4h, ARM64_INS_SABDL,
+ AArch64_SABDLv8i16_v4i32, ARM64_INS_SABDL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDLvvv_8h8b, ARM64_INS_SABDL,
+ AArch64_SABDLv8i8_v8i16, ARM64_INS_SABDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDvvv_16B, ARM64_INS_SABD,
+ AArch64_SABDv16i8, ARM64_INS_SABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDvvv_2S, ARM64_INS_SABD,
+ AArch64_SABDv2i32, ARM64_INS_SABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDvvv_4H, ARM64_INS_SABD,
+ AArch64_SABDv4i16, ARM64_INS_SABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDvvv_4S, ARM64_INS_SABD,
+ AArch64_SABDv4i32, ARM64_INS_SABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDvvv_8B, ARM64_INS_SABD,
+ AArch64_SABDv8i16, ARM64_INS_SABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SABDvvv_8H, ARM64_INS_SABD,
+ AArch64_SABDv8i8, ARM64_INS_SABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADALP16b8h, ARM64_INS_SADALP,
+ AArch64_SADALPv16i8_v8i16, ARM64_INS_SADALP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADALP2s1d, ARM64_INS_SADALP,
+ AArch64_SADALPv2i32_v1i64, ARM64_INS_SADALP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADALP4h2s, ARM64_INS_SADALP,
+ AArch64_SADALPv4i16_v2i32, ARM64_INS_SADALP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADALP4s2d, ARM64_INS_SADALP,
+ AArch64_SADALPv4i32_v2i64, ARM64_INS_SADALP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADALP8b4h, ARM64_INS_SADALP,
+ AArch64_SADALPv8i16_v4i32, ARM64_INS_SADALP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADALP8h4s, ARM64_INS_SADALP,
+ AArch64_SADALPv8i8_v4i16, ARM64_INS_SADALP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDL2vvv_2d4s, ARM64_INS_SADDL2,
+ AArch64_SADDLPv16i8_v8i16, ARM64_INS_SADDLP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDL2vvv_4s8h, ARM64_INS_SADDL2,
+ AArch64_SADDLPv2i32_v1i64, ARM64_INS_SADDLP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDL2vvv_8h16b, ARM64_INS_SADDL2,
+ AArch64_SADDLPv4i16_v2i32, ARM64_INS_SADDLP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLP16b8h, ARM64_INS_SADDLP,
+ AArch64_SADDLPv4i32_v2i64, ARM64_INS_SADDLP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLP2s1d, ARM64_INS_SADDLP,
+ AArch64_SADDLPv8i16_v4i32, ARM64_INS_SADDLP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLP4h2s, ARM64_INS_SADDLP,
+ AArch64_SADDLPv8i8_v4i16, ARM64_INS_SADDLP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLP4s2d, ARM64_INS_SADDLP,
+ AArch64_SADDLVv16i8v, ARM64_INS_SADDLV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLP8b4h, ARM64_INS_SADDLP,
+ AArch64_SADDLVv4i16v, ARM64_INS_SADDLV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLP8h4s, ARM64_INS_SADDLP,
+ AArch64_SADDLVv4i32v, ARM64_INS_SADDLV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLV_1d4s, ARM64_INS_SADDLV,
+ AArch64_SADDLVv8i16v, ARM64_INS_SADDLV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLV_1h16b, ARM64_INS_SADDLV,
+ AArch64_SADDLVv8i8v, ARM64_INS_SADDLV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLV_1h8b, ARM64_INS_SADDLV,
+ AArch64_SADDLv16i8_v8i16, ARM64_INS_SADDL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLV_1s4h, ARM64_INS_SADDLV,
+ AArch64_SADDLv2i32_v2i64, ARM64_INS_SADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLV_1s8h, ARM64_INS_SADDLV,
+ AArch64_SADDLv4i16_v4i32, ARM64_INS_SADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLvvv_2d2s, ARM64_INS_SADDL,
+ AArch64_SADDLv4i32_v2i64, ARM64_INS_SADDL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLvvv_4s4h, ARM64_INS_SADDL,
+ AArch64_SADDLv8i16_v4i32, ARM64_INS_SADDL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDLvvv_8h8b, ARM64_INS_SADDL,
+ AArch64_SADDLv8i8_v8i16, ARM64_INS_SADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDW2vvv_2d4s, ARM64_INS_SADDW2,
+ AArch64_SADDWv16i8_v8i16, ARM64_INS_SADDW2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDW2vvv_4s8h, ARM64_INS_SADDW2,
+ AArch64_SADDWv2i32_v2i64, ARM64_INS_SADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDW2vvv_8h16b, ARM64_INS_SADDW2,
+ AArch64_SADDWv4i16_v4i32, ARM64_INS_SADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDWvvv_2d2s, ARM64_INS_SADDW,
+ AArch64_SADDWv4i32_v2i64, ARM64_INS_SADDW2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDWvvv_4s4h, ARM64_INS_SADDW,
+ AArch64_SADDWv8i16_v4i32, ARM64_INS_SADDW2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SADDWvvv_8h8b, ARM64_INS_SADDW,
+ AArch64_SADDWv8i8_v8i16, ARM64_INS_SADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SBCSwww, ARM64_INS_SBC,
+ AArch64_SBCSWr, ARM64_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_SBCSxxx, ARM64_INS_SBC,
+ AArch64_SBCSXr, ARM64_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_SBCwww, ARM64_INS_SBC,
+ AArch64_SBCWr, ARM64_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_SBCxxx, ARM64_INS_SBC,
+ AArch64_SBCXr, ARM64_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_SBFIZwwii, ARM64_INS_SBFIZ,
+ AArch64_SBFMWri, ARM64_INS_SBFM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_SBFIZxxii, ARM64_INS_SBFIZ,
+ AArch64_SBFMXri, ARM64_INS_SBFM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_SBFMwwii, ARM64_INS_SBFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SBFMxxii, ARM64_INS_SBFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SBFXwwii, ARM64_INS_SBFX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SBFXxxii, ARM64_INS_SBFX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTF_2d, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTF_2s, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTF_4s, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTF_Nddi, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTF_Nssi, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFdd, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFdw, ARM64_INS_SCVTF,
+ AArch64_SCVTFSWDri, ARM64_INS_SCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_SCVTFdwi, ARM64_INS_SCVTF,
+ AArch64_SCVTFSWSri, ARM64_INS_SCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_SCVTFdx, ARM64_INS_SCVTF,
+ AArch64_SCVTFSXDri, ARM64_INS_SCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_SCVTFdxi, ARM64_INS_SCVTF,
+ AArch64_SCVTFSXSri, ARM64_INS_SCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_SCVTFss, ARM64_INS_SCVTF,
+ AArch64_SCVTFUWDri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SCVTFUWSri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SCVTFUXDri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SCVTFUXSri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SCVTFd, ARM64_INS_SCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SCVTFsw, ARM64_INS_SCVTF,
+ AArch64_SCVTFs, ARM64_INS_SCVTF,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SCVTFswi, ARM64_INS_SCVTF,
+ AArch64_SCVTFv1i32, ARM64_INS_SCVTF,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SCVTFsx, ARM64_INS_SCVTF,
+ AArch64_SCVTFv1i64, ARM64_INS_SCVTF,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SCVTFsxi, ARM64_INS_SCVTF,
+ AArch64_SCVTFv2f32, ARM64_INS_SCVTF,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SDIVwww, ARM64_INS_SDIV,
+ AArch64_SCVTFv2f64, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SCVTFv2i32_shift, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SCVTFv2i64_shift, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SCVTFv4f32, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SCVTFv4i32_shift, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SDIVWr, ARM64_INS_SDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_SDIVxxx, ARM64_INS_SDIV,
+ AArch64_SDIVXr, ARM64_INS_SDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_SHA1C, ARM64_INS_SHA1C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1H, ARM64_INS_SHA1H,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1M, ARM64_INS_SHA1M,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1P, ARM64_INS_SHA1P,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1SU0, ARM64_INS_SHA1SU0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1SU1, ARM64_INS_SHA1SU1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA256H, ARM64_INS_SHA256H,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA256H2, ARM64_INS_SHA256H2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA256SU0, ARM64_INS_SHA256SU0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA256SU1, ARM64_INS_SHA256SU1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDvvv_16B, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDvvv_2S, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDvvv_4H, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDvvv_4S, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDvvv_8B, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDvvv_8H, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLL16b8h, ARM64_INS_SHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLL2s2d, ARM64_INS_SHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLL4h4s, ARM64_INS_SHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLL4s2d, ARM64_INS_SHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLL8b8h, ARM64_INS_SHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLL8h4s, ARM64_INS_SHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLddi, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLvvi_16B, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLvvi_2D, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLvvi_2S, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLvvi_4H, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLvvi_4S, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLvvi_8B, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLvvi_8H, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNvvi_16B, ARM64_INS_SHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNvvi_2S, ARM64_INS_SHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNvvi_4H, ARM64_INS_SHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNvvi_4S, ARM64_INS_SHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNvvi_8B, ARM64_INS_SHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNvvi_8H, ARM64_INS_SHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBvvv_16B, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBvvv_2S, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBvvv_4H, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBvvv_4S, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBvvv_8B, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBvvv_8H, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLI, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIvvi_16B, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIvvi_2D, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIvvi_2S, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIvvi_4H, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIvvi_4S, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIvvi_8B, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIvvi_8H, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMADDLxwwx, ARM64_INS_SMADDL,
+ AArch64_SDIV_IntWr, ARM64_INS_SDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_SMAXPvvv_16B, ARM64_INS_SMAXP,
+ AArch64_SDIV_IntXr, ARM64_INS_SDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHA1Crrr, ARM64_INS_SHA1C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHA1Hrr, ARM64_INS_SHA1H,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHA1Mrrr, ARM64_INS_SHA1M,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHA1Prrr, ARM64_INS_SHA1P,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHA1SU0rrr, ARM64_INS_SHA1SU0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHA1SU1rr, ARM64_INS_SHA1SU1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHA256H2rrr, ARM64_INS_SHA256H2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHA256Hrrr, ARM64_INS_SHA256H,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHA256SU0rr, ARM64_INS_SHA256SU0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHA256SU1rrr, ARM64_INS_SHA256SU1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHADDv16i8, ARM64_INS_SHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXPvvv_2S, ARM64_INS_SMAXP,
+ AArch64_SHADDv2i32, ARM64_INS_SHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXPvvv_4H, ARM64_INS_SMAXP,
+ AArch64_SHADDv4i16, ARM64_INS_SHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXPvvv_4S, ARM64_INS_SMAXP,
+ AArch64_SHADDv4i32, ARM64_INS_SHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXPvvv_8B, ARM64_INS_SMAXP,
+ AArch64_SHADDv8i16, ARM64_INS_SHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXPvvv_8H, ARM64_INS_SMAXP,
+ AArch64_SHADDv8i8, ARM64_INS_SHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXV_1b16b, ARM64_INS_SMAXV,
+ AArch64_SHLLv16i8, ARM64_INS_SHLL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXV_1b8b, ARM64_INS_SMAXV,
+ AArch64_SHLLv2i32, ARM64_INS_SHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXV_1h4h, ARM64_INS_SMAXV,
+ AArch64_SHLLv4i16, ARM64_INS_SHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXV_1h8h, ARM64_INS_SMAXV,
+ AArch64_SHLLv4i32, ARM64_INS_SHLL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXV_1s4s, ARM64_INS_SMAXV,
+ AArch64_SHLLv8i16, ARM64_INS_SHLL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXvvv_16B, ARM64_INS_SMAX,
+ AArch64_SHLLv8i8, ARM64_INS_SHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXvvv_2S, ARM64_INS_SMAX,
+ AArch64_SHLd, ARM64_INS_SHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXvvv_4H, ARM64_INS_SMAX,
+ AArch64_SHLv16i8_shift, ARM64_INS_SHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXvvv_4S, ARM64_INS_SMAX,
+ AArch64_SHLv2i32_shift, ARM64_INS_SHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXvvv_8B, ARM64_INS_SMAX,
+ AArch64_SHLv2i64_shift, ARM64_INS_SHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMAXvvv_8H, ARM64_INS_SMAX,
+ AArch64_SHLv4i16_shift, ARM64_INS_SHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_SMCi, ARM64_INS_SMC,
+ AArch64_SHLv4i32_shift, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHLv8i16_shift, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHLv8i8_shift, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHRNv16i8_shift, ARM64_INS_SHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHRNv2i32_shift, ARM64_INS_SHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHRNv4i16_shift, ARM64_INS_SHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHRNv4i32_shift, ARM64_INS_SHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHRNv8i16_shift, ARM64_INS_SHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHRNv8i8_shift, ARM64_INS_SHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHSUBv16i8, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHSUBv2i32, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHSUBv4i16, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHSUBv4i32, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHSUBv8i16, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SHSUBv8i8, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SLId, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SLIv16i8_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SLIv2i32_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SLIv2i64_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SLIv4i16_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SLIv4i32_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SLIv8i16_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SLIv8i8_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMADDLrrr, ARM64_INS_SMADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXPv16i8, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXPv2i32, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXPv4i16, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXPv4i32, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXPv8i16, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXPv8i8, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXVv16i8v, ARM64_INS_SMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXVv4i16v, ARM64_INS_SMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXVv4i32v, ARM64_INS_SMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXVv8i16v, ARM64_INS_SMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXVv8i8v, ARM64_INS_SMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXv16i8, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXv2i32, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXv4i16, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXv4i32, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXv8i16, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMAXv8i8, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMC, ARM64_INS_SMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINPv16i8, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINPv2i32, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINPv4i16, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINPv4i32, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINPv8i16, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINPv8i8, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINVv16i8v, ARM64_INS_SMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINVv4i16v, ARM64_INS_SMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINVv4i32v, ARM64_INS_SMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINVv8i16v, ARM64_INS_SMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINVv8i8v, ARM64_INS_SMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINv16i8, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINv2i32, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINv4i16, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINv4i32, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINv8i16, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMINv8i8, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLALv16i8_v8i16, ARM64_INS_SMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLALv2i32_indexed, ARM64_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLALv2i32_v2i64, ARM64_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLALv4i16_indexed, ARM64_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLALv4i16_v4i32, ARM64_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLALv4i32_indexed, ARM64_INS_SMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLALv4i32_v2i64, ARM64_INS_SMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLALv8i16_indexed, ARM64_INS_SMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLALv8i16_v4i32, ARM64_INS_SMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLALv8i8_v8i16, ARM64_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLSLv16i8_v8i16, ARM64_INS_SMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLSLv2i32_indexed, ARM64_INS_SMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLSLv2i32_v2i64, ARM64_INS_SMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLSLv4i16_indexed, ARM64_INS_SMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLSLv4i16_v4i32, ARM64_INS_SMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLSLv4i32_indexed, ARM64_INS_SMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLSLv4i32_v2i64, ARM64_INS_SMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLSLv8i16_indexed, ARM64_INS_SMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLSLv8i16_v4i32, ARM64_INS_SMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMLSLv8i8_v8i16, ARM64_INS_SMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMOVvi16to32, ARM64_INS_SMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMOVvi16to64, ARM64_INS_SMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMOVvi32to64, ARM64_INS_SMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMOVvi8to32, ARM64_INS_SMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMOVvi8to64, ARM64_INS_SMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMSUBLrrr, ARM64_INS_SMSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULHrr, ARM64_INS_SMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULLv16i8_v8i16, ARM64_INS_SMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULLv2i32_indexed, ARM64_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULLv2i32_v2i64, ARM64_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULLv4i16_indexed, ARM64_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULLv4i16_v4i32, ARM64_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULLv4i32_indexed, ARM64_INS_SMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULLv4i32_v2i64, ARM64_INS_SMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULLv8i16_indexed, ARM64_INS_SMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULLv8i16_v4i32, ARM64_INS_SMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SMULLv8i8_v8i16, ARM64_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv16i8, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv1i16, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv1i32, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv1i64, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv1i8, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv2i32, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv2i64, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv4i16, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv4i32, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv8i16, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQABSv8i8, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv16i8, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv1i16, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv1i32, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv1i64, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv1i8, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv2i32, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv2i64, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv4i16, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv4i32, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv8i16, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQADDv8i8, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALi16, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALi32, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALv1i32_indexed, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALv1i64_indexed, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALv2i32_indexed, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALv2i32_v2i64, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALv4i16_indexed, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALv4i16_v4i32, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALv4i32_indexed, ARM64_INS_SQDMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALv4i32_v2i64, ARM64_INS_SQDMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALv8i16_indexed, ARM64_INS_SQDMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLALv8i16_v4i32, ARM64_INS_SQDMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLi16, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLi32, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLv1i32_indexed, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLv1i64_indexed, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLv2i32_indexed, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLv2i32_v2i64, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLv4i16_indexed, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLv4i16_v4i32, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLv4i32_indexed, ARM64_INS_SQDMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLv4i32_v2i64, ARM64_INS_SQDMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLv8i16_indexed, ARM64_INS_SQDMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMLSLv8i16_v4i32, ARM64_INS_SQDMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv1i16, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv1i16_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv1i32, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv1i32_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv2i32, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv2i32_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv4i16, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv4i16_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv4i32, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv4i32_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv8i16, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULHv8i16_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLi16, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLi32, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLv1i32_indexed, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLv1i64_indexed, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLv2i32_indexed, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLv2i32_v2i64, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLv4i16_indexed, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLv4i16_v4i32, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLv4i32_indexed, ARM64_INS_SQDMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLv4i32_v2i64, ARM64_INS_SQDMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLv8i16_indexed, ARM64_INS_SQDMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQDMULLv8i16_v4i32, ARM64_INS_SQDMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv16i8, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv1i16, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv1i32, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv1i64, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv1i8, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv2i32, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv2i64, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv4i16, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv4i32, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv8i16, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQNEGv8i8, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv1i16, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv1i16_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv1i32, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv1i32_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv2i32, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv2i32_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv4i16, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv4i16_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv4i32, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv4i32_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv8i16, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRDMULHv8i16_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv16i8, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv1i16, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv1i32, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv1i64, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv1i8, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv2i32, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv2i64, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv4i16, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv4i32, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv8i16, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHLv8i8, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRNb, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRNh, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRNs, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRNv16i8_shift, ARM64_INS_SQRSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRNv2i32_shift, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRNv4i16_shift, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRNv4i32_shift, ARM64_INS_SQRSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRNv8i16_shift, ARM64_INS_SQRSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRNv8i8_shift, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRUNb, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRUNh, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRUNs, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRUNv16i8_shift, ARM64_INS_SQRSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRUNv2i32_shift, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRUNv4i16_shift, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRUNv4i32_shift, ARM64_INS_SQRSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRUNv8i16_shift, ARM64_INS_SQRSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQRSHRUNv8i8_shift, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUb, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUd, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUh, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUs, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUv16i8_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUv2i32_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUv2i64_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUv4i16_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUv4i32_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUv8i16_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLUv8i8_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLb, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLd, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLh, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLs, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv16i8, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv16i8_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv1i16, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv1i32, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv1i64, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv1i8, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv2i32, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv2i32_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv2i64, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv2i64_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv4i16, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv4i16_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv4i32, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv4i32_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv8i16, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv8i16_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv8i8, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHLv8i8_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRNb, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRNh, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRNs, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRNv16i8_shift, ARM64_INS_SQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRNv2i32_shift, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRNv4i16_shift, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRNv4i32_shift, ARM64_INS_SQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRNv8i16_shift, ARM64_INS_SQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRNv8i8_shift, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRUNb, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRUNh, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRUNs, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRUNv16i8_shift, ARM64_INS_SQSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRUNv2i32_shift, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRUNv4i16_shift, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRUNv4i32_shift, ARM64_INS_SQSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRUNv8i16_shift, ARM64_INS_SQSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSHRUNv8i8_shift, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv16i8, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv1i16, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv1i32, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv1i64, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv1i8, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv2i32, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv2i64, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv4i16, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv4i32, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv8i16, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQSUBv8i8, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTNv16i8, ARM64_INS_SQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTNv1i16, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTNv1i32, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTNv1i8, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTNv2i32, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTNv4i16, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTNv4i32, ARM64_INS_SQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTNv8i16, ARM64_INS_SQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTNv8i8, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTUNv16i8, ARM64_INS_SQXTUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTUNv1i16, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTUNv1i32, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTUNv1i8, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTUNv2i32, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTUNv4i16, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTUNv4i32, ARM64_INS_SQXTUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTUNv8i16, ARM64_INS_SQXTUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SQXTUNv8i8, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRHADDv16i8, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRHADDv2i32, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRHADDv4i16, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRHADDv4i32, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRHADDv8i16, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRHADDv8i8, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRId, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRIv16i8_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRIv2i32_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRIv2i64_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRIv4i16_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRIv4i32_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRIv8i16_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRIv8i8_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHLv16i8, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHLv1i64, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHLv2i32, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHLv2i64, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHLv4i16, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHLv4i32, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHLv8i16, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHLv8i8, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHRd, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHRv16i8_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHRv2i32_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHRv2i64_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHRv4i16_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHRv4i32_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHRv8i16_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSHRv8i8_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSRAd, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSRAv16i8_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSRAv2i32_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSRAv2i64_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSRAv4i16_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSRAv4i32_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSRAv8i16_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SRSRAv8i8_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLLv16i8_shift, ARM64_INS_SSHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLLv2i32_shift, ARM64_INS_SSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLLv4i16_shift, ARM64_INS_SSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLLv4i32_shift, ARM64_INS_SSHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLLv8i16_shift, ARM64_INS_SSHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLLv8i8_shift, ARM64_INS_SSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLv16i8, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLv1i64, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLv2i32, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLv2i64, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLv4i16, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLv4i32, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLv8i16, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHLv8i8, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHRd, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHRv16i8_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHRv2i32_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHRv2i64_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHRv4i16_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHRv4i32_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHRv8i16_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSHRv8i8_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSRAd, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSRAv16i8_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSRAv2i32_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSRAv2i64_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSRAv4i16_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSRAv4i32_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSRAv8i16_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSRAv8i8_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBLv16i8_v8i16, ARM64_INS_SSUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBLv2i32_v2i64, ARM64_INS_SSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBLv4i16_v4i32, ARM64_INS_SSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBLv4i32_v2i64, ARM64_INS_SSUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBLv8i16_v4i32, ARM64_INS_SSUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBLv8i8_v8i16, ARM64_INS_SSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBWv16i8_v8i16, ARM64_INS_SSUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBWv2i32_v2i64, ARM64_INS_SSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBWv4i16_v4i32, ARM64_INS_SSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBWv4i32_v2i64, ARM64_INS_SSUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBWv8i16_v4i32, ARM64_INS_SSUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SSUBWv8i8_v8i16, ARM64_INS_SSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv16b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv16b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv1d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv1d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv2d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv2d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv2s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv2s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv4h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv4h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv4s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv4s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv8b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv8b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv8h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Fourv8h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev16b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev16b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev1d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev1d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev2d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev2d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev2s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev2s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev4h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev4h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev4s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev4s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev8b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev8b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev8h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Onev8h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev16b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev16b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev1d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev1d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev2d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev2d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev2s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev2s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev4h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev4h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev4s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev4s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev8b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev8b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev8h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Threev8h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov16b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov16b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov1d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov1d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov2d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov2d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov2s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov2s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov4h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov4h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov4s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov4s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov8b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov8b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov8h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1Twov8h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1i16, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1i16_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1i32, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1i32_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1i64, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1i64_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1i8, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST1i8_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov16b, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov16b_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov2d, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov2d_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov2s, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov2s_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov4h, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov4h_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov4s, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov4s_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov8b, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov8b_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov8h, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2Twov8h_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2i16, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2i16_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2i32, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2i32_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2i64, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2i64_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2i8, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST2i8_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev16b, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev16b_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev2d, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev2d_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev2s, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev2s_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev4h, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev4h_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev4s, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev4s_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev8b, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev8b_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev8h, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3Threev8h_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3i16, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3i16_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3i32, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3i32_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3i64, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3i64_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3i8, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST3i8_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv16b, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv16b_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv2d, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv2d_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv2s, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv2s_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv4h, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv4h_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv4s, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv4s_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv8b, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv8b_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv8h, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4Fourv8h_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4i16, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4i16_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4i32, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4i32_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4i64, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4i64_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4i8, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ST4i8_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STLRB, ARM64_INS_STLRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STLRH, ARM64_INS_STLRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STLRW, ARM64_INS_STLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STLRX, ARM64_INS_STLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STLXPW, ARM64_INS_STLXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STLXPX, ARM64_INS_STLXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STLXRB, ARM64_INS_STLXRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STLXRH, ARM64_INS_STLXRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STLXRW, ARM64_INS_STLXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STLXRX, ARM64_INS_STLXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STNPDi, ARM64_INS_STNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STNPQi, ARM64_INS_STNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STNPSi, ARM64_INS_STNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STNPWi, ARM64_INS_STNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STNPXi, ARM64_INS_STNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPDi, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPDpost, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPDpre, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPQi, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPQpost, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPQpre, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPSi, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPSpost, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPSpre, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPWi, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPWpost, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPWpre, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPXi, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPXpost, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STPXpre, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRBBpost, ARM64_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRBBpre, ARM64_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRBBroW, ARM64_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRBBroX, ARM64_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRBBui, ARM64_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRBpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRBpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRBroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRBroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRBui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRDpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRDpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRDroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRDroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRDui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRHHpost, ARM64_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRHHpre, ARM64_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRHHroW, ARM64_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRHHroX, ARM64_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRHHui, ARM64_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRHpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRHpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRHroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRHroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRHui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRQpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRQpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRQroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRQroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRQui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRSpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRSpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRSroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRSroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRSui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRWpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRWpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRWroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRWroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRWui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRXpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRXpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRXroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRXroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STRXui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STTRBi, ARM64_INS_STTRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STTRHi, ARM64_INS_STTRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STTRWi, ARM64_INS_STTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STTRXi, ARM64_INS_STTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STURBBi, ARM64_INS_STURB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STURBi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STURDi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STURHHi, ARM64_INS_STURH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STURHi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STURQi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STURSi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STURWi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STURXi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STXPW, ARM64_INS_STXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STXPX, ARM64_INS_STXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STXRB, ARM64_INS_STXRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STXRH, ARM64_INS_STXRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STXRW, ARM64_INS_STXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_STXRX, ARM64_INS_STXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBHNv2i64_v2i32, ARM64_INS_SUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBHNv2i64_v4i32, ARM64_INS_SUBHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBHNv4i32_v4i16, ARM64_INS_SUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBHNv4i32_v8i16, ARM64_INS_SUBHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBHNv8i16_v16i8, ARM64_INS_SUBHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBHNv8i16_v8i8, ARM64_INS_SUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBSWri, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBSWrs, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBSWrx, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBSXri, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBSXrs, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBSXrx, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBSXrx64, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBWri, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBWrs, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBWrx, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBXri, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBXrs, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBXrx, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBXrx64, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBv16i8, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBv1i64, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBv2i32, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBv2i64, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBv4i16, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBv4i32, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBv8i16, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUBv8i8, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv16i8, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv1i16, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv1i32, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv1i64, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv1i8, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv2i32, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv2i64, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv4i16, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv4i32, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv8i16, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SUQADDv8i8, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SVC, ARM64_INS_SVC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SYSLxt, ARM64_INS_SYSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_SYSxt, ARM64_INS_SYS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TBLv16i8Four, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TBLv16i8One, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TBLv16i8Three, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TBLv16i8Two, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TBLv8i8Four, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TBLv8i8One, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TBLv8i8Three, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TBLv8i8Two, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TBNZW, ARM64_INS_TBNZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 1, 0
#endif
},
{
- AArch64_SMINPvvv_16B, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPvvv_2S, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPvvv_4H, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPvvv_4S, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPvvv_8B, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPvvv_8H, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINV_1b16b, ARM64_INS_SMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINV_1b8b, ARM64_INS_SMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINV_1h4h, ARM64_INS_SMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINV_1h8h, ARM64_INS_SMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINV_1s4s, ARM64_INS_SMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINvvv_16B, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINvvv_2S, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINvvv_4H, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINvvv_4S, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINvvv_8B, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINvvv_8H, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLAL2vvv_2d4s, ARM64_INS_SMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLAL2vvv_4s8h, ARM64_INS_SMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLAL2vvv_8h16b, ARM64_INS_SMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALvve_2d2s, ARM64_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALvve_2d4s, ARM64_INS_SMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALvve_4s4h, ARM64_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALvve_4s8h, ARM64_INS_SMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALvvv_2d2s, ARM64_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALvvv_4s4h, ARM64_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALvvv_8h8b, ARM64_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSL2vvv_2d4s, ARM64_INS_SMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSL2vvv_4s8h, ARM64_INS_SMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSL2vvv_8h16b, ARM64_INS_SMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLvve_2d2s, ARM64_INS_SMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLvve_2d4s, ARM64_INS_SMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLvve_4s4h, ARM64_INS_SMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLvve_4s8h, ARM64_INS_SMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLvvv_2d2s, ARM64_INS_SMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLvvv_4s4h, ARM64_INS_SMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLvvv_8h8b, ARM64_INS_SMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMOVwb, ARM64_INS_SMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMOVwh, ARM64_INS_SMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMOVxb, ARM64_INS_SMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMOVxh, ARM64_INS_SMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMOVxs, ARM64_INS_SMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMSUBLxwwx, ARM64_INS_SMSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULHxxx, ARM64_INS_SMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULL2vvv_2d4s, ARM64_INS_SMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULL2vvv_4s8h, ARM64_INS_SMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULL2vvv_8h16b, ARM64_INS_SMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLve_2d2s, ARM64_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLve_2d4s, ARM64_INS_SMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLve_4s4h, ARM64_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLve_4s8h, ARM64_INS_SMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLvvv_2d2s, ARM64_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLvvv_4s4h, ARM64_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLvvv_8h8b, ARM64_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABS16b, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABS2d, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABS2s, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABS4h, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABS4s, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABS8b, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABS8h, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSbb, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSdd, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABShh, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSss, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDbbb, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDddd, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDhhh, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDsss, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDvvv_16B, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDvvv_2D, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDvvv_2S, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDvvv_4H, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDvvv_4S, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDvvv_8B, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDvvv_8H, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLAL2vvv_2d4s, ARM64_INS_SQDMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLAL2vvv_4s8h, ARM64_INS_SQDMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALdss, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALdsv_2S, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALdsv_4S, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALshh, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALshv_4H, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALshv_8H, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALvve_2d2s, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALvve_2d4s, ARM64_INS_SQDMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALvve_4s4h, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALvve_4s8h, ARM64_INS_SQDMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALvvv_2d2s, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALvvv_4s4h, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSL2vvv_2d4s, ARM64_INS_SQDMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSL2vvv_4s8h, ARM64_INS_SQDMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLdss, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLdsv_2S, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLdsv_4S, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLshh, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLshv_4H, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLshv_8H, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLvve_2d2s, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLvve_2d4s, ARM64_INS_SQDMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLvve_4s4h, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLvve_4s8h, ARM64_INS_SQDMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLvvv_2d2s, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLvvv_4s4h, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHhhh, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHhhv_4H, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHhhv_8H, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHsss, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHssv_2S, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHssv_4S, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHve_2s4s, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHve_4h8h, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHve_4s4s, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHve_8h8h, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHvvv_2S, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHvvv_4H, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHvvv_4S, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHvvv_8H, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULL2vvv_2d4s, ARM64_INS_SQDMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULL2vvv_4s8h, ARM64_INS_SQDMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLdss, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLdsv_2S, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLdsv_4S, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLshh, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLshv_4H, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLshv_8H, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLve_2d2s, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLve_2d4s, ARM64_INS_SQDMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLve_4s4h, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLve_4s8h, ARM64_INS_SQDMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLvvv_2d2s, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLvvv_4s4h, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEG16b, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEG2d, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEG2s, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEG4h, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEG4s, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEG8b, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEG8h, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGbb, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGdd, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGhh, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGss, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHhhh, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHhhv_4H, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHhhv_8H, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHsss, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHssv_2S, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHssv_4S, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHve_2s4s, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHve_4h8h, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHve_4s4s, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHve_8h8h, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHvvv_2S, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHvvv_4H, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHvvv_4S, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHvvv_8H, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLbbb, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLddd, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLhhh, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLsss, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLvvv_16B, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLvvv_2D, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLvvv_2S, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLvvv_4H, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLvvv_4S, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLvvv_8B, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLvvv_8H, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNbhi, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNhsi, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNsdi, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNvvi_16B, ARM64_INS_SQRSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNvvi_2S, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNvvi_4H, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNvvi_4S, ARM64_INS_SQRSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNvvi_8B, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNvvi_8H, ARM64_INS_SQRSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNbhi, ARM64_INS_SQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNhsi, ARM64_INS_SQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNsdi, ARM64_INS_SQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUbbi, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUddi, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUhhi, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUssi, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUvvi_16B, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUvvi_2D, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUvvi_2S, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUvvi_4H, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUvvi_4S, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUvvi_8B, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUvvi_8H, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLbbb, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLbbi, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLddd, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLddi, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLhhh, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLhhi, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLssi, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLsss, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvi_16B, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvi_2D, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvi_2S, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvi_4H, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvi_4S, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvi_8B, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvi_8H, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvv_16B, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvv_2D, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvv_2S, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvv_4H, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvv_4S, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvv_8B, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLvvv_8H, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNbhi, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNhsi, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNsdi, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNvvi_16B, ARM64_INS_SQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNvvi_2S, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNvvi_4H, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNvvi_4S, ARM64_INS_SQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNvvi_8B, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNvvi_8H, ARM64_INS_SQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNbhi, ARM64_INS_SQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNhsi, ARM64_INS_SQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNsdi, ARM64_INS_SQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBbbb, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBddd, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBhhh, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBsss, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBvvv_16B, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBvvv_2D, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBvvv_2S, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBvvv_4H, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBvvv_4S, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBvvv_8B, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBvvv_8H, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTN2d2s, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTN2d4s, ARM64_INS_SQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTN4s4h, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTN4s8h, ARM64_INS_SQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTN8h16b, ARM64_INS_SQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTN8h8b, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNbh, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNhs, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNsd, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUN2d2s, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUN2d4s, ARM64_INS_SQXTUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUN4s4h, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUN4s8h, ARM64_INS_SQXTUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUN8h16b, ARM64_INS_SQXTUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUN8h8b, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNbh, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNhs, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNsd, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDvvv_16B, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDvvv_2S, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDvvv_4H, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDvvv_4S, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDvvv_8B, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDvvv_8H, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRI, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIvvi_16B, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIvvi_2D, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIvvi_2S, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIvvi_4H, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIvvi_4S, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIvvi_8B, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIvvi_8H, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLddd, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLvvv_16B, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLvvv_2D, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLvvv_2S, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLvvv_4H, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLvvv_4S, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLvvv_8B, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLvvv_8H, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRddi, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRvvi_16B, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRvvi_2D, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRvvi_2S, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRvvi_4H, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRvvi_4S, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRvvi_8B, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRvvi_8H, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRA, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAvvi_16B, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAvvi_2D, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAvvi_2S, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAvvi_4H, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAvvi_4S, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAvvi_8B, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAvvi_8H, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLvvi_16B, ARM64_INS_SSHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLvvi_2S, ARM64_INS_SSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLvvi_4H, ARM64_INS_SSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLvvi_4S, ARM64_INS_SSHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLvvi_8B, ARM64_INS_SSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLvvi_8H, ARM64_INS_SSHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLddd, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLvvv_16B, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLvvv_2D, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLvvv_2S, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLvvv_4H, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLvvv_4S, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLvvv_8B, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLvvv_8H, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRddi, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRvvi_16B, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRvvi_2D, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRvvi_2S, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRvvi_4H, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRvvi_4S, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRvvi_8B, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRvvi_8H, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRA, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAvvi_16B, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAvvi_2D, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAvvi_2S, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAvvi_4H, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAvvi_4S, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAvvi_8B, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAvvi_8H, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBL2vvv_2d4s, ARM64_INS_SSUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBL2vvv_4s8h, ARM64_INS_SSUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBL2vvv_8h16b, ARM64_INS_SSUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBLvvv_2d2s, ARM64_INS_SSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBLvvv_4s4h, ARM64_INS_SSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBLvvv_8h8b, ARM64_INS_SSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBW2vvv_2d4s, ARM64_INS_SSUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBW2vvv_4s8h, ARM64_INS_SSUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBW2vvv_8h16b, ARM64_INS_SSUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBWvvv_2d2s, ARM64_INS_SSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBWvvv_4s4h, ARM64_INS_SSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBWvvv_8h8b, ARM64_INS_SSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_B, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_D, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_H, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_S, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_WB_B_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_WB_B_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_WB_D_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_WB_D_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_WB_H_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_WB_H_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_WB_S_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1LN_WB_S_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_16B_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_16B_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_1D_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_1D_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_2D_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_2D_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_2S_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_2S_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_4H_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_4H_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_4S_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_4S_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_8B_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_8B_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_8H_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1WB_8H_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1_16B, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1_1D, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1_2D, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1_2S, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1_4H, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1_4S, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1_8B, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1_8H, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_16B_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_16B_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_1D_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_1D_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_2D_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_2D_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_2S_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_2S_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_4H_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_4H_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_4S_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_4S_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_8B_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_8B_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_8H_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2WB_8H_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2_16B, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2_1D, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2_2D, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2_2S, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2_4H, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2_4S, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2_8B, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x2_8H, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_16B_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_16B_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_1D_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_1D_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_2D_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_2D_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_2S_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_2S_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_4H_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_4H_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_4S_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_4S_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_8B_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_8B_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_8H_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3WB_8H_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3_16B, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3_1D, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3_2D, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3_2S, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3_4H, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3_4S, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3_8B, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x3_8H, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_16B_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_16B_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_1D_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_1D_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_2D_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_2D_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_2S_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_2S_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_4H_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_4H_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_4S_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_4S_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_8B_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_8B_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_8H_fixed, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4WB_8H_register, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4_16B, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4_1D, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4_2D, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4_2S, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4_4H, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4_4S, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4_8B, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1x4_8H, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_B, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_D, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_H, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_S, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_WB_B_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_WB_B_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_WB_D_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_WB_D_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_WB_H_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_WB_H_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_WB_S_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2LN_WB_S_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_16B_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_16B_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_2D_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_2D_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_2S_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_2S_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_4H_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_4H_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_4S_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_4S_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_8B_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_8B_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_8H_fixed, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2WB_8H_register, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2_16B, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2_2D, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2_2S, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2_4H, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2_4S, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2_8B, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2_8H, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_B, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_D, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_H, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_S, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_WB_B_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_WB_B_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_WB_D_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_WB_D_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_WB_H_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_WB_H_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_WB_S_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3LN_WB_S_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_16B_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_16B_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_2D_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_2D_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_2S_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_2S_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_4H_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_4H_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_4S_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_4S_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_8B_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_8B_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_8H_fixed, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3WB_8H_register, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3_16B, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3_2D, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3_2S, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3_4H, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3_4S, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3_8B, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3_8H, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_B, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_D, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_H, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_S, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_WB_B_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_WB_B_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_WB_D_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_WB_D_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_WB_H_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_WB_H_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_WB_S_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4LN_WB_S_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_16B_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_16B_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_2D_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_2D_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_2S_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_2S_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_4H_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_4H_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_4S_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_4S_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_8B_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_8B_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_8H_fixed, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4WB_8H_register, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4_16B, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4_2D, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4_2S, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4_4H, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4_4S, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4_8B, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4_8H, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLR_byte, ARM64_INS_STLRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLR_dword, ARM64_INS_STLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLR_hword, ARM64_INS_STLRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLR_word, ARM64_INS_STLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXP_dword, ARM64_INS_STLXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXP_word, ARM64_INS_STLXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXR_byte, ARM64_INS_STLXRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXR_dword, ARM64_INS_STLXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXR_hword, ARM64_INS_STLXRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXR_word, ARM64_INS_STLXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXP_dword, ARM64_INS_STXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXP_word, ARM64_INS_STXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXR_byte, ARM64_INS_STXRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXR_dword, ARM64_INS_STXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXR_hword, ARM64_INS_STXRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXR_word, ARM64_INS_STXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHN2vvv_16b8h, ARM64_INS_SUBHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHN2vvv_4s2d, ARM64_INS_SUBHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHN2vvv_8h4s, ARM64_INS_SUBHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHNvvv_2s2d, ARM64_INS_SUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHNvvv_4h4s, ARM64_INS_SUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHNvvv_8b8h, ARM64_INS_SUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_asr, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_lsl, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_lsr, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_sxtb, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_sxth, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_sxtw, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_sxtx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_uxtb, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_uxth, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_uxtw, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSwww_uxtx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxw_sxtb, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxw_sxth, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxw_sxtw, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxw_uxtb, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxw_uxth, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxw_uxtw, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxx_asr, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxx_lsl, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxx_lsr, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxx_sxtx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSxxx_uxtx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBddd, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBvvv_16B, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBvvv_2D, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBvvv_2S, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBvvv_4H, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBvvv_4S, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBvvv_8B, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBvvv_8H, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwwi_lsl0_S, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwwi_lsl0_cmp, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwwi_lsl0_s, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwwi_lsl12_S, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwwi_lsl12_cmp, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwwi_lsl12_s, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_asr, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_lsl, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_lsr, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_sxtb, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_sxth, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_sxtw, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_sxtx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_uxtb, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_uxth, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_uxtw, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBwww_uxtx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxi_lsl0_S, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxi_lsl0_cmp, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxi_lsl0_s, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxi_lsl12_S, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxi_lsl12_cmp, ARM64_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxi_lsl12_s, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxw_sxtb, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxw_sxth, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxw_sxtw, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxw_uxtb, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxw_uxth, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxw_uxtw, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxx_asr, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxx_lsl, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxx_lsr, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxx_sxtx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBxxx_uxtx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADD16b, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADD2d, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADD2s, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADD4h, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADD4s, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADD8b, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADD8h, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDbb, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDdd, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDhh, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDss, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SVCi, ARM64_INS_SVC,
+ AArch64_TBNZX, ARM64_INS_TBNZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 1, 0
#endif
},
{
- AArch64_SXTBww, ARM64_INS_SXTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SXTBxw, ARM64_INS_SXTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SXTHww, ARM64_INS_SXTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SXTHxw, ARM64_INS_SXTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SXTWxw, ARM64_INS_SXTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SYSLxicci, ARM64_INS_SYSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SYSiccix, ARM64_INS_SYS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBL1_16b, ARM64_INS_TBL,
+ AArch64_TBXv16i8Four, ARM64_INS_TBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBL1_8b, ARM64_INS_TBL,
+ AArch64_TBXv16i8One, ARM64_INS_TBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBL2_16b, ARM64_INS_TBL,
+ AArch64_TBXv16i8Three, ARM64_INS_TBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBL2_8b, ARM64_INS_TBL,
+ AArch64_TBXv16i8Two, ARM64_INS_TBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBL3_16b, ARM64_INS_TBL,
+ AArch64_TBXv8i8Four, ARM64_INS_TBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBL3_8b, ARM64_INS_TBL,
+ AArch64_TBXv8i8One, ARM64_INS_TBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBL4_16b, ARM64_INS_TBL,
+ AArch64_TBXv8i8Three, ARM64_INS_TBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBL4_8b, ARM64_INS_TBL,
+ AArch64_TBXv8i8Two, ARM64_INS_TBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBNZwii, ARM64_INS_TBNZ,
+ AArch64_TBZW, ARM64_INS_TBZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 1, 0
#endif
},
{
- AArch64_TBNZxii, ARM64_INS_TBNZ,
+ AArch64_TBZX, ARM64_INS_TBZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 1, 0
#endif
},
{
- AArch64_TBX1_16b, ARM64_INS_TBX,
+ AArch64_TRN1v16i8, ARM64_INS_TRN1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBX1_8b, ARM64_INS_TBX,
+ AArch64_TRN1v2i32, ARM64_INS_TRN1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBX2_16b, ARM64_INS_TBX,
+ AArch64_TRN1v2i64, ARM64_INS_TRN1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBX2_8b, ARM64_INS_TBX,
+ AArch64_TRN1v4i16, ARM64_INS_TRN1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBX3_16b, ARM64_INS_TBX,
+ AArch64_TRN1v4i32, ARM64_INS_TRN1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBX3_8b, ARM64_INS_TBX,
+ AArch64_TRN1v8i16, ARM64_INS_TRN1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBX4_16b, ARM64_INS_TBX,
+ AArch64_TRN1v8i8, ARM64_INS_TRN1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBX4_8b, ARM64_INS_TBX,
+ AArch64_TRN2v16i8, ARM64_INS_TRN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBZwii, ARM64_INS_TBZ,
+ AArch64_TRN2v2i32, ARM64_INS_TRN2,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TBZxii, ARM64_INS_TBZ,
+ AArch64_TRN2v2i64, ARM64_INS_TRN2,
#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_TLBIi, ARM64_INS_TLBI,
+ AArch64_TRN2v4i16, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TRN2v4i32, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TRN2v8i16, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_TRN2v8i8, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABALv16i8_v8i16, ARM64_INS_UABAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABALv2i32_v2i64, ARM64_INS_UABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABALv4i16_v4i32, ARM64_INS_UABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABALv4i32_v2i64, ARM64_INS_UABAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABALv8i16_v4i32, ARM64_INS_UABAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABALv8i8_v8i16, ARM64_INS_UABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABAv16i8, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABAv2i32, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABAv4i16, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABAv4i32, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABAv8i16, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABAv8i8, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDLv16i8_v8i16, ARM64_INS_UABDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDLv2i32_v2i64, ARM64_INS_UABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDLv4i16_v4i32, ARM64_INS_UABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDLv4i32_v2i64, ARM64_INS_UABDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDLv8i16_v4i32, ARM64_INS_UABDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDLv8i8_v8i16, ARM64_INS_UABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDv16i8, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDv2i32, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDv4i16, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDv4i32, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDv8i16, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UABDv8i8, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADALPv16i8_v8i16, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADALPv2i32_v1i64, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADALPv4i16_v2i32, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADALPv4i32_v2i64, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADALPv8i16_v4i32, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADALPv8i8_v4i16, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLPv16i8_v8i16, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLPv2i32_v1i64, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLPv4i16_v2i32, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLPv4i32_v2i64, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLPv8i16_v4i32, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLPv8i8_v4i16, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLVv16i8v, ARM64_INS_UADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLVv4i16v, ARM64_INS_UADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLVv4i32v, ARM64_INS_UADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLVv8i16v, ARM64_INS_UADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLVv8i8v, ARM64_INS_UADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLv16i8_v8i16, ARM64_INS_UADDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLv2i32_v2i64, ARM64_INS_UADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLv4i16_v4i32, ARM64_INS_UADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLv4i32_v2i64, ARM64_INS_UADDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLv8i16_v4i32, ARM64_INS_UADDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDLv8i8_v8i16, ARM64_INS_UADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDWv16i8_v8i16, ARM64_INS_UADDW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDWv2i32_v2i64, ARM64_INS_UADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDWv4i16_v4i32, ARM64_INS_UADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDWv4i32_v2i64, ARM64_INS_UADDW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDWv8i16_v4i32, ARM64_INS_UADDW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UADDWv8i8_v8i16, ARM64_INS_UADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UBFMWri, ARM64_INS_UBFM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_TLBIix, ARM64_INS_TLBI,
+ AArch64_UBFMXri, ARM64_INS_UBFM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_TRN1vvv_16b, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1vvv_2d, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1vvv_2s, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1vvv_4h, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1vvv_4s, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1vvv_8b, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1vvv_8h, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2vvv_16b, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2vvv_2d, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2vvv_2s, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2vvv_4h, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2vvv_4s, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2vvv_8b, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2vvv_8h, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TSTww_asr, ARM64_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_TSTww_lsl, ARM64_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_TSTww_lsr, ARM64_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_TSTww_ror, ARM64_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_TSTxx_asr, ARM64_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_TSTxx_lsl, ARM64_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_TSTxx_lsr, ARM64_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_TSTxx_ror, ARM64_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAL2vvv_2d2s, ARM64_INS_UABAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAL2vvv_4s4h, ARM64_INS_UABAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAL2vvv_8h8b, ARM64_INS_UABAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABALvvv_2d2s, ARM64_INS_UABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABALvvv_4s4h, ARM64_INS_UABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABALvvv_8h8b, ARM64_INS_UABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAvvv_16B, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAvvv_2S, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAvvv_4H, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAvvv_4S, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAvvv_8B, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAvvv_8H, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDL2vvv_2d2s, ARM64_INS_UABDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDL2vvv_4s4h, ARM64_INS_UABDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDL2vvv_8h8b, ARM64_INS_UABDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDLvvv_2d2s, ARM64_INS_UABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDLvvv_4s4h, ARM64_INS_UABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDLvvv_8h8b, ARM64_INS_UABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDvvv_16B, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDvvv_2S, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDvvv_4H, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDvvv_4S, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDvvv_8B, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDvvv_8H, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALP16b8h, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALP2s1d, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALP4h2s, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALP4s2d, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALP8b4h, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALP8h4s, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDL2vvv_2d4s, ARM64_INS_UADDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDL2vvv_4s8h, ARM64_INS_UADDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDL2vvv_8h16b, ARM64_INS_UADDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLP16b8h, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLP2s1d, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLP4h2s, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLP4s2d, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLP8b4h, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLP8h4s, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLV_1d4s, ARM64_INS_UADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLV_1h16b, ARM64_INS_UADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLV_1h8b, ARM64_INS_UADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLV_1s4h, ARM64_INS_UADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLV_1s8h, ARM64_INS_UADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLvvv_2d2s, ARM64_INS_UADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLvvv_4s4h, ARM64_INS_UADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLvvv_8h8b, ARM64_INS_UADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDW2vvv_2d4s, ARM64_INS_UADDW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDW2vvv_4s8h, ARM64_INS_UADDW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDW2vvv_8h16b, ARM64_INS_UADDW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDWvvv_2d2s, ARM64_INS_UADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDWvvv_4s4h, ARM64_INS_UADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDWvvv_8h8b, ARM64_INS_UADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UBFIZwwii, ARM64_INS_UBFIZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UBFIZxxii, ARM64_INS_UBFIZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UBFMwwii, ARM64_INS_UBFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UBFMxxii, ARM64_INS_UBFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UBFXwwii, ARM64_INS_UBFX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UBFXxxii, ARM64_INS_UBFX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTF_2d, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTF_2s, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTF_4s, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTF_Nddi, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTF_Nssi, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFdd, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFdw, ARM64_INS_UCVTF,
+ AArch64_UCVTFSWDri, ARM64_INS_UCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_UCVTFdwi, ARM64_INS_UCVTF,
+ AArch64_UCVTFSWSri, ARM64_INS_UCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_UCVTFdx, ARM64_INS_UCVTF,
+ AArch64_UCVTFSXDri, ARM64_INS_UCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_UCVTFdxi, ARM64_INS_UCVTF,
+ AArch64_UCVTFSXSri, ARM64_INS_UCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_UCVTFss, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFsw, ARM64_INS_UCVTF,
+ AArch64_UCVTFUWDri, ARM64_INS_UCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_UCVTFswi, ARM64_INS_UCVTF,
+ AArch64_UCVTFUWSri, ARM64_INS_UCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_UCVTFsx, ARM64_INS_UCVTF,
+ AArch64_UCVTFUXDri, ARM64_INS_UCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_UCVTFsxi, ARM64_INS_UCVTF,
+ AArch64_UCVTFUXSri, ARM64_INS_UCVTF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
#endif
},
{
- AArch64_UDIVwww, ARM64_INS_UDIV,
+ AArch64_UCVTFd, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UCVTFs, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UCVTFv1i32, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UCVTFv1i64, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UCVTFv2f32, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UCVTFv2f64, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UCVTFv2i32_shift, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UCVTFv2i64_shift, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UCVTFv4f32, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UCVTFv4i32_shift, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UDIVWr, ARM64_INS_UDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_UDIVxxx, ARM64_INS_UDIV,
+ AArch64_UDIVXr, ARM64_INS_UDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_UHADDvvv_16B, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDvvv_2S, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDvvv_4H, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDvvv_4S, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDvvv_8B, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDvvv_8H, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBvvv_16B, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBvvv_2S, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBvvv_4H, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBvvv_4S, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBvvv_8B, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBvvv_8H, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMADDLxwwx, ARM64_INS_UMADDL,
+ AArch64_UDIV_IntWr, ARM64_INS_UDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_UMAXPvvv_16B, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPvvv_2S, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPvvv_4H, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPvvv_4S, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPvvv_8B, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPvvv_8H, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXV_1b16b, ARM64_INS_UMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXV_1b8b, ARM64_INS_UMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXV_1h4h, ARM64_INS_UMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXV_1h8h, ARM64_INS_UMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXV_1s4s, ARM64_INS_UMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXvvv_16B, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXvvv_2S, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXvvv_4H, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXvvv_4S, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXvvv_8B, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXvvv_8H, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPvvv_16B, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPvvv_2S, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPvvv_4H, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPvvv_4S, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPvvv_8B, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPvvv_8H, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINV_1b16b, ARM64_INS_UMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINV_1b8b, ARM64_INS_UMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINV_1h4h, ARM64_INS_UMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINV_1h8h, ARM64_INS_UMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINV_1s4s, ARM64_INS_UMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINvvv_16B, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINvvv_2S, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINvvv_4H, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINvvv_4S, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINvvv_8B, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINvvv_8H, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLAL2vvv_2d4s, ARM64_INS_UMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLAL2vvv_4s8h, ARM64_INS_UMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLAL2vvv_8h16b, ARM64_INS_UMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALvve_2d2s, ARM64_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALvve_2d4s, ARM64_INS_UMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALvve_4s4h, ARM64_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALvve_4s8h, ARM64_INS_UMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALvvv_2d2s, ARM64_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALvvv_4s4h, ARM64_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALvvv_8h8b, ARM64_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSL2vvv_2d4s, ARM64_INS_UMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSL2vvv_4s8h, ARM64_INS_UMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSL2vvv_8h16b, ARM64_INS_UMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLvve_2d2s, ARM64_INS_UMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLvve_2d4s, ARM64_INS_UMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLvve_4s4h, ARM64_INS_UMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLvve_4s8h, ARM64_INS_UMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLvvv_2d2s, ARM64_INS_UMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLvvv_4s4h, ARM64_INS_UMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLvvv_8h8b, ARM64_INS_UMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMOVwb, ARM64_INS_UMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMOVwh, ARM64_INS_UMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMOVws, ARM64_INS_UMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMOVxd, ARM64_INS_UMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMSUBLxwwx, ARM64_INS_UMSUBL,
+ AArch64_UDIV_IntXr, ARM64_INS_UDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_UMULHxxx, ARM64_INS_UMULH,
+ AArch64_UHADDv16i8, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHADDv2i32, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHADDv4i16, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHADDv4i32, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHADDv8i16, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHADDv8i8, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHSUBv16i8, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHSUBv2i32, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHSUBv4i16, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHSUBv4i32, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHSUBv8i16, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UHSUBv8i8, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UMADDLrrr, ARM64_INS_UMADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_UMULL2vvv_2d4s, ARM64_INS_UMULL2,
+ AArch64_UMAXPv16i8, ARM64_INS_UMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UMULL2vvv_4s8h, ARM64_INS_UMULL2,
+ AArch64_UMAXPv2i32, ARM64_INS_UMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UMULL2vvv_8h16b, ARM64_INS_UMULL2,
+ AArch64_UMAXPv4i16, ARM64_INS_UMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UMULLve_2d2s, ARM64_INS_UMULL,
+ AArch64_UMAXPv4i32, ARM64_INS_UMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UMULLve_2d4s, ARM64_INS_UMULL2,
+ AArch64_UMAXPv8i16, ARM64_INS_UMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UMULLve_4s4h, ARM64_INS_UMULL,
+ AArch64_UMAXPv8i8, ARM64_INS_UMAXP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UMULLve_4s8h, ARM64_INS_UMULL2,
+ AArch64_UMAXVv16i8v, ARM64_INS_UMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UMULLvvv_2d2s, ARM64_INS_UMULL,
+ AArch64_UMAXVv4i16v, ARM64_INS_UMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UMULLvvv_4s4h, ARM64_INS_UMULL,
+ AArch64_UMAXVv4i32v, ARM64_INS_UMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UMULLvvv_8h8b, ARM64_INS_UMULL,
+ AArch64_UMAXVv8i16v, ARM64_INS_UMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDbbb, ARM64_INS_UQADD,
+ AArch64_UMAXVv8i8v, ARM64_INS_UMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDddd, ARM64_INS_UQADD,
+ AArch64_UMAXv16i8, ARM64_INS_UMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDhhh, ARM64_INS_UQADD,
+ AArch64_UMAXv2i32, ARM64_INS_UMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDsss, ARM64_INS_UQADD,
+ AArch64_UMAXv4i16, ARM64_INS_UMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDvvv_16B, ARM64_INS_UQADD,
+ AArch64_UMAXv4i32, ARM64_INS_UMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDvvv_2D, ARM64_INS_UQADD,
+ AArch64_UMAXv8i16, ARM64_INS_UMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDvvv_2S, ARM64_INS_UQADD,
+ AArch64_UMAXv8i8, ARM64_INS_UMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDvvv_4H, ARM64_INS_UQADD,
+ AArch64_UMINPv16i8, ARM64_INS_UMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDvvv_4S, ARM64_INS_UQADD,
+ AArch64_UMINPv2i32, ARM64_INS_UMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDvvv_8B, ARM64_INS_UQADD,
+ AArch64_UMINPv4i16, ARM64_INS_UMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQADDvvv_8H, ARM64_INS_UQADD,
+ AArch64_UMINPv4i32, ARM64_INS_UMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLbbb, ARM64_INS_UQRSHL,
+ AArch64_UMINPv8i16, ARM64_INS_UMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLddd, ARM64_INS_UQRSHL,
+ AArch64_UMINPv8i8, ARM64_INS_UMINP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLhhh, ARM64_INS_UQRSHL,
+ AArch64_UMINVv16i8v, ARM64_INS_UMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLsss, ARM64_INS_UQRSHL,
+ AArch64_UMINVv4i16v, ARM64_INS_UMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLvvv_16B, ARM64_INS_UQRSHL,
+ AArch64_UMINVv4i32v, ARM64_INS_UMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLvvv_2D, ARM64_INS_UQRSHL,
+ AArch64_UMINVv8i16v, ARM64_INS_UMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLvvv_2S, ARM64_INS_UQRSHL,
+ AArch64_UMINVv8i8v, ARM64_INS_UMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLvvv_4H, ARM64_INS_UQRSHL,
+ AArch64_UMINv16i8, ARM64_INS_UMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLvvv_4S, ARM64_INS_UQRSHL,
+ AArch64_UMINv2i32, ARM64_INS_UMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLvvv_8B, ARM64_INS_UQRSHL,
+ AArch64_UMINv4i16, ARM64_INS_UMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHLvvv_8H, ARM64_INS_UQRSHL,
+ AArch64_UMINv4i32, ARM64_INS_UMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHRNbhi, ARM64_INS_UQRSHRN,
+ AArch64_UMINv8i16, ARM64_INS_UMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHRNhsi, ARM64_INS_UQRSHRN,
+ AArch64_UMINv8i8, ARM64_INS_UMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHRNsdi, ARM64_INS_UQRSHRN,
+ AArch64_UMLALv16i8_v8i16, ARM64_INS_UMLAL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHRNvvi_16B, ARM64_INS_UQRSHRN2,
+ AArch64_UMLALv2i32_indexed, ARM64_INS_UMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHRNvvi_2S, ARM64_INS_UQRSHRN,
+ AArch64_UMLALv2i32_v2i64, ARM64_INS_UMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHRNvvi_4H, ARM64_INS_UQRSHRN,
+ AArch64_UMLALv4i16_indexed, ARM64_INS_UMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHRNvvi_4S, ARM64_INS_UQRSHRN2,
+ AArch64_UMLALv4i16_v4i32, ARM64_INS_UMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHRNvvi_8B, ARM64_INS_UQRSHRN,
+ AArch64_UMLALv4i32_indexed, ARM64_INS_UMLAL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQRSHRNvvi_8H, ARM64_INS_UQRSHRN2,
+ AArch64_UMLALv4i32_v2i64, ARM64_INS_UMLAL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLbbb, ARM64_INS_UQSHL,
+ AArch64_UMLALv8i16_indexed, ARM64_INS_UMLAL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLbbi, ARM64_INS_UQSHL,
+ AArch64_UMLALv8i16_v4i32, ARM64_INS_UMLAL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLddd, ARM64_INS_UQSHL,
+ AArch64_UMLALv8i8_v8i16, ARM64_INS_UMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLddi, ARM64_INS_UQSHL,
+ AArch64_UMLSLv16i8_v8i16, ARM64_INS_UMLSL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLhhh, ARM64_INS_UQSHL,
+ AArch64_UMLSLv2i32_indexed, ARM64_INS_UMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLhhi, ARM64_INS_UQSHL,
+ AArch64_UMLSLv2i32_v2i64, ARM64_INS_UMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLssi, ARM64_INS_UQSHL,
+ AArch64_UMLSLv4i16_indexed, ARM64_INS_UMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLsss, ARM64_INS_UQSHL,
+ AArch64_UMLSLv4i16_v4i32, ARM64_INS_UMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLvvi_16B, ARM64_INS_UQSHL,
+ AArch64_UMLSLv4i32_indexed, ARM64_INS_UMLSL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLvvi_2D, ARM64_INS_UQSHL,
+ AArch64_UMLSLv4i32_v2i64, ARM64_INS_UMLSL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLvvi_2S, ARM64_INS_UQSHL,
+ AArch64_UMLSLv8i16_indexed, ARM64_INS_UMLSL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLvvi_4H, ARM64_INS_UQSHL,
+ AArch64_UMLSLv8i16_v4i32, ARM64_INS_UMLSL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLvvi_4S, ARM64_INS_UQSHL,
+ AArch64_UMLSLv8i8_v8i16, ARM64_INS_UMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLvvi_8B, ARM64_INS_UQSHL,
+ AArch64_UMOVvi16, ARM64_INS_UMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLvvi_8H, ARM64_INS_UQSHL,
+ AArch64_UMOVvi32, ARM64_INS_UMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLvvv_16B, ARM64_INS_UQSHL,
+ AArch64_UMOVvi64, ARM64_INS_UMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLvvv_2D, ARM64_INS_UQSHL,
+ AArch64_UMOVvi8, ARM64_INS_UMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UQSHLvvv_2S, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLvvv_4H, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLvvv_4S, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLvvv_8B, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLvvv_8H, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNbhi, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNhsi, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNsdi, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNvvi_16B, ARM64_INS_UQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNvvi_2S, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNvvi_4H, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNvvi_4S, ARM64_INS_UQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNvvi_8B, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNvvi_8H, ARM64_INS_UQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBbbb, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBddd, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBhhh, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBsss, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBvvv_16B, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBvvv_2D, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBvvv_2S, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBvvv_4H, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBvvv_4S, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBvvv_8B, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBvvv_8H, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTN2d2s, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTN2d4s, ARM64_INS_UQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTN4s4h, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTN4s8h, ARM64_INS_UQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTN8h16b, ARM64_INS_UQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTN8h8b, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNbh, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNhs, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNsd, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URECPE2s, ARM64_INS_URECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URECPE4s, ARM64_INS_URECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDvvv_16B, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDvvv_2S, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDvvv_4H, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDvvv_4S, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDvvv_8B, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDvvv_8H, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLddd, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLvvv_16B, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLvvv_2D, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLvvv_2S, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLvvv_4H, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLvvv_4S, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLvvv_8B, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLvvv_8H, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRddi, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRvvi_16B, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRvvi_2D, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRvvi_2S, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRvvi_4H, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRvvi_4S, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRvvi_8B, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRvvi_8H, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSQRTE2s, ARM64_INS_URSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSQRTE4s, ARM64_INS_URSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRA, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAvvi_16B, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAvvi_2D, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAvvi_2S, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAvvi_4H, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAvvi_4S, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAvvi_8B, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAvvi_8H, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLvvi_16B, ARM64_INS_USHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLvvi_2S, ARM64_INS_USHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLvvi_4H, ARM64_INS_USHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLvvi_4S, ARM64_INS_USHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLvvi_8B, ARM64_INS_USHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLvvi_8H, ARM64_INS_USHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLddd, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLvvv_16B, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLvvv_2D, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLvvv_2S, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLvvv_4H, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLvvv_4S, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLvvv_8B, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLvvv_8H, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRddi, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRvvi_16B, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRvvi_2D, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRvvi_2S, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRvvi_4H, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRvvi_4S, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRvvi_8B, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRvvi_8H, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADD16b, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADD2d, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADD2s, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADD4h, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADD4s, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADD8b, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADD8h, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDbb, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDdd, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDhh, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDss, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRA, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAvvi_16B, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAvvi_2D, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAvvi_2S, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAvvi_4H, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAvvi_4S, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAvvi_8B, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAvvi_8H, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBL2vvv_2d4s, ARM64_INS_USUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBL2vvv_4s8h, ARM64_INS_USUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBL2vvv_8h16b, ARM64_INS_USUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBLvvv_2d2s, ARM64_INS_USUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBLvvv_4s4h, ARM64_INS_USUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBLvvv_8h8b, ARM64_INS_USUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBW2vvv_2d4s, ARM64_INS_USUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBW2vvv_4s8h, ARM64_INS_USUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBW2vvv_8h16b, ARM64_INS_USUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBWvvv_2d2s, ARM64_INS_USUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBWvvv_4s4h, ARM64_INS_USUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBWvvv_8h8b, ARM64_INS_USUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UXTBww, ARM64_INS_UXTB,
+ AArch64_UMSUBLrrr, ARM64_INS_UMSUBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_UXTBxw, ARM64_INS_UXTB,
+ AArch64_UMULHrr, ARM64_INS_UMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
- AArch64_UXTHww, ARM64_INS_UXTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UXTHxw, ARM64_INS_UXTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP1vvv_16b, ARM64_INS_UZP1,
+ AArch64_UMULLv16i8_v8i16, ARM64_INS_UMULL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP1vvv_2d, ARM64_INS_UZP1,
+ AArch64_UMULLv2i32_indexed, ARM64_INS_UMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP1vvv_2s, ARM64_INS_UZP1,
+ AArch64_UMULLv2i32_v2i64, ARM64_INS_UMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP1vvv_4h, ARM64_INS_UZP1,
+ AArch64_UMULLv4i16_indexed, ARM64_INS_UMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP1vvv_4s, ARM64_INS_UZP1,
+ AArch64_UMULLv4i16_v4i32, ARM64_INS_UMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP1vvv_8b, ARM64_INS_UZP1,
+ AArch64_UMULLv4i32_indexed, ARM64_INS_UMULL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP1vvv_8h, ARM64_INS_UZP1,
+ AArch64_UMULLv4i32_v2i64, ARM64_INS_UMULL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP2vvv_16b, ARM64_INS_UZP2,
+ AArch64_UMULLv8i16_indexed, ARM64_INS_UMULL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP2vvv_2d, ARM64_INS_UZP2,
+ AArch64_UMULLv8i16_v4i32, ARM64_INS_UMULL2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP2vvv_2s, ARM64_INS_UZP2,
+ AArch64_UMULLv8i8_v8i16, ARM64_INS_UMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP2vvv_4h, ARM64_INS_UZP2,
+ AArch64_UQADDv16i8, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP2vvv_4s, ARM64_INS_UZP2,
+ AArch64_UQADDv1i16, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP2vvv_8b, ARM64_INS_UZP2,
+ AArch64_UQADDv1i32, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_UZP2vvv_8h, ARM64_INS_UZP2,
+ AArch64_UQADDv1i64, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTf2xs_2D, ARM64_INS_FCVTZS,
+ AArch64_UQADDv1i8, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTf2xs_2S, ARM64_INS_FCVTZS,
+ AArch64_UQADDv2i32, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTf2xs_4S, ARM64_INS_FCVTZS,
+ AArch64_UQADDv2i64, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTf2xu_2D, ARM64_INS_FCVTZU,
+ AArch64_UQADDv4i16, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTf2xu_2S, ARM64_INS_FCVTZU,
+ AArch64_UQADDv4i32, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTf2xu_4S, ARM64_INS_FCVTZU,
+ AArch64_UQADDv8i16, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTxs2f_2D, ARM64_INS_SCVTF,
+ AArch64_UQADDv8i8, ARM64_INS_UQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTxs2f_2S, ARM64_INS_SCVTF,
+ AArch64_UQRSHLv16i8, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTxs2f_4S, ARM64_INS_SCVTF,
+ AArch64_UQRSHLv1i16, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTxu2f_2D, ARM64_INS_UCVTF,
+ AArch64_UQRSHLv1i32, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTxu2f_2S, ARM64_INS_UCVTF,
+ AArch64_UQRSHLv1i64, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_VCVTxu2f_4S, ARM64_INS_UCVTF,
+ AArch64_UQRSHLv1i8, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_XTN2d2s, ARM64_INS_XTN,
+ AArch64_UQRSHLv2i32, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_XTN2d4s, ARM64_INS_XTN2,
+ AArch64_UQRSHLv2i64, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_XTN4s4h, ARM64_INS_XTN,
+ AArch64_UQRSHLv4i16, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_XTN4s8h, ARM64_INS_XTN2,
+ AArch64_UQRSHLv4i32, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_XTN8h16b, ARM64_INS_XTN2,
+ AArch64_UQRSHLv8i16, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_XTN8h8b, ARM64_INS_XTN,
+ AArch64_UQRSHLv8i8, ARM64_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP1vvv_16b, ARM64_INS_ZIP1,
+ AArch64_UQRSHRNb, ARM64_INS_UQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP1vvv_2d, ARM64_INS_ZIP1,
+ AArch64_UQRSHRNh, ARM64_INS_UQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP1vvv_2s, ARM64_INS_ZIP1,
+ AArch64_UQRSHRNs, ARM64_INS_UQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP1vvv_4h, ARM64_INS_ZIP1,
+ AArch64_UQRSHRNv16i8_shift, ARM64_INS_UQRSHRN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP1vvv_4s, ARM64_INS_ZIP1,
+ AArch64_UQRSHRNv2i32_shift, ARM64_INS_UQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP1vvv_8b, ARM64_INS_ZIP1,
+ AArch64_UQRSHRNv4i16_shift, ARM64_INS_UQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP1vvv_8h, ARM64_INS_ZIP1,
+ AArch64_UQRSHRNv4i32_shift, ARM64_INS_UQRSHRN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP2vvv_16b, ARM64_INS_ZIP2,
+ AArch64_UQRSHRNv8i16_shift, ARM64_INS_UQRSHRN2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP2vvv_2d, ARM64_INS_ZIP2,
+ AArch64_UQRSHRNv8i8_shift, ARM64_INS_UQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP2vvv_2s, ARM64_INS_ZIP2,
+ AArch64_UQSHLb, ARM64_INS_UQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP2vvv_4h, ARM64_INS_ZIP2,
+ AArch64_UQSHLd, ARM64_INS_UQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP2vvv_4s, ARM64_INS_ZIP2,
+ AArch64_UQSHLh, ARM64_INS_UQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP2vvv_8b, ARM64_INS_ZIP2,
+ AArch64_UQSHLs, ARM64_INS_UQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
},
{
- AArch64_ZIP2vvv_8h, ARM64_INS_ZIP2,
+ AArch64_UQSHLv16i8, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv16i8_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv1i16, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv1i32, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv1i64, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv1i8, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv2i32, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv2i32_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv2i64, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv2i64_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv4i16, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv4i16_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv4i32, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv4i32_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv8i16, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv8i16_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv8i8, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHLv8i8_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHRNb, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHRNh, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHRNs, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHRNv16i8_shift, ARM64_INS_UQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHRNv2i32_shift, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHRNv4i16_shift, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHRNv4i32_shift, ARM64_INS_UQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHRNv8i16_shift, ARM64_INS_UQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSHRNv8i8_shift, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv16i8, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv1i16, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv1i32, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv1i64, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv1i8, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv2i32, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv2i64, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv4i16, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv4i32, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv8i16, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQSUBv8i8, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQXTNv16i8, ARM64_INS_UQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQXTNv1i16, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQXTNv1i32, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQXTNv1i8, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQXTNv2i32, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQXTNv4i16, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQXTNv4i32, ARM64_INS_UQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQXTNv8i16, ARM64_INS_UQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UQXTNv8i8, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URECPEv2i32, ARM64_INS_URECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URECPEv4i32, ARM64_INS_URECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URHADDv16i8, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URHADDv2i32, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URHADDv4i16, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URHADDv4i32, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URHADDv8i16, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URHADDv8i8, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHLv16i8, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHLv1i64, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHLv2i32, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHLv2i64, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHLv4i16, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHLv4i32, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHLv8i16, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHLv8i8, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHRd, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHRv16i8_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHRv2i32_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHRv2i64_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHRv4i16_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHRv4i32_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHRv8i16_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSHRv8i8_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSQRTEv2i32, ARM64_INS_URSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSQRTEv4i32, ARM64_INS_URSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSRAd, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSRAv16i8_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSRAv2i32_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSRAv2i64_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSRAv4i16_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSRAv4i32_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSRAv8i16_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_URSRAv8i8_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLLv16i8_shift, ARM64_INS_USHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLLv2i32_shift, ARM64_INS_USHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLLv4i16_shift, ARM64_INS_USHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLLv4i32_shift, ARM64_INS_USHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLLv8i16_shift, ARM64_INS_USHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLLv8i8_shift, ARM64_INS_USHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLv16i8, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLv1i64, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLv2i32, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLv2i64, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLv4i16, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLv4i32, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLv8i16, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHLv8i8, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHRd, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHRv16i8_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHRv2i32_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHRv2i64_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHRv4i16_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHRv4i32_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHRv8i16_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USHRv8i8_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv16i8, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv1i16, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv1i32, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv1i64, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv1i8, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv2i32, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv2i64, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv4i16, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv4i32, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv8i16, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USQADDv8i8, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USRAd, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USRAv16i8_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USRAv2i32_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USRAv2i64_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USRAv4i16_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USRAv4i32_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USRAv8i16_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USRAv8i8_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBLv16i8_v8i16, ARM64_INS_USUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBLv2i32_v2i64, ARM64_INS_USUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBLv4i16_v4i32, ARM64_INS_USUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBLv4i32_v2i64, ARM64_INS_USUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBLv8i16_v4i32, ARM64_INS_USUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBLv8i8_v8i16, ARM64_INS_USUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBWv16i8_v8i16, ARM64_INS_USUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBWv2i32_v2i64, ARM64_INS_USUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBWv4i16_v4i32, ARM64_INS_USUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBWv4i32_v2i64, ARM64_INS_USUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBWv8i16_v4i32, ARM64_INS_USUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_USUBWv8i8_v8i16, ARM64_INS_USUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP1v16i8, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP1v2i32, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP1v2i64, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP1v4i16, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP1v4i32, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP1v8i16, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP1v8i8, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP2v16i8, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP2v2i32, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP2v2i64, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP2v4i16, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP2v4i32, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP2v8i16, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_UZP2v8i8, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_XTNv16i8, ARM64_INS_XTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_XTNv2i32, ARM64_INS_XTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_XTNv4i16, ARM64_INS_XTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_XTNv4i32, ARM64_INS_XTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_XTNv8i16, ARM64_INS_XTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_XTNv8i8, ARM64_INS_XTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP1v16i8, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP1v2i32, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP1v2i64, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP1v4i16, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP1v4i32, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP1v8i16, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP1v8i8, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP2v16i8, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP2v2i32, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP2v2i64, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP2v4i16, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP2v4i32, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP2v8i16, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+ },
+ {
+ AArch64_ZIP2v8i8, ARM64_INS_ZIP2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
#endif
@@ -16547,37 +14306,32 @@
static name_map insn_name_maps[] = {
{ ARM64_INS_INVALID, NULL },
- //=========
{ ARM64_INS_ABS, "abs" },
{ ARM64_INS_ADC, "adc" },
- { ARM64_INS_ADDHN2, "addhn2" },
{ ARM64_INS_ADDHN, "addhn" },
+ { ARM64_INS_ADDHN2, "addhn2" },
{ ARM64_INS_ADDP, "addp" },
- { ARM64_INS_ADDV, "addv" },
{ ARM64_INS_ADD, "add" },
- { ARM64_INS_CMN, "cmn" },
- { ARM64_INS_ADRP, "adrp" },
+ { ARM64_INS_ADDV, "addv" },
{ ARM64_INS_ADR, "adr" },
+ { ARM64_INS_ADRP, "adrp" },
{ ARM64_INS_AESD, "aesd" },
{ ARM64_INS_AESE, "aese" },
{ ARM64_INS_AESIMC, "aesimc" },
{ ARM64_INS_AESMC, "aesmc" },
{ ARM64_INS_AND, "and" },
{ ARM64_INS_ASR, "asr" },
- { ARM64_INS_AT, "at" },
- { ARM64_INS_BFI, "bfi" },
+ { ARM64_INS_B, "b" },
{ ARM64_INS_BFM, "bfm" },
- { ARM64_INS_BFXIL, "bfxil" },
{ ARM64_INS_BIC, "bic" },
{ ARM64_INS_BIF, "bif" },
{ ARM64_INS_BIT, "bit" },
- { ARM64_INS_BLR, "blr" },
{ ARM64_INS_BL, "bl" },
- { ARM64_INS_BRK, "brk" },
+ { ARM64_INS_BLR, "blr" },
{ ARM64_INS_BR, "br" },
+ { ARM64_INS_BRK, "brk" },
{ ARM64_INS_BSL, "bsl" },
- { ARM64_INS_B, "b" },
{ ARM64_INS_CBNZ, "cbnz" },
{ ARM64_INS_CBZ, "cbz" },
{ ARM64_INS_CCMN, "ccmn" },
@@ -16592,9 +14346,9 @@
{ ARM64_INS_CMHS, "cmhs" },
{ ARM64_INS_CMLE, "cmle" },
{ ARM64_INS_CMLT, "cmlt" },
- { ARM64_INS_CMP, "cmp" },
{ ARM64_INS_CMTST, "cmtst" },
{ ARM64_INS_CNT, "cnt" },
+ { ARM64_INS_MOV, "mov" },
{ ARM64_INS_CRC32B, "crc32b" },
{ ARM64_INS_CRC32CB, "crc32cb" },
{ ARM64_INS_CRC32CH, "crc32ch" },
@@ -16610,7 +14364,6 @@
{ ARM64_INS_DCPS1, "dcps1" },
{ ARM64_INS_DCPS2, "dcps2" },
{ ARM64_INS_DCPS3, "dcps3" },
- { ARM64_INS_DC, "dc" },
{ ARM64_INS_DMB, "dmb" },
{ ARM64_INS_DRPS, "drps" },
{ ARM64_INS_DSB, "dsb" },
@@ -16624,10 +14377,10 @@
{ ARM64_INS_FABS, "fabs" },
{ ARM64_INS_FACGE, "facge" },
{ ARM64_INS_FACGT, "facgt" },
- { ARM64_INS_FADDP, "faddp" },
{ ARM64_INS_FADD, "fadd" },
- { ARM64_INS_FCCMPE, "fccmpe" },
+ { ARM64_INS_FADDP, "faddp" },
{ ARM64_INS_FCCMP, "fccmp" },
+ { ARM64_INS_FCCMPE, "fccmpe" },
{ ARM64_INS_FCMEQ, "fcmeq" },
{ ARM64_INS_FCMGE, "fcmge" },
{ ARM64_INS_FCMGT, "fcmgt" },
@@ -16638,41 +14391,41 @@
{ ARM64_INS_FCSEL, "fcsel" },
{ ARM64_INS_FCVTAS, "fcvtas" },
{ ARM64_INS_FCVTAU, "fcvtau" },
+ { ARM64_INS_FCVT, "fcvt" },
{ ARM64_INS_FCVTL, "fcvtl" },
{ ARM64_INS_FCVTL2, "fcvtl2" },
{ ARM64_INS_FCVTMS, "fcvtms" },
{ ARM64_INS_FCVTMU, "fcvtmu" },
- { ARM64_INS_FCVTN, "fcvtn" },
- { ARM64_INS_FCVTN2, "fcvtn2" },
{ ARM64_INS_FCVTNS, "fcvtns" },
{ ARM64_INS_FCVTNU, "fcvtnu" },
+ { ARM64_INS_FCVTN, "fcvtn" },
+ { ARM64_INS_FCVTN2, "fcvtn2" },
{ ARM64_INS_FCVTPS, "fcvtps" },
{ ARM64_INS_FCVTPU, "fcvtpu" },
{ ARM64_INS_FCVTXN, "fcvtxn" },
{ ARM64_INS_FCVTXN2, "fcvtxn2" },
{ ARM64_INS_FCVTZS, "fcvtzs" },
{ ARM64_INS_FCVTZU, "fcvtzu" },
- { ARM64_INS_FCVT, "fcvt" },
{ ARM64_INS_FDIV, "fdiv" },
{ ARM64_INS_FMADD, "fmadd" },
+ { ARM64_INS_FMAX, "fmax" },
+ { ARM64_INS_FMAXNM, "fmaxnm" },
{ ARM64_INS_FMAXNMP, "fmaxnmp" },
{ ARM64_INS_FMAXNMV, "fmaxnmv" },
- { ARM64_INS_FMAXNM, "fmaxnm" },
{ ARM64_INS_FMAXP, "fmaxp" },
{ ARM64_INS_FMAXV, "fmaxv" },
- { ARM64_INS_FMAX, "fmax" },
+ { ARM64_INS_FMIN, "fmin" },
+ { ARM64_INS_FMINNM, "fminnm" },
{ ARM64_INS_FMINNMP, "fminnmp" },
{ ARM64_INS_FMINNMV, "fminnmv" },
- { ARM64_INS_FMINNM, "fminnm" },
{ ARM64_INS_FMINP, "fminp" },
{ ARM64_INS_FMINV, "fminv" },
- { ARM64_INS_FMIN, "fmin" },
{ ARM64_INS_FMLA, "fmla" },
{ ARM64_INS_FMLS, "fmls" },
{ ARM64_INS_FMOV, "fmov" },
{ ARM64_INS_FMSUB, "fmsub" },
- { ARM64_INS_FMULX, "fmulx" },
{ ARM64_INS_FMUL, "fmul" },
+ { ARM64_INS_FMULX, "fmulx" },
{ ARM64_INS_FNEG, "fneg" },
{ ARM64_INS_FNMADD, "fnmadd" },
{ ARM64_INS_FNMSUB, "fnmsub" },
@@ -16694,60 +14447,48 @@
{ ARM64_INS_HINT, "hint" },
{ ARM64_INS_HLT, "hlt" },
{ ARM64_INS_HVC, "hvc" },
- { ARM64_INS_IC, "ic" },
{ ARM64_INS_INS, "ins" },
{ ARM64_INS_ISB, "isb" },
{ ARM64_INS_LD1, "ld1" },
{ ARM64_INS_LD1R, "ld1r" },
- { ARM64_INS_LD2, "ld2" },
{ ARM64_INS_LD2R, "ld2r" },
- { ARM64_INS_LD3, "ld3" },
+ { ARM64_INS_LD2, "ld2" },
{ ARM64_INS_LD3R, "ld3r" },
+ { ARM64_INS_LD3, "ld3" },
{ ARM64_INS_LD4, "ld4" },
{ ARM64_INS_LD4R, "ld4r" },
{ ARM64_INS_LDARB, "ldarb" },
- { ARM64_INS_LDAR, "ldar" },
{ ARM64_INS_LDARH, "ldarh" },
+ { ARM64_INS_LDAR, "ldar" },
{ ARM64_INS_LDAXP, "ldaxp" },
{ ARM64_INS_LDAXRB, "ldaxrb" },
- { ARM64_INS_LDAXR, "ldaxr" },
{ ARM64_INS_LDAXRH, "ldaxrh" },
+ { ARM64_INS_LDAXR, "ldaxr" },
+ { ARM64_INS_LDNP, "ldnp" },
+ { ARM64_INS_LDP, "ldp" },
{ ARM64_INS_LDPSW, "ldpsw" },
- { ARM64_INS_LDRSB, "ldrsb" },
- { ARM64_INS_LDURSB, "ldursb" },
- { ARM64_INS_LDRSH, "ldrsh" },
- { ARM64_INS_LDURSH, "ldursh" },
- { ARM64_INS_LDRSW, "ldrsw" },
+ { ARM64_INS_LDRB, "ldrb" },
{ ARM64_INS_LDR, "ldr" },
+ { ARM64_INS_LDRH, "ldrh" },
+ { ARM64_INS_LDRSB, "ldrsb" },
+ { ARM64_INS_LDRSH, "ldrsh" },
+ { ARM64_INS_LDRSW, "ldrsw" },
+ { ARM64_INS_LDTRB, "ldtrb" },
+ { ARM64_INS_LDTRH, "ldtrh" },
{ ARM64_INS_LDTRSB, "ldtrsb" },
{ ARM64_INS_LDTRSH, "ldtrsh" },
{ ARM64_INS_LDTRSW, "ldtrsw" },
+ { ARM64_INS_LDTR, "ldtr" },
+ { ARM64_INS_LDURB, "ldurb" },
+ { ARM64_INS_LDUR, "ldur" },
+ { ARM64_INS_LDURH, "ldurh" },
+ { ARM64_INS_LDURSB, "ldursb" },
+ { ARM64_INS_LDURSH, "ldursh" },
{ ARM64_INS_LDURSW, "ldursw" },
{ ARM64_INS_LDXP, "ldxp" },
{ ARM64_INS_LDXRB, "ldxrb" },
- { ARM64_INS_LDXR, "ldxr" },
{ ARM64_INS_LDXRH, "ldxrh" },
- { ARM64_INS_LDRH, "ldrh" },
- { ARM64_INS_LDURH, "ldurh" },
- { ARM64_INS_STRH, "strh" },
- { ARM64_INS_STURH, "sturh" },
- { ARM64_INS_LDTRH, "ldtrh" },
- { ARM64_INS_STTRH, "sttrh" },
- { ARM64_INS_LDUR, "ldur" },
- { ARM64_INS_STR, "str" },
- { ARM64_INS_STUR, "stur" },
- { ARM64_INS_LDTR, "ldtr" },
- { ARM64_INS_STTR, "sttr" },
- { ARM64_INS_LDRB, "ldrb" },
- { ARM64_INS_LDURB, "ldurb" },
- { ARM64_INS_STRB, "strb" },
- { ARM64_INS_STURB, "sturb" },
- { ARM64_INS_LDTRB, "ldtrb" },
- { ARM64_INS_STTRB, "sttrb" },
- { ARM64_INS_LDP, "ldp" },
- { ARM64_INS_LDNP, "ldnp" },
- { ARM64_INS_STNP, "stnp" },
- { ARM64_INS_STP, "stp" },
+ { ARM64_INS_LDXR, "ldxr" },
{ ARM64_INS_LSL, "lsl" },
{ ARM64_INS_LSR, "lsr" },
{ ARM64_INS_MADD, "madd" },
@@ -16762,7 +14503,6 @@
{ ARM64_INS_MSUB, "msub" },
{ ARM64_INS_MUL, "mul" },
{ ARM64_INS_MVNI, "mvni" },
- { ARM64_INS_MVN, "mvn" },
{ ARM64_INS_NEG, "neg" },
{ ARM64_INS_NOT, "not" },
{ ARM64_INS_ORN, "orn" },
@@ -16772,12 +14512,8 @@
{ ARM64_INS_PMUL, "pmul" },
{ ARM64_INS_PRFM, "prfm" },
{ ARM64_INS_PRFUM, "prfum" },
- { ARM64_INS_SQRSHRUN2, "sqrshrun2" },
- { ARM64_INS_SQRSHRUN, "sqrshrun" },
- { ARM64_INS_SQSHRUN2, "sqshrun2" },
- { ARM64_INS_SQSHRUN, "sqshrun" },
- { ARM64_INS_RADDHN2, "raddhn2" },
{ ARM64_INS_RADDHN, "raddhn" },
+ { ARM64_INS_RADDHN2, "raddhn2" },
{ ARM64_INS_RBIT, "rbit" },
{ ARM64_INS_RET, "ret" },
{ ARM64_INS_REV16, "rev16" },
@@ -16787,8 +14523,8 @@
{ ARM64_INS_ROR, "ror" },
{ ARM64_INS_RSHRN2, "rshrn2" },
{ ARM64_INS_RSHRN, "rshrn" },
- { ARM64_INS_RSUBHN2, "rsubhn2" },
{ ARM64_INS_RSUBHN, "rsubhn" },
+ { ARM64_INS_RSUBHN2, "rsubhn2" },
{ ARM64_INS_SABAL2, "sabal2" },
{ ARM64_INS_SABAL, "sabal" },
{ ARM64_INS_SABA, "saba" },
@@ -16796,16 +14532,14 @@
{ ARM64_INS_SABDL, "sabdl" },
{ ARM64_INS_SABD, "sabd" },
{ ARM64_INS_SADALP, "sadalp" },
- { ARM64_INS_SADDL2, "saddl2" },
{ ARM64_INS_SADDLP, "saddlp" },
{ ARM64_INS_SADDLV, "saddlv" },
+ { ARM64_INS_SADDL2, "saddl2" },
{ ARM64_INS_SADDL, "saddl" },
{ ARM64_INS_SADDW2, "saddw2" },
{ ARM64_INS_SADDW, "saddw" },
{ ARM64_INS_SBC, "sbc" },
- { ARM64_INS_SBFIZ, "sbfiz" },
{ ARM64_INS_SBFM, "sbfm" },
- { ARM64_INS_SBFX, "sbfx" },
{ ARM64_INS_SCVTF, "scvtf" },
{ ARM64_INS_SDIV, "sdiv" },
{ ARM64_INS_SHA1C, "sha1c" },
@@ -16814,8 +14548,8 @@
{ ARM64_INS_SHA1P, "sha1p" },
{ ARM64_INS_SHA1SU0, "sha1su0" },
{ ARM64_INS_SHA1SU1, "sha1su1" },
- { ARM64_INS_SHA256H, "sha256h" },
{ ARM64_INS_SHA256H2, "sha256h2" },
+ { ARM64_INS_SHA256H, "sha256h" },
{ ARM64_INS_SHA256SU0, "sha256su0" },
{ ARM64_INS_SHA256SU1, "sha256su1" },
{ ARM64_INS_SHADD, "shadd" },
@@ -16845,27 +14579,31 @@
{ ARM64_INS_SMULL, "smull" },
{ ARM64_INS_SQABS, "sqabs" },
{ ARM64_INS_SQADD, "sqadd" },
- { ARM64_INS_SQDMLAL2, "sqdmlal2" },
{ ARM64_INS_SQDMLAL, "sqdmlal" },
- { ARM64_INS_SQDMLSL2, "sqdmlsl2" },
+ { ARM64_INS_SQDMLAL2, "sqdmlal2" },
{ ARM64_INS_SQDMLSL, "sqdmlsl" },
+ { ARM64_INS_SQDMLSL2, "sqdmlsl2" },
{ ARM64_INS_SQDMULH, "sqdmulh" },
- { ARM64_INS_SQDMULL2, "sqdmull2" },
{ ARM64_INS_SQDMULL, "sqdmull" },
+ { ARM64_INS_SQDMULL2, "sqdmull2" },
{ ARM64_INS_SQNEG, "sqneg" },
{ ARM64_INS_SQRDMULH, "sqrdmulh" },
{ ARM64_INS_SQRSHL, "sqrshl" },
{ ARM64_INS_SQRSHRN, "sqrshrn" },
{ ARM64_INS_SQRSHRN2, "sqrshrn2" },
+ { ARM64_INS_SQRSHRUN, "sqrshrun" },
+ { ARM64_INS_SQRSHRUN2, "sqrshrun2" },
{ ARM64_INS_SQSHLU, "sqshlu" },
{ ARM64_INS_SQSHL, "sqshl" },
{ ARM64_INS_SQSHRN, "sqshrn" },
{ ARM64_INS_SQSHRN2, "sqshrn2" },
+ { ARM64_INS_SQSHRUN, "sqshrun" },
+ { ARM64_INS_SQSHRUN2, "sqshrun2" },
{ ARM64_INS_SQSUB, "sqsub" },
- { ARM64_INS_SQXTN, "sqxtn" },
{ ARM64_INS_SQXTN2, "sqxtn2" },
- { ARM64_INS_SQXTUN, "sqxtun" },
+ { ARM64_INS_SQXTN, "sqxtn" },
{ ARM64_INS_SQXTUN2, "sqxtun2" },
+ { ARM64_INS_SQXTUN, "sqxtun" },
{ ARM64_INS_SRHADD, "srhadd" },
{ ARM64_INS_SRI, "sri" },
{ ARM64_INS_SRSHL, "srshl" },
@@ -16885,34 +14623,40 @@
{ ARM64_INS_ST3, "st3" },
{ ARM64_INS_ST4, "st4" },
{ ARM64_INS_STLRB, "stlrb" },
- { ARM64_INS_STLR, "stlr" },
{ ARM64_INS_STLRH, "stlrh" },
+ { ARM64_INS_STLR, "stlr" },
{ ARM64_INS_STLXP, "stlxp" },
{ ARM64_INS_STLXRB, "stlxrb" },
- { ARM64_INS_STLXR, "stlxr" },
{ ARM64_INS_STLXRH, "stlxrh" },
+ { ARM64_INS_STLXR, "stlxr" },
+ { ARM64_INS_STNP, "stnp" },
+ { ARM64_INS_STP, "stp" },
+ { ARM64_INS_STRB, "strb" },
+ { ARM64_INS_STR, "str" },
+ { ARM64_INS_STRH, "strh" },
+ { ARM64_INS_STTRB, "sttrb" },
+ { ARM64_INS_STTRH, "sttrh" },
+ { ARM64_INS_STTR, "sttr" },
+ { ARM64_INS_STURB, "sturb" },
+ { ARM64_INS_STUR, "stur" },
+ { ARM64_INS_STURH, "sturh" },
{ ARM64_INS_STXP, "stxp" },
{ ARM64_INS_STXRB, "stxrb" },
- { ARM64_INS_STXR, "stxr" },
{ ARM64_INS_STXRH, "stxrh" },
- { ARM64_INS_SUBHN2, "subhn2" },
+ { ARM64_INS_STXR, "stxr" },
{ ARM64_INS_SUBHN, "subhn" },
+ { ARM64_INS_SUBHN2, "subhn2" },
{ ARM64_INS_SUB, "sub" },
{ ARM64_INS_SUQADD, "suqadd" },
{ ARM64_INS_SVC, "svc" },
- { ARM64_INS_SXTB, "sxtb" },
- { ARM64_INS_SXTH, "sxth" },
- { ARM64_INS_SXTW, "sxtw" },
{ ARM64_INS_SYSL, "sysl" },
{ ARM64_INS_SYS, "sys" },
{ ARM64_INS_TBL, "tbl" },
{ ARM64_INS_TBNZ, "tbnz" },
{ ARM64_INS_TBX, "tbx" },
{ ARM64_INS_TBZ, "tbz" },
- { ARM64_INS_TLBI, "tlbi" },
{ ARM64_INS_TRN1, "trn1" },
{ ARM64_INS_TRN2, "trn2" },
- { ARM64_INS_TST, "tst" },
{ ARM64_INS_UABAL2, "uabal2" },
{ ARM64_INS_UABAL, "uabal" },
{ ARM64_INS_UABA, "uaba" },
@@ -16920,15 +14664,13 @@
{ ARM64_INS_UABDL, "uabdl" },
{ ARM64_INS_UABD, "uabd" },
{ ARM64_INS_UADALP, "uadalp" },
- { ARM64_INS_UADDL2, "uaddl2" },
{ ARM64_INS_UADDLP, "uaddlp" },
{ ARM64_INS_UADDLV, "uaddlv" },
+ { ARM64_INS_UADDL2, "uaddl2" },
{ ARM64_INS_UADDL, "uaddl" },
{ ARM64_INS_UADDW2, "uaddw2" },
{ ARM64_INS_UADDW, "uaddw" },
- { ARM64_INS_UBFIZ, "ubfiz" },
{ ARM64_INS_UBFM, "ubfm" },
- { ARM64_INS_UBFX, "ubfx" },
{ ARM64_INS_UCVTF, "ucvtf" },
{ ARM64_INS_UDIV, "udiv" },
{ ARM64_INS_UHADD, "uhadd" },
@@ -16957,8 +14699,8 @@
{ ARM64_INS_UQSHRN, "uqshrn" },
{ ARM64_INS_UQSHRN2, "uqshrn2" },
{ ARM64_INS_UQSUB, "uqsub" },
- { ARM64_INS_UQXTN, "uqxtn" },
{ ARM64_INS_UQXTN2, "uqxtn2" },
+ { ARM64_INS_UQXTN, "uqxtn" },
{ ARM64_INS_URECPE, "urecpe" },
{ ARM64_INS_URHADD, "urhadd" },
{ ARM64_INS_URSHL, "urshl" },
@@ -16975,12 +14717,10 @@
{ ARM64_INS_USUBL, "usubl" },
{ ARM64_INS_USUBW2, "usubw2" },
{ ARM64_INS_USUBW, "usubw" },
- { ARM64_INS_UXTB, "uxtb" },
- { ARM64_INS_UXTH, "uxth" },
{ ARM64_INS_UZP1, "uzp1" },
{ ARM64_INS_UZP2, "uzp2" },
- { ARM64_INS_XTN, "xtn" },
{ ARM64_INS_XTN2, "xtn2" },
+ { ARM64_INS_XTN, "xtn" },
{ ARM64_INS_ZIP1, "zip1" },
{ ARM64_INS_ZIP2, "zip2" },
};
@@ -16998,7 +14738,6 @@
{ ARM64_INS_MNEG, "mneg" },
{ ARM64_INS_UMNEGL, "umnegl" },
{ ARM64_INS_SMNEGL, "smnegl" },
- { ARM64_INS_MOV, "mov" },
{ ARM64_INS_NOP, "nop" },
{ ARM64_INS_YIELD, "yield" },
{ ARM64_INS_WFE, "wfe" },
@@ -17008,6 +14747,33 @@
{ ARM64_INS_NGC, "ngc" },
{ ARM64_INS_NGCS, "ngcs" },
{ ARM64_INS_NEGS, "negs" },
+
+ { ARM64_INS_SBFIZ, "sbfiz" },
+ { ARM64_INS_UBFIZ, "ubfiz" },
+ { ARM64_INS_SBFX, "sbfx" },
+ { ARM64_INS_UBFX, "ubfx" },
+ { ARM64_INS_BFI, "bfi" },
+ { ARM64_INS_BFXIL, "bfxil" },
+ { ARM64_INS_CMN, "cmn" },
+ { ARM64_INS_MVN, "mvn" },
+ { ARM64_INS_TST, "tst" },
+ { ARM64_INS_CSET, "cset" },
+ { ARM64_INS_CINC, "cinc" },
+ { ARM64_INS_CSETM, "csetm" },
+ { ARM64_INS_CINV, "cinv" },
+ { ARM64_INS_CNEG, "cneg" },
+ { ARM64_INS_SXTB, "sxtb" },
+ { ARM64_INS_SXTH, "sxth" },
+ { ARM64_INS_SXTW, "sxtw" },
+ { ARM64_INS_CMP, "cmp" },
+ { ARM64_INS_UXTB, "uxtb" },
+ { ARM64_INS_UXTH, "uxth" },
+ { ARM64_INS_UXTW, "uxtw" },
+
+ { ARM64_INS_IC, "ic" },
+ { ARM64_INS_DC, "dc" },
+ { ARM64_INS_AT, "at" },
+ { ARM64_INS_TLBI, "tlbi" },
};
const char *AArch64_insn_name(csh handle, unsigned int id)
@@ -17040,6 +14806,7 @@
{ ARM64_GRP_CRYPTO, "crypto" },
{ ARM64_GRP_FPARMV8, "fparmv8" },
{ ARM64_GRP_NEON, "neon" },
+ { ARM64_GRP_CRC, "crc" },
{ ARM64_GRP_JUMP, "jump" },
};
@@ -17070,4 +14837,131 @@
return (i != -1)? i : ARM64_REG_INVALID;
}
+// map internal raw vregister to 'public' register
+arm64_reg AArch64_map_vregister(unsigned int r)
+{
+ // for some reasons different Arm64 can map different register number to
+ // the same register. this function handles the issue for exposing Mips
+ // operands by mapping internal registers to 'public' register.
+ unsigned int map[] = { 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, ARM64_REG_V0,
+ ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5,
+ ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10,
+ ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15,
+ ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20,
+ ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25,
+ ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30,
+ ARM64_REG_V31, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, ARM64_REG_V0, ARM64_REG_V1,
+ ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6,
+ ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11,
+ ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16,
+ ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21,
+ ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26,
+ ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+ 0, 0, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2,
+ ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7,
+ ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12,
+ ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17,
+ ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22,
+ ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27,
+ ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0,
+ ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5,
+ ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10,
+ ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15,
+ ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20,
+ ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25,
+ ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30,
+ ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3,
+ ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8,
+ ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13,
+ ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18,
+ ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23,
+ ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28,
+ ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1,
+ ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6,
+ ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11,
+ ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16,
+ ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21,
+ ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26,
+ ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31,
+ ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4,
+ ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9,
+ ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14,
+ ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19,
+ ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24,
+ ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29,
+ ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2,
+ ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7,
+ ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12,
+ ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17,
+ ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22,
+ ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27,
+ ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, };
+
+ if (r < ARR_SIZE(map))
+ return map[r];
+
+ // cannot find this register
+ return 0;
+}
+
+void arm64_op_addVectorArrSpecifier(MCInst * MI, int sp)
+{
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].vas = sp;
+ }
+}
+
+void arm64_op_addVectorElementSizeSpecifier(MCInst * MI, int sp)
+{
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].vess = sp;
+ }
+}
+
+void arm64_op_addFP(MCInst *MI, float fp)
+{
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_FP;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].fp = fp;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+}
+
+void arm64_op_addImm(MCInst *MI, int64_t imm)
+{
+ if (MI->csh->detail) {
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm;
+ MI->flat_insn->detail->arm64.op_count++;
+ }
+}
+
#endif
diff --git a/arch/AArch64/AArch64Mapping.h b/arch/AArch64/AArch64Mapping.h
index 1aaf31f..69edef9 100644
--- a/arch/AArch64/AArch64Mapping.h
+++ b/arch/AArch64/AArch64Mapping.h
@@ -19,4 +19,17 @@
// map instruction name to public instruction ID
arm64_reg AArch64_map_insn(const char *name);
+// map internal vregister to public register
+arm64_reg AArch64_map_vregister(unsigned int r);
+
+void arm64_op_addReg(MCInst *MI, int reg);
+
+void arm64_op_addVectorArrSpecifier(MCInst * MI, int sp);
+
+void arm64_op_addVectorElementSizeSpecifier(MCInst * MI, int sp);
+
+void arm64_op_addFP(MCInst *MI, float fp);
+
+void arm64_op_addImm(MCInst *MI, int64_t imm);
+
#endif
diff --git a/arch/Mips/MipsMapping.c b/arch/Mips/MipsMapping.c
index 2138d9c..1c18353 100644
--- a/arch/Mips/MipsMapping.c
+++ b/arch/Mips/MipsMapping.c
@@ -9723,6 +9723,7 @@
#endif
}
+// map instruction name to public instruction ID
mips_reg Mips_map_insn(const char *name)
{
// handle special alias first