x86: support SSE_CC & AVX_CC in cs_x86 struct. this also updates Python & Java bindings
diff --git a/bindings/java/TestX86.java b/bindings/java/TestX86.java
index 087287a..caeade2 100644
--- a/bindings/java/TestX86.java
+++ b/bindings/java/TestX86.java
@@ -67,6 +67,12 @@
ins.regName(operands.sibIndex), operands.sibScale, ins.regName(operands.sibBase));
}
+ if (operands.sseCC != 0)
+ System.out.printf("\tsse_cc: %u\n", operands.sseCC);
+
+ if (operands.avxCC != 0)
+ System.out.printf("\tavx_cc: %u\n", operands.avxCC);
+
int count = ins.opCount(X86_OP_IMM);
if (count > 0) {
System.out.printf("\timm_count: %d\n", count);