change API cs_disasm_dyn(): break cs_insn into 2 structures, and put all details into new structure cs_detail. this break API compatibility
diff --git a/arch/AArch64/AArch64InstPrinter.c b/arch/AArch64/AArch64InstPrinter.c
index cb63f3f..11baf01 100644
--- a/arch/AArch64/AArch64InstPrinter.c
+++ b/arch/AArch64/AArch64InstPrinter.c
@@ -41,13 +41,13 @@
 	doing_mem = status;
 
 	if (doing_mem) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_MEM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].mem.base = ARM64_REG_INVALID;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].mem.index = ARM64_REG_INVALID;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].mem.disp = 0;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_MEM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].mem.base = ARM64_REG_INVALID;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].mem.index = ARM64_REG_INVALID;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].mem.disp = 0;
 	} else {
 		// done, create the next operand slot
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -71,9 +71,9 @@
 		SStream_concat(O, "#%u", Imm);
 
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = Imm;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = Imm;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -91,7 +91,7 @@
 			if (RmSize == 32) {
 				Ext = "uxtw";
 				if (MI->detail)
-					MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].ext = ARM64_EXT_UXTW;
+					MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].ext = ARM64_EXT_UXTW;
 			} else {
 				Ext = "lsl";
 			}
@@ -100,11 +100,11 @@
 			if (RmSize == 32) {
 				Ext = "sxtw";
 				if (MI->detail)
-					MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].ext = ARM64_EXT_SXTW;
+					MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].ext = ARM64_EXT_SXTW;
 			} else {
 				Ext = "sxtx";
 				if (MI->detail)
-					MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].ext = ARM64_EXT_SXTX;
+					MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].ext = ARM64_EXT_SXTX;
 			}
 			break;
 		default:
@@ -120,11 +120,11 @@
 			SStream_concat(O, " #%u", ShiftAmt);
 			if (MI->detail) {
 				if (doing_mem) {
-					MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].shift.type = ARM64_SFT_LSL;
-					MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].shift.value = ShiftAmt;
+					MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].shift.type = ARM64_SFT_LSL;
+					MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].shift.value = ShiftAmt;
 				} else {
-					MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
-					MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.value = ShiftAmt;
+					MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
+					MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.value = ShiftAmt;
 				}
 			}
 	} else if (IsLSL) {
@@ -144,9 +144,9 @@
 		else
 			SStream_concat(O, "#%u"PRIu64, Imm12);
 		if (MI->detail) {
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = Imm12;
-			MI->pub_insn.arm64.op_count++;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = Imm12;
+			MI->flat_insn.arm64.op_count++;
 		}
 	}
 }
@@ -157,8 +157,8 @@
 
 	SStream_concat(O, ", lsl #12");
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.value = 12;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.value = 12;
 	}
 }
 
@@ -171,9 +171,9 @@
 	else
 		SStream_concat(O, "%"PRIu64, imm);
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = imm;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = imm;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -188,9 +188,9 @@
 	else
 		SStream_concat(O, "#%u", LSB);
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = LSB;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = LSB;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -221,9 +221,9 @@
 		SStream_concat(O, "#%u", (ImmS - ImmR + 1));
 
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = ImmS - ImmR + 1;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = ImmS - ImmR + 1;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -233,9 +233,9 @@
 	SStream_concat(O, "c%"PRIu64, MCOperand_getImm(CRx));
 
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_CIMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = MCOperand_getImm(CRx);
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_CIMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = MCOperand_getImm(CRx);
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -248,9 +248,9 @@
 	else
 		SStream_concat(O, "#%u", 64 - MCOperand_getImm(ScaleOp));
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = 64 - MCOperand_getImm(ScaleOp);
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = 64 - MCOperand_getImm(ScaleOp);
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -282,9 +282,9 @@
 	//o << '#' << format("%.8f", Val);
 	SStream_concat(O, "#%.8f", Val);
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_FP;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].fp = Val;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_FP;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].fp = Val;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -292,9 +292,9 @@
 {
 	SStream_concat(O, "#0.0");
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_FP;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].fp = 0;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_FP;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].fp = 0;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -303,7 +303,7 @@
 	MCOperand *MO = MCInst_getOperand(MI, OpNum);
 	SStream_concat(O, A64CondCodeToString((A64CC_CondCodes)(MCOperand_getImm(MO))));
 	if (MI->detail)
-		MI->pub_insn.arm64.cc = MCOperand_getImm(MO) + 1;
+		MI->flat_insn.arm64.cc = MCOperand_getImm(MO) + 1;
 }
 
 static void printLabelOperand(MCInst *MI, unsigned OpNum,
@@ -327,9 +327,9 @@
 	SImm += MI->address;
 
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = SImm;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = SImm;
+		MI->flat_insn.arm64.op_count++;
 	}
 
 	if (SImm > HEX_THRESHOLD)
@@ -349,9 +349,9 @@
 	else
 		SStream_concat(O, "#%"PRIu64, Val);
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = Val;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = Val;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -370,11 +370,11 @@
 
 		if (MI->detail) {
 			if (doing_mem) {
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].mem.disp = Imm;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].mem.disp = Imm;
 			} else {
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = Imm;
-				MI->pub_insn.arm64.op_count++;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = Imm;
+				MI->flat_insn.arm64.op_count++;
 			}
 		}
 	}
@@ -403,8 +403,8 @@
 	else
 		SStream_concat(O, " #%u", imm);
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.type = Shift + 1;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.value = imm;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.type = Shift + 1;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.value = imm;
 	}
 }
 
@@ -420,9 +420,9 @@
 		else
 			SStream_concat(O, "#%"PRIu64, imm);
 		if (MI->detail) {
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = imm;
-			MI->pub_insn.arm64.op_count++;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = imm;
+			MI->flat_insn.arm64.op_count++;
 		}
 
 		if (MCOperand_getImm(ShiftMO) != 0) {
@@ -432,8 +432,8 @@
 			else
 				SStream_concat(O, ", lsl #%u", shift);
 			if (MI->detail) {
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.value = shift;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.value = shift;
 			}
 		}
 
@@ -457,9 +457,9 @@
 		else
 			SStream_concat(O, "#%"PRIu64, imm);
 		if (MI->detail) {
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = imm;
-			MI->pub_insn.arm64.op_count++;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = imm;
+			MI->flat_insn.arm64.op_count++;
 		}
 	}
 }
@@ -509,9 +509,9 @@
 			else
 				SStream_concat(O, "lsl #%u", shift);
 			if (MI->detail) {
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.value = shift;
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].ext = Ext - 4;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.value = shift;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].ext = Ext - 4;
 			}
 			return;
 		}
@@ -530,7 +530,7 @@
 	}
 
 	if (MI->detail)
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].ext = Ext - 4;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].ext = Ext - 4;
 	MCOperand *MO = MCInst_getOperand(MI, OpNum);
 	if (MCOperand_getImm(MO) != 0) {
 		unsigned int shift = MCOperand_getImm(MO);
@@ -539,8 +539,8 @@
 		else
 			SStream_concat(O, " #%u", shift);
 		if (MI->detail) {
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.value = shift;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.value = shift;
 		}
 	}
 }
@@ -557,11 +557,11 @@
 		SStream_concat(O, "#%u", Imm * MemScale);
 	if (MI->detail) {
 		if (doing_mem) {
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].mem.disp = Imm * MemScale;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].mem.disp = Imm * MemScale;
 		} else {
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = Imm * MemScale;
-			MI->pub_insn.arm64.op_count++;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = Imm * MemScale;
+			MI->flat_insn.arm64.op_count++;
 		}
 	}
 }
@@ -575,9 +575,9 @@
 	SStream_concat(O, "%s", Name);
 	free(Name);
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_REG;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].reg = Reg;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_REG;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].reg = Reg;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -589,15 +589,15 @@
 		SStream_concat(O, getRegisterName(Reg));
 		if (MI->detail) {
 			if (doing_mem) {
-				if (MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].mem.base == ARM64_REG_INVALID) {
-					MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].mem.base = Reg;
+				if (MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].mem.base == ARM64_REG_INVALID) {
+					MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].mem.base = Reg;
 				} else {
-					MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].mem.index = Reg;
+					MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].mem.index = Reg;
 				}
 			} else {
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_REG;
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].reg = Reg;
-				MI->pub_insn.arm64.op_count++;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_REG;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].reg = Reg;
+				MI->flat_insn.arm64.op_count++;
 			}
 		}
 	} else if (MCOperand_isImm(Op)) {
@@ -608,11 +608,11 @@
 			SStream_concat(O, "#%"PRIu64, imm);
 		if (MI->detail) {
 			if (doing_mem) {
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].mem.disp = imm;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].mem.disp = imm;
 			} else {
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-				MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = imm;
-				MI->pub_insn.arm64.op_count++;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+				MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = imm;
+				MI->flat_insn.arm64.op_count++;
 			}
 		}
 	}
@@ -660,11 +660,11 @@
 			return;
 		SStream_concat(O, ", lsl");
 		if (MI->detail)
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.type = ARM64_SFT_LSL;
 	} else {
 		SStream_concat(O, ", msl");
 		if (MI->detail)
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.type = ARM64_SFT_MSL;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.type = ARM64_SFT_MSL;
 	}
 
 	if (Imm > HEX_THRESHOLD)
@@ -672,7 +672,7 @@
 	else
 		SStream_concat(O, " #%"PRIu64, Imm);
 	if (MI->detail)
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count - 1].shift.value = Imm;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count - 1].shift.value = Imm;
 }
 
 static void printNeonUImm0Operand(MCInst *MI, unsigned OpNum, SStream *O)
@@ -680,9 +680,9 @@
 	SStream_concat(O, "#0");
 	// FIXME: vector ZERO
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = 0;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = 0;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -700,9 +700,9 @@
 	else
 		SStream_concat(O, "#%u", Imm);
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = Imm;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = Imm;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -721,7 +721,7 @@
 
 	if (MI->detail) {
 		if (doing_mem) {
-			MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].mem.disp = Imm;
+			MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].mem.disp = Imm;
 		} else {
 			// FIXME: never has false branch??
 		}
@@ -750,9 +750,9 @@
 	else
 		SStream_concat(O, "#%"PRIu64, Mask);
 	if (MI->detail) {
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].type = ARM64_OP_IMM;
-		MI->pub_insn.arm64.operands[MI->pub_insn.arm64.op_count].imm = Mask;
-		MI->pub_insn.arm64.op_count++;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].type = ARM64_OP_IMM;
+		MI->flat_insn.arm64.operands[MI->flat_insn.arm64.op_count].imm = Mask;
+		MI->flat_insn.arm64.op_count++;
 	}
 }
 
@@ -802,11 +802,11 @@
 #define PRINT_ALIAS_INSTR
 #include "AArch64GenAsmWriter.inc"
 
-void AArch64_post_printer(csh handle, cs_insn *pub_insn, char *insn_asm)
+void AArch64_post_printer(csh handle, cs_insn *flat_insn, char *insn_asm)
 {
 	// check if this insn requests write-back
 	if (strrchr(insn_asm, '!') != NULL)
-		pub_insn->arm64.writeback = true;
+		flat_insn->detail->arm64.writeback = true;
 }
 
 void AArch64_printInst(MCInst *MI, SStream *O, void *Info)
diff --git a/arch/AArch64/mapping.c b/arch/AArch64/mapping.c
index d4eb255..cf8c8f0 100644
--- a/arch/AArch64/mapping.c
+++ b/arch/AArch64/mapping.c
@@ -6,6 +6,7 @@
 
 #include "../../include/arm64.h"
 #include "../../utils.h"
+#include "../../cs_priv.h"
 
 #include "mapping.h"
 
@@ -2996,23 +2997,23 @@
 		insn->id = insns[i].mapid;
 
 		if (detail) {
-			memcpy(insn->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
-			insn->regs_read_count = count_positive(insns[i].regs_use);
+			cs_struct handle;
+			handle.detail = detail;
+			memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
+			insn->detail->regs_read_count = count_positive(insns[i].regs_use);
 
-			memcpy(insn->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
-			insn->regs_write_count = count_positive(insns[i].regs_mod);
+			memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
+			insn->detail->regs_write_count = count_positive(insns[i].regs_mod);
 
-			memcpy(insn->groups, insns[i].groups, sizeof(insns[i].groups));
-			insn->groups_count = count_positive(insns[i].groups);
+			memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups));
+			insn->detail->groups_count = count_positive(insns[i].groups);
 
-			// call cs_reg_write() with handle = 1 to bypass handle check
-			// we only need to find if this insn modifies ARM64_REG_NZCV
-			insn->arm64.update_flags = cs_reg_write(1, insn, ARM64_REG_NZCV);
+			insn->detail->arm64.update_flags = cs_reg_write((csh)&handle, insn, ARM64_REG_NZCV);
 
 			if (insns[i].branch || insns[i].indirect_branch) {
 				// this insn also belongs to JUMP group. add JUMP group
-				insn->groups[insn->groups_count] = ARM64_GRP_JUMP;
-				insn->groups_count++;
+				insn->detail->groups[insn->detail->groups_count] = ARM64_GRP_JUMP;
+				insn->detail->groups_count++;
 			}
 		}
 	}
diff --git a/arch/ARM/ARMInstPrinter.c b/arch/ARM/ARMInstPrinter.c
index a43a07e..aebf1fc 100644
--- a/arch/ARM/ARMInstPrinter.c
+++ b/arch/ARM/ARMInstPrinter.c
@@ -129,14 +129,14 @@
 
 	doing_mem = status;
 	if (doing_mem) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_MEM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = ARM_REG_INVALID;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.index = ARM_REG_INVALID;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.scale = 1;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = 0;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_MEM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = ARM_REG_INVALID;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.index = ARM_REG_INVALID;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.scale = 1;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = 0;
 	} else {
 		// done, create the next operand slot
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -172,7 +172,7 @@
 	//assert (!(ShOpc == ARM_AM_ror && !ShImm) && "Cannot have ror #0");
 	SStream_concat(O, ARM_AM_getShiftOpcStr(ShOpc));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = (arm_shifter)ShOpc;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.type = (arm_shifter)ShOpc;
 
 	if (ShOpc != ARM_AM_rrx) {
 		SStream_concat(O, " ");
@@ -182,7 +182,7 @@
 		if (_UseMarkup)
 			SStream_concat(O, ">");
 		if (MI->detail)
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.value = translateShiftImm(ShImm);
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.value = translateShiftImm(ShImm);
 	}
 }
 
@@ -225,31 +225,31 @@
 	{ ARM_INS_UMULL, "umulls" },
 };
 
-void ARM_post_printer(csh ud, cs_insn *pub_insn, char *insn_asm)
+void ARM_post_printer(csh ud, cs_insn *insn, char *insn_asm)
 {
 	// check if this insn requests write-back
 	if (strrchr(insn_asm, '!') != NULL) {
-		pub_insn->arm.writeback = true;
+		insn->detail->arm.writeback = true;
 	}
 
 	if (((cs_struct *)ud)->detail != CS_OPT_ON)
 		return;
 
 	// check if this insn requests update flags
-	if (pub_insn->arm.update_flags == false) {
+	if (insn->detail->arm.update_flags == false) {
 		// some insn still update flags, regardless of tabgen info
 		int i;
 
 		for (i = 0; i < ARR_SIZE(insn_update_flgs); i++) {
-			if (pub_insn->id == insn_update_flgs[i].id &&
+			if (insn->id == insn_update_flgs[i].id &&
 					!strncmp(insn_asm, insn_update_flgs[i].name,
 						strlen(insn_update_flgs[i].name))) {
-				pub_insn->arm.update_flags = true;
+				insn->detail->arm.update_flags = true;
 				// we have to update regs_write array as well
 				int j;
-				for (j = 0; j < ARR_SIZE(pub_insn->regs_write); j++) {
-					if (pub_insn->regs_write[j] == 0) {
-						pub_insn->regs_write[j] = ARM_REG_CPSR;
+				for (j = 0; j < ARR_SIZE(insn->detail->regs_write); j++) {
+					if (insn->detail->regs_write[j] == 0) {
+						insn->detail->regs_write[j] = ARM_REG_CPSR;
 						break;
 					}
 				}
@@ -307,26 +307,26 @@
 							SStream_concat(O, "\t");
 							printRegName(O, MCOperand_getReg(Dst));
 							if (MI->detail) {
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(Dst);
-								MI->pub_insn.arm.op_count++;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(Dst);
+								MI->flat_insn.arm.op_count++;
 							}
 
 							SStream_concat(O, ", ");
 							printRegName(O, MCOperand_getReg(MO1));
 
 							if (MI->detail) {
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MO1);
-								MI->pub_insn.arm.op_count++;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MO1);
+								MI->flat_insn.arm.op_count++;
 							}
 
 							SStream_concat(O, ", ");
 							printRegName(O, MCOperand_getReg(MO2));
 							if (MI->detail) {
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MO2);
-								MI->pub_insn.arm.op_count++;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MO2);
+								MI->flat_insn.arm.op_count++;
 							}
 							//assert(ARM_AM_getSORegOffset(MO3.getImm()) == 0);
 							return;
@@ -345,17 +345,17 @@
 							SStream_concat(O, "\t");
 							printRegName(O, MCOperand_getReg(Dst));
 							if (MI->detail) {
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(Dst);
-								MI->pub_insn.arm.op_count++;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(Dst);
+								MI->flat_insn.arm.op_count++;
 							}
 
 							SStream_concat(O, ", ");
 							printRegName(O, MCOperand_getReg(MO1));
 							if (MI->detail) {
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MO1);
-								MI->pub_insn.arm.op_count++;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MO1);
+								MI->flat_insn.arm.op_count++;
 							}
 
 							if (ARM_AM_getSORegShOp(MCOperand_getImm(MO2)) == ARM_AM_rrx) {
@@ -371,9 +371,9 @@
 								SStream_concat(O, "#%u", tmp);
 							SStream_concat(O, markup(">"));
 							if (MI->detail) {
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type =
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.type =
 									(arm_shifter)ARM_AM_getSORegShOp(MCOperand_getImm(MO2));
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.value = tmp;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.value = tmp;
 							}
 							return;
 						}
@@ -402,9 +402,9 @@
 							SStream_concat(O, "\t{");
 							printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, 1)));
 							if (MI->detail) {
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 1));
-								MI->pub_insn.arm.op_count++;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 1));
+								MI->flat_insn.arm.op_count++;
 							}
 							SStream_concat(O, "}");
 							return;
@@ -435,9 +435,9 @@
 							SStream_concat(O, "\t{");
 							printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, 0)));
 							if (MI->detail) {
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-								MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 0));
-								MI->pub_insn.arm.op_count++;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+								MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 0));
+								MI->flat_insn.arm.op_count++;
 							}
 							SStream_concat(O, "}");
 							return;
@@ -483,9 +483,9 @@
 							 SStream_concat(O, "\t");
 							 printRegName(O, BaseReg);
 							 if (MI->detail) {
-								 MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-								 MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = BaseReg;
-								 MI->pub_insn.arm.op_count++;
+								 MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+								 MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = BaseReg;
+								 MI->flat_insn.arm.op_count++;
 							 }
 							 if (Writeback)
 								 SStream_concat(O, "!");
@@ -543,14 +543,14 @@
 		printRegName(O, Reg);
 		if (MI->detail) {
 			if (doing_mem) {
-				if (MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base == ARM_REG_INVALID)
-					MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = Reg;
+				if (MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base == ARM_REG_INVALID)
+					MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = Reg;
 				else
-					MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.index = Reg;
+					MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.index = Reg;
 			} else {
-				MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-				MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = Reg;
-				MI->pub_insn.arm.op_count++;
+				MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+				MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = Reg;
+				MI->flat_insn.arm.op_count++;
 			}
 		}
 	} else if (MCOperand_isImm(Op)) {
@@ -584,11 +584,11 @@
 		SStream_concat(O, markup(">"));
 		if (MI->detail) {
 			if (doing_mem)
-				MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = imm;
+				MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = imm;
 			else {
-				MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-				MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = imm;
-				MI->pub_insn.arm.op_count++;
+				MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+				MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = imm;
+				MI->flat_insn.arm.op_count++;
 			}
 		}
 	}
@@ -632,11 +632,11 @@
 	printRegName(O, MCOperand_getReg(MO1));
 
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MO1);
 
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].shift.type = (MCOperand_getImm(MO3) & 7) + ARM_SFT_ASR_REG - 1;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].shift.type = (MCOperand_getImm(MO3) & 7) + ARM_SFT_ASR_REG - 1;
+		MI->flat_insn.arm.op_count++;
 	}
 
 	// Print the shift opc.
@@ -649,7 +649,7 @@
 	SStream_concat(O, " ");
 	printRegName(O, MCOperand_getReg(MO2));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.value = MCOperand_getReg(MO2);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.value = MCOperand_getReg(MO2);
 	//assert(ARM_AM_getSORegOffset(MO3.getImm()) == 0);
 }
 
@@ -660,11 +660,11 @@
 
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MO1);
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].shift.type = MCOperand_getImm(MO2) & 7;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].shift.value = MCOperand_getImm(MO2) >> 3;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].shift.type = MCOperand_getImm(MO2) & 7;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].shift.value = MCOperand_getImm(MO2) >> 3;
+		MI->flat_insn.arm.op_count++;
 	}
 
 	// Print the shift opc.
@@ -687,7 +687,7 @@
 
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 	}
 
 	if (!MCOperand_getReg(MO2)) {
@@ -699,8 +699,8 @@
 			else
 				SStream_concat(O, "#%s%u", ARM_AM_getAddrOpcStr(getAM2Op(MCOperand_getImm(MO3))), tmp);
 			if (MI->detail) {
-				MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].shift.type = (arm_shifter)getAM2Op(MCOperand_getImm(MO3));
-				MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].shift.value = tmp;
+				MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].shift.type = (arm_shifter)getAM2Op(MCOperand_getImm(MO3));
+				MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].shift.value = tmp;
 			}
 			SStream_concat(O, markup(">"));
 		}
@@ -713,7 +713,7 @@
 	SStream_concat(O, ARM_AM_getAddrOpcStr(getAM2Op(MCOperand_getImm(MO3))));
 	printRegName(O, MCOperand_getReg(MO2));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.index = MCOperand_getReg(MO2);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.index = MCOperand_getReg(MO2);
 	}
 
 	printRegImmShift(MI, O, getAM2ShiftOpc(MCOperand_getImm(MO3)),
@@ -730,11 +730,11 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MO2));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.index = MCOperand_getReg(MO2);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.index = MCOperand_getReg(MO2);
 	SStream_concat(O, "]%s", markup(">"));
 	set_mem_access(MI, false);
 }
@@ -747,15 +747,15 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MO2));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.index = MCOperand_getReg(MO2);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.index = MCOperand_getReg(MO2);
 	SStream_concat(O, ", lsl %s #1%s]%s", markup("<imm:"), markup(">"), markup(">"));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].shift.type = ARM_SFT_LSL;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].shift.value = 1;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].shift.type = ARM_SFT_LSL;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].shift.value = 1;
 	}
 	set_mem_access(MI, false);
 }
@@ -788,9 +788,9 @@
 					ARM_AM_getAddrOpcStr(getAM2Op(MCOperand_getImm(MO2))), ImmOffs,
 					markup(">"));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = ImmOffs;
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = ImmOffs;
+			MI->flat_insn.arm.op_count++;
 		}
 		return;
 	}
@@ -798,9 +798,9 @@
 	SStream_concat(O, ARM_AM_getAddrOpcStr(getAM2Op(MCOperand_getImm(MO2))));
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MO1);
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.op_count++;
 	}
 
 	printRegImmShift(MI, O, getAM2ShiftOpc(MCOperand_getImm(MO2)),
@@ -822,7 +822,7 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 	SStream_concat(O, "], %s", markup(">"));
 	set_mem_access(MI, false);
 
@@ -830,9 +830,9 @@
 		SStream_concat(O, "%c", (char)op);
 		printRegName(O, MCOperand_getReg(MO2));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MO2);
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MO2);
+			MI->flat_insn.arm.op_count++;
 		}
 		return;
 	}
@@ -848,14 +848,14 @@
 				markup(">"));
 
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
 
 		if (op)
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = ImmOffs;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = ImmOffs;
 		else
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = -ImmOffs;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = -ImmOffs;
 
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -871,15 +871,15 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 
 	if (MCOperand_getReg(MO2)) {
 		SStream_concat(O, ", %s", ARM_AM_getAddrOpcStr(op));
 		printRegName(O, MCOperand_getReg(MO2));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.index = MCOperand_getReg(MO2);
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.index = MCOperand_getReg(MO2);
 			if (op)
-				MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.scale = -1;
+				MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.scale = -1;
 		}
 		SStream_concat(O, "]%s", markup(">"));
 		set_mem_access(MI, false);
@@ -900,9 +900,9 @@
 
 	if (MI->detail) {
 		if (op)
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = MCOperand_getImm(MO3);
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = MCOperand_getImm(MO3);
 		else
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = -MCOperand_getImm(MO3);
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = -MCOperand_getImm(MO3);
 	}
 
 	SStream_concat(O, "]%s", markup(">"));
@@ -939,9 +939,9 @@
 		SStream_concat(O, ARM_AM_getAddrOpcStr(op));
 		printRegName(O, MCOperand_getReg(MO1));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = MCOperand_getReg(MO1);
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = MCOperand_getReg(MO1);
+			MI->flat_insn.arm.op_count++;
 		}
 		return;
 	}
@@ -956,14 +956,14 @@
 				ARM_AM_getAddrOpcStr(op), ImmOffs,
 				markup(">"));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
 
 		if (op)
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = ImmOffs;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = ImmOffs;
 		else
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = -ImmOffs;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = -ImmOffs;
 
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -978,9 +978,9 @@
 		SStream_concat(O, "%s#%s%u%s", markup("<imm:"), ((Imm & 256) ? "" : "-"),
 				(Imm & 0xff), markup(">"));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = Imm & 0xff;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = Imm & 0xff;
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -992,9 +992,9 @@
 	SStream_concat(O, (MCOperand_getImm(MO2) ? "" : "-"));
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MO1);
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1048,7 +1048,7 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 	unsigned tmp = MCOperand_getImm(MO2);
 	if (tmp) {
 		if (tmp << 3 > HEX_THRESHOLD)
@@ -1056,7 +1056,7 @@
 		else
 			SStream_concat(O, ":%u", (tmp << 3));
 		if (MI->detail)
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = tmp << 3;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = tmp << 3;
 	}
 	SStream_concat(O, "]%s", markup(">"));
 	set_mem_access(MI, false);
@@ -1069,7 +1069,7 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 	SStream_concat(O, "]%s", markup(">"));
 	set_mem_access(MI, false);
 }
@@ -1083,9 +1083,9 @@
 		SStream_concat(O, ", ");
 		printRegName(O, MCOperand_getReg(MO));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MO);
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MO);
+			MI->flat_insn.arm.op_count++;
 		}
 	}
 }
@@ -1109,12 +1109,12 @@
 		SStream_concat(O, ", %s#%u%s", markup("<imm:"), width, markup(">"));
 
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = lsb;
-		MI->pub_insn.arm.op_count++;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = width;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = lsb;
+		MI->flat_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = width;
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1143,8 +1143,8 @@
 		else
 			SStream_concat(O, ", asr %s#%u%s", markup("<imm:"), tmp, markup(">"));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = ARM_SFT_ASR;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.value = tmp;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.type = ARM_SFT_ASR;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.value = tmp;
 		}
 	} else if (Amt) {
 		if (Amt > HEX_THRESHOLD)
@@ -1152,8 +1152,8 @@
 		else
 			SStream_concat(O, ", lsl %s#%u%s", markup("<imm:"), Amt, markup(">"));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = ARM_SFT_LSL;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.value = Amt;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.type = ARM_SFT_LSL;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.value = Amt;
 		}
 	}
 }
@@ -1169,8 +1169,8 @@
 	else
 		SStream_concat(O, ", lsl %s#%u%s", markup("<imm:"), Imm, markup(">"));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = ARM_SFT_LSL;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.value = Imm;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.type = ARM_SFT_LSL;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.value = Imm;
 	}
 }
 
@@ -1186,8 +1186,8 @@
 	else
 		SStream_concat(O, ", asr %s#%u%s", markup("<imm:"), Imm, markup(">"));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = ARM_SFT_ASR;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.value = Imm;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.type = ARM_SFT_ASR;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.value = Imm;
 	}
 }
 
@@ -1200,9 +1200,9 @@
 		if (i != OpNum) SStream_concat(O, ", ");
 		printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, i)));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, i));
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, i));
+			MI->flat_insn.arm.op_count++;
 		}
 	}
 	SStream_concat(O, "}");
@@ -1214,16 +1214,16 @@
 	unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
 	printRegName(O, MCRegisterInfo_getSubReg(MRI, Reg, ARM_gsub_0));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCRegisterInfo_getSubReg(MRI, Reg, ARM_gsub_0);
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCRegisterInfo_getSubReg(MRI, Reg, ARM_gsub_0);
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCRegisterInfo_getSubReg(MRI, Reg, ARM_gsub_1));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCRegisterInfo_getSubReg(MRI, Reg, ARM_gsub_1);
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCRegisterInfo_getSubReg(MRI, Reg, ARM_gsub_1);
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1256,9 +1256,9 @@
 		SStream_concat(O, "none");
 
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = IFlags;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = IFlags;
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1350,13 +1350,13 @@
 	if ((unsigned)CC == 15) {
 		SStream_concat(O, "<und>");
 		if (MI->detail)
-			MI->pub_insn.arm.cc = ARM_CC_INVALID;
+			MI->flat_insn.arm.cc = ARM_CC_INVALID;
 	} else {
 		if (CC != ARMCC_AL) {
 			SStream_concat(O, ARMCC_ARMCondCodeToString(CC));
 		}
 		if (MI->detail)
-			MI->pub_insn.arm.cc = CC + 1;
+			MI->flat_insn.arm.cc = CC + 1;
 	}
 }
 
@@ -1366,7 +1366,7 @@
 	ARMCC_CondCodes CC = (ARMCC_CondCodes)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
 	SStream_concat(O, ARMCC_ARMCondCodeToString(CC));
 	if (MI->detail)
-		MI->pub_insn.arm.cc = CC + 1;
+		MI->flat_insn.arm.cc = CC + 1;
 }
 
 static void printSBitModifierOperand(MCInst *MI, unsigned OpNum, SStream *O)
@@ -1375,7 +1375,7 @@
 		//assert(MCOperand_getReg(MCInst_getOperand(MI, OpNum)) == ARM_CPSR &&
 		//       "Expect ARM CPSR register!");
 		if (MI->detail)
-			MI->pub_insn.arm.update_flags = true;
+			MI->flat_insn.arm.update_flags = true;
 		SStream_concat(O, "s");
 	}
 }
@@ -1389,11 +1389,11 @@
 		SStream_concat(O, "%u", tmp);
 	if (MI->detail) {
 		if (doing_mem) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = tmp;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = tmp;
 		} else {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = tmp;
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = tmp;
+			MI->flat_insn.arm.op_count++;
 		}
 	}
 }
@@ -1402,9 +1402,9 @@
 {
 	SStream_concat(O, "p%u", MCOperand_getImm(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_PIMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_PIMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1412,9 +1412,9 @@
 {
 	SStream_concat(O, "c%u", MCOperand_getImm(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_CIMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_CIMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = MCOperand_getImm(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1426,9 +1426,9 @@
 	else
 		SStream_concat(O, "{%u}", tmp);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = tmp;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = tmp;
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1442,9 +1442,9 @@
 	if (OffImm == INT32_MIN) {
 		SStream_concat(O, "#-0");
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = 0;
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = 0;
+			MI->flat_insn.arm.op_count++;
 		}
 	} else {
 		if (OffImm < 0)
@@ -1456,9 +1456,9 @@
 				SStream_concat(O, "#%u", OffImm);
 		}
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = OffImm;
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = OffImm;
+			MI->flat_insn.arm.op_count++;
 		}
 	}
 	SStream_concat(O, markup(">"));
@@ -1473,9 +1473,9 @@
 	else
 		SStream_concat(O, "%s#%u", markup("<imm:"), tmp);
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = tmp;
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = tmp;
+			MI->flat_insn.arm.op_count++;
 		}
 	SStream_concat(O, markup(">"));
 }
@@ -1491,9 +1491,9 @@
 		SStream_concat(O, "%s#%u", markup("<imm:"), tmp);
 
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = tmp;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = tmp;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, markup(">"));
 }
@@ -1532,13 +1532,13 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 	unsigned RegNum = MCOperand_getReg(MO2);
 	if (RegNum) {
 		SStream_concat(O, ", ");
 		printRegName(O, RegNum);
 		if (MI->detail)
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.index = RegNum;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.index = RegNum;
 	}
 	SStream_concat(O, "]");
 	set_mem_access(MI, false);
@@ -1561,7 +1561,7 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 	unsigned ImmOffs = MCOperand_getImm(MO2);
 	if (ImmOffs) {
 		unsigned tmp = ImmOffs * Scale;
@@ -1571,7 +1571,7 @@
 		else
 			SStream_concat(O, "#%u", tmp);
 		if (MI->detail)
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = tmp;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = tmp;
 		SStream_concat(O, markup(">"));
 	}
 	SStream_concat(O, "]");
@@ -1611,9 +1611,9 @@
 	unsigned Reg = MCOperand_getReg(MO1);
 	printRegName(O, Reg);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = Reg;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = Reg;
+		MI->flat_insn.arm.op_count++;
 	}
 
 	// Print the shift opc.
@@ -1639,7 +1639,7 @@
 	printRegName(O, MCOperand_getReg(MO1));
 
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 
 	int32_t OffImm = (int32_t)MCOperand_getImm(MO2);
 	bool isSub = OffImm < 0;
@@ -1655,7 +1655,7 @@
 			SStream_concat(O, ", %s#%u%s", markup("<imm:"), OffImm, markup(">"));
 	}
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = OffImm;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = OffImm;
 	SStream_concat(O, "]%s", markup(">"));
 	set_mem_access(MI, false);
 }
@@ -1671,7 +1671,7 @@
 
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 
 	int32_t OffImm = (int32_t)MCOperand_getImm(MO2);
 	bool isSub = OffImm < 0;
@@ -1689,7 +1689,7 @@
 	}
 
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = OffImm;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = OffImm;
 	SStream_concat(O, "]%s", markup(">"));
 	set_mem_access(MI, false);
 }
@@ -1710,7 +1710,7 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 
 	int32_t OffImm = (int32_t)MCOperand_getImm(MO2);
 	bool isSub = OffImm < 0;
@@ -1729,7 +1729,7 @@
 			SStream_concat(O, ", %s#%u%s", markup("<imm:"), OffImm, markup(">"));
 	}
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = OffImm;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = OffImm;
 
 	SStream_concat(O, "]%s", markup(">"));
 	set_mem_access(MI, false);
@@ -1745,7 +1745,7 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 	if (MCOperand_getImm(MO2)) {
 		SStream_concat(O, ", ");
 		SStream_concat(O, markup("<imm:"));
@@ -1758,7 +1758,7 @@
 			SStream_concat(O, "#%u", tmp);
 		SStream_concat(O, markup(">"));
 		if (MI->detail)
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.disp = tmp;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = tmp;
 	}
 	SStream_concat(O, "]%s", markup(">"));
 	set_mem_access(MI, false);
@@ -1773,9 +1773,9 @@
 	if (OffImm == INT32_MIN) {
 		SStream_concat(O, "#-0%s", markup(">"));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = 0;
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = 0;
+			MI->flat_insn.arm.op_count++;
 		}
 	} else {
 		if (OffImm < 0)
@@ -1787,9 +1787,9 @@
 				SStream_concat(O, "#%u%s", OffImm, markup(">"));
 		}
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = OffImm;
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = OffImm;
+			MI->flat_insn.arm.op_count++;
 		}
 	}
 }
@@ -1806,9 +1806,9 @@
 	if (OffImm == INT32_MIN) {
 		SStream_concat(O, "#-0%s", markup(">"));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = 0;
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = 0;
+			MI->flat_insn.arm.op_count++;
 		}
 	} else {
 		if (OffImm < 0)
@@ -1820,9 +1820,9 @@
 				SStream_concat(O, "#%u%s", OffImm, markup(">"));
 		}
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = OffImm;
-			MI->pub_insn.arm.op_count++;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = OffImm;
+			MI->flat_insn.arm.op_count++;
 		}
 	}
 }
@@ -1838,13 +1838,13 @@
 	set_mem_access(MI, true);
 	printRegName(O, MCOperand_getReg(MO1));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1);
 
 	//assert(MCOperand_getReg(MO2.getReg() && "Invalid so_reg load / store address!");
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MO2));
 	if (MI->detail)
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].mem.index = MCOperand_getReg(MO2);
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.index = MCOperand_getReg(MO2);
 
 	unsigned ShAmt = MCOperand_getImm(MO3);
 	if (ShAmt) {
@@ -1854,8 +1854,8 @@
 		SStream_concat(O, "#%d", ShAmt);
 		SStream_concat(O, markup(">"));
 		if (MI->detail) {
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = ARM_SFT_LSL;
-			MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.value = ShAmt;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.type = ARM_SFT_LSL;
+			MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.value = ShAmt;
 		}
 	}
 
@@ -1868,9 +1868,9 @@
 	MCOperand *MO = MCInst_getOperand(MI, OpNum);
 	SStream_concat(O, "%s#%f%s", markup("<imm:"), getFPImmFloat(MCOperand_getImm(MO)), markup(">"));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_FP;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].fp = getFPImmFloat(MCOperand_getImm(MO));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_FP;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].fp = getFPImmFloat(MCOperand_getImm(MO));
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1884,9 +1884,9 @@
 	else
 		SStream_concat(O, "%s#%"PRIu64"%s", markup("<imm:"), Val, markup(">"));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = Val;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = Val;
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1898,9 +1898,9 @@
 	else
 		SStream_concat(O, "%s#%u%s", markup("<imm:"), Imm + 1, markup(">"));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = Imm + 1;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = Imm + 1;
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1918,8 +1918,8 @@
 	}
 	SStream_concat(O, markup(">"));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.type = ARM_SFT_ROR;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count - 1].shift.value = Imm * 8;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.type = ARM_SFT_ROR;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count - 1].shift.value = Imm * 8;
 	}
 }
 
@@ -1932,9 +1932,9 @@
 	else
 		SStream_concat(O, "#%u", tmp);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = tmp;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = tmp;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, markup(">"));
 }
@@ -1948,9 +1948,9 @@
 	else
 		SStream_concat(O, "#%u", tmp);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = tmp;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = tmp;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, markup(">"));
 }
@@ -1963,9 +1963,9 @@
 	else
 		SStream_concat(O, "[%u]",tmp);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_IMM;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].imm = tmp;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_IMM;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].imm = tmp;
+		MI->flat_insn.arm.op_count++;
 	}
 }
 
@@ -1974,9 +1974,9 @@
 	SStream_concat(O, "{");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "}");
 }
@@ -1990,16 +1990,16 @@
 	SStream_concat(O, "{");
 	printRegName(O, Reg0);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = Reg0;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = Reg0;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, Reg1);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = Reg1;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = Reg1;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "}");
 }
@@ -2013,16 +2013,16 @@
 	SStream_concat(O, "{");
 	printRegName(O, Reg0);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = Reg0;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = Reg0;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, Reg1);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = Reg1;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = Reg1;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "}");
 }
@@ -2035,23 +2035,23 @@
 	SStream_concat(O, "{");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "}");
 }
@@ -2064,30 +2064,30 @@
 	SStream_concat(O, "{");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "}");
 }
@@ -2097,9 +2097,9 @@
 	SStream_concat(O, "{");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[]}");
 }
@@ -2113,16 +2113,16 @@
 	SStream_concat(O, "{");
 	printRegName(O, Reg0);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = Reg0;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = Reg0;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, Reg1);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = Reg1;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = Reg1;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[]}");
 }
@@ -2135,23 +2135,23 @@
 	SStream_concat(O, "{");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[]}");
 }
@@ -2164,30 +2164,30 @@
 	SStream_concat(O, "{");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 1;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 3;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[]}");
 }
@@ -2201,16 +2201,16 @@
 	SStream_concat(O, "{");
 	printRegName(O, Reg0);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = Reg0;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = Reg0;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, Reg1);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = Reg1;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = Reg1;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[]}");
 }
@@ -2224,23 +2224,23 @@
 	SStream_concat(O, "{");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[]}");
 }
@@ -2254,30 +2254,30 @@
 	SStream_concat(O, "{");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[], ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "[]}");
 }
@@ -2290,23 +2290,23 @@
 	SStream_concat(O, "{");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "}");
 }
@@ -2319,30 +2319,30 @@
 	SStream_concat(O, "{");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)));
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 2;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 4;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, ", ");
 	printRegName(O, MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6);
 	if (MI->detail) {
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].type = ARM_OP_REG;
-		MI->pub_insn.arm.operands[MI->pub_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6;
-		MI->pub_insn.arm.op_count++;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_REG;
+		MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum)) + 6;
+		MI->flat_insn.arm.op_count++;
 	}
 	SStream_concat(O, "}");
 }
diff --git a/arch/ARM/mapping.c b/arch/ARM/mapping.c
index 11a932d..a40a5be 100644
--- a/arch/ARM/mapping.c
+++ b/arch/ARM/mapping.c
@@ -5,6 +5,7 @@
 #include <string.h>
 
 #include "../../include/arm.h"
+#include "../../cs_priv.h"
 
 #include "mapping.h"
 
@@ -2304,23 +2305,23 @@
 		insn->id = insns[i].mapid;
 
 		if (detail) {
-			memcpy(insn->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
-			insn->regs_read_count = count_positive(insns[i].regs_use);
+			cs_struct handle;
+			handle.detail = detail;
+			memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
+			insn->detail->regs_read_count = count_positive(insns[i].regs_use);
 
-			memcpy(insn->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
-			insn->regs_write_count = count_positive(insns[i].regs_mod);
+			memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
+			insn->detail->regs_write_count = count_positive(insns[i].regs_mod);
 
-			memcpy(insn->groups, insns[i].groups, sizeof(insns[i].groups));
-			insn->groups_count = count_positive(insns[i].groups);
+			memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups));
+			insn->detail->groups_count = count_positive(insns[i].groups);
 
-			// call cs_reg_write() with handle = 1 to bypass handle check
-			// we only need to find if this insn modifies ARM64_REG_NZCV
-			insn->arm.update_flags = cs_reg_write(1, insn, ARM_REG_CPSR);
+			insn->detail->arm.update_flags = cs_reg_write((csh)&handle, insn, ARM_REG_CPSR);
 
 			if (insns[i].branch || insns[i].indirect_branch) {
 				// this insn also belongs to JUMP group. add JUMP group
-				insn->groups[insn->groups_count] = ARM_GRP_JUMP;
-				insn->groups_count++;
+				insn->detail->groups[insn->detail->groups_count] = ARM_GRP_JUMP;
+				insn->detail->groups_count++;
 			}
 		}
 	}
diff --git a/arch/Mips/MipsInstPrinter.c b/arch/Mips/MipsInstPrinter.c
index 0326e19..f566644 100644
--- a/arch/Mips/MipsInstPrinter.c
+++ b/arch/Mips/MipsInstPrinter.c
@@ -92,12 +92,12 @@
 		return;
 
 	if (doing_mem) {
-		MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].type = MIPS_OP_MEM;
-		MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].mem.base = MIPS_REG_INVALID;
-		MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].mem.disp = 0;
+		MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].type = MIPS_OP_MEM;
+		MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].mem.base = MIPS_REG_INVALID;
+		MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].mem.disp = 0;
 	} else {
 		// done, create the next operand slot
-		MI->pub_insn.mips.op_count++;
+		MI->flat_insn.mips.op_count++;
 	}
 }
 
@@ -197,11 +197,11 @@
 		reg = Mips_map_register(reg);
 		if (MI->detail) {
 			if (doing_mem) {
-				MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].mem.base = reg;
+				MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].mem.base = reg;
 			} else {
-				MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].type = MIPS_OP_REG;
-				MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].reg = reg;
-				MI->pub_insn.mips.op_count++;
+				MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].type = MIPS_OP_REG;
+				MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].reg = reg;
+				MI->flat_insn.mips.op_count++;
 			}
 		}
 	}
@@ -223,7 +223,7 @@
 				}
 			}
 			if (MI->detail)
-				MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].mem.disp = imm;
+				MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].mem.disp = imm;
 		} else {
 			if (imm >= 0) {
 				if (imm > HEX_THRESHOLD)
@@ -238,9 +238,9 @@
 			}
 
 			if (MI->detail) {
-				MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].type = MIPS_OP_IMM;
-				MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].imm = imm;
-				MI->pub_insn.mips.op_count++;
+				MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].type = MIPS_OP_IMM;
+				MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].imm = imm;
+				MI->flat_insn.mips.op_count++;
 			}
 		}
 	}
@@ -263,9 +263,9 @@
 				SStream_concat(O, "-%u", (short int)-imm);
 		}
 		if (MI->detail) {
-			MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].type = MIPS_OP_IMM;
-			MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].imm = (unsigned short int)imm;
-			MI->pub_insn.mips.op_count++;
+			MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].type = MIPS_OP_IMM;
+			MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].imm = (unsigned short int)imm;
+			MI->flat_insn.mips.op_count++;
 		}
 	} else
 		printOperand(MI, opNum, O);
@@ -281,9 +281,9 @@
 		else
 			SStream_concat(O, "%u", imm);
 		if (MI->detail) {
-			MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].type = MIPS_OP_IMM;
-			MI->pub_insn.mips.operands[MI->pub_insn.mips.op_count].imm = imm;
-			MI->pub_insn.mips.op_count++;
+			MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].type = MIPS_OP_IMM;
+			MI->flat_insn.mips.operands[MI->flat_insn.mips.op_count].imm = imm;
+			MI->flat_insn.mips.op_count++;
 		}
 	} else
 		printOperand(MI, opNum, O);
diff --git a/arch/Mips/mapping.c b/arch/Mips/mapping.c
index 05c07ec..4893ddb 100644
--- a/arch/Mips/mapping.c
+++ b/arch/Mips/mapping.c
@@ -1397,19 +1397,19 @@
 			insn->id = alias_insns[i].mapid;
 
 			if (detail) {
-				memcpy(insn->regs_read, alias_insns[i].regs_use, sizeof(alias_insns[i].regs_use));
-				insn->regs_read_count = count_positive(alias_insns[i].regs_use);
+				memcpy(insn->detail->regs_read, alias_insns[i].regs_use, sizeof(alias_insns[i].regs_use));
+				insn->detail->regs_read_count = count_positive(alias_insns[i].regs_use);
 
-				memcpy(insn->regs_write, alias_insns[i].regs_mod, sizeof(alias_insns[i].regs_mod));
-				insn->regs_write_count = count_positive(alias_insns[i].regs_mod);
+				memcpy(insn->detail->regs_write, alias_insns[i].regs_mod, sizeof(alias_insns[i].regs_mod));
+				insn->detail->regs_write_count = count_positive(alias_insns[i].regs_mod);
 
-				memcpy(insn->groups, alias_insns[i].groups, sizeof(alias_insns[i].groups));
-				insn->groups_count = count_positive(alias_insns[i].groups);
+				memcpy(insn->detail->groups, alias_insns[i].groups, sizeof(alias_insns[i].groups));
+				insn->detail->groups_count = count_positive(alias_insns[i].groups);
 
 				if (alias_insns[i].branch || alias_insns[i].indirect_branch) {
 					// this insn also belongs to JUMP group. add JUMP group
-					insn->groups[insn->groups_count] = MIPS_GRP_JUMP;
-					insn->groups_count++;
+					insn->detail->groups[insn->detail->groups_count] = MIPS_GRP_JUMP;
+					insn->detail->groups_count++;
 				}
 
 				return;
@@ -1422,19 +1422,19 @@
 		insn->id = insns[i].mapid;
 
 		if (detail) {
-			memcpy(insn->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
-			insn->regs_read_count = count_positive(insns[i].regs_use);
+			memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
+			insn->detail->regs_read_count = count_positive(insns[i].regs_use);
 
-			memcpy(insn->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
-			insn->regs_write_count = count_positive(insns[i].regs_mod);
+			memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
+			insn->detail->regs_write_count = count_positive(insns[i].regs_mod);
 
-			memcpy(insn->groups, insns[i].groups, sizeof(insns[i].groups));
-			insn->groups_count = count_positive(insns[i].groups);
+			memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups));
+			insn->detail->groups_count = count_positive(insns[i].groups);
 
 			if (insns[i].branch || insns[i].indirect_branch) {
 				// this insn also belongs to JUMP group. add JUMP group
-				insn->groups[insn->groups_count] = MIPS_GRP_JUMP;
-				insn->groups_count++;
+				insn->detail->groups[insn->detail->groups_count] = MIPS_GRP_JUMP;
+				insn->detail->groups_count++;
 			}
 		}
 	}
diff --git a/arch/X86/X86ATTInstPrinter.c b/arch/X86/X86ATTInstPrinter.c
index a457fc5..94ae42d 100644
--- a/arch/X86/X86ATTInstPrinter.c
+++ b/arch/X86/X86ATTInstPrinter.c
@@ -123,17 +123,17 @@
 	SStream_concat(O, "%s", markup("<mem:"));
 
 	if (MI->detail) {
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_MEM;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.base = X86_REG_INVALID;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.index = X86_REG_INVALID;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.scale = 1;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.disp = 0;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_MEM;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.base = X86_REG_INVALID;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.index = X86_REG_INVALID;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.scale = 1;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.disp = 0;
 	}
 
 	if (MCOperand_isImm(DispSpec)) {
 		int64_t imm = MCOperand_getImm(DispSpec);
 		if (MI->detail)
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.disp = imm;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.disp = imm;
 		if (imm < 0) {
 			if (imm <= -HEX_THRESHOLD)
 				SStream_concat(O, "-0x%"PRIx64, -imm);
@@ -150,7 +150,7 @@
 	SStream_concat(O, "%s", markup(">"));
 
 	if (MI->detail)
-		MI->pub_insn.x86.op_count++;
+		MI->flat_insn.x86.op_count++;
 }
 
 static void printMemOffs8(MCInst *MI, unsigned OpNo, SStream *O)
@@ -278,9 +278,9 @@
 				SStream_concat(O, "%"PRIu64, imm);
 		}
 		if (MI->detail) {
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_IMM;
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].imm = imm;
-			MI->pub_insn.x86.op_count++;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_IMM;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].imm = imm;
+			MI->flat_insn.x86.op_count++;
 		}
 	}
 }
@@ -291,9 +291,9 @@
 	if (MCOperand_isReg(Op)) {
 		printRegName(O, MCOperand_getReg(Op));
 		if (MI->detail) {
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_REG;
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].reg = MCOperand_getReg(Op);
-			MI->pub_insn.x86.op_count++;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_REG;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].reg = MCOperand_getReg(Op);
+			MI->flat_insn.x86.op_count++;
 		}
 	} else if (MCOperand_isImm(Op)) {
 		// Print X86 immediates as signed values.
@@ -310,9 +310,9 @@
 				SStream_concat(O, "%s$-%"PRIu64"%s", markup("<imm:"), -imm, markup(">"));
 		}
 		if (MI->detail) {
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_IMM;
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].imm = imm;
-			MI->pub_insn.x86.op_count++;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_IMM;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].imm = imm;
+			MI->flat_insn.x86.op_count++;
 		}
 	}
 }
@@ -348,11 +348,11 @@
 	MCOperand *SegReg = MCInst_getOperand(MI, Op+4);
 
 	if (MI->detail) {
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_MEM;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.base = MCOperand_getReg(BaseReg);
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.index = MCOperand_getReg(IndexReg);
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.scale = 1;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.disp = 0;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_MEM;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.base = MCOperand_getReg(BaseReg);
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.index = MCOperand_getReg(IndexReg);
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.scale = 1;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.disp = 0;
 	}
 
 	SStream_concat(O, markup("<mem:"));
@@ -366,7 +366,7 @@
 	if (MCOperand_isImm(DispSpec)) {
 		int64_t DispVal = MCOperand_getImm(DispSpec);
 		if (MI->detail)
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.disp = DispVal;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.disp = DispVal;
 		if (DispVal || (!MCOperand_getReg(IndexReg) && !MCOperand_getReg(BaseReg))) {
 			if (DispVal < 0) {
 				if (DispVal <= -HEX_THRESHOLD)
@@ -393,7 +393,7 @@
 			_printOperand(MI, Op+2, O);
 			unsigned ScaleVal = MCOperand_getImm(MCInst_getOperand(MI, Op+1));
 			if (MI->detail)
-				MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.scale = ScaleVal;
+				MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.scale = ScaleVal;
 			if (ScaleVal != 1) {
 				SStream_concat(O, ", %s%u%s", markup("<imm:"), ScaleVal, markup(">"));
 			}
@@ -404,7 +404,7 @@
 	SStream_concat(O, markup(">"));
 
 	if (MI->detail)
-		MI->pub_insn.x86.op_count++;
+		MI->flat_insn.x86.op_count++;
 }
 
 #include "X86InstPrinter.h"
@@ -466,16 +466,16 @@
 		int post;
 		if (lastop[0] == '%' && ((post = str_in_list(acc_regs, lastop+1)) != -1)) {
 			// set operand size following register size
-			MI->pub_insn.x86.op_size = 1 << post;
+			MI->flat_insn.x86.op_size = 1 << post;
 			// this is one of the registers AL, AX, EAX, RAX
 			// canonicalize the register name first
 			//int i;
 			//for (i = 1; lastop[i]; i++)
 			//	lastop[i] = tolower(lastop[i]);
-			if (MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count - 1].type != X86_OP_REG) {
-				MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_REG;
-				MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].reg = x86_map_regname(lastop + 1);
-				MI->pub_insn.x86.op_count++;
+			if (MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count - 1].type != X86_OP_REG) {
+				MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_REG;
+				MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].reg = x86_map_regname(lastop + 1);
+				MI->flat_insn.x86.op_count++;
 			}
 		}
 	}
diff --git a/arch/X86/X86Disassembler.c b/arch/X86/X86Disassembler.c
index 786e9e3..679a014 100644
--- a/arch/X86/X86Disassembler.c
+++ b/arch/X86/X86Disassembler.c
@@ -556,7 +556,7 @@
 }
 
 // copy x86 detail information from internal structure to public structure
-static void update_pub_insn(cs_insn *pub, InternalInstruction *inter)
+static void update_pub_insn(cs_insn_flat *pub, InternalInstruction *inter)
 {
 	int i, c;
 
@@ -632,7 +632,7 @@
 		// save segment for printing hack
 		instr->x86_segment = x86_map_segment(insn.segmentOverride);
 		if (handle->detail)
-			update_pub_insn(&instr->pub_insn, &insn);
+			update_pub_insn(&instr->flat_insn, &insn);
 		return result;
 	}
 }
diff --git a/arch/X86/X86IntelInstPrinter.c b/arch/X86/X86IntelInstPrinter.c
index 9849e46..fb987a9 100644
--- a/arch/X86/X86IntelInstPrinter.c
+++ b/arch/X86/X86IntelInstPrinter.c
@@ -118,11 +118,11 @@
 	MCOperand *DispSpec = MCInst_getOperand(MI, Op);
 
 	if (MI->detail) {
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_MEM;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.base = X86_REG_INVALID;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.index = X86_REG_INVALID;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.scale = 1;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.disp = 0;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_MEM;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.base = X86_REG_INVALID;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.index = X86_REG_INVALID;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.scale = 1;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.disp = 0;
 	}
 
 	SStream_concat(O, "[");
@@ -130,7 +130,7 @@
 	if (MCOperand_isImm(DispSpec)) {
 		int64_t imm = MCOperand_getImm(DispSpec);
 		if (MI->detail)
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.disp = imm;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.disp = imm;
 		if (imm < 0) {
 			if (imm <= -HEX_THRESHOLD)
 				SStream_concat(O, "-0x%"PRIx64, -imm);
@@ -147,7 +147,7 @@
 	SStream_concat(O, "]");
 
 	if (MI->detail)
-		MI->pub_insn.x86.op_count++;
+		MI->flat_insn.x86.op_count++;
 }
 
 static void printMemOffs8(MCInst *MI, unsigned OpNo, SStream *O)
@@ -241,19 +241,19 @@
 			int acc_regs_id[] = { X86_REG_AL,  X86_REG_AX, X86_REG_EAX, X86_REG_RAX };
 			if (tmp[0] != 0 && ((post = str_in_list(acc_regs, tmp)) != -1)) {
 				// set operand size following register size
-				MI->pub_insn.x86.op_size = 1 << post;
+				MI->flat_insn.x86.op_size = 1 << post;
 				// tmp is a register
-				if ((MI->pub_insn.x86.operands[0].type != X86_OP_INVALID) &&
-						((MI->pub_insn.x86.operands[0].type != X86_OP_REG) ||
-						(MI->pub_insn.x86.operands[0].reg != acc_regs_id[post]))) {
+				if ((MI->flat_insn.x86.operands[0].type != X86_OP_INVALID) &&
+						((MI->flat_insn.x86.operands[0].type != X86_OP_REG) ||
+						(MI->flat_insn.x86.operands[0].reg != acc_regs_id[post]))) {
 					int i;
-					for (i = MI->pub_insn.x86.op_count; i > 0; i--) {
-						memcpy(&(MI->pub_insn.x86.operands[i]), &(MI->pub_insn.x86.operands[i - 1]),
-								sizeof(MI->pub_insn.x86.operands[0]));
+					for (i = MI->flat_insn.x86.op_count; i > 0; i--) {
+						memcpy(&(MI->flat_insn.x86.operands[i]), &(MI->flat_insn.x86.operands[i - 1]),
+								sizeof(MI->flat_insn.x86.operands[0]));
 					}
-					MI->pub_insn.x86.operands[0].type = X86_OP_REG;
-					MI->pub_insn.x86.operands[0].reg = x86_map_regname(tmp);
-					MI->pub_insn.x86.op_count++;
+					MI->flat_insn.x86.operands[0].type = X86_OP_REG;
+					MI->flat_insn.x86.operands[0].reg = x86_map_regname(tmp);
+					MI->flat_insn.x86.op_count++;
 				}
 			}
 		}
@@ -343,9 +343,9 @@
 				SStream_concat(O, "%"PRIu64, imm);
 		}
 		if (MI->detail) {
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_IMM;
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].imm = imm;
-			MI->pub_insn.x86.op_count++;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_IMM;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].imm = imm;
+			MI->flat_insn.x86.op_count++;
 		}
 	}
 }
@@ -362,9 +362,9 @@
 	if (MCOperand_isReg(Op)) {
 		printRegName(O, MCOperand_getReg(Op));
 		if (MI->detail) {
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_REG;
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].reg = MCOperand_getReg(Op);
-			MI->pub_insn.x86.op_count++;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_REG;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].reg = MCOperand_getReg(Op);
+			MI->flat_insn.x86.op_count++;
 		}
 	} else if (MCOperand_isImm(Op)) {
 		int64_t imm = MCOperand_getImm(Op);
@@ -381,9 +381,9 @@
 		}
 
 		if (MI->detail) {
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_IMM;
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].imm = imm;
-			MI->pub_insn.x86.op_count++;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_IMM;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].imm = imm;
+			MI->flat_insn.x86.op_count++;
 		}
 	}
 }
@@ -419,11 +419,11 @@
 	MCOperand *SegReg = MCInst_getOperand(MI, Op+4);
 
 	if (MI->detail) {
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].type = X86_OP_MEM;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.base = MCOperand_getReg(BaseReg);
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.index = MCOperand_getReg(IndexReg);
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.scale = ScaleVal;
-		MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.disp = 0;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].type = X86_OP_MEM;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.base = MCOperand_getReg(BaseReg);
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.index = MCOperand_getReg(IndexReg);
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.scale = ScaleVal;
+		MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.disp = 0;
 	}
 
 	// If this has a segment register, print it.
@@ -454,7 +454,7 @@
 	} else {
 		int64_t DispVal = MCOperand_getImm(DispSpec);
 		if (MI->detail)
-			MI->pub_insn.x86.operands[MI->pub_insn.x86.op_count].mem.disp = DispVal;
+			MI->flat_insn.x86.operands[MI->flat_insn.x86.op_count].mem.disp = DispVal;
 		if (DispVal || (!MCOperand_getReg(IndexReg) && !MCOperand_getReg(BaseReg))) {
 			if (NeedPlus) {
 				if (DispVal > 0)
@@ -481,7 +481,7 @@
 	SStream_concat(O, "]");
 
 	if (MI->detail)
-		MI->pub_insn.x86.op_count++;
+		MI->flat_insn.x86.op_count++;
 }
 
 #define GET_INSTRINFO_ENUM
diff --git a/arch/X86/mapping.c b/arch/X86/mapping.c
index 7cb09da..f668c78 100644
--- a/arch/X86/mapping.c
+++ b/arch/X86/mapping.c
@@ -6612,19 +6612,19 @@
 		insn->id = insns[i].mapid;
 
 		if (detail) {
-			memcpy(insn->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
-			insn->regs_read_count = count_positive(insns[i].regs_use);
+			memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
+			insn->detail->regs_read_count = count_positive(insns[i].regs_use);
 
-			memcpy(insn->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
-			insn->regs_write_count = count_positive(insns[i].regs_mod);
+			memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
+			insn->detail->regs_write_count = count_positive(insns[i].regs_mod);
 
-			memcpy(insn->groups, insns[i].groups, sizeof(insns[i].groups));
-			insn->groups_count = count_positive(insns[i].groups);
+			memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups));
+			insn->detail->groups_count = count_positive(insns[i].groups);
 
 			if (insns[i].branch || insns[i].indirect_branch) {
 				// this insn also belongs to JUMP group. add JUMP group
-				insn->groups[insn->groups_count] = X86_GRP_JUMP;
-				insn->groups_count++;
+				insn->detail->groups[insn->detail->groups_count] = X86_GRP_JUMP;
+				insn->detail->groups_count++;
 			}
 		}
 	}