arm64: add some alias registers. attn: bindings
diff --git a/bindings/const_generator.py b/bindings/const_generator.py
index 2e9d636..c322ef0 100644
--- a/bindings/const_generator.py
+++ b/bindings/const_generator.py
@@ -53,7 +53,7 @@
line = line.strip()
if line.startswith(MARKUP): # markup for comments
- outfile.write("\n%s%s%s" %(templ['comment_open'], \
+ outfile.write("\n%s%s%s\n" %(templ['comment_open'], \
line.replace(MARKUP, ''), templ['comment_close']))
continue
diff --git a/bindings/java/capstone/Arm64_const.java b/bindings/java/capstone/Arm64_const.java
index b071540..55d53ed 100644
--- a/bindings/java/capstone/Arm64_const.java
+++ b/bindings/java/capstone/Arm64_const.java
@@ -4,6 +4,7 @@
public class Arm64_const {
// ARM64 shift type
+
public static final int ARM64_SFT_INVALID = 0;
public static final int ARM64_SFT_LSL = 1;
public static final int ARM64_SFT_MSL = 2;
@@ -12,6 +13,7 @@
public static final int ARM64_SFT_ROR = 5;
// ARM64 extender type
+
public static final int ARM64_EXT_INVALID = 0;
public static final int ARM64_EXT_UXTB = 1;
public static final int ARM64_EXT_UXTH = 2;
@@ -23,6 +25,7 @@
public static final int ARM64_EXT_SXTX = 8;
// ARM64 condition code
+
public static final int ARM64_CC_INVALID = 0;
public static final int ARM64_CC_EQ = 1;
public static final int ARM64_CC_NE = 2;
@@ -42,6 +45,7 @@
public static final int ARM64_CC_NV = 16;
// Operand type for instruction's operands
+
public static final int ARM64_OP_INVALID = 0;
public static final int ARM64_OP_REG = 1;
public static final int ARM64_OP_CIMM = 2;
@@ -50,429 +54,245 @@
public static final int ARM64_OP_MEM = 5;
// ARM64 registers
+
public static final int ARM64_REG_INVALID = 0;
public static final int ARM64_REG_NZCV = 1;
public static final int ARM64_REG_WSP = 2;
- public static final int ARM64_REG_WZR = 3;
- public static final int ARM64_REG_SP = 4;
- public static final int ARM64_REG_XZR = 5;
- public static final int ARM64_REG_B0 = 6;
- public static final int ARM64_REG_B1 = 7;
- public static final int ARM64_REG_B2 = 8;
- public static final int ARM64_REG_B3 = 9;
- public static final int ARM64_REG_B4 = 10;
- public static final int ARM64_REG_B5 = 11;
- public static final int ARM64_REG_B6 = 12;
- public static final int ARM64_REG_B7 = 13;
- public static final int ARM64_REG_B8 = 14;
- public static final int ARM64_REG_B9 = 15;
- public static final int ARM64_REG_B10 = 16;
- public static final int ARM64_REG_B11 = 17;
- public static final int ARM64_REG_B12 = 18;
- public static final int ARM64_REG_B13 = 19;
- public static final int ARM64_REG_B14 = 20;
- public static final int ARM64_REG_B15 = 21;
- public static final int ARM64_REG_B16 = 22;
- public static final int ARM64_REG_B17 = 23;
- public static final int ARM64_REG_B18 = 24;
- public static final int ARM64_REG_B19 = 25;
- public static final int ARM64_REG_B20 = 26;
- public static final int ARM64_REG_B21 = 27;
- public static final int ARM64_REG_B22 = 28;
- public static final int ARM64_REG_B23 = 29;
- public static final int ARM64_REG_B24 = 30;
- public static final int ARM64_REG_B25 = 31;
- public static final int ARM64_REG_B26 = 32;
- public static final int ARM64_REG_B27 = 33;
- public static final int ARM64_REG_B28 = 34;
- public static final int ARM64_REG_B29 = 35;
- public static final int ARM64_REG_B30 = 36;
- public static final int ARM64_REG_B31 = 37;
- public static final int ARM64_REG_D0 = 38;
- public static final int ARM64_REG_D1 = 39;
- public static final int ARM64_REG_D2 = 40;
- public static final int ARM64_REG_D3 = 41;
- public static final int ARM64_REG_D4 = 42;
- public static final int ARM64_REG_D5 = 43;
- public static final int ARM64_REG_D6 = 44;
- public static final int ARM64_REG_D7 = 45;
- public static final int ARM64_REG_D8 = 46;
- public static final int ARM64_REG_D9 = 47;
- public static final int ARM64_REG_D10 = 48;
- public static final int ARM64_REG_D11 = 49;
- public static final int ARM64_REG_D12 = 50;
- public static final int ARM64_REG_D13 = 51;
- public static final int ARM64_REG_D14 = 52;
- public static final int ARM64_REG_D15 = 53;
- public static final int ARM64_REG_D16 = 54;
- public static final int ARM64_REG_D17 = 55;
- public static final int ARM64_REG_D18 = 56;
- public static final int ARM64_REG_D19 = 57;
- public static final int ARM64_REG_D20 = 58;
- public static final int ARM64_REG_D21 = 59;
- public static final int ARM64_REG_D22 = 60;
- public static final int ARM64_REG_D23 = 61;
- public static final int ARM64_REG_D24 = 62;
- public static final int ARM64_REG_D25 = 63;
- public static final int ARM64_REG_D26 = 64;
- public static final int ARM64_REG_D27 = 65;
- public static final int ARM64_REG_D28 = 66;
- public static final int ARM64_REG_D29 = 67;
- public static final int ARM64_REG_D30 = 68;
- public static final int ARM64_REG_D31 = 69;
- public static final int ARM64_REG_H0 = 70;
- public static final int ARM64_REG_H1 = 71;
- public static final int ARM64_REG_H2 = 72;
- public static final int ARM64_REG_H3 = 73;
- public static final int ARM64_REG_H4 = 74;
- public static final int ARM64_REG_H5 = 75;
- public static final int ARM64_REG_H6 = 76;
- public static final int ARM64_REG_H7 = 77;
- public static final int ARM64_REG_H8 = 78;
- public static final int ARM64_REG_H9 = 79;
- public static final int ARM64_REG_H10 = 80;
- public static final int ARM64_REG_H11 = 81;
- public static final int ARM64_REG_H12 = 82;
- public static final int ARM64_REG_H13 = 83;
- public static final int ARM64_REG_H14 = 84;
- public static final int ARM64_REG_H15 = 85;
- public static final int ARM64_REG_H16 = 86;
- public static final int ARM64_REG_H17 = 87;
- public static final int ARM64_REG_H18 = 88;
- public static final int ARM64_REG_H19 = 89;
- public static final int ARM64_REG_H20 = 90;
- public static final int ARM64_REG_H21 = 91;
- public static final int ARM64_REG_H22 = 92;
- public static final int ARM64_REG_H23 = 93;
- public static final int ARM64_REG_H24 = 94;
- public static final int ARM64_REG_H25 = 95;
- public static final int ARM64_REG_H26 = 96;
- public static final int ARM64_REG_H27 = 97;
- public static final int ARM64_REG_H28 = 98;
- public static final int ARM64_REG_H29 = 99;
- public static final int ARM64_REG_H30 = 100;
- public static final int ARM64_REG_H31 = 101;
- public static final int ARM64_REG_Q0 = 102;
- public static final int ARM64_REG_Q1 = 103;
- public static final int ARM64_REG_Q2 = 104;
- public static final int ARM64_REG_Q3 = 105;
- public static final int ARM64_REG_Q4 = 106;
- public static final int ARM64_REG_Q5 = 107;
- public static final int ARM64_REG_Q6 = 108;
- public static final int ARM64_REG_Q7 = 109;
- public static final int ARM64_REG_Q8 = 110;
- public static final int ARM64_REG_Q9 = 111;
- public static final int ARM64_REG_Q10 = 112;
- public static final int ARM64_REG_Q11 = 113;
- public static final int ARM64_REG_Q12 = 114;
- public static final int ARM64_REG_Q13 = 115;
- public static final int ARM64_REG_Q14 = 116;
- public static final int ARM64_REG_Q15 = 117;
- public static final int ARM64_REG_Q16 = 118;
- public static final int ARM64_REG_Q17 = 119;
- public static final int ARM64_REG_Q18 = 120;
- public static final int ARM64_REG_Q19 = 121;
- public static final int ARM64_REG_Q20 = 122;
- public static final int ARM64_REG_Q21 = 123;
- public static final int ARM64_REG_Q22 = 124;
- public static final int ARM64_REG_Q23 = 125;
- public static final int ARM64_REG_Q24 = 126;
- public static final int ARM64_REG_Q25 = 127;
- public static final int ARM64_REG_Q26 = 128;
- public static final int ARM64_REG_Q27 = 129;
- public static final int ARM64_REG_Q28 = 130;
- public static final int ARM64_REG_Q29 = 131;
- public static final int ARM64_REG_Q30 = 132;
- public static final int ARM64_REG_Q31 = 133;
- public static final int ARM64_REG_S0 = 134;
- public static final int ARM64_REG_S1 = 135;
- public static final int ARM64_REG_S2 = 136;
- public static final int ARM64_REG_S3 = 137;
- public static final int ARM64_REG_S4 = 138;
- public static final int ARM64_REG_S5 = 139;
- public static final int ARM64_REG_S6 = 140;
- public static final int ARM64_REG_S7 = 141;
- public static final int ARM64_REG_S8 = 142;
- public static final int ARM64_REG_S9 = 143;
- public static final int ARM64_REG_S10 = 144;
- public static final int ARM64_REG_S11 = 145;
- public static final int ARM64_REG_S12 = 146;
- public static final int ARM64_REG_S13 = 147;
- public static final int ARM64_REG_S14 = 148;
- public static final int ARM64_REG_S15 = 149;
- public static final int ARM64_REG_S16 = 150;
- public static final int ARM64_REG_S17 = 151;
- public static final int ARM64_REG_S18 = 152;
- public static final int ARM64_REG_S19 = 153;
- public static final int ARM64_REG_S20 = 154;
- public static final int ARM64_REG_S21 = 155;
- public static final int ARM64_REG_S22 = 156;
- public static final int ARM64_REG_S23 = 157;
- public static final int ARM64_REG_S24 = 158;
- public static final int ARM64_REG_S25 = 159;
- public static final int ARM64_REG_S26 = 160;
- public static final int ARM64_REG_S27 = 161;
- public static final int ARM64_REG_S28 = 162;
- public static final int ARM64_REG_S29 = 163;
- public static final int ARM64_REG_S30 = 164;
- public static final int ARM64_REG_S31 = 165;
- public static final int ARM64_REG_W0 = 166;
- public static final int ARM64_REG_W1 = 167;
- public static final int ARM64_REG_W2 = 168;
- public static final int ARM64_REG_W3 = 169;
- public static final int ARM64_REG_W4 = 170;
- public static final int ARM64_REG_W5 = 171;
- public static final int ARM64_REG_W6 = 172;
- public static final int ARM64_REG_W7 = 173;
- public static final int ARM64_REG_W8 = 174;
- public static final int ARM64_REG_W9 = 175;
- public static final int ARM64_REG_W10 = 176;
- public static final int ARM64_REG_W11 = 177;
- public static final int ARM64_REG_W12 = 178;
- public static final int ARM64_REG_W13 = 179;
- public static final int ARM64_REG_W14 = 180;
- public static final int ARM64_REG_W15 = 181;
- public static final int ARM64_REG_W16 = 182;
- public static final int ARM64_REG_W17 = 183;
- public static final int ARM64_REG_W18 = 184;
- public static final int ARM64_REG_W19 = 185;
- public static final int ARM64_REG_W20 = 186;
- public static final int ARM64_REG_W21 = 187;
- public static final int ARM64_REG_W22 = 188;
- public static final int ARM64_REG_W23 = 189;
- public static final int ARM64_REG_W24 = 190;
- public static final int ARM64_REG_W25 = 191;
- public static final int ARM64_REG_W26 = 192;
- public static final int ARM64_REG_W27 = 193;
- public static final int ARM64_REG_W28 = 194;
- public static final int ARM64_REG_W29 = 195;
- public static final int ARM64_REG_W30 = 196;
- public static final int ARM64_REG_X0 = 197;
- public static final int ARM64_REG_X1 = 198;
- public static final int ARM64_REG_X2 = 199;
- public static final int ARM64_REG_X3 = 200;
- public static final int ARM64_REG_X4 = 201;
- public static final int ARM64_REG_X5 = 202;
- public static final int ARM64_REG_X6 = 203;
- public static final int ARM64_REG_X7 = 204;
- public static final int ARM64_REG_X8 = 205;
- public static final int ARM64_REG_X9 = 206;
- public static final int ARM64_REG_X10 = 207;
- public static final int ARM64_REG_X11 = 208;
- public static final int ARM64_REG_X12 = 209;
- public static final int ARM64_REG_X13 = 210;
- public static final int ARM64_REG_X14 = 211;
- public static final int ARM64_REG_X15 = 212;
- public static final int ARM64_REG_X16 = 213;
- public static final int ARM64_REG_X17 = 214;
- public static final int ARM64_REG_X18 = 215;
- public static final int ARM64_REG_X19 = 216;
- public static final int ARM64_REG_X20 = 217;
- public static final int ARM64_REG_X21 = 218;
- public static final int ARM64_REG_X22 = 219;
- public static final int ARM64_REG_X23 = 220;
- public static final int ARM64_REG_X24 = 221;
- public static final int ARM64_REG_X25 = 222;
- public static final int ARM64_REG_X26 = 223;
- public static final int ARM64_REG_X27 = 224;
- public static final int ARM64_REG_X28 = 225;
- public static final int ARM64_REG_X29 = 226;
- public static final int ARM64_REG_X30 = 227;
- public static final int ARM64_REG_D0_D1 = 228;
- public static final int ARM64_REG_D1_D2 = 229;
- public static final int ARM64_REG_D2_D3 = 230;
- public static final int ARM64_REG_D3_D4 = 231;
- public static final int ARM64_REG_D4_D5 = 232;
- public static final int ARM64_REG_D5_D6 = 233;
- public static final int ARM64_REG_D6_D7 = 234;
- public static final int ARM64_REG_D7_D8 = 235;
- public static final int ARM64_REG_D8_D9 = 236;
- public static final int ARM64_REG_D9_D10 = 237;
- public static final int ARM64_REG_D10_D11 = 238;
- public static final int ARM64_REG_D11_D12 = 239;
- public static final int ARM64_REG_D12_D13 = 240;
- public static final int ARM64_REG_D13_D14 = 241;
- public static final int ARM64_REG_D14_D15 = 242;
- public static final int ARM64_REG_D15_D16 = 243;
- public static final int ARM64_REG_D16_D17 = 244;
- public static final int ARM64_REG_D17_D18 = 245;
- public static final int ARM64_REG_D18_D19 = 246;
- public static final int ARM64_REG_D19_D20 = 247;
- public static final int ARM64_REG_D20_D21 = 248;
- public static final int ARM64_REG_D21_D22 = 249;
- public static final int ARM64_REG_D22_D23 = 250;
- public static final int ARM64_REG_D23_D24 = 251;
- public static final int ARM64_REG_D24_D25 = 252;
- public static final int ARM64_REG_D25_D26 = 253;
- public static final int ARM64_REG_D26_D27 = 254;
- public static final int ARM64_REG_D27_D28 = 255;
- public static final int ARM64_REG_D28_D29 = 256;
- public static final int ARM64_REG_D29_D30 = 257;
- public static final int ARM64_REG_D30_D31 = 258;
- public static final int ARM64_REG_D31_D0 = 259;
- public static final int ARM64_REG_Q0_Q1 = 260;
- public static final int ARM64_REG_Q1_Q2 = 261;
- public static final int ARM64_REG_Q2_Q3 = 262;
- public static final int ARM64_REG_Q3_Q4 = 263;
- public static final int ARM64_REG_Q4_Q5 = 264;
- public static final int ARM64_REG_Q5_Q6 = 265;
- public static final int ARM64_REG_Q6_Q7 = 266;
- public static final int ARM64_REG_Q7_Q8 = 267;
- public static final int ARM64_REG_Q8_Q9 = 268;
- public static final int ARM64_REG_Q9_Q10 = 269;
- public static final int ARM64_REG_Q10_Q11 = 270;
- public static final int ARM64_REG_Q11_Q12 = 271;
- public static final int ARM64_REG_Q12_Q13 = 272;
- public static final int ARM64_REG_Q13_Q14 = 273;
- public static final int ARM64_REG_Q14_Q15 = 274;
- public static final int ARM64_REG_Q15_Q16 = 275;
- public static final int ARM64_REG_Q16_Q17 = 276;
- public static final int ARM64_REG_Q17_Q18 = 277;
- public static final int ARM64_REG_Q18_Q19 = 278;
- public static final int ARM64_REG_Q19_Q20 = 279;
- public static final int ARM64_REG_Q20_Q21 = 280;
- public static final int ARM64_REG_Q21_Q22 = 281;
- public static final int ARM64_REG_Q22_Q23 = 282;
- public static final int ARM64_REG_Q23_Q24 = 283;
- public static final int ARM64_REG_Q24_Q25 = 284;
- public static final int ARM64_REG_Q25_Q26 = 285;
- public static final int ARM64_REG_Q26_Q27 = 286;
- public static final int ARM64_REG_Q27_Q28 = 287;
- public static final int ARM64_REG_Q28_Q29 = 288;
- public static final int ARM64_REG_Q29_Q30 = 289;
- public static final int ARM64_REG_Q30_Q31 = 290;
- public static final int ARM64_REG_Q31_Q0 = 291;
- public static final int ARM64_REG_D0_D1_D2 = 292;
- public static final int ARM64_REG_D1_D2_D3 = 293;
- public static final int ARM64_REG_D2_D3_D4 = 294;
- public static final int ARM64_REG_D3_D4_D5 = 295;
- public static final int ARM64_REG_D4_D5_D6 = 296;
- public static final int ARM64_REG_D5_D6_D7 = 297;
- public static final int ARM64_REG_D6_D7_D8 = 298;
- public static final int ARM64_REG_D7_D8_D9 = 299;
- public static final int ARM64_REG_D8_D9_D10 = 300;
- public static final int ARM64_REG_D9_D10_D11 = 301;
- public static final int ARM64_REG_D10_D11_D12 = 302;
- public static final int ARM64_REG_D11_D12_D13 = 303;
- public static final int ARM64_REG_D12_D13_D14 = 304;
- public static final int ARM64_REG_D13_D14_D15 = 305;
- public static final int ARM64_REG_D14_D15_D16 = 306;
- public static final int ARM64_REG_D15_D16_D17 = 307;
- public static final int ARM64_REG_D16_D17_D18 = 308;
- public static final int ARM64_REG_D17_D18_D19 = 309;
- public static final int ARM64_REG_D18_D19_D20 = 310;
- public static final int ARM64_REG_D19_D20_D21 = 311;
- public static final int ARM64_REG_D20_D21_D22 = 312;
- public static final int ARM64_REG_D21_D22_D23 = 313;
- public static final int ARM64_REG_D22_D23_D24 = 314;
- public static final int ARM64_REG_D23_D24_D25 = 315;
- public static final int ARM64_REG_D24_D25_D26 = 316;
- public static final int ARM64_REG_D25_D26_D27 = 317;
- public static final int ARM64_REG_D26_D27_D28 = 318;
- public static final int ARM64_REG_D27_D28_D29 = 319;
- public static final int ARM64_REG_D28_D29_D30 = 320;
- public static final int ARM64_REG_D29_D30_D31 = 321;
- public static final int ARM64_REG_D30_D31_D0 = 322;
- public static final int ARM64_REG_D31_D0_D1 = 323;
- public static final int ARM64_REG_Q0_Q1_Q2 = 324;
- public static final int ARM64_REG_Q1_Q2_Q3 = 325;
- public static final int ARM64_REG_Q2_Q3_Q4 = 326;
- public static final int ARM64_REG_Q3_Q4_Q5 = 327;
- public static final int ARM64_REG_Q4_Q5_Q6 = 328;
- public static final int ARM64_REG_Q5_Q6_Q7 = 329;
- public static final int ARM64_REG_Q6_Q7_Q8 = 330;
- public static final int ARM64_REG_Q7_Q8_Q9 = 331;
- public static final int ARM64_REG_Q8_Q9_Q10 = 332;
- public static final int ARM64_REG_Q9_Q10_Q11 = 333;
- public static final int ARM64_REG_Q10_Q11_Q12 = 334;
- public static final int ARM64_REG_Q11_Q12_Q13 = 335;
- public static final int ARM64_REG_Q12_Q13_Q14 = 336;
- public static final int ARM64_REG_Q13_Q14_Q15 = 337;
- public static final int ARM64_REG_Q14_Q15_Q16 = 338;
- public static final int ARM64_REG_Q15_Q16_Q17 = 339;
- public static final int ARM64_REG_Q16_Q17_Q18 = 340;
- public static final int ARM64_REG_Q17_Q18_Q19 = 341;
- public static final int ARM64_REG_Q18_Q19_Q20 = 342;
- public static final int ARM64_REG_Q19_Q20_Q21 = 343;
- public static final int ARM64_REG_Q20_Q21_Q22 = 344;
- public static final int ARM64_REG_Q21_Q22_Q23 = 345;
- public static final int ARM64_REG_Q22_Q23_Q24 = 346;
- public static final int ARM64_REG_Q23_Q24_Q25 = 347;
- public static final int ARM64_REG_Q24_Q25_Q26 = 348;
- public static final int ARM64_REG_Q25_Q26_Q27 = 349;
- public static final int ARM64_REG_Q26_Q27_Q28 = 350;
- public static final int ARM64_REG_Q27_Q28_Q29 = 351;
- public static final int ARM64_REG_Q28_Q29_Q30 = 352;
- public static final int ARM64_REG_Q29_Q30_Q31 = 353;
- public static final int ARM64_REG_Q30_Q31_Q0 = 354;
- public static final int ARM64_REG_Q31_Q0_Q1 = 355;
- public static final int ARM64_REG_D0_D1_D2_D3 = 356;
- public static final int ARM64_REG_D1_D2_D3_D4 = 357;
- public static final int ARM64_REG_D2_D3_D4_D5 = 358;
- public static final int ARM64_REG_D3_D4_D5_D6 = 359;
- public static final int ARM64_REG_D4_D5_D6_D7 = 360;
- public static final int ARM64_REG_D5_D6_D7_D8 = 361;
- public static final int ARM64_REG_D6_D7_D8_D9 = 362;
- public static final int ARM64_REG_D7_D8_D9_D10 = 363;
- public static final int ARM64_REG_D8_D9_D10_D11 = 364;
- public static final int ARM64_REG_D9_D10_D11_D12 = 365;
- public static final int ARM64_REG_D10_D11_D12_D13 = 366;
- public static final int ARM64_REG_D11_D12_D13_D14 = 367;
- public static final int ARM64_REG_D12_D13_D14_D15 = 368;
- public static final int ARM64_REG_D13_D14_D15_D16 = 369;
- public static final int ARM64_REG_D14_D15_D16_D17 = 370;
- public static final int ARM64_REG_D15_D16_D17_D18 = 371;
- public static final int ARM64_REG_D16_D17_D18_D19 = 372;
- public static final int ARM64_REG_D17_D18_D19_D20 = 373;
- public static final int ARM64_REG_D18_D19_D20_D21 = 374;
- public static final int ARM64_REG_D19_D20_D21_D22 = 375;
- public static final int ARM64_REG_D20_D21_D22_D23 = 376;
- public static final int ARM64_REG_D21_D22_D23_D24 = 377;
- public static final int ARM64_REG_D22_D23_D24_D25 = 378;
- public static final int ARM64_REG_D23_D24_D25_D26 = 379;
- public static final int ARM64_REG_D24_D25_D26_D27 = 380;
- public static final int ARM64_REG_D25_D26_D27_D28 = 381;
- public static final int ARM64_REG_D26_D27_D28_D29 = 382;
- public static final int ARM64_REG_D27_D28_D29_D30 = 383;
- public static final int ARM64_REG_D28_D29_D30_D31 = 384;
- public static final int ARM64_REG_D29_D30_D31_D0 = 385;
- public static final int ARM64_REG_D30_D31_D0_D1 = 386;
- public static final int ARM64_REG_D31_D0_D1_D2 = 387;
- public static final int ARM64_REG_Q0_Q1_Q2_Q3 = 388;
- public static final int ARM64_REG_Q1_Q2_Q3_Q4 = 389;
- public static final int ARM64_REG_Q2_Q3_Q4_Q5 = 390;
- public static final int ARM64_REG_Q3_Q4_Q5_Q6 = 391;
- public static final int ARM64_REG_Q4_Q5_Q6_Q7 = 392;
- public static final int ARM64_REG_Q5_Q6_Q7_Q8 = 393;
- public static final int ARM64_REG_Q6_Q7_Q8_Q9 = 394;
- public static final int ARM64_REG_Q7_Q8_Q9_Q10 = 395;
- public static final int ARM64_REG_Q8_Q9_Q10_Q11 = 396;
- public static final int ARM64_REG_Q9_Q10_Q11_Q12 = 397;
- public static final int ARM64_REG_Q10_Q11_Q12_Q13 = 398;
- public static final int ARM64_REG_Q11_Q12_Q13_Q14 = 399;
- public static final int ARM64_REG_Q12_Q13_Q14_Q15 = 400;
- public static final int ARM64_REG_Q13_Q14_Q15_Q16 = 401;
- public static final int ARM64_REG_Q14_Q15_Q16_Q17 = 402;
- public static final int ARM64_REG_Q15_Q16_Q17_Q18 = 403;
- public static final int ARM64_REG_Q16_Q17_Q18_Q19 = 404;
- public static final int ARM64_REG_Q17_Q18_Q19_Q20 = 405;
- public static final int ARM64_REG_Q18_Q19_Q20_Q21 = 406;
- public static final int ARM64_REG_Q19_Q20_Q21_Q22 = 407;
- public static final int ARM64_REG_Q20_Q21_Q22_Q23 = 408;
- public static final int ARM64_REG_Q21_Q22_Q23_Q24 = 409;
- public static final int ARM64_REG_Q22_Q23_Q24_Q25 = 410;
- public static final int ARM64_REG_Q23_Q24_Q25_Q26 = 411;
- public static final int ARM64_REG_Q24_Q25_Q26_Q27 = 412;
- public static final int ARM64_REG_Q25_Q26_Q27_Q28 = 413;
- public static final int ARM64_REG_Q26_Q27_Q28_Q29 = 414;
- public static final int ARM64_REG_Q27_Q28_Q29_Q30 = 415;
- public static final int ARM64_REG_Q28_Q29_Q30_Q31 = 416;
- public static final int ARM64_REG_Q29_Q30_Q31_Q0 = 417;
- public static final int ARM64_REG_Q30_Q31_Q0_Q1 = 418;
- public static final int ARM64_REG_Q31_Q0_Q1_Q2 = 419;
- public static final int ARM64_REG_MAX = 420;
+ public static final int ARM64_REG_SP = 3;
+ public static final int ARM64_REG_B0 = 4;
+ public static final int ARM64_REG_B1 = 5;
+ public static final int ARM64_REG_B2 = 6;
+ public static final int ARM64_REG_B3 = 7;
+ public static final int ARM64_REG_B4 = 8;
+ public static final int ARM64_REG_B5 = 9;
+ public static final int ARM64_REG_B6 = 10;
+ public static final int ARM64_REG_B7 = 11;
+ public static final int ARM64_REG_B8 = 12;
+ public static final int ARM64_REG_B9 = 13;
+ public static final int ARM64_REG_B10 = 14;
+ public static final int ARM64_REG_B11 = 15;
+ public static final int ARM64_REG_B12 = 16;
+ public static final int ARM64_REG_B13 = 17;
+ public static final int ARM64_REG_B14 = 18;
+ public static final int ARM64_REG_B15 = 19;
+ public static final int ARM64_REG_B16 = 20;
+ public static final int ARM64_REG_B17 = 21;
+ public static final int ARM64_REG_B18 = 22;
+ public static final int ARM64_REG_B19 = 23;
+ public static final int ARM64_REG_B20 = 24;
+ public static final int ARM64_REG_B21 = 25;
+ public static final int ARM64_REG_B22 = 26;
+ public static final int ARM64_REG_B23 = 27;
+ public static final int ARM64_REG_B24 = 28;
+ public static final int ARM64_REG_B25 = 29;
+ public static final int ARM64_REG_B26 = 30;
+ public static final int ARM64_REG_B27 = 31;
+ public static final int ARM64_REG_B28 = 32;
+ public static final int ARM64_REG_B29 = 33;
+ public static final int ARM64_REG_B30 = 34;
+ public static final int ARM64_REG_B31 = 35;
+ public static final int ARM64_REG_D0 = 36;
+ public static final int ARM64_REG_D1 = 37;
+ public static final int ARM64_REG_D2 = 38;
+ public static final int ARM64_REG_D3 = 39;
+ public static final int ARM64_REG_D4 = 40;
+ public static final int ARM64_REG_D5 = 41;
+ public static final int ARM64_REG_D6 = 42;
+ public static final int ARM64_REG_D7 = 43;
+ public static final int ARM64_REG_D8 = 44;
+ public static final int ARM64_REG_D9 = 45;
+ public static final int ARM64_REG_D10 = 46;
+ public static final int ARM64_REG_D11 = 47;
+ public static final int ARM64_REG_D12 = 48;
+ public static final int ARM64_REG_D13 = 49;
+ public static final int ARM64_REG_D14 = 50;
+ public static final int ARM64_REG_D15 = 51;
+ public static final int ARM64_REG_D16 = 52;
+ public static final int ARM64_REG_D17 = 53;
+ public static final int ARM64_REG_D18 = 54;
+ public static final int ARM64_REG_D19 = 55;
+ public static final int ARM64_REG_D20 = 56;
+ public static final int ARM64_REG_D21 = 57;
+ public static final int ARM64_REG_D22 = 58;
+ public static final int ARM64_REG_D23 = 59;
+ public static final int ARM64_REG_D24 = 60;
+ public static final int ARM64_REG_D25 = 61;
+ public static final int ARM64_REG_D26 = 62;
+ public static final int ARM64_REG_D27 = 63;
+ public static final int ARM64_REG_D28 = 64;
+ public static final int ARM64_REG_D29 = 65;
+ public static final int ARM64_REG_D30 = 66;
+ public static final int ARM64_REG_D31 = 67;
+ public static final int ARM64_REG_H0 = 68;
+ public static final int ARM64_REG_H1 = 69;
+ public static final int ARM64_REG_H2 = 70;
+ public static final int ARM64_REG_H3 = 71;
+ public static final int ARM64_REG_H4 = 72;
+ public static final int ARM64_REG_H5 = 73;
+ public static final int ARM64_REG_H6 = 74;
+ public static final int ARM64_REG_H7 = 75;
+ public static final int ARM64_REG_H8 = 76;
+ public static final int ARM64_REG_H9 = 77;
+ public static final int ARM64_REG_H10 = 78;
+ public static final int ARM64_REG_H11 = 79;
+ public static final int ARM64_REG_H12 = 80;
+ public static final int ARM64_REG_H13 = 81;
+ public static final int ARM64_REG_H14 = 82;
+ public static final int ARM64_REG_H15 = 83;
+ public static final int ARM64_REG_H16 = 84;
+ public static final int ARM64_REG_H17 = 85;
+ public static final int ARM64_REG_H18 = 86;
+ public static final int ARM64_REG_H19 = 87;
+ public static final int ARM64_REG_H20 = 88;
+ public static final int ARM64_REG_H21 = 89;
+ public static final int ARM64_REG_H22 = 90;
+ public static final int ARM64_REG_H23 = 91;
+ public static final int ARM64_REG_H24 = 92;
+ public static final int ARM64_REG_H25 = 93;
+ public static final int ARM64_REG_H26 = 94;
+ public static final int ARM64_REG_H27 = 95;
+ public static final int ARM64_REG_H28 = 96;
+ public static final int ARM64_REG_H29 = 97;
+ public static final int ARM64_REG_H30 = 98;
+ public static final int ARM64_REG_H31 = 99;
+ public static final int ARM64_REG_Q0 = 100;
+ public static final int ARM64_REG_Q1 = 101;
+ public static final int ARM64_REG_Q2 = 102;
+ public static final int ARM64_REG_Q3 = 103;
+ public static final int ARM64_REG_Q4 = 104;
+ public static final int ARM64_REG_Q5 = 105;
+ public static final int ARM64_REG_Q6 = 106;
+ public static final int ARM64_REG_Q7 = 107;
+ public static final int ARM64_REG_Q8 = 108;
+ public static final int ARM64_REG_Q9 = 109;
+ public static final int ARM64_REG_Q10 = 110;
+ public static final int ARM64_REG_Q11 = 111;
+ public static final int ARM64_REG_Q12 = 112;
+ public static final int ARM64_REG_Q13 = 113;
+ public static final int ARM64_REG_Q14 = 114;
+ public static final int ARM64_REG_Q15 = 115;
+ public static final int ARM64_REG_Q16 = 116;
+ public static final int ARM64_REG_Q17 = 117;
+ public static final int ARM64_REG_Q18 = 118;
+ public static final int ARM64_REG_Q19 = 119;
+ public static final int ARM64_REG_Q20 = 120;
+ public static final int ARM64_REG_Q21 = 121;
+ public static final int ARM64_REG_Q22 = 122;
+ public static final int ARM64_REG_Q23 = 123;
+ public static final int ARM64_REG_Q24 = 124;
+ public static final int ARM64_REG_Q25 = 125;
+ public static final int ARM64_REG_Q26 = 126;
+ public static final int ARM64_REG_Q27 = 127;
+ public static final int ARM64_REG_Q28 = 128;
+ public static final int ARM64_REG_Q29 = 129;
+ public static final int ARM64_REG_Q30 = 130;
+ public static final int ARM64_REG_Q31 = 131;
+ public static final int ARM64_REG_S0 = 132;
+ public static final int ARM64_REG_S1 = 133;
+ public static final int ARM64_REG_S2 = 134;
+ public static final int ARM64_REG_S3 = 135;
+ public static final int ARM64_REG_S4 = 136;
+ public static final int ARM64_REG_S5 = 137;
+ public static final int ARM64_REG_S6 = 138;
+ public static final int ARM64_REG_S7 = 139;
+ public static final int ARM64_REG_S8 = 140;
+ public static final int ARM64_REG_S9 = 141;
+ public static final int ARM64_REG_S10 = 142;
+ public static final int ARM64_REG_S11 = 143;
+ public static final int ARM64_REG_S12 = 144;
+ public static final int ARM64_REG_S13 = 145;
+ public static final int ARM64_REG_S14 = 146;
+ public static final int ARM64_REG_S15 = 147;
+ public static final int ARM64_REG_S16 = 148;
+ public static final int ARM64_REG_S17 = 149;
+ public static final int ARM64_REG_S18 = 150;
+ public static final int ARM64_REG_S19 = 151;
+ public static final int ARM64_REG_S20 = 152;
+ public static final int ARM64_REG_S21 = 153;
+ public static final int ARM64_REG_S22 = 154;
+ public static final int ARM64_REG_S23 = 155;
+ public static final int ARM64_REG_S24 = 156;
+ public static final int ARM64_REG_S25 = 157;
+ public static final int ARM64_REG_S26 = 158;
+ public static final int ARM64_REG_S27 = 159;
+ public static final int ARM64_REG_S28 = 160;
+ public static final int ARM64_REG_S29 = 161;
+ public static final int ARM64_REG_S30 = 162;
+ public static final int ARM64_REG_S31 = 163;
+ public static final int ARM64_REG_W0 = 164;
+ public static final int ARM64_REG_W1 = 165;
+ public static final int ARM64_REG_W2 = 166;
+ public static final int ARM64_REG_W3 = 167;
+ public static final int ARM64_REG_W4 = 168;
+ public static final int ARM64_REG_W5 = 169;
+ public static final int ARM64_REG_W6 = 170;
+ public static final int ARM64_REG_W7 = 171;
+ public static final int ARM64_REG_W8 = 172;
+ public static final int ARM64_REG_W9 = 173;
+ public static final int ARM64_REG_W10 = 174;
+ public static final int ARM64_REG_W11 = 175;
+ public static final int ARM64_REG_W12 = 176;
+ public static final int ARM64_REG_W13 = 177;
+ public static final int ARM64_REG_W14 = 178;
+ public static final int ARM64_REG_W15 = 179;
+ public static final int ARM64_REG_W16 = 180;
+ public static final int ARM64_REG_W17 = 181;
+ public static final int ARM64_REG_W18 = 182;
+ public static final int ARM64_REG_W19 = 183;
+ public static final int ARM64_REG_W20 = 184;
+ public static final int ARM64_REG_W21 = 185;
+ public static final int ARM64_REG_W22 = 186;
+ public static final int ARM64_REG_W23 = 187;
+ public static final int ARM64_REG_W24 = 188;
+ public static final int ARM64_REG_W25 = 189;
+ public static final int ARM64_REG_W26 = 190;
+ public static final int ARM64_REG_W27 = 191;
+ public static final int ARM64_REG_W28 = 192;
+ public static final int ARM64_REG_W29 = 193;
+ public static final int ARM64_REG_W30 = 194;
+ public static final int ARM64_REG_X0 = 195;
+ public static final int ARM64_REG_X1 = 196;
+ public static final int ARM64_REG_X2 = 197;
+ public static final int ARM64_REG_X3 = 198;
+ public static final int ARM64_REG_X4 = 199;
+ public static final int ARM64_REG_X5 = 200;
+ public static final int ARM64_REG_X6 = 201;
+ public static final int ARM64_REG_X7 = 202;
+ public static final int ARM64_REG_X8 = 203;
+ public static final int ARM64_REG_X9 = 204;
+ public static final int ARM64_REG_X10 = 205;
+ public static final int ARM64_REG_X11 = 206;
+ public static final int ARM64_REG_X12 = 207;
+ public static final int ARM64_REG_X13 = 208;
+ public static final int ARM64_REG_X14 = 209;
+ public static final int ARM64_REG_X15 = 210;
+ public static final int ARM64_REG_X16 = 211;
+ public static final int ARM64_REG_X17 = 212;
+ public static final int ARM64_REG_X18 = 213;
+ public static final int ARM64_REG_X19 = 214;
+ public static final int ARM64_REG_X20 = 215;
+ public static final int ARM64_REG_X21 = 216;
+ public static final int ARM64_REG_X22 = 217;
+ public static final int ARM64_REG_X23 = 218;
+ public static final int ARM64_REG_X24 = 219;
+ public static final int ARM64_REG_X25 = 220;
+ public static final int ARM64_REG_X26 = 221;
+ public static final int ARM64_REG_X27 = 222;
+ public static final int ARM64_REG_X28 = 223;
+ public static final int ARM64_REG_X29 = 224;
+ public static final int ARM64_REG_X30 = 225;
+ public static final int ARM64_REG_MAX = 226;
+
+ // alias registers
+ public static final int ARM64_REG_IP1 = ARM64_REG_X16;
+ public static final int ARM64_REG_IP0 = ARM64_REG_X17;
+ public static final int ARM64_REG_FP = ARM64_REG_X29;
+ public static final int ARM64_REG_LR = ARM64_REG_X30;
+ public static final int ARM64_REG_XZR = ARM64_REG_SP;
+ public static final int ARM64_REG_WZR = ARM64_REG_WSP;
// ARM64 instruction
+
public static final int ARM64_INS_INVALID = 0;
public static final int ARM64_INS_ABS = 1;
public static final int ARM64_INS_ADC = 2;
@@ -922,6 +742,7 @@
public static final int ARM64_INS_MAX = 446;
// Group of ARM64 instructions
+
public static final int ARM64_GRP_INVALID = 0;
public static final int ARM64_GRP_CRYPTO = 1;
public static final int ARM64_GRP_FPARMV8 = 2;
diff --git a/bindings/java/capstone/Arm_const.java b/bindings/java/capstone/Arm_const.java
index 5d02ffd..240705e 100644
--- a/bindings/java/capstone/Arm_const.java
+++ b/bindings/java/capstone/Arm_const.java
@@ -4,6 +4,7 @@
public class Arm_const {
// ARM shift type
+
public static final int ARM_SFT_INVALID = 0;
public static final int ARM_SFT_ASR = 1;
public static final int ARM_SFT_LSL = 2;
@@ -17,6 +18,7 @@
public static final int ARM_SFT_RRX_REG = 10;
// ARM condition code
+
public static final int ARM_CC_INVALID = 0;
public static final int ARM_CC_EQ = 1;
public static final int ARM_CC_NE = 2;
@@ -35,6 +37,7 @@
public static final int ARM_CC_AL = 15;
// Operand type for instruction's operands
+
public static final int ARM_OP_INVALID = 0;
public static final int ARM_OP_REG = 1;
public static final int ARM_OP_CIMM = 2;
@@ -44,6 +47,7 @@
public static final int ARM_OP_MEM = 6;
// ARM registers
+
public static final int ARM_REG_INVALID = 0;
public static final int ARM_REG_APSR = 1;
public static final int ARM_REG_APSR_NZCV = 2;
@@ -161,6 +165,7 @@
public static final int ARM_REG_R15 = ARM_REG_PC;
// ARM instruction
+
public static final int ARM_INS_INVALID = 0;
public static final int ARM_INS_ADC = 1;
public static final int ARM_INS_ADD = 2;
@@ -586,6 +591,7 @@
public static final int ARM_INS_MAX = 422;
// Group of ARM instructions
+
public static final int ARM_GRP_INVALID = 0;
public static final int ARM_GRP_CRYPTO = 1;
public static final int ARM_GRP_DATABARRIER = 2;
diff --git a/bindings/java/capstone/Mips_const.java b/bindings/java/capstone/Mips_const.java
index 5f5a259..fb72159 100644
--- a/bindings/java/capstone/Mips_const.java
+++ b/bindings/java/capstone/Mips_const.java
@@ -4,12 +4,14 @@
public class Mips_const {
// Operand type for instruction's operands
+
public static final int MIPS_OP_INVALID = 0;
public static final int MIPS_OP_REG = 1;
public static final int MIPS_OP_IMM = 2;
public static final int MIPS_OP_MEM = 3;
// MIPS registers
+
public static final int MIPS_REG_INVALID = 0;
public static final int MIPS_REG_0 = 1;
public static final int MIPS_REG_1 = 2;
@@ -177,6 +179,7 @@
public static final int MIPS_REG_LO3 = MIPS_REG_HI3;
// MIPS instruction
+
public static final int MIPS_INS_INVALID = 0;
public static final int MIPS_INS_ABSQ_S = 1;
public static final int MIPS_INS_ADD = 2;
@@ -637,6 +640,7 @@
public static final int MIPS_INS_MAX = 457;
// Group of MIPS instructions
+
public static final int MIPS_GRP_INVALID = 0;
public static final int MIPS_GRP_BITCOUNT = 1;
public static final int MIPS_GRP_DSP = 2;
diff --git a/bindings/java/capstone/X86_const.java b/bindings/java/capstone/X86_const.java
index d063d75..4476dd8 100644
--- a/bindings/java/capstone/X86_const.java
+++ b/bindings/java/capstone/X86_const.java
@@ -4,6 +4,7 @@
public class X86_const {
// X86 registers
+
public static final int X86_REG_INVALID = 0;
public static final int X86_REG_AH = 1;
public static final int X86_REG_AL = 2;
@@ -240,6 +241,7 @@
public static final int X86_REG_MAX = 233;
// Operand type for instruction's operands
+
public static final int X86_OP_INVALID = 0;
public static final int X86_OP_REG = 1;
public static final int X86_OP_IMM = 2;
@@ -247,6 +249,7 @@
public static final int X86_OP_MEM = 4;
// X86 instructions
+
public static final int X86_INS_INVALID = 0;
public static final int X86_INS_AAA = 1;
public static final int X86_INS_AAD = 2;
@@ -1496,6 +1499,7 @@
public static final int X86_INS_MAX = 1246;
// Group of X86 instructions
+
public static final int X86_GRP_INVALID = 0;
public static final int X86_GRP_3DNOW = 1;
public static final int X86_GRP_AES = 2;
diff --git a/bindings/python/capstone/arm64_const.py b/bindings/python/capstone/arm64_const.py
index 62cd339..bc7709c 100644
--- a/bindings/python/capstone/arm64_const.py
+++ b/bindings/python/capstone/arm64_const.py
@@ -1,6 +1,7 @@
# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64_const.py]
# ARM64 shift type
+
ARM64_SFT_INVALID = 0
ARM64_SFT_LSL = 1
ARM64_SFT_MSL = 2
@@ -9,6 +10,7 @@
ARM64_SFT_ROR = 5
# ARM64 extender type
+
ARM64_EXT_INVALID = 0
ARM64_EXT_UXTB = 1
ARM64_EXT_UXTH = 2
@@ -20,6 +22,7 @@
ARM64_EXT_SXTX = 8
# ARM64 condition code
+
ARM64_CC_INVALID = 0
ARM64_CC_EQ = 1
ARM64_CC_NE = 2
@@ -39,6 +42,7 @@
ARM64_CC_NV = 16
# Operand type for instruction's operands
+
ARM64_OP_INVALID = 0
ARM64_OP_REG = 1
ARM64_OP_CIMM = 2
@@ -47,429 +51,245 @@
ARM64_OP_MEM = 5
# ARM64 registers
+
ARM64_REG_INVALID = 0
ARM64_REG_NZCV = 1
ARM64_REG_WSP = 2
-ARM64_REG_WZR = 3
-ARM64_REG_SP = 4
-ARM64_REG_XZR = 5
-ARM64_REG_B0 = 6
-ARM64_REG_B1 = 7
-ARM64_REG_B2 = 8
-ARM64_REG_B3 = 9
-ARM64_REG_B4 = 10
-ARM64_REG_B5 = 11
-ARM64_REG_B6 = 12
-ARM64_REG_B7 = 13
-ARM64_REG_B8 = 14
-ARM64_REG_B9 = 15
-ARM64_REG_B10 = 16
-ARM64_REG_B11 = 17
-ARM64_REG_B12 = 18
-ARM64_REG_B13 = 19
-ARM64_REG_B14 = 20
-ARM64_REG_B15 = 21
-ARM64_REG_B16 = 22
-ARM64_REG_B17 = 23
-ARM64_REG_B18 = 24
-ARM64_REG_B19 = 25
-ARM64_REG_B20 = 26
-ARM64_REG_B21 = 27
-ARM64_REG_B22 = 28
-ARM64_REG_B23 = 29
-ARM64_REG_B24 = 30
-ARM64_REG_B25 = 31
-ARM64_REG_B26 = 32
-ARM64_REG_B27 = 33
-ARM64_REG_B28 = 34
-ARM64_REG_B29 = 35
-ARM64_REG_B30 = 36
-ARM64_REG_B31 = 37
-ARM64_REG_D0 = 38
-ARM64_REG_D1 = 39
-ARM64_REG_D2 = 40
-ARM64_REG_D3 = 41
-ARM64_REG_D4 = 42
-ARM64_REG_D5 = 43
-ARM64_REG_D6 = 44
-ARM64_REG_D7 = 45
-ARM64_REG_D8 = 46
-ARM64_REG_D9 = 47
-ARM64_REG_D10 = 48
-ARM64_REG_D11 = 49
-ARM64_REG_D12 = 50
-ARM64_REG_D13 = 51
-ARM64_REG_D14 = 52
-ARM64_REG_D15 = 53
-ARM64_REG_D16 = 54
-ARM64_REG_D17 = 55
-ARM64_REG_D18 = 56
-ARM64_REG_D19 = 57
-ARM64_REG_D20 = 58
-ARM64_REG_D21 = 59
-ARM64_REG_D22 = 60
-ARM64_REG_D23 = 61
-ARM64_REG_D24 = 62
-ARM64_REG_D25 = 63
-ARM64_REG_D26 = 64
-ARM64_REG_D27 = 65
-ARM64_REG_D28 = 66
-ARM64_REG_D29 = 67
-ARM64_REG_D30 = 68
-ARM64_REG_D31 = 69
-ARM64_REG_H0 = 70
-ARM64_REG_H1 = 71
-ARM64_REG_H2 = 72
-ARM64_REG_H3 = 73
-ARM64_REG_H4 = 74
-ARM64_REG_H5 = 75
-ARM64_REG_H6 = 76
-ARM64_REG_H7 = 77
-ARM64_REG_H8 = 78
-ARM64_REG_H9 = 79
-ARM64_REG_H10 = 80
-ARM64_REG_H11 = 81
-ARM64_REG_H12 = 82
-ARM64_REG_H13 = 83
-ARM64_REG_H14 = 84
-ARM64_REG_H15 = 85
-ARM64_REG_H16 = 86
-ARM64_REG_H17 = 87
-ARM64_REG_H18 = 88
-ARM64_REG_H19 = 89
-ARM64_REG_H20 = 90
-ARM64_REG_H21 = 91
-ARM64_REG_H22 = 92
-ARM64_REG_H23 = 93
-ARM64_REG_H24 = 94
-ARM64_REG_H25 = 95
-ARM64_REG_H26 = 96
-ARM64_REG_H27 = 97
-ARM64_REG_H28 = 98
-ARM64_REG_H29 = 99
-ARM64_REG_H30 = 100
-ARM64_REG_H31 = 101
-ARM64_REG_Q0 = 102
-ARM64_REG_Q1 = 103
-ARM64_REG_Q2 = 104
-ARM64_REG_Q3 = 105
-ARM64_REG_Q4 = 106
-ARM64_REG_Q5 = 107
-ARM64_REG_Q6 = 108
-ARM64_REG_Q7 = 109
-ARM64_REG_Q8 = 110
-ARM64_REG_Q9 = 111
-ARM64_REG_Q10 = 112
-ARM64_REG_Q11 = 113
-ARM64_REG_Q12 = 114
-ARM64_REG_Q13 = 115
-ARM64_REG_Q14 = 116
-ARM64_REG_Q15 = 117
-ARM64_REG_Q16 = 118
-ARM64_REG_Q17 = 119
-ARM64_REG_Q18 = 120
-ARM64_REG_Q19 = 121
-ARM64_REG_Q20 = 122
-ARM64_REG_Q21 = 123
-ARM64_REG_Q22 = 124
-ARM64_REG_Q23 = 125
-ARM64_REG_Q24 = 126
-ARM64_REG_Q25 = 127
-ARM64_REG_Q26 = 128
-ARM64_REG_Q27 = 129
-ARM64_REG_Q28 = 130
-ARM64_REG_Q29 = 131
-ARM64_REG_Q30 = 132
-ARM64_REG_Q31 = 133
-ARM64_REG_S0 = 134
-ARM64_REG_S1 = 135
-ARM64_REG_S2 = 136
-ARM64_REG_S3 = 137
-ARM64_REG_S4 = 138
-ARM64_REG_S5 = 139
-ARM64_REG_S6 = 140
-ARM64_REG_S7 = 141
-ARM64_REG_S8 = 142
-ARM64_REG_S9 = 143
-ARM64_REG_S10 = 144
-ARM64_REG_S11 = 145
-ARM64_REG_S12 = 146
-ARM64_REG_S13 = 147
-ARM64_REG_S14 = 148
-ARM64_REG_S15 = 149
-ARM64_REG_S16 = 150
-ARM64_REG_S17 = 151
-ARM64_REG_S18 = 152
-ARM64_REG_S19 = 153
-ARM64_REG_S20 = 154
-ARM64_REG_S21 = 155
-ARM64_REG_S22 = 156
-ARM64_REG_S23 = 157
-ARM64_REG_S24 = 158
-ARM64_REG_S25 = 159
-ARM64_REG_S26 = 160
-ARM64_REG_S27 = 161
-ARM64_REG_S28 = 162
-ARM64_REG_S29 = 163
-ARM64_REG_S30 = 164
-ARM64_REG_S31 = 165
-ARM64_REG_W0 = 166
-ARM64_REG_W1 = 167
-ARM64_REG_W2 = 168
-ARM64_REG_W3 = 169
-ARM64_REG_W4 = 170
-ARM64_REG_W5 = 171
-ARM64_REG_W6 = 172
-ARM64_REG_W7 = 173
-ARM64_REG_W8 = 174
-ARM64_REG_W9 = 175
-ARM64_REG_W10 = 176
-ARM64_REG_W11 = 177
-ARM64_REG_W12 = 178
-ARM64_REG_W13 = 179
-ARM64_REG_W14 = 180
-ARM64_REG_W15 = 181
-ARM64_REG_W16 = 182
-ARM64_REG_W17 = 183
-ARM64_REG_W18 = 184
-ARM64_REG_W19 = 185
-ARM64_REG_W20 = 186
-ARM64_REG_W21 = 187
-ARM64_REG_W22 = 188
-ARM64_REG_W23 = 189
-ARM64_REG_W24 = 190
-ARM64_REG_W25 = 191
-ARM64_REG_W26 = 192
-ARM64_REG_W27 = 193
-ARM64_REG_W28 = 194
-ARM64_REG_W29 = 195
-ARM64_REG_W30 = 196
-ARM64_REG_X0 = 197
-ARM64_REG_X1 = 198
-ARM64_REG_X2 = 199
-ARM64_REG_X3 = 200
-ARM64_REG_X4 = 201
-ARM64_REG_X5 = 202
-ARM64_REG_X6 = 203
-ARM64_REG_X7 = 204
-ARM64_REG_X8 = 205
-ARM64_REG_X9 = 206
-ARM64_REG_X10 = 207
-ARM64_REG_X11 = 208
-ARM64_REG_X12 = 209
-ARM64_REG_X13 = 210
-ARM64_REG_X14 = 211
-ARM64_REG_X15 = 212
-ARM64_REG_X16 = 213
-ARM64_REG_X17 = 214
-ARM64_REG_X18 = 215
-ARM64_REG_X19 = 216
-ARM64_REG_X20 = 217
-ARM64_REG_X21 = 218
-ARM64_REG_X22 = 219
-ARM64_REG_X23 = 220
-ARM64_REG_X24 = 221
-ARM64_REG_X25 = 222
-ARM64_REG_X26 = 223
-ARM64_REG_X27 = 224
-ARM64_REG_X28 = 225
-ARM64_REG_X29 = 226
-ARM64_REG_X30 = 227
-ARM64_REG_D0_D1 = 228
-ARM64_REG_D1_D2 = 229
-ARM64_REG_D2_D3 = 230
-ARM64_REG_D3_D4 = 231
-ARM64_REG_D4_D5 = 232
-ARM64_REG_D5_D6 = 233
-ARM64_REG_D6_D7 = 234
-ARM64_REG_D7_D8 = 235
-ARM64_REG_D8_D9 = 236
-ARM64_REG_D9_D10 = 237
-ARM64_REG_D10_D11 = 238
-ARM64_REG_D11_D12 = 239
-ARM64_REG_D12_D13 = 240
-ARM64_REG_D13_D14 = 241
-ARM64_REG_D14_D15 = 242
-ARM64_REG_D15_D16 = 243
-ARM64_REG_D16_D17 = 244
-ARM64_REG_D17_D18 = 245
-ARM64_REG_D18_D19 = 246
-ARM64_REG_D19_D20 = 247
-ARM64_REG_D20_D21 = 248
-ARM64_REG_D21_D22 = 249
-ARM64_REG_D22_D23 = 250
-ARM64_REG_D23_D24 = 251
-ARM64_REG_D24_D25 = 252
-ARM64_REG_D25_D26 = 253
-ARM64_REG_D26_D27 = 254
-ARM64_REG_D27_D28 = 255
-ARM64_REG_D28_D29 = 256
-ARM64_REG_D29_D30 = 257
-ARM64_REG_D30_D31 = 258
-ARM64_REG_D31_D0 = 259
-ARM64_REG_Q0_Q1 = 260
-ARM64_REG_Q1_Q2 = 261
-ARM64_REG_Q2_Q3 = 262
-ARM64_REG_Q3_Q4 = 263
-ARM64_REG_Q4_Q5 = 264
-ARM64_REG_Q5_Q6 = 265
-ARM64_REG_Q6_Q7 = 266
-ARM64_REG_Q7_Q8 = 267
-ARM64_REG_Q8_Q9 = 268
-ARM64_REG_Q9_Q10 = 269
-ARM64_REG_Q10_Q11 = 270
-ARM64_REG_Q11_Q12 = 271
-ARM64_REG_Q12_Q13 = 272
-ARM64_REG_Q13_Q14 = 273
-ARM64_REG_Q14_Q15 = 274
-ARM64_REG_Q15_Q16 = 275
-ARM64_REG_Q16_Q17 = 276
-ARM64_REG_Q17_Q18 = 277
-ARM64_REG_Q18_Q19 = 278
-ARM64_REG_Q19_Q20 = 279
-ARM64_REG_Q20_Q21 = 280
-ARM64_REG_Q21_Q22 = 281
-ARM64_REG_Q22_Q23 = 282
-ARM64_REG_Q23_Q24 = 283
-ARM64_REG_Q24_Q25 = 284
-ARM64_REG_Q25_Q26 = 285
-ARM64_REG_Q26_Q27 = 286
-ARM64_REG_Q27_Q28 = 287
-ARM64_REG_Q28_Q29 = 288
-ARM64_REG_Q29_Q30 = 289
-ARM64_REG_Q30_Q31 = 290
-ARM64_REG_Q31_Q0 = 291
-ARM64_REG_D0_D1_D2 = 292
-ARM64_REG_D1_D2_D3 = 293
-ARM64_REG_D2_D3_D4 = 294
-ARM64_REG_D3_D4_D5 = 295
-ARM64_REG_D4_D5_D6 = 296
-ARM64_REG_D5_D6_D7 = 297
-ARM64_REG_D6_D7_D8 = 298
-ARM64_REG_D7_D8_D9 = 299
-ARM64_REG_D8_D9_D10 = 300
-ARM64_REG_D9_D10_D11 = 301
-ARM64_REG_D10_D11_D12 = 302
-ARM64_REG_D11_D12_D13 = 303
-ARM64_REG_D12_D13_D14 = 304
-ARM64_REG_D13_D14_D15 = 305
-ARM64_REG_D14_D15_D16 = 306
-ARM64_REG_D15_D16_D17 = 307
-ARM64_REG_D16_D17_D18 = 308
-ARM64_REG_D17_D18_D19 = 309
-ARM64_REG_D18_D19_D20 = 310
-ARM64_REG_D19_D20_D21 = 311
-ARM64_REG_D20_D21_D22 = 312
-ARM64_REG_D21_D22_D23 = 313
-ARM64_REG_D22_D23_D24 = 314
-ARM64_REG_D23_D24_D25 = 315
-ARM64_REG_D24_D25_D26 = 316
-ARM64_REG_D25_D26_D27 = 317
-ARM64_REG_D26_D27_D28 = 318
-ARM64_REG_D27_D28_D29 = 319
-ARM64_REG_D28_D29_D30 = 320
-ARM64_REG_D29_D30_D31 = 321
-ARM64_REG_D30_D31_D0 = 322
-ARM64_REG_D31_D0_D1 = 323
-ARM64_REG_Q0_Q1_Q2 = 324
-ARM64_REG_Q1_Q2_Q3 = 325
-ARM64_REG_Q2_Q3_Q4 = 326
-ARM64_REG_Q3_Q4_Q5 = 327
-ARM64_REG_Q4_Q5_Q6 = 328
-ARM64_REG_Q5_Q6_Q7 = 329
-ARM64_REG_Q6_Q7_Q8 = 330
-ARM64_REG_Q7_Q8_Q9 = 331
-ARM64_REG_Q8_Q9_Q10 = 332
-ARM64_REG_Q9_Q10_Q11 = 333
-ARM64_REG_Q10_Q11_Q12 = 334
-ARM64_REG_Q11_Q12_Q13 = 335
-ARM64_REG_Q12_Q13_Q14 = 336
-ARM64_REG_Q13_Q14_Q15 = 337
-ARM64_REG_Q14_Q15_Q16 = 338
-ARM64_REG_Q15_Q16_Q17 = 339
-ARM64_REG_Q16_Q17_Q18 = 340
-ARM64_REG_Q17_Q18_Q19 = 341
-ARM64_REG_Q18_Q19_Q20 = 342
-ARM64_REG_Q19_Q20_Q21 = 343
-ARM64_REG_Q20_Q21_Q22 = 344
-ARM64_REG_Q21_Q22_Q23 = 345
-ARM64_REG_Q22_Q23_Q24 = 346
-ARM64_REG_Q23_Q24_Q25 = 347
-ARM64_REG_Q24_Q25_Q26 = 348
-ARM64_REG_Q25_Q26_Q27 = 349
-ARM64_REG_Q26_Q27_Q28 = 350
-ARM64_REG_Q27_Q28_Q29 = 351
-ARM64_REG_Q28_Q29_Q30 = 352
-ARM64_REG_Q29_Q30_Q31 = 353
-ARM64_REG_Q30_Q31_Q0 = 354
-ARM64_REG_Q31_Q0_Q1 = 355
-ARM64_REG_D0_D1_D2_D3 = 356
-ARM64_REG_D1_D2_D3_D4 = 357
-ARM64_REG_D2_D3_D4_D5 = 358
-ARM64_REG_D3_D4_D5_D6 = 359
-ARM64_REG_D4_D5_D6_D7 = 360
-ARM64_REG_D5_D6_D7_D8 = 361
-ARM64_REG_D6_D7_D8_D9 = 362
-ARM64_REG_D7_D8_D9_D10 = 363
-ARM64_REG_D8_D9_D10_D11 = 364
-ARM64_REG_D9_D10_D11_D12 = 365
-ARM64_REG_D10_D11_D12_D13 = 366
-ARM64_REG_D11_D12_D13_D14 = 367
-ARM64_REG_D12_D13_D14_D15 = 368
-ARM64_REG_D13_D14_D15_D16 = 369
-ARM64_REG_D14_D15_D16_D17 = 370
-ARM64_REG_D15_D16_D17_D18 = 371
-ARM64_REG_D16_D17_D18_D19 = 372
-ARM64_REG_D17_D18_D19_D20 = 373
-ARM64_REG_D18_D19_D20_D21 = 374
-ARM64_REG_D19_D20_D21_D22 = 375
-ARM64_REG_D20_D21_D22_D23 = 376
-ARM64_REG_D21_D22_D23_D24 = 377
-ARM64_REG_D22_D23_D24_D25 = 378
-ARM64_REG_D23_D24_D25_D26 = 379
-ARM64_REG_D24_D25_D26_D27 = 380
-ARM64_REG_D25_D26_D27_D28 = 381
-ARM64_REG_D26_D27_D28_D29 = 382
-ARM64_REG_D27_D28_D29_D30 = 383
-ARM64_REG_D28_D29_D30_D31 = 384
-ARM64_REG_D29_D30_D31_D0 = 385
-ARM64_REG_D30_D31_D0_D1 = 386
-ARM64_REG_D31_D0_D1_D2 = 387
-ARM64_REG_Q0_Q1_Q2_Q3 = 388
-ARM64_REG_Q1_Q2_Q3_Q4 = 389
-ARM64_REG_Q2_Q3_Q4_Q5 = 390
-ARM64_REG_Q3_Q4_Q5_Q6 = 391
-ARM64_REG_Q4_Q5_Q6_Q7 = 392
-ARM64_REG_Q5_Q6_Q7_Q8 = 393
-ARM64_REG_Q6_Q7_Q8_Q9 = 394
-ARM64_REG_Q7_Q8_Q9_Q10 = 395
-ARM64_REG_Q8_Q9_Q10_Q11 = 396
-ARM64_REG_Q9_Q10_Q11_Q12 = 397
-ARM64_REG_Q10_Q11_Q12_Q13 = 398
-ARM64_REG_Q11_Q12_Q13_Q14 = 399
-ARM64_REG_Q12_Q13_Q14_Q15 = 400
-ARM64_REG_Q13_Q14_Q15_Q16 = 401
-ARM64_REG_Q14_Q15_Q16_Q17 = 402
-ARM64_REG_Q15_Q16_Q17_Q18 = 403
-ARM64_REG_Q16_Q17_Q18_Q19 = 404
-ARM64_REG_Q17_Q18_Q19_Q20 = 405
-ARM64_REG_Q18_Q19_Q20_Q21 = 406
-ARM64_REG_Q19_Q20_Q21_Q22 = 407
-ARM64_REG_Q20_Q21_Q22_Q23 = 408
-ARM64_REG_Q21_Q22_Q23_Q24 = 409
-ARM64_REG_Q22_Q23_Q24_Q25 = 410
-ARM64_REG_Q23_Q24_Q25_Q26 = 411
-ARM64_REG_Q24_Q25_Q26_Q27 = 412
-ARM64_REG_Q25_Q26_Q27_Q28 = 413
-ARM64_REG_Q26_Q27_Q28_Q29 = 414
-ARM64_REG_Q27_Q28_Q29_Q30 = 415
-ARM64_REG_Q28_Q29_Q30_Q31 = 416
-ARM64_REG_Q29_Q30_Q31_Q0 = 417
-ARM64_REG_Q30_Q31_Q0_Q1 = 418
-ARM64_REG_Q31_Q0_Q1_Q2 = 419
-ARM64_REG_MAX = 420
+ARM64_REG_SP = 3
+ARM64_REG_B0 = 4
+ARM64_REG_B1 = 5
+ARM64_REG_B2 = 6
+ARM64_REG_B3 = 7
+ARM64_REG_B4 = 8
+ARM64_REG_B5 = 9
+ARM64_REG_B6 = 10
+ARM64_REG_B7 = 11
+ARM64_REG_B8 = 12
+ARM64_REG_B9 = 13
+ARM64_REG_B10 = 14
+ARM64_REG_B11 = 15
+ARM64_REG_B12 = 16
+ARM64_REG_B13 = 17
+ARM64_REG_B14 = 18
+ARM64_REG_B15 = 19
+ARM64_REG_B16 = 20
+ARM64_REG_B17 = 21
+ARM64_REG_B18 = 22
+ARM64_REG_B19 = 23
+ARM64_REG_B20 = 24
+ARM64_REG_B21 = 25
+ARM64_REG_B22 = 26
+ARM64_REG_B23 = 27
+ARM64_REG_B24 = 28
+ARM64_REG_B25 = 29
+ARM64_REG_B26 = 30
+ARM64_REG_B27 = 31
+ARM64_REG_B28 = 32
+ARM64_REG_B29 = 33
+ARM64_REG_B30 = 34
+ARM64_REG_B31 = 35
+ARM64_REG_D0 = 36
+ARM64_REG_D1 = 37
+ARM64_REG_D2 = 38
+ARM64_REG_D3 = 39
+ARM64_REG_D4 = 40
+ARM64_REG_D5 = 41
+ARM64_REG_D6 = 42
+ARM64_REG_D7 = 43
+ARM64_REG_D8 = 44
+ARM64_REG_D9 = 45
+ARM64_REG_D10 = 46
+ARM64_REG_D11 = 47
+ARM64_REG_D12 = 48
+ARM64_REG_D13 = 49
+ARM64_REG_D14 = 50
+ARM64_REG_D15 = 51
+ARM64_REG_D16 = 52
+ARM64_REG_D17 = 53
+ARM64_REG_D18 = 54
+ARM64_REG_D19 = 55
+ARM64_REG_D20 = 56
+ARM64_REG_D21 = 57
+ARM64_REG_D22 = 58
+ARM64_REG_D23 = 59
+ARM64_REG_D24 = 60
+ARM64_REG_D25 = 61
+ARM64_REG_D26 = 62
+ARM64_REG_D27 = 63
+ARM64_REG_D28 = 64
+ARM64_REG_D29 = 65
+ARM64_REG_D30 = 66
+ARM64_REG_D31 = 67
+ARM64_REG_H0 = 68
+ARM64_REG_H1 = 69
+ARM64_REG_H2 = 70
+ARM64_REG_H3 = 71
+ARM64_REG_H4 = 72
+ARM64_REG_H5 = 73
+ARM64_REG_H6 = 74
+ARM64_REG_H7 = 75
+ARM64_REG_H8 = 76
+ARM64_REG_H9 = 77
+ARM64_REG_H10 = 78
+ARM64_REG_H11 = 79
+ARM64_REG_H12 = 80
+ARM64_REG_H13 = 81
+ARM64_REG_H14 = 82
+ARM64_REG_H15 = 83
+ARM64_REG_H16 = 84
+ARM64_REG_H17 = 85
+ARM64_REG_H18 = 86
+ARM64_REG_H19 = 87
+ARM64_REG_H20 = 88
+ARM64_REG_H21 = 89
+ARM64_REG_H22 = 90
+ARM64_REG_H23 = 91
+ARM64_REG_H24 = 92
+ARM64_REG_H25 = 93
+ARM64_REG_H26 = 94
+ARM64_REG_H27 = 95
+ARM64_REG_H28 = 96
+ARM64_REG_H29 = 97
+ARM64_REG_H30 = 98
+ARM64_REG_H31 = 99
+ARM64_REG_Q0 = 100
+ARM64_REG_Q1 = 101
+ARM64_REG_Q2 = 102
+ARM64_REG_Q3 = 103
+ARM64_REG_Q4 = 104
+ARM64_REG_Q5 = 105
+ARM64_REG_Q6 = 106
+ARM64_REG_Q7 = 107
+ARM64_REG_Q8 = 108
+ARM64_REG_Q9 = 109
+ARM64_REG_Q10 = 110
+ARM64_REG_Q11 = 111
+ARM64_REG_Q12 = 112
+ARM64_REG_Q13 = 113
+ARM64_REG_Q14 = 114
+ARM64_REG_Q15 = 115
+ARM64_REG_Q16 = 116
+ARM64_REG_Q17 = 117
+ARM64_REG_Q18 = 118
+ARM64_REG_Q19 = 119
+ARM64_REG_Q20 = 120
+ARM64_REG_Q21 = 121
+ARM64_REG_Q22 = 122
+ARM64_REG_Q23 = 123
+ARM64_REG_Q24 = 124
+ARM64_REG_Q25 = 125
+ARM64_REG_Q26 = 126
+ARM64_REG_Q27 = 127
+ARM64_REG_Q28 = 128
+ARM64_REG_Q29 = 129
+ARM64_REG_Q30 = 130
+ARM64_REG_Q31 = 131
+ARM64_REG_S0 = 132
+ARM64_REG_S1 = 133
+ARM64_REG_S2 = 134
+ARM64_REG_S3 = 135
+ARM64_REG_S4 = 136
+ARM64_REG_S5 = 137
+ARM64_REG_S6 = 138
+ARM64_REG_S7 = 139
+ARM64_REG_S8 = 140
+ARM64_REG_S9 = 141
+ARM64_REG_S10 = 142
+ARM64_REG_S11 = 143
+ARM64_REG_S12 = 144
+ARM64_REG_S13 = 145
+ARM64_REG_S14 = 146
+ARM64_REG_S15 = 147
+ARM64_REG_S16 = 148
+ARM64_REG_S17 = 149
+ARM64_REG_S18 = 150
+ARM64_REG_S19 = 151
+ARM64_REG_S20 = 152
+ARM64_REG_S21 = 153
+ARM64_REG_S22 = 154
+ARM64_REG_S23 = 155
+ARM64_REG_S24 = 156
+ARM64_REG_S25 = 157
+ARM64_REG_S26 = 158
+ARM64_REG_S27 = 159
+ARM64_REG_S28 = 160
+ARM64_REG_S29 = 161
+ARM64_REG_S30 = 162
+ARM64_REG_S31 = 163
+ARM64_REG_W0 = 164
+ARM64_REG_W1 = 165
+ARM64_REG_W2 = 166
+ARM64_REG_W3 = 167
+ARM64_REG_W4 = 168
+ARM64_REG_W5 = 169
+ARM64_REG_W6 = 170
+ARM64_REG_W7 = 171
+ARM64_REG_W8 = 172
+ARM64_REG_W9 = 173
+ARM64_REG_W10 = 174
+ARM64_REG_W11 = 175
+ARM64_REG_W12 = 176
+ARM64_REG_W13 = 177
+ARM64_REG_W14 = 178
+ARM64_REG_W15 = 179
+ARM64_REG_W16 = 180
+ARM64_REG_W17 = 181
+ARM64_REG_W18 = 182
+ARM64_REG_W19 = 183
+ARM64_REG_W20 = 184
+ARM64_REG_W21 = 185
+ARM64_REG_W22 = 186
+ARM64_REG_W23 = 187
+ARM64_REG_W24 = 188
+ARM64_REG_W25 = 189
+ARM64_REG_W26 = 190
+ARM64_REG_W27 = 191
+ARM64_REG_W28 = 192
+ARM64_REG_W29 = 193
+ARM64_REG_W30 = 194
+ARM64_REG_X0 = 195
+ARM64_REG_X1 = 196
+ARM64_REG_X2 = 197
+ARM64_REG_X3 = 198
+ARM64_REG_X4 = 199
+ARM64_REG_X5 = 200
+ARM64_REG_X6 = 201
+ARM64_REG_X7 = 202
+ARM64_REG_X8 = 203
+ARM64_REG_X9 = 204
+ARM64_REG_X10 = 205
+ARM64_REG_X11 = 206
+ARM64_REG_X12 = 207
+ARM64_REG_X13 = 208
+ARM64_REG_X14 = 209
+ARM64_REG_X15 = 210
+ARM64_REG_X16 = 211
+ARM64_REG_X17 = 212
+ARM64_REG_X18 = 213
+ARM64_REG_X19 = 214
+ARM64_REG_X20 = 215
+ARM64_REG_X21 = 216
+ARM64_REG_X22 = 217
+ARM64_REG_X23 = 218
+ARM64_REG_X24 = 219
+ARM64_REG_X25 = 220
+ARM64_REG_X26 = 221
+ARM64_REG_X27 = 222
+ARM64_REG_X28 = 223
+ARM64_REG_X29 = 224
+ARM64_REG_X30 = 225
+ARM64_REG_MAX = 226
+
+# alias registers
+ARM64_REG_IP1 = ARM64_REG_X16
+ARM64_REG_IP0 = ARM64_REG_X17
+ARM64_REG_FP = ARM64_REG_X29
+ARM64_REG_LR = ARM64_REG_X30
+ARM64_REG_XZR = ARM64_REG_SP
+ARM64_REG_WZR = ARM64_REG_WSP
# ARM64 instruction
+
ARM64_INS_INVALID = 0
ARM64_INS_ABS = 1
ARM64_INS_ADC = 2
@@ -919,6 +739,7 @@
ARM64_INS_MAX = 446
# Group of ARM64 instructions
+
ARM64_GRP_INVALID = 0
ARM64_GRP_CRYPTO = 1
ARM64_GRP_FPARMV8 = 2
diff --git a/bindings/python/capstone/arm_const.py b/bindings/python/capstone/arm_const.py
index e1d1e82..776a8ff 100644
--- a/bindings/python/capstone/arm_const.py
+++ b/bindings/python/capstone/arm_const.py
@@ -1,6 +1,7 @@
# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.py]
# ARM shift type
+
ARM_SFT_INVALID = 0
ARM_SFT_ASR = 1
ARM_SFT_LSL = 2
@@ -14,6 +15,7 @@
ARM_SFT_RRX_REG = 10
# ARM condition code
+
ARM_CC_INVALID = 0
ARM_CC_EQ = 1
ARM_CC_NE = 2
@@ -32,6 +34,7 @@
ARM_CC_AL = 15
# Operand type for instruction's operands
+
ARM_OP_INVALID = 0
ARM_OP_REG = 1
ARM_OP_CIMM = 2
@@ -41,6 +44,7 @@
ARM_OP_MEM = 6
# ARM registers
+
ARM_REG_INVALID = 0
ARM_REG_APSR = 1
ARM_REG_APSR_NZCV = 2
@@ -158,6 +162,7 @@
ARM_REG_R15 = ARM_REG_PC
# ARM instruction
+
ARM_INS_INVALID = 0
ARM_INS_ADC = 1
ARM_INS_ADD = 2
@@ -583,6 +588,7 @@
ARM_INS_MAX = 422
# Group of ARM instructions
+
ARM_GRP_INVALID = 0
ARM_GRP_CRYPTO = 1
ARM_GRP_DATABARRIER = 2
diff --git a/bindings/python/capstone/mips_const.py b/bindings/python/capstone/mips_const.py
index 7b3665e..74b6216 100644
--- a/bindings/python/capstone/mips_const.py
+++ b/bindings/python/capstone/mips_const.py
@@ -1,12 +1,14 @@
# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.py]
# Operand type for instruction's operands
+
MIPS_OP_INVALID = 0
MIPS_OP_REG = 1
MIPS_OP_IMM = 2
MIPS_OP_MEM = 3
# MIPS registers
+
MIPS_REG_INVALID = 0
MIPS_REG_0 = 1
MIPS_REG_1 = 2
@@ -174,6 +176,7 @@
MIPS_REG_LO3 = MIPS_REG_HI3
# MIPS instruction
+
MIPS_INS_INVALID = 0
MIPS_INS_ABSQ_S = 1
MIPS_INS_ADD = 2
@@ -634,6 +637,7 @@
MIPS_INS_MAX = 457
# Group of MIPS instructions
+
MIPS_GRP_INVALID = 0
MIPS_GRP_BITCOUNT = 1
MIPS_GRP_DSP = 2
diff --git a/bindings/python/capstone/x86_const.py b/bindings/python/capstone/x86_const.py
index 39435ff..bcfad6f 100644
--- a/bindings/python/capstone/x86_const.py
+++ b/bindings/python/capstone/x86_const.py
@@ -1,6 +1,7 @@
# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86_const.py]
# X86 registers
+
X86_REG_INVALID = 0
X86_REG_AH = 1
X86_REG_AL = 2
@@ -237,6 +238,7 @@
X86_REG_MAX = 233
# Operand type for instruction's operands
+
X86_OP_INVALID = 0
X86_OP_REG = 1
X86_OP_IMM = 2
@@ -244,6 +246,7 @@
X86_OP_MEM = 4
# X86 instructions
+
X86_INS_INVALID = 0
X86_INS_AAA = 1
X86_INS_AAD = 2
@@ -1493,6 +1496,7 @@
X86_INS_MAX = 1246
# Group of X86 instructions
+
X86_GRP_INVALID = 0
X86_GRP_3DNOW = 1
X86_GRP_AES = 2
diff --git a/include/arm64.h b/include/arm64.h
index 746aed2..5527195 100644
--- a/include/arm64.h
+++ b/include/arm64.h
@@ -110,9 +110,7 @@
ARM64_REG_NZCV,
ARM64_REG_WSP,
- ARM64_REG_WZR,
ARM64_REG_SP,
- ARM64_REG_XZR,
ARM64_REG_B0,
ARM64_REG_B1,
ARM64_REG_B2,
@@ -335,200 +333,17 @@
ARM64_REG_X28,
ARM64_REG_X29,
ARM64_REG_X30,
- ARM64_REG_D0_D1,
- ARM64_REG_D1_D2,
- ARM64_REG_D2_D3,
- ARM64_REG_D3_D4,
- ARM64_REG_D4_D5,
- ARM64_REG_D5_D6,
- ARM64_REG_D6_D7,
- ARM64_REG_D7_D8,
- ARM64_REG_D8_D9,
- ARM64_REG_D9_D10,
- ARM64_REG_D10_D11,
- ARM64_REG_D11_D12,
- ARM64_REG_D12_D13,
- ARM64_REG_D13_D14,
- ARM64_REG_D14_D15,
- ARM64_REG_D15_D16,
- ARM64_REG_D16_D17,
- ARM64_REG_D17_D18,
- ARM64_REG_D18_D19,
- ARM64_REG_D19_D20,
- ARM64_REG_D20_D21,
- ARM64_REG_D21_D22,
- ARM64_REG_D22_D23,
- ARM64_REG_D23_D24,
- ARM64_REG_D24_D25,
- ARM64_REG_D25_D26,
- ARM64_REG_D26_D27,
- ARM64_REG_D27_D28,
- ARM64_REG_D28_D29,
- ARM64_REG_D29_D30,
- ARM64_REG_D30_D31,
- ARM64_REG_D31_D0,
- ARM64_REG_Q0_Q1,
- ARM64_REG_Q1_Q2,
- ARM64_REG_Q2_Q3,
- ARM64_REG_Q3_Q4,
- ARM64_REG_Q4_Q5,
- ARM64_REG_Q5_Q6,
- ARM64_REG_Q6_Q7,
- ARM64_REG_Q7_Q8,
- ARM64_REG_Q8_Q9,
- ARM64_REG_Q9_Q10,
- ARM64_REG_Q10_Q11,
- ARM64_REG_Q11_Q12,
- ARM64_REG_Q12_Q13,
- ARM64_REG_Q13_Q14,
- ARM64_REG_Q14_Q15,
- ARM64_REG_Q15_Q16,
- ARM64_REG_Q16_Q17,
- ARM64_REG_Q17_Q18,
- ARM64_REG_Q18_Q19,
- ARM64_REG_Q19_Q20,
- ARM64_REG_Q20_Q21,
- ARM64_REG_Q21_Q22,
- ARM64_REG_Q22_Q23,
- ARM64_REG_Q23_Q24,
- ARM64_REG_Q24_Q25,
- ARM64_REG_Q25_Q26,
- ARM64_REG_Q26_Q27,
- ARM64_REG_Q27_Q28,
- ARM64_REG_Q28_Q29,
- ARM64_REG_Q29_Q30,
- ARM64_REG_Q30_Q31,
- ARM64_REG_Q31_Q0,
- ARM64_REG_D0_D1_D2,
- ARM64_REG_D1_D2_D3,
- ARM64_REG_D2_D3_D4,
- ARM64_REG_D3_D4_D5,
- ARM64_REG_D4_D5_D6,
- ARM64_REG_D5_D6_D7,
- ARM64_REG_D6_D7_D8,
- ARM64_REG_D7_D8_D9,
- ARM64_REG_D8_D9_D10,
- ARM64_REG_D9_D10_D11,
- ARM64_REG_D10_D11_D12,
- ARM64_REG_D11_D12_D13,
- ARM64_REG_D12_D13_D14,
- ARM64_REG_D13_D14_D15,
- ARM64_REG_D14_D15_D16,
- ARM64_REG_D15_D16_D17,
- ARM64_REG_D16_D17_D18,
- ARM64_REG_D17_D18_D19,
- ARM64_REG_D18_D19_D20,
- ARM64_REG_D19_D20_D21,
- ARM64_REG_D20_D21_D22,
- ARM64_REG_D21_D22_D23,
- ARM64_REG_D22_D23_D24,
- ARM64_REG_D23_D24_D25,
- ARM64_REG_D24_D25_D26,
- ARM64_REG_D25_D26_D27,
- ARM64_REG_D26_D27_D28,
- ARM64_REG_D27_D28_D29,
- ARM64_REG_D28_D29_D30,
- ARM64_REG_D29_D30_D31,
- ARM64_REG_D30_D31_D0,
- ARM64_REG_D31_D0_D1,
- ARM64_REG_Q0_Q1_Q2,
- ARM64_REG_Q1_Q2_Q3,
- ARM64_REG_Q2_Q3_Q4,
- ARM64_REG_Q3_Q4_Q5,
- ARM64_REG_Q4_Q5_Q6,
- ARM64_REG_Q5_Q6_Q7,
- ARM64_REG_Q6_Q7_Q8,
- ARM64_REG_Q7_Q8_Q9,
- ARM64_REG_Q8_Q9_Q10,
- ARM64_REG_Q9_Q10_Q11,
- ARM64_REG_Q10_Q11_Q12,
- ARM64_REG_Q11_Q12_Q13,
- ARM64_REG_Q12_Q13_Q14,
- ARM64_REG_Q13_Q14_Q15,
- ARM64_REG_Q14_Q15_Q16,
- ARM64_REG_Q15_Q16_Q17,
- ARM64_REG_Q16_Q17_Q18,
- ARM64_REG_Q17_Q18_Q19,
- ARM64_REG_Q18_Q19_Q20,
- ARM64_REG_Q19_Q20_Q21,
- ARM64_REG_Q20_Q21_Q22,
- ARM64_REG_Q21_Q22_Q23,
- ARM64_REG_Q22_Q23_Q24,
- ARM64_REG_Q23_Q24_Q25,
- ARM64_REG_Q24_Q25_Q26,
- ARM64_REG_Q25_Q26_Q27,
- ARM64_REG_Q26_Q27_Q28,
- ARM64_REG_Q27_Q28_Q29,
- ARM64_REG_Q28_Q29_Q30,
- ARM64_REG_Q29_Q30_Q31,
- ARM64_REG_Q30_Q31_Q0,
- ARM64_REG_Q31_Q0_Q1,
- ARM64_REG_D0_D1_D2_D3,
- ARM64_REG_D1_D2_D3_D4,
- ARM64_REG_D2_D3_D4_D5,
- ARM64_REG_D3_D4_D5_D6,
- ARM64_REG_D4_D5_D6_D7,
- ARM64_REG_D5_D6_D7_D8,
- ARM64_REG_D6_D7_D8_D9,
- ARM64_REG_D7_D8_D9_D10,
- ARM64_REG_D8_D9_D10_D11,
- ARM64_REG_D9_D10_D11_D12,
- ARM64_REG_D10_D11_D12_D13,
- ARM64_REG_D11_D12_D13_D14,
- ARM64_REG_D12_D13_D14_D15,
- ARM64_REG_D13_D14_D15_D16,
- ARM64_REG_D14_D15_D16_D17,
- ARM64_REG_D15_D16_D17_D18,
- ARM64_REG_D16_D17_D18_D19,
- ARM64_REG_D17_D18_D19_D20,
- ARM64_REG_D18_D19_D20_D21,
- ARM64_REG_D19_D20_D21_D22,
- ARM64_REG_D20_D21_D22_D23,
- ARM64_REG_D21_D22_D23_D24,
- ARM64_REG_D22_D23_D24_D25,
- ARM64_REG_D23_D24_D25_D26,
- ARM64_REG_D24_D25_D26_D27,
- ARM64_REG_D25_D26_D27_D28,
- ARM64_REG_D26_D27_D28_D29,
- ARM64_REG_D27_D28_D29_D30,
- ARM64_REG_D28_D29_D30_D31,
- ARM64_REG_D29_D30_D31_D0,
- ARM64_REG_D30_D31_D0_D1,
- ARM64_REG_D31_D0_D1_D2,
- ARM64_REG_Q0_Q1_Q2_Q3,
- ARM64_REG_Q1_Q2_Q3_Q4,
- ARM64_REG_Q2_Q3_Q4_Q5,
- ARM64_REG_Q3_Q4_Q5_Q6,
- ARM64_REG_Q4_Q5_Q6_Q7,
- ARM64_REG_Q5_Q6_Q7_Q8,
- ARM64_REG_Q6_Q7_Q8_Q9,
- ARM64_REG_Q7_Q8_Q9_Q10,
- ARM64_REG_Q8_Q9_Q10_Q11,
- ARM64_REG_Q9_Q10_Q11_Q12,
- ARM64_REG_Q10_Q11_Q12_Q13,
- ARM64_REG_Q11_Q12_Q13_Q14,
- ARM64_REG_Q12_Q13_Q14_Q15,
- ARM64_REG_Q13_Q14_Q15_Q16,
- ARM64_REG_Q14_Q15_Q16_Q17,
- ARM64_REG_Q15_Q16_Q17_Q18,
- ARM64_REG_Q16_Q17_Q18_Q19,
- ARM64_REG_Q17_Q18_Q19_Q20,
- ARM64_REG_Q18_Q19_Q20_Q21,
- ARM64_REG_Q19_Q20_Q21_Q22,
- ARM64_REG_Q20_Q21_Q22_Q23,
- ARM64_REG_Q21_Q22_Q23_Q24,
- ARM64_REG_Q22_Q23_Q24_Q25,
- ARM64_REG_Q23_Q24_Q25_Q26,
- ARM64_REG_Q24_Q25_Q26_Q27,
- ARM64_REG_Q25_Q26_Q27_Q28,
- ARM64_REG_Q26_Q27_Q28_Q29,
- ARM64_REG_Q27_Q28_Q29_Q30,
- ARM64_REG_Q28_Q29_Q30_Q31,
- ARM64_REG_Q29_Q30_Q31_Q0,
- ARM64_REG_Q30_Q31_Q0_Q1,
- ARM64_REG_Q31_Q0_Q1_Q2,
ARM64_REG_MAX, // <-- mark the end of the list of registers
+
+ //> alias registers
+
+ ARM64_REG_IP1 = ARM64_REG_X16,
+ ARM64_REG_IP0 = ARM64_REG_X17,
+ ARM64_REG_FP = ARM64_REG_X29,
+ ARM64_REG_LR = ARM64_REG_X30,
+ ARM64_REG_XZR = ARM64_REG_SP,
+ ARM64_REG_WZR = ARM64_REG_WSP,
} arm64_reg;
//> ARM64 instruction