x86: add @rex to cs_x86 struct. updated python & java binding for this change
diff --git a/arch/X86/X86Disassembler.c b/arch/X86/X86Disassembler.c
index f073947..7a6ff44 100644
--- a/arch/X86/X86Disassembler.c
+++ b/arch/X86/X86Disassembler.c
@@ -689,6 +689,8 @@
 		}
 	}
 
+	pub->detail->x86.rex = inter->rexPrefix;
+
 	pub->detail->x86.addr_size = inter->addressSize;
 
 	pub->detail->x86.modrm = inter->orgModRM;
diff --git a/bindings/java/TestX86.java b/bindings/java/TestX86.java
index b12cb0b..1c17038 100644
--- a/bindings/java/TestX86.java
+++ b/bindings/java/TestX86.java
@@ -49,6 +49,9 @@
 
     System.out.printf("\tOpcode: %s\n", array2hex(operands.opcode));
 
+    // print REX prefix (non-zero value is relevant for x86_64)
+    System.out.printf("\trex: 0x%x\n", operands.rex);
+
     // print address size
     System.out.printf("\taddr_size: %d\n", operands.addrSize);
 
diff --git a/bindings/java/capstone/X86.java b/bindings/java/capstone/X86.java
index 28f66a8..2ed1545 100644
--- a/bindings/java/capstone/X86.java
+++ b/bindings/java/capstone/X86.java
@@ -69,6 +69,7 @@
   public static class UnionOpInfo extends Capstone.UnionOpInfo {
     public byte [] prefix;
     public byte [] opcode;
+    public byte rex;
     public byte addr_size;
     public byte modrm;
     public byte sib;
@@ -93,7 +94,7 @@
 
     @Override
     public List getFieldOrder() {
-      return Arrays.asList("prefix", "opcode", "addr_size",
+      return Arrays.asList("prefix", "opcode", "rex", "addr_size",
           "modrm", "sib", "disp", "sib_index", "sib_scale", "sib_base", "sse_cc", "avx_cc", "avx_sae", "avx_rm", "op_count", "op");
     }
   }
@@ -119,6 +120,7 @@
     public OpInfo(UnionOpInfo e) {
       prefix = e.prefix;
       opcode = e.opcode;
+      rex = e.rex;
       addrSize = e.addr_size;
       modrm = e.modrm;
       sib = e.sib;
diff --git a/bindings/python/capstone/__init__.py b/bindings/python/capstone/__init__.py
index a63e8ce..bfdec4c 100644
--- a/bindings/python/capstone/__init__.py
+++ b/bindings/python/capstone/__init__.py
@@ -471,7 +471,7 @@
             (self.cc, self.update_flags, self.writeback, self.operands) = \
                 arm64.get_arch_info(self._detail.arch.arm64)
         elif arch == CS_ARCH_X86:
-            (self.prefix, self.opcode, self.addr_size, \
+            (self.prefix, self.opcode, self.rex, self.addr_size, \
                 self.modrm, self.sib, self.disp, \
                 self.sib_index, self.sib_scale, self.sib_base, self.sse_cc, \
                 self.avx_cc, self.avx_sae, self.avx_rm, self.operands) = x86.get_arch_info(self._detail.arch.x86)
diff --git a/bindings/python/capstone/x86.py b/bindings/python/capstone/x86.py
index eb913fc..97c7898 100644
--- a/bindings/python/capstone/x86.py
+++ b/bindings/python/capstone/x86.py
@@ -51,6 +51,7 @@
     _fields_ = (
         ('prefix', ctypes.c_uint8 * 4),
         ('opcode', ctypes.c_uint8 * 4),
+        ('rex', ctypes.c_uint8),
         ('addr_size', ctypes.c_uint8),
         ('modrm', ctypes.c_uint8),
         ('sib', ctypes.c_uint8),
@@ -67,7 +68,7 @@
     )
 
 def get_arch_info(a):
-    return (a.prefix[:], a.opcode[:], a.addr_size, \
+    return (a.prefix[:], a.opcode[:], a.rex, a.addr_size, \
             a.modrm, a.sib, a.disp, a.sib_index, a.sib_scale, \
             a.sib_base, a.sse_cc, a.avx_cc, a.avx_sae, a.avx_rm, \
             copy.deepcopy(a.operands[:a.op_count]))
diff --git a/bindings/python/test_x86.py b/bindings/python/test_x86.py
index f389fe0..6d2aa50 100755
--- a/bindings/python/test_x86.py
+++ b/bindings/python/test_x86.py
@@ -39,7 +39,10 @@
     # print instruction's opcode
     print_string_hex("\tOpcode:", insn.opcode)
 
-    # print operand's size, address size, displacement size & immediate size
+    # print operand's REX prefix (non-zero value is relavant for x86_64 instructions)
+    print("\trex: 0x%x" % (insn.rex))
+
+    # print operand's address size
     print("\taddr_size: %u" % (insn.addr_size))
 
     # print modRM byte
diff --git a/include/x86.h b/include/x86.h
index 50e0648..a56de3e 100644
--- a/include/x86.h
+++ b/include/x86.h
@@ -188,9 +188,12 @@
 
 	// Instruction opcode, wich can be from 1 to 3 bytes in size.
 	// This contains VEX opcode as well.
-	// An opcode byte gets value 0 when irrelevant.
+	// An trailing opcode byte gets value 0 when irrelevant.
 	uint8_t opcode[4];
 
+	// REX prefix: only a non-zero value is relavant for x86_64
+	uint8_t rex;
+
 	// Address size, which can be overrided with above prefix[5].
 	uint8_t addr_size;
 
diff --git a/tests/test_x86.c b/tests/test_x86.c
index 280d5d5..96ffdc9 100644
--- a/tests/test_x86.c
+++ b/tests/test_x86.c
@@ -45,6 +45,9 @@
 	print_string_hex("\tPrefix:", x86->prefix, 4);
 
 	print_string_hex("\tOpcode:", x86->opcode, 4);
+
+	printf("\trex: 0x%x\n", x86->rex);
+
 	printf("\taddr_size: %u\n", x86->addr_size);
 	printf("\tmodrm: 0x%x\n", x86->modrm);
 	printf("\tdisp: 0x%x\n", x86->disp);