core: put insns[] into separate .inc files to make it easier to manage
diff --git a/arch/AArch64/AArch64Mapping.c b/arch/AArch64/AArch64Mapping.c
index c80bb8b..b5eed13 100644
--- a/arch/AArch64/AArch64Mapping.c
+++ b/arch/AArch64/AArch64Mapping.c
@@ -301,13968 +301,7 @@
#endif
},
- {
- AArch64_ABSv16i8, ARM64_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ABSv1i64, ARM64_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ABSv2i32, ARM64_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ABSv2i64, ARM64_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ABSv4i16, ARM64_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ABSv4i32, ARM64_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ABSv8i16, ARM64_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ABSv8i8, ARM64_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADCSWr, ARM64_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADCSXr, ARM64_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADCWr, ARM64_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADCXr, ARM64_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDHNv2i64_v2i32, ARM64_INS_ADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDHNv2i64_v4i32, ARM64_INS_ADDHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDHNv4i32_v4i16, ARM64_INS_ADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDHNv4i32_v8i16, ARM64_INS_ADDHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDHNv8i16_v16i8, ARM64_INS_ADDHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDHNv8i16_v8i8, ARM64_INS_ADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDPv16i8, ARM64_INS_ADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDPv2i32, ARM64_INS_ADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDPv2i64, ARM64_INS_ADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDPv2i64p, ARM64_INS_ADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDPv4i16, ARM64_INS_ADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDPv4i32, ARM64_INS_ADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDPv8i16, ARM64_INS_ADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDPv8i8, ARM64_INS_ADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSWri, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSWrs, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSWrx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSXri, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSXrs, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSXrx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDSXrx64, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDVv16i8v, ARM64_INS_ADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDVv4i16v, ARM64_INS_ADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDVv4i32v, ARM64_INS_ADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDVv8i16v, ARM64_INS_ADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDVv8i8v, ARM64_INS_ADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDWri, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDWrs, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDWrx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDXri, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDXrs, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDXrx, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDXrx64, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDv16i8, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDv1i64, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDv2i32, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDv2i64, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDv4i16, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDv4i32, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDv8i16, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADDv8i8, ARM64_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADR, ARM64_INS_ADR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ADRP, ARM64_INS_ADRP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_AESDrr, ARM64_INS_AESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_AESErr, ARM64_INS_AESE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_AESIMCrr, ARM64_INS_AESIMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_AESMCrr, ARM64_INS_AESMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSWri, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSWrs, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSXri, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDSXrs, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDWri, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDWrs, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDXri, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDXrs, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDv16i8, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ANDv8i8, ARM64_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ASRVWr, ARM64_INS_ASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ASRVXr, ARM64_INS_ASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_B, ARM64_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_BFMWri, ARM64_INS_BFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BFMXri, ARM64_INS_BFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICSWrs, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICSXrs, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICWrs, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICXrs, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICv16i8, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICv2i32, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICv4i16, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICv4i32, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICv8i16, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BICv8i8, ARM64_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BIFv16i8, ARM64_INS_BIF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BIFv8i8, ARM64_INS_BIF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BITv16i8, ARM64_INS_BIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BITv8i8, ARM64_INS_BIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BL, ARM64_INS_BL,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BLR, ARM64_INS_BLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BR, ARM64_INS_BR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- AArch64_BRK, ARM64_INS_BRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_BSLv16i8, ARM64_INS_BSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_BSLv8i8, ARM64_INS_BSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_Bcc, ARM64_INS_B,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_CBNZW, ARM64_INS_CBNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_CBNZX, ARM64_INS_CBNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_CBZW, ARM64_INS_CBZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_CBZX, ARM64_INS_CBZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_CCMNWi, ARM64_INS_CCMN,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CCMNWr, ARM64_INS_CCMN,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CCMNXi, ARM64_INS_CCMN,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CCMNXr, ARM64_INS_CCMN,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CCMPWi, ARM64_INS_CCMP,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CCMPWr, ARM64_INS_CCMP,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CCMPXi, ARM64_INS_CCMP,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CCMPXr, ARM64_INS_CCMP,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLREX, ARM64_INS_CLREX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLSWr, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLSXr, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLSv16i8, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLSv2i32, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLSv4i16, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLSv4i32, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLSv8i16, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLSv8i8, ARM64_INS_CLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLZWr, ARM64_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLZXr, ARM64_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLZv16i8, ARM64_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLZv2i32, ARM64_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLZv4i16, ARM64_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLZv4i32, ARM64_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLZv8i16, ARM64_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CLZv8i8, ARM64_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv16i8, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv16i8rz, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv1i64, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv1i64rz, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv2i32, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv2i32rz, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv2i64, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv2i64rz, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv4i16, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv4i16rz, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv4i32, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv4i32rz, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv8i16, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv8i16rz, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv8i8, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMEQv8i8rz, ARM64_INS_CMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv16i8, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv16i8rz, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv1i64, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv1i64rz, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv2i32, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv2i32rz, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv2i64, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv2i64rz, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv4i16, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv4i16rz, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv4i32, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv4i32rz, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv8i16, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv8i16rz, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv8i8, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGEv8i8rz, ARM64_INS_CMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv16i8, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv16i8rz, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv1i64, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv1i64rz, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv2i32, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv2i32rz, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv2i64, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv2i64rz, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv4i16, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv4i16rz, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv4i32, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv4i32rz, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv8i16, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv8i16rz, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv8i8, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMGTv8i8rz, ARM64_INS_CMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHIv16i8, ARM64_INS_CMHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHIv1i64, ARM64_INS_CMHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHIv2i32, ARM64_INS_CMHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHIv2i64, ARM64_INS_CMHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHIv4i16, ARM64_INS_CMHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHIv4i32, ARM64_INS_CMHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHIv8i16, ARM64_INS_CMHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHIv8i8, ARM64_INS_CMHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHSv16i8, ARM64_INS_CMHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHSv1i64, ARM64_INS_CMHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHSv2i32, ARM64_INS_CMHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHSv2i64, ARM64_INS_CMHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHSv4i16, ARM64_INS_CMHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHSv4i32, ARM64_INS_CMHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHSv8i16, ARM64_INS_CMHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMHSv8i8, ARM64_INS_CMHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLEv16i8rz, ARM64_INS_CMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLEv1i64rz, ARM64_INS_CMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLEv2i32rz, ARM64_INS_CMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLEv2i64rz, ARM64_INS_CMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLEv4i16rz, ARM64_INS_CMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLEv4i32rz, ARM64_INS_CMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLEv8i16rz, ARM64_INS_CMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLEv8i8rz, ARM64_INS_CMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLTv16i8rz, ARM64_INS_CMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLTv1i64rz, ARM64_INS_CMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLTv2i32rz, ARM64_INS_CMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLTv2i64rz, ARM64_INS_CMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLTv4i16rz, ARM64_INS_CMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLTv4i32rz, ARM64_INS_CMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLTv8i16rz, ARM64_INS_CMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMLTv8i8rz, ARM64_INS_CMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMTSTv16i8, ARM64_INS_CMTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMTSTv1i64, ARM64_INS_CMTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMTSTv2i32, ARM64_INS_CMTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMTSTv2i64, ARM64_INS_CMTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMTSTv4i16, ARM64_INS_CMTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMTSTv4i32, ARM64_INS_CMTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMTSTv8i16, ARM64_INS_CMTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CMTSTv8i8, ARM64_INS_CMTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CNTv16i8, ARM64_INS_CNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CNTv8i8, ARM64_INS_CNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CPYi16, ARM64_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CPYi32, ARM64_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CPYi64, ARM64_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CPYi8, ARM64_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CRC32Brr, ARM64_INS_CRC32B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CRC32CBrr, ARM64_INS_CRC32CB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CRC32CHrr, ARM64_INS_CRC32CH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CRC32CWrr, ARM64_INS_CRC32CW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CRC32CXrr, ARM64_INS_CRC32CX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CRC32Hrr, ARM64_INS_CRC32H,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CRC32Wrr, ARM64_INS_CRC32W,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CRC32Xrr, ARM64_INS_CRC32X,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- AArch64_CSELWr, ARM64_INS_CSEL,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CSELXr, ARM64_INS_CSEL,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CSINCWr, ARM64_INS_CSINC,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CSINCXr, ARM64_INS_CSINC,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CSINVWr, ARM64_INS_CSINV,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CSINVXr, ARM64_INS_CSINV,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CSNEGWr, ARM64_INS_CSNEG,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_CSNEGXr, ARM64_INS_CSNEG,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_DCPS1, ARM64_INS_DCPS1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_DCPS2, ARM64_INS_DCPS2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_DCPS3, ARM64_INS_DCPS3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_DMB, ARM64_INS_DMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_DRPS, ARM64_INS_DRPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_DSB, ARM64_INS_DSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv16i8gpr, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv16i8lane, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv2i32gpr, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv2i32lane, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv2i64gpr, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv2i64lane, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv4i16gpr, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv4i16lane, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv4i32gpr, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv4i32lane, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv8i16gpr, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv8i16lane, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv8i8gpr, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_DUPv8i8lane, ARM64_INS_DUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_EONWrs, ARM64_INS_EON,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EONXrs, ARM64_INS_EON,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORWri, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORWrs, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORXri, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORXrs, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORv16i8, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_EORv8i8, ARM64_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ERET, ARM64_INS_ERET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EXTRWrri, ARM64_INS_EXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EXTRXrri, ARM64_INS_EXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_EXTv16i8, ARM64_INS_EXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_EXTv8i8, ARM64_INS_EXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABD32, ARM64_INS_FABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABD64, ARM64_INS_FABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABDv2f32, ARM64_INS_FABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABDv2f64, ARM64_INS_FABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABDv4f32, ARM64_INS_FABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABSDr, ARM64_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABSSr, ARM64_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABSv2f32, ARM64_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABSv2f64, ARM64_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FABSv4f32, ARM64_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FACGE32, ARM64_INS_FACGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FACGE64, ARM64_INS_FACGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FACGEv2f32, ARM64_INS_FACGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FACGEv2f64, ARM64_INS_FACGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FACGEv4f32, ARM64_INS_FACGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FACGT32, ARM64_INS_FACGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FACGT64, ARM64_INS_FACGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FACGTv2f32, ARM64_INS_FACGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FACGTv2f64, ARM64_INS_FACGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FACGTv4f32, ARM64_INS_FACGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDDrr, ARM64_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDPv2f32, ARM64_INS_FADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDPv2f64, ARM64_INS_FADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDPv2i32p, ARM64_INS_FADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDPv2i64p, ARM64_INS_FADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDPv4f32, ARM64_INS_FADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDSrr, ARM64_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDv2f32, ARM64_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDv2f64, ARM64_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FADDv4f32, ARM64_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCCMPDrr, ARM64_INS_FCCMP,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCCMPEDrr, ARM64_INS_FCCMPE,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCCMPESrr, ARM64_INS_FCCMPE,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCCMPSrr, ARM64_INS_FCCMP,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQ32, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQ64, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQv1i32rz, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQv1i64rz, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQv2f32, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQv2f64, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQv2i32rz, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQv2i64rz, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQv4f32, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMEQv4i32rz, ARM64_INS_FCMEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGE32, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGE64, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEv1i32rz, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEv1i64rz, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEv2f32, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEv2f64, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEv2i32rz, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEv2i64rz, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEv4f32, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGEv4i32rz, ARM64_INS_FCMGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGT32, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGT64, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTv1i32rz, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTv1i64rz, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTv2f32, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTv2f64, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTv2i32rz, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTv2i64rz, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTv4f32, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMGTv4i32rz, ARM64_INS_FCMGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLEv1i32rz, ARM64_INS_FCMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLEv1i64rz, ARM64_INS_FCMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLEv2i32rz, ARM64_INS_FCMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLEv2i64rz, ARM64_INS_FCMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLEv4i32rz, ARM64_INS_FCMLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLTv1i32rz, ARM64_INS_FCMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLTv1i64rz, ARM64_INS_FCMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLTv2i32rz, ARM64_INS_FCMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLTv2i64rz, ARM64_INS_FCMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMLTv4i32rz, ARM64_INS_FCMLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPDri, ARM64_INS_FCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPDrr, ARM64_INS_FCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPEDri, ARM64_INS_FCMPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPEDrr, ARM64_INS_FCMPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPESri, ARM64_INS_FCMPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPESrr, ARM64_INS_FCMPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPSri, ARM64_INS_FCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCMPSrr, ARM64_INS_FCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCSELDrrr, ARM64_INS_FCSEL,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCSELSrrr, ARM64_INS_FCSEL,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASUWDr, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASUWSr, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASUXDr, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASUXSr, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASv1i32, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASv1i64, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASv2f32, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASv2f64, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTASv4f32, ARM64_INS_FCVTAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAUUWDr, ARM64_INS_FCVTAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAUUWSr, ARM64_INS_FCVTAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAUUXDr, ARM64_INS_FCVTAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAUUXSr, ARM64_INS_FCVTAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAUv1i32, ARM64_INS_FCVTAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAUv1i64, ARM64_INS_FCVTAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAUv2f32, ARM64_INS_FCVTAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAUv2f64, ARM64_INS_FCVTAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTAUv4f32, ARM64_INS_FCVTAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTDHr, ARM64_INS_FCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTDSr, ARM64_INS_FCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTHDr, ARM64_INS_FCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTHSr, ARM64_INS_FCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTLv2i32, ARM64_INS_FCVTL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTLv4i16, ARM64_INS_FCVTL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTLv4i32, ARM64_INS_FCVTL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTLv8i16, ARM64_INS_FCVTL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSUWDr, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSUWSr, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSUXDr, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSUXSr, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSv1i32, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSv1i64, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSv2f32, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSv2f64, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMSv4f32, ARM64_INS_FCVTMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMUUWDr, ARM64_INS_FCVTMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMUUWSr, ARM64_INS_FCVTMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMUUXDr, ARM64_INS_FCVTMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMUUXSr, ARM64_INS_FCVTMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMUv1i32, ARM64_INS_FCVTMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMUv1i64, ARM64_INS_FCVTMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMUv2f32, ARM64_INS_FCVTMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMUv2f64, ARM64_INS_FCVTMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTMUv4f32, ARM64_INS_FCVTMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNSUWDr, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNSUWSr, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNSUXDr, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNSUXSr, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNSv1i32, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNSv1i64, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNSv2f32, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNSv2f64, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNSv4f32, ARM64_INS_FCVTNS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNUUWDr, ARM64_INS_FCVTNU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNUUWSr, ARM64_INS_FCVTNU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNUUXDr, ARM64_INS_FCVTNU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNUUXSr, ARM64_INS_FCVTNU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNUv1i32, ARM64_INS_FCVTNU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNUv1i64, ARM64_INS_FCVTNU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNUv2f32, ARM64_INS_FCVTNU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNUv2f64, ARM64_INS_FCVTNU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNUv4f32, ARM64_INS_FCVTNU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNv2i32, ARM64_INS_FCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNv4i16, ARM64_INS_FCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNv4i32, ARM64_INS_FCVTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTNv8i16, ARM64_INS_FCVTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPSUWDr, ARM64_INS_FCVTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPSUWSr, ARM64_INS_FCVTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPSUXDr, ARM64_INS_FCVTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPSUXSr, ARM64_INS_FCVTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPSv1i32, ARM64_INS_FCVTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPSv1i64, ARM64_INS_FCVTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPSv2f32, ARM64_INS_FCVTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPSv2f64, ARM64_INS_FCVTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPSv4f32, ARM64_INS_FCVTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPUUWDr, ARM64_INS_FCVTPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPUUWSr, ARM64_INS_FCVTPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPUUXDr, ARM64_INS_FCVTPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPUUXSr, ARM64_INS_FCVTPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPUv1i32, ARM64_INS_FCVTPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPUv1i64, ARM64_INS_FCVTPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPUv2f32, ARM64_INS_FCVTPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPUv2f64, ARM64_INS_FCVTPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTPUv4f32, ARM64_INS_FCVTPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTSDr, ARM64_INS_FCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTSHr, ARM64_INS_FCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTXNv1i64, ARM64_INS_FCVTXN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTXNv2f32, ARM64_INS_FCVTXN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTXNv4f32, ARM64_INS_FCVTXN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSSWDri, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSSWSri, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSSXDri, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSSXSri, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSUWDr, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSUWSr, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSUXDr, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSUXSr, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_IntSWDri, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_IntSWSri, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_IntSXDri, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_IntSXSri, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_IntUWDr, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_IntUWSr, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_IntUXDr, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_IntUXSr, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_Intv2f32, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_Intv2f64, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZS_Intv4f32, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSd, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSs, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSv1i32, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSv1i64, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSv2f32, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSv2f64, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSv2i32_shift, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSv2i64_shift, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSv4f32, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZSv4i32_shift, ARM64_INS_FCVTZS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUSWDri, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUSWSri, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUSXDri, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUSXSri, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUUWDr, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUUWSr, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUUXDr, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUUXSr, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_IntSWDri, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_IntSWSri, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_IntSXDri, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_IntSXSri, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_IntUWDr, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_IntUWSr, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_IntUXDr, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_IntUXSr, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_Intv2f32, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_Intv2f64, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZU_Intv4f32, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUd, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUs, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUv1i32, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUv1i64, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUv2f32, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUv2f64, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUv2i32_shift, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUv2i64_shift, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUv4f32, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FCVTZUv4i32_shift, ARM64_INS_FCVTZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FDIVDrr, ARM64_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FDIVSrr, ARM64_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FDIVv2f32, ARM64_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FDIVv2f64, ARM64_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FDIVv4f32, ARM64_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMADDDrrr, ARM64_INS_FMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMADDSrrr, ARM64_INS_FMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXDrr, ARM64_INS_FMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMDrr, ARM64_INS_FMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMPv2f32, ARM64_INS_FMAXNMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMPv2f64, ARM64_INS_FMAXNMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMPv2i32p, ARM64_INS_FMAXNMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMPv2i64p, ARM64_INS_FMAXNMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMPv4f32, ARM64_INS_FMAXNMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMSrr, ARM64_INS_FMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMVv4i32v, ARM64_INS_FMAXNMV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMv2f32, ARM64_INS_FMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMv2f64, ARM64_INS_FMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXNMv4f32, ARM64_INS_FMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXPv2f32, ARM64_INS_FMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXPv2f64, ARM64_INS_FMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXPv2i32p, ARM64_INS_FMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXPv2i64p, ARM64_INS_FMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXPv4f32, ARM64_INS_FMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXSrr, ARM64_INS_FMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXVv4i32v, ARM64_INS_FMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXv2f32, ARM64_INS_FMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXv2f64, ARM64_INS_FMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMAXv4f32, ARM64_INS_FMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINDrr, ARM64_INS_FMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMDrr, ARM64_INS_FMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMPv2f32, ARM64_INS_FMINNMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMPv2f64, ARM64_INS_FMINNMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMPv2i32p, ARM64_INS_FMINNMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMPv2i64p, ARM64_INS_FMINNMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMPv4f32, ARM64_INS_FMINNMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMSrr, ARM64_INS_FMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMVv4i32v, ARM64_INS_FMINNMV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMv2f32, ARM64_INS_FMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMv2f64, ARM64_INS_FMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINNMv4f32, ARM64_INS_FMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINPv2f32, ARM64_INS_FMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINPv2f64, ARM64_INS_FMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINPv2i32p, ARM64_INS_FMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINPv2i64p, ARM64_INS_FMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINPv4f32, ARM64_INS_FMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINSrr, ARM64_INS_FMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINVv4i32v, ARM64_INS_FMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINv2f32, ARM64_INS_FMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINv2f64, ARM64_INS_FMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMINv4f32, ARM64_INS_FMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLAv1i32_indexed, ARM64_INS_FMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLAv1i64_indexed, ARM64_INS_FMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLAv2f32, ARM64_INS_FMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLAv2f64, ARM64_INS_FMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLAv2i32_indexed, ARM64_INS_FMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLAv2i64_indexed, ARM64_INS_FMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLAv4f32, ARM64_INS_FMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLAv4i32_indexed, ARM64_INS_FMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLSv1i32_indexed, ARM64_INS_FMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLSv1i64_indexed, ARM64_INS_FMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLSv2f32, ARM64_INS_FMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLSv2f64, ARM64_INS_FMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLSv2i32_indexed, ARM64_INS_FMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLSv2i64_indexed, ARM64_INS_FMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLSv4f32, ARM64_INS_FMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMLSv4i32_indexed, ARM64_INS_FMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVDXHighr, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVDXr, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVDi, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVDr, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVSWr, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVSi, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVSr, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVWSr, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVXDHighr, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVXDr, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVv2f32_ns, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVv2f64_ns, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMOVv4f32_ns, ARM64_INS_FMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMSUBDrrr, ARM64_INS_FMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMSUBSrrr, ARM64_INS_FMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULDrr, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULSrr, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULX32, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULX64, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULXv1i32_indexed, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULXv1i64_indexed, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULXv2f32, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULXv2f64, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULXv2i32_indexed, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULXv2i64_indexed, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULXv4f32, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULXv4i32_indexed, ARM64_INS_FMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULv1i32_indexed, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULv1i64_indexed, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULv2f32, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULv2f64, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULv2i32_indexed, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULv2i64_indexed, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULv4f32, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FMULv4i32_indexed, ARM64_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNEGDr, ARM64_INS_FNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNEGSr, ARM64_INS_FNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNEGv2f32, ARM64_INS_FNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNEGv2f64, ARM64_INS_FNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNEGv4f32, ARM64_INS_FNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMADDDrrr, ARM64_INS_FNMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMADDSrrr, ARM64_INS_FNMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMSUBDrrr, ARM64_INS_FNMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMSUBSrrr, ARM64_INS_FNMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMULDrr, ARM64_INS_FNMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FNMULSrr, ARM64_INS_FNMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPEv1i32, ARM64_INS_FRECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPEv1i64, ARM64_INS_FRECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPEv2f32, ARM64_INS_FRECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPEv2f64, ARM64_INS_FRECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPEv4f32, ARM64_INS_FRECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPS32, ARM64_INS_FRECPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPS64, ARM64_INS_FRECPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPSv2f32, ARM64_INS_FRECPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPSv2f64, ARM64_INS_FRECPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPSv4f32, ARM64_INS_FRECPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPXv1i32, ARM64_INS_FRECPX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRECPXv1i64, ARM64_INS_FRECPX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTADr, ARM64_INS_FRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTASr, ARM64_INS_FRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTAv2f32, ARM64_INS_FRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTAv2f64, ARM64_INS_FRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTAv4f32, ARM64_INS_FRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTIDr, ARM64_INS_FRINTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTISr, ARM64_INS_FRINTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTIv2f32, ARM64_INS_FRINTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTIv2f64, ARM64_INS_FRINTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTIv4f32, ARM64_INS_FRINTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTMDr, ARM64_INS_FRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTMSr, ARM64_INS_FRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTMv2f32, ARM64_INS_FRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTMv2f64, ARM64_INS_FRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTMv4f32, ARM64_INS_FRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTNDr, ARM64_INS_FRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTNSr, ARM64_INS_FRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTNv2f32, ARM64_INS_FRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTNv2f64, ARM64_INS_FRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTNv4f32, ARM64_INS_FRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTPDr, ARM64_INS_FRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTPSr, ARM64_INS_FRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTPv2f32, ARM64_INS_FRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTPv2f64, ARM64_INS_FRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTPv4f32, ARM64_INS_FRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTXDr, ARM64_INS_FRINTX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTXSr, ARM64_INS_FRINTX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTXv2f32, ARM64_INS_FRINTX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTXv2f64, ARM64_INS_FRINTX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTXv4f32, ARM64_INS_FRINTX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTZDr, ARM64_INS_FRINTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTZSr, ARM64_INS_FRINTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTZv2f32, ARM64_INS_FRINTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTZv2f64, ARM64_INS_FRINTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRINTZv4f32, ARM64_INS_FRINTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTEv1i32, ARM64_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTEv1i64, ARM64_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTEv2f32, ARM64_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTEv2f64, ARM64_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTEv4f32, ARM64_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTS32, ARM64_INS_FRSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTS64, ARM64_INS_FRSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTSv2f32, ARM64_INS_FRSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTSv2f64, ARM64_INS_FRSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FRSQRTSv4f32, ARM64_INS_FRSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FSQRTDr, ARM64_INS_FSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FSQRTSr, ARM64_INS_FSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FSQRTv2f32, ARM64_INS_FSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FSQRTv2f64, ARM64_INS_FSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FSQRTv4f32, ARM64_INS_FSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FSUBDrr, ARM64_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FSUBSrr, ARM64_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FSUBv2f32, ARM64_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FSUBv2f64, ARM64_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_FSUBv4f32, ARM64_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_HINT, ARM64_INS_HINT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_HLT, ARM64_INS_HLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_HVC, ARM64_INS_HVC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_INSvi16gpr, ARM64_INS_INS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_INSvi16lane, ARM64_INS_INS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_INSvi32gpr, ARM64_INS_INS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_INSvi32lane, ARM64_INS_INS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_INSvi64gpr, ARM64_INS_INS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_INSvi64lane, ARM64_INS_INS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_INSvi8gpr, ARM64_INS_INS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_INSvi8lane, ARM64_INS_INS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ISB, ARM64_INS_ISB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv16b, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv16b_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv1d, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv1d_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv2d, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv2d_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv2s, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv2s_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv4h, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv4h_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv4s, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv4s_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv8b, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv8b_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv8h, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Fourv8h_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev16b, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev16b_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev1d, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev1d_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev2d, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev2d_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev2s, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev2s_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev4h, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev4h_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev4s, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev4s_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev8b, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev8b_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev8h, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Onev8h_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv16b, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv16b_POST, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv1d, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv1d_POST, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv2d, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv2d_POST, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv2s, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv2s_POST, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv4h, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv4h_POST, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv4s, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv4s_POST, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv8b, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv8b_POST, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv8h, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Rv8h_POST, ARM64_INS_LD1R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev16b, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev16b_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev1d, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev1d_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev2d, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev2d_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev2s, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev2s_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev4h, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev4h_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev4s, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev4s_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev8b, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev8b_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev8h, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Threev8h_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov16b, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov16b_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov1d, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov1d_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov2d, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov2d_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov2s, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov2s_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov4h, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov4h_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov4s, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov4s_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov8b, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov8b_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov8h, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1Twov8h_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1i16, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1i16_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1i32, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1i32_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1i64, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1i64_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1i8, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD1i8_POST, ARM64_INS_LD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv16b, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv16b_POST, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv1d, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv1d_POST, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv2d, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv2d_POST, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv2s, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv2s_POST, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv4h, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv4h_POST, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv4s, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv4s_POST, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv8b, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv8b_POST, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv8h, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Rv8h_POST, ARM64_INS_LD2R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov16b, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov16b_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov2d, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov2d_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov2s, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov2s_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov4h, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov4h_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov4s, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov4s_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov8b, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov8b_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov8h, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2Twov8h_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2i16, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2i16_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2i32, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2i32_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2i64, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2i64_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2i8, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD2i8_POST, ARM64_INS_LD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv16b, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv16b_POST, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv1d, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv1d_POST, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv2d, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv2d_POST, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv2s, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv2s_POST, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv4h, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv4h_POST, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv4s, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv4s_POST, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv8b, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv8b_POST, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv8h, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Rv8h_POST, ARM64_INS_LD3R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev16b, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev16b_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev2d, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev2d_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev2s, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev2s_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev4h, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev4h_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev4s, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev4s_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev8b, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev8b_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev8h, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3Threev8h_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3i16, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3i16_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3i32, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3i32_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3i64, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3i64_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3i8, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD3i8_POST, ARM64_INS_LD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv16b, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv16b_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv2d, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv2d_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv2s, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv2s_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv4h, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv4h_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv4s, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv4s_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv8b, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv8b_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv8h, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Fourv8h_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv16b, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv16b_POST, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv1d, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv1d_POST, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv2d, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv2d_POST, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv2s, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv2s_POST, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv4h, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv4h_POST, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv4s, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv4s_POST, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv8b, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv8b_POST, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv8h, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4Rv8h_POST, ARM64_INS_LD4R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4i16, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4i16_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4i32, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4i32_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4i64, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4i64_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4i8, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LD4i8_POST, ARM64_INS_LD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDARB, ARM64_INS_LDARB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDARH, ARM64_INS_LDARH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDARW, ARM64_INS_LDAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDARX, ARM64_INS_LDAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDAXPW, ARM64_INS_LDAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDAXPX, ARM64_INS_LDAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDAXRB, ARM64_INS_LDAXRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDAXRH, ARM64_INS_LDAXRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDAXRW, ARM64_INS_LDAXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDAXRX, ARM64_INS_LDAXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDNPDi, ARM64_INS_LDNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDNPQi, ARM64_INS_LDNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDNPSi, ARM64_INS_LDNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDNPWi, ARM64_INS_LDNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDNPXi, ARM64_INS_LDNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPDi, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPDpost, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPDpre, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPQi, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPQpost, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPQpre, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPSWi, ARM64_INS_LDPSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPSWpost, ARM64_INS_LDPSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPSWpre, ARM64_INS_LDPSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPSi, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPSpost, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPSpre, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPWi, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPWpost, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPWpre, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPXi, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPXpost, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDPXpre, ARM64_INS_LDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRBBpost, ARM64_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRBBpre, ARM64_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRBBroW, ARM64_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRBBroX, ARM64_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRBBui, ARM64_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRBpost, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRBpre, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRBroW, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRBroX, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRBui, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRDl, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRDpost, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRDpre, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRDroW, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRDroX, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRDui, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRHHpost, ARM64_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRHHpre, ARM64_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRHHroW, ARM64_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRHHroX, ARM64_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRHHui, ARM64_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRHpost, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRHpre, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRHroW, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRHroX, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRHui, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRQl, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRQpost, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRQpre, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRQroW, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRQroX, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRQui, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSBWpost, ARM64_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSBWpre, ARM64_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSBWroW, ARM64_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSBWroX, ARM64_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSBWui, ARM64_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSBXpost, ARM64_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSBXpre, ARM64_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSBXroW, ARM64_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSBXroX, ARM64_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSBXui, ARM64_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSHWpost, ARM64_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSHWpre, ARM64_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSHWroW, ARM64_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSHWroX, ARM64_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSHWui, ARM64_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSHXpost, ARM64_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSHXpre, ARM64_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSHXroW, ARM64_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSHXroX, ARM64_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSHXui, ARM64_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSWl, ARM64_INS_LDRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSWpost, ARM64_INS_LDRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSWpre, ARM64_INS_LDRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSWroW, ARM64_INS_LDRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSWroX, ARM64_INS_LDRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSWui, ARM64_INS_LDRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSl, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSpost, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSpre, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSroW, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSroX, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRSui, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRWl, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRWpost, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRWpre, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRWroW, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRWroX, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRWui, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRXl, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRXpost, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRXpre, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRXroW, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRXroX, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDRXui, ARM64_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDTRBi, ARM64_INS_LDTRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDTRHi, ARM64_INS_LDTRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDTRSBWi, ARM64_INS_LDTRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDTRSBXi, ARM64_INS_LDTRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDTRSHWi, ARM64_INS_LDTRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDTRSHXi, ARM64_INS_LDTRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDTRSWi, ARM64_INS_LDTRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDTRWi, ARM64_INS_LDTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDTRXi, ARM64_INS_LDTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURBBi, ARM64_INS_LDURB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURBi, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURDi, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURHHi, ARM64_INS_LDURH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURHi, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURQi, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURSBWi, ARM64_INS_LDURSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURSBXi, ARM64_INS_LDURSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURSHWi, ARM64_INS_LDURSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURSHXi, ARM64_INS_LDURSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURSWi, ARM64_INS_LDURSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURSi, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURWi, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDURXi, ARM64_INS_LDUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDXPW, ARM64_INS_LDXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDXPX, ARM64_INS_LDXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDXRB, ARM64_INS_LDXRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDXRH, ARM64_INS_LDXRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDXRW, ARM64_INS_LDXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LDXRX, ARM64_INS_LDXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSLVWr, ARM64_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSLVXr, ARM64_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSRVWr, ARM64_INS_LSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_LSRVXr, ARM64_INS_LSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MADDWrrr, ARM64_INS_MADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MADDXrrr, ARM64_INS_MADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLAv16i8, ARM64_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLAv2i32, ARM64_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLAv2i32_indexed, ARM64_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLAv4i16, ARM64_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLAv4i16_indexed, ARM64_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLAv4i32, ARM64_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLAv4i32_indexed, ARM64_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLAv8i16, ARM64_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLAv8i16_indexed, ARM64_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLAv8i8, ARM64_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLSv16i8, ARM64_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLSv2i32, ARM64_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLSv2i32_indexed, ARM64_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLSv4i16, ARM64_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLSv4i16_indexed, ARM64_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLSv4i32, ARM64_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLSv4i32_indexed, ARM64_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLSv8i16, ARM64_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLSv8i16_indexed, ARM64_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MLSv8i8, ARM64_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVID, ARM64_INS_MOVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVIv16b_ns, ARM64_INS_MOVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVIv2d_ns, ARM64_INS_MOVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVIv2i32, ARM64_INS_MOVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVIv2s_msl, ARM64_INS_MOVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVIv4i16, ARM64_INS_MOVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVIv4i32, ARM64_INS_MOVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVIv4s_msl, ARM64_INS_MOVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVIv8b_ns, ARM64_INS_MOVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVIv8i16, ARM64_INS_MOVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVKWi, ARM64_INS_MOVK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVKXi, ARM64_INS_MOVK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVNWi, ARM64_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVNXi, ARM64_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVZWi, ARM64_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MOVZXi, ARM64_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MRS, ARM64_INS_MRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MSR, ARM64_INS_MSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MSRpstate, ARM64_INS_MSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MSUBWrrr, ARM64_INS_MSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MSUBXrrr, ARM64_INS_MSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_MULv16i8, ARM64_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MULv2i32, ARM64_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MULv2i32_indexed, ARM64_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MULv4i16, ARM64_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MULv4i16_indexed, ARM64_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MULv4i32, ARM64_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MULv4i32_indexed, ARM64_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MULv8i16, ARM64_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MULv8i16_indexed, ARM64_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MULv8i8, ARM64_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNIv2i32, ARM64_INS_MVNI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNIv2s_msl, ARM64_INS_MVNI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNIv4i16, ARM64_INS_MVNI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNIv4i32, ARM64_INS_MVNI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNIv4s_msl, ARM64_INS_MVNI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_MVNIv8i16, ARM64_INS_MVNI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEGv16i8, ARM64_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEGv1i64, ARM64_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEGv2i32, ARM64_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEGv2i64, ARM64_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEGv4i16, ARM64_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEGv4i32, ARM64_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEGv8i16, ARM64_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NEGv8i8, ARM64_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NOTv16i8, ARM64_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_NOTv8i8, ARM64_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORNWrs, ARM64_INS_ORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORNXrs, ARM64_INS_ORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORNv16i8, ARM64_INS_ORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORNv8i8, ARM64_INS_ORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRWri, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRWrs, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRXri, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRXrs, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRv16i8, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRv2i32, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRv4i16, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRv4i32, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRv8i16, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ORRv8i8, ARM64_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_PMULLv16i8, ARM64_INS_PMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_PMULLv1i64, ARM64_INS_PMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_PMULLv2i64, ARM64_INS_PMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_PMULLv8i8, ARM64_INS_PMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_PMULv16i8, ARM64_INS_PMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_PMULv8i8, ARM64_INS_PMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_PRFMl, ARM64_INS_PRFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_PRFMroW, ARM64_INS_PRFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_PRFMroX, ARM64_INS_PRFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_PRFMui, ARM64_INS_PRFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_PRFUMi, ARM64_INS_PRFUM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHNv2i64_v2i32, ARM64_INS_RADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHNv2i64_v4i32, ARM64_INS_RADDHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHNv4i32_v4i16, ARM64_INS_RADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHNv4i32_v8i16, ARM64_INS_RADDHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHNv8i16_v16i8, ARM64_INS_RADDHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RADDHNv8i16_v8i8, ARM64_INS_RADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RBITWr, ARM64_INS_RBIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_RBITXr, ARM64_INS_RBIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_RBITv16i8, ARM64_INS_RBIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RBITv8i8, ARM64_INS_RBIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RET, ARM64_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV16Wr, ARM64_INS_REV16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV16Xr, ARM64_INS_REV16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV16v16i8, ARM64_INS_REV16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV16v8i8, ARM64_INS_REV16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV32Xr, ARM64_INS_REV32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV32v16i8, ARM64_INS_REV32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV32v4i16, ARM64_INS_REV32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV32v8i16, ARM64_INS_REV32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV32v8i8, ARM64_INS_REV32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV64v16i8, ARM64_INS_REV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV64v2i32, ARM64_INS_REV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV64v4i16, ARM64_INS_REV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV64v4i32, ARM64_INS_REV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV64v8i16, ARM64_INS_REV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REV64v8i8, ARM64_INS_REV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_REVWr, ARM64_INS_REV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_REVXr, ARM64_INS_REV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_RORVWr, ARM64_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_RORVXr, ARM64_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSHRNv16i8_shift, ARM64_INS_RSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSHRNv2i32_shift, ARM64_INS_RSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSHRNv4i16_shift, ARM64_INS_RSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSHRNv4i32_shift, ARM64_INS_RSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSHRNv8i16_shift, ARM64_INS_RSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSHRNv8i8_shift, ARM64_INS_RSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSUBHNv2i64_v2i32, ARM64_INS_RSUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSUBHNv2i64_v4i32, ARM64_INS_RSUBHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSUBHNv4i32_v4i16, ARM64_INS_RSUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSUBHNv4i32_v8i16, ARM64_INS_RSUBHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSUBHNv8i16_v16i8, ARM64_INS_RSUBHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_RSUBHNv8i16_v8i8, ARM64_INS_RSUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABALv16i8_v8i16, ARM64_INS_SABAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABALv2i32_v2i64, ARM64_INS_SABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABALv4i16_v4i32, ARM64_INS_SABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABALv4i32_v2i64, ARM64_INS_SABAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABALv8i16_v4i32, ARM64_INS_SABAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABALv8i8_v8i16, ARM64_INS_SABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABAv16i8, ARM64_INS_SABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABAv2i32, ARM64_INS_SABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABAv4i16, ARM64_INS_SABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABAv4i32, ARM64_INS_SABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABAv8i16, ARM64_INS_SABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABAv8i8, ARM64_INS_SABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDLv16i8_v8i16, ARM64_INS_SABDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDLv2i32_v2i64, ARM64_INS_SABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDLv4i16_v4i32, ARM64_INS_SABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDLv4i32_v2i64, ARM64_INS_SABDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDLv8i16_v4i32, ARM64_INS_SABDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDLv8i8_v8i16, ARM64_INS_SABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDv16i8, ARM64_INS_SABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDv2i32, ARM64_INS_SABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDv4i16, ARM64_INS_SABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDv4i32, ARM64_INS_SABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDv8i16, ARM64_INS_SABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SABDv8i8, ARM64_INS_SABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADALPv16i8_v8i16, ARM64_INS_SADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADALPv2i32_v1i64, ARM64_INS_SADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADALPv4i16_v2i32, ARM64_INS_SADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADALPv4i32_v2i64, ARM64_INS_SADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADALPv8i16_v4i32, ARM64_INS_SADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADALPv8i8_v4i16, ARM64_INS_SADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLPv16i8_v8i16, ARM64_INS_SADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLPv2i32_v1i64, ARM64_INS_SADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLPv4i16_v2i32, ARM64_INS_SADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLPv4i32_v2i64, ARM64_INS_SADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLPv8i16_v4i32, ARM64_INS_SADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLPv8i8_v4i16, ARM64_INS_SADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLVv16i8v, ARM64_INS_SADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLVv4i16v, ARM64_INS_SADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLVv4i32v, ARM64_INS_SADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLVv8i16v, ARM64_INS_SADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLVv8i8v, ARM64_INS_SADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLv16i8_v8i16, ARM64_INS_SADDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLv2i32_v2i64, ARM64_INS_SADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLv4i16_v4i32, ARM64_INS_SADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLv4i32_v2i64, ARM64_INS_SADDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLv8i16_v4i32, ARM64_INS_SADDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDLv8i8_v8i16, ARM64_INS_SADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDWv16i8_v8i16, ARM64_INS_SADDW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDWv2i32_v2i64, ARM64_INS_SADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDWv4i16_v4i32, ARM64_INS_SADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDWv4i32_v2i64, ARM64_INS_SADDW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDWv8i16_v4i32, ARM64_INS_SADDW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SADDWv8i8_v8i16, ARM64_INS_SADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SBCSWr, ARM64_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SBCSXr, ARM64_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SBCWr, ARM64_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SBCXr, ARM64_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SBFMWri, ARM64_INS_SBFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SBFMXri, ARM64_INS_SBFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFSWDri, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFSWSri, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFSXDri, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFSXSri, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFUWDri, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFUWSri, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFUXDri, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFUXSri, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFd, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFs, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFv1i32, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFv1i64, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFv2f32, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFv2f64, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFv2i32_shift, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFv2i64_shift, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFv4f32, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SCVTFv4i32_shift, ARM64_INS_SCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SDIVWr, ARM64_INS_SDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SDIVXr, ARM64_INS_SDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SDIV_IntWr, ARM64_INS_SDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SDIV_IntXr, ARM64_INS_SDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1Crrr, ARM64_INS_SHA1C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1Hrr, ARM64_INS_SHA1H,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1Mrrr, ARM64_INS_SHA1M,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1Prrr, ARM64_INS_SHA1P,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1SU0rrr, ARM64_INS_SHA1SU0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA1SU1rr, ARM64_INS_SHA1SU1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA256H2rrr, ARM64_INS_SHA256H2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA256Hrrr, ARM64_INS_SHA256H,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA256SU0rr, ARM64_INS_SHA256SU0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHA256SU1rrr, ARM64_INS_SHA256SU1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDv16i8, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDv2i32, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDv4i16, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDv4i32, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDv8i16, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHADDv8i8, ARM64_INS_SHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLLv16i8, ARM64_INS_SHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLLv2i32, ARM64_INS_SHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLLv4i16, ARM64_INS_SHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLLv4i32, ARM64_INS_SHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLLv8i16, ARM64_INS_SHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLLv8i8, ARM64_INS_SHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLd, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLv16i8_shift, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLv2i32_shift, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLv2i64_shift, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLv4i16_shift, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLv4i32_shift, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLv8i16_shift, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHLv8i8_shift, ARM64_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNv16i8_shift, ARM64_INS_SHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNv2i32_shift, ARM64_INS_SHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNv4i16_shift, ARM64_INS_SHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNv4i32_shift, ARM64_INS_SHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNv8i16_shift, ARM64_INS_SHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHRNv8i8_shift, ARM64_INS_SHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBv16i8, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBv2i32, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBv4i16, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBv4i32, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBv8i16, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SHSUBv8i8, ARM64_INS_SHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLId, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIv16i8_shift, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIv2i32_shift, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIv2i64_shift, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIv4i16_shift, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIv4i32_shift, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIv8i16_shift, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SLIv8i8_shift, ARM64_INS_SLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMADDLrrr, ARM64_INS_SMADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXPv16i8, ARM64_INS_SMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXPv2i32, ARM64_INS_SMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXPv4i16, ARM64_INS_SMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXPv4i32, ARM64_INS_SMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXPv8i16, ARM64_INS_SMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXPv8i8, ARM64_INS_SMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXVv16i8v, ARM64_INS_SMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXVv4i16v, ARM64_INS_SMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXVv4i32v, ARM64_INS_SMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXVv8i16v, ARM64_INS_SMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXVv8i8v, ARM64_INS_SMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXv16i8, ARM64_INS_SMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXv2i32, ARM64_INS_SMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXv4i16, ARM64_INS_SMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXv4i32, ARM64_INS_SMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXv8i16, ARM64_INS_SMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMAXv8i8, ARM64_INS_SMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMC, ARM64_INS_SMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPv16i8, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPv2i32, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPv4i16, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPv4i32, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPv8i16, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINPv8i8, ARM64_INS_SMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINVv16i8v, ARM64_INS_SMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINVv4i16v, ARM64_INS_SMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINVv4i32v, ARM64_INS_SMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINVv8i16v, ARM64_INS_SMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINVv8i8v, ARM64_INS_SMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINv16i8, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINv2i32, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINv4i16, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINv4i32, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINv8i16, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMINv8i8, ARM64_INS_SMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALv16i8_v8i16, ARM64_INS_SMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALv2i32_indexed, ARM64_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALv2i32_v2i64, ARM64_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALv4i16_indexed, ARM64_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALv4i16_v4i32, ARM64_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALv4i32_indexed, ARM64_INS_SMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALv4i32_v2i64, ARM64_INS_SMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALv8i16_indexed, ARM64_INS_SMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALv8i16_v4i32, ARM64_INS_SMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLALv8i8_v8i16, ARM64_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLv16i8_v8i16, ARM64_INS_SMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLv2i32_indexed, ARM64_INS_SMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLv2i32_v2i64, ARM64_INS_SMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLv4i16_indexed, ARM64_INS_SMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLv4i16_v4i32, ARM64_INS_SMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLv4i32_indexed, ARM64_INS_SMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLv4i32_v2i64, ARM64_INS_SMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLv8i16_indexed, ARM64_INS_SMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLv8i16_v4i32, ARM64_INS_SMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMLSLv8i8_v8i16, ARM64_INS_SMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMOVvi16to32, ARM64_INS_SMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMOVvi16to64, ARM64_INS_SMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMOVvi32to64, ARM64_INS_SMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMOVvi8to32, ARM64_INS_SMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMOVvi8to64, ARM64_INS_SMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMSUBLrrr, ARM64_INS_SMSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULHrr, ARM64_INS_SMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLv16i8_v8i16, ARM64_INS_SMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLv2i32_indexed, ARM64_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLv2i32_v2i64, ARM64_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLv4i16_indexed, ARM64_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLv4i16_v4i32, ARM64_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLv4i32_indexed, ARM64_INS_SMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLv4i32_v2i64, ARM64_INS_SMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLv8i16_indexed, ARM64_INS_SMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLv8i16_v4i32, ARM64_INS_SMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SMULLv8i8_v8i16, ARM64_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv16i8, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv1i16, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv1i32, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv1i64, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv1i8, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv2i32, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv2i64, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv4i16, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv4i32, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv8i16, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQABSv8i8, ARM64_INS_SQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv16i8, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv1i16, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv1i32, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv1i64, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv1i8, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv2i32, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv2i64, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv4i16, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv4i32, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv8i16, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQADDv8i8, ARM64_INS_SQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALi16, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALi32, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALv1i32_indexed, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALv1i64_indexed, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALv2i32_indexed, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALv2i32_v2i64, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALv4i16_indexed, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALv4i16_v4i32, ARM64_INS_SQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALv4i32_indexed, ARM64_INS_SQDMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALv4i32_v2i64, ARM64_INS_SQDMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALv8i16_indexed, ARM64_INS_SQDMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLALv8i16_v4i32, ARM64_INS_SQDMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLi16, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLi32, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLv1i32_indexed, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLv1i64_indexed, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLv2i32_indexed, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLv2i32_v2i64, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLv4i16_indexed, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLv4i16_v4i32, ARM64_INS_SQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLv4i32_indexed, ARM64_INS_SQDMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLv4i32_v2i64, ARM64_INS_SQDMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLv8i16_indexed, ARM64_INS_SQDMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMLSLv8i16_v4i32, ARM64_INS_SQDMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv1i16, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv1i16_indexed, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv1i32, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv1i32_indexed, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv2i32, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv2i32_indexed, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv4i16, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv4i16_indexed, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv4i32, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv4i32_indexed, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv8i16, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULHv8i16_indexed, ARM64_INS_SQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLi16, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLi32, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLv1i32_indexed, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLv1i64_indexed, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLv2i32_indexed, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLv2i32_v2i64, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLv4i16_indexed, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLv4i16_v4i32, ARM64_INS_SQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLv4i32_indexed, ARM64_INS_SQDMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLv4i32_v2i64, ARM64_INS_SQDMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLv8i16_indexed, ARM64_INS_SQDMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQDMULLv8i16_v4i32, ARM64_INS_SQDMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv16i8, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv1i16, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv1i32, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv1i64, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv1i8, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv2i32, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv2i64, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv4i16, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv4i32, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv8i16, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQNEGv8i8, ARM64_INS_SQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv1i16, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv1i16_indexed, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv1i32, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv1i32_indexed, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv2i32, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv2i32_indexed, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv4i16, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv4i16_indexed, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv4i32, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv4i32_indexed, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv8i16, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRDMULHv8i16_indexed, ARM64_INS_SQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv16i8, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv1i16, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv1i32, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv1i64, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv1i8, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv2i32, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv2i64, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv4i16, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv4i32, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv8i16, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHLv8i8, ARM64_INS_SQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNb, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNh, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNs, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNv16i8_shift, ARM64_INS_SQRSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNv2i32_shift, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNv4i16_shift, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNv4i32_shift, ARM64_INS_SQRSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNv8i16_shift, ARM64_INS_SQRSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRNv8i8_shift, ARM64_INS_SQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNb, ARM64_INS_SQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNh, ARM64_INS_SQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNs, ARM64_INS_SQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNv16i8_shift, ARM64_INS_SQRSHRUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNv2i32_shift, ARM64_INS_SQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNv4i16_shift, ARM64_INS_SQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNv4i32_shift, ARM64_INS_SQRSHRUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNv8i16_shift, ARM64_INS_SQRSHRUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQRSHRUNv8i8_shift, ARM64_INS_SQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUb, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUd, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUh, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUs, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUv16i8_shift, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUv2i32_shift, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUv2i64_shift, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUv4i16_shift, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUv4i32_shift, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUv8i16_shift, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLUv8i8_shift, ARM64_INS_SQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLb, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLd, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLh, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLs, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv16i8, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv16i8_shift, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv1i16, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv1i32, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv1i64, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv1i8, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv2i32, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv2i32_shift, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv2i64, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv2i64_shift, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv4i16, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv4i16_shift, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv4i32, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv4i32_shift, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv8i16, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv8i16_shift, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv8i8, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHLv8i8_shift, ARM64_INS_SQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNb, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNh, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNs, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNv16i8_shift, ARM64_INS_SQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNv2i32_shift, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNv4i16_shift, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNv4i32_shift, ARM64_INS_SQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNv8i16_shift, ARM64_INS_SQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRNv8i8_shift, ARM64_INS_SQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNb, ARM64_INS_SQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNh, ARM64_INS_SQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNs, ARM64_INS_SQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNv16i8_shift, ARM64_INS_SQSHRUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNv2i32_shift, ARM64_INS_SQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNv4i16_shift, ARM64_INS_SQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNv4i32_shift, ARM64_INS_SQSHRUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNv8i16_shift, ARM64_INS_SQSHRUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSHRUNv8i8_shift, ARM64_INS_SQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv16i8, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv1i16, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv1i32, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv1i64, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv1i8, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv2i32, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv2i64, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv4i16, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv4i32, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv8i16, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQSUBv8i8, ARM64_INS_SQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNv16i8, ARM64_INS_SQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNv1i16, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNv1i32, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNv1i8, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNv2i32, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNv4i16, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNv4i32, ARM64_INS_SQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNv8i16, ARM64_INS_SQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTNv8i8, ARM64_INS_SQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNv16i8, ARM64_INS_SQXTUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNv1i16, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNv1i32, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNv1i8, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNv2i32, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNv4i16, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNv4i32, ARM64_INS_SQXTUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNv8i16, ARM64_INS_SQXTUN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SQXTUNv8i8, ARM64_INS_SQXTUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDv16i8, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDv2i32, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDv4i16, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDv4i32, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDv8i16, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRHADDv8i8, ARM64_INS_SRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRId, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIv16i8_shift, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIv2i32_shift, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIv2i64_shift, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIv4i16_shift, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIv4i32_shift, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIv8i16_shift, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRIv8i8_shift, ARM64_INS_SRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLv16i8, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLv1i64, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLv2i32, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLv2i64, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLv4i16, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLv4i32, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLv8i16, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHLv8i8, ARM64_INS_SRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRd, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRv16i8_shift, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRv2i32_shift, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRv2i64_shift, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRv4i16_shift, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRv4i32_shift, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRv8i16_shift, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSHRv8i8_shift, ARM64_INS_SRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAd, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAv16i8_shift, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAv2i32_shift, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAv2i64_shift, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAv4i16_shift, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAv4i32_shift, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAv8i16_shift, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SRSRAv8i8_shift, ARM64_INS_SRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLv16i8_shift, ARM64_INS_SSHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLv2i32_shift, ARM64_INS_SSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLv4i16_shift, ARM64_INS_SSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLv4i32_shift, ARM64_INS_SSHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLv8i16_shift, ARM64_INS_SSHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLLv8i8_shift, ARM64_INS_SSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLv16i8, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLv1i64, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLv2i32, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLv2i64, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLv4i16, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLv4i32, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLv8i16, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHLv8i8, ARM64_INS_SSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRd, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRv16i8_shift, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRv2i32_shift, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRv2i64_shift, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRv4i16_shift, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRv4i32_shift, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRv8i16_shift, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSHRv8i8_shift, ARM64_INS_SSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAd, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAv16i8_shift, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAv2i32_shift, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAv2i64_shift, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAv4i16_shift, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAv4i32_shift, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAv8i16_shift, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSRAv8i8_shift, ARM64_INS_SSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBLv16i8_v8i16, ARM64_INS_SSUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBLv2i32_v2i64, ARM64_INS_SSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBLv4i16_v4i32, ARM64_INS_SSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBLv4i32_v2i64, ARM64_INS_SSUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBLv8i16_v4i32, ARM64_INS_SSUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBLv8i8_v8i16, ARM64_INS_SSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBWv16i8_v8i16, ARM64_INS_SSUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBWv2i32_v2i64, ARM64_INS_SSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBWv4i16_v4i32, ARM64_INS_SSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBWv4i32_v2i64, ARM64_INS_SSUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBWv8i16_v4i32, ARM64_INS_SSUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SSUBWv8i8_v8i16, ARM64_INS_SSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv16b, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv16b_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv1d, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv1d_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv2d, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv2d_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv2s, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv2s_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv4h, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv4h_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv4s, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv4s_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv8b, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv8b_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv8h, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Fourv8h_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev16b, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev16b_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev1d, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev1d_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev2d, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev2d_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev2s, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev2s_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev4h, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev4h_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev4s, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev4s_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev8b, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev8b_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev8h, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Onev8h_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev16b, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev16b_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev1d, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev1d_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev2d, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev2d_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev2s, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev2s_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev4h, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev4h_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev4s, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev4s_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev8b, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev8b_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev8h, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Threev8h_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov16b, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov16b_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov1d, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov1d_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov2d, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov2d_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov2s, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov2s_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov4h, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov4h_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov4s, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov4s_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov8b, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov8b_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov8h, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1Twov8h_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1i16, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1i16_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1i32, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1i32_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1i64, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1i64_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1i8, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST1i8_POST, ARM64_INS_ST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov16b, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov16b_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov2d, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov2d_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov2s, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov2s_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov4h, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov4h_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov4s, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov4s_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov8b, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov8b_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov8h, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2Twov8h_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2i16, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2i16_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2i32, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2i32_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2i64, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2i64_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2i8, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST2i8_POST, ARM64_INS_ST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev16b, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev16b_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev2d, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev2d_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev2s, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev2s_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev4h, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev4h_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev4s, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev4s_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev8b, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev8b_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev8h, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3Threev8h_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3i16, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3i16_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3i32, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3i32_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3i64, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3i64_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3i8, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST3i8_POST, ARM64_INS_ST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv16b, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv16b_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv2d, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv2d_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv2s, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv2s_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv4h, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv4h_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv4s, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv4s_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv8b, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv8b_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv8h, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4Fourv8h_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4i16, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4i16_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4i32, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4i32_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4i64, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4i64_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4i8, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ST4i8_POST, ARM64_INS_ST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLRB, ARM64_INS_STLRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLRH, ARM64_INS_STLRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLRW, ARM64_INS_STLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLRX, ARM64_INS_STLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXPW, ARM64_INS_STLXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXPX, ARM64_INS_STLXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXRB, ARM64_INS_STLXRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXRH, ARM64_INS_STLXRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXRW, ARM64_INS_STLXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STLXRX, ARM64_INS_STLXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STNPDi, ARM64_INS_STNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STNPQi, ARM64_INS_STNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STNPSi, ARM64_INS_STNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STNPWi, ARM64_INS_STNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STNPXi, ARM64_INS_STNP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPDi, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPDpost, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPDpre, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPQi, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPQpost, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPQpre, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPSi, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPSpost, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPSpre, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPWi, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPWpost, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPWpre, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPXi, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPXpost, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STPXpre, ARM64_INS_STP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRBBpost, ARM64_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRBBpre, ARM64_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRBBroW, ARM64_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRBBroX, ARM64_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRBBui, ARM64_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRBpost, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRBpre, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRBroW, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRBroX, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRBui, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRDpost, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRDpre, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRDroW, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRDroX, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRDui, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRHHpost, ARM64_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRHHpre, ARM64_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRHHroW, ARM64_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRHHroX, ARM64_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRHHui, ARM64_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRHpost, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRHpre, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRHroW, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRHroX, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRHui, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRQpost, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRQpre, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRQroW, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRQroX, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRQui, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRSpost, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRSpre, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRSroW, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRSroX, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRSui, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRWpost, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRWpre, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRWroW, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRWroX, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRWui, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRXpost, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRXpre, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRXroW, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRXroX, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STRXui, ARM64_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STTRBi, ARM64_INS_STTRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STTRHi, ARM64_INS_STTRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STTRWi, ARM64_INS_STTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STTRXi, ARM64_INS_STTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STURBBi, ARM64_INS_STURB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STURBi, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STURDi, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STURHHi, ARM64_INS_STURH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STURHi, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STURQi, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STURSi, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STURWi, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STURXi, ARM64_INS_STUR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXPW, ARM64_INS_STXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXPX, ARM64_INS_STXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXRB, ARM64_INS_STXRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXRH, ARM64_INS_STXRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXRW, ARM64_INS_STXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_STXRX, ARM64_INS_STXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHNv2i64_v2i32, ARM64_INS_SUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHNv2i64_v4i32, ARM64_INS_SUBHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHNv4i32_v4i16, ARM64_INS_SUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHNv4i32_v8i16, ARM64_INS_SUBHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHNv8i16_v16i8, ARM64_INS_SUBHN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBHNv8i16_v8i8, ARM64_INS_SUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSWri, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSWrs, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSWrx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSXri, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSXrs, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSXrx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBSXrx64, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBWri, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBWrs, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBWrx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBXri, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBXrs, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBXrx, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBXrx64, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBv16i8, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBv1i64, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBv2i32, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBv2i64, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBv4i16, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBv4i32, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBv8i16, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUBv8i8, ARM64_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv16i8, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv1i16, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv1i32, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv1i64, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv1i8, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv2i32, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv2i64, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv4i16, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv4i32, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv8i16, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SUQADDv8i8, ARM64_INS_SUQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_SVC, ARM64_INS_SVC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SYSLxt, ARM64_INS_SYSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_SYSxt, ARM64_INS_SYS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBLv16i8Four, ARM64_INS_TBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBLv16i8One, ARM64_INS_TBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBLv16i8Three, ARM64_INS_TBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBLv16i8Two, ARM64_INS_TBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBLv8i8Four, ARM64_INS_TBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBLv8i8One, ARM64_INS_TBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBLv8i8Three, ARM64_INS_TBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBLv8i8Two, ARM64_INS_TBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBNZW, ARM64_INS_TBNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_TBNZX, ARM64_INS_TBNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_TBXv16i8Four, ARM64_INS_TBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBXv16i8One, ARM64_INS_TBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBXv16i8Three, ARM64_INS_TBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBXv16i8Two, ARM64_INS_TBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBXv8i8Four, ARM64_INS_TBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBXv8i8One, ARM64_INS_TBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBXv8i8Three, ARM64_INS_TBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBXv8i8Two, ARM64_INS_TBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TBZW, ARM64_INS_TBZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_TBZX, ARM64_INS_TBZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- AArch64_TRN1v16i8, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1v2i32, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1v2i64, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1v4i16, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1v4i32, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1v8i16, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN1v8i8, ARM64_INS_TRN1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2v16i8, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2v2i32, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2v2i64, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2v4i16, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2v4i32, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2v8i16, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_TRN2v8i8, ARM64_INS_TRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABALv16i8_v8i16, ARM64_INS_UABAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABALv2i32_v2i64, ARM64_INS_UABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABALv4i16_v4i32, ARM64_INS_UABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABALv4i32_v2i64, ARM64_INS_UABAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABALv8i16_v4i32, ARM64_INS_UABAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABALv8i8_v8i16, ARM64_INS_UABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAv16i8, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAv2i32, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAv4i16, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAv4i32, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAv8i16, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABAv8i8, ARM64_INS_UABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDLv16i8_v8i16, ARM64_INS_UABDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDLv2i32_v2i64, ARM64_INS_UABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDLv4i16_v4i32, ARM64_INS_UABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDLv4i32_v2i64, ARM64_INS_UABDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDLv8i16_v4i32, ARM64_INS_UABDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDLv8i8_v8i16, ARM64_INS_UABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDv16i8, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDv2i32, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDv4i16, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDv4i32, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDv8i16, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UABDv8i8, ARM64_INS_UABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALPv16i8_v8i16, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALPv2i32_v1i64, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALPv4i16_v2i32, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALPv4i32_v2i64, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALPv8i16_v4i32, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADALPv8i8_v4i16, ARM64_INS_UADALP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLPv16i8_v8i16, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLPv2i32_v1i64, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLPv4i16_v2i32, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLPv4i32_v2i64, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLPv8i16_v4i32, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLPv8i8_v4i16, ARM64_INS_UADDLP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLVv16i8v, ARM64_INS_UADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLVv4i16v, ARM64_INS_UADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLVv4i32v, ARM64_INS_UADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLVv8i16v, ARM64_INS_UADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLVv8i8v, ARM64_INS_UADDLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLv16i8_v8i16, ARM64_INS_UADDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLv2i32_v2i64, ARM64_INS_UADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLv4i16_v4i32, ARM64_INS_UADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLv4i32_v2i64, ARM64_INS_UADDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLv8i16_v4i32, ARM64_INS_UADDL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDLv8i8_v8i16, ARM64_INS_UADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDWv16i8_v8i16, ARM64_INS_UADDW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDWv2i32_v2i64, ARM64_INS_UADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDWv4i16_v4i32, ARM64_INS_UADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDWv4i32_v2i64, ARM64_INS_UADDW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDWv8i16_v4i32, ARM64_INS_UADDW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UADDWv8i8_v8i16, ARM64_INS_UADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UBFMWri, ARM64_INS_UBFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UBFMXri, ARM64_INS_UBFM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFSWDri, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFSWSri, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFSXDri, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFSXSri, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFUWDri, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFUWSri, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFUXDri, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFUXSri, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFd, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFs, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFv1i32, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFv1i64, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFv2f32, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFv2f64, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFv2i32_shift, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFv2i64_shift, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFv4f32, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UCVTFv4i32_shift, ARM64_INS_UCVTF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UDIVWr, ARM64_INS_UDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UDIVXr, ARM64_INS_UDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UDIV_IntWr, ARM64_INS_UDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UDIV_IntXr, ARM64_INS_UDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDv16i8, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDv2i32, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDv4i16, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDv4i32, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDv8i16, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHADDv8i8, ARM64_INS_UHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBv16i8, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBv2i32, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBv4i16, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBv4i32, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBv8i16, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UHSUBv8i8, ARM64_INS_UHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMADDLrrr, ARM64_INS_UMADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPv16i8, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPv2i32, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPv4i16, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPv4i32, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPv8i16, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXPv8i8, ARM64_INS_UMAXP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXVv16i8v, ARM64_INS_UMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXVv4i16v, ARM64_INS_UMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXVv4i32v, ARM64_INS_UMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXVv8i16v, ARM64_INS_UMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXVv8i8v, ARM64_INS_UMAXV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXv16i8, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXv2i32, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXv4i16, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXv4i32, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXv8i16, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMAXv8i8, ARM64_INS_UMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPv16i8, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPv2i32, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPv4i16, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPv4i32, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPv8i16, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINPv8i8, ARM64_INS_UMINP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINVv16i8v, ARM64_INS_UMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINVv4i16v, ARM64_INS_UMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINVv4i32v, ARM64_INS_UMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINVv8i16v, ARM64_INS_UMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINVv8i8v, ARM64_INS_UMINV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINv16i8, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINv2i32, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINv4i16, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINv4i32, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINv8i16, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMINv8i8, ARM64_INS_UMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALv16i8_v8i16, ARM64_INS_UMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALv2i32_indexed, ARM64_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALv2i32_v2i64, ARM64_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALv4i16_indexed, ARM64_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALv4i16_v4i32, ARM64_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALv4i32_indexed, ARM64_INS_UMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALv4i32_v2i64, ARM64_INS_UMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALv8i16_indexed, ARM64_INS_UMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALv8i16_v4i32, ARM64_INS_UMLAL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLALv8i8_v8i16, ARM64_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLv16i8_v8i16, ARM64_INS_UMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLv2i32_indexed, ARM64_INS_UMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLv2i32_v2i64, ARM64_INS_UMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLv4i16_indexed, ARM64_INS_UMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLv4i16_v4i32, ARM64_INS_UMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLv4i32_indexed, ARM64_INS_UMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLv4i32_v2i64, ARM64_INS_UMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLv8i16_indexed, ARM64_INS_UMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLv8i16_v4i32, ARM64_INS_UMLSL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMLSLv8i8_v8i16, ARM64_INS_UMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMOVvi16, ARM64_INS_UMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMOVvi32, ARM64_INS_UMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMOVvi64, ARM64_INS_UMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMOVvi8, ARM64_INS_UMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMSUBLrrr, ARM64_INS_UMSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULHrr, ARM64_INS_UMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULLv16i8_v8i16, ARM64_INS_UMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULLv2i32_indexed, ARM64_INS_UMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULLv2i32_v2i64, ARM64_INS_UMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULLv4i16_indexed, ARM64_INS_UMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULLv4i16_v4i32, ARM64_INS_UMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULLv4i32_indexed, ARM64_INS_UMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULLv4i32_v2i64, ARM64_INS_UMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULLv8i16_indexed, ARM64_INS_UMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULLv8i16_v4i32, ARM64_INS_UMULL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UMULLv8i8_v8i16, ARM64_INS_UMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv16i8, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv1i16, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv1i32, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv1i64, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv1i8, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv2i32, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv2i64, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv4i16, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv4i32, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv8i16, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQADDv8i8, ARM64_INS_UQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv16i8, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv1i16, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv1i32, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv1i64, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv1i8, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv2i32, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv2i64, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv4i16, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv4i32, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv8i16, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHLv8i8, ARM64_INS_UQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHRNb, ARM64_INS_UQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHRNh, ARM64_INS_UQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHRNs, ARM64_INS_UQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHRNv16i8_shift, ARM64_INS_UQRSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHRNv2i32_shift, ARM64_INS_UQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHRNv4i16_shift, ARM64_INS_UQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHRNv4i32_shift, ARM64_INS_UQRSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHRNv8i16_shift, ARM64_INS_UQRSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQRSHRNv8i8_shift, ARM64_INS_UQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLb, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLd, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLh, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLs, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv16i8, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv16i8_shift, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv1i16, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv1i32, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv1i64, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv1i8, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv2i32, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv2i32_shift, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv2i64, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv2i64_shift, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv4i16, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv4i16_shift, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv4i32, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv4i32_shift, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv8i16, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv8i16_shift, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv8i8, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHLv8i8_shift, ARM64_INS_UQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNb, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNh, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNs, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNv16i8_shift, ARM64_INS_UQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNv2i32_shift, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNv4i16_shift, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNv4i32_shift, ARM64_INS_UQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNv8i16_shift, ARM64_INS_UQSHRN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSHRNv8i8_shift, ARM64_INS_UQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv16i8, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv1i16, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv1i32, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv1i64, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv1i8, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv2i32, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv2i64, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv4i16, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv4i32, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv8i16, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQSUBv8i8, ARM64_INS_UQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNv16i8, ARM64_INS_UQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNv1i16, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNv1i32, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNv1i8, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNv2i32, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNv4i16, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNv4i32, ARM64_INS_UQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNv8i16, ARM64_INS_UQXTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UQXTNv8i8, ARM64_INS_UQXTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URECPEv2i32, ARM64_INS_URECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URECPEv4i32, ARM64_INS_URECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDv16i8, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDv2i32, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDv4i16, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDv4i32, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDv8i16, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URHADDv8i8, ARM64_INS_URHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLv16i8, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLv1i64, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLv2i32, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLv2i64, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLv4i16, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLv4i32, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLv8i16, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHLv8i8, ARM64_INS_URSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRd, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRv16i8_shift, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRv2i32_shift, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRv2i64_shift, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRv4i16_shift, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRv4i32_shift, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRv8i16_shift, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSHRv8i8_shift, ARM64_INS_URSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSQRTEv2i32, ARM64_INS_URSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSQRTEv4i32, ARM64_INS_URSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAd, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAv16i8_shift, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAv2i32_shift, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAv2i64_shift, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAv4i16_shift, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAv4i32_shift, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAv8i16_shift, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_URSRAv8i8_shift, ARM64_INS_URSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLv16i8_shift, ARM64_INS_USHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLv2i32_shift, ARM64_INS_USHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLv4i16_shift, ARM64_INS_USHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLv4i32_shift, ARM64_INS_USHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLv8i16_shift, ARM64_INS_USHLL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLLv8i8_shift, ARM64_INS_USHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLv16i8, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLv1i64, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLv2i32, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLv2i64, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLv4i16, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLv4i32, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLv8i16, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHLv8i8, ARM64_INS_USHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRd, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRv16i8_shift, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRv2i32_shift, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRv2i64_shift, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRv4i16_shift, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRv4i32_shift, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRv8i16_shift, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USHRv8i8_shift, ARM64_INS_USHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv16i8, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv1i16, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv1i32, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv1i64, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv1i8, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv2i32, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv2i64, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv4i16, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv4i32, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv8i16, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USQADDv8i8, ARM64_INS_USQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAd, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAv16i8_shift, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAv2i32_shift, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAv2i64_shift, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAv4i16_shift, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAv4i32_shift, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAv8i16_shift, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USRAv8i8_shift, ARM64_INS_USRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBLv16i8_v8i16, ARM64_INS_USUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBLv2i32_v2i64, ARM64_INS_USUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBLv4i16_v4i32, ARM64_INS_USUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBLv4i32_v2i64, ARM64_INS_USUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBLv8i16_v4i32, ARM64_INS_USUBL2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBLv8i8_v8i16, ARM64_INS_USUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBWv16i8_v8i16, ARM64_INS_USUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBWv2i32_v2i64, ARM64_INS_USUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBWv4i16_v4i32, ARM64_INS_USUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBWv4i32_v2i64, ARM64_INS_USUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBWv8i16_v4i32, ARM64_INS_USUBW2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_USUBWv8i8_v8i16, ARM64_INS_USUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP1v16i8, ARM64_INS_UZP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP1v2i32, ARM64_INS_UZP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP1v2i64, ARM64_INS_UZP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP1v4i16, ARM64_INS_UZP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP1v4i32, ARM64_INS_UZP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP1v8i16, ARM64_INS_UZP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP1v8i8, ARM64_INS_UZP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP2v16i8, ARM64_INS_UZP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP2v2i32, ARM64_INS_UZP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP2v2i64, ARM64_INS_UZP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP2v4i16, ARM64_INS_UZP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP2v4i32, ARM64_INS_UZP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP2v8i16, ARM64_INS_UZP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_UZP2v8i8, ARM64_INS_UZP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_XTNv16i8, ARM64_INS_XTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_XTNv2i32, ARM64_INS_XTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_XTNv4i16, ARM64_INS_XTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_XTNv4i32, ARM64_INS_XTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_XTNv8i16, ARM64_INS_XTN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_XTNv8i8, ARM64_INS_XTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP1v16i8, ARM64_INS_ZIP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP1v2i32, ARM64_INS_ZIP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP1v2i64, ARM64_INS_ZIP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP1v4i16, ARM64_INS_ZIP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP1v4i32, ARM64_INS_ZIP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP1v8i16, ARM64_INS_ZIP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP1v8i8, ARM64_INS_ZIP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP2v16i8, ARM64_INS_ZIP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP2v2i32, ARM64_INS_ZIP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP2v2i64, ARM64_INS_ZIP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP2v4i16, ARM64_INS_ZIP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP2v4i32, ARM64_INS_ZIP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP2v8i16, ARM64_INS_ZIP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- AArch64_ZIP2v8i8, ARM64_INS_ZIP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
-#endif
- },
+#include "AArch64MappingInsn.inc"
};
// some alias instruction only need to be defined locally to satisfy
diff --git a/arch/AArch64/AArch64MappingInsn.inc b/arch/AArch64/AArch64MappingInsn.inc
new file mode 100644
index 0000000..13cd1f8
--- /dev/null
+++ b/arch/AArch64/AArch64MappingInsn.inc
@@ -0,0 +1,13965 @@
+// This is auto-gen data for Capstone engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{
+ AArch64_ABSv16i8, ARM64_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ABSv1i64, ARM64_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ABSv2i32, ARM64_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ABSv2i64, ARM64_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ABSv4i16, ARM64_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ABSv4i32, ARM64_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ABSv8i16, ARM64_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ABSv8i8, ARM64_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADCSWr, ARM64_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADCSXr, ARM64_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADCWr, ARM64_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADCXr, ARM64_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDHNv2i64_v2i32, ARM64_INS_ADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDHNv2i64_v4i32, ARM64_INS_ADDHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDHNv4i32_v4i16, ARM64_INS_ADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDHNv4i32_v8i16, ARM64_INS_ADDHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDHNv8i16_v16i8, ARM64_INS_ADDHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDHNv8i16_v8i8, ARM64_INS_ADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDPv16i8, ARM64_INS_ADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDPv2i32, ARM64_INS_ADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDPv2i64, ARM64_INS_ADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDPv2i64p, ARM64_INS_ADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDPv4i16, ARM64_INS_ADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDPv4i32, ARM64_INS_ADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDPv8i16, ARM64_INS_ADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDPv8i8, ARM64_INS_ADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDSWri, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDSWrs, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDSWrx, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDSXri, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDSXrs, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDSXrx, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDSXrx64, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDVv16i8v, ARM64_INS_ADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDVv4i16v, ARM64_INS_ADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDVv4i32v, ARM64_INS_ADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDVv8i16v, ARM64_INS_ADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDVv8i8v, ARM64_INS_ADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDWri, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDWrs, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDWrx, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDXri, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDXrs, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDXrx, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDXrx64, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDv16i8, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDv1i64, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDv2i32, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDv2i64, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDv4i16, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDv4i32, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDv8i16, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADDv8i8, ARM64_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADR, ARM64_INS_ADR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ADRP, ARM64_INS_ADRP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_AESDrr, ARM64_INS_AESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_AESErr, ARM64_INS_AESE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_AESIMCrr, ARM64_INS_AESIMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_AESMCrr, ARM64_INS_AESMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ANDSWri, ARM64_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ANDSWrs, ARM64_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ANDSXri, ARM64_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ANDSXrs, ARM64_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ANDWri, ARM64_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ANDWrs, ARM64_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ANDXri, ARM64_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ANDXrs, ARM64_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ANDv16i8, ARM64_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ANDv8i8, ARM64_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ASRVWr, ARM64_INS_ASR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ASRVXr, ARM64_INS_ASR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_B, ARM64_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ AArch64_BFMWri, ARM64_INS_BFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BFMXri, ARM64_INS_BFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BICSWrs, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BICSXrs, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BICWrs, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BICXrs, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BICv16i8, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BICv2i32, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BICv4i16, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BICv4i32, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BICv8i16, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BICv8i8, ARM64_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BIFv16i8, ARM64_INS_BIF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BIFv8i8, ARM64_INS_BIF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BITv16i8, ARM64_INS_BIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BITv8i8, ARM64_INS_BIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BL, ARM64_INS_BL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BLR, ARM64_INS_BLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BR, ARM64_INS_BR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ AArch64_BRK, ARM64_INS_BRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BSLv16i8, ARM64_INS_BSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_BSLv8i8, ARM64_INS_BSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_Bcc, ARM64_INS_B,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ AArch64_CBNZW, ARM64_INS_CBNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ AArch64_CBNZX, ARM64_INS_CBNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ AArch64_CBZW, ARM64_INS_CBZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ AArch64_CBZX, ARM64_INS_CBZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ AArch64_CCMNWi, ARM64_INS_CCMN,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CCMNWr, ARM64_INS_CCMN,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CCMNXi, ARM64_INS_CCMN,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CCMNXr, ARM64_INS_CCMN,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CCMPWi, ARM64_INS_CCMP,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CCMPWr, ARM64_INS_CCMP,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CCMPXi, ARM64_INS_CCMP,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CCMPXr, ARM64_INS_CCMP,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLREX, ARM64_INS_CLREX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLSWr, ARM64_INS_CLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLSXr, ARM64_INS_CLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLSv16i8, ARM64_INS_CLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLSv2i32, ARM64_INS_CLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLSv4i16, ARM64_INS_CLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLSv4i32, ARM64_INS_CLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLSv8i16, ARM64_INS_CLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLSv8i8, ARM64_INS_CLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLZWr, ARM64_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLZXr, ARM64_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLZv16i8, ARM64_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLZv2i32, ARM64_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLZv4i16, ARM64_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLZv4i32, ARM64_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLZv8i16, ARM64_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CLZv8i8, ARM64_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv16i8, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv16i8rz, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv1i64, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv1i64rz, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv2i32, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv2i32rz, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv2i64, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv2i64rz, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv4i16, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv4i16rz, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv4i32, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv4i32rz, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv8i16, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv8i16rz, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv8i8, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMEQv8i8rz, ARM64_INS_CMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv16i8, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv16i8rz, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv1i64, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv1i64rz, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv2i32, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv2i32rz, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv2i64, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv2i64rz, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv4i16, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv4i16rz, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv4i32, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv4i32rz, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv8i16, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv8i16rz, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv8i8, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGEv8i8rz, ARM64_INS_CMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv16i8, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv16i8rz, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv1i64, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv1i64rz, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv2i32, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv2i32rz, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv2i64, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv2i64rz, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv4i16, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv4i16rz, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv4i32, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv4i32rz, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv8i16, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv8i16rz, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv8i8, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMGTv8i8rz, ARM64_INS_CMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHIv16i8, ARM64_INS_CMHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHIv1i64, ARM64_INS_CMHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHIv2i32, ARM64_INS_CMHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHIv2i64, ARM64_INS_CMHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHIv4i16, ARM64_INS_CMHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHIv4i32, ARM64_INS_CMHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHIv8i16, ARM64_INS_CMHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHIv8i8, ARM64_INS_CMHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHSv16i8, ARM64_INS_CMHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHSv1i64, ARM64_INS_CMHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHSv2i32, ARM64_INS_CMHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHSv2i64, ARM64_INS_CMHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHSv4i16, ARM64_INS_CMHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHSv4i32, ARM64_INS_CMHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHSv8i16, ARM64_INS_CMHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMHSv8i8, ARM64_INS_CMHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLEv16i8rz, ARM64_INS_CMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLEv1i64rz, ARM64_INS_CMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLEv2i32rz, ARM64_INS_CMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLEv2i64rz, ARM64_INS_CMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLEv4i16rz, ARM64_INS_CMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLEv4i32rz, ARM64_INS_CMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLEv8i16rz, ARM64_INS_CMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLEv8i8rz, ARM64_INS_CMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLTv16i8rz, ARM64_INS_CMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLTv1i64rz, ARM64_INS_CMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLTv2i32rz, ARM64_INS_CMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLTv2i64rz, ARM64_INS_CMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLTv4i16rz, ARM64_INS_CMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLTv4i32rz, ARM64_INS_CMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLTv8i16rz, ARM64_INS_CMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMLTv8i8rz, ARM64_INS_CMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMTSTv16i8, ARM64_INS_CMTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMTSTv1i64, ARM64_INS_CMTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMTSTv2i32, ARM64_INS_CMTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMTSTv2i64, ARM64_INS_CMTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMTSTv4i16, ARM64_INS_CMTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMTSTv4i32, ARM64_INS_CMTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMTSTv8i16, ARM64_INS_CMTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CMTSTv8i8, ARM64_INS_CMTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CNTv16i8, ARM64_INS_CNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CNTv8i8, ARM64_INS_CNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CPYi16, ARM64_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CPYi32, ARM64_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CPYi64, ARM64_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CPYi8, ARM64_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CRC32Brr, ARM64_INS_CRC32B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CRC32CBrr, ARM64_INS_CRC32CB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CRC32CHrr, ARM64_INS_CRC32CH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CRC32CWrr, ARM64_INS_CRC32CW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CRC32CXrr, ARM64_INS_CRC32CX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CRC32Hrr, ARM64_INS_CRC32H,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CRC32Wrr, ARM64_INS_CRC32W,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CRC32Xrr, ARM64_INS_CRC32X,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CSELWr, ARM64_INS_CSEL,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CSELXr, ARM64_INS_CSEL,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CSINCWr, ARM64_INS_CSINC,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CSINCXr, ARM64_INS_CSINC,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CSINVWr, ARM64_INS_CSINV,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CSINVXr, ARM64_INS_CSINV,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CSNEGWr, ARM64_INS_CSNEG,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_CSNEGXr, ARM64_INS_CSNEG,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DCPS1, ARM64_INS_DCPS1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DCPS2, ARM64_INS_DCPS2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DCPS3, ARM64_INS_DCPS3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DMB, ARM64_INS_DMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DRPS, ARM64_INS_DRPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DSB, ARM64_INS_DSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv16i8gpr, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv16i8lane, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv2i32gpr, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv2i32lane, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv2i64gpr, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv2i64lane, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv4i16gpr, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv4i16lane, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv4i32gpr, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv4i32lane, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv8i16gpr, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv8i16lane, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv8i8gpr, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_DUPv8i8lane, ARM64_INS_DUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EONWrs, ARM64_INS_EON,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EONXrs, ARM64_INS_EON,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EORWri, ARM64_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EORWrs, ARM64_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EORXri, ARM64_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EORXrs, ARM64_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EORv16i8, ARM64_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EORv8i8, ARM64_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ERET, ARM64_INS_ERET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EXTRWrri, ARM64_INS_EXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EXTRXrri, ARM64_INS_EXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EXTv16i8, ARM64_INS_EXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_EXTv8i8, ARM64_INS_EXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FABD32, ARM64_INS_FABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FABD64, ARM64_INS_FABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FABDv2f32, ARM64_INS_FABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FABDv2f64, ARM64_INS_FABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FABDv4f32, ARM64_INS_FABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FABSDr, ARM64_INS_FABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FABSSr, ARM64_INS_FABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FABSv2f32, ARM64_INS_FABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FABSv2f64, ARM64_INS_FABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FABSv4f32, ARM64_INS_FABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FACGE32, ARM64_INS_FACGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FACGE64, ARM64_INS_FACGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FACGEv2f32, ARM64_INS_FACGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FACGEv2f64, ARM64_INS_FACGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FACGEv4f32, ARM64_INS_FACGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FACGT32, ARM64_INS_FACGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FACGT64, ARM64_INS_FACGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FACGTv2f32, ARM64_INS_FACGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FACGTv2f64, ARM64_INS_FACGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FACGTv4f32, ARM64_INS_FACGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FADDDrr, ARM64_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FADDPv2f32, ARM64_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FADDPv2f64, ARM64_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FADDPv2i32p, ARM64_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FADDPv2i64p, ARM64_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FADDPv4f32, ARM64_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FADDSrr, ARM64_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FADDv2f32, ARM64_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FADDv2f64, ARM64_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FADDv4f32, ARM64_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCCMPDrr, ARM64_INS_FCCMP,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCCMPEDrr, ARM64_INS_FCCMPE,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCCMPESrr, ARM64_INS_FCCMPE,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCCMPSrr, ARM64_INS_FCCMP,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMEQ32, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMEQ64, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMEQv1i32rz, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMEQv1i64rz, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMEQv2f32, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMEQv2f64, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMEQv2i32rz, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMEQv2i64rz, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMEQv4f32, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMEQv4i32rz, ARM64_INS_FCMEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGE32, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGE64, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGEv1i32rz, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGEv1i64rz, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGEv2f32, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGEv2f64, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGEv2i32rz, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGEv2i64rz, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGEv4f32, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGEv4i32rz, ARM64_INS_FCMGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGT32, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGT64, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGTv1i32rz, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGTv1i64rz, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGTv2f32, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGTv2f64, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGTv2i32rz, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGTv2i64rz, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGTv4f32, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMGTv4i32rz, ARM64_INS_FCMGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMLEv1i32rz, ARM64_INS_FCMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMLEv1i64rz, ARM64_INS_FCMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMLEv2i32rz, ARM64_INS_FCMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMLEv2i64rz, ARM64_INS_FCMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMLEv4i32rz, ARM64_INS_FCMLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMLTv1i32rz, ARM64_INS_FCMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMLTv1i64rz, ARM64_INS_FCMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMLTv2i32rz, ARM64_INS_FCMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMLTv2i64rz, ARM64_INS_FCMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMLTv4i32rz, ARM64_INS_FCMLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMPDri, ARM64_INS_FCMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMPDrr, ARM64_INS_FCMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMPEDri, ARM64_INS_FCMPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMPEDrr, ARM64_INS_FCMPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMPESri, ARM64_INS_FCMPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMPESrr, ARM64_INS_FCMPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMPSri, ARM64_INS_FCMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCMPSrr, ARM64_INS_FCMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCSELDrrr, ARM64_INS_FCSEL,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCSELSrrr, ARM64_INS_FCSEL,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTASUWDr, ARM64_INS_FCVTAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTASUWSr, ARM64_INS_FCVTAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTASUXDr, ARM64_INS_FCVTAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTASUXSr, ARM64_INS_FCVTAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTASv1i32, ARM64_INS_FCVTAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTASv1i64, ARM64_INS_FCVTAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTASv2f32, ARM64_INS_FCVTAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTASv2f64, ARM64_INS_FCVTAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTASv4f32, ARM64_INS_FCVTAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTAUUWDr, ARM64_INS_FCVTAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTAUUWSr, ARM64_INS_FCVTAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTAUUXDr, ARM64_INS_FCVTAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTAUUXSr, ARM64_INS_FCVTAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTAUv1i32, ARM64_INS_FCVTAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTAUv1i64, ARM64_INS_FCVTAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTAUv2f32, ARM64_INS_FCVTAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTAUv2f64, ARM64_INS_FCVTAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTAUv4f32, ARM64_INS_FCVTAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTDHr, ARM64_INS_FCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTDSr, ARM64_INS_FCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTHDr, ARM64_INS_FCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTHSr, ARM64_INS_FCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTLv2i32, ARM64_INS_FCVTL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTLv4i16, ARM64_INS_FCVTL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTLv4i32, ARM64_INS_FCVTL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTLv8i16, ARM64_INS_FCVTL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMSUWDr, ARM64_INS_FCVTMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMSUWSr, ARM64_INS_FCVTMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMSUXDr, ARM64_INS_FCVTMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMSUXSr, ARM64_INS_FCVTMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMSv1i32, ARM64_INS_FCVTMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMSv1i64, ARM64_INS_FCVTMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMSv2f32, ARM64_INS_FCVTMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMSv2f64, ARM64_INS_FCVTMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMSv4f32, ARM64_INS_FCVTMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMUUWDr, ARM64_INS_FCVTMU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMUUWSr, ARM64_INS_FCVTMU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMUUXDr, ARM64_INS_FCVTMU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMUUXSr, ARM64_INS_FCVTMU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMUv1i32, ARM64_INS_FCVTMU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMUv1i64, ARM64_INS_FCVTMU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMUv2f32, ARM64_INS_FCVTMU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMUv2f64, ARM64_INS_FCVTMU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTMUv4f32, ARM64_INS_FCVTMU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNSUWDr, ARM64_INS_FCVTNS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNSUWSr, ARM64_INS_FCVTNS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNSUXDr, ARM64_INS_FCVTNS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNSUXSr, ARM64_INS_FCVTNS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNSv1i32, ARM64_INS_FCVTNS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNSv1i64, ARM64_INS_FCVTNS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNSv2f32, ARM64_INS_FCVTNS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNSv2f64, ARM64_INS_FCVTNS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNSv4f32, ARM64_INS_FCVTNS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNUUWDr, ARM64_INS_FCVTNU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNUUWSr, ARM64_INS_FCVTNU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNUUXDr, ARM64_INS_FCVTNU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNUUXSr, ARM64_INS_FCVTNU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNUv1i32, ARM64_INS_FCVTNU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNUv1i64, ARM64_INS_FCVTNU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNUv2f32, ARM64_INS_FCVTNU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNUv2f64, ARM64_INS_FCVTNU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNUv4f32, ARM64_INS_FCVTNU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNv2i32, ARM64_INS_FCVTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNv4i16, ARM64_INS_FCVTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNv4i32, ARM64_INS_FCVTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTNv8i16, ARM64_INS_FCVTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPSUWDr, ARM64_INS_FCVTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPSUWSr, ARM64_INS_FCVTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPSUXDr, ARM64_INS_FCVTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPSUXSr, ARM64_INS_FCVTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPSv1i32, ARM64_INS_FCVTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPSv1i64, ARM64_INS_FCVTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPSv2f32, ARM64_INS_FCVTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPSv2f64, ARM64_INS_FCVTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPSv4f32, ARM64_INS_FCVTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPUUWDr, ARM64_INS_FCVTPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPUUWSr, ARM64_INS_FCVTPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPUUXDr, ARM64_INS_FCVTPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPUUXSr, ARM64_INS_FCVTPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPUv1i32, ARM64_INS_FCVTPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPUv1i64, ARM64_INS_FCVTPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPUv2f32, ARM64_INS_FCVTPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPUv2f64, ARM64_INS_FCVTPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTPUv4f32, ARM64_INS_FCVTPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTSDr, ARM64_INS_FCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTSHr, ARM64_INS_FCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTXNv1i64, ARM64_INS_FCVTXN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTXNv2f32, ARM64_INS_FCVTXN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTXNv4f32, ARM64_INS_FCVTXN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSSWDri, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSSWSri, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSSXDri, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSSXSri, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSUWDr, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSUWSr, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSUXDr, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSUXSr, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_IntSWDri, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_IntSWSri, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_IntSXDri, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_IntSXSri, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_IntUWDr, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_IntUWSr, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_IntUXDr, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_IntUXSr, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_Intv2f32, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_Intv2f64, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZS_Intv4f32, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSd, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSs, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSv1i32, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSv1i64, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSv2f32, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSv2f64, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSv2i32_shift, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSv2i64_shift, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSv4f32, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZSv4i32_shift, ARM64_INS_FCVTZS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUSWDri, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUSWSri, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUSXDri, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUSXSri, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUUWDr, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUUWSr, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUUXDr, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUUXSr, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_IntSWDri, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_IntSWSri, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_IntSXDri, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_IntSXSri, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_IntUWDr, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_IntUWSr, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_IntUXDr, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_IntUXSr, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_Intv2f32, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_Intv2f64, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZU_Intv4f32, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUd, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUs, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUv1i32, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUv1i64, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUv2f32, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUv2f64, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUv2i32_shift, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUv2i64_shift, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUv4f32, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FCVTZUv4i32_shift, ARM64_INS_FCVTZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FDIVDrr, ARM64_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FDIVSrr, ARM64_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FDIVv2f32, ARM64_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FDIVv2f64, ARM64_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FDIVv4f32, ARM64_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMADDDrrr, ARM64_INS_FMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMADDSrrr, ARM64_INS_FMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXDrr, ARM64_INS_FMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMDrr, ARM64_INS_FMAXNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMPv2f32, ARM64_INS_FMAXNMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMPv2f64, ARM64_INS_FMAXNMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMPv2i32p, ARM64_INS_FMAXNMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMPv2i64p, ARM64_INS_FMAXNMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMPv4f32, ARM64_INS_FMAXNMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMSrr, ARM64_INS_FMAXNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMVv4i32v, ARM64_INS_FMAXNMV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMv2f32, ARM64_INS_FMAXNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMv2f64, ARM64_INS_FMAXNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXNMv4f32, ARM64_INS_FMAXNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXPv2f32, ARM64_INS_FMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXPv2f64, ARM64_INS_FMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXPv2i32p, ARM64_INS_FMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXPv2i64p, ARM64_INS_FMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXPv4f32, ARM64_INS_FMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXSrr, ARM64_INS_FMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXVv4i32v, ARM64_INS_FMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXv2f32, ARM64_INS_FMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXv2f64, ARM64_INS_FMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMAXv4f32, ARM64_INS_FMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINDrr, ARM64_INS_FMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMDrr, ARM64_INS_FMINNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMPv2f32, ARM64_INS_FMINNMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMPv2f64, ARM64_INS_FMINNMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMPv2i32p, ARM64_INS_FMINNMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMPv2i64p, ARM64_INS_FMINNMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMPv4f32, ARM64_INS_FMINNMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMSrr, ARM64_INS_FMINNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMVv4i32v, ARM64_INS_FMINNMV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMv2f32, ARM64_INS_FMINNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMv2f64, ARM64_INS_FMINNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINNMv4f32, ARM64_INS_FMINNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINPv2f32, ARM64_INS_FMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINPv2f64, ARM64_INS_FMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINPv2i32p, ARM64_INS_FMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINPv2i64p, ARM64_INS_FMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINPv4f32, ARM64_INS_FMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINSrr, ARM64_INS_FMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINVv4i32v, ARM64_INS_FMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINv2f32, ARM64_INS_FMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINv2f64, ARM64_INS_FMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMINv4f32, ARM64_INS_FMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLAv1i32_indexed, ARM64_INS_FMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLAv1i64_indexed, ARM64_INS_FMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLAv2f32, ARM64_INS_FMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLAv2f64, ARM64_INS_FMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLAv2i32_indexed, ARM64_INS_FMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLAv2i64_indexed, ARM64_INS_FMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLAv4f32, ARM64_INS_FMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLAv4i32_indexed, ARM64_INS_FMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLSv1i32_indexed, ARM64_INS_FMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLSv1i64_indexed, ARM64_INS_FMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLSv2f32, ARM64_INS_FMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLSv2f64, ARM64_INS_FMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLSv2i32_indexed, ARM64_INS_FMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLSv2i64_indexed, ARM64_INS_FMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLSv4f32, ARM64_INS_FMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMLSv4i32_indexed, ARM64_INS_FMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVDXHighr, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVDXr, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVDi, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVDr, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVSWr, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVSi, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVSr, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVWSr, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVXDHighr, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVXDr, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVv2f32_ns, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVv2f64_ns, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMOVv4f32_ns, ARM64_INS_FMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMSUBDrrr, ARM64_INS_FMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMSUBSrrr, ARM64_INS_FMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULDrr, ARM64_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULSrr, ARM64_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULX32, ARM64_INS_FMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULX64, ARM64_INS_FMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULXv1i32_indexed, ARM64_INS_FMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULXv1i64_indexed, ARM64_INS_FMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULXv2f32, ARM64_INS_FMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULXv2f64, ARM64_INS_FMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULXv2i32_indexed, ARM64_INS_FMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULXv2i64_indexed, ARM64_INS_FMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULXv4f32, ARM64_INS_FMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULXv4i32_indexed, ARM64_INS_FMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULv1i32_indexed, ARM64_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULv1i64_indexed, ARM64_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULv2f32, ARM64_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULv2f64, ARM64_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULv2i32_indexed, ARM64_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULv2i64_indexed, ARM64_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULv4f32, ARM64_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FMULv4i32_indexed, ARM64_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNEGDr, ARM64_INS_FNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNEGSr, ARM64_INS_FNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNEGv2f32, ARM64_INS_FNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNEGv2f64, ARM64_INS_FNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNEGv4f32, ARM64_INS_FNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNMADDDrrr, ARM64_INS_FNMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNMADDSrrr, ARM64_INS_FNMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNMSUBDrrr, ARM64_INS_FNMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNMSUBSrrr, ARM64_INS_FNMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNMULDrr, ARM64_INS_FNMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FNMULSrr, ARM64_INS_FNMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPEv1i32, ARM64_INS_FRECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPEv1i64, ARM64_INS_FRECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPEv2f32, ARM64_INS_FRECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPEv2f64, ARM64_INS_FRECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPEv4f32, ARM64_INS_FRECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPS32, ARM64_INS_FRECPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPS64, ARM64_INS_FRECPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPSv2f32, ARM64_INS_FRECPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPSv2f64, ARM64_INS_FRECPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPSv4f32, ARM64_INS_FRECPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPXv1i32, ARM64_INS_FRECPX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRECPXv1i64, ARM64_INS_FRECPX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTADr, ARM64_INS_FRINTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTASr, ARM64_INS_FRINTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTAv2f32, ARM64_INS_FRINTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTAv2f64, ARM64_INS_FRINTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTAv4f32, ARM64_INS_FRINTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTIDr, ARM64_INS_FRINTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTISr, ARM64_INS_FRINTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTIv2f32, ARM64_INS_FRINTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTIv2f64, ARM64_INS_FRINTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTIv4f32, ARM64_INS_FRINTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTMDr, ARM64_INS_FRINTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTMSr, ARM64_INS_FRINTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTMv2f32, ARM64_INS_FRINTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTMv2f64, ARM64_INS_FRINTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTMv4f32, ARM64_INS_FRINTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTNDr, ARM64_INS_FRINTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTNSr, ARM64_INS_FRINTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTNv2f32, ARM64_INS_FRINTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTNv2f64, ARM64_INS_FRINTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTNv4f32, ARM64_INS_FRINTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTPDr, ARM64_INS_FRINTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTPSr, ARM64_INS_FRINTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTPv2f32, ARM64_INS_FRINTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTPv2f64, ARM64_INS_FRINTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTPv4f32, ARM64_INS_FRINTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTXDr, ARM64_INS_FRINTX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTXSr, ARM64_INS_FRINTX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTXv2f32, ARM64_INS_FRINTX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTXv2f64, ARM64_INS_FRINTX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTXv4f32, ARM64_INS_FRINTX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTZDr, ARM64_INS_FRINTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTZSr, ARM64_INS_FRINTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTZv2f32, ARM64_INS_FRINTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTZv2f64, ARM64_INS_FRINTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRINTZv4f32, ARM64_INS_FRINTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRSQRTEv1i32, ARM64_INS_FRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRSQRTEv1i64, ARM64_INS_FRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRSQRTEv2f32, ARM64_INS_FRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRSQRTEv2f64, ARM64_INS_FRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRSQRTEv4f32, ARM64_INS_FRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRSQRTS32, ARM64_INS_FRSQRTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRSQRTS64, ARM64_INS_FRSQRTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRSQRTSv2f32, ARM64_INS_FRSQRTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRSQRTSv2f64, ARM64_INS_FRSQRTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FRSQRTSv4f32, ARM64_INS_FRSQRTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FSQRTDr, ARM64_INS_FSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FSQRTSr, ARM64_INS_FSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FSQRTv2f32, ARM64_INS_FSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FSQRTv2f64, ARM64_INS_FSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FSQRTv4f32, ARM64_INS_FSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FSUBDrr, ARM64_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FSUBSrr, ARM64_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FSUBv2f32, ARM64_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FSUBv2f64, ARM64_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_FSUBv4f32, ARM64_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_HINT, ARM64_INS_HINT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_HLT, ARM64_INS_HLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_HVC, ARM64_INS_HVC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_INSvi16gpr, ARM64_INS_INS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_INSvi16lane, ARM64_INS_INS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_INSvi32gpr, ARM64_INS_INS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_INSvi32lane, ARM64_INS_INS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_INSvi64gpr, ARM64_INS_INS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_INSvi64lane, ARM64_INS_INS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_INSvi8gpr, ARM64_INS_INS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_INSvi8lane, ARM64_INS_INS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ISB, ARM64_INS_ISB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv16b, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv16b_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv1d, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv1d_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv2d, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv2d_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv2s, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv2s_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv4h, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv4h_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv4s, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv4s_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv8b, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv8b_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv8h, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Fourv8h_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev16b, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev16b_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev1d, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev1d_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev2d, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev2d_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev2s, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev2s_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev4h, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev4h_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev4s, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev4s_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev8b, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev8b_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev8h, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Onev8h_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv16b, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv16b_POST, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv1d, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv1d_POST, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv2d, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv2d_POST, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv2s, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv2s_POST, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv4h, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv4h_POST, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv4s, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv4s_POST, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv8b, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv8b_POST, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv8h, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Rv8h_POST, ARM64_INS_LD1R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev16b, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev16b_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev1d, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev1d_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev2d, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev2d_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev2s, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev2s_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev4h, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev4h_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev4s, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev4s_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev8b, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev8b_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev8h, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Threev8h_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov16b, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov16b_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov1d, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov1d_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov2d, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov2d_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov2s, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov2s_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov4h, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov4h_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov4s, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov4s_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov8b, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov8b_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov8h, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1Twov8h_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1i16, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1i16_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1i32, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1i32_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1i64, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1i64_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1i8, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD1i8_POST, ARM64_INS_LD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv16b, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv16b_POST, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv1d, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv1d_POST, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv2d, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv2d_POST, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv2s, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv2s_POST, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv4h, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv4h_POST, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv4s, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv4s_POST, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv8b, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv8b_POST, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv8h, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Rv8h_POST, ARM64_INS_LD2R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov16b, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov16b_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov2d, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov2d_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov2s, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov2s_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov4h, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov4h_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov4s, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov4s_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov8b, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov8b_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov8h, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2Twov8h_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2i16, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2i16_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2i32, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2i32_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2i64, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2i64_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2i8, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD2i8_POST, ARM64_INS_LD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv16b, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv16b_POST, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv1d, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv1d_POST, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv2d, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv2d_POST, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv2s, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv2s_POST, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv4h, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv4h_POST, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv4s, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv4s_POST, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv8b, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv8b_POST, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv8h, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Rv8h_POST, ARM64_INS_LD3R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev16b, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev16b_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev2d, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev2d_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev2s, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev2s_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev4h, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev4h_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev4s, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev4s_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev8b, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev8b_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev8h, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3Threev8h_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3i16, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3i16_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3i32, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3i32_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3i64, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3i64_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3i8, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD3i8_POST, ARM64_INS_LD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv16b, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv16b_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv2d, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv2d_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv2s, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv2s_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv4h, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv4h_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv4s, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv4s_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv8b, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv8b_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv8h, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Fourv8h_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv16b, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv16b_POST, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv1d, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv1d_POST, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv2d, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv2d_POST, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv2s, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv2s_POST, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv4h, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv4h_POST, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv4s, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv4s_POST, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv8b, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv8b_POST, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv8h, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4Rv8h_POST, ARM64_INS_LD4R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4i16, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4i16_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4i32, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4i32_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4i64, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4i64_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4i8, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LD4i8_POST, ARM64_INS_LD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDARB, ARM64_INS_LDARB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDARH, ARM64_INS_LDARH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDARW, ARM64_INS_LDAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDARX, ARM64_INS_LDAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDAXPW, ARM64_INS_LDAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDAXPX, ARM64_INS_LDAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDAXRB, ARM64_INS_LDAXRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDAXRH, ARM64_INS_LDAXRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDAXRW, ARM64_INS_LDAXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDAXRX, ARM64_INS_LDAXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDNPDi, ARM64_INS_LDNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDNPQi, ARM64_INS_LDNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDNPSi, ARM64_INS_LDNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDNPWi, ARM64_INS_LDNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDNPXi, ARM64_INS_LDNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPDi, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPDpost, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPDpre, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPQi, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPQpost, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPQpre, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPSWi, ARM64_INS_LDPSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPSWpost, ARM64_INS_LDPSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPSWpre, ARM64_INS_LDPSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPSi, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPSpost, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPSpre, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPWi, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPWpost, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPWpre, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPXi, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPXpost, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDPXpre, ARM64_INS_LDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRBBpost, ARM64_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRBBpre, ARM64_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRBBroW, ARM64_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRBBroX, ARM64_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRBBui, ARM64_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRBpost, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRBpre, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRBroW, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRBroX, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRBui, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRDl, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRDpost, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRDpre, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRDroW, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRDroX, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRDui, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRHHpost, ARM64_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRHHpre, ARM64_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRHHroW, ARM64_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRHHroX, ARM64_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRHHui, ARM64_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRHpost, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRHpre, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRHroW, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRHroX, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRHui, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRQl, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRQpost, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRQpre, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRQroW, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRQroX, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRQui, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSBWpost, ARM64_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSBWpre, ARM64_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSBWroW, ARM64_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSBWroX, ARM64_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSBWui, ARM64_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSBXpost, ARM64_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSBXpre, ARM64_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSBXroW, ARM64_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSBXroX, ARM64_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSBXui, ARM64_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSHWpost, ARM64_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSHWpre, ARM64_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSHWroW, ARM64_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSHWroX, ARM64_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSHWui, ARM64_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSHXpost, ARM64_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSHXpre, ARM64_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSHXroW, ARM64_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSHXroX, ARM64_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSHXui, ARM64_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSWl, ARM64_INS_LDRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSWpost, ARM64_INS_LDRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSWpre, ARM64_INS_LDRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSWroW, ARM64_INS_LDRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSWroX, ARM64_INS_LDRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSWui, ARM64_INS_LDRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSl, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSpost, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSpre, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSroW, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSroX, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRSui, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRWl, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRWpost, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRWpre, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRWroW, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRWroX, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRWui, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRXl, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRXpost, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRXpre, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRXroW, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRXroX, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDRXui, ARM64_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDTRBi, ARM64_INS_LDTRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDTRHi, ARM64_INS_LDTRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDTRSBWi, ARM64_INS_LDTRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDTRSBXi, ARM64_INS_LDTRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDTRSHWi, ARM64_INS_LDTRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDTRSHXi, ARM64_INS_LDTRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDTRSWi, ARM64_INS_LDTRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDTRWi, ARM64_INS_LDTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDTRXi, ARM64_INS_LDTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURBBi, ARM64_INS_LDURB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURBi, ARM64_INS_LDUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURDi, ARM64_INS_LDUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURHHi, ARM64_INS_LDURH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURHi, ARM64_INS_LDUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURQi, ARM64_INS_LDUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURSBWi, ARM64_INS_LDURSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURSBXi, ARM64_INS_LDURSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURSHWi, ARM64_INS_LDURSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURSHXi, ARM64_INS_LDURSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURSWi, ARM64_INS_LDURSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURSi, ARM64_INS_LDUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURWi, ARM64_INS_LDUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDURXi, ARM64_INS_LDUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDXPW, ARM64_INS_LDXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDXPX, ARM64_INS_LDXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDXRB, ARM64_INS_LDXRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDXRH, ARM64_INS_LDXRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDXRW, ARM64_INS_LDXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LDXRX, ARM64_INS_LDXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LSLVWr, ARM64_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LSLVXr, ARM64_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LSRVWr, ARM64_INS_LSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_LSRVXr, ARM64_INS_LSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MADDWrrr, ARM64_INS_MADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MADDXrrr, ARM64_INS_MADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLAv16i8, ARM64_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLAv2i32, ARM64_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLAv2i32_indexed, ARM64_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLAv4i16, ARM64_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLAv4i16_indexed, ARM64_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLAv4i32, ARM64_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLAv4i32_indexed, ARM64_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLAv8i16, ARM64_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLAv8i16_indexed, ARM64_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLAv8i8, ARM64_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLSv16i8, ARM64_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLSv2i32, ARM64_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLSv2i32_indexed, ARM64_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLSv4i16, ARM64_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLSv4i16_indexed, ARM64_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLSv4i32, ARM64_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLSv4i32_indexed, ARM64_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLSv8i16, ARM64_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLSv8i16_indexed, ARM64_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MLSv8i8, ARM64_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVID, ARM64_INS_MOVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVIv16b_ns, ARM64_INS_MOVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVIv2d_ns, ARM64_INS_MOVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVIv2i32, ARM64_INS_MOVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVIv2s_msl, ARM64_INS_MOVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVIv4i16, ARM64_INS_MOVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVIv4i32, ARM64_INS_MOVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVIv4s_msl, ARM64_INS_MOVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVIv8b_ns, ARM64_INS_MOVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVIv8i16, ARM64_INS_MOVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVKWi, ARM64_INS_MOVK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVKXi, ARM64_INS_MOVK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVNWi, ARM64_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVNXi, ARM64_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVZWi, ARM64_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MOVZXi, ARM64_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MRS, ARM64_INS_MRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MSR, ARM64_INS_MSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MSRpstate, ARM64_INS_MSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MSUBWrrr, ARM64_INS_MSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MSUBXrrr, ARM64_INS_MSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MULv16i8, ARM64_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MULv2i32, ARM64_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MULv2i32_indexed, ARM64_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MULv4i16, ARM64_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MULv4i16_indexed, ARM64_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MULv4i32, ARM64_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MULv4i32_indexed, ARM64_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MULv8i16, ARM64_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MULv8i16_indexed, ARM64_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MULv8i8, ARM64_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MVNIv2i32, ARM64_INS_MVNI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MVNIv2s_msl, ARM64_INS_MVNI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MVNIv4i16, ARM64_INS_MVNI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MVNIv4i32, ARM64_INS_MVNI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MVNIv4s_msl, ARM64_INS_MVNI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_MVNIv8i16, ARM64_INS_MVNI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_NEGv16i8, ARM64_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_NEGv1i64, ARM64_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_NEGv2i32, ARM64_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_NEGv2i64, ARM64_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_NEGv4i16, ARM64_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_NEGv4i32, ARM64_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_NEGv8i16, ARM64_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_NEGv8i8, ARM64_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_NOTv16i8, ARM64_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_NOTv8i8, ARM64_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORNWrs, ARM64_INS_ORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORNXrs, ARM64_INS_ORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORNv16i8, ARM64_INS_ORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORNv8i8, ARM64_INS_ORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORRWri, ARM64_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORRWrs, ARM64_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORRXri, ARM64_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORRXrs, ARM64_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORRv16i8, ARM64_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORRv2i32, ARM64_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORRv4i16, ARM64_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORRv4i32, ARM64_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORRv8i16, ARM64_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ORRv8i8, ARM64_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PMULLv16i8, ARM64_INS_PMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PMULLv1i64, ARM64_INS_PMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PMULLv2i64, ARM64_INS_PMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PMULLv8i8, ARM64_INS_PMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PMULv16i8, ARM64_INS_PMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PMULv8i8, ARM64_INS_PMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PRFMl, ARM64_INS_PRFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PRFMroW, ARM64_INS_PRFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PRFMroX, ARM64_INS_PRFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PRFMui, ARM64_INS_PRFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_PRFUMi, ARM64_INS_PRFUM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RADDHNv2i64_v2i32, ARM64_INS_RADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RADDHNv2i64_v4i32, ARM64_INS_RADDHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RADDHNv4i32_v4i16, ARM64_INS_RADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RADDHNv4i32_v8i16, ARM64_INS_RADDHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RADDHNv8i16_v16i8, ARM64_INS_RADDHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RADDHNv8i16_v8i8, ARM64_INS_RADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RBITWr, ARM64_INS_RBIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RBITXr, ARM64_INS_RBIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RBITv16i8, ARM64_INS_RBIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RBITv8i8, ARM64_INS_RBIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RET, ARM64_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV16Wr, ARM64_INS_REV16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV16Xr, ARM64_INS_REV16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV16v16i8, ARM64_INS_REV16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV16v8i8, ARM64_INS_REV16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV32Xr, ARM64_INS_REV32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV32v16i8, ARM64_INS_REV32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV32v4i16, ARM64_INS_REV32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV32v8i16, ARM64_INS_REV32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV32v8i8, ARM64_INS_REV32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV64v16i8, ARM64_INS_REV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV64v2i32, ARM64_INS_REV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV64v4i16, ARM64_INS_REV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV64v4i32, ARM64_INS_REV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV64v8i16, ARM64_INS_REV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REV64v8i8, ARM64_INS_REV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REVWr, ARM64_INS_REV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_REVXr, ARM64_INS_REV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RORVWr, ARM64_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RORVXr, ARM64_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSHRNv16i8_shift, ARM64_INS_RSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSHRNv2i32_shift, ARM64_INS_RSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSHRNv4i16_shift, ARM64_INS_RSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSHRNv4i32_shift, ARM64_INS_RSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSHRNv8i16_shift, ARM64_INS_RSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSHRNv8i8_shift, ARM64_INS_RSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSUBHNv2i64_v2i32, ARM64_INS_RSUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSUBHNv2i64_v4i32, ARM64_INS_RSUBHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSUBHNv4i32_v4i16, ARM64_INS_RSUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSUBHNv4i32_v8i16, ARM64_INS_RSUBHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSUBHNv8i16_v16i8, ARM64_INS_RSUBHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_RSUBHNv8i16_v8i8, ARM64_INS_RSUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABALv16i8_v8i16, ARM64_INS_SABAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABALv2i32_v2i64, ARM64_INS_SABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABALv4i16_v4i32, ARM64_INS_SABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABALv4i32_v2i64, ARM64_INS_SABAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABALv8i16_v4i32, ARM64_INS_SABAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABALv8i8_v8i16, ARM64_INS_SABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABAv16i8, ARM64_INS_SABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABAv2i32, ARM64_INS_SABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABAv4i16, ARM64_INS_SABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABAv4i32, ARM64_INS_SABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABAv8i16, ARM64_INS_SABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABAv8i8, ARM64_INS_SABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDLv16i8_v8i16, ARM64_INS_SABDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDLv2i32_v2i64, ARM64_INS_SABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDLv4i16_v4i32, ARM64_INS_SABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDLv4i32_v2i64, ARM64_INS_SABDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDLv8i16_v4i32, ARM64_INS_SABDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDLv8i8_v8i16, ARM64_INS_SABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDv16i8, ARM64_INS_SABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDv2i32, ARM64_INS_SABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDv4i16, ARM64_INS_SABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDv4i32, ARM64_INS_SABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDv8i16, ARM64_INS_SABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SABDv8i8, ARM64_INS_SABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADALPv16i8_v8i16, ARM64_INS_SADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADALPv2i32_v1i64, ARM64_INS_SADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADALPv4i16_v2i32, ARM64_INS_SADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADALPv4i32_v2i64, ARM64_INS_SADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADALPv8i16_v4i32, ARM64_INS_SADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADALPv8i8_v4i16, ARM64_INS_SADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLPv16i8_v8i16, ARM64_INS_SADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLPv2i32_v1i64, ARM64_INS_SADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLPv4i16_v2i32, ARM64_INS_SADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLPv4i32_v2i64, ARM64_INS_SADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLPv8i16_v4i32, ARM64_INS_SADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLPv8i8_v4i16, ARM64_INS_SADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLVv16i8v, ARM64_INS_SADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLVv4i16v, ARM64_INS_SADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLVv4i32v, ARM64_INS_SADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLVv8i16v, ARM64_INS_SADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLVv8i8v, ARM64_INS_SADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLv16i8_v8i16, ARM64_INS_SADDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLv2i32_v2i64, ARM64_INS_SADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLv4i16_v4i32, ARM64_INS_SADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLv4i32_v2i64, ARM64_INS_SADDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLv8i16_v4i32, ARM64_INS_SADDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDLv8i8_v8i16, ARM64_INS_SADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDWv16i8_v8i16, ARM64_INS_SADDW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDWv2i32_v2i64, ARM64_INS_SADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDWv4i16_v4i32, ARM64_INS_SADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDWv4i32_v2i64, ARM64_INS_SADDW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDWv8i16_v4i32, ARM64_INS_SADDW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SADDWv8i8_v8i16, ARM64_INS_SADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SBCSWr, ARM64_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SBCSXr, ARM64_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SBCWr, ARM64_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SBCXr, ARM64_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SBFMWri, ARM64_INS_SBFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SBFMXri, ARM64_INS_SBFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFSWDri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFSWSri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFSXDri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFSXSri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFUWDri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFUWSri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFUXDri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFUXSri, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFd, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFs, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFv1i32, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFv1i64, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFv2f32, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFv2f64, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFv2i32_shift, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFv2i64_shift, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFv4f32, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SCVTFv4i32_shift, ARM64_INS_SCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SDIVWr, ARM64_INS_SDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SDIVXr, ARM64_INS_SDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SDIV_IntWr, ARM64_INS_SDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SDIV_IntXr, ARM64_INS_SDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHA1Crrr, ARM64_INS_SHA1C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHA1Hrr, ARM64_INS_SHA1H,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHA1Mrrr, ARM64_INS_SHA1M,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHA1Prrr, ARM64_INS_SHA1P,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHA1SU0rrr, ARM64_INS_SHA1SU0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHA1SU1rr, ARM64_INS_SHA1SU1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHA256H2rrr, ARM64_INS_SHA256H2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHA256Hrrr, ARM64_INS_SHA256H,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHA256SU0rr, ARM64_INS_SHA256SU0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHA256SU1rrr, ARM64_INS_SHA256SU1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHADDv16i8, ARM64_INS_SHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHADDv2i32, ARM64_INS_SHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHADDv4i16, ARM64_INS_SHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHADDv4i32, ARM64_INS_SHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHADDv8i16, ARM64_INS_SHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHADDv8i8, ARM64_INS_SHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLLv16i8, ARM64_INS_SHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLLv2i32, ARM64_INS_SHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLLv4i16, ARM64_INS_SHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLLv4i32, ARM64_INS_SHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLLv8i16, ARM64_INS_SHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLLv8i8, ARM64_INS_SHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLd, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLv16i8_shift, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLv2i32_shift, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLv2i64_shift, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLv4i16_shift, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLv4i32_shift, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLv8i16_shift, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHLv8i8_shift, ARM64_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHRNv16i8_shift, ARM64_INS_SHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHRNv2i32_shift, ARM64_INS_SHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHRNv4i16_shift, ARM64_INS_SHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHRNv4i32_shift, ARM64_INS_SHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHRNv8i16_shift, ARM64_INS_SHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHRNv8i8_shift, ARM64_INS_SHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHSUBv16i8, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHSUBv2i32, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHSUBv4i16, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHSUBv4i32, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHSUBv8i16, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SHSUBv8i8, ARM64_INS_SHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SLId, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SLIv16i8_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SLIv2i32_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SLIv2i64_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SLIv4i16_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SLIv4i32_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SLIv8i16_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SLIv8i8_shift, ARM64_INS_SLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMADDLrrr, ARM64_INS_SMADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXPv16i8, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXPv2i32, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXPv4i16, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXPv4i32, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXPv8i16, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXPv8i8, ARM64_INS_SMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXVv16i8v, ARM64_INS_SMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXVv4i16v, ARM64_INS_SMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXVv4i32v, ARM64_INS_SMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXVv8i16v, ARM64_INS_SMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXVv8i8v, ARM64_INS_SMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXv16i8, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXv2i32, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXv4i16, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXv4i32, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXv8i16, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMAXv8i8, ARM64_INS_SMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMC, ARM64_INS_SMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINPv16i8, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINPv2i32, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINPv4i16, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINPv4i32, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINPv8i16, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINPv8i8, ARM64_INS_SMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINVv16i8v, ARM64_INS_SMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINVv4i16v, ARM64_INS_SMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINVv4i32v, ARM64_INS_SMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINVv8i16v, ARM64_INS_SMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINVv8i8v, ARM64_INS_SMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINv16i8, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINv2i32, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINv4i16, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINv4i32, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINv8i16, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMINv8i8, ARM64_INS_SMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLALv16i8_v8i16, ARM64_INS_SMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLALv2i32_indexed, ARM64_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLALv2i32_v2i64, ARM64_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLALv4i16_indexed, ARM64_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLALv4i16_v4i32, ARM64_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLALv4i32_indexed, ARM64_INS_SMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLALv4i32_v2i64, ARM64_INS_SMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLALv8i16_indexed, ARM64_INS_SMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLALv8i16_v4i32, ARM64_INS_SMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLALv8i8_v8i16, ARM64_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLSLv16i8_v8i16, ARM64_INS_SMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLSLv2i32_indexed, ARM64_INS_SMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLSLv2i32_v2i64, ARM64_INS_SMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLSLv4i16_indexed, ARM64_INS_SMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLSLv4i16_v4i32, ARM64_INS_SMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLSLv4i32_indexed, ARM64_INS_SMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLSLv4i32_v2i64, ARM64_INS_SMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLSLv8i16_indexed, ARM64_INS_SMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLSLv8i16_v4i32, ARM64_INS_SMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMLSLv8i8_v8i16, ARM64_INS_SMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMOVvi16to32, ARM64_INS_SMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMOVvi16to64, ARM64_INS_SMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMOVvi32to64, ARM64_INS_SMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMOVvi8to32, ARM64_INS_SMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMOVvi8to64, ARM64_INS_SMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMSUBLrrr, ARM64_INS_SMSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULHrr, ARM64_INS_SMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULLv16i8_v8i16, ARM64_INS_SMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULLv2i32_indexed, ARM64_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULLv2i32_v2i64, ARM64_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULLv4i16_indexed, ARM64_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULLv4i16_v4i32, ARM64_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULLv4i32_indexed, ARM64_INS_SMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULLv4i32_v2i64, ARM64_INS_SMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULLv8i16_indexed, ARM64_INS_SMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULLv8i16_v4i32, ARM64_INS_SMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SMULLv8i8_v8i16, ARM64_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv16i8, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv1i16, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv1i32, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv1i64, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv1i8, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv2i32, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv2i64, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv4i16, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv4i32, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv8i16, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQABSv8i8, ARM64_INS_SQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv16i8, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv1i16, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv1i32, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv1i64, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv1i8, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv2i32, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv2i64, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv4i16, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv4i32, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv8i16, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQADDv8i8, ARM64_INS_SQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALi16, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALi32, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALv1i32_indexed, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALv1i64_indexed, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALv2i32_indexed, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALv2i32_v2i64, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALv4i16_indexed, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALv4i16_v4i32, ARM64_INS_SQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALv4i32_indexed, ARM64_INS_SQDMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALv4i32_v2i64, ARM64_INS_SQDMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALv8i16_indexed, ARM64_INS_SQDMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLALv8i16_v4i32, ARM64_INS_SQDMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLi16, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLi32, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLv1i32_indexed, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLv1i64_indexed, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLv2i32_indexed, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLv2i32_v2i64, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLv4i16_indexed, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLv4i16_v4i32, ARM64_INS_SQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLv4i32_indexed, ARM64_INS_SQDMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLv4i32_v2i64, ARM64_INS_SQDMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLv8i16_indexed, ARM64_INS_SQDMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMLSLv8i16_v4i32, ARM64_INS_SQDMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv1i16, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv1i16_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv1i32, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv1i32_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv2i32, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv2i32_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv4i16, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv4i16_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv4i32, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv4i32_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv8i16, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULHv8i16_indexed, ARM64_INS_SQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLi16, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLi32, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLv1i32_indexed, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLv1i64_indexed, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLv2i32_indexed, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLv2i32_v2i64, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLv4i16_indexed, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLv4i16_v4i32, ARM64_INS_SQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLv4i32_indexed, ARM64_INS_SQDMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLv4i32_v2i64, ARM64_INS_SQDMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLv8i16_indexed, ARM64_INS_SQDMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQDMULLv8i16_v4i32, ARM64_INS_SQDMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv16i8, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv1i16, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv1i32, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv1i64, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv1i8, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv2i32, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv2i64, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv4i16, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv4i32, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv8i16, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQNEGv8i8, ARM64_INS_SQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv1i16, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv1i16_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv1i32, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv1i32_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv2i32, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv2i32_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv4i16, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv4i16_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv4i32, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv4i32_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv8i16, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRDMULHv8i16_indexed, ARM64_INS_SQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv16i8, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv1i16, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv1i32, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv1i64, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv1i8, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv2i32, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv2i64, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv4i16, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv4i32, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv8i16, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHLv8i8, ARM64_INS_SQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRNb, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRNh, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRNs, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRNv16i8_shift, ARM64_INS_SQRSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRNv2i32_shift, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRNv4i16_shift, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRNv4i32_shift, ARM64_INS_SQRSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRNv8i16_shift, ARM64_INS_SQRSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRNv8i8_shift, ARM64_INS_SQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRUNb, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRUNh, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRUNs, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRUNv16i8_shift, ARM64_INS_SQRSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRUNv2i32_shift, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRUNv4i16_shift, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRUNv4i32_shift, ARM64_INS_SQRSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRUNv8i16_shift, ARM64_INS_SQRSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQRSHRUNv8i8_shift, ARM64_INS_SQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUb, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUd, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUh, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUs, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUv16i8_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUv2i32_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUv2i64_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUv4i16_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUv4i32_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUv8i16_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLUv8i8_shift, ARM64_INS_SQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLb, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLd, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLh, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLs, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv16i8, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv16i8_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv1i16, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv1i32, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv1i64, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv1i8, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv2i32, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv2i32_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv2i64, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv2i64_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv4i16, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv4i16_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv4i32, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv4i32_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv8i16, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv8i16_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv8i8, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHLv8i8_shift, ARM64_INS_SQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRNb, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRNh, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRNs, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRNv16i8_shift, ARM64_INS_SQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRNv2i32_shift, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRNv4i16_shift, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRNv4i32_shift, ARM64_INS_SQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRNv8i16_shift, ARM64_INS_SQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRNv8i8_shift, ARM64_INS_SQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRUNb, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRUNh, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRUNs, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRUNv16i8_shift, ARM64_INS_SQSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRUNv2i32_shift, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRUNv4i16_shift, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRUNv4i32_shift, ARM64_INS_SQSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRUNv8i16_shift, ARM64_INS_SQSHRUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSHRUNv8i8_shift, ARM64_INS_SQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv16i8, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv1i16, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv1i32, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv1i64, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv1i8, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv2i32, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv2i64, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv4i16, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv4i32, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv8i16, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQSUBv8i8, ARM64_INS_SQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTNv16i8, ARM64_INS_SQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTNv1i16, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTNv1i32, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTNv1i8, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTNv2i32, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTNv4i16, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTNv4i32, ARM64_INS_SQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTNv8i16, ARM64_INS_SQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTNv8i8, ARM64_INS_SQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTUNv16i8, ARM64_INS_SQXTUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTUNv1i16, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTUNv1i32, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTUNv1i8, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTUNv2i32, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTUNv4i16, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTUNv4i32, ARM64_INS_SQXTUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTUNv8i16, ARM64_INS_SQXTUN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SQXTUNv8i8, ARM64_INS_SQXTUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRHADDv16i8, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRHADDv2i32, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRHADDv4i16, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRHADDv4i32, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRHADDv8i16, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRHADDv8i8, ARM64_INS_SRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRId, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRIv16i8_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRIv2i32_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRIv2i64_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRIv4i16_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRIv4i32_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRIv8i16_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRIv8i8_shift, ARM64_INS_SRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHLv16i8, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHLv1i64, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHLv2i32, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHLv2i64, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHLv4i16, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHLv4i32, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHLv8i16, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHLv8i8, ARM64_INS_SRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHRd, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHRv16i8_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHRv2i32_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHRv2i64_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHRv4i16_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHRv4i32_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHRv8i16_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSHRv8i8_shift, ARM64_INS_SRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSRAd, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSRAv16i8_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSRAv2i32_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSRAv2i64_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSRAv4i16_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSRAv4i32_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSRAv8i16_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SRSRAv8i8_shift, ARM64_INS_SRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLLv16i8_shift, ARM64_INS_SSHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLLv2i32_shift, ARM64_INS_SSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLLv4i16_shift, ARM64_INS_SSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLLv4i32_shift, ARM64_INS_SSHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLLv8i16_shift, ARM64_INS_SSHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLLv8i8_shift, ARM64_INS_SSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLv16i8, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLv1i64, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLv2i32, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLv2i64, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLv4i16, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLv4i32, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLv8i16, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHLv8i8, ARM64_INS_SSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHRd, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHRv16i8_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHRv2i32_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHRv2i64_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHRv4i16_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHRv4i32_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHRv8i16_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSHRv8i8_shift, ARM64_INS_SSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSRAd, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSRAv16i8_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSRAv2i32_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSRAv2i64_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSRAv4i16_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSRAv4i32_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSRAv8i16_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSRAv8i8_shift, ARM64_INS_SSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBLv16i8_v8i16, ARM64_INS_SSUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBLv2i32_v2i64, ARM64_INS_SSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBLv4i16_v4i32, ARM64_INS_SSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBLv4i32_v2i64, ARM64_INS_SSUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBLv8i16_v4i32, ARM64_INS_SSUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBLv8i8_v8i16, ARM64_INS_SSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBWv16i8_v8i16, ARM64_INS_SSUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBWv2i32_v2i64, ARM64_INS_SSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBWv4i16_v4i32, ARM64_INS_SSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBWv4i32_v2i64, ARM64_INS_SSUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBWv8i16_v4i32, ARM64_INS_SSUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SSUBWv8i8_v8i16, ARM64_INS_SSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv16b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv16b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv1d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv1d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv2d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv2d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv2s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv2s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv4h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv4h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv4s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv4s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv8b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv8b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv8h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Fourv8h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev16b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev16b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev1d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev1d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev2d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev2d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev2s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev2s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev4h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev4h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev4s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev4s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev8b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev8b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev8h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Onev8h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev16b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev16b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev1d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev1d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev2d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev2d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev2s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev2s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev4h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev4h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev4s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev4s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev8b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev8b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev8h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Threev8h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov16b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov16b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov1d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov1d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov2d, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov2d_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov2s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov2s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov4h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov4h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov4s, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov4s_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov8b, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov8b_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov8h, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1Twov8h_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1i16, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1i16_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1i32, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1i32_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1i64, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1i64_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1i8, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST1i8_POST, ARM64_INS_ST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov16b, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov16b_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov2d, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov2d_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov2s, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov2s_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov4h, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov4h_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov4s, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov4s_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov8b, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov8b_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov8h, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2Twov8h_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2i16, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2i16_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2i32, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2i32_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2i64, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2i64_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2i8, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST2i8_POST, ARM64_INS_ST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev16b, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev16b_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev2d, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev2d_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev2s, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev2s_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev4h, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev4h_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev4s, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev4s_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev8b, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev8b_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev8h, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3Threev8h_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3i16, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3i16_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3i32, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3i32_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3i64, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3i64_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3i8, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST3i8_POST, ARM64_INS_ST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv16b, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv16b_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv2d, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv2d_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv2s, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv2s_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv4h, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv4h_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv4s, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv4s_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv8b, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv8b_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv8h, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4Fourv8h_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4i16, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4i16_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4i32, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4i32_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4i64, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4i64_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4i8, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ST4i8_POST, ARM64_INS_ST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STLRB, ARM64_INS_STLRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STLRH, ARM64_INS_STLRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STLRW, ARM64_INS_STLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STLRX, ARM64_INS_STLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STLXPW, ARM64_INS_STLXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STLXPX, ARM64_INS_STLXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STLXRB, ARM64_INS_STLXRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STLXRH, ARM64_INS_STLXRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STLXRW, ARM64_INS_STLXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STLXRX, ARM64_INS_STLXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STNPDi, ARM64_INS_STNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STNPQi, ARM64_INS_STNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STNPSi, ARM64_INS_STNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STNPWi, ARM64_INS_STNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STNPXi, ARM64_INS_STNP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPDi, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPDpost, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPDpre, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPQi, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPQpost, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPQpre, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPSi, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPSpost, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPSpre, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPWi, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPWpost, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPWpre, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPXi, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPXpost, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STPXpre, ARM64_INS_STP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRBBpost, ARM64_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRBBpre, ARM64_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRBBroW, ARM64_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRBBroX, ARM64_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRBBui, ARM64_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRBpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRBpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRBroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRBroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRBui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRDpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRDpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRDroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRDroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRDui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRHHpost, ARM64_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRHHpre, ARM64_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRHHroW, ARM64_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRHHroX, ARM64_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRHHui, ARM64_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRHpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRHpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRHroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRHroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRHui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRQpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRQpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRQroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRQroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRQui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRSpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRSpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRSroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRSroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRSui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRWpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRWpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRWroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRWroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRWui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRXpost, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRXpre, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRXroW, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRXroX, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STRXui, ARM64_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STTRBi, ARM64_INS_STTRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STTRHi, ARM64_INS_STTRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STTRWi, ARM64_INS_STTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STTRXi, ARM64_INS_STTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STURBBi, ARM64_INS_STURB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STURBi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STURDi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STURHHi, ARM64_INS_STURH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STURHi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STURQi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STURSi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STURWi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STURXi, ARM64_INS_STUR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STXPW, ARM64_INS_STXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STXPX, ARM64_INS_STXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STXRB, ARM64_INS_STXRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STXRH, ARM64_INS_STXRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STXRW, ARM64_INS_STXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_STXRX, ARM64_INS_STXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBHNv2i64_v2i32, ARM64_INS_SUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBHNv2i64_v4i32, ARM64_INS_SUBHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBHNv4i32_v4i16, ARM64_INS_SUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBHNv4i32_v8i16, ARM64_INS_SUBHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBHNv8i16_v16i8, ARM64_INS_SUBHN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBHNv8i16_v8i8, ARM64_INS_SUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBSWri, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBSWrs, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBSWrx, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBSXri, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBSXrs, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBSXrx, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBSXrx64, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBWri, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBWrs, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBWrx, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBXri, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBXrs, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBXrx, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBXrx64, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBv16i8, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBv1i64, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBv2i32, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBv2i64, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBv4i16, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBv4i32, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBv8i16, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUBv8i8, ARM64_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv16i8, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv1i16, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv1i32, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv1i64, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv1i8, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv2i32, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv2i64, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv4i16, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv4i32, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv8i16, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SUQADDv8i8, ARM64_INS_SUQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SVC, ARM64_INS_SVC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SYSLxt, ARM64_INS_SYSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_SYSxt, ARM64_INS_SYS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBLv16i8Four, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBLv16i8One, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBLv16i8Three, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBLv16i8Two, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBLv8i8Four, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBLv8i8One, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBLv8i8Three, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBLv8i8Two, ARM64_INS_TBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBNZW, ARM64_INS_TBNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ AArch64_TBNZX, ARM64_INS_TBNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ AArch64_TBXv16i8Four, ARM64_INS_TBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBXv16i8One, ARM64_INS_TBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBXv16i8Three, ARM64_INS_TBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBXv16i8Two, ARM64_INS_TBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBXv8i8Four, ARM64_INS_TBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBXv8i8One, ARM64_INS_TBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBXv8i8Three, ARM64_INS_TBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBXv8i8Two, ARM64_INS_TBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TBZW, ARM64_INS_TBZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ AArch64_TBZX, ARM64_INS_TBZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ AArch64_TRN1v16i8, ARM64_INS_TRN1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN1v2i32, ARM64_INS_TRN1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN1v2i64, ARM64_INS_TRN1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN1v4i16, ARM64_INS_TRN1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN1v4i32, ARM64_INS_TRN1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN1v8i16, ARM64_INS_TRN1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN1v8i8, ARM64_INS_TRN1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN2v16i8, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN2v2i32, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN2v2i64, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN2v4i16, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN2v4i32, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN2v8i16, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_TRN2v8i8, ARM64_INS_TRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABALv16i8_v8i16, ARM64_INS_UABAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABALv2i32_v2i64, ARM64_INS_UABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABALv4i16_v4i32, ARM64_INS_UABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABALv4i32_v2i64, ARM64_INS_UABAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABALv8i16_v4i32, ARM64_INS_UABAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABALv8i8_v8i16, ARM64_INS_UABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABAv16i8, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABAv2i32, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABAv4i16, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABAv4i32, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABAv8i16, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABAv8i8, ARM64_INS_UABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDLv16i8_v8i16, ARM64_INS_UABDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDLv2i32_v2i64, ARM64_INS_UABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDLv4i16_v4i32, ARM64_INS_UABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDLv4i32_v2i64, ARM64_INS_UABDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDLv8i16_v4i32, ARM64_INS_UABDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDLv8i8_v8i16, ARM64_INS_UABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDv16i8, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDv2i32, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDv4i16, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDv4i32, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDv8i16, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UABDv8i8, ARM64_INS_UABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADALPv16i8_v8i16, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADALPv2i32_v1i64, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADALPv4i16_v2i32, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADALPv4i32_v2i64, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADALPv8i16_v4i32, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADALPv8i8_v4i16, ARM64_INS_UADALP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLPv16i8_v8i16, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLPv2i32_v1i64, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLPv4i16_v2i32, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLPv4i32_v2i64, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLPv8i16_v4i32, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLPv8i8_v4i16, ARM64_INS_UADDLP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLVv16i8v, ARM64_INS_UADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLVv4i16v, ARM64_INS_UADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLVv4i32v, ARM64_INS_UADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLVv8i16v, ARM64_INS_UADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLVv8i8v, ARM64_INS_UADDLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLv16i8_v8i16, ARM64_INS_UADDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLv2i32_v2i64, ARM64_INS_UADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLv4i16_v4i32, ARM64_INS_UADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLv4i32_v2i64, ARM64_INS_UADDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLv8i16_v4i32, ARM64_INS_UADDL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDLv8i8_v8i16, ARM64_INS_UADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDWv16i8_v8i16, ARM64_INS_UADDW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDWv2i32_v2i64, ARM64_INS_UADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDWv4i16_v4i32, ARM64_INS_UADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDWv4i32_v2i64, ARM64_INS_UADDW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDWv8i16_v4i32, ARM64_INS_UADDW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UADDWv8i8_v8i16, ARM64_INS_UADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UBFMWri, ARM64_INS_UBFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UBFMXri, ARM64_INS_UBFM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFSWDri, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFSWSri, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFSXDri, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFSXSri, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFUWDri, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFUWSri, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFUXDri, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFUXSri, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFd, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFs, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFv1i32, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFv1i64, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFv2f32, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFv2f64, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFv2i32_shift, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFv2i64_shift, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFv4f32, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UCVTFv4i32_shift, ARM64_INS_UCVTF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UDIVWr, ARM64_INS_UDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UDIVXr, ARM64_INS_UDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UDIV_IntWr, ARM64_INS_UDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UDIV_IntXr, ARM64_INS_UDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHADDv16i8, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHADDv2i32, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHADDv4i16, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHADDv4i32, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHADDv8i16, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHADDv8i8, ARM64_INS_UHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHSUBv16i8, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHSUBv2i32, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHSUBv4i16, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHSUBv4i32, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHSUBv8i16, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UHSUBv8i8, ARM64_INS_UHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMADDLrrr, ARM64_INS_UMADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXPv16i8, ARM64_INS_UMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXPv2i32, ARM64_INS_UMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXPv4i16, ARM64_INS_UMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXPv4i32, ARM64_INS_UMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXPv8i16, ARM64_INS_UMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXPv8i8, ARM64_INS_UMAXP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXVv16i8v, ARM64_INS_UMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXVv4i16v, ARM64_INS_UMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXVv4i32v, ARM64_INS_UMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXVv8i16v, ARM64_INS_UMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXVv8i8v, ARM64_INS_UMAXV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXv16i8, ARM64_INS_UMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXv2i32, ARM64_INS_UMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXv4i16, ARM64_INS_UMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXv4i32, ARM64_INS_UMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXv8i16, ARM64_INS_UMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMAXv8i8, ARM64_INS_UMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINPv16i8, ARM64_INS_UMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINPv2i32, ARM64_INS_UMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINPv4i16, ARM64_INS_UMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINPv4i32, ARM64_INS_UMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINPv8i16, ARM64_INS_UMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINPv8i8, ARM64_INS_UMINP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINVv16i8v, ARM64_INS_UMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINVv4i16v, ARM64_INS_UMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINVv4i32v, ARM64_INS_UMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINVv8i16v, ARM64_INS_UMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINVv8i8v, ARM64_INS_UMINV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINv16i8, ARM64_INS_UMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINv2i32, ARM64_INS_UMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINv4i16, ARM64_INS_UMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINv4i32, ARM64_INS_UMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINv8i16, ARM64_INS_UMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMINv8i8, ARM64_INS_UMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLALv16i8_v8i16, ARM64_INS_UMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLALv2i32_indexed, ARM64_INS_UMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLALv2i32_v2i64, ARM64_INS_UMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLALv4i16_indexed, ARM64_INS_UMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLALv4i16_v4i32, ARM64_INS_UMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLALv4i32_indexed, ARM64_INS_UMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLALv4i32_v2i64, ARM64_INS_UMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLALv8i16_indexed, ARM64_INS_UMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLALv8i16_v4i32, ARM64_INS_UMLAL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLALv8i8_v8i16, ARM64_INS_UMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLSLv16i8_v8i16, ARM64_INS_UMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLSLv2i32_indexed, ARM64_INS_UMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLSLv2i32_v2i64, ARM64_INS_UMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLSLv4i16_indexed, ARM64_INS_UMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLSLv4i16_v4i32, ARM64_INS_UMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLSLv4i32_indexed, ARM64_INS_UMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLSLv4i32_v2i64, ARM64_INS_UMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLSLv8i16_indexed, ARM64_INS_UMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLSLv8i16_v4i32, ARM64_INS_UMLSL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMLSLv8i8_v8i16, ARM64_INS_UMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMOVvi16, ARM64_INS_UMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMOVvi32, ARM64_INS_UMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMOVvi64, ARM64_INS_UMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMOVvi8, ARM64_INS_UMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMSUBLrrr, ARM64_INS_UMSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULHrr, ARM64_INS_UMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULLv16i8_v8i16, ARM64_INS_UMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULLv2i32_indexed, ARM64_INS_UMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULLv2i32_v2i64, ARM64_INS_UMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULLv4i16_indexed, ARM64_INS_UMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULLv4i16_v4i32, ARM64_INS_UMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULLv4i32_indexed, ARM64_INS_UMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULLv4i32_v2i64, ARM64_INS_UMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULLv8i16_indexed, ARM64_INS_UMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULLv8i16_v4i32, ARM64_INS_UMULL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UMULLv8i8_v8i16, ARM64_INS_UMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv16i8, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv1i16, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv1i32, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv1i64, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv1i8, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv2i32, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv2i64, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv4i16, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv4i32, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv8i16, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQADDv8i8, ARM64_INS_UQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv16i8, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv1i16, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv1i32, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv1i64, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv1i8, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv2i32, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv2i64, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv4i16, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv4i32, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv8i16, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHLv8i8, ARM64_INS_UQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHRNb, ARM64_INS_UQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHRNh, ARM64_INS_UQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHRNs, ARM64_INS_UQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHRNv16i8_shift, ARM64_INS_UQRSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHRNv2i32_shift, ARM64_INS_UQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHRNv4i16_shift, ARM64_INS_UQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHRNv4i32_shift, ARM64_INS_UQRSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHRNv8i16_shift, ARM64_INS_UQRSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQRSHRNv8i8_shift, ARM64_INS_UQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLb, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLd, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLh, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLs, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv16i8, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv16i8_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv1i16, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv1i32, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv1i64, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv1i8, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv2i32, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv2i32_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv2i64, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv2i64_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv4i16, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv4i16_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv4i32, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv4i32_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv8i16, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv8i16_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv8i8, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHLv8i8_shift, ARM64_INS_UQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHRNb, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHRNh, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHRNs, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHRNv16i8_shift, ARM64_INS_UQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHRNv2i32_shift, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHRNv4i16_shift, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHRNv4i32_shift, ARM64_INS_UQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHRNv8i16_shift, ARM64_INS_UQSHRN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSHRNv8i8_shift, ARM64_INS_UQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv16i8, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv1i16, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv1i32, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv1i64, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv1i8, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv2i32, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv2i64, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv4i16, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv4i32, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv8i16, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQSUBv8i8, ARM64_INS_UQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQXTNv16i8, ARM64_INS_UQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQXTNv1i16, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQXTNv1i32, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQXTNv1i8, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQXTNv2i32, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQXTNv4i16, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQXTNv4i32, ARM64_INS_UQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQXTNv8i16, ARM64_INS_UQXTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UQXTNv8i8, ARM64_INS_UQXTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URECPEv2i32, ARM64_INS_URECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URECPEv4i32, ARM64_INS_URECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URHADDv16i8, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URHADDv2i32, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URHADDv4i16, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URHADDv4i32, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URHADDv8i16, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URHADDv8i8, ARM64_INS_URHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHLv16i8, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHLv1i64, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHLv2i32, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHLv2i64, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHLv4i16, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHLv4i32, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHLv8i16, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHLv8i8, ARM64_INS_URSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHRd, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHRv16i8_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHRv2i32_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHRv2i64_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHRv4i16_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHRv4i32_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHRv8i16_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSHRv8i8_shift, ARM64_INS_URSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSQRTEv2i32, ARM64_INS_URSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSQRTEv4i32, ARM64_INS_URSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSRAd, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSRAv16i8_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSRAv2i32_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSRAv2i64_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSRAv4i16_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSRAv4i32_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSRAv8i16_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_URSRAv8i8_shift, ARM64_INS_URSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLLv16i8_shift, ARM64_INS_USHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLLv2i32_shift, ARM64_INS_USHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLLv4i16_shift, ARM64_INS_USHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLLv4i32_shift, ARM64_INS_USHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLLv8i16_shift, ARM64_INS_USHLL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLLv8i8_shift, ARM64_INS_USHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLv16i8, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLv1i64, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLv2i32, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLv2i64, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLv4i16, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLv4i32, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLv8i16, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHLv8i8, ARM64_INS_USHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHRd, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHRv16i8_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHRv2i32_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHRv2i64_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHRv4i16_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHRv4i32_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHRv8i16_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USHRv8i8_shift, ARM64_INS_USHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv16i8, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv1i16, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv1i32, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv1i64, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv1i8, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv2i32, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv2i64, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv4i16, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv4i32, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv8i16, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USQADDv8i8, ARM64_INS_USQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USRAd, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USRAv16i8_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USRAv2i32_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USRAv2i64_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USRAv4i16_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USRAv4i32_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USRAv8i16_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USRAv8i8_shift, ARM64_INS_USRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBLv16i8_v8i16, ARM64_INS_USUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBLv2i32_v2i64, ARM64_INS_USUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBLv4i16_v4i32, ARM64_INS_USUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBLv4i32_v2i64, ARM64_INS_USUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBLv8i16_v4i32, ARM64_INS_USUBL2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBLv8i8_v8i16, ARM64_INS_USUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBWv16i8_v8i16, ARM64_INS_USUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBWv2i32_v2i64, ARM64_INS_USUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBWv4i16_v4i32, ARM64_INS_USUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBWv4i32_v2i64, ARM64_INS_USUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBWv8i16_v4i32, ARM64_INS_USUBW2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_USUBWv8i8_v8i16, ARM64_INS_USUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP1v16i8, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP1v2i32, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP1v2i64, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP1v4i16, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP1v4i32, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP1v8i16, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP1v8i8, ARM64_INS_UZP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP2v16i8, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP2v2i32, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP2v2i64, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP2v4i16, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP2v4i32, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP2v8i16, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_UZP2v8i8, ARM64_INS_UZP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_XTNv16i8, ARM64_INS_XTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_XTNv2i32, ARM64_INS_XTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_XTNv4i16, ARM64_INS_XTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_XTNv4i32, ARM64_INS_XTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_XTNv8i16, ARM64_INS_XTN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_XTNv8i8, ARM64_INS_XTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP1v16i8, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP1v2i32, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP1v2i64, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP1v4i16, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP1v4i32, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP1v8i16, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP1v8i8, ARM64_INS_ZIP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP2v16i8, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP2v2i32, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP2v2i64, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP2v4i16, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP2v4i32, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP2v8i16, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ AArch64_ZIP2v8i8, ARM64_INS_ZIP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
+#endif
+},
diff --git a/arch/ARM/ARMMapping.c b/arch/ARM/ARMMapping.c
index d7dee69..24de7bf 100644
--- a/arch/ARM/ARMMapping.c
+++ b/arch/ARM/ARMMapping.c
@@ -275,13314 +275,7 @@
#endif
},
- {
- ARM_ADCri, ARM_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ADCrr, ARM_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ADCrsi, ARM_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ADCrsr, ARM_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ADDri, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ADDrr, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ADDrsi, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ADDrsr, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ADR, ARM_INS_ADR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_AESD, ARM_INS_AESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_AESE, ARM_INS_AESE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_AESIMC, ARM_INS_AESIMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_AESMC, ARM_INS_AESMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_ANDri, ARM_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ANDrr, ARM_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ANDrsi, ARM_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ANDrsr, ARM_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_BFC, ARM_INS_BFC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
-#endif
- },
- {
- ARM_BFI, ARM_INS_BFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
-#endif
- },
- {
- ARM_BICri, ARM_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_BICrr, ARM_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_BICrsi, ARM_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_BICrsr, ARM_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_BKPT, ARM_INS_BKPT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_BL, ARM_INS_BL,
-#ifndef CAPSTONE_DIET
- { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_BLX, ARM_INS_BLX,
-#ifndef CAPSTONE_DIET
- { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_JUMP, ARM_GRP_V5T, 0 }, 0, 0
-#endif
- },
- {
- ARM_BLX_pred, ARM_INS_BLX,
-#ifndef CAPSTONE_DIET
- { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 0
-#endif
- },
- {
- ARM_BLXi, ARM_INS_BLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 0
-#endif
- },
- {
- ARM_BL_pred, ARM_INS_BL,
-#ifndef CAPSTONE_DIET
- { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_BX, ARM_INS_BX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 1, 1
-#endif
- },
- {
- ARM_BXJ, ARM_INS_BXJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_BX_RET, ARM_INS_BX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 0, 0
-#endif
- },
- {
- ARM_BX_pred, ARM_INS_BX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 1, 1
-#endif
- },
- {
- ARM_Bcc, ARM_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, 0 }, 1, 0
-#endif
- },
- {
- ARM_CDP, ARM_INS_CDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_CDP2, ARM_INS_CDP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_CLREX, ARM_INS_CLREX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
-#endif
- },
- {
- ARM_CLZ, ARM_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 0
-#endif
- },
- {
- ARM_CMNri, ARM_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CMNzrr, ARM_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CMNzrsi, ARM_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CMNzrsr, ARM_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CMPri, ARM_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CMPrr, ARM_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CMPrsi, ARM_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CMPrsr, ARM_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CPS1p, ARM_INS_CPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CPS2p, ARM_INS_CPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CPS3p, ARM_INS_CPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_CRC32B, ARM_INS_CRC32B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_CRC32CB, ARM_INS_CRC32CB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_CRC32CH, ARM_INS_CRC32CH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_CRC32CW, ARM_INS_CRC32CW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_CRC32H, ARM_INS_CRC32H,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_CRC32W, ARM_INS_CRC32W,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_DBG, ARM_INS_DBG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
-#endif
- },
- {
- ARM_DMB, ARM_INS_DMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0
-#endif
- },
- {
- ARM_DSB, ARM_INS_DSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0
-#endif
- },
- {
- ARM_EORri, ARM_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_EORrr, ARM_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_EORrsi, ARM_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_EORrsr, ARM_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ERET, ARM_INS_ERET,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
-#endif
- },
- {
- ARM_FCONSTD, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP3, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_FCONSTS, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP3, 0 }, 0, 0
-#endif
- },
- {
- ARM_FLDMXDB_UPD, ARM_INS_FLDMDBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_FLDMXIA, ARM_INS_FLDMIAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_FLDMXIA_UPD, ARM_INS_FLDMIAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_FMSTAT, ARM_INS_VMRS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR_NZCV, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_FSTMXDB_UPD, ARM_INS_FSTMDBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_FSTMXIA, ARM_INS_FSTMIAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_FSTMXIA_UPD, ARM_INS_FSTMIAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_HINT, ARM_INS_HINT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_HLT, ARM_INS_HLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_HVC, ARM_INS_HVC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
-#endif
- },
- {
- ARM_ISB, ARM_INS_ISB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDA, ARM_INS_LDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDAB, ARM_INS_LDAB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDAEX, ARM_INS_LDAEX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDAEXB, ARM_INS_LDAEXB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDAEXD, ARM_INS_LDAEXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDAEXH, ARM_INS_LDAEXH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDAH, ARM_INS_LDAH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC2L_OFFSET, ARM_INS_LDC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC2L_OPTION, ARM_INS_LDC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC2L_POST, ARM_INS_LDC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC2L_PRE, ARM_INS_LDC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC2_OFFSET, ARM_INS_LDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC2_OPTION, ARM_INS_LDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC2_POST, ARM_INS_LDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC2_PRE, ARM_INS_LDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDCL_OFFSET, ARM_INS_LDCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDCL_OPTION, ARM_INS_LDCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDCL_POST, ARM_INS_LDCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDCL_PRE, ARM_INS_LDCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC_OFFSET, ARM_INS_LDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC_OPTION, ARM_INS_LDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC_POST, ARM_INS_LDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDC_PRE, ARM_INS_LDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDMDA, ARM_INS_LDMDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDMDA_UPD, ARM_INS_LDMDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDMDB, ARM_INS_LDMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDMDB_UPD, ARM_INS_LDMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDMIA, ARM_INS_LDM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDMIA_UPD, ARM_INS_LDM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDMIB, ARM_INS_LDMIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDMIB_UPD, ARM_INS_LDMIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRBT_POST_IMM, ARM_INS_LDRBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRBT_POST_REG, ARM_INS_LDRBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRB_POST_IMM, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRB_POST_REG, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRB_PRE_IMM, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRB_PRE_REG, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRBi12, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRBrs, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRD, ARM_INS_LDRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRD_POST, ARM_INS_LDRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRD_PRE, ARM_INS_LDRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDREX, ARM_INS_LDREX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDREXB, ARM_INS_LDREXB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDREXD, ARM_INS_LDREXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDREXH, ARM_INS_LDREXH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRH, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRHTi, ARM_INS_LDRHT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRHTr, ARM_INS_LDRHT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRH_POST, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRH_PRE, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRSB, ARM_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRSBTi, ARM_INS_LDRSBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRSBTr, ARM_INS_LDRSBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRSB_POST, ARM_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRSB_PRE, ARM_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRSH, ARM_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRSHTi, ARM_INS_LDRSHT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRSHTr, ARM_INS_LDRSHT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRSH_POST, ARM_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRSH_PRE, ARM_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRT_POST_IMM, ARM_INS_LDRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRT_POST_REG, ARM_INS_LDRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDR_POST_IMM, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDR_POST_REG, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDR_PRE_IMM, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDR_PRE_REG, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRcp, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRi12, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_LDRrs, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MCR, ARM_INS_MCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MCR2, ARM_INS_MCR2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_MCRR, ARM_INS_MCRR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MCRR2, ARM_INS_MCRR2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_MLA, ARM_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_MLS, ARM_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_MOVPCLR, ARM_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MOVTi16, ARM_INS_MOVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
-#endif
- },
- {
- ARM_MOVi, ARM_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MOVi16, ARM_INS_MOVW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
-#endif
- },
- {
- ARM_MOVr, ARM_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MOVr_TC, ARM_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MOVsi, ARM_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MOVsr, ARM_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MRC, ARM_INS_MRC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MRC2, ARM_INS_MRC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_MRRC, ARM_INS_MRRC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MRRC2, ARM_INS_MRRC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_MRS, ARM_INS_MRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MRSbanked, ARM_INS_MRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
-#endif
- },
- {
- ARM_MRSsys, ARM_INS_MRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MSR, ARM_INS_MSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MSRbanked, ARM_INS_MSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
-#endif
- },
- {
- ARM_MSRi, ARM_INS_MSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MUL, ARM_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_MVNi, ARM_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MVNr, ARM_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MVNsi, ARM_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_MVNsr, ARM_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ORRri, ARM_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ORRrr, ARM_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ORRrsi, ARM_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_ORRrsr, ARM_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_PKHBT, ARM_INS_PKHBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_PKHTB, ARM_INS_PKHTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_PLDWi12, ARM_INS_PLDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
-#endif
- },
- {
- ARM_PLDWrs, ARM_INS_PLDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
-#endif
- },
- {
- ARM_PLDi12, ARM_INS_PLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_PLDrs, ARM_INS_PLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_PLIi12, ARM_INS_PLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
-#endif
- },
- {
- ARM_PLIrs, ARM_INS_PLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
-#endif
- },
- {
- ARM_QADD, ARM_INS_QADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_QADD16, ARM_INS_QADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_QADD8, ARM_INS_QADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_QASX, ARM_INS_QASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_QDADD, ARM_INS_QDADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_QDSUB, ARM_INS_QDSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_QSAX, ARM_INS_QSAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_QSUB, ARM_INS_QSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_QSUB16, ARM_INS_QSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_QSUB8, ARM_INS_QSUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RBIT, ARM_INS_RBIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
-#endif
- },
- {
- ARM_REV, ARM_INS_REV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_REV16, ARM_INS_REV16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_REVSH, ARM_INS_REVSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_RFEDA, ARM_INS_RFEDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RFEDA_UPD, ARM_INS_RFEDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RFEDB, ARM_INS_RFEDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RFEDB_UPD, ARM_INS_RFEDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RFEIA, ARM_INS_RFEIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RFEIA_UPD, ARM_INS_RFEIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RFEIB, ARM_INS_RFEIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RFEIB_UPD, ARM_INS_RFEIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RSBri, ARM_INS_RSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RSBrr, ARM_INS_RSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RSBrsi, ARM_INS_RSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RSBrsr, ARM_INS_RSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RSCri, ARM_INS_RSC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RSCrr, ARM_INS_RSC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RSCrsi, ARM_INS_RSC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_RSCrsr, ARM_INS_RSC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SADD16, ARM_INS_SADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SADD8, ARM_INS_SADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SASX, ARM_INS_SASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SBCri, ARM_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SBCrr, ARM_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SBCrsi, ARM_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SBCrsr, ARM_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SBFX, ARM_INS_SBFX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
-#endif
- },
- {
- ARM_SDIV, ARM_INS_SDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SEL, ARM_INS_SEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SETEND, ARM_INS_SETEND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHA1C, ARM_INS_SHA1C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHA1H, ARM_INS_SHA1H,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHA1M, ARM_INS_SHA1M,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHA1P, ARM_INS_SHA1P,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHA1SU0, ARM_INS_SHA1SU0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHA1SU1, ARM_INS_SHA1SU1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHA256H, ARM_INS_SHA256H,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHA256H2, ARM_INS_SHA256H2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHA256SU0, ARM_INS_SHA256SU0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHA256SU1, ARM_INS_SHA256SU1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHADD16, ARM_INS_SHADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHADD8, ARM_INS_SHADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHASX, ARM_INS_SHASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHSAX, ARM_INS_SHSAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHSUB16, ARM_INS_SHSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SHSUB8, ARM_INS_SHSUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMC, ARM_INS_SMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_TRUSTZONE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLABB, ARM_INS_SMLABB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLABT, ARM_INS_SMLABT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLAD, ARM_INS_SMLAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLADX, ARM_INS_SMLADX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLAL, ARM_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLALBB, ARM_INS_SMLALBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLALBT, ARM_INS_SMLALBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLALD, ARM_INS_SMLALD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLALDX, ARM_INS_SMLALDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLALTB, ARM_INS_SMLALTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLALTT, ARM_INS_SMLALTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLATB, ARM_INS_SMLATB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLATT, ARM_INS_SMLATT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLAWB, ARM_INS_SMLAWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLAWT, ARM_INS_SMLAWT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLSD, ARM_INS_SMLSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLSDX, ARM_INS_SMLSDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLSLD, ARM_INS_SMLSLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMLSLDX, ARM_INS_SMLSLDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMMLA, ARM_INS_SMMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMMLAR, ARM_INS_SMMLAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMMLS, ARM_INS_SMMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMMLSR, ARM_INS_SMMLSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMMUL, ARM_INS_SMMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMMULR, ARM_INS_SMMULR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMUAD, ARM_INS_SMUAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMUADX, ARM_INS_SMUADX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMULBB, ARM_INS_SMULBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMULBT, ARM_INS_SMULBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMULL, ARM_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMULTB, ARM_INS_SMULTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMULTT, ARM_INS_SMULTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMULWB, ARM_INS_SMULWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMULWT, ARM_INS_SMULWT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMUSD, ARM_INS_SMUSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SMUSDX, ARM_INS_SMUSDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SRSDA, ARM_INS_SRSDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SRSDA_UPD, ARM_INS_SRSDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SRSDB, ARM_INS_SRSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SRSDB_UPD, ARM_INS_SRSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SRSIA, ARM_INS_SRSIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SRSIA_UPD, ARM_INS_SRSIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SRSIB, ARM_INS_SRSIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SRSIB_UPD, ARM_INS_SRSIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SSAT, ARM_INS_SSAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SSAT16, ARM_INS_SSAT16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SSAX, ARM_INS_SSAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SSUB16, ARM_INS_SSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SSUB8, ARM_INS_SSUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC2L_OFFSET, ARM_INS_STC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC2L_OPTION, ARM_INS_STC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC2L_POST, ARM_INS_STC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC2L_PRE, ARM_INS_STC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC2_OFFSET, ARM_INS_STC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC2_OPTION, ARM_INS_STC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC2_POST, ARM_INS_STC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC2_PRE, ARM_INS_STC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STCL_OFFSET, ARM_INS_STCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STCL_OPTION, ARM_INS_STCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STCL_POST, ARM_INS_STCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STCL_PRE, ARM_INS_STCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC_OFFSET, ARM_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC_OPTION, ARM_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC_POST, ARM_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STC_PRE, ARM_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STL, ARM_INS_STL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STLB, ARM_INS_STLB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STLEX, ARM_INS_STLEX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STLEXB, ARM_INS_STLEXB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STLEXD, ARM_INS_STLEXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STLEXH, ARM_INS_STLEXH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STLH, ARM_INS_STLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_STMDA, ARM_INS_STMDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STMDA_UPD, ARM_INS_STMDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STMDB, ARM_INS_STMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STMDB_UPD, ARM_INS_STMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STMIA, ARM_INS_STM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STMIA_UPD, ARM_INS_STM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STMIB, ARM_INS_STMIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STMIB_UPD, ARM_INS_STMIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRBT_POST_IMM, ARM_INS_STRBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRBT_POST_REG, ARM_INS_STRBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRB_POST_IMM, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRB_POST_REG, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRB_PRE_IMM, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRB_PRE_REG, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRBi12, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRBrs, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRD, ARM_INS_STRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRD_POST, ARM_INS_STRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRD_PRE, ARM_INS_STRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STREX, ARM_INS_STREX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STREXB, ARM_INS_STREXB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STREXD, ARM_INS_STREXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STREXH, ARM_INS_STREXH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRH, ARM_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRHTi, ARM_INS_STRHT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRHTr, ARM_INS_STRHT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRH_POST, ARM_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRH_PRE, ARM_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRT_POST_IMM, ARM_INS_STRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRT_POST_REG, ARM_INS_STRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STR_POST_IMM, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STR_POST_REG, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STR_PRE_IMM, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STR_PRE_REG, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRi12, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_STRrs, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SUBri, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SUBrr, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SUBrsi, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SUBrsr, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SVC, ARM_INS_SVC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_SP, 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_SWP, ARM_INS_SWP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_SWPB, ARM_INS_SWPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_SXTAB, ARM_INS_SXTAB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SXTAB16, ARM_INS_SXTAB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SXTAH, ARM_INS_SXTAH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SXTB, ARM_INS_SXTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SXTB16, ARM_INS_SXTB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_SXTH, ARM_INS_SXTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_TEQri, ARM_INS_TEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_TEQrr, ARM_INS_TEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_TEQrsi, ARM_INS_TEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_TEQrsr, ARM_INS_TEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_TRAP, ARM_INS_TRAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_TRAPNaCl, ARM_INS_TRAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_TSTri, ARM_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_TSTrr, ARM_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_TSTrsi, ARM_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_TSTrsr, ARM_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UADD16, ARM_INS_UADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UADD8, ARM_INS_UADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UASX, ARM_INS_UASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UBFX, ARM_INS_UBFX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
-#endif
- },
- {
- ARM_UDF, ARM_INS_UDF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UDIV, ARM_INS_UDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UHADD16, ARM_INS_UHADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UHADD8, ARM_INS_UHADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UHASX, ARM_INS_UHASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UHSAX, ARM_INS_UHSAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UHSUB16, ARM_INS_UHSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UHSUB8, ARM_INS_UHSUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UMAAL, ARM_INS_UMAAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_UMLAL, ARM_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_UMULL, ARM_INS_UMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_UQADD16, ARM_INS_UQADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UQADD8, ARM_INS_UQADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UQASX, ARM_INS_UQASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UQSAX, ARM_INS_UQSAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UQSUB16, ARM_INS_UQSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UQSUB8, ARM_INS_UQSUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_USAD8, ARM_INS_USAD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_USADA8, ARM_INS_USADA8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_USAT, ARM_INS_USAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_USAT16, ARM_INS_USAT16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_USAX, ARM_INS_USAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_USUB16, ARM_INS_USUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_USUB8, ARM_INS_USUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_UXTAB, ARM_INS_UXTAB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_UXTAB16, ARM_INS_UXTAB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_UXTAH, ARM_INS_UXTAH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_UXTB, ARM_INS_UXTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_UXTB16, ARM_INS_UXTB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_UXTH, ARM_INS_UXTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABALsv2i64, ARM_INS_VABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABALsv4i32, ARM_INS_VABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABALsv8i16, ARM_INS_VABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABALuv2i64, ARM_INS_VABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABALuv4i32, ARM_INS_VABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABALuv8i16, ARM_INS_VABAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAsv16i8, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAsv2i32, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAsv4i16, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAsv4i32, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAsv8i16, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAsv8i8, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAuv16i8, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAuv2i32, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAuv4i16, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAuv4i32, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAuv8i16, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABAuv8i8, ARM_INS_VABA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDLsv2i64, ARM_INS_VABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDLsv4i32, ARM_INS_VABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDLsv8i16, ARM_INS_VABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDLuv2i64, ARM_INS_VABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDLuv4i32, ARM_INS_VABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDLuv8i16, ARM_INS_VABDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDfd, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDfq, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDsv16i8, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDsv2i32, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDsv4i16, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDsv4i32, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDsv8i16, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDsv8i8, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDuv16i8, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDuv2i32, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDuv4i16, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDuv4i32, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDuv8i16, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABDuv8i8, ARM_INS_VABD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABSD, ARM_INS_VABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABSS, ARM_INS_VABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABSfd, ARM_INS_VABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABSfq, ARM_INS_VABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABSv16i8, ARM_INS_VABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABSv2i32, ARM_INS_VABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABSv4i16, ARM_INS_VABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABSv4i32, ARM_INS_VABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABSv8i16, ARM_INS_VABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VABSv8i8, ARM_INS_VABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VACGEd, ARM_INS_VACGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VACGEq, ARM_INS_VACGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VACGTd, ARM_INS_VACGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VACGTq, ARM_INS_VACGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDD, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDHNv2i32, ARM_INS_VADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDHNv4i16, ARM_INS_VADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDHNv8i8, ARM_INS_VADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDLsv2i64, ARM_INS_VADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDLsv4i32, ARM_INS_VADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDLsv8i16, ARM_INS_VADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDLuv2i64, ARM_INS_VADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDLuv4i32, ARM_INS_VADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDLuv8i16, ARM_INS_VADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDS, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDWsv2i64, ARM_INS_VADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDWsv4i32, ARM_INS_VADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDWsv8i16, ARM_INS_VADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDWuv2i64, ARM_INS_VADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDWuv4i32, ARM_INS_VADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDWuv8i16, ARM_INS_VADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDfd, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDfq, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDv16i8, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDv1i64, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDv2i32, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDv2i64, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDv4i16, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDv4i32, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDv8i16, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VADDv8i8, ARM_INS_VADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VANDd, ARM_INS_VAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VANDq, ARM_INS_VAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBICd, ARM_INS_VBIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBICiv2i32, ARM_INS_VBIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBICiv4i16, ARM_INS_VBIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBICiv4i32, ARM_INS_VBIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBICiv8i16, ARM_INS_VBIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBICq, ARM_INS_VBIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBIFd, ARM_INS_VBIF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBIFq, ARM_INS_VBIF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBITd, ARM_INS_VBIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBITq, ARM_INS_VBIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBSLd, ARM_INS_VBSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VBSLq, ARM_INS_VBSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQfd, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQfq, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQv16i8, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQv2i32, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQv4i16, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQv4i32, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQv8i16, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQv8i8, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQzv16i8, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQzv2f32, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQzv2i32, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQzv4f32, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQzv4i16, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQzv4i32, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQzv8i16, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCEQzv8i8, ARM_INS_VCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEfd, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEfq, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEsv16i8, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEsv2i32, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEsv4i16, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEsv4i32, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEsv8i16, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEsv8i8, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEuv16i8, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEuv2i32, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEuv4i16, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEuv4i32, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEuv8i16, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEuv8i8, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEzv16i8, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEzv2f32, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEzv2i32, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEzv4f32, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEzv4i16, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEzv4i32, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEzv8i16, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGEzv8i8, ARM_INS_VCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTfd, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTfq, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTsv16i8, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTsv2i32, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTsv4i16, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTsv4i32, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTsv8i16, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTsv8i8, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTuv16i8, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTuv2i32, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTuv4i16, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTuv4i32, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTuv8i16, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTuv8i8, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTzv16i8, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTzv2f32, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTzv2i32, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTzv4f32, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTzv4i16, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTzv4i32, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTzv8i16, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCGTzv8i8, ARM_INS_VCGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLEzv16i8, ARM_INS_VCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLEzv2f32, ARM_INS_VCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLEzv2i32, ARM_INS_VCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLEzv4f32, ARM_INS_VCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLEzv4i16, ARM_INS_VCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLEzv4i32, ARM_INS_VCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLEzv8i16, ARM_INS_VCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLEzv8i8, ARM_INS_VCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLSv16i8, ARM_INS_VCLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLSv2i32, ARM_INS_VCLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLSv4i16, ARM_INS_VCLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLSv4i32, ARM_INS_VCLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLSv8i16, ARM_INS_VCLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLSv8i8, ARM_INS_VCLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLTzv16i8, ARM_INS_VCLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLTzv2f32, ARM_INS_VCLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLTzv2i32, ARM_INS_VCLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLTzv4f32, ARM_INS_VCLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLTzv4i16, ARM_INS_VCLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLTzv4i32, ARM_INS_VCLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLTzv8i16, ARM_INS_VCLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLTzv8i8, ARM_INS_VCLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLZv16i8, ARM_INS_VCLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLZv2i32, ARM_INS_VCLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLZv4i16, ARM_INS_VCLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLZv4i32, ARM_INS_VCLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLZv8i16, ARM_INS_VCLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCLZv8i8, ARM_INS_VCLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCMPD, ARM_INS_VCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCMPED, ARM_INS_VCMPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCMPES, ARM_INS_VCMPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCMPEZD, ARM_INS_VCMPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCMPEZS, ARM_INS_VCMPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCMPS, ARM_INS_VCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCMPZD, ARM_INS_VCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCMPZS, ARM_INS_VCMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCNTd, ARM_INS_VCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCNTq, ARM_INS_VCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTANSD, ARM_INS_VCVTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTANSQ, ARM_INS_VCVTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTANUD, ARM_INS_VCVTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTANUQ, ARM_INS_VCVTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTASD, ARM_INS_VCVTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTASS, ARM_INS_VCVTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTAUD, ARM_INS_VCVTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTAUS, ARM_INS_VCVTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTBDH, ARM_INS_VCVTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTBHD, ARM_INS_VCVTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTBHS, ARM_INS_VCVTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTBSH, ARM_INS_VCVTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTDS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTMNSD, ARM_INS_VCVTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTMNSQ, ARM_INS_VCVTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTMNUD, ARM_INS_VCVTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTMNUQ, ARM_INS_VCVTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTMSD, ARM_INS_VCVTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTMSS, ARM_INS_VCVTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTMUD, ARM_INS_VCVTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTMUS, ARM_INS_VCVTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTNNSD, ARM_INS_VCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTNNSQ, ARM_INS_VCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTNNUD, ARM_INS_VCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTNNUQ, ARM_INS_VCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTNSD, ARM_INS_VCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTNSS, ARM_INS_VCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTNUD, ARM_INS_VCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTNUS, ARM_INS_VCVTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTPNSD, ARM_INS_VCVTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTPNSQ, ARM_INS_VCVTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTPNUD, ARM_INS_VCVTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTPNUQ, ARM_INS_VCVTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTPSD, ARM_INS_VCVTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTPSS, ARM_INS_VCVTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTPUD, ARM_INS_VCVTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTPUS, ARM_INS_VCVTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTSD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTTDH, ARM_INS_VCVTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTTHD, ARM_INS_VCVTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTTHS, ARM_INS_VCVTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTTSH, ARM_INS_VCVTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTf2h, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTf2sd, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTf2sq, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTf2ud, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTf2uq, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTf2xsd, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTf2xsq, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTf2xud, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTf2xuq, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTh2f, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTs2fd, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTs2fq, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTu2fd, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTu2fq, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTxs2fd, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTxs2fq, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTxu2fd, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VCVTxu2fq, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDIVD, ARM_INS_VDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDIVS, ARM_INS_VDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUP16d, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUP16q, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUP32d, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUP32q, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUP8d, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUP8q, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUPLN16d, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUPLN16q, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUPLN32d, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUPLN32q, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUPLN8d, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VDUPLN8q, ARM_INS_VDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VEORd, ARM_INS_VEOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VEORq, ARM_INS_VEOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VEXTd16, ARM_INS_VEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VEXTd32, ARM_INS_VEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VEXTd8, ARM_INS_VEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VEXTq16, ARM_INS_VEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VEXTq32, ARM_INS_VEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VEXTq64, ARM_INS_VEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VEXTq8, ARM_INS_VEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFMAD, ARM_INS_VFMA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFMAS, ARM_INS_VFMA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFMAfd, ARM_INS_VFMA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFMAfq, ARM_INS_VFMA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFMSD, ARM_INS_VFMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFMSS, ARM_INS_VFMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFMSfd, ARM_INS_VFMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFMSfq, ARM_INS_VFMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFNMAD, ARM_INS_VFNMA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFNMAS, ARM_INS_VFNMA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFNMSD, ARM_INS_VFNMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VFNMSS, ARM_INS_VFNMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
-#endif
- },
- {
- ARM_VGETLNi32, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VGETLNs16, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VGETLNs8, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VGETLNu16, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VGETLNu8, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDsv16i8, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDsv2i32, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDsv4i16, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDsv4i32, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDsv8i16, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDsv8i8, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDuv16i8, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDuv2i32, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDuv4i16, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDuv4i32, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDuv8i16, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHADDuv8i8, ARM_INS_VHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBsv16i8, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBsv2i32, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBsv4i16, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBsv4i32, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBsv8i16, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBsv8i8, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBuv16i8, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBuv2i32, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBuv4i16, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBuv4i32, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBuv8i16, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VHSUBuv8i8, ARM_INS_VHSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPd16, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPd16wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPd16wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPd32, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPd32wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPd32wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPd8, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPd8wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPd8wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPq16, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPq16wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPq16wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPq32, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPq32wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPq32wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPq8, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPq8wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1DUPq8wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1LNd16, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1LNd16_UPD, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1LNd32, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1LNd32_UPD, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1LNd8, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1LNd8_UPD, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d16, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d16Q, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d16Qwb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d16Qwb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d16T, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d16Twb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d16Twb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d16wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d16wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d32, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d32Q, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d32Qwb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d32Qwb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d32T, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d32Twb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d32Twb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d32wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d32wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d64, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d64Q, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d64Qwb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d64Qwb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d64T, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d64Twb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d64Twb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d64wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d64wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d8, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d8Q, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d8Qwb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d8Qwb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d8T, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d8Twb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d8Twb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d8wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1d8wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q16, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q16wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q16wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q32, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q32wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q32wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q64, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q64wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q64wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q8, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q8wb_fixed, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD1q8wb_register, ARM_INS_VLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd16, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd16wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd16wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd16x2, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd16x2wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd16x2wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd32, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd32wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd32wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd32x2, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd32x2wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd32x2wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd8, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd8wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd8wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd8x2, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd8x2wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2DUPd8x2wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2LNd16, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2LNd16_UPD, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2LNd32, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2LNd32_UPD, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2LNd8, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2LNd8_UPD, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2LNq16, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2LNq16_UPD, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2LNq32, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2LNq32_UPD, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2b16, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2b16wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2b16wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2b32, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2b32wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2b32wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2b8, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2b8wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2b8wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2d16, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2d16wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2d16wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2d32, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2d32wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2d32wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2d8, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2d8wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2d8wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2q16, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2q16wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2q16wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2q32, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2q32wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2q32wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2q8, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2q8wb_fixed, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD2q8wb_register, ARM_INS_VLD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPd16, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPd16_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPd32, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPd32_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPd8, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPd8_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPq16, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPq16_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPq32, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPq32_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPq8, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3DUPq8_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3LNd16, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3LNd16_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3LNd32, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3LNd32_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3LNd8, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3LNd8_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3LNq16, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3LNq16_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3LNq32, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3LNq32_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3d16, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3d16_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3d32, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3d32_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3d8, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3d8_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3q16, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3q16_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3q32, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3q32_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3q8, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD3q8_UPD, ARM_INS_VLD3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPd16, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPd16_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPd32, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPd32_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPd8, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPd8_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPq16, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPq16_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPq32, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPq32_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPq8, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4DUPq8_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4LNd16, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4LNd16_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4LNd32, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4LNd32_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4LNd8, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4LNd8_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4LNq16, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4LNq16_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4LNq32, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4LNq32_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4d16, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4d16_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4d32, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4d32_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4d8, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4d8_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4q16, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4q16_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4q32, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4q32_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4q8, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLD4q8_UPD, ARM_INS_VLD4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLDMDDB_UPD, ARM_INS_VLDMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLDMDIA, ARM_INS_VLDMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLDMDIA_UPD, ARM_INS_VLDMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLDMSDB_UPD, ARM_INS_VLDMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLDMSIA, ARM_INS_VLDMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLDMSIA_UPD, ARM_INS_VLDMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLDRD, ARM_INS_VLDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VLDRS, ARM_INS_VLDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXNMD, ARM_INS_VMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXNMND, ARM_INS_VMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXNMNQ, ARM_INS_VMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXNMS, ARM_INS_VMAXNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXfd, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXfq, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXsv16i8, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXsv2i32, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXsv4i16, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXsv4i32, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXsv8i16, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXsv8i8, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXuv16i8, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXuv2i32, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXuv4i16, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXuv4i32, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXuv8i16, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMAXuv8i8, ARM_INS_VMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINNMD, ARM_INS_VMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINNMND, ARM_INS_VMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINNMNQ, ARM_INS_VMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINNMS, ARM_INS_VMINNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINfd, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINfq, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINsv16i8, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINsv2i32, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINsv4i16, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINsv4i32, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINsv8i16, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINsv8i8, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINuv16i8, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINuv2i32, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINuv4i16, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINuv4i32, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINuv8i16, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMINuv8i8, ARM_INS_VMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAD, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLALslsv2i32, ARM_INS_VMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLALslsv4i16, ARM_INS_VMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLALsluv2i32, ARM_INS_VMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLALsluv4i16, ARM_INS_VMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLALsv2i64, ARM_INS_VMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLALsv4i32, ARM_INS_VMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLALsv8i16, ARM_INS_VMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLALuv2i64, ARM_INS_VMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLALuv4i32, ARM_INS_VMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLALuv8i16, ARM_INS_VMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAS, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAfd, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAfq, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAslfd, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAslfq, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAslv2i32, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAslv4i16, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAslv4i32, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAslv8i16, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAv16i8, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAv2i32, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAv4i16, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAv4i32, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAv8i16, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLAv8i8, ARM_INS_VMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSD, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSLslsv2i32, ARM_INS_VMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSLslsv4i16, ARM_INS_VMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSLsluv2i32, ARM_INS_VMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSLsluv4i16, ARM_INS_VMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSLsv2i64, ARM_INS_VMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSLsv4i32, ARM_INS_VMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSLsv8i16, ARM_INS_VMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSLuv2i64, ARM_INS_VMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSLuv4i32, ARM_INS_VMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSLuv8i16, ARM_INS_VMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSS, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSfd, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSfq, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSslfd, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSslfq, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSslv2i32, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSslv4i16, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSslv4i32, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSslv8i16, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSv16i8, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSv2i32, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSv4i16, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSv4i32, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSv8i16, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMLSv8i8, ARM_INS_VMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVD, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVDRR, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVLsv2i64, ARM_INS_VMOVL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVLsv4i32, ARM_INS_VMOVL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVLsv8i16, ARM_INS_VMOVL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVLuv2i64, ARM_INS_VMOVL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVLuv4i32, ARM_INS_VMOVL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVLuv8i16, ARM_INS_VMOVL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVNv2i32, ARM_INS_VMOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVNv4i16, ARM_INS_VMOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVNv8i8, ARM_INS_VMOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVRRD, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVRRS, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVRS, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVS, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVSR, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVSRR, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVv16i8, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVv1i64, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVv2f32, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVv2i32, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVv2i64, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVv4f32, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVv4i16, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVv4i32, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVv8i16, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMOVv8i8, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMRS, ARM_INS_VMRS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMRS_FPEXC, ARM_INS_VMRS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMRS_FPINST, ARM_INS_VMRS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMRS_FPINST2, ARM_INS_VMRS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMRS_FPSID, ARM_INS_VMRS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMRS_MVFR0, ARM_INS_VMRS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMRS_MVFR1, ARM_INS_VMRS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMRS_MVFR2, ARM_INS_VMRS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMSR, ARM_INS_VMSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMSR_FPEXC, ARM_INS_VMSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMSR_FPINST, ARM_INS_VMSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMSR_FPINST2, ARM_INS_VMSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMSR_FPSID, ARM_INS_VMSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULD, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLp64, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLp8, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLslsv2i32, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLslsv4i16, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLsluv2i32, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLsluv4i16, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLsv2i64, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLsv4i32, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLsv8i16, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLuv2i64, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLuv4i32, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULLuv8i16, ARM_INS_VMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULS, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULfd, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULfq, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULpd, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULpq, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULslfd, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULslfq, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULslv2i32, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULslv4i16, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULslv4i32, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULslv8i16, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULv16i8, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULv2i32, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULv4i16, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULv4i32, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULv8i16, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMULv8i8, ARM_INS_VMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMVNd, ARM_INS_VMVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMVNq, ARM_INS_VMVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMVNv2i32, ARM_INS_VMVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMVNv4i16, ARM_INS_VMVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMVNv4i32, ARM_INS_VMVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VMVNv8i16, ARM_INS_VMVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNEGD, ARM_INS_VNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNEGS, ARM_INS_VNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNEGf32q, ARM_INS_VNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNEGfd, ARM_INS_VNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNEGs16d, ARM_INS_VNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNEGs16q, ARM_INS_VNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNEGs32d, ARM_INS_VNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNEGs32q, ARM_INS_VNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNEGs8d, ARM_INS_VNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNEGs8q, ARM_INS_VNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNMLAD, ARM_INS_VNMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNMLAS, ARM_INS_VNMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNMLSD, ARM_INS_VNMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNMLSS, ARM_INS_VNMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNMULD, ARM_INS_VNMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VNMULS, ARM_INS_VNMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VORNd, ARM_INS_VORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VORNq, ARM_INS_VORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VORRd, ARM_INS_VORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VORRiv2i32, ARM_INS_VORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VORRiv4i16, ARM_INS_VORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VORRiv4i32, ARM_INS_VORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VORRiv8i16, ARM_INS_VORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VORRq, ARM_INS_VORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALsv16i8, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALsv2i32, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALsv4i16, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALsv4i32, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALsv8i16, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALsv8i8, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALuv16i8, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALuv2i32, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALuv4i16, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALuv4i32, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALuv8i16, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADALuv8i8, ARM_INS_VPADAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLsv16i8, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLsv2i32, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLsv4i16, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLsv4i32, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLsv8i16, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLsv8i8, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLuv16i8, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLuv2i32, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLuv4i16, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLuv4i32, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLuv8i16, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDLuv8i8, ARM_INS_VPADDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDf, ARM_INS_VPADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDi16, ARM_INS_VPADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDi32, ARM_INS_VPADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPADDi8, ARM_INS_VPADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMAXf, ARM_INS_VPMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMAXs16, ARM_INS_VPMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMAXs32, ARM_INS_VPMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMAXs8, ARM_INS_VPMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMAXu16, ARM_INS_VPMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMAXu32, ARM_INS_VPMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMAXu8, ARM_INS_VPMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMINf, ARM_INS_VPMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMINs16, ARM_INS_VPMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMINs32, ARM_INS_VPMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMINs8, ARM_INS_VPMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMINu16, ARM_INS_VPMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMINu32, ARM_INS_VPMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VPMINu8, ARM_INS_VPMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQABSv16i8, ARM_INS_VQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQABSv2i32, ARM_INS_VQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQABSv4i16, ARM_INS_VQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQABSv4i32, ARM_INS_VQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQABSv8i16, ARM_INS_VQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQABSv8i8, ARM_INS_VQABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDsv16i8, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDsv1i64, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDsv2i32, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDsv2i64, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDsv4i16, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDsv4i32, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDsv8i16, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDsv8i8, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDuv16i8, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDuv1i64, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDuv2i32, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDuv2i64, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDuv4i16, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDuv4i32, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDuv8i16, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQADDuv8i8, ARM_INS_VQADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMLALslv2i32, ARM_INS_VQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMLALslv4i16, ARM_INS_VQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMLALv2i64, ARM_INS_VQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMLALv4i32, ARM_INS_VQDMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMLSLslv2i32, ARM_INS_VQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMLSLslv4i16, ARM_INS_VQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMLSLv2i64, ARM_INS_VQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMLSLv4i32, ARM_INS_VQDMLSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULHslv2i32, ARM_INS_VQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULHslv4i16, ARM_INS_VQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULHslv4i32, ARM_INS_VQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULHslv8i16, ARM_INS_VQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULHv2i32, ARM_INS_VQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULHv4i16, ARM_INS_VQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULHv4i32, ARM_INS_VQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULHv8i16, ARM_INS_VQDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULLslv2i32, ARM_INS_VQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULLslv4i16, ARM_INS_VQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULLv2i64, ARM_INS_VQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQDMULLv4i32, ARM_INS_VQDMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQMOVNsuv2i32, ARM_INS_VQMOVUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQMOVNsuv4i16, ARM_INS_VQMOVUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQMOVNsuv8i8, ARM_INS_VQMOVUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQMOVNsv2i32, ARM_INS_VQMOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQMOVNsv4i16, ARM_INS_VQMOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQMOVNsv8i8, ARM_INS_VQMOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQMOVNuv2i32, ARM_INS_VQMOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQMOVNuv4i16, ARM_INS_VQMOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQMOVNuv8i8, ARM_INS_VQMOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQNEGv16i8, ARM_INS_VQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQNEGv2i32, ARM_INS_VQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQNEGv4i16, ARM_INS_VQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQNEGv4i32, ARM_INS_VQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQNEGv8i16, ARM_INS_VQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQNEGv8i8, ARM_INS_VQNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRDMULHslv2i32, ARM_INS_VQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRDMULHslv4i16, ARM_INS_VQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRDMULHslv4i32, ARM_INS_VQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRDMULHslv8i16, ARM_INS_VQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRDMULHv2i32, ARM_INS_VQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRDMULHv4i16, ARM_INS_VQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRDMULHv4i32, ARM_INS_VQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRDMULHv8i16, ARM_INS_VQRDMULH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLsv16i8, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLsv1i64, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLsv2i32, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLsv2i64, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLsv4i16, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLsv4i32, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLsv8i16, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLsv8i8, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLuv16i8, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLuv1i64, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLuv2i32, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLuv2i64, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLuv4i16, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLuv4i32, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLuv8i16, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHLuv8i8, ARM_INS_VQRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHRNsv2i32, ARM_INS_VQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHRNsv4i16, ARM_INS_VQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHRNsv8i8, ARM_INS_VQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHRNuv2i32, ARM_INS_VQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHRNuv4i16, ARM_INS_VQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHRNuv8i8, ARM_INS_VQRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHRUNv2i32, ARM_INS_VQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHRUNv4i16, ARM_INS_VQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQRSHRUNv8i8, ARM_INS_VQRSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsiv16i8, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsiv1i64, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsiv2i32, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsiv2i64, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsiv4i16, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsiv4i32, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsiv8i16, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsiv8i8, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsuv16i8, ARM_INS_VQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsuv1i64, ARM_INS_VQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsuv2i32, ARM_INS_VQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsuv2i64, ARM_INS_VQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsuv4i16, ARM_INS_VQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsuv4i32, ARM_INS_VQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsuv8i16, ARM_INS_VQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsuv8i8, ARM_INS_VQSHLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsv16i8, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsv1i64, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsv2i32, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsv2i64, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsv4i16, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsv4i32, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsv8i16, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLsv8i8, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuiv16i8, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuiv1i64, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuiv2i32, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuiv2i64, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuiv4i16, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuiv4i32, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuiv8i16, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuiv8i8, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuv16i8, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuv1i64, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuv2i32, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuv2i64, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuv4i16, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuv4i32, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuv8i16, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHLuv8i8, ARM_INS_VQSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHRNsv2i32, ARM_INS_VQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHRNsv4i16, ARM_INS_VQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHRNsv8i8, ARM_INS_VQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHRNuv2i32, ARM_INS_VQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHRNuv4i16, ARM_INS_VQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHRNuv8i8, ARM_INS_VQSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHRUNv2i32, ARM_INS_VQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHRUNv4i16, ARM_INS_VQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSHRUNv8i8, ARM_INS_VQSHRUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBsv16i8, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBsv1i64, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBsv2i32, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBsv2i64, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBsv4i16, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBsv4i32, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBsv8i16, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBsv8i8, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBuv16i8, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBuv1i64, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBuv2i32, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBuv2i64, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBuv4i16, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBuv4i32, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBuv8i16, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VQSUBuv8i8, ARM_INS_VQSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRADDHNv2i32, ARM_INS_VRADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRADDHNv4i16, ARM_INS_VRADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRADDHNv8i8, ARM_INS_VRADDHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRECPEd, ARM_INS_VRECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRECPEfd, ARM_INS_VRECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRECPEfq, ARM_INS_VRECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRECPEq, ARM_INS_VRECPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRECPSfd, ARM_INS_VRECPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRECPSfq, ARM_INS_VRECPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV16d8, ARM_INS_VREV16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV16q8, ARM_INS_VREV16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV32d16, ARM_INS_VREV32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV32d8, ARM_INS_VREV32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV32q16, ARM_INS_VREV32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV32q8, ARM_INS_VREV32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV64d16, ARM_INS_VREV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV64d32, ARM_INS_VREV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV64d8, ARM_INS_VREV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV64q16, ARM_INS_VREV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV64q32, ARM_INS_VREV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VREV64q8, ARM_INS_VREV64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDsv16i8, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDsv2i32, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDsv4i16, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDsv4i32, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDsv8i16, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDsv8i8, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDuv16i8, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDuv2i32, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDuv4i16, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDuv4i32, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDuv8i16, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRHADDuv8i8, ARM_INS_VRHADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTAD, ARM_INS_VRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTAND, ARM_INS_VRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTANQ, ARM_INS_VRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTAS, ARM_INS_VRINTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTMD, ARM_INS_VRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTMND, ARM_INS_VRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTMNQ, ARM_INS_VRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTMS, ARM_INS_VRINTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTND, ARM_INS_VRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTNND, ARM_INS_VRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTNNQ, ARM_INS_VRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTNS, ARM_INS_VRINTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTPD, ARM_INS_VRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTPND, ARM_INS_VRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTPNQ, ARM_INS_VRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTPS, ARM_INS_VRINTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTRD, ARM_INS_VRINTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTRS, ARM_INS_VRINTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTXD, ARM_INS_VRINTX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTXND, ARM_INS_VRINTX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTXNQ, ARM_INS_VRINTX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTXS, ARM_INS_VRINTX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTZD, ARM_INS_VRINTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTZND, ARM_INS_VRINTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTZNQ, ARM_INS_VRINTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRINTZS, ARM_INS_VRINTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLsv16i8, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLsv1i64, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLsv2i32, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLsv2i64, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLsv4i16, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLsv4i32, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLsv8i16, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLsv8i8, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLuv16i8, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLuv1i64, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLuv2i32, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLuv2i64, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLuv4i16, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLuv4i32, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLuv8i16, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHLuv8i8, ARM_INS_VRSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRNv2i32, ARM_INS_VRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRNv4i16, ARM_INS_VRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRNv8i8, ARM_INS_VRSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRsv16i8, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRsv1i64, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRsv2i32, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRsv2i64, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRsv4i16, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRsv4i32, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRsv8i16, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRsv8i8, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRuv16i8, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRuv1i64, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRuv2i32, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRuv2i64, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRuv4i16, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRuv4i32, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRuv8i16, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSHRuv8i8, ARM_INS_VRSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSQRTEd, ARM_INS_VRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSQRTEfd, ARM_INS_VRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSQRTEfq, ARM_INS_VRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSQRTEq, ARM_INS_VRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSQRTSfd, ARM_INS_VRSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSQRTSfq, ARM_INS_VRSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAsv16i8, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAsv1i64, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAsv2i32, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAsv2i64, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAsv4i16, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAsv4i32, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAsv8i16, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAsv8i8, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAuv16i8, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAuv1i64, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAuv2i32, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAuv2i64, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAuv4i16, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAuv4i32, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAuv8i16, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSRAuv8i8, ARM_INS_VRSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSUBHNv2i32, ARM_INS_VRSUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSUBHNv4i16, ARM_INS_VRSUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VRSUBHNv8i8, ARM_INS_VRSUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSELEQD, ARM_INS_VSELEQ,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSELEQS, ARM_INS_VSELEQ,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSELGED, ARM_INS_VSELGE,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSELGES, ARM_INS_VSELGE,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSELGTD, ARM_INS_VSELGT,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSELGTS, ARM_INS_VSELGT,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSELVSD, ARM_INS_VSELVS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSELVSS, ARM_INS_VSELVS,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSETLNi16, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSETLNi32, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSETLNi8, ARM_INS_VMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLLi16, ARM_INS_VSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLLi32, ARM_INS_VSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLLi8, ARM_INS_VSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLLsv2i64, ARM_INS_VSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLLsv4i32, ARM_INS_VSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLLsv8i16, ARM_INS_VSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLLuv2i64, ARM_INS_VSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLLuv4i32, ARM_INS_VSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLLuv8i16, ARM_INS_VSHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLiv16i8, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLiv1i64, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLiv2i32, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLiv2i64, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLiv4i16, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLiv4i32, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLiv8i16, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLiv8i8, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLsv16i8, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLsv1i64, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLsv2i32, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLsv2i64, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLsv4i16, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLsv4i32, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLsv8i16, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLsv8i8, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLuv16i8, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLuv1i64, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLuv2i32, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLuv2i64, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLuv4i16, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLuv4i32, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLuv8i16, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHLuv8i8, ARM_INS_VSHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRNv2i32, ARM_INS_VSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRNv4i16, ARM_INS_VSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRNv8i8, ARM_INS_VSHRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRsv16i8, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRsv1i64, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRsv2i32, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRsv2i64, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRsv4i16, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRsv4i32, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRsv8i16, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRsv8i8, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRuv16i8, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRuv1i64, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRuv2i32, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRuv2i64, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRuv4i16, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRuv4i32, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRuv8i16, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHRuv8i8, ARM_INS_VSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHTOD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSHTOS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSITOD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSITOS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSLIv16i8, ARM_INS_VSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSLIv1i64, ARM_INS_VSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSLIv2i32, ARM_INS_VSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSLIv2i64, ARM_INS_VSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSLIv4i16, ARM_INS_VSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSLIv4i32, ARM_INS_VSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSLIv8i16, ARM_INS_VSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSLIv8i8, ARM_INS_VSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSLTOD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSLTOS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSQRTD, ARM_INS_VSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSQRTS, ARM_INS_VSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAsv16i8, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAsv1i64, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAsv2i32, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAsv2i64, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAsv4i16, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAsv4i32, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAsv8i16, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAsv8i8, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAuv16i8, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAuv1i64, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAuv2i32, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAuv2i64, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAuv4i16, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAuv4i32, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAuv8i16, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRAuv8i8, ARM_INS_VSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRIv16i8, ARM_INS_VSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRIv1i64, ARM_INS_VSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRIv2i32, ARM_INS_VSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRIv2i64, ARM_INS_VSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRIv4i16, ARM_INS_VSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRIv4i32, ARM_INS_VSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRIv8i16, ARM_INS_VSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSRIv8i8, ARM_INS_VSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1LNd16, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1LNd16_UPD, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1LNd32, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1LNd32_UPD, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1LNd8, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1LNd8_UPD, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d16, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d16Q, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d16Qwb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d16Qwb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d16T, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d16Twb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d16Twb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d16wb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d16wb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d32, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d32Q, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d32Qwb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d32Qwb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d32T, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d32Twb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d32Twb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d32wb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d32wb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d64, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d64Q, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d64Qwb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d64Qwb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d64T, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d64Twb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d64Twb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d64wb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d64wb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d8, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d8Q, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d8Qwb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d8Qwb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d8T, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d8Twb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d8Twb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d8wb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1d8wb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q16, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q16wb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q16wb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q32, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q32wb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q32wb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q64, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q64wb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q64wb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q8, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q8wb_fixed, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST1q8wb_register, ARM_INS_VST1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2LNd16, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2LNd16_UPD, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2LNd32, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2LNd32_UPD, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2LNd8, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2LNd8_UPD, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2LNq16, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2LNq16_UPD, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2LNq32, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2LNq32_UPD, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2b16, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2b16wb_fixed, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2b16wb_register, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2b32, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2b32wb_fixed, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2b32wb_register, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2b8, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2b8wb_fixed, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2b8wb_register, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2d16, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2d16wb_fixed, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2d16wb_register, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2d32, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2d32wb_fixed, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2d32wb_register, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2d8, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2d8wb_fixed, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2d8wb_register, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2q16, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2q16wb_fixed, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2q16wb_register, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2q32, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2q32wb_fixed, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2q32wb_register, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2q8, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2q8wb_fixed, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST2q8wb_register, ARM_INS_VST2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3LNd16, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3LNd16_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3LNd32, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3LNd32_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3LNd8, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3LNd8_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3LNq16, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3LNq16_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3LNq32, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3LNq32_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3d16, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3d16_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3d32, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3d32_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3d8, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3d8_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3q16, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3q16_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3q32, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3q32_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3q8, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST3q8_UPD, ARM_INS_VST3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4LNd16, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4LNd16_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4LNd32, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4LNd32_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4LNd8, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4LNd8_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4LNq16, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4LNq16_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4LNq32, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4LNq32_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4d16, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4d16_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4d32, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4d32_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4d8, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4d8_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4q16, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4q16_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4q32, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4q32_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4q8, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VST4q8_UPD, ARM_INS_VST4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSTMDDB_UPD, ARM_INS_VSTMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSTMDIA, ARM_INS_VSTMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSTMDIA_UPD, ARM_INS_VSTMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSTMSDB_UPD, ARM_INS_VSTMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSTMSIA, ARM_INS_VSTMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSTMSIA_UPD, ARM_INS_VSTMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSTRD, ARM_INS_VSTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSTRS, ARM_INS_VSTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBD, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBHNv2i32, ARM_INS_VSUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBHNv4i16, ARM_INS_VSUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBHNv8i8, ARM_INS_VSUBHN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBLsv2i64, ARM_INS_VSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBLsv4i32, ARM_INS_VSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBLsv8i16, ARM_INS_VSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBLuv2i64, ARM_INS_VSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBLuv4i32, ARM_INS_VSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBLuv8i16, ARM_INS_VSUBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBS, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBWsv2i64, ARM_INS_VSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBWsv4i32, ARM_INS_VSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBWsv8i16, ARM_INS_VSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBWuv2i64, ARM_INS_VSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBWuv4i32, ARM_INS_VSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBWuv8i16, ARM_INS_VSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBfd, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBfq, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBv16i8, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBv1i64, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBv2i32, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBv2i64, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBv4i16, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBv4i32, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBv8i16, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSUBv8i8, ARM_INS_VSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSWPd, ARM_INS_VSWP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VSWPq, ARM_INS_VSWP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTBL1, ARM_INS_VTBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTBL2, ARM_INS_VTBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTBL3, ARM_INS_VTBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTBL4, ARM_INS_VTBL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTBX1, ARM_INS_VTBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTBX2, ARM_INS_VTBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTBX3, ARM_INS_VTBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTBX4, ARM_INS_VTBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOSHD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOSHS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOSIRD, ARM_INS_VCVTR,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOSIRS, ARM_INS_VCVTR,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOSIZD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOSIZS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOSLD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOSLS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOUHD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOUHS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOUIRD, ARM_INS_VCVTR,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOUIRS, ARM_INS_VCVTR,
-#ifndef CAPSTONE_DIET
- { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOUIZD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOUIZS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOULD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTOULS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTRNd16, ARM_INS_VTRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTRNd32, ARM_INS_VTRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTRNd8, ARM_INS_VTRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTRNq16, ARM_INS_VTRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTRNq32, ARM_INS_VTRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTRNq8, ARM_INS_VTRN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTSTv16i8, ARM_INS_VTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTSTv2i32, ARM_INS_VTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTSTv4i16, ARM_INS_VTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTSTv4i32, ARM_INS_VTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTSTv8i16, ARM_INS_VTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VTSTv8i8, ARM_INS_VTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VUHTOD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VUHTOS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VUITOD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VUITOS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VULTOD, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
-#endif
- },
- {
- ARM_VULTOS, ARM_INS_VCVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
-#endif
- },
- {
- ARM_VUZPd16, ARM_INS_VUZP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VUZPd8, ARM_INS_VUZP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VUZPq16, ARM_INS_VUZP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VUZPq32, ARM_INS_VUZP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VUZPq8, ARM_INS_VUZP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VZIPd16, ARM_INS_VZIP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VZIPd8, ARM_INS_VZIP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VZIPq16, ARM_INS_VZIP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VZIPq32, ARM_INS_VZIP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_VZIPq8, ARM_INS_VZIP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysLDMDA, ARM_INS_LDMDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysLDMDA_UPD, ARM_INS_LDMDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysLDMDB, ARM_INS_LDMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysLDMDB_UPD, ARM_INS_LDMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysLDMIA, ARM_INS_LDM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysLDMIA_UPD, ARM_INS_LDM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysLDMIB, ARM_INS_LDMIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysLDMIB_UPD, ARM_INS_LDMIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysSTMDA, ARM_INS_STMDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysSTMDA_UPD, ARM_INS_STMDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysSTMDB, ARM_INS_STMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysSTMDB_UPD, ARM_INS_STMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysSTMIA, ARM_INS_STM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysSTMIA_UPD, ARM_INS_STM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysSTMIB, ARM_INS_STMIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_sysSTMIB_UPD, ARM_INS_STMIB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ADCri, ARM_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ADCrr, ARM_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ADCrs, ARM_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ADDri, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ADDri12, ARM_INS_ADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ADDrr, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ADDrs, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ADR, ARM_INS_ADR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ANDri, ARM_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ANDrr, ARM_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ANDrs, ARM_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ASRri, ARM_INS_ASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ASRrr, ARM_INS_ASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2B, ARM_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_THUMB2, 0 }, 1, 0
-#endif
- },
- {
- ARM_t2BFC, ARM_INS_BFC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2BFI, ARM_INS_BFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2BICri, ARM_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2BICrr, ARM_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2BICrs, ARM_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2BXJ, ARM_INS_BXJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2Bcc, ARM_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 0
-#endif
- },
- {
- ARM_t2CDP, ARM_INS_CDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CDP2, ARM_INS_CDP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CLREX, ARM_INS_CLREX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CLZ, ARM_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CMNri, ARM_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CMNzrr, ARM_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CMNzrs, ARM_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CMPri, ARM_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CMPrr, ARM_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CMPrs, ARM_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CPS1p, ARM_INS_CPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CPS2p, ARM_INS_CPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CPS3p, ARM_INS_CPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CRC32B, ARM_INS_CRC32B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CRC32CB, ARM_INS_CRC32CB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CRC32CH, ARM_INS_CRC32CH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CRC32CW, ARM_INS_CRC32CW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CRC32H, ARM_INS_CRC32H,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2CRC32W, ARM_INS_CRC32W,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2DBG, ARM_INS_DBG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2DCPS1, ARM_INS_DCPS1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2DCPS2, ARM_INS_DCPS2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2DCPS3, ARM_INS_DCPS3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2DMB, ARM_INS_DMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2DSB, ARM_INS_DSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2EORri, ARM_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2EORrr, ARM_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2EORrs, ARM_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2HINT, ARM_INS_HINT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2HVC, ARM_INS_HVC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ISB, ARM_INS_ISB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2IT, ARM_INS_IT,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_ITSTATE, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDA, ARM_INS_LDA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDAB, ARM_INS_LDAB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDAEX, ARM_INS_LDAEX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDAEXB, ARM_INS_LDAEXB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDAEXD, ARM_INS_LDAEXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDAEXH, ARM_INS_LDAEXH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDAH, ARM_INS_LDAH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC2L_OFFSET, ARM_INS_LDC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC2L_OPTION, ARM_INS_LDC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC2L_POST, ARM_INS_LDC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC2L_PRE, ARM_INS_LDC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC2_OFFSET, ARM_INS_LDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC2_OPTION, ARM_INS_LDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC2_POST, ARM_INS_LDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC2_PRE, ARM_INS_LDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDCL_OFFSET, ARM_INS_LDCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDCL_OPTION, ARM_INS_LDCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDCL_POST, ARM_INS_LDCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDCL_PRE, ARM_INS_LDCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC_OFFSET, ARM_INS_LDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC_OPTION, ARM_INS_LDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC_POST, ARM_INS_LDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDC_PRE, ARM_INS_LDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDMDB, ARM_INS_LDMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDMDB_UPD, ARM_INS_LDMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDMIA, ARM_INS_LDM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDMIA_UPD, ARM_INS_LDM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRBT, ARM_INS_LDRBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRB_POST, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRB_PRE, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRBi12, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRBi8, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRBpci, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRBs, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRD_POST, ARM_INS_LDRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRD_PRE, ARM_INS_LDRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRDi8, ARM_INS_LDRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDREX, ARM_INS_LDREX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDREXB, ARM_INS_LDREXB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDREXD, ARM_INS_LDREXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDREXH, ARM_INS_LDREXH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRHT, ARM_INS_LDRHT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRH_POST, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRH_PRE, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRHi12, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRHi8, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRHpci, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRHs, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSBT, ARM_INS_LDRSBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSB_POST, ARM_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSB_PRE, ARM_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSBi12, ARM_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSBi8, ARM_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSBpci, ARM_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSBs, ARM_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSHT, ARM_INS_LDRSHT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSH_POST, ARM_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSH_PRE, ARM_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSHi12, ARM_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSHi8, ARM_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSHpci, ARM_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRSHs, ARM_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRT, ARM_INS_LDRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDR_POST, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDR_PRE, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRi12, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRi8, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRpci, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LDRs, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LSLri, ARM_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LSLrr, ARM_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LSRri, ARM_INS_LSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2LSRrr, ARM_INS_LSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MCR, ARM_INS_MCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MCR2, ARM_INS_MCR2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MCRR, ARM_INS_MCRR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MCRR2, ARM_INS_MCRR2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MLA, ARM_INS_MLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MLS, ARM_INS_MLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MOVTi16, ARM_INS_MOVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MOVi, ARM_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MOVi16, ARM_INS_MOVW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MOVr, ARM_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MOVsra_flag, ARM_INS_ASRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MOVsrl_flag, ARM_INS_LSRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MRC, ARM_INS_MRC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MRC2, ARM_INS_MRC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MRRC, ARM_INS_MRRC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MRRC2, ARM_INS_MRRC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MRS_AR, ARM_INS_MRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MRS_M, ARM_INS_MRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_MCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MRSbanked, ARM_INS_MRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MRSsys_AR, ARM_INS_MRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MSR_AR, ARM_INS_MSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MSR_M, ARM_INS_MSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_MCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MSRbanked, ARM_INS_MSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MUL, ARM_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MVNi, ARM_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MVNr, ARM_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2MVNs, ARM_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ORNri, ARM_INS_ORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ORNrr, ARM_INS_ORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ORNrs, ARM_INS_ORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ORRri, ARM_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ORRrr, ARM_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2ORRrs, ARM_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PKHBT, ARM_INS_PKHBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PKHTB, ARM_INS_PKHTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLDWi12, ARM_INS_PLDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLDWi8, ARM_INS_PLDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLDWs, ARM_INS_PLDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLDi12, ARM_INS_PLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLDi8, ARM_INS_PLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLDpci, ARM_INS_PLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLDs, ARM_INS_PLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLIi12, ARM_INS_PLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLIi8, ARM_INS_PLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLIpci, ARM_INS_PLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2PLIs, ARM_INS_PLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2QADD, ARM_INS_QADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2QADD16, ARM_INS_QADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2QADD8, ARM_INS_QADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2QASX, ARM_INS_QASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2QDADD, ARM_INS_QDADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2QDSUB, ARM_INS_QDSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2QSAX, ARM_INS_QSAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2QSUB, ARM_INS_QSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2QSUB16, ARM_INS_QSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2QSUB8, ARM_INS_QSUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RBIT, ARM_INS_RBIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2REV, ARM_INS_REV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2REV16, ARM_INS_REV16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2REVSH, ARM_INS_REVSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RFEDB, ARM_INS_RFEDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RFEDBW, ARM_INS_RFEDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RFEIA, ARM_INS_RFEIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RFEIAW, ARM_INS_RFEIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RORri, ARM_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RORrr, ARM_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RRX, ARM_INS_RRX,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RSBri, ARM_INS_RSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RSBrr, ARM_INS_RSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2RSBrs, ARM_INS_RSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SADD16, ARM_INS_SADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SADD8, ARM_INS_SADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SASX, ARM_INS_SASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SBCri, ARM_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SBCrr, ARM_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SBCrs, ARM_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SBFX, ARM_INS_SBFX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SDIV, ARM_INS_SDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_DIVIDE, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SEL, ARM_INS_SEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SHADD16, ARM_INS_SHADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SHADD8, ARM_INS_SHADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SHASX, ARM_INS_SHASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SHSAX, ARM_INS_SHSAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SHSUB16, ARM_INS_SHSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SHSUB8, ARM_INS_SHSUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMC, ARM_INS_SMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_TRUSTZONE, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLABB, ARM_INS_SMLABB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLABT, ARM_INS_SMLABT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLAD, ARM_INS_SMLAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLADX, ARM_INS_SMLADX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLAL, ARM_INS_SMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLALBB, ARM_INS_SMLALBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLALBT, ARM_INS_SMLALBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLALD, ARM_INS_SMLALD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLALDX, ARM_INS_SMLALDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLALTB, ARM_INS_SMLALTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLALTT, ARM_INS_SMLALTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLATB, ARM_INS_SMLATB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLATT, ARM_INS_SMLATT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLAWB, ARM_INS_SMLAWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLAWT, ARM_INS_SMLAWT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLSD, ARM_INS_SMLSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLSDX, ARM_INS_SMLSDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLSLD, ARM_INS_SMLSLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMLSLDX, ARM_INS_SMLSLDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMMLA, ARM_INS_SMMLA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMMLAR, ARM_INS_SMMLAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMMLS, ARM_INS_SMMLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMMLSR, ARM_INS_SMMLSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMMUL, ARM_INS_SMMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMMULR, ARM_INS_SMMULR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMUAD, ARM_INS_SMUAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMUADX, ARM_INS_SMUADX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMULBB, ARM_INS_SMULBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMULBT, ARM_INS_SMULBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMULL, ARM_INS_SMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMULTB, ARM_INS_SMULTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMULTT, ARM_INS_SMULTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMULWB, ARM_INS_SMULWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMULWT, ARM_INS_SMULWT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMUSD, ARM_INS_SMUSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SMUSDX, ARM_INS_SMUSDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SRSDB, ARM_INS_SRSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SRSDB_UPD, ARM_INS_SRSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SRSIA, ARM_INS_SRSIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SRSIA_UPD, ARM_INS_SRSIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SSAT, ARM_INS_SSAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SSAT16, ARM_INS_SSAT16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SSAX, ARM_INS_SSAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SSUB16, ARM_INS_SSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SSUB8, ARM_INS_SSUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC2L_OFFSET, ARM_INS_STC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC2L_OPTION, ARM_INS_STC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC2L_POST, ARM_INS_STC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC2L_PRE, ARM_INS_STC2L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC2_OFFSET, ARM_INS_STC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC2_OPTION, ARM_INS_STC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC2_POST, ARM_INS_STC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC2_PRE, ARM_INS_STC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STCL_OFFSET, ARM_INS_STCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STCL_OPTION, ARM_INS_STCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STCL_POST, ARM_INS_STCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STCL_PRE, ARM_INS_STCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC_OFFSET, ARM_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC_OPTION, ARM_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC_POST, ARM_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STC_PRE, ARM_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STL, ARM_INS_STL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STLB, ARM_INS_STLB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STLEX, ARM_INS_STLEX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STLEXB, ARM_INS_STLEXB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STLEXD, ARM_INS_STLEXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STLEXH, ARM_INS_STLEXH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STLH, ARM_INS_STLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STMDB, ARM_INS_STMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STMDB_UPD, ARM_INS_STMDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STMIA, ARM_INS_STM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STMIA_UPD, ARM_INS_STM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRBT, ARM_INS_STRBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRB_POST, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRB_PRE, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRBi12, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRBi8, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRBs, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRD_POST, ARM_INS_STRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRD_PRE, ARM_INS_STRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRDi8, ARM_INS_STRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STREX, ARM_INS_STREX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STREXB, ARM_INS_STREXB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STREXD, ARM_INS_STREXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STREXH, ARM_INS_STREXH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRHT, ARM_INS_STRHT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRH_POST, ARM_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRH_PRE, ARM_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRHi12, ARM_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRHi8, ARM_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRHs, ARM_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRT, ARM_INS_STRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STR_POST, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STR_PRE, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRi12, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRi8, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2STRs, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SUBS_PC_LR, ARM_INS_SUBS,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SUBri, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SUBri12, ARM_INS_SUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SUBrr, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SUBrs, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SXTAB, ARM_INS_SXTAB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SXTAB16, ARM_INS_SXTAB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SXTAH, ARM_INS_SXTAH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SXTB, ARM_INS_SXTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SXTB16, ARM_INS_SXTB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_T2EXTRACTPACK, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2SXTH, ARM_INS_SXTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2TBB, ARM_INS_TBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 1
-#endif
- },
- {
- ARM_t2TBH, ARM_INS_TBH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 1
-#endif
- },
- {
- ARM_t2TEQri, ARM_INS_TEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2TEQrr, ARM_INS_TEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2TEQrs, ARM_INS_TEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2TSTri, ARM_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2TSTrr, ARM_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2TSTrs, ARM_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UADD16, ARM_INS_UADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UADD8, ARM_INS_UADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UASX, ARM_INS_UASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UBFX, ARM_INS_UBFX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UDF, ARM_INS_UDF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UDIV, ARM_INS_UDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_DIVIDE, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UHADD16, ARM_INS_UHADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UHADD8, ARM_INS_UHADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UHASX, ARM_INS_UHASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UHSAX, ARM_INS_UHSAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UHSUB16, ARM_INS_UHSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UHSUB8, ARM_INS_UHSUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UMAAL, ARM_INS_UMAAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UMLAL, ARM_INS_UMLAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UMULL, ARM_INS_UMULL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UQADD16, ARM_INS_UQADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UQADD8, ARM_INS_UQADD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UQASX, ARM_INS_UQASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UQSAX, ARM_INS_UQSAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UQSUB16, ARM_INS_UQSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UQSUB8, ARM_INS_UQSUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2USAD8, ARM_INS_USAD8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2USADA8, ARM_INS_USADA8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2USAT, ARM_INS_USAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2USAT16, ARM_INS_USAT16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2USAX, ARM_INS_USAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2USUB16, ARM_INS_USUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2USUB8, ARM_INS_USUB8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UXTAB, ARM_INS_UXTAB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UXTAB16, ARM_INS_UXTAB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UXTAH, ARM_INS_UXTAH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UXTB, ARM_INS_UXTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UXTB16, ARM_INS_UXTB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_t2UXTH, ARM_INS_UXTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
-#endif
- },
- {
- ARM_tADC, ARM_INS_ADC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tADDhirr, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tADDi3, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tADDi8, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tADDrSP, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tADDrSPi, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tADDrr, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tADDspi, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tADDspr, ARM_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tADR, ARM_INS_ADR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tAND, ARM_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tASRri, ARM_INS_ASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tASRrr, ARM_INS_ASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tB, ARM_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 1, 0
-#endif
- },
- {
- ARM_tBIC, ARM_INS_BIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tBKPT, ARM_INS_BKPT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tBL, ARM_INS_BL,
-#ifndef CAPSTONE_DIET
- { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_THUMB, 0 }, 0, 0
-#endif
- },
- {
- ARM_tBLXi, ARM_INS_BLX,
-#ifndef CAPSTONE_DIET
- { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_THUMB, ARM_GRP_V5T, ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_tBLXr, ARM_INS_BLX,
-#ifndef CAPSTONE_DIET
- { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_THUMB, ARM_GRP_V5T, 0 }, 0, 0
-#endif
- },
- {
- ARM_tBX, ARM_INS_BX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 1, 1
-#endif
- },
- {
- ARM_tBcc, ARM_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 1, 0
-#endif
- },
- {
- ARM_tCBNZ, ARM_INS_CBNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 0
-#endif
- },
- {
- ARM_tCBZ, ARM_INS_CBZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 0
-#endif
- },
- {
- ARM_tCMNz, ARM_INS_CMN,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tCMPhir, ARM_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tCMPi8, ARM_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tCMPr, ARM_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tCPS, ARM_INS_CPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tEOR, ARM_INS_EOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tHINT, ARM_INS_HINT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V6M, 0 }, 0, 0
-#endif
- },
- {
- ARM_tHLT, ARM_INS_HLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDMIA, ARM_INS_LDM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDRBi, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDRBr, ARM_INS_LDRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDRHi, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDRHr, ARM_INS_LDRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDRSB, ARM_INS_LDRSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDRSH, ARM_INS_LDRSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDRi, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDRpci, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDRr, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLDRspi, ARM_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLSLri, ARM_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLSLrr, ARM_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLSRri, ARM_INS_LSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tLSRrr, ARM_INS_LSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tMOVSr, ARM_INS_MOVS,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tMOVi8, ARM_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tMOVr, ARM_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tMUL, ARM_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tMVN, ARM_INS_MVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tORR, ARM_INS_ORR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tPOP, ARM_INS_POP,
-#ifndef CAPSTONE_DIET
- { ARM_REG_SP, 0 }, { ARM_REG_SP, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tPUSH, ARM_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { ARM_REG_SP, 0 }, { ARM_REG_SP, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tREV, ARM_INS_REV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_tREV16, ARM_INS_REV16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_tREVSH, ARM_INS_REVSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_tROR, ARM_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tRSB, ARM_INS_RSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSBC, ARM_INS_SBC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSETEND, ARM_INS_SETEND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_NOTMCLASS, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSTMIA_UPD, ARM_INS_STM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSTRBi, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSTRBr, ARM_INS_STRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSTRHi, ARM_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSTRHr, ARM_INS_STRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSTRi, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSTRr, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSTRspi, ARM_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSUBi3, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSUBi8, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSUBrr, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSUBspi, ARM_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSVC, ARM_INS_SVC,
-#ifndef CAPSTONE_DIET
- { ARM_REG_SP, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSXTB, ARM_INS_SXTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_tSXTH, ARM_INS_SXTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_tTRAP, ARM_INS_TRAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 0, 0
-#endif
- },
- {
- ARM_tTST, ARM_INS_TST,
-#ifndef CAPSTONE_DIET
- { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
-#endif
- },
- {
- ARM_tUDF, ARM_INS_UDF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 0, 0
-#endif
- },
- {
- ARM_tUXTB, ARM_INS_UXTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
- {
- ARM_tUXTH, ARM_INS_UXTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
-#endif
- },
+#include "ARMMappingInsn.inc"
};
void ARM_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
diff --git a/arch/ARM/ARMMappingInsn.inc b/arch/ARM/ARMMappingInsn.inc
new file mode 100644
index 0000000..44f5e2f
--- /dev/null
+++ b/arch/ARM/ARMMappingInsn.inc
@@ -0,0 +1,13311 @@
+// This is auto-gen data for Capstone engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{
+ ARM_ADCri, ARM_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ADCrr, ARM_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ADCrsi, ARM_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ADCrsr, ARM_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ADDri, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ADDrr, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ADDrsi, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ADDrsr, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ADR, ARM_INS_ADR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_AESD, ARM_INS_AESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_AESE, ARM_INS_AESE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_AESIMC, ARM_INS_AESIMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_AESMC, ARM_INS_AESMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ANDri, ARM_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ANDrr, ARM_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ANDrsi, ARM_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ANDrsr, ARM_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BFC, ARM_INS_BFC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BFI, ARM_INS_BFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BICri, ARM_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BICrr, ARM_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BICrsi, ARM_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BICrsr, ARM_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BKPT, ARM_INS_BKPT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BL, ARM_INS_BL,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BLX, ARM_INS_BLX,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_JUMP, ARM_GRP_V5T, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BLX_pred, ARM_INS_BLX,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BLXi, ARM_INS_BLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BL_pred, ARM_INS_BL,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BX, ARM_INS_BX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 1, 1
+#endif
+},
+{
+ ARM_BXJ, ARM_INS_BXJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BX_RET, ARM_INS_BX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 0, 0
+#endif
+},
+{
+ ARM_BX_pred, ARM_INS_BX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 1, 1
+#endif
+},
+{
+ ARM_Bcc, ARM_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, 0 }, 1, 0
+#endif
+},
+{
+ ARM_CDP, ARM_INS_CDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CDP2, ARM_INS_CDP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CLREX, ARM_INS_CLREX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CLZ, ARM_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CMNri, ARM_INS_CMN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CMNzrr, ARM_INS_CMN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CMNzrsi, ARM_INS_CMN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CMNzrsr, ARM_INS_CMN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CMPri, ARM_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CMPrr, ARM_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CMPrsi, ARM_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CMPrsr, ARM_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CPS1p, ARM_INS_CPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CPS2p, ARM_INS_CPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CPS3p, ARM_INS_CPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CRC32B, ARM_INS_CRC32B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CRC32CB, ARM_INS_CRC32CB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CRC32CH, ARM_INS_CRC32CH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CRC32CW, ARM_INS_CRC32CW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CRC32H, ARM_INS_CRC32H,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_CRC32W, ARM_INS_CRC32W,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_DBG, ARM_INS_DBG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
+#endif
+},
+{
+ ARM_DMB, ARM_INS_DMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0
+#endif
+},
+{
+ ARM_DSB, ARM_INS_DSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0
+#endif
+},
+{
+ ARM_EORri, ARM_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_EORrr, ARM_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_EORrsi, ARM_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_EORrsr, ARM_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ERET, ARM_INS_ERET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
+#endif
+},
+{
+ ARM_FCONSTD, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP3, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_FCONSTS, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP3, 0 }, 0, 0
+#endif
+},
+{
+ ARM_FLDMXDB_UPD, ARM_INS_FLDMDBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_FLDMXIA, ARM_INS_FLDMIAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_FLDMXIA_UPD, ARM_INS_FLDMIAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_FMSTAT, ARM_INS_VMRS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR_NZCV, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_FSTMXDB_UPD, ARM_INS_FSTMDBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_FSTMXIA, ARM_INS_FSTMIAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_FSTMXIA_UPD, ARM_INS_FSTMIAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_HINT, ARM_INS_HINT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_HLT, ARM_INS_HLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_HVC, ARM_INS_HVC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ISB, ARM_INS_ISB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDA, ARM_INS_LDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDAB, ARM_INS_LDAB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDAEX, ARM_INS_LDAEX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDAEXB, ARM_INS_LDAEXB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDAEXD, ARM_INS_LDAEXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDAEXH, ARM_INS_LDAEXH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDAH, ARM_INS_LDAH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC2L_OFFSET, ARM_INS_LDC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC2L_OPTION, ARM_INS_LDC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC2L_POST, ARM_INS_LDC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC2L_PRE, ARM_INS_LDC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC2_OFFSET, ARM_INS_LDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC2_OPTION, ARM_INS_LDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC2_POST, ARM_INS_LDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC2_PRE, ARM_INS_LDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDCL_OFFSET, ARM_INS_LDCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDCL_OPTION, ARM_INS_LDCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDCL_POST, ARM_INS_LDCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDCL_PRE, ARM_INS_LDCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC_OFFSET, ARM_INS_LDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC_OPTION, ARM_INS_LDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC_POST, ARM_INS_LDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDC_PRE, ARM_INS_LDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDMDA, ARM_INS_LDMDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDMDA_UPD, ARM_INS_LDMDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDMDB, ARM_INS_LDMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDMDB_UPD, ARM_INS_LDMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDMIA, ARM_INS_LDM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDMIA_UPD, ARM_INS_LDM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDMIB, ARM_INS_LDMIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDMIB_UPD, ARM_INS_LDMIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRBT_POST_IMM, ARM_INS_LDRBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRBT_POST_REG, ARM_INS_LDRBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRB_POST_IMM, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRB_POST_REG, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRB_PRE_IMM, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRB_PRE_REG, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRBi12, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRBrs, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRD, ARM_INS_LDRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRD_POST, ARM_INS_LDRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRD_PRE, ARM_INS_LDRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDREX, ARM_INS_LDREX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDREXB, ARM_INS_LDREXB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDREXD, ARM_INS_LDREXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDREXH, ARM_INS_LDREXH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRH, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRHTi, ARM_INS_LDRHT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRHTr, ARM_INS_LDRHT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRH_POST, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRH_PRE, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRSB, ARM_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRSBTi, ARM_INS_LDRSBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRSBTr, ARM_INS_LDRSBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRSB_POST, ARM_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRSB_PRE, ARM_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRSH, ARM_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRSHTi, ARM_INS_LDRSHT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRSHTr, ARM_INS_LDRSHT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRSH_POST, ARM_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRSH_PRE, ARM_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRT_POST_IMM, ARM_INS_LDRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRT_POST_REG, ARM_INS_LDRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDR_POST_IMM, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDR_POST_REG, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDR_PRE_IMM, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDR_PRE_REG, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRcp, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRi12, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_LDRrs, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MCR, ARM_INS_MCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MCR2, ARM_INS_MCR2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MCRR, ARM_INS_MCRR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MCRR2, ARM_INS_MCRR2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MLA, ARM_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MLS, ARM_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MOVPCLR, ARM_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MOVTi16, ARM_INS_MOVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MOVi, ARM_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MOVi16, ARM_INS_MOVW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MOVr, ARM_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MOVr_TC, ARM_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MOVsi, ARM_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MOVsr, ARM_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MRC, ARM_INS_MRC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MRC2, ARM_INS_MRC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MRRC, ARM_INS_MRRC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MRRC2, ARM_INS_MRRC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MRS, ARM_INS_MRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MRSbanked, ARM_INS_MRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MRSsys, ARM_INS_MRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MSR, ARM_INS_MSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MSRbanked, ARM_INS_MSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MSRi, ARM_INS_MSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MUL, ARM_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MVNi, ARM_INS_MVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MVNr, ARM_INS_MVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MVNsi, ARM_INS_MVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_MVNsr, ARM_INS_MVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ORRri, ARM_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ORRrr, ARM_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ORRrsi, ARM_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_ORRrsr, ARM_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_PKHBT, ARM_INS_PKHBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_PKHTB, ARM_INS_PKHTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_PLDWi12, ARM_INS_PLDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_PLDWrs, ARM_INS_PLDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_PLDi12, ARM_INS_PLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_PLDrs, ARM_INS_PLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_PLIi12, ARM_INS_PLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
+#endif
+},
+{
+ ARM_PLIrs, ARM_INS_PLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
+#endif
+},
+{
+ ARM_QADD, ARM_INS_QADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_QADD16, ARM_INS_QADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_QADD8, ARM_INS_QADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_QASX, ARM_INS_QASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_QDADD, ARM_INS_QDADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_QDSUB, ARM_INS_QDSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_QSAX, ARM_INS_QSAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_QSUB, ARM_INS_QSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_QSUB16, ARM_INS_QSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_QSUB8, ARM_INS_QSUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RBIT, ARM_INS_RBIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_REV, ARM_INS_REV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_REV16, ARM_INS_REV16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_REVSH, ARM_INS_REVSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RFEDA, ARM_INS_RFEDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RFEDA_UPD, ARM_INS_RFEDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RFEDB, ARM_INS_RFEDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RFEDB_UPD, ARM_INS_RFEDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RFEIA, ARM_INS_RFEIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RFEIA_UPD, ARM_INS_RFEIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RFEIB, ARM_INS_RFEIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RFEIB_UPD, ARM_INS_RFEIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RSBri, ARM_INS_RSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RSBrr, ARM_INS_RSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RSBrsi, ARM_INS_RSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RSBrsr, ARM_INS_RSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RSCri, ARM_INS_RSC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RSCrr, ARM_INS_RSC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RSCrsi, ARM_INS_RSC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_RSCrsr, ARM_INS_RSC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SADD16, ARM_INS_SADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SADD8, ARM_INS_SADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SASX, ARM_INS_SASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SBCri, ARM_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SBCrr, ARM_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SBCrsi, ARM_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SBCrsr, ARM_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SBFX, ARM_INS_SBFX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SDIV, ARM_INS_SDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SEL, ARM_INS_SEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SETEND, ARM_INS_SETEND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHA1C, ARM_INS_SHA1C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHA1H, ARM_INS_SHA1H,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHA1M, ARM_INS_SHA1M,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHA1P, ARM_INS_SHA1P,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHA1SU0, ARM_INS_SHA1SU0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHA1SU1, ARM_INS_SHA1SU1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHA256H, ARM_INS_SHA256H,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHA256H2, ARM_INS_SHA256H2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHA256SU0, ARM_INS_SHA256SU0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHA256SU1, ARM_INS_SHA256SU1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHADD16, ARM_INS_SHADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHADD8, ARM_INS_SHADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHASX, ARM_INS_SHASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHSAX, ARM_INS_SHSAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHSUB16, ARM_INS_SHSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SHSUB8, ARM_INS_SHSUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMC, ARM_INS_SMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_TRUSTZONE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLABB, ARM_INS_SMLABB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLABT, ARM_INS_SMLABT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLAD, ARM_INS_SMLAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLADX, ARM_INS_SMLADX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLAL, ARM_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLALBB, ARM_INS_SMLALBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLALBT, ARM_INS_SMLALBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLALD, ARM_INS_SMLALD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLALDX, ARM_INS_SMLALDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLALTB, ARM_INS_SMLALTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLALTT, ARM_INS_SMLALTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLATB, ARM_INS_SMLATB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLATT, ARM_INS_SMLATT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLAWB, ARM_INS_SMLAWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLAWT, ARM_INS_SMLAWT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLSD, ARM_INS_SMLSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLSDX, ARM_INS_SMLSDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLSLD, ARM_INS_SMLSLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMLSLDX, ARM_INS_SMLSLDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMMLA, ARM_INS_SMMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMMLAR, ARM_INS_SMMLAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMMLS, ARM_INS_SMMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMMLSR, ARM_INS_SMMLSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMMUL, ARM_INS_SMMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMMULR, ARM_INS_SMMULR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMUAD, ARM_INS_SMUAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMUADX, ARM_INS_SMUADX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMULBB, ARM_INS_SMULBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMULBT, ARM_INS_SMULBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMULL, ARM_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMULTB, ARM_INS_SMULTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMULTT, ARM_INS_SMULTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMULWB, ARM_INS_SMULWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMULWT, ARM_INS_SMULWT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMUSD, ARM_INS_SMUSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SMUSDX, ARM_INS_SMUSDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SRSDA, ARM_INS_SRSDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SRSDA_UPD, ARM_INS_SRSDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SRSDB, ARM_INS_SRSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SRSDB_UPD, ARM_INS_SRSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SRSIA, ARM_INS_SRSIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SRSIA_UPD, ARM_INS_SRSIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SRSIB, ARM_INS_SRSIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SRSIB_UPD, ARM_INS_SRSIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SSAT, ARM_INS_SSAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SSAT16, ARM_INS_SSAT16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SSAX, ARM_INS_SSAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SSUB16, ARM_INS_SSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SSUB8, ARM_INS_SSUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC2L_OFFSET, ARM_INS_STC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC2L_OPTION, ARM_INS_STC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC2L_POST, ARM_INS_STC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC2L_PRE, ARM_INS_STC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC2_OFFSET, ARM_INS_STC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC2_OPTION, ARM_INS_STC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC2_POST, ARM_INS_STC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC2_PRE, ARM_INS_STC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STCL_OFFSET, ARM_INS_STCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STCL_OPTION, ARM_INS_STCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STCL_POST, ARM_INS_STCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STCL_PRE, ARM_INS_STCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC_OFFSET, ARM_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC_OPTION, ARM_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC_POST, ARM_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STC_PRE, ARM_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STL, ARM_INS_STL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STLB, ARM_INS_STLB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STLEX, ARM_INS_STLEX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STLEXB, ARM_INS_STLEXB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STLEXD, ARM_INS_STLEXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STLEXH, ARM_INS_STLEXH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STLH, ARM_INS_STLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STMDA, ARM_INS_STMDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STMDA_UPD, ARM_INS_STMDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STMDB, ARM_INS_STMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STMDB_UPD, ARM_INS_STMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STMIA, ARM_INS_STM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STMIA_UPD, ARM_INS_STM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STMIB, ARM_INS_STMIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STMIB_UPD, ARM_INS_STMIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRBT_POST_IMM, ARM_INS_STRBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRBT_POST_REG, ARM_INS_STRBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRB_POST_IMM, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRB_POST_REG, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRB_PRE_IMM, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRB_PRE_REG, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRBi12, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRBrs, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRD, ARM_INS_STRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRD_POST, ARM_INS_STRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRD_PRE, ARM_INS_STRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STREX, ARM_INS_STREX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STREXB, ARM_INS_STREXB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STREXD, ARM_INS_STREXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STREXH, ARM_INS_STREXH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRH, ARM_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRHTi, ARM_INS_STRHT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRHTr, ARM_INS_STRHT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRH_POST, ARM_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRH_PRE, ARM_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRT_POST_IMM, ARM_INS_STRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRT_POST_REG, ARM_INS_STRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STR_POST_IMM, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STR_POST_REG, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STR_PRE_IMM, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STR_PRE_REG, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRi12, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_STRrs, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SUBri, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SUBrr, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SUBrsi, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SUBrsr, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SVC, ARM_INS_SVC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_SP, 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SWP, ARM_INS_SWP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SWPB, ARM_INS_SWPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SXTAB, ARM_INS_SXTAB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SXTAB16, ARM_INS_SXTAB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SXTAH, ARM_INS_SXTAH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SXTB, ARM_INS_SXTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SXTB16, ARM_INS_SXTB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_SXTH, ARM_INS_SXTH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_TEQri, ARM_INS_TEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_TEQrr, ARM_INS_TEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_TEQrsi, ARM_INS_TEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_TEQrsr, ARM_INS_TEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_TRAP, ARM_INS_TRAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_TRAPNaCl, ARM_INS_TRAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_TSTri, ARM_INS_TST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_TSTrr, ARM_INS_TST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_TSTrsi, ARM_INS_TST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_TSTrsr, ARM_INS_TST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UADD16, ARM_INS_UADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UADD8, ARM_INS_UADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UASX, ARM_INS_UASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UBFX, ARM_INS_UBFX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UDF, ARM_INS_UDF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UDIV, ARM_INS_UDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UHADD16, ARM_INS_UHADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UHADD8, ARM_INS_UHADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UHASX, ARM_INS_UHASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UHSAX, ARM_INS_UHSAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UHSUB16, ARM_INS_UHSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UHSUB8, ARM_INS_UHSUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UMAAL, ARM_INS_UMAAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UMLAL, ARM_INS_UMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UMULL, ARM_INS_UMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UQADD16, ARM_INS_UQADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UQADD8, ARM_INS_UQADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UQASX, ARM_INS_UQASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UQSAX, ARM_INS_UQSAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UQSUB16, ARM_INS_UQSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UQSUB8, ARM_INS_UQSUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_USAD8, ARM_INS_USAD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_USADA8, ARM_INS_USADA8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_USAT, ARM_INS_USAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_USAT16, ARM_INS_USAT16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_USAX, ARM_INS_USAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_USUB16, ARM_INS_USUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_USUB8, ARM_INS_USUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UXTAB, ARM_INS_UXTAB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UXTAB16, ARM_INS_UXTAB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UXTAH, ARM_INS_UXTAH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UXTB, ARM_INS_UXTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UXTB16, ARM_INS_UXTB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_UXTH, ARM_INS_UXTH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABALsv2i64, ARM_INS_VABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABALsv4i32, ARM_INS_VABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABALsv8i16, ARM_INS_VABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABALuv2i64, ARM_INS_VABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABALuv4i32, ARM_INS_VABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABALuv8i16, ARM_INS_VABAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAsv16i8, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAsv2i32, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAsv4i16, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAsv4i32, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAsv8i16, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAsv8i8, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAuv16i8, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAuv2i32, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAuv4i16, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAuv4i32, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAuv8i16, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABAuv8i8, ARM_INS_VABA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDLsv2i64, ARM_INS_VABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDLsv4i32, ARM_INS_VABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDLsv8i16, ARM_INS_VABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDLuv2i64, ARM_INS_VABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDLuv4i32, ARM_INS_VABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDLuv8i16, ARM_INS_VABDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDfd, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDfq, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDsv16i8, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDsv2i32, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDsv4i16, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDsv4i32, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDsv8i16, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDsv8i8, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDuv16i8, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDuv2i32, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDuv4i16, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDuv4i32, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDuv8i16, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABDuv8i8, ARM_INS_VABD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABSD, ARM_INS_VABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABSS, ARM_INS_VABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABSfd, ARM_INS_VABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABSfq, ARM_INS_VABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABSv16i8, ARM_INS_VABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABSv2i32, ARM_INS_VABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABSv4i16, ARM_INS_VABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABSv4i32, ARM_INS_VABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABSv8i16, ARM_INS_VABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VABSv8i8, ARM_INS_VABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VACGEd, ARM_INS_VACGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VACGEq, ARM_INS_VACGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VACGTd, ARM_INS_VACGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VACGTq, ARM_INS_VACGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDD, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDHNv2i32, ARM_INS_VADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDHNv4i16, ARM_INS_VADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDHNv8i8, ARM_INS_VADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDLsv2i64, ARM_INS_VADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDLsv4i32, ARM_INS_VADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDLsv8i16, ARM_INS_VADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDLuv2i64, ARM_INS_VADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDLuv4i32, ARM_INS_VADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDLuv8i16, ARM_INS_VADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDS, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDWsv2i64, ARM_INS_VADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDWsv4i32, ARM_INS_VADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDWsv8i16, ARM_INS_VADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDWuv2i64, ARM_INS_VADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDWuv4i32, ARM_INS_VADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDWuv8i16, ARM_INS_VADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDfd, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDfq, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDv16i8, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDv1i64, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDv2i32, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDv2i64, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDv4i16, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDv4i32, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDv8i16, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VADDv8i8, ARM_INS_VADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VANDd, ARM_INS_VAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VANDq, ARM_INS_VAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBICd, ARM_INS_VBIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBICiv2i32, ARM_INS_VBIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBICiv4i16, ARM_INS_VBIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBICiv4i32, ARM_INS_VBIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBICiv8i16, ARM_INS_VBIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBICq, ARM_INS_VBIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBIFd, ARM_INS_VBIF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBIFq, ARM_INS_VBIF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBITd, ARM_INS_VBIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBITq, ARM_INS_VBIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBSLd, ARM_INS_VBSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VBSLq, ARM_INS_VBSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQfd, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQfq, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQv16i8, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQv2i32, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQv4i16, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQv4i32, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQv8i16, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQv8i8, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQzv16i8, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQzv2f32, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQzv2i32, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQzv4f32, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQzv4i16, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQzv4i32, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQzv8i16, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCEQzv8i8, ARM_INS_VCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEfd, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEfq, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEsv16i8, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEsv2i32, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEsv4i16, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEsv4i32, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEsv8i16, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEsv8i8, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEuv16i8, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEuv2i32, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEuv4i16, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEuv4i32, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEuv8i16, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEuv8i8, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEzv16i8, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEzv2f32, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEzv2i32, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEzv4f32, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEzv4i16, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEzv4i32, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEzv8i16, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGEzv8i8, ARM_INS_VCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTfd, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTfq, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTsv16i8, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTsv2i32, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTsv4i16, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTsv4i32, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTsv8i16, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTsv8i8, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTuv16i8, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTuv2i32, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTuv4i16, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTuv4i32, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTuv8i16, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTuv8i8, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTzv16i8, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTzv2f32, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTzv2i32, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTzv4f32, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTzv4i16, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTzv4i32, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTzv8i16, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCGTzv8i8, ARM_INS_VCGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLEzv16i8, ARM_INS_VCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLEzv2f32, ARM_INS_VCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLEzv2i32, ARM_INS_VCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLEzv4f32, ARM_INS_VCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLEzv4i16, ARM_INS_VCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLEzv4i32, ARM_INS_VCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLEzv8i16, ARM_INS_VCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLEzv8i8, ARM_INS_VCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLSv16i8, ARM_INS_VCLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLSv2i32, ARM_INS_VCLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLSv4i16, ARM_INS_VCLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLSv4i32, ARM_INS_VCLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLSv8i16, ARM_INS_VCLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLSv8i8, ARM_INS_VCLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLTzv16i8, ARM_INS_VCLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLTzv2f32, ARM_INS_VCLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLTzv2i32, ARM_INS_VCLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLTzv4f32, ARM_INS_VCLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLTzv4i16, ARM_INS_VCLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLTzv4i32, ARM_INS_VCLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLTzv8i16, ARM_INS_VCLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLTzv8i8, ARM_INS_VCLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLZv16i8, ARM_INS_VCLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLZv2i32, ARM_INS_VCLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLZv4i16, ARM_INS_VCLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLZv4i32, ARM_INS_VCLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLZv8i16, ARM_INS_VCLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCLZv8i8, ARM_INS_VCLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCMPD, ARM_INS_VCMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCMPED, ARM_INS_VCMPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCMPES, ARM_INS_VCMPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCMPEZD, ARM_INS_VCMPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCMPEZS, ARM_INS_VCMPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCMPS, ARM_INS_VCMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCMPZD, ARM_INS_VCMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCMPZS, ARM_INS_VCMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCNTd, ARM_INS_VCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCNTq, ARM_INS_VCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTANSD, ARM_INS_VCVTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTANSQ, ARM_INS_VCVTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTANUD, ARM_INS_VCVTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTANUQ, ARM_INS_VCVTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTASD, ARM_INS_VCVTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTASS, ARM_INS_VCVTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTAUD, ARM_INS_VCVTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTAUS, ARM_INS_VCVTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTBDH, ARM_INS_VCVTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTBHD, ARM_INS_VCVTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTBHS, ARM_INS_VCVTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTBSH, ARM_INS_VCVTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTDS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTMNSD, ARM_INS_VCVTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTMNSQ, ARM_INS_VCVTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTMNUD, ARM_INS_VCVTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTMNUQ, ARM_INS_VCVTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTMSD, ARM_INS_VCVTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTMSS, ARM_INS_VCVTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTMUD, ARM_INS_VCVTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTMUS, ARM_INS_VCVTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTNNSD, ARM_INS_VCVTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTNNSQ, ARM_INS_VCVTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTNNUD, ARM_INS_VCVTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTNNUQ, ARM_INS_VCVTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTNSD, ARM_INS_VCVTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTNSS, ARM_INS_VCVTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTNUD, ARM_INS_VCVTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTNUS, ARM_INS_VCVTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTPNSD, ARM_INS_VCVTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTPNSQ, ARM_INS_VCVTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTPNUD, ARM_INS_VCVTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTPNUQ, ARM_INS_VCVTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTPSD, ARM_INS_VCVTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTPSS, ARM_INS_VCVTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTPUD, ARM_INS_VCVTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTPUS, ARM_INS_VCVTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTSD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTTDH, ARM_INS_VCVTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTTHD, ARM_INS_VCVTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTTHS, ARM_INS_VCVTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTTSH, ARM_INS_VCVTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTf2h, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTf2sd, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTf2sq, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTf2ud, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTf2uq, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTf2xsd, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTf2xsq, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTf2xud, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTf2xuq, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTh2f, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTs2fd, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTs2fq, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTu2fd, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTu2fq, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTxs2fd, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTxs2fq, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTxu2fd, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VCVTxu2fq, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDIVD, ARM_INS_VDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDIVS, ARM_INS_VDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUP16d, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUP16q, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUP32d, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUP32q, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUP8d, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUP8q, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUPLN16d, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUPLN16q, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUPLN32d, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUPLN32q, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUPLN8d, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VDUPLN8q, ARM_INS_VDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VEORd, ARM_INS_VEOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VEORq, ARM_INS_VEOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VEXTd16, ARM_INS_VEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VEXTd32, ARM_INS_VEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VEXTd8, ARM_INS_VEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VEXTq16, ARM_INS_VEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VEXTq32, ARM_INS_VEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VEXTq64, ARM_INS_VEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VEXTq8, ARM_INS_VEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFMAD, ARM_INS_VFMA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFMAS, ARM_INS_VFMA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFMAfd, ARM_INS_VFMA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFMAfq, ARM_INS_VFMA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFMSD, ARM_INS_VFMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFMSS, ARM_INS_VFMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFMSfd, ARM_INS_VFMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFMSfq, ARM_INS_VFMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFNMAD, ARM_INS_VFNMA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFNMAS, ARM_INS_VFNMA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFNMSD, ARM_INS_VFNMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VFNMSS, ARM_INS_VFNMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VGETLNi32, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VGETLNs16, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VGETLNs8, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VGETLNu16, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VGETLNu8, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDsv16i8, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDsv2i32, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDsv4i16, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDsv4i32, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDsv8i16, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDsv8i8, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDuv16i8, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDuv2i32, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDuv4i16, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDuv4i32, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDuv8i16, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHADDuv8i8, ARM_INS_VHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBsv16i8, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBsv2i32, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBsv4i16, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBsv4i32, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBsv8i16, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBsv8i8, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBuv16i8, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBuv2i32, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBuv4i16, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBuv4i32, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBuv8i16, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VHSUBuv8i8, ARM_INS_VHSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPd16, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPd16wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPd16wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPd32, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPd32wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPd32wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPd8, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPd8wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPd8wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPq16, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPq16wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPq16wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPq32, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPq32wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPq32wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPq8, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPq8wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1DUPq8wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1LNd16, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1LNd16_UPD, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1LNd32, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1LNd32_UPD, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1LNd8, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1LNd8_UPD, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d16, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d16Q, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d16Qwb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d16Qwb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d16T, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d16Twb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d16Twb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d16wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d16wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d32, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d32Q, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d32Qwb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d32Qwb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d32T, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d32Twb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d32Twb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d32wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d32wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d64, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d64Q, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d64Qwb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d64Qwb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d64T, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d64Twb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d64Twb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d64wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d64wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d8, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d8Q, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d8Qwb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d8Qwb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d8T, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d8Twb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d8Twb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d8wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1d8wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q16, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q16wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q16wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q32, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q32wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q32wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q64, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q64wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q64wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q8, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q8wb_fixed, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD1q8wb_register, ARM_INS_VLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd16, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd16wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd16wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd16x2, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd16x2wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd16x2wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd32, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd32wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd32wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd32x2, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd32x2wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd32x2wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd8, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd8wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd8wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd8x2, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd8x2wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2DUPd8x2wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2LNd16, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2LNd16_UPD, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2LNd32, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2LNd32_UPD, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2LNd8, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2LNd8_UPD, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2LNq16, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2LNq16_UPD, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2LNq32, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2LNq32_UPD, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2b16, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2b16wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2b16wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2b32, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2b32wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2b32wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2b8, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2b8wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2b8wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2d16, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2d16wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2d16wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2d32, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2d32wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2d32wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2d8, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2d8wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2d8wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2q16, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2q16wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2q16wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2q32, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2q32wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2q32wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2q8, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2q8wb_fixed, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD2q8wb_register, ARM_INS_VLD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPd16, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPd16_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPd32, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPd32_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPd8, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPd8_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPq16, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPq16_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPq32, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPq32_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPq8, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3DUPq8_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3LNd16, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3LNd16_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3LNd32, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3LNd32_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3LNd8, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3LNd8_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3LNq16, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3LNq16_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3LNq32, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3LNq32_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3d16, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3d16_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3d32, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3d32_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3d8, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3d8_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3q16, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3q16_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3q32, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3q32_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3q8, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD3q8_UPD, ARM_INS_VLD3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPd16, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPd16_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPd32, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPd32_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPd8, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPd8_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPq16, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPq16_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPq32, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPq32_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPq8, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4DUPq8_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4LNd16, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4LNd16_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4LNd32, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4LNd32_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4LNd8, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4LNd8_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4LNq16, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4LNq16_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4LNq32, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4LNq32_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4d16, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4d16_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4d32, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4d32_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4d8, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4d8_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4q16, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4q16_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4q32, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4q32_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4q8, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLD4q8_UPD, ARM_INS_VLD4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLDMDDB_UPD, ARM_INS_VLDMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLDMDIA, ARM_INS_VLDMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLDMDIA_UPD, ARM_INS_VLDMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLDMSDB_UPD, ARM_INS_VLDMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLDMSIA, ARM_INS_VLDMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLDMSIA_UPD, ARM_INS_VLDMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLDRD, ARM_INS_VLDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VLDRS, ARM_INS_VLDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXNMD, ARM_INS_VMAXNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXNMND, ARM_INS_VMAXNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXNMNQ, ARM_INS_VMAXNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXNMS, ARM_INS_VMAXNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXfd, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXfq, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXsv16i8, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXsv2i32, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXsv4i16, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXsv4i32, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXsv8i16, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXsv8i8, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXuv16i8, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXuv2i32, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXuv4i16, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXuv4i32, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXuv8i16, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMAXuv8i8, ARM_INS_VMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINNMD, ARM_INS_VMINNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINNMND, ARM_INS_VMINNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINNMNQ, ARM_INS_VMINNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINNMS, ARM_INS_VMINNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINfd, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINfq, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINsv16i8, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINsv2i32, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINsv4i16, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINsv4i32, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINsv8i16, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINsv8i8, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINuv16i8, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINuv2i32, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINuv4i16, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINuv4i32, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINuv8i16, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMINuv8i8, ARM_INS_VMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAD, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLALslsv2i32, ARM_INS_VMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLALslsv4i16, ARM_INS_VMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLALsluv2i32, ARM_INS_VMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLALsluv4i16, ARM_INS_VMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLALsv2i64, ARM_INS_VMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLALsv4i32, ARM_INS_VMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLALsv8i16, ARM_INS_VMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLALuv2i64, ARM_INS_VMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLALuv4i32, ARM_INS_VMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLALuv8i16, ARM_INS_VMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAS, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAfd, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAfq, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAslfd, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAslfq, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAslv2i32, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAslv4i16, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAslv4i32, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAslv8i16, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAv16i8, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAv2i32, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAv4i16, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAv4i32, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAv8i16, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLAv8i8, ARM_INS_VMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSD, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSLslsv2i32, ARM_INS_VMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSLslsv4i16, ARM_INS_VMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSLsluv2i32, ARM_INS_VMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSLsluv4i16, ARM_INS_VMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSLsv2i64, ARM_INS_VMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSLsv4i32, ARM_INS_VMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSLsv8i16, ARM_INS_VMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSLuv2i64, ARM_INS_VMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSLuv4i32, ARM_INS_VMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSLuv8i16, ARM_INS_VMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSS, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSfd, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSfq, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSslfd, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSslfq, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSslv2i32, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSslv4i16, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSslv4i32, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSslv8i16, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSv16i8, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSv2i32, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSv4i16, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSv4i32, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSv8i16, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMLSv8i8, ARM_INS_VMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVD, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVDRR, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVLsv2i64, ARM_INS_VMOVL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVLsv4i32, ARM_INS_VMOVL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVLsv8i16, ARM_INS_VMOVL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVLuv2i64, ARM_INS_VMOVL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVLuv4i32, ARM_INS_VMOVL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVLuv8i16, ARM_INS_VMOVL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVNv2i32, ARM_INS_VMOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVNv4i16, ARM_INS_VMOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVNv8i8, ARM_INS_VMOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVRRD, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVRRS, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVRS, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVS, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVSR, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVSRR, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVv16i8, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVv1i64, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVv2f32, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVv2i32, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVv2i64, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVv4f32, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVv4i16, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVv4i32, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVv8i16, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMOVv8i8, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMRS, ARM_INS_VMRS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMRS_FPEXC, ARM_INS_VMRS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMRS_FPINST, ARM_INS_VMRS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMRS_FPINST2, ARM_INS_VMRS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMRS_FPSID, ARM_INS_VMRS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMRS_MVFR0, ARM_INS_VMRS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMRS_MVFR1, ARM_INS_VMRS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMRS_MVFR2, ARM_INS_VMRS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMSR, ARM_INS_VMSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMSR_FPEXC, ARM_INS_VMSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMSR_FPINST, ARM_INS_VMSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMSR_FPINST2, ARM_INS_VMSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMSR_FPSID, ARM_INS_VMSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULD, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLp64, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLp8, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLslsv2i32, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLslsv4i16, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLsluv2i32, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLsluv4i16, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLsv2i64, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLsv4i32, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLsv8i16, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLuv2i64, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLuv4i32, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULLuv8i16, ARM_INS_VMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULS, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULfd, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULfq, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULpd, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULpq, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULslfd, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULslfq, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULslv2i32, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULslv4i16, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULslv4i32, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULslv8i16, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULv16i8, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULv2i32, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULv4i16, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULv4i32, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULv8i16, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMULv8i8, ARM_INS_VMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMVNd, ARM_INS_VMVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMVNq, ARM_INS_VMVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMVNv2i32, ARM_INS_VMVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMVNv4i16, ARM_INS_VMVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMVNv4i32, ARM_INS_VMVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VMVNv8i16, ARM_INS_VMVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNEGD, ARM_INS_VNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNEGS, ARM_INS_VNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNEGf32q, ARM_INS_VNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNEGfd, ARM_INS_VNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNEGs16d, ARM_INS_VNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNEGs16q, ARM_INS_VNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNEGs32d, ARM_INS_VNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNEGs32q, ARM_INS_VNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNEGs8d, ARM_INS_VNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNEGs8q, ARM_INS_VNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNMLAD, ARM_INS_VNMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNMLAS, ARM_INS_VNMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNMLSD, ARM_INS_VNMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNMLSS, ARM_INS_VNMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNMULD, ARM_INS_VNMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VNMULS, ARM_INS_VNMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VORNd, ARM_INS_VORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VORNq, ARM_INS_VORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VORRd, ARM_INS_VORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VORRiv2i32, ARM_INS_VORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VORRiv4i16, ARM_INS_VORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VORRiv4i32, ARM_INS_VORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VORRiv8i16, ARM_INS_VORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VORRq, ARM_INS_VORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALsv16i8, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALsv2i32, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALsv4i16, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALsv4i32, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALsv8i16, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALsv8i8, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALuv16i8, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALuv2i32, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALuv4i16, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALuv4i32, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALuv8i16, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADALuv8i8, ARM_INS_VPADAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLsv16i8, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLsv2i32, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLsv4i16, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLsv4i32, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLsv8i16, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLsv8i8, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLuv16i8, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLuv2i32, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLuv4i16, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLuv4i32, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLuv8i16, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDLuv8i8, ARM_INS_VPADDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDf, ARM_INS_VPADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDi16, ARM_INS_VPADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDi32, ARM_INS_VPADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPADDi8, ARM_INS_VPADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMAXf, ARM_INS_VPMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMAXs16, ARM_INS_VPMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMAXs32, ARM_INS_VPMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMAXs8, ARM_INS_VPMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMAXu16, ARM_INS_VPMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMAXu32, ARM_INS_VPMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMAXu8, ARM_INS_VPMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMINf, ARM_INS_VPMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMINs16, ARM_INS_VPMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMINs32, ARM_INS_VPMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMINs8, ARM_INS_VPMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMINu16, ARM_INS_VPMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMINu32, ARM_INS_VPMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VPMINu8, ARM_INS_VPMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQABSv16i8, ARM_INS_VQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQABSv2i32, ARM_INS_VQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQABSv4i16, ARM_INS_VQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQABSv4i32, ARM_INS_VQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQABSv8i16, ARM_INS_VQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQABSv8i8, ARM_INS_VQABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDsv16i8, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDsv1i64, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDsv2i32, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDsv2i64, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDsv4i16, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDsv4i32, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDsv8i16, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDsv8i8, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDuv16i8, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDuv1i64, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDuv2i32, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDuv2i64, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDuv4i16, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDuv4i32, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDuv8i16, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQADDuv8i8, ARM_INS_VQADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMLALslv2i32, ARM_INS_VQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMLALslv4i16, ARM_INS_VQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMLALv2i64, ARM_INS_VQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMLALv4i32, ARM_INS_VQDMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMLSLslv2i32, ARM_INS_VQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMLSLslv4i16, ARM_INS_VQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMLSLv2i64, ARM_INS_VQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMLSLv4i32, ARM_INS_VQDMLSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULHslv2i32, ARM_INS_VQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULHslv4i16, ARM_INS_VQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULHslv4i32, ARM_INS_VQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULHslv8i16, ARM_INS_VQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULHv2i32, ARM_INS_VQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULHv4i16, ARM_INS_VQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULHv4i32, ARM_INS_VQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULHv8i16, ARM_INS_VQDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULLslv2i32, ARM_INS_VQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULLslv4i16, ARM_INS_VQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULLv2i64, ARM_INS_VQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQDMULLv4i32, ARM_INS_VQDMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQMOVNsuv2i32, ARM_INS_VQMOVUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQMOVNsuv4i16, ARM_INS_VQMOVUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQMOVNsuv8i8, ARM_INS_VQMOVUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQMOVNsv2i32, ARM_INS_VQMOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQMOVNsv4i16, ARM_INS_VQMOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQMOVNsv8i8, ARM_INS_VQMOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQMOVNuv2i32, ARM_INS_VQMOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQMOVNuv4i16, ARM_INS_VQMOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQMOVNuv8i8, ARM_INS_VQMOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQNEGv16i8, ARM_INS_VQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQNEGv2i32, ARM_INS_VQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQNEGv4i16, ARM_INS_VQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQNEGv4i32, ARM_INS_VQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQNEGv8i16, ARM_INS_VQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQNEGv8i8, ARM_INS_VQNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRDMULHslv2i32, ARM_INS_VQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRDMULHslv4i16, ARM_INS_VQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRDMULHslv4i32, ARM_INS_VQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRDMULHslv8i16, ARM_INS_VQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRDMULHv2i32, ARM_INS_VQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRDMULHv4i16, ARM_INS_VQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRDMULHv4i32, ARM_INS_VQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRDMULHv8i16, ARM_INS_VQRDMULH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLsv16i8, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLsv1i64, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLsv2i32, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLsv2i64, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLsv4i16, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLsv4i32, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLsv8i16, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLsv8i8, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLuv16i8, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLuv1i64, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLuv2i32, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLuv2i64, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLuv4i16, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLuv4i32, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLuv8i16, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHLuv8i8, ARM_INS_VQRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHRNsv2i32, ARM_INS_VQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHRNsv4i16, ARM_INS_VQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHRNsv8i8, ARM_INS_VQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHRNuv2i32, ARM_INS_VQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHRNuv4i16, ARM_INS_VQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHRNuv8i8, ARM_INS_VQRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHRUNv2i32, ARM_INS_VQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHRUNv4i16, ARM_INS_VQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQRSHRUNv8i8, ARM_INS_VQRSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsiv16i8, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsiv1i64, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsiv2i32, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsiv2i64, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsiv4i16, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsiv4i32, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsiv8i16, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsiv8i8, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsuv16i8, ARM_INS_VQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsuv1i64, ARM_INS_VQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsuv2i32, ARM_INS_VQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsuv2i64, ARM_INS_VQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsuv4i16, ARM_INS_VQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsuv4i32, ARM_INS_VQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsuv8i16, ARM_INS_VQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsuv8i8, ARM_INS_VQSHLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsv16i8, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsv1i64, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsv2i32, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsv2i64, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsv4i16, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsv4i32, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsv8i16, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLsv8i8, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuiv16i8, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuiv1i64, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuiv2i32, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuiv2i64, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuiv4i16, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuiv4i32, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuiv8i16, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuiv8i8, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuv16i8, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuv1i64, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuv2i32, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuv2i64, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuv4i16, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuv4i32, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuv8i16, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHLuv8i8, ARM_INS_VQSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHRNsv2i32, ARM_INS_VQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHRNsv4i16, ARM_INS_VQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHRNsv8i8, ARM_INS_VQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHRNuv2i32, ARM_INS_VQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHRNuv4i16, ARM_INS_VQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHRNuv8i8, ARM_INS_VQSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHRUNv2i32, ARM_INS_VQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHRUNv4i16, ARM_INS_VQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSHRUNv8i8, ARM_INS_VQSHRUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBsv16i8, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBsv1i64, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBsv2i32, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBsv2i64, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBsv4i16, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBsv4i32, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBsv8i16, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBsv8i8, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBuv16i8, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBuv1i64, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBuv2i32, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBuv2i64, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBuv4i16, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBuv4i32, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBuv8i16, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VQSUBuv8i8, ARM_INS_VQSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRADDHNv2i32, ARM_INS_VRADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRADDHNv4i16, ARM_INS_VRADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRADDHNv8i8, ARM_INS_VRADDHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRECPEd, ARM_INS_VRECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRECPEfd, ARM_INS_VRECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRECPEfq, ARM_INS_VRECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRECPEq, ARM_INS_VRECPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRECPSfd, ARM_INS_VRECPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRECPSfq, ARM_INS_VRECPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV16d8, ARM_INS_VREV16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV16q8, ARM_INS_VREV16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV32d16, ARM_INS_VREV32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV32d8, ARM_INS_VREV32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV32q16, ARM_INS_VREV32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV32q8, ARM_INS_VREV32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV64d16, ARM_INS_VREV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV64d32, ARM_INS_VREV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV64d8, ARM_INS_VREV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV64q16, ARM_INS_VREV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV64q32, ARM_INS_VREV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VREV64q8, ARM_INS_VREV64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDsv16i8, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDsv2i32, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDsv4i16, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDsv4i32, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDsv8i16, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDsv8i8, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDuv16i8, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDuv2i32, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDuv4i16, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDuv4i32, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDuv8i16, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRHADDuv8i8, ARM_INS_VRHADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTAD, ARM_INS_VRINTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTAND, ARM_INS_VRINTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTANQ, ARM_INS_VRINTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTAS, ARM_INS_VRINTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTMD, ARM_INS_VRINTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTMND, ARM_INS_VRINTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTMNQ, ARM_INS_VRINTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTMS, ARM_INS_VRINTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTND, ARM_INS_VRINTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTNND, ARM_INS_VRINTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTNNQ, ARM_INS_VRINTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTNS, ARM_INS_VRINTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTPD, ARM_INS_VRINTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTPND, ARM_INS_VRINTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTPNQ, ARM_INS_VRINTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTPS, ARM_INS_VRINTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTRD, ARM_INS_VRINTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTRS, ARM_INS_VRINTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTXD, ARM_INS_VRINTX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTXND, ARM_INS_VRINTX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTXNQ, ARM_INS_VRINTX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTXS, ARM_INS_VRINTX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTZD, ARM_INS_VRINTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTZND, ARM_INS_VRINTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTZNQ, ARM_INS_VRINTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRINTZS, ARM_INS_VRINTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLsv16i8, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLsv1i64, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLsv2i32, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLsv2i64, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLsv4i16, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLsv4i32, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLsv8i16, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLsv8i8, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLuv16i8, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLuv1i64, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLuv2i32, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLuv2i64, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLuv4i16, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLuv4i32, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLuv8i16, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHLuv8i8, ARM_INS_VRSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRNv2i32, ARM_INS_VRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRNv4i16, ARM_INS_VRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRNv8i8, ARM_INS_VRSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRsv16i8, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRsv1i64, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRsv2i32, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRsv2i64, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRsv4i16, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRsv4i32, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRsv8i16, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRsv8i8, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRuv16i8, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRuv1i64, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRuv2i32, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRuv2i64, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRuv4i16, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRuv4i32, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRuv8i16, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSHRuv8i8, ARM_INS_VRSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSQRTEd, ARM_INS_VRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSQRTEfd, ARM_INS_VRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSQRTEfq, ARM_INS_VRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSQRTEq, ARM_INS_VRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSQRTSfd, ARM_INS_VRSQRTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSQRTSfq, ARM_INS_VRSQRTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAsv16i8, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAsv1i64, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAsv2i32, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAsv2i64, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAsv4i16, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAsv4i32, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAsv8i16, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAsv8i8, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAuv16i8, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAuv1i64, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAuv2i32, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAuv2i64, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAuv4i16, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAuv4i32, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAuv8i16, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSRAuv8i8, ARM_INS_VRSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSUBHNv2i32, ARM_INS_VRSUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSUBHNv4i16, ARM_INS_VRSUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VRSUBHNv8i8, ARM_INS_VRSUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSELEQD, ARM_INS_VSELEQ,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSELEQS, ARM_INS_VSELEQ,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSELGED, ARM_INS_VSELGE,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSELGES, ARM_INS_VSELGE,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSELGTD, ARM_INS_VSELGT,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSELGTS, ARM_INS_VSELGT,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSELVSD, ARM_INS_VSELVS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSELVSS, ARM_INS_VSELVS,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSETLNi16, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSETLNi32, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSETLNi8, ARM_INS_VMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLLi16, ARM_INS_VSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLLi32, ARM_INS_VSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLLi8, ARM_INS_VSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLLsv2i64, ARM_INS_VSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLLsv4i32, ARM_INS_VSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLLsv8i16, ARM_INS_VSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLLuv2i64, ARM_INS_VSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLLuv4i32, ARM_INS_VSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLLuv8i16, ARM_INS_VSHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLiv16i8, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLiv1i64, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLiv2i32, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLiv2i64, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLiv4i16, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLiv4i32, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLiv8i16, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLiv8i8, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLsv16i8, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLsv1i64, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLsv2i32, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLsv2i64, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLsv4i16, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLsv4i32, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLsv8i16, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLsv8i8, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLuv16i8, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLuv1i64, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLuv2i32, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLuv2i64, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLuv4i16, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLuv4i32, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLuv8i16, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHLuv8i8, ARM_INS_VSHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRNv2i32, ARM_INS_VSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRNv4i16, ARM_INS_VSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRNv8i8, ARM_INS_VSHRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRsv16i8, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRsv1i64, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRsv2i32, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRsv2i64, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRsv4i16, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRsv4i32, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRsv8i16, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRsv8i8, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRuv16i8, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRuv1i64, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRuv2i32, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRuv2i64, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRuv4i16, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRuv4i32, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRuv8i16, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHRuv8i8, ARM_INS_VSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHTOD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSHTOS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSITOD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSITOS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSLIv16i8, ARM_INS_VSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSLIv1i64, ARM_INS_VSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSLIv2i32, ARM_INS_VSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSLIv2i64, ARM_INS_VSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSLIv4i16, ARM_INS_VSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSLIv4i32, ARM_INS_VSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSLIv8i16, ARM_INS_VSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSLIv8i8, ARM_INS_VSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSLTOD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSLTOS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSQRTD, ARM_INS_VSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSQRTS, ARM_INS_VSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAsv16i8, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAsv1i64, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAsv2i32, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAsv2i64, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAsv4i16, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAsv4i32, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAsv8i16, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAsv8i8, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAuv16i8, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAuv1i64, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAuv2i32, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAuv2i64, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAuv4i16, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAuv4i32, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAuv8i16, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRAuv8i8, ARM_INS_VSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRIv16i8, ARM_INS_VSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRIv1i64, ARM_INS_VSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRIv2i32, ARM_INS_VSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRIv2i64, ARM_INS_VSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRIv4i16, ARM_INS_VSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRIv4i32, ARM_INS_VSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRIv8i16, ARM_INS_VSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSRIv8i8, ARM_INS_VSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1LNd16, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1LNd16_UPD, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1LNd32, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1LNd32_UPD, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1LNd8, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1LNd8_UPD, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d16, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d16Q, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d16Qwb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d16Qwb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d16T, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d16Twb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d16Twb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d16wb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d16wb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d32, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d32Q, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d32Qwb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d32Qwb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d32T, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d32Twb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d32Twb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d32wb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d32wb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d64, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d64Q, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d64Qwb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d64Qwb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d64T, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d64Twb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d64Twb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d64wb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d64wb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d8, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d8Q, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d8Qwb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d8Qwb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d8T, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d8Twb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d8Twb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d8wb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1d8wb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q16, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q16wb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q16wb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q32, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q32wb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q32wb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q64, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q64wb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q64wb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q8, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q8wb_fixed, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST1q8wb_register, ARM_INS_VST1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2LNd16, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2LNd16_UPD, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2LNd32, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2LNd32_UPD, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2LNd8, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2LNd8_UPD, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2LNq16, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2LNq16_UPD, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2LNq32, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2LNq32_UPD, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2b16, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2b16wb_fixed, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2b16wb_register, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2b32, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2b32wb_fixed, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2b32wb_register, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2b8, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2b8wb_fixed, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2b8wb_register, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2d16, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2d16wb_fixed, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2d16wb_register, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2d32, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2d32wb_fixed, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2d32wb_register, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2d8, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2d8wb_fixed, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2d8wb_register, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2q16, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2q16wb_fixed, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2q16wb_register, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2q32, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2q32wb_fixed, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2q32wb_register, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2q8, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2q8wb_fixed, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST2q8wb_register, ARM_INS_VST2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3LNd16, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3LNd16_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3LNd32, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3LNd32_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3LNd8, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3LNd8_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3LNq16, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3LNq16_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3LNq32, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3LNq32_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3d16, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3d16_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3d32, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3d32_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3d8, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3d8_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3q16, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3q16_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3q32, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3q32_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3q8, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST3q8_UPD, ARM_INS_VST3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4LNd16, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4LNd16_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4LNd32, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4LNd32_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4LNd8, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4LNd8_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4LNq16, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4LNq16_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4LNq32, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4LNq32_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4d16, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4d16_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4d32, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4d32_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4d8, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4d8_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4q16, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4q16_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4q32, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4q32_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4q8, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VST4q8_UPD, ARM_INS_VST4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSTMDDB_UPD, ARM_INS_VSTMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSTMDIA, ARM_INS_VSTMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSTMDIA_UPD, ARM_INS_VSTMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSTMSDB_UPD, ARM_INS_VSTMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSTMSIA, ARM_INS_VSTMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSTMSIA_UPD, ARM_INS_VSTMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSTRD, ARM_INS_VSTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSTRS, ARM_INS_VSTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBD, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBHNv2i32, ARM_INS_VSUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBHNv4i16, ARM_INS_VSUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBHNv8i8, ARM_INS_VSUBHN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBLsv2i64, ARM_INS_VSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBLsv4i32, ARM_INS_VSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBLsv8i16, ARM_INS_VSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBLuv2i64, ARM_INS_VSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBLuv4i32, ARM_INS_VSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBLuv8i16, ARM_INS_VSUBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBS, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBWsv2i64, ARM_INS_VSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBWsv4i32, ARM_INS_VSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBWsv8i16, ARM_INS_VSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBWuv2i64, ARM_INS_VSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBWuv4i32, ARM_INS_VSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBWuv8i16, ARM_INS_VSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBfd, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBfq, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBv16i8, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBv1i64, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBv2i32, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBv2i64, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBv4i16, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBv4i32, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBv8i16, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSUBv8i8, ARM_INS_VSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSWPd, ARM_INS_VSWP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VSWPq, ARM_INS_VSWP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTBL1, ARM_INS_VTBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTBL2, ARM_INS_VTBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTBL3, ARM_INS_VTBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTBL4, ARM_INS_VTBL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTBX1, ARM_INS_VTBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTBX2, ARM_INS_VTBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTBX3, ARM_INS_VTBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTBX4, ARM_INS_VTBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOSHD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOSHS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOSIRD, ARM_INS_VCVTR,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOSIRS, ARM_INS_VCVTR,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOSIZD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOSIZS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOSLD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOSLS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOUHD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOUHS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOUIRD, ARM_INS_VCVTR,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOUIRS, ARM_INS_VCVTR,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOUIZD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOUIZS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOULD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTOULS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTRNd16, ARM_INS_VTRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTRNd32, ARM_INS_VTRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTRNd8, ARM_INS_VTRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTRNq16, ARM_INS_VTRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTRNq32, ARM_INS_VTRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTRNq8, ARM_INS_VTRN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTSTv16i8, ARM_INS_VTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTSTv2i32, ARM_INS_VTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTSTv4i16, ARM_INS_VTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTSTv4i32, ARM_INS_VTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTSTv8i16, ARM_INS_VTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VTSTv8i8, ARM_INS_VTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VUHTOD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VUHTOS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VUITOD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VUITOS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VULTOD, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VULTOS, ARM_INS_VCVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VUZPd16, ARM_INS_VUZP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VUZPd8, ARM_INS_VUZP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VUZPq16, ARM_INS_VUZP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VUZPq32, ARM_INS_VUZP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VUZPq8, ARM_INS_VUZP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VZIPd16, ARM_INS_VZIP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VZIPd8, ARM_INS_VZIP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VZIPq16, ARM_INS_VZIP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VZIPq32, ARM_INS_VZIP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_VZIPq8, ARM_INS_VZIP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysLDMDA, ARM_INS_LDMDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysLDMDA_UPD, ARM_INS_LDMDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysLDMDB, ARM_INS_LDMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysLDMDB_UPD, ARM_INS_LDMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysLDMIA, ARM_INS_LDM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysLDMIA_UPD, ARM_INS_LDM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysLDMIB, ARM_INS_LDMIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysLDMIB_UPD, ARM_INS_LDMIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysSTMDA, ARM_INS_STMDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysSTMDA_UPD, ARM_INS_STMDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysSTMDB, ARM_INS_STMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysSTMDB_UPD, ARM_INS_STMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysSTMIA, ARM_INS_STM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysSTMIA_UPD, ARM_INS_STM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysSTMIB, ARM_INS_STMIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_sysSTMIB_UPD, ARM_INS_STMIB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ADCri, ARM_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ADCrr, ARM_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ADCrs, ARM_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ADDri, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ADDri12, ARM_INS_ADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ADDrr, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ADDrs, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ADR, ARM_INS_ADR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ANDri, ARM_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ANDrr, ARM_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ANDrs, ARM_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ASRri, ARM_INS_ASR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ASRrr, ARM_INS_ASR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2B, ARM_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_THUMB2, 0 }, 1, 0
+#endif
+},
+{
+ ARM_t2BFC, ARM_INS_BFC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2BFI, ARM_INS_BFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2BICri, ARM_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2BICrr, ARM_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2BICrs, ARM_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2BXJ, ARM_INS_BXJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2Bcc, ARM_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 0
+#endif
+},
+{
+ ARM_t2CDP, ARM_INS_CDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CDP2, ARM_INS_CDP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CLREX, ARM_INS_CLREX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CLZ, ARM_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CMNri, ARM_INS_CMN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CMNzrr, ARM_INS_CMN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CMNzrs, ARM_INS_CMN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CMPri, ARM_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CMPrr, ARM_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CMPrs, ARM_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CPS1p, ARM_INS_CPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CPS2p, ARM_INS_CPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CPS3p, ARM_INS_CPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CRC32B, ARM_INS_CRC32B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CRC32CB, ARM_INS_CRC32CB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CRC32CH, ARM_INS_CRC32CH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CRC32CW, ARM_INS_CRC32CW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CRC32H, ARM_INS_CRC32H,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2CRC32W, ARM_INS_CRC32W,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2DBG, ARM_INS_DBG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2DCPS1, ARM_INS_DCPS1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2DCPS2, ARM_INS_DCPS2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2DCPS3, ARM_INS_DCPS3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2DMB, ARM_INS_DMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2DSB, ARM_INS_DSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2EORri, ARM_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2EORrr, ARM_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2EORrs, ARM_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2HINT, ARM_INS_HINT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2HVC, ARM_INS_HVC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ISB, ARM_INS_ISB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2IT, ARM_INS_IT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_ITSTATE, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDA, ARM_INS_LDA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDAB, ARM_INS_LDAB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDAEX, ARM_INS_LDAEX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDAEXB, ARM_INS_LDAEXB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDAEXD, ARM_INS_LDAEXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDAEXH, ARM_INS_LDAEXH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDAH, ARM_INS_LDAH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC2L_OFFSET, ARM_INS_LDC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC2L_OPTION, ARM_INS_LDC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC2L_POST, ARM_INS_LDC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC2L_PRE, ARM_INS_LDC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC2_OFFSET, ARM_INS_LDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC2_OPTION, ARM_INS_LDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC2_POST, ARM_INS_LDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC2_PRE, ARM_INS_LDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDCL_OFFSET, ARM_INS_LDCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDCL_OPTION, ARM_INS_LDCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDCL_POST, ARM_INS_LDCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDCL_PRE, ARM_INS_LDCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC_OFFSET, ARM_INS_LDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC_OPTION, ARM_INS_LDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC_POST, ARM_INS_LDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDC_PRE, ARM_INS_LDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDMDB, ARM_INS_LDMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDMDB_UPD, ARM_INS_LDMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDMIA, ARM_INS_LDM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDMIA_UPD, ARM_INS_LDM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRBT, ARM_INS_LDRBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRB_POST, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRB_PRE, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRBi12, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRBi8, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRBpci, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRBs, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRD_POST, ARM_INS_LDRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRD_PRE, ARM_INS_LDRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRDi8, ARM_INS_LDRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDREX, ARM_INS_LDREX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDREXB, ARM_INS_LDREXB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDREXD, ARM_INS_LDREXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDREXH, ARM_INS_LDREXH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRHT, ARM_INS_LDRHT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRH_POST, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRH_PRE, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRHi12, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRHi8, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRHpci, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRHs, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSBT, ARM_INS_LDRSBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSB_POST, ARM_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSB_PRE, ARM_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSBi12, ARM_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSBi8, ARM_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSBpci, ARM_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSBs, ARM_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSHT, ARM_INS_LDRSHT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSH_POST, ARM_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSH_PRE, ARM_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSHi12, ARM_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSHi8, ARM_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSHpci, ARM_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRSHs, ARM_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRT, ARM_INS_LDRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDR_POST, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDR_PRE, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRi12, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRi8, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRpci, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LDRs, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LSLri, ARM_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LSLrr, ARM_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LSRri, ARM_INS_LSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2LSRrr, ARM_INS_LSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MCR, ARM_INS_MCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MCR2, ARM_INS_MCR2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MCRR, ARM_INS_MCRR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MCRR2, ARM_INS_MCRR2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MLA, ARM_INS_MLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MLS, ARM_INS_MLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MOVTi16, ARM_INS_MOVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MOVi, ARM_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MOVi16, ARM_INS_MOVW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MOVr, ARM_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MOVsra_flag, ARM_INS_ASRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MOVsrl_flag, ARM_INS_LSRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MRC, ARM_INS_MRC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MRC2, ARM_INS_MRC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MRRC, ARM_INS_MRRC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MRRC2, ARM_INS_MRRC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MRS_AR, ARM_INS_MRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MRS_M, ARM_INS_MRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_MCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MRSbanked, ARM_INS_MRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MRSsys_AR, ARM_INS_MRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MSR_AR, ARM_INS_MSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MSR_M, ARM_INS_MSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_MCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MSRbanked, ARM_INS_MSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_VIRTUALIZATION, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MUL, ARM_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MVNi, ARM_INS_MVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MVNr, ARM_INS_MVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2MVNs, ARM_INS_MVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ORNri, ARM_INS_ORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ORNrr, ARM_INS_ORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ORNrs, ARM_INS_ORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ORRri, ARM_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ORRrr, ARM_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2ORRrs, ARM_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PKHBT, ARM_INS_PKHBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PKHTB, ARM_INS_PKHTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLDWi12, ARM_INS_PLDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLDWi8, ARM_INS_PLDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLDWs, ARM_INS_PLDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLDi12, ARM_INS_PLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLDi8, ARM_INS_PLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLDpci, ARM_INS_PLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLDs, ARM_INS_PLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLIi12, ARM_INS_PLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLIi8, ARM_INS_PLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLIpci, ARM_INS_PLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2PLIs, ARM_INS_PLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2QADD, ARM_INS_QADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2QADD16, ARM_INS_QADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2QADD8, ARM_INS_QADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2QASX, ARM_INS_QASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2QDADD, ARM_INS_QDADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2QDSUB, ARM_INS_QDSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2QSAX, ARM_INS_QSAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2QSUB, ARM_INS_QSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2QSUB16, ARM_INS_QSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2QSUB8, ARM_INS_QSUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RBIT, ARM_INS_RBIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2REV, ARM_INS_REV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2REV16, ARM_INS_REV16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2REVSH, ARM_INS_REVSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RFEDB, ARM_INS_RFEDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RFEDBW, ARM_INS_RFEDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RFEIA, ARM_INS_RFEIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RFEIAW, ARM_INS_RFEIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RORri, ARM_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RORrr, ARM_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RRX, ARM_INS_RRX,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RSBri, ARM_INS_RSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RSBrr, ARM_INS_RSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2RSBrs, ARM_INS_RSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SADD16, ARM_INS_SADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SADD8, ARM_INS_SADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SASX, ARM_INS_SASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SBCri, ARM_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SBCrr, ARM_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SBCrs, ARM_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SBFX, ARM_INS_SBFX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SDIV, ARM_INS_SDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_DIVIDE, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SEL, ARM_INS_SEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SHADD16, ARM_INS_SHADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SHADD8, ARM_INS_SHADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SHASX, ARM_INS_SHASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SHSAX, ARM_INS_SHSAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SHSUB16, ARM_INS_SHSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SHSUB8, ARM_INS_SHSUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMC, ARM_INS_SMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_TRUSTZONE, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLABB, ARM_INS_SMLABB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLABT, ARM_INS_SMLABT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLAD, ARM_INS_SMLAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLADX, ARM_INS_SMLADX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLAL, ARM_INS_SMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLALBB, ARM_INS_SMLALBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLALBT, ARM_INS_SMLALBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLALD, ARM_INS_SMLALD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLALDX, ARM_INS_SMLALDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLALTB, ARM_INS_SMLALTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLALTT, ARM_INS_SMLALTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLATB, ARM_INS_SMLATB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLATT, ARM_INS_SMLATT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLAWB, ARM_INS_SMLAWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLAWT, ARM_INS_SMLAWT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLSD, ARM_INS_SMLSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLSDX, ARM_INS_SMLSDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLSLD, ARM_INS_SMLSLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMLSLDX, ARM_INS_SMLSLDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMMLA, ARM_INS_SMMLA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMMLAR, ARM_INS_SMMLAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMMLS, ARM_INS_SMMLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMMLSR, ARM_INS_SMMLSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMMUL, ARM_INS_SMMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMMULR, ARM_INS_SMMULR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMUAD, ARM_INS_SMUAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMUADX, ARM_INS_SMUADX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMULBB, ARM_INS_SMULBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMULBT, ARM_INS_SMULBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMULL, ARM_INS_SMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMULTB, ARM_INS_SMULTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMULTT, ARM_INS_SMULTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMULWB, ARM_INS_SMULWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMULWT, ARM_INS_SMULWT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMUSD, ARM_INS_SMUSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SMUSDX, ARM_INS_SMUSDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SRSDB, ARM_INS_SRSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SRSDB_UPD, ARM_INS_SRSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SRSIA, ARM_INS_SRSIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SRSIA_UPD, ARM_INS_SRSIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SSAT, ARM_INS_SSAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SSAT16, ARM_INS_SSAT16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SSAX, ARM_INS_SSAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SSUB16, ARM_INS_SSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SSUB8, ARM_INS_SSUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC2L_OFFSET, ARM_INS_STC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC2L_OPTION, ARM_INS_STC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC2L_POST, ARM_INS_STC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC2L_PRE, ARM_INS_STC2L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC2_OFFSET, ARM_INS_STC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC2_OPTION, ARM_INS_STC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC2_POST, ARM_INS_STC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC2_PRE, ARM_INS_STC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STCL_OFFSET, ARM_INS_STCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STCL_OPTION, ARM_INS_STCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STCL_POST, ARM_INS_STCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STCL_PRE, ARM_INS_STCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC_OFFSET, ARM_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC_OPTION, ARM_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC_POST, ARM_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STC_PRE, ARM_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STL, ARM_INS_STL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STLB, ARM_INS_STLB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STLEX, ARM_INS_STLEX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STLEXB, ARM_INS_STLEXB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STLEXD, ARM_INS_STLEXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STLEXH, ARM_INS_STLEXH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STLH, ARM_INS_STLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STMDB, ARM_INS_STMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STMDB_UPD, ARM_INS_STMDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STMIA, ARM_INS_STM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STMIA_UPD, ARM_INS_STM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRBT, ARM_INS_STRBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRB_POST, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRB_PRE, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRBi12, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRBi8, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRBs, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRD_POST, ARM_INS_STRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRD_PRE, ARM_INS_STRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRDi8, ARM_INS_STRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STREX, ARM_INS_STREX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STREXB, ARM_INS_STREXB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STREXD, ARM_INS_STREXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STREXH, ARM_INS_STREXH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRHT, ARM_INS_STRHT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRH_POST, ARM_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRH_PRE, ARM_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRHi12, ARM_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRHi8, ARM_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRHs, ARM_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRT, ARM_INS_STRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STR_POST, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STR_PRE, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRi12, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRi8, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2STRs, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SUBS_PC_LR, ARM_INS_SUBS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SUBri, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SUBri12, ARM_INS_SUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SUBrr, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SUBrs, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SXTAB, ARM_INS_SXTAB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SXTAB16, ARM_INS_SXTAB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SXTAH, ARM_INS_SXTAH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SXTB, ARM_INS_SXTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SXTB16, ARM_INS_SXTB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_T2EXTRACTPACK, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2SXTH, ARM_INS_SXTH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2TBB, ARM_INS_TBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 1
+#endif
+},
+{
+ ARM_t2TBH, ARM_INS_TBH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 1
+#endif
+},
+{
+ ARM_t2TEQri, ARM_INS_TEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2TEQrr, ARM_INS_TEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2TEQrs, ARM_INS_TEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2TSTri, ARM_INS_TST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2TSTrr, ARM_INS_TST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2TSTrs, ARM_INS_TST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UADD16, ARM_INS_UADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UADD8, ARM_INS_UADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UASX, ARM_INS_UASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UBFX, ARM_INS_UBFX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UDF, ARM_INS_UDF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UDIV, ARM_INS_UDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_DIVIDE, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UHADD16, ARM_INS_UHADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UHADD8, ARM_INS_UHADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UHASX, ARM_INS_UHASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UHSAX, ARM_INS_UHSAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UHSUB16, ARM_INS_UHSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UHSUB8, ARM_INS_UHSUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UMAAL, ARM_INS_UMAAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UMLAL, ARM_INS_UMLAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UMULL, ARM_INS_UMULL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UQADD16, ARM_INS_UQADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UQADD8, ARM_INS_UQADD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UQASX, ARM_INS_UQASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UQSAX, ARM_INS_UQSAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UQSUB16, ARM_INS_UQSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UQSUB8, ARM_INS_UQSUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2USAD8, ARM_INS_USAD8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2USADA8, ARM_INS_USADA8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2USAT, ARM_INS_USAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2USAT16, ARM_INS_USAT16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2USAX, ARM_INS_USAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2USUB16, ARM_INS_USUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2USUB8, ARM_INS_USUB8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UXTAB, ARM_INS_UXTAB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UXTAB16, ARM_INS_UXTAB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UXTAH, ARM_INS_UXTAH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UXTB, ARM_INS_UXTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UXTB16, ARM_INS_UXTB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_t2UXTH, ARM_INS_UXTH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tADC, ARM_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tADDhirr, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tADDi3, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tADDi8, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tADDrSP, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tADDrSPi, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tADDrr, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tADDspi, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tADDspr, ARM_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tADR, ARM_INS_ADR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tAND, ARM_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tASRri, ARM_INS_ASR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tASRrr, ARM_INS_ASR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tB, ARM_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 1, 0
+#endif
+},
+{
+ ARM_tBIC, ARM_INS_BIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tBKPT, ARM_INS_BKPT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tBL, ARM_INS_BL,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_THUMB, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tBLXi, ARM_INS_BLX,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_THUMB, ARM_GRP_V5T, ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tBLXr, ARM_INS_BLX,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_THUMB, ARM_GRP_V5T, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tBX, ARM_INS_BX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 1, 1
+#endif
+},
+{
+ ARM_tBcc, ARM_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 1, 0
+#endif
+},
+{
+ ARM_tCBNZ, ARM_INS_CBNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 0
+#endif
+},
+{
+ ARM_tCBZ, ARM_INS_CBZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 0
+#endif
+},
+{
+ ARM_tCMNz, ARM_INS_CMN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tCMPhir, ARM_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tCMPi8, ARM_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tCMPr, ARM_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tCPS, ARM_INS_CPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tEOR, ARM_INS_EOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tHINT, ARM_INS_HINT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V6M, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tHLT, ARM_INS_HLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDMIA, ARM_INS_LDM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDRBi, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDRBr, ARM_INS_LDRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDRHi, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDRHr, ARM_INS_LDRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDRSB, ARM_INS_LDRSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDRSH, ARM_INS_LDRSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDRi, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDRpci, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDRr, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLDRspi, ARM_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLSLri, ARM_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLSLrr, ARM_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLSRri, ARM_INS_LSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tLSRrr, ARM_INS_LSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tMOVSr, ARM_INS_MOVS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tMOVi8, ARM_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tMOVr, ARM_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tMUL, ARM_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tMVN, ARM_INS_MVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tORR, ARM_INS_ORR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tPOP, ARM_INS_POP,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_SP, 0 }, { ARM_REG_SP, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tPUSH, ARM_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_SP, 0 }, { ARM_REG_SP, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tREV, ARM_INS_REV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tREV16, ARM_INS_REV16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tREVSH, ARM_INS_REVSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tROR, ARM_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tRSB, ARM_INS_RSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSBC, ARM_INS_SBC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSETEND, ARM_INS_SETEND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_NOTMCLASS, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSTMIA_UPD, ARM_INS_STM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSTRBi, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSTRBr, ARM_INS_STRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSTRHi, ARM_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSTRHr, ARM_INS_STRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSTRi, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSTRr, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSTRspi, ARM_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSUBi3, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSUBi8, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSUBrr, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSUBspi, ARM_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSVC, ARM_INS_SVC,
+#ifndef CAPSTONE_DIET
+ { ARM_REG_SP, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSXTB, ARM_INS_SXTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tSXTH, ARM_INS_SXTH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tTRAP, ARM_INS_TRAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tTST, ARM_INS_TST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tUDF, ARM_INS_UDF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tUXTB, ARM_INS_UXTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
+{
+ ARM_tUXTH, ARM_INS_UXTH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
+#endif
+},
diff --git a/arch/Mips/MipsMapping.c b/arch/Mips/MipsMapping.c
index 2317580..0e97be7 100644
--- a/arch/Mips/MipsMapping.c
+++ b/arch/Mips/MipsMapping.c
@@ -219,9318 +219,7 @@
#endif
},
- {
- Mips_ABSQ_S_PH, MIPS_INS_ABSQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_ABSQ_S_QB, MIPS_INS_ABSQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ABSQ_S_W, MIPS_INS_ABSQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADD, MIPS_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDIUPC, MIPS_INS_ADDIUPC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDIUPC_MM, MIPS_INS_ADDIUPC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDIUR1SP_MM, MIPS_INS_ADDIUR1SP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDIUR2_MM, MIPS_INS_ADDIUR2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDIUS5_MM, MIPS_INS_ADDIUS5,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDIUSP_MM, MIPS_INS_ADDIUSP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDQH_PH, MIPS_INS_ADDQH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDQH_R_PH, MIPS_INS_ADDQH_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDQH_R_W, MIPS_INS_ADDQH_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDQH_W, MIPS_INS_ADDQH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDQ_PH, MIPS_INS_ADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDQ_S_PH, MIPS_INS_ADDQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDQ_S_W, MIPS_INS_ADDQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDSC, MIPS_INS_ADDSC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPCARRY, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_A_B, MIPS_INS_ADDS_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_A_D, MIPS_INS_ADDS_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_A_H, MIPS_INS_ADDS_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_A_W, MIPS_INS_ADDS_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_S_B, MIPS_INS_ADDS_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_S_D, MIPS_INS_ADDS_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_S_H, MIPS_INS_ADDS_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_S_W, MIPS_INS_ADDS_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_U_B, MIPS_INS_ADDS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_U_D, MIPS_INS_ADDS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_U_H, MIPS_INS_ADDS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDS_U_W, MIPS_INS_ADDS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDU16_MM, MIPS_INS_ADDU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDUH_QB, MIPS_INS_ADDUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDUH_R_QB, MIPS_INS_ADDUH_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDU_PH, MIPS_INS_ADDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDU_QB, MIPS_INS_ADDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDU_S_PH, MIPS_INS_ADDU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDU_S_QB, MIPS_INS_ADDU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDVI_B, MIPS_INS_ADDVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDVI_D, MIPS_INS_ADDVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDVI_H, MIPS_INS_ADDVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDVI_W, MIPS_INS_ADDVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDV_B, MIPS_INS_ADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDV_D, MIPS_INS_ADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDV_H, MIPS_INS_ADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDV_W, MIPS_INS_ADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDWC, MIPS_INS_ADDWC,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_DSPCARRY, 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADD_A_B, MIPS_INS_ADD_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADD_A_D, MIPS_INS_ADD_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADD_A_H, MIPS_INS_ADD_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADD_A_W, MIPS_INS_ADD_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADD_MM, MIPS_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDi, MIPS_INS_ADDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDi_MM, MIPS_INS_ADDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDiu, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDiu_MM, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDu, MIPS_INS_ADDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_ADDu_MM, MIPS_INS_ADDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ALIGN, MIPS_INS_ALIGN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_ALUIPC, MIPS_INS_ALUIPC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_AND, MIPS_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_AND16_MM, MIPS_INS_AND16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_AND64, MIPS_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_ANDI16_MM, MIPS_INS_ANDI16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ANDI_B, MIPS_INS_ANDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AND_MM, MIPS_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_AND_V, MIPS_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ANDi, MIPS_INS_ANDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ANDi64, MIPS_INS_ANDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_ANDi_MM, MIPS_INS_ANDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_APPEND, MIPS_INS_APPEND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ASUB_S_B, MIPS_INS_ASUB_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ASUB_S_D, MIPS_INS_ASUB_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ASUB_S_H, MIPS_INS_ASUB_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ASUB_S_W, MIPS_INS_ASUB_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ASUB_U_B, MIPS_INS_ASUB_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ASUB_U_D, MIPS_INS_ASUB_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ASUB_U_H, MIPS_INS_ASUB_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ASUB_U_W, MIPS_INS_ASUB_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AUI, MIPS_INS_AUI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_AUIPC, MIPS_INS_AUIPC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVER_S_B, MIPS_INS_AVER_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVER_S_D, MIPS_INS_AVER_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVER_S_H, MIPS_INS_AVER_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVER_S_W, MIPS_INS_AVER_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVER_U_B, MIPS_INS_AVER_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVER_U_D, MIPS_INS_AVER_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVER_U_H, MIPS_INS_AVER_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVER_U_W, MIPS_INS_AVER_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVE_S_B, MIPS_INS_AVE_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVE_S_D, MIPS_INS_AVE_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVE_S_H, MIPS_INS_AVE_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVE_S_W, MIPS_INS_AVE_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVE_U_B, MIPS_INS_AVE_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVE_U_D, MIPS_INS_AVE_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVE_U_H, MIPS_INS_AVE_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AVE_U_W, MIPS_INS_AVE_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_AddiuRxImmX16, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_AddiuRxPcImmX16, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_AddiuRxRxImm16, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_AddiuRxRxImmX16, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_AddiuRxRyOffMemX16, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_AddiuSpImm16, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_SP, 0 }, { MIPS_REG_SP, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_AddiuSpImmX16, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_SP, 0 }, { MIPS_REG_SP, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_AdduRxRyRz16, MIPS_INS_ADDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_AndRxRxRy16, MIPS_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_B16_MM, MIPS_INS_B16,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BADDu, MIPS_INS_BADDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_BAL, MIPS_INS_BAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BALC, MIPS_INS_BALC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BALIGN, MIPS_INS_BALIGN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_BBIT0, MIPS_INS_BBIT0,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_CNMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BBIT032, MIPS_INS_BBIT032,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_CNMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BBIT1, MIPS_INS_BBIT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_CNMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BBIT132, MIPS_INS_BBIT132,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_CNMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC, MIPS_INS_BC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC0F, MIPS_INS_BC0F,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC0FL, MIPS_INS_BC0FL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC0T, MIPS_INS_BC0T,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC0TL, MIPS_INS_BC0TL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC1EQZ, MIPS_INS_BC1EQZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC1F, MIPS_INS_BC1F,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC1FL, MIPS_INS_BC1FL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC1F_MM, MIPS_INS_BC1F,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC1NEZ, MIPS_INS_BC1NEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC1T, MIPS_INS_BC1T,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC1TL, MIPS_INS_BC1TL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC1T_MM, MIPS_INS_BC1T,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC2EQZ, MIPS_INS_BC2EQZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC2F, MIPS_INS_BC2F,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC2FL, MIPS_INS_BC2FL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC2NEZ, MIPS_INS_BC2NEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC2T, MIPS_INS_BC2T,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC2TL, MIPS_INS_BC2TL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC3F, MIPS_INS_BC3F,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC3FL, MIPS_INS_BC3FL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC3T, MIPS_INS_BC3T,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BC3TL, MIPS_INS_BC3TL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BCLRI_B, MIPS_INS_BCLRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BCLRI_D, MIPS_INS_BCLRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BCLRI_H, MIPS_INS_BCLRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BCLRI_W, MIPS_INS_BCLRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BCLR_B, MIPS_INS_BCLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BCLR_D, MIPS_INS_BCLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BCLR_H, MIPS_INS_BCLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BCLR_W, MIPS_INS_BCLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BEQ, MIPS_INS_BEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BEQ64, MIPS_INS_BEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BEQC, MIPS_INS_BEQC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BEQL, MIPS_INS_BEQL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BEQZ16_MM, MIPS_INS_BEQZ16,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BEQZALC, MIPS_INS_BEQZALC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BEQZC, MIPS_INS_BEQZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BEQZC_MM, MIPS_INS_BEQZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BEQ_MM, MIPS_INS_BEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGEC, MIPS_INS_BGEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGEUC, MIPS_INS_BGEUC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGEZ, MIPS_INS_BGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGEZ64, MIPS_INS_BGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGEZAL, MIPS_INS_BGEZAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_BGEZALC, MIPS_INS_BGEZALC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGEZALL, MIPS_INS_BGEZALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_BGEZALS_MM, MIPS_INS_BGEZALS,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_BGEZAL_MM, MIPS_INS_BGEZAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_BGEZC, MIPS_INS_BGEZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGEZL, MIPS_INS_BGEZL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGEZ_MM, MIPS_INS_BGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGTZ, MIPS_INS_BGTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGTZ64, MIPS_INS_BGTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGTZALC, MIPS_INS_BGTZALC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGTZC, MIPS_INS_BGTZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGTZL, MIPS_INS_BGTZL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BGTZ_MM, MIPS_INS_BGTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BINSLI_B, MIPS_INS_BINSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSLI_D, MIPS_INS_BINSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSLI_H, MIPS_INS_BINSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSLI_W, MIPS_INS_BINSLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSL_B, MIPS_INS_BINSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSL_D, MIPS_INS_BINSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSL_H, MIPS_INS_BINSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSL_W, MIPS_INS_BINSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSRI_B, MIPS_INS_BINSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSRI_D, MIPS_INS_BINSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSRI_H, MIPS_INS_BINSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSRI_W, MIPS_INS_BINSRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSR_B, MIPS_INS_BINSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSR_D, MIPS_INS_BINSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSR_H, MIPS_INS_BINSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BINSR_W, MIPS_INS_BINSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BITREV, MIPS_INS_BITREV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_BITSWAP, MIPS_INS_BITSWAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_BLEZ, MIPS_INS_BLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLEZ64, MIPS_INS_BLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLEZALC, MIPS_INS_BLEZALC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLEZC, MIPS_INS_BLEZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLEZL, MIPS_INS_BLEZL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLEZ_MM, MIPS_INS_BLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLTC, MIPS_INS_BLTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLTUC, MIPS_INS_BLTUC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLTZ, MIPS_INS_BLTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLTZ64, MIPS_INS_BLTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLTZAL, MIPS_INS_BLTZAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_BLTZALC, MIPS_INS_BLTZALC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLTZALL, MIPS_INS_BLTZALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_BLTZALS_MM, MIPS_INS_BLTZALS,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_BLTZAL_MM, MIPS_INS_BLTZAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_BLTZC, MIPS_INS_BLTZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLTZL, MIPS_INS_BLTZL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BLTZ_MM, MIPS_INS_BLTZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BMNZI_B, MIPS_INS_BMNZI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BMNZ_V, MIPS_INS_BMNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BMZI_B, MIPS_INS_BMZI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BMZ_V, MIPS_INS_BMZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BNE, MIPS_INS_BNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNE64, MIPS_INS_BNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNEC, MIPS_INS_BNEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNEGI_B, MIPS_INS_BNEGI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BNEGI_D, MIPS_INS_BNEGI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BNEGI_H, MIPS_INS_BNEGI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BNEGI_W, MIPS_INS_BNEGI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BNEG_B, MIPS_INS_BNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BNEG_D, MIPS_INS_BNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BNEG_H, MIPS_INS_BNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BNEG_W, MIPS_INS_BNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BNEL, MIPS_INS_BNEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNEZ16_MM, MIPS_INS_BNEZ16,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNEZALC, MIPS_INS_BNEZALC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNEZC, MIPS_INS_BNEZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNEZC_MM, MIPS_INS_BNEZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNE_MM, MIPS_INS_BNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNVC, MIPS_INS_BNVC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNZ_B, MIPS_INS_BNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNZ_D, MIPS_INS_BNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNZ_H, MIPS_INS_BNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNZ_V, MIPS_INS_BNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
-#endif
- },
- {
- Mips_BNZ_W, MIPS_INS_BNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
-#endif
- },
- {
- Mips_BOVC, MIPS_INS_BOVC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
-#endif
- },
- {
- Mips_BPOSGE32, MIPS_INS_BPOSGE32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 1, 0
-#endif
- },
- {
- Mips_BREAK, MIPS_INS_BREAK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_BREAK16_MM, MIPS_INS_BREAK16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_BREAK_MM, MIPS_INS_BREAK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_BSELI_B, MIPS_INS_BSELI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BSEL_V, MIPS_INS_BSEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BSETI_B, MIPS_INS_BSETI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BSETI_D, MIPS_INS_BSETI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BSETI_H, MIPS_INS_BSETI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BSETI_W, MIPS_INS_BSETI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BSET_B, MIPS_INS_BSET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BSET_D, MIPS_INS_BSET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BSET_H, MIPS_INS_BSET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BSET_W, MIPS_INS_BSET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_BZ_B, MIPS_INS_BZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
-#endif
- },
- {
- Mips_BZ_D, MIPS_INS_BZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
-#endif
- },
- {
- Mips_BZ_H, MIPS_INS_BZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
-#endif
- },
- {
- Mips_BZ_V, MIPS_INS_BZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
-#endif
- },
- {
- Mips_BZ_W, MIPS_INS_BZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
-#endif
- },
- {
- Mips_BeqzRxImm16, MIPS_INS_BEQZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
-#endif
- },
- {
- Mips_BeqzRxImmX16, MIPS_INS_BEQZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
-#endif
- },
- {
- Mips_Bimm16, MIPS_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
-#endif
- },
- {
- Mips_BimmX16, MIPS_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
-#endif
- },
- {
- Mips_BnezRxImm16, MIPS_INS_BNEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
-#endif
- },
- {
- Mips_BnezRxImmX16, MIPS_INS_BNEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
-#endif
- },
- {
- Mips_Break16, MIPS_INS_BREAK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_Bteqz16, MIPS_INS_BTEQZ,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
-#endif
- },
- {
- Mips_BteqzX16, MIPS_INS_BTEQZ,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
-#endif
- },
- {
- Mips_Btnez16, MIPS_INS_BTNEZ,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
-#endif
- },
- {
- Mips_BtnezX16, MIPS_INS_BTNEZ,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
-#endif
- },
- {
- Mips_CACHE, MIPS_INS_CACHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CACHE_MM, MIPS_INS_CACHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CACHE_R6, MIPS_INS_CACHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEIL_L_D64, MIPS_INS_CEIL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEIL_L_S, MIPS_INS_CEIL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEIL_W_D32, MIPS_INS_CEIL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEIL_W_D64, MIPS_INS_CEIL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEIL_W_MM, MIPS_INS_CEIL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEIL_W_S, MIPS_INS_CEIL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEIL_W_S_MM, MIPS_INS_CEIL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEQI_B, MIPS_INS_CEQI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEQI_D, MIPS_INS_CEQI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEQI_H, MIPS_INS_CEQI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEQI_W, MIPS_INS_CEQI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEQ_B, MIPS_INS_CEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEQ_D, MIPS_INS_CEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEQ_H, MIPS_INS_CEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CEQ_W, MIPS_INS_CEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CFC1, MIPS_INS_CFC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_CFC1_MM, MIPS_INS_CFC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CFCMSA, MIPS_INS_CFCMSA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CINS, MIPS_INS_CINS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CINS32, MIPS_INS_CINS32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLASS_D, MIPS_INS_CLASS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLASS_S, MIPS_INS_CLASS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLEI_S_B, MIPS_INS_CLEI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLEI_S_D, MIPS_INS_CLEI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLEI_S_H, MIPS_INS_CLEI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLEI_S_W, MIPS_INS_CLEI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLEI_U_B, MIPS_INS_CLEI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLEI_U_D, MIPS_INS_CLEI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLEI_U_H, MIPS_INS_CLEI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLEI_U_W, MIPS_INS_CLEI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLE_S_B, MIPS_INS_CLE_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLE_S_D, MIPS_INS_CLE_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLE_S_H, MIPS_INS_CLE_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLE_S_W, MIPS_INS_CLE_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLE_U_B, MIPS_INS_CLE_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLE_U_D, MIPS_INS_CLE_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLE_U_H, MIPS_INS_CLE_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLE_U_W, MIPS_INS_CLE_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLO, MIPS_INS_CLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLO_MM, MIPS_INS_CLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLO_R6, MIPS_INS_CLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLTI_S_B, MIPS_INS_CLTI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLTI_S_D, MIPS_INS_CLTI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLTI_S_H, MIPS_INS_CLTI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLTI_S_W, MIPS_INS_CLTI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLTI_U_B, MIPS_INS_CLTI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLTI_U_D, MIPS_INS_CLTI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLTI_U_H, MIPS_INS_CLTI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLTI_U_W, MIPS_INS_CLTI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLT_S_B, MIPS_INS_CLT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLT_S_D, MIPS_INS_CLT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLT_S_H, MIPS_INS_CLT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLT_S_W, MIPS_INS_CLT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLT_U_B, MIPS_INS_CLT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLT_U_D, MIPS_INS_CLT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLT_U_H, MIPS_INS_CLT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLT_U_W, MIPS_INS_CLT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLZ, MIPS_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLZ_MM, MIPS_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CLZ_R6, MIPS_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMPGDU_EQ_QB, MIPS_INS_CMPGDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMPGDU_LE_QB, MIPS_INS_CMPGDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMPGDU_LT_QB, MIPS_INS_CMPGDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMPGU_EQ_QB, MIPS_INS_CMPGU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMPGU_LE_QB, MIPS_INS_CMPGU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMPGU_LT_QB, MIPS_INS_CMPGU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMPU_EQ_QB, MIPS_INS_CMPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMPU_LE_QB, MIPS_INS_CMPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMPU_LT_QB, MIPS_INS_CMPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_EQ_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_EQ_PH, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_EQ_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_F_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_F_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_LE_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_LE_PH, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_LE_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_LT_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_LT_PH, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_LT_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SAF_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SAF_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SEQ_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SEQ_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SLE_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SLE_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SLT_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SLT_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SUEQ_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SUEQ_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SULE_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SULE_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SULT_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SULT_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SUN_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_SUN_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_UEQ_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_UEQ_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_ULE_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_ULE_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_ULT_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_ULT_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_UN_D, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CMP_UN_S, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_COPY_S_B, MIPS_INS_COPY_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_COPY_S_D, MIPS_INS_COPY_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0
-#endif
- },
- {
- Mips_COPY_S_H, MIPS_INS_COPY_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_COPY_S_W, MIPS_INS_COPY_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_COPY_U_B, MIPS_INS_COPY_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_COPY_U_D, MIPS_INS_COPY_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0
-#endif
- },
- {
- Mips_COPY_U_H, MIPS_INS_COPY_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_COPY_U_W, MIPS_INS_COPY_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CTC1, MIPS_INS_CTC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_CTC1_MM, MIPS_INS_CTC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CTCMSA, MIPS_INS_CTCMSA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_D32_S, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_D32_W, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_D32_W_MM, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_D64_L, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_D64_S, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_D64_W, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_D_S_MM, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_L_D64, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_L_D64_MM, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_L_S, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_L_S_MM, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_S_D32, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_S_D32_MM, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_S_D64, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_S_L, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_S_W, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_S_W_MM, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_W_D32, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_W_D64, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_W_MM, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_W_S, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_CVT_W_S_MM, MIPS_INS_CVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_EQ_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_EQ_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_EQ_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_F_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_F_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_F_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_LE_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_LE_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_LE_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_LT_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_LT_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_LT_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGE_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGE_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGE_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGLE_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGLE_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGLE_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGL_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGL_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGL_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGT_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGT_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_NGT_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_OLE_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_OLE_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_OLE_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_OLT_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_OLT_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_OLT_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_SEQ_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_SEQ_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_SEQ_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_SF_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_SF_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_SF_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_UEQ_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_UEQ_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_UEQ_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_ULE_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_ULE_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_ULE_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_ULT_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_ULT_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_ULT_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_UN_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_UN_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_C_UN_S, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_CmpRxRy16, MIPS_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_CmpiRxImm16, MIPS_INS_CMPI,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_CmpiRxImmX16, MIPS_INS_CMPI,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_DADD, MIPS_INS_DADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DADDi, MIPS_INS_DADDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DADDiu, MIPS_INS_DADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DADDu, MIPS_INS_DADDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DAHI, MIPS_INS_DAHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DALIGN, MIPS_INS_DALIGN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DATI, MIPS_INS_DATI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DAUI, MIPS_INS_DAUI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DBITSWAP, MIPS_INS_DBITSWAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DCLO, MIPS_INS_DCLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DCLO_R6, MIPS_INS_DCLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DCLZ, MIPS_INS_DCLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DCLZ_R6, MIPS_INS_DCLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DDIV, MIPS_INS_DDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DDIVU, MIPS_INS_DDIVU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DERET, MIPS_INS_DERET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0
-#endif
- },
- {
- Mips_DERET_MM, MIPS_INS_DERET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_DEXT, MIPS_INS_DEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DEXTM, MIPS_INS_DEXTM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DEXTU, MIPS_INS_DEXTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DI, MIPS_INS_DI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DINS, MIPS_INS_DINS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DINSM, MIPS_INS_DINSM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DINSU, MIPS_INS_DINSU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DIV, MIPS_INS_DIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DIVU, MIPS_INS_DIVU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DIV_S_B, MIPS_INS_DIV_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DIV_S_D, MIPS_INS_DIV_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DIV_S_H, MIPS_INS_DIV_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DIV_S_W, MIPS_INS_DIV_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DIV_U_B, MIPS_INS_DIV_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DIV_U_D, MIPS_INS_DIV_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DIV_U_H, MIPS_INS_DIV_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DIV_U_W, MIPS_INS_DIV_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DI_MM, MIPS_INS_DI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_DLSA, MIPS_INS_DLSA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0
-#endif
- },
- {
- Mips_DLSA_R6, MIPS_INS_DLSA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMFC0, MIPS_INS_DMFC0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMFC1, MIPS_INS_DMFC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMFC2, MIPS_INS_DMFC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMOD, MIPS_INS_DMOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMODU, MIPS_INS_DMODU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMTC0, MIPS_INS_DMTC0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMTC1, MIPS_INS_DMTC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMTC2, MIPS_INS_DMTC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMUH, MIPS_INS_DMUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMUHU, MIPS_INS_DMUHU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMUL, MIPS_INS_DMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMULT, MIPS_INS_DMULT,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMULTu, MIPS_INS_DMULTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMULU, MIPS_INS_DMULU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DMUL_R6, MIPS_INS_DMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DOTP_S_D, MIPS_INS_DOTP_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DOTP_S_H, MIPS_INS_DOTP_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DOTP_S_W, MIPS_INS_DOTP_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DOTP_U_D, MIPS_INS_DOTP_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DOTP_U_H, MIPS_INS_DOTP_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DOTP_U_W, MIPS_INS_DOTP_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPADD_S_D, MIPS_INS_DPADD_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPADD_S_H, MIPS_INS_DPADD_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPADD_S_W, MIPS_INS_DPADD_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPADD_U_D, MIPS_INS_DPADD_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPADD_U_H, MIPS_INS_DPADD_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPADD_U_W, MIPS_INS_DPADD_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPAQX_SA_W_PH, MIPS_INS_DPAQX_SA,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPAQX_S_W_PH, MIPS_INS_DPAQX_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPAQ_SA_L_W, MIPS_INS_DPAQ_SA,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPAQ_S_W_PH, MIPS_INS_DPAQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPAU_H_QBL, MIPS_INS_DPAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPAU_H_QBR, MIPS_INS_DPAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPAX_W_PH, MIPS_INS_DPAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPA_W_PH, MIPS_INS_DPA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPOP, MIPS_INS_DPOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSQX_SA_W_PH, MIPS_INS_DPSQX_SA,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSQX_S_W_PH, MIPS_INS_DPSQX_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSQ_SA_L_W, MIPS_INS_DPSQ_SA,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSQ_S_W_PH, MIPS_INS_DPSQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSUB_S_D, MIPS_INS_DPSUB_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSUB_S_H, MIPS_INS_DPSUB_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSUB_S_W, MIPS_INS_DPSUB_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSUB_U_D, MIPS_INS_DPSUB_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSUB_U_H, MIPS_INS_DPSUB_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSUB_U_W, MIPS_INS_DPSUB_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSU_H_QBL, MIPS_INS_DPSU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSU_H_QBR, MIPS_INS_DPSU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPSX_W_PH, MIPS_INS_DPSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DPS_W_PH, MIPS_INS_DPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DROTR, MIPS_INS_DROTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DROTR32, MIPS_INS_DROTR32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DROTRV, MIPS_INS_DROTRV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSBH, MIPS_INS_DSBH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSDIV, MIPS_INS_DDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSHD, MIPS_INS_DSHD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSLL, MIPS_INS_DSLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSLL32, MIPS_INS_DSLL32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSLL64_32, MIPS_INS_DSLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSLLV, MIPS_INS_DSLLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSRA, MIPS_INS_DSRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSRA32, MIPS_INS_DSRA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSRAV, MIPS_INS_DSRAV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSRL, MIPS_INS_DSRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSRL32, MIPS_INS_DSRL32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSRLV, MIPS_INS_DSRLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSUB, MIPS_INS_DSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DSUBu, MIPS_INS_DSUBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_DUDIV, MIPS_INS_DDIVU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_DivRxRy16, MIPS_INS_DIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_DivuRxRy16, MIPS_INS_DIVU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_EHB, MIPS_INS_EHB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_EHB_MM, MIPS_INS_EHB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_EI, MIPS_INS_EI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_EI_MM, MIPS_INS_EI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ERET, MIPS_INS_ERET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32, 0 }, 0, 0
-#endif
- },
- {
- Mips_ERET_MM, MIPS_INS_ERET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXT, MIPS_INS_EXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTP, MIPS_INS_EXTP,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTPDP, MIPS_INS_EXTPDP,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPPOS, MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTPDPV, MIPS_INS_EXTPDPV,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPPOS, MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTPV, MIPS_INS_EXTPV,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTRV_RS_W, MIPS_INS_EXTRV_RS,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTRV_R_W, MIPS_INS_EXTRV_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTRV_S_H, MIPS_INS_EXTRV_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTRV_W, MIPS_INS_EXTRV,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTR_RS_W, MIPS_INS_EXTR_RS,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTR_R_W, MIPS_INS_EXTR_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTR_S_H, MIPS_INS_EXTR_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTR_W, MIPS_INS_EXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTS, MIPS_INS_EXTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXTS32, MIPS_INS_EXTS32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_EXT_MM, MIPS_INS_EXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FABS_D32, MIPS_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FABS_D64, MIPS_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FABS_MM, MIPS_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FABS_S, MIPS_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_FABS_S_MM, MIPS_INS_ABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FADD_D, MIPS_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FADD_D32, MIPS_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FADD_D64, MIPS_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FADD_MM, MIPS_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FADD_S, MIPS_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_FADD_S_MM, MIPS_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FADD_W, MIPS_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCAF_D, MIPS_INS_FCAF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCAF_W, MIPS_INS_FCAF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCEQ_D, MIPS_INS_FCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCEQ_W, MIPS_INS_FCEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCLASS_D, MIPS_INS_FCLASS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCLASS_W, MIPS_INS_FCLASS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCLE_D, MIPS_INS_FCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCLE_W, MIPS_INS_FCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCLT_D, MIPS_INS_FCLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCLT_W, MIPS_INS_FCLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCMP_D32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCMP_D32_MM, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCMP_D64, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCMP_S32, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCMP_S32_MM, MIPS_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCNE_D, MIPS_INS_FCNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCNE_W, MIPS_INS_FCNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCOR_D, MIPS_INS_FCOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCOR_W, MIPS_INS_FCOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCUEQ_D, MIPS_INS_FCUEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCUEQ_W, MIPS_INS_FCUEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCULE_D, MIPS_INS_FCULE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCULE_W, MIPS_INS_FCULE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCULT_D, MIPS_INS_FCULT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCULT_W, MIPS_INS_FCULT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCUNE_D, MIPS_INS_FCUNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCUNE_W, MIPS_INS_FCUNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCUN_D, MIPS_INS_FCUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FCUN_W, MIPS_INS_FCUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FDIV_D, MIPS_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FDIV_D32, MIPS_INS_DIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FDIV_D64, MIPS_INS_DIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FDIV_MM, MIPS_INS_DIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FDIV_S, MIPS_INS_DIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_FDIV_S_MM, MIPS_INS_DIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FDIV_W, MIPS_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FEXDO_H, MIPS_INS_FEXDO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FEXDO_W, MIPS_INS_FEXDO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FEXP2_D, MIPS_INS_FEXP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FEXP2_W, MIPS_INS_FEXP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FEXUPL_D, MIPS_INS_FEXUPL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FEXUPL_W, MIPS_INS_FEXUPL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FEXUPR_D, MIPS_INS_FEXUPR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FEXUPR_W, MIPS_INS_FEXUPR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FFINT_S_D, MIPS_INS_FFINT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FFINT_S_W, MIPS_INS_FFINT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FFINT_U_D, MIPS_INS_FFINT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FFINT_U_W, MIPS_INS_FFINT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FFQL_D, MIPS_INS_FFQL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FFQL_W, MIPS_INS_FFQL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FFQR_D, MIPS_INS_FFQR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FFQR_W, MIPS_INS_FFQR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FILL_B, MIPS_INS_FILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FILL_D, MIPS_INS_FILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0
-#endif
- },
- {
- Mips_FILL_H, MIPS_INS_FILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FILL_W, MIPS_INS_FILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FLOG2_D, MIPS_INS_FLOG2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FLOG2_W, MIPS_INS_FLOG2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FLOOR_L_D64, MIPS_INS_FLOOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FLOOR_L_S, MIPS_INS_FLOOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FLOOR_W_D32, MIPS_INS_FLOOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FLOOR_W_D64, MIPS_INS_FLOOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FLOOR_W_MM, MIPS_INS_FLOOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FLOOR_W_S, MIPS_INS_FLOOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_FLOOR_W_S_MM, MIPS_INS_FLOOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMADD_D, MIPS_INS_FMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMADD_W, MIPS_INS_FMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMAX_A_D, MIPS_INS_FMAX_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMAX_A_W, MIPS_INS_FMAX_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMAX_D, MIPS_INS_FMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMAX_W, MIPS_INS_FMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMIN_A_D, MIPS_INS_FMIN_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMIN_A_W, MIPS_INS_FMIN_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMIN_D, MIPS_INS_FMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMIN_W, MIPS_INS_FMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMOV_D32, MIPS_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMOV_D32_MM, MIPS_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMOV_D64, MIPS_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMOV_S, MIPS_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMOV_S_MM, MIPS_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMSUB_D, MIPS_INS_FMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMSUB_W, MIPS_INS_FMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMUL_D, MIPS_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMUL_D32, MIPS_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMUL_D64, MIPS_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMUL_MM, MIPS_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMUL_S, MIPS_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMUL_S_MM, MIPS_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FMUL_W, MIPS_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FNEG_D32, MIPS_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FNEG_D64, MIPS_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FNEG_MM, MIPS_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FNEG_S, MIPS_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_FNEG_S_MM, MIPS_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FRCP_D, MIPS_INS_FRCP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FRCP_W, MIPS_INS_FRCP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FRINT_D, MIPS_INS_FRINT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FRINT_W, MIPS_INS_FRINT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FRSQRT_D, MIPS_INS_FRSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FRSQRT_W, MIPS_INS_FRSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSAF_D, MIPS_INS_FSAF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSAF_W, MIPS_INS_FSAF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSEQ_D, MIPS_INS_FSEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSEQ_W, MIPS_INS_FSEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSLE_D, MIPS_INS_FSLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSLE_W, MIPS_INS_FSLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSLT_D, MIPS_INS_FSLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSLT_W, MIPS_INS_FSLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSNE_D, MIPS_INS_FSNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSNE_W, MIPS_INS_FSNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSOR_D, MIPS_INS_FSOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSOR_W, MIPS_INS_FSOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSQRT_D, MIPS_INS_FSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSQRT_D32, MIPS_INS_SQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSQRT_D64, MIPS_INS_SQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSQRT_MM, MIPS_INS_SQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSQRT_S, MIPS_INS_SQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSQRT_S_MM, MIPS_INS_SQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSQRT_W, MIPS_INS_FSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUB_D, MIPS_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUB_D32, MIPS_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUB_D64, MIPS_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUB_MM, MIPS_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUB_S, MIPS_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUB_S_MM, MIPS_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUB_W, MIPS_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUEQ_D, MIPS_INS_FSUEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUEQ_W, MIPS_INS_FSUEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSULE_D, MIPS_INS_FSULE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSULE_W, MIPS_INS_FSULE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSULT_D, MIPS_INS_FSULT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSULT_W, MIPS_INS_FSULT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUNE_D, MIPS_INS_FSUNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUNE_W, MIPS_INS_FSUNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUN_D, MIPS_INS_FSUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FSUN_W, MIPS_INS_FSUN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FTINT_S_D, MIPS_INS_FTINT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FTINT_S_W, MIPS_INS_FTINT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FTINT_U_D, MIPS_INS_FTINT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FTINT_U_W, MIPS_INS_FTINT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FTQ_H, MIPS_INS_FTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FTQ_W, MIPS_INS_FTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FTRUNC_S_D, MIPS_INS_FTRUNC_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FTRUNC_S_W, MIPS_INS_FTRUNC_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FTRUNC_U_D, MIPS_INS_FTRUNC_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_FTRUNC_U_W, MIPS_INS_FTRUNC_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HADD_S_D, MIPS_INS_HADD_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HADD_S_H, MIPS_INS_HADD_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HADD_S_W, MIPS_INS_HADD_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HADD_U_D, MIPS_INS_HADD_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HADD_U_H, MIPS_INS_HADD_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HADD_U_W, MIPS_INS_HADD_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HSUB_S_D, MIPS_INS_HSUB_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HSUB_S_H, MIPS_INS_HSUB_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HSUB_S_W, MIPS_INS_HSUB_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HSUB_U_D, MIPS_INS_HSUB_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HSUB_U_H, MIPS_INS_HSUB_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_HSUB_U_W, MIPS_INS_HSUB_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVEV_B, MIPS_INS_ILVEV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVEV_D, MIPS_INS_ILVEV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVEV_H, MIPS_INS_ILVEV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVEV_W, MIPS_INS_ILVEV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVL_B, MIPS_INS_ILVL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVL_D, MIPS_INS_ILVL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVL_H, MIPS_INS_ILVL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVL_W, MIPS_INS_ILVL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVOD_B, MIPS_INS_ILVOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVOD_D, MIPS_INS_ILVOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVOD_H, MIPS_INS_ILVOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVOD_W, MIPS_INS_ILVOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVR_B, MIPS_INS_ILVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVR_D, MIPS_INS_ILVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVR_H, MIPS_INS_ILVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ILVR_W, MIPS_INS_ILVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_INS, MIPS_INS_INS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_INSERT_B, MIPS_INS_INSERT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_INSERT_D, MIPS_INS_INSERT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0
-#endif
- },
- {
- Mips_INSERT_H, MIPS_INS_INSERT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_INSERT_W, MIPS_INS_INSERT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_INSV, MIPS_INS_INSV,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_DSPPOS, MIPS_REG_DSPSCOUNT, 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_INSVE_B, MIPS_INS_INSVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_INSVE_D, MIPS_INS_INSVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_INSVE_H, MIPS_INS_INSVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_INSVE_W, MIPS_INS_INSVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_INS_MM, MIPS_INS_INS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_J, MIPS_INS_J,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
-#endif
- },
- {
- Mips_JAL, MIPS_INS_JAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_JALR, MIPS_INS_JALR,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_JALR16_MM, MIPS_INS_JALR,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_JALR64, MIPS_INS_JALR,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_JALRS16_MM, MIPS_INS_JALRS16,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_JALRS_MM, MIPS_INS_JALRS,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_JALR_HB, MIPS_INS_JALR_HB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 1
-#endif
- },
- {
- Mips_JALR_MM, MIPS_INS_JALR,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_JALS_MM, MIPS_INS_JALS,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_JALX, MIPS_INS_JALX,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_JALX_MM, MIPS_INS_JALX,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_JAL_MM, MIPS_INS_JAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_JIALC, MIPS_INS_JIALC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_JIC, MIPS_INS_JIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_JR, MIPS_INS_JR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 1, 1
-#endif
- },
- {
- Mips_JR16_MM, MIPS_INS_JR16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1
-#endif
- },
- {
- Mips_JR64, MIPS_INS_JR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 1, 1
-#endif
- },
- {
- Mips_JRADDIUSP, MIPS_INS_JRADDIUSP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1
-#endif
- },
- {
- Mips_JRC16_MM, MIPS_INS_JRC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1
-#endif
- },
- {
- Mips_JR_HB, MIPS_INS_JR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 1
-#endif
- },
- {
- Mips_JR_HB_R6, MIPS_INS_JR_HB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 1
-#endif
- },
- {
- Mips_JR_MM, MIPS_INS_JR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1
-#endif
- },
- {
- Mips_J_MM, MIPS_INS_J,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_Jal16, MIPS_INS_JAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_JrRa16, MIPS_INS_JR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 1
-#endif
- },
- {
- Mips_JrcRa16, MIPS_INS_JRC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 1
-#endif
- },
- {
- Mips_JrcRx16, MIPS_INS_JRC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 1
-#endif
- },
- {
- Mips_JumpLinkReg16, MIPS_INS_JALRC,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_LB, MIPS_INS_LB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LB64, MIPS_INS_LB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LBU16_MM, MIPS_INS_LBU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LBUX, MIPS_INS_LBUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_LB_MM, MIPS_INS_LB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LBu, MIPS_INS_LBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LBu64, MIPS_INS_LBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LBu_MM, MIPS_INS_LBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LD, MIPS_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDC1, MIPS_INS_LDC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDC164, MIPS_INS_LDC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDC1_MM, MIPS_INS_LDC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDC2, MIPS_INS_LDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDC2_R6, MIPS_INS_LDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDC3, MIPS_INS_LDC3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDI_B, MIPS_INS_LDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDI_D, MIPS_INS_LDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDI_H, MIPS_INS_LDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDI_W, MIPS_INS_LDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDL, MIPS_INS_LDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDPC, MIPS_INS_LDPC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDR, MIPS_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDXC1, MIPS_INS_LDXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, MIPS_GRP_NOTNACL, 0 }, 0, 0
-#endif
- },
- {
- Mips_LDXC164, MIPS_INS_LDXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LD_B, MIPS_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_LD_D, MIPS_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_LD_H, MIPS_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_LD_W, MIPS_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_LEA_ADDiu, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LEA_ADDiu64, MIPS_INS_DADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LEA_ADDiu_MM, MIPS_INS_ADDIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LH, MIPS_INS_LH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LH64, MIPS_INS_LH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LHU16_MM, MIPS_INS_LHU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LHX, MIPS_INS_LHX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_LH_MM, MIPS_INS_LH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LHu, MIPS_INS_LHU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LHu64, MIPS_INS_LHU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LHu_MM, MIPS_INS_LHU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LI16_MM, MIPS_INS_LI16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LL, MIPS_INS_LL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LLD, MIPS_INS_LLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LLD_R6, MIPS_INS_LLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LL_MM, MIPS_INS_LL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LL_R6, MIPS_INS_LL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LSA, MIPS_INS_LSA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_LSA_R6, MIPS_INS_LSA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LUXC1, MIPS_INS_LUXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0
-#endif
- },
- {
- Mips_LUXC164, MIPS_INS_LUXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LUXC1_MM, MIPS_INS_LUXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LUi, MIPS_INS_LUI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LUi64, MIPS_INS_LUI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LUi_MM, MIPS_INS_LUI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LW, MIPS_INS_LW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LW16_MM, MIPS_INS_LW16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LW64, MIPS_INS_LW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWC1, MIPS_INS_LWC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWC1_MM, MIPS_INS_LWC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWC2, MIPS_INS_LWC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWC2_R6, MIPS_INS_LWC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWC3, MIPS_INS_LWC3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWGP_MM, MIPS_INS_LW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWL, MIPS_INS_LWL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWL64, MIPS_INS_LWL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWL_MM, MIPS_INS_LWL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWM16_MM, MIPS_INS_LWM16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWM32_MM, MIPS_INS_LWM32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWPC, MIPS_INS_LWPC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWP_MM, MIPS_INS_LWP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWR, MIPS_INS_LWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWR64, MIPS_INS_LWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWR_MM, MIPS_INS_LWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWSP_MM, MIPS_INS_LW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWUPC, MIPS_INS_LWUPC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWU_MM, MIPS_INS_LWU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWX, MIPS_INS_LWX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWXC1, MIPS_INS_LWXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWXC1_MM, MIPS_INS_LWXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWXS_MM, MIPS_INS_LWXS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LW_MM, MIPS_INS_LW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_LWu, MIPS_INS_LWU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_LbRxRyOffMemX16, MIPS_INS_LB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_LbuRxRyOffMemX16, MIPS_INS_LBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_LhRxRyOffMemX16, MIPS_INS_LH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_LhuRxRyOffMemX16, MIPS_INS_LHU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_LiRxImm16, MIPS_INS_LI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_LiRxImmX16, MIPS_INS_LI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_LwRxPcTcp16, MIPS_INS_LW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_LwRxPcTcpX16, MIPS_INS_LW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_LwRxRyOffMemX16, MIPS_INS_LW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_LwRxSpImmX16, MIPS_INS_LW,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_SP, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADD, MIPS_INS_MADD,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDF_D, MIPS_INS_MADDF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDF_S, MIPS_INS_MADDF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDR_Q_H, MIPS_INS_MADDR_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDR_Q_W, MIPS_INS_MADDR_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDU, MIPS_INS_MADDU,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDU_DSP, MIPS_INS_MADDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDU_MM, MIPS_INS_MADDU,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDV_B, MIPS_INS_MADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDV_D, MIPS_INS_MADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDV_H, MIPS_INS_MADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADDV_W, MIPS_INS_MADDV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADD_D32, MIPS_INS_MADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADD_D32_MM, MIPS_INS_MADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADD_D64, MIPS_INS_MADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADD_DSP, MIPS_INS_MADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADD_MM, MIPS_INS_MADD,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADD_Q_H, MIPS_INS_MADD_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADD_Q_W, MIPS_INS_MADD_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADD_S, MIPS_INS_MADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MADD_S_MM, MIPS_INS_MADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAQ_SA_W_PHL, MIPS_INS_MAQ_SA,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAQ_SA_W_PHR, MIPS_INS_MAQ_SA,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAQ_S_W_PHL, MIPS_INS_MAQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAQ_S_W_PHR, MIPS_INS_MAQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAXA_D, MIPS_INS_MAXA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAXA_S, MIPS_INS_MAXA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAXI_S_B, MIPS_INS_MAXI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAXI_S_D, MIPS_INS_MAXI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAXI_S_H, MIPS_INS_MAXI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAXI_S_W, MIPS_INS_MAXI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAXI_U_B, MIPS_INS_MAXI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAXI_U_D, MIPS_INS_MAXI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAXI_U_H, MIPS_INS_MAXI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAXI_U_W, MIPS_INS_MAXI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_A_B, MIPS_INS_MAX_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_A_D, MIPS_INS_MAX_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_A_H, MIPS_INS_MAX_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_A_W, MIPS_INS_MAX_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_D, MIPS_INS_MAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_S, MIPS_INS_MAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_S_B, MIPS_INS_MAX_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_S_D, MIPS_INS_MAX_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_S_H, MIPS_INS_MAX_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_S_W, MIPS_INS_MAX_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_U_B, MIPS_INS_MAX_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_U_D, MIPS_INS_MAX_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_U_H, MIPS_INS_MAX_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MAX_U_W, MIPS_INS_MAX_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFC0, MIPS_INS_MFC0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFC1, MIPS_INS_MFC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFC1_MM, MIPS_INS_MFC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFC2, MIPS_INS_MFC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFHC1_D32, MIPS_INS_MFHC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFHC1_D64, MIPS_INS_MFHC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFHC1_MM, MIPS_INS_MFHC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFHI, MIPS_INS_MFHI,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFHI16_MM, MIPS_INS_MFHI,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFHI64, MIPS_INS_MFHI,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFHI_DSP, MIPS_INS_MFHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFHI_MM, MIPS_INS_MFHI,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFLO, MIPS_INS_MFLO,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFLO16_MM, MIPS_INS_MFLO,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFLO64, MIPS_INS_MFLO,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFLO_DSP, MIPS_INS_MFLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MFLO_MM, MIPS_INS_MFLO,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MINA_D, MIPS_INS_MINA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MINA_S, MIPS_INS_MINA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MINI_S_B, MIPS_INS_MINI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MINI_S_D, MIPS_INS_MINI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MINI_S_H, MIPS_INS_MINI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MINI_S_W, MIPS_INS_MINI_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MINI_U_B, MIPS_INS_MINI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MINI_U_D, MIPS_INS_MINI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MINI_U_H, MIPS_INS_MINI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MINI_U_W, MIPS_INS_MINI_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_A_B, MIPS_INS_MIN_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_A_D, MIPS_INS_MIN_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_A_H, MIPS_INS_MIN_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_A_W, MIPS_INS_MIN_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_D, MIPS_INS_MIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_S, MIPS_INS_MIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_S_B, MIPS_INS_MIN_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_S_D, MIPS_INS_MIN_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_S_H, MIPS_INS_MIN_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_S_W, MIPS_INS_MIN_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_U_B, MIPS_INS_MIN_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_U_D, MIPS_INS_MIN_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_U_H, MIPS_INS_MIN_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MIN_U_W, MIPS_INS_MIN_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOD, MIPS_INS_MOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MODSUB, MIPS_INS_MODSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MODU, MIPS_INS_MODU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOD_S_B, MIPS_INS_MOD_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOD_S_D, MIPS_INS_MOD_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOD_S_H, MIPS_INS_MOD_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOD_S_W, MIPS_INS_MOD_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOD_U_B, MIPS_INS_MOD_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOD_U_D, MIPS_INS_MOD_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOD_U_H, MIPS_INS_MOD_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOD_U_W, MIPS_INS_MOD_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVE16_MM, MIPS_INS_MOVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVEP_MM, MIPS_INS_MOVEP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVE_V, MIPS_INS_MOVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVF_D32, MIPS_INS_MOVF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVF_D32_MM, MIPS_INS_MOVF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVF_D64, MIPS_INS_MOVF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVF_I, MIPS_INS_MOVF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVF_I64, MIPS_INS_MOVF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_GP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVF_I_MM, MIPS_INS_MOVF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVF_S, MIPS_INS_MOVF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVF_S_MM, MIPS_INS_MOVF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I64_D64, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I64_I, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I64_I64, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I64_S, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_GP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I_D32, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I_D32_MM, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I_D64, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I_I, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I_I64, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I_MM, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I_S, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVN_I_S_MM, MIPS_INS_MOVN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVT_D32, MIPS_INS_MOVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVT_D32_MM, MIPS_INS_MOVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVT_D64, MIPS_INS_MOVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVT_I, MIPS_INS_MOVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVT_I64, MIPS_INS_MOVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_GP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVT_I_MM, MIPS_INS_MOVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVT_S, MIPS_INS_MOVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVT_S_MM, MIPS_INS_MOVT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I64_D64, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I64_I, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I64_I64, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I64_S, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_MIPS64, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I_D32, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I_D32_MM, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I_D64, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I_I, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I_I64, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I_MM, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I_S, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MOVZ_I_S_MM, MIPS_INS_MOVZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUB, MIPS_INS_MSUB,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBF_D, MIPS_INS_MSUBF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBF_S, MIPS_INS_MSUBF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBR_Q_H, MIPS_INS_MSUBR_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBR_Q_W, MIPS_INS_MSUBR_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBU, MIPS_INS_MSUBU,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBU_DSP, MIPS_INS_MSUBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBU_MM, MIPS_INS_MSUBU,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBV_B, MIPS_INS_MSUBV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBV_D, MIPS_INS_MSUBV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBV_H, MIPS_INS_MSUBV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUBV_W, MIPS_INS_MSUBV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUB_D32, MIPS_INS_MSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUB_D32_MM, MIPS_INS_MSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUB_D64, MIPS_INS_MSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUB_DSP, MIPS_INS_MSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUB_MM, MIPS_INS_MSUB,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUB_Q_H, MIPS_INS_MSUB_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUB_Q_W, MIPS_INS_MSUB_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUB_S, MIPS_INS_MSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MSUB_S_MM, MIPS_INS_MSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTC0, MIPS_INS_MTC0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTC1, MIPS_INS_MTC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTC1_MM, MIPS_INS_MTC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTC2, MIPS_INS_MTC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTHC1_D32, MIPS_INS_MTHC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTHC1_D64, MIPS_INS_MTHC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTHC1_MM, MIPS_INS_MTHC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTHI, MIPS_INS_MTHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTHI64, MIPS_INS_MTHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTHI_DSP, MIPS_INS_MTHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTHI_MM, MIPS_INS_MTHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTHLIP, MIPS_INS_MTHLIP,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPPOS, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTLO, MIPS_INS_MTLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTLO64, MIPS_INS_MTLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTLO_DSP, MIPS_INS_MTLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTLO_MM, MIPS_INS_MTLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTM0, MIPS_INS_MTM0,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_MPL0, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTM1, MIPS_INS_MTM1,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_MPL1, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTM2, MIPS_INS_MTM2,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_MPL2, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTP0, MIPS_INS_MTP0,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_P0, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTP1, MIPS_INS_MTP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_P1, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MTP2, MIPS_INS_MTP2,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MUH, MIPS_INS_MUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MUHU, MIPS_INS_MUHU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MUL, MIPS_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULEQ_S_W_PHL, MIPS_INS_MULEQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULEQ_S_W_PHR, MIPS_INS_MULEQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULEU_S_PH_QBL, MIPS_INS_MULEU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULEU_S_PH_QBR, MIPS_INS_MULEU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULQ_RS_PH, MIPS_INS_MULQ_RS,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULQ_RS_W, MIPS_INS_MULQ_RS,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULQ_S_PH, MIPS_INS_MULQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULQ_S_W, MIPS_INS_MULQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULR_Q_H, MIPS_INS_MULR_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULR_Q_W, MIPS_INS_MULR_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULSAQ_S_W_PH, MIPS_INS_MULSAQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULSA_W_PH, MIPS_INS_MULSA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULT, MIPS_INS_MULT,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULTU_DSP, MIPS_INS_MULTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULT_DSP, MIPS_INS_MULT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULT_MM, MIPS_INS_MULT,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULTu, MIPS_INS_MULTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULTu_MM, MIPS_INS_MULTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULU, MIPS_INS_MULU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULV_B, MIPS_INS_MULV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULV_D, MIPS_INS_MULV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULV_H, MIPS_INS_MULV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MULV_W, MIPS_INS_MULV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MUL_MM, MIPS_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_MUL_PH, MIPS_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_MUL_Q_H, MIPS_INS_MUL_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MUL_Q_W, MIPS_INS_MUL_Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_MUL_R6, MIPS_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_MUL_S_PH, MIPS_INS_MUL_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_Mfhi16, MIPS_INS_MFHI,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_HI0, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_Mflo16, MIPS_INS_MFLO,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_LO0, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_Move32R16, MIPS_INS_MOVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_MoveR3216, MIPS_INS_MOVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_NLOC_B, MIPS_INS_NLOC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_NLOC_D, MIPS_INS_NLOC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_NLOC_H, MIPS_INS_NLOC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_NLOC_W, MIPS_INS_NLOC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_NLZC_B, MIPS_INS_NLZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_NLZC_D, MIPS_INS_NLZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_NLZC_H, MIPS_INS_NLZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_NLZC_W, MIPS_INS_NLZC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_NMADD_D32, MIPS_INS_NMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
-#endif
- },
- {
- Mips_NMADD_D32_MM, MIPS_INS_NMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_NMADD_D64, MIPS_INS_NMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
-#endif
- },
- {
- Mips_NMADD_S, MIPS_INS_NMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
-#endif
- },
- {
- Mips_NMADD_S_MM, MIPS_INS_NMADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_NMSUB_D32, MIPS_INS_NMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
-#endif
- },
- {
- Mips_NMSUB_D32_MM, MIPS_INS_NMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_NMSUB_D64, MIPS_INS_NMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
-#endif
- },
- {
- Mips_NMSUB_S, MIPS_INS_NMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
-#endif
- },
- {
- Mips_NMSUB_S_MM, MIPS_INS_NMSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_NOR, MIPS_INS_NOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_NOR64, MIPS_INS_NOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_NORI_B, MIPS_INS_NORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_NOR_MM, MIPS_INS_NOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_NOR_V, MIPS_INS_NOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_NOT16_MM, MIPS_INS_NOT16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_NegRxRy16, MIPS_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_NotRxRy16, MIPS_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_OR, MIPS_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_OR16_MM, MIPS_INS_OR16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_OR64, MIPS_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_ORI_B, MIPS_INS_ORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_OR_MM, MIPS_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_OR_V, MIPS_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ORi, MIPS_INS_ORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_ORi64, MIPS_INS_ORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_ORi_MM, MIPS_INS_ORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_OrRxRxRy16, MIPS_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_PACKRL_PH, MIPS_INS_PACKRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PAUSE, MIPS_INS_PAUSE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_PAUSE_MM, MIPS_INS_PAUSE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCKEV_B, MIPS_INS_PCKEV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCKEV_D, MIPS_INS_PCKEV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCKEV_H, MIPS_INS_PCKEV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCKEV_W, MIPS_INS_PCKEV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCKOD_B, MIPS_INS_PCKOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCKOD_D, MIPS_INS_PCKOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCKOD_H, MIPS_INS_PCKOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCKOD_W, MIPS_INS_PCKOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCNT_B, MIPS_INS_PCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCNT_D, MIPS_INS_PCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCNT_H, MIPS_INS_PCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PCNT_W, MIPS_INS_PCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_PICK_PH, MIPS_INS_PICK,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_DSPCCOND, 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PICK_QB, MIPS_INS_PICK,
-#ifndef CAPSTONE_DIET
- { MIPS_REG_DSPCCOND, 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_POP, MIPS_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECEQU_PH_QBL, MIPS_INS_PRECEQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECEQU_PH_QBLA, MIPS_INS_PRECEQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECEQU_PH_QBR, MIPS_INS_PRECEQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECEQU_PH_QBRA, MIPS_INS_PRECEQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECEQ_W_PHL, MIPS_INS_PRECEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECEQ_W_PHR, MIPS_INS_PRECEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECEU_PH_QBL, MIPS_INS_PRECEU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECEU_PH_QBLA, MIPS_INS_PRECEU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECEU_PH_QBR, MIPS_INS_PRECEU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECEU_PH_QBRA, MIPS_INS_PRECEU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECRQU_S_QB_PH, MIPS_INS_PRECRQU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECRQ_PH_W, MIPS_INS_PRECRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECRQ_QB_PH, MIPS_INS_PRECRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECRQ_RS_PH_W, MIPS_INS_PRECRQ_RS,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECR_QB_PH, MIPS_INS_PRECR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECR_SRA_PH_W, MIPS_INS_PRECR_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_PRECR_SRA_R_PH_W, MIPS_INS_PRECR_SRA_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_PREF, MIPS_INS_PREF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_PREF_MM, MIPS_INS_PREF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_PREF_R6, MIPS_INS_PREF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_PREPEND, MIPS_INS_PREPEND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_RADDU_W_QB, MIPS_INS_RADDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_RDDSP, MIPS_INS_RDDSP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_RDHWR, MIPS_INS_RDHWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_RDHWR64, MIPS_INS_RDHWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_RDHWR_MM, MIPS_INS_RDHWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_REPLV_PH, MIPS_INS_REPLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_REPLV_QB, MIPS_INS_REPLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_REPL_PH, MIPS_INS_REPL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_REPL_QB, MIPS_INS_REPL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_RINT_D, MIPS_INS_RINT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_RINT_S, MIPS_INS_RINT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROTR, MIPS_INS_ROTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROTRV, MIPS_INS_ROTRV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROTRV_MM, MIPS_INS_ROTRV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROTR_MM, MIPS_INS_ROTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROUND_L_D64, MIPS_INS_ROUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROUND_L_S, MIPS_INS_ROUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROUND_W_D32, MIPS_INS_ROUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROUND_W_D64, MIPS_INS_ROUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROUND_W_MM, MIPS_INS_ROUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROUND_W_S, MIPS_INS_ROUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_ROUND_W_S_MM, MIPS_INS_ROUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SAT_S_B, MIPS_INS_SAT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SAT_S_D, MIPS_INS_SAT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SAT_S_H, MIPS_INS_SAT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SAT_S_W, MIPS_INS_SAT_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SAT_U_B, MIPS_INS_SAT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SAT_U_D, MIPS_INS_SAT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SAT_U_H, MIPS_INS_SAT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SAT_U_W, MIPS_INS_SAT_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SB, MIPS_INS_SB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SB16_MM, MIPS_INS_SB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SB64, MIPS_INS_SB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SB_MM, MIPS_INS_SB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SC, MIPS_INS_SC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SCD, MIPS_INS_SCD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SCD_R6, MIPS_INS_SCD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SC_MM, MIPS_INS_SC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SC_R6, MIPS_INS_SC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SD, MIPS_INS_SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDBBP, MIPS_INS_SDBBP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDBBP16_MM, MIPS_INS_SDBBP16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDBBP_MM, MIPS_INS_SDBBP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDBBP_R6, MIPS_INS_SDBBP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDC1, MIPS_INS_SDC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDC164, MIPS_INS_SDC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDC1_MM, MIPS_INS_SDC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDC2, MIPS_INS_SDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDC2_R6, MIPS_INS_SDC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDC3, MIPS_INS_SDC3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDIV, MIPS_INS_DIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDIV_MM, MIPS_INS_DIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDL, MIPS_INS_SDL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDR, MIPS_INS_SDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDXC1, MIPS_INS_SDXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, MIPS_GRP_NOTNACL, 0 }, 0, 0
-#endif
- },
- {
- Mips_SDXC164, MIPS_INS_SDXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SEB, MIPS_INS_SEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SEB64, MIPS_INS_SEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SEB_MM, MIPS_INS_SEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SEH, MIPS_INS_SEH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SEH64, MIPS_INS_SEH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SEH_MM, MIPS_INS_SEH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SELEQZ, MIPS_INS_SELEQZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP32BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SELEQZ64, MIPS_INS_SELEQZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP64BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SELEQZ_D, MIPS_INS_SELEQZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SELEQZ_S, MIPS_INS_SELEQZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SELNEZ, MIPS_INS_SELNEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP32BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SELNEZ64, MIPS_INS_SELNEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP64BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SELNEZ_D, MIPS_INS_SELNEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SELNEZ_S, MIPS_INS_SELNEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SEL_D, MIPS_INS_SEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SEL_S, MIPS_INS_SEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SEQ, MIPS_INS_SEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SEQi, MIPS_INS_SEQI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SH, MIPS_INS_SH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SH16_MM, MIPS_INS_SH16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SH64, MIPS_INS_SH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHF_B, MIPS_INS_SHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHF_H, MIPS_INS_SHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHF_W, MIPS_INS_SHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHILO, MIPS_INS_SHILO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHILOV, MIPS_INS_SHILOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHLLV_PH, MIPS_INS_SHLLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHLLV_QB, MIPS_INS_SHLLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHLLV_S_PH, MIPS_INS_SHLLV_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHLLV_S_W, MIPS_INS_SHLLV_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHLL_PH, MIPS_INS_SHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHLL_QB, MIPS_INS_SHLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHLL_S_PH, MIPS_INS_SHLL_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHLL_S_W, MIPS_INS_SHLL_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRAV_PH, MIPS_INS_SHRAV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRAV_QB, MIPS_INS_SHRAV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRAV_R_PH, MIPS_INS_SHRAV_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRAV_R_QB, MIPS_INS_SHRAV_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRAV_R_W, MIPS_INS_SHRAV_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRA_PH, MIPS_INS_SHRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRA_QB, MIPS_INS_SHRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRA_R_PH, MIPS_INS_SHRA_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRA_R_QB, MIPS_INS_SHRA_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRA_R_W, MIPS_INS_SHRA_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRLV_PH, MIPS_INS_SHRLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRLV_QB, MIPS_INS_SHRLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRL_PH, MIPS_INS_SHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SHRL_QB, MIPS_INS_SHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SH_MM, MIPS_INS_SH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLDI_B, MIPS_INS_SLDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLDI_D, MIPS_INS_SLDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLDI_H, MIPS_INS_SLDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLDI_W, MIPS_INS_SLDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLD_B, MIPS_INS_SLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLD_D, MIPS_INS_SLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLD_H, MIPS_INS_SLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLD_W, MIPS_INS_SLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLL, MIPS_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLL16_MM, MIPS_INS_SLL16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLL64_32, MIPS_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLL64_64, MIPS_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLLI_B, MIPS_INS_SLLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLLI_D, MIPS_INS_SLLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLLI_H, MIPS_INS_SLLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLLI_W, MIPS_INS_SLLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLLV, MIPS_INS_SLLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLLV_MM, MIPS_INS_SLLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLL_B, MIPS_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLL_D, MIPS_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLL_H, MIPS_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLL_MM, MIPS_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLL_W, MIPS_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLT, MIPS_INS_SLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLT64, MIPS_INS_SLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLT_MM, MIPS_INS_SLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLTi, MIPS_INS_SLTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLTi64, MIPS_INS_SLTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLTi_MM, MIPS_INS_SLTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLTiu, MIPS_INS_SLTIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLTiu64, MIPS_INS_SLTIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLTiu_MM, MIPS_INS_SLTIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLTu, MIPS_INS_SLTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLTu64, MIPS_INS_SLTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SLTu_MM, MIPS_INS_SLTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SNE, MIPS_INS_SNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SNEi, MIPS_INS_SNEI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SPLATI_B, MIPS_INS_SPLATI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SPLATI_D, MIPS_INS_SPLATI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SPLATI_H, MIPS_INS_SPLATI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SPLATI_W, MIPS_INS_SPLATI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SPLAT_B, MIPS_INS_SPLAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SPLAT_D, MIPS_INS_SPLAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SPLAT_H, MIPS_INS_SPLAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SPLAT_W, MIPS_INS_SPLAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRA, MIPS_INS_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRAI_B, MIPS_INS_SRAI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRAI_D, MIPS_INS_SRAI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRAI_H, MIPS_INS_SRAI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRAI_W, MIPS_INS_SRAI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRARI_B, MIPS_INS_SRARI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRARI_D, MIPS_INS_SRARI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRARI_H, MIPS_INS_SRARI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRARI_W, MIPS_INS_SRARI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRAR_B, MIPS_INS_SRAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRAR_D, MIPS_INS_SRAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRAR_H, MIPS_INS_SRAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRAR_W, MIPS_INS_SRAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRAV, MIPS_INS_SRAV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRAV_MM, MIPS_INS_SRAV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRA_B, MIPS_INS_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRA_D, MIPS_INS_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRA_H, MIPS_INS_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRA_MM, MIPS_INS_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRA_W, MIPS_INS_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRL, MIPS_INS_SRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRL16_MM, MIPS_INS_SRL16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLI_B, MIPS_INS_SRLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLI_D, MIPS_INS_SRLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLI_H, MIPS_INS_SRLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLI_W, MIPS_INS_SRLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLRI_B, MIPS_INS_SRLRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLRI_D, MIPS_INS_SRLRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLRI_H, MIPS_INS_SRLRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLRI_W, MIPS_INS_SRLRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLR_B, MIPS_INS_SRLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLR_D, MIPS_INS_SRLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLR_H, MIPS_INS_SRLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLR_W, MIPS_INS_SRLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLV, MIPS_INS_SRLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRLV_MM, MIPS_INS_SRLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRL_B, MIPS_INS_SRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRL_D, MIPS_INS_SRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRL_H, MIPS_INS_SRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRL_MM, MIPS_INS_SRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SRL_W, MIPS_INS_SRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SSNOP, MIPS_INS_SSNOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SSNOP_MM, MIPS_INS_SSNOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_ST_B, MIPS_INS_ST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ST_D, MIPS_INS_ST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ST_H, MIPS_INS_ST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_ST_W, MIPS_INS_ST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUB, MIPS_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBQH_PH, MIPS_INS_SUBQH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBQH_R_PH, MIPS_INS_SUBQH_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBQH_R_W, MIPS_INS_SUBQH_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBQH_W, MIPS_INS_SUBQH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBQ_PH, MIPS_INS_SUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBQ_S_PH, MIPS_INS_SUBQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBQ_S_W, MIPS_INS_SUBQ_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBSUS_U_B, MIPS_INS_SUBSUS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBSUS_U_D, MIPS_INS_SUBSUS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBSUS_U_H, MIPS_INS_SUBSUS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBSUS_U_W, MIPS_INS_SUBSUS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBSUU_S_B, MIPS_INS_SUBSUU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBSUU_S_D, MIPS_INS_SUBSUU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBSUU_S_H, MIPS_INS_SUBSUU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBSUU_S_W, MIPS_INS_SUBSUU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBS_S_B, MIPS_INS_SUBS_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBS_S_D, MIPS_INS_SUBS_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBS_S_H, MIPS_INS_SUBS_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBS_S_W, MIPS_INS_SUBS_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBS_U_B, MIPS_INS_SUBS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBS_U_D, MIPS_INS_SUBS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBS_U_H, MIPS_INS_SUBS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBS_U_W, MIPS_INS_SUBS_U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBU16_MM, MIPS_INS_SUBU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBUH_QB, MIPS_INS_SUBUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBUH_R_QB, MIPS_INS_SUBUH_R,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBU_PH, MIPS_INS_SUBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBU_QB, MIPS_INS_SUBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBU_S_PH, MIPS_INS_SUBU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBU_S_QB, MIPS_INS_SUBU_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBVI_B, MIPS_INS_SUBVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBVI_D, MIPS_INS_SUBVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBVI_H, MIPS_INS_SUBVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBVI_W, MIPS_INS_SUBVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBV_B, MIPS_INS_SUBV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBV_D, MIPS_INS_SUBV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBV_H, MIPS_INS_SUBV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBV_W, MIPS_INS_SUBV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUB_MM, MIPS_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBu, MIPS_INS_SUBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUBu_MM, MIPS_INS_SUBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUXC1, MIPS_INS_SUXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUXC164, MIPS_INS_SUXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SUXC1_MM, MIPS_INS_SUXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SW, MIPS_INS_SW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SW16_MM, MIPS_INS_SW16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SW64, MIPS_INS_SW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWC1, MIPS_INS_SWC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWC1_MM, MIPS_INS_SWC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWC2, MIPS_INS_SWC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWC2_R6, MIPS_INS_SWC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWC3, MIPS_INS_SWC3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWL, MIPS_INS_SWL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWL64, MIPS_INS_SWL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWL_MM, MIPS_INS_SWL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWM16_MM, MIPS_INS_SWM16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWM32_MM, MIPS_INS_SWM32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWP_MM, MIPS_INS_SWP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWR, MIPS_INS_SWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWR64, MIPS_INS_SWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWR_MM, MIPS_INS_SWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWSP_MM, MIPS_INS_SW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWXC1, MIPS_INS_SWXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0
-#endif
- },
- {
- Mips_SWXC1_MM, MIPS_INS_SWXC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SW_MM, MIPS_INS_SW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SYNC, MIPS_INS_SYNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0
-#endif
- },
- {
- Mips_SYNCI, MIPS_INS_SYNCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_SYNC_MM, MIPS_INS_SYNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SYSCALL, MIPS_INS_SYSCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_SYSCALL_MM, MIPS_INS_SYSCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_SbRxRyOffMemX16, MIPS_INS_SB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SebRx16, MIPS_INS_SEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SehRx16, MIPS_INS_SEH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_ShRxRyOffMemX16, MIPS_INS_SH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SllX16, MIPS_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SllvRxRy16, MIPS_INS_SLLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SltRxRy16, MIPS_INS_SLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SltiRxImm16, MIPS_INS_SLTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SltiRxImmX16, MIPS_INS_SLTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SltiuRxImm16, MIPS_INS_SLTIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SltiuRxImmX16, MIPS_INS_SLTIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SltuRxRy16, MIPS_INS_SLTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SraX16, MIPS_INS_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SravRxRy16, MIPS_INS_SRAV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SrlX16, MIPS_INS_SRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SrlvRxRy16, MIPS_INS_SRLV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SubuRxRyRz16, MIPS_INS_SUBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SwRxRyOffMemX16, MIPS_INS_SW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_SwRxSpImmX16, MIPS_INS_SW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
- {
- Mips_TEQ, MIPS_INS_TEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_TEQI, MIPS_INS_TEQI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_TEQI_MM, MIPS_INS_TEQI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TEQ_MM, MIPS_INS_TEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TGE, MIPS_INS_TGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_TGEI, MIPS_INS_TGEI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_TGEIU, MIPS_INS_TGEIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_TGEIU_MM, MIPS_INS_TGEIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TGEI_MM, MIPS_INS_TGEI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TGEU, MIPS_INS_TGEU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_TGEU_MM, MIPS_INS_TGEU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TGE_MM, MIPS_INS_TGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLBP, MIPS_INS_TLBP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLBP_MM, MIPS_INS_TLBP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLBR, MIPS_INS_TLBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLBR_MM, MIPS_INS_TLBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLBWI, MIPS_INS_TLBWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLBWI_MM, MIPS_INS_TLBWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLBWR, MIPS_INS_TLBWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLBWR_MM, MIPS_INS_TLBWR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLT, MIPS_INS_TLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLTI, MIPS_INS_TLTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLTIU_MM, MIPS_INS_TLTIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLTI_MM, MIPS_INS_TLTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLTU, MIPS_INS_TLTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLTU_MM, MIPS_INS_TLTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TLT_MM, MIPS_INS_TLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TNE, MIPS_INS_TNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_TNEI, MIPS_INS_TNEI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_TNEI_MM, MIPS_INS_TNEI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TNE_MM, MIPS_INS_TNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TRUNC_L_D64, MIPS_INS_TRUNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_TRUNC_L_S, MIPS_INS_TRUNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_TRUNC_W_D32, MIPS_INS_TRUNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_TRUNC_W_D64, MIPS_INS_TRUNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0
-#endif
- },
- {
- Mips_TRUNC_W_MM, MIPS_INS_TRUNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TRUNC_W_S, MIPS_INS_TRUNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
-#endif
- },
- {
- Mips_TRUNC_W_S_MM, MIPS_INS_TRUNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_TTLTIU, MIPS_INS_TLTIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_UDIV, MIPS_INS_DIVU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
-#endif
- },
- {
- Mips_UDIV_MM, MIPS_INS_DIVU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_V3MULU, MIPS_INS_V3MULU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_VMM0, MIPS_INS_VMM0,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_MPL0, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_VMULU, MIPS_INS_VMULU,
-#ifndef CAPSTONE_DIET
- { 0 }, { MIPS_REG_MPL1, MIPS_REG_MPL2, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_VSHF_B, MIPS_INS_VSHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_VSHF_D, MIPS_INS_VSHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_VSHF_H, MIPS_INS_VSHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_VSHF_W, MIPS_INS_VSHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_WAIT, MIPS_INS_WAIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_WAIT_MM, MIPS_INS_WAIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_WRDSP, MIPS_INS_WRDSP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
-#endif
- },
- {
- Mips_WSBH, MIPS_INS_WSBH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
-#endif
- },
- {
- Mips_WSBH_MM, MIPS_INS_WSBH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_XOR, MIPS_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_XOR16_MM, MIPS_INS_XOR16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_XOR64, MIPS_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_XORI_B, MIPS_INS_XORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_XOR_MM, MIPS_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_XOR_V, MIPS_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
-#endif
- },
- {
- Mips_XORi, MIPS_INS_XORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_XORi64, MIPS_INS_XORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
-#endif
- },
- {
- Mips_XORi_MM, MIPS_INS_XORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
-#endif
- },
- {
- Mips_XorRxRxRy16, MIPS_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
-#endif
- },
+#include "MipsMappingInsn.inc"
};
static insn_map alias_insns[] = {
diff --git a/arch/Mips/MipsMappingInsn.inc b/arch/Mips/MipsMappingInsn.inc
new file mode 100644
index 0000000..94de4d8
--- /dev/null
+++ b/arch/Mips/MipsMappingInsn.inc
@@ -0,0 +1,9315 @@
+// This is auto-gen data for Capstone engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{
+ Mips_ABSQ_S_PH, MIPS_INS_ABSQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ABSQ_S_QB, MIPS_INS_ABSQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ABSQ_S_W, MIPS_INS_ABSQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADD, MIPS_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDIUPC, MIPS_INS_ADDIUPC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDIUPC_MM, MIPS_INS_ADDIUPC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDIUR1SP_MM, MIPS_INS_ADDIUR1SP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDIUR2_MM, MIPS_INS_ADDIUR2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDIUS5_MM, MIPS_INS_ADDIUS5,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDIUSP_MM, MIPS_INS_ADDIUSP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDQH_PH, MIPS_INS_ADDQH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDQH_R_PH, MIPS_INS_ADDQH_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDQH_R_W, MIPS_INS_ADDQH_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDQH_W, MIPS_INS_ADDQH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDQ_PH, MIPS_INS_ADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDQ_S_PH, MIPS_INS_ADDQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDQ_S_W, MIPS_INS_ADDQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDSC, MIPS_INS_ADDSC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPCARRY, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_A_B, MIPS_INS_ADDS_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_A_D, MIPS_INS_ADDS_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_A_H, MIPS_INS_ADDS_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_A_W, MIPS_INS_ADDS_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_S_B, MIPS_INS_ADDS_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_S_D, MIPS_INS_ADDS_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_S_H, MIPS_INS_ADDS_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_S_W, MIPS_INS_ADDS_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_U_B, MIPS_INS_ADDS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_U_D, MIPS_INS_ADDS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_U_H, MIPS_INS_ADDS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDS_U_W, MIPS_INS_ADDS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDU16_MM, MIPS_INS_ADDU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDUH_QB, MIPS_INS_ADDUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDUH_R_QB, MIPS_INS_ADDUH_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDU_PH, MIPS_INS_ADDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDU_QB, MIPS_INS_ADDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDU_S_PH, MIPS_INS_ADDU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDU_S_QB, MIPS_INS_ADDU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDVI_B, MIPS_INS_ADDVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDVI_D, MIPS_INS_ADDVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDVI_H, MIPS_INS_ADDVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDVI_W, MIPS_INS_ADDVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDV_B, MIPS_INS_ADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDV_D, MIPS_INS_ADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDV_H, MIPS_INS_ADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDV_W, MIPS_INS_ADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDWC, MIPS_INS_ADDWC,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_DSPCARRY, 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADD_A_B, MIPS_INS_ADD_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADD_A_D, MIPS_INS_ADD_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADD_A_H, MIPS_INS_ADD_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADD_A_W, MIPS_INS_ADD_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADD_MM, MIPS_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDi, MIPS_INS_ADDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDi_MM, MIPS_INS_ADDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDiu, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDiu_MM, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDu, MIPS_INS_ADDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ADDu_MM, MIPS_INS_ADDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ALIGN, MIPS_INS_ALIGN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ALUIPC, MIPS_INS_ALUIPC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AND, MIPS_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AND16_MM, MIPS_INS_AND16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AND64, MIPS_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ANDI16_MM, MIPS_INS_ANDI16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ANDI_B, MIPS_INS_ANDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AND_MM, MIPS_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AND_V, MIPS_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ANDi, MIPS_INS_ANDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ANDi64, MIPS_INS_ANDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ANDi_MM, MIPS_INS_ANDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_APPEND, MIPS_INS_APPEND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ASUB_S_B, MIPS_INS_ASUB_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ASUB_S_D, MIPS_INS_ASUB_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ASUB_S_H, MIPS_INS_ASUB_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ASUB_S_W, MIPS_INS_ASUB_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ASUB_U_B, MIPS_INS_ASUB_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ASUB_U_D, MIPS_INS_ASUB_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ASUB_U_H, MIPS_INS_ASUB_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ASUB_U_W, MIPS_INS_ASUB_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AUI, MIPS_INS_AUI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AUIPC, MIPS_INS_AUIPC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVER_S_B, MIPS_INS_AVER_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVER_S_D, MIPS_INS_AVER_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVER_S_H, MIPS_INS_AVER_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVER_S_W, MIPS_INS_AVER_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVER_U_B, MIPS_INS_AVER_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVER_U_D, MIPS_INS_AVER_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVER_U_H, MIPS_INS_AVER_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVER_U_W, MIPS_INS_AVER_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVE_S_B, MIPS_INS_AVE_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVE_S_D, MIPS_INS_AVE_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVE_S_H, MIPS_INS_AVE_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVE_S_W, MIPS_INS_AVE_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVE_U_B, MIPS_INS_AVE_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVE_U_D, MIPS_INS_AVE_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVE_U_H, MIPS_INS_AVE_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AVE_U_W, MIPS_INS_AVE_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AddiuRxImmX16, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AddiuRxPcImmX16, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AddiuRxRxImm16, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AddiuRxRxImmX16, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AddiuRxRyOffMemX16, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AddiuSpImm16, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_SP, 0 }, { MIPS_REG_SP, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AddiuSpImmX16, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_SP, 0 }, { MIPS_REG_SP, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AdduRxRyRz16, MIPS_INS_ADDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_AndRxRxRy16, MIPS_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_B16_MM, MIPS_INS_B16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BADDu, MIPS_INS_BADDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BAL, MIPS_INS_BAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BALC, MIPS_INS_BALC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BALIGN, MIPS_INS_BALIGN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BBIT0, MIPS_INS_BBIT0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_CNMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BBIT032, MIPS_INS_BBIT032,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_CNMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BBIT1, MIPS_INS_BBIT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_CNMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BBIT132, MIPS_INS_BBIT132,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_CNMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC, MIPS_INS_BC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC0F, MIPS_INS_BC0F,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC0FL, MIPS_INS_BC0FL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC0T, MIPS_INS_BC0T,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC0TL, MIPS_INS_BC0TL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC1EQZ, MIPS_INS_BC1EQZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC1F, MIPS_INS_BC1F,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC1FL, MIPS_INS_BC1FL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC1F_MM, MIPS_INS_BC1F,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC1NEZ, MIPS_INS_BC1NEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC1T, MIPS_INS_BC1T,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC1TL, MIPS_INS_BC1TL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC1T_MM, MIPS_INS_BC1T,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC2EQZ, MIPS_INS_BC2EQZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC2F, MIPS_INS_BC2F,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC2FL, MIPS_INS_BC2FL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC2NEZ, MIPS_INS_BC2NEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC2T, MIPS_INS_BC2T,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC2TL, MIPS_INS_BC2TL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC3F, MIPS_INS_BC3F,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC3FL, MIPS_INS_BC3FL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC3T, MIPS_INS_BC3T,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BC3TL, MIPS_INS_BC3TL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BCLRI_B, MIPS_INS_BCLRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BCLRI_D, MIPS_INS_BCLRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BCLRI_H, MIPS_INS_BCLRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BCLRI_W, MIPS_INS_BCLRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BCLR_B, MIPS_INS_BCLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BCLR_D, MIPS_INS_BCLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BCLR_H, MIPS_INS_BCLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BCLR_W, MIPS_INS_BCLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BEQ, MIPS_INS_BEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BEQ64, MIPS_INS_BEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BEQC, MIPS_INS_BEQC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BEQL, MIPS_INS_BEQL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BEQZ16_MM, MIPS_INS_BEQZ16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BEQZALC, MIPS_INS_BEQZALC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BEQZC, MIPS_INS_BEQZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BEQZC_MM, MIPS_INS_BEQZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BEQ_MM, MIPS_INS_BEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGEC, MIPS_INS_BGEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGEUC, MIPS_INS_BGEUC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGEZ, MIPS_INS_BGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGEZ64, MIPS_INS_BGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGEZAL, MIPS_INS_BGEZAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BGEZALC, MIPS_INS_BGEZALC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGEZALL, MIPS_INS_BGEZALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BGEZALS_MM, MIPS_INS_BGEZALS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BGEZAL_MM, MIPS_INS_BGEZAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BGEZC, MIPS_INS_BGEZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGEZL, MIPS_INS_BGEZL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGEZ_MM, MIPS_INS_BGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGTZ, MIPS_INS_BGTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGTZ64, MIPS_INS_BGTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGTZALC, MIPS_INS_BGTZALC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGTZC, MIPS_INS_BGTZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGTZL, MIPS_INS_BGTZL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BGTZ_MM, MIPS_INS_BGTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BINSLI_B, MIPS_INS_BINSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSLI_D, MIPS_INS_BINSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSLI_H, MIPS_INS_BINSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSLI_W, MIPS_INS_BINSLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSL_B, MIPS_INS_BINSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSL_D, MIPS_INS_BINSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSL_H, MIPS_INS_BINSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSL_W, MIPS_INS_BINSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSRI_B, MIPS_INS_BINSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSRI_D, MIPS_INS_BINSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSRI_H, MIPS_INS_BINSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSRI_W, MIPS_INS_BINSRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSR_B, MIPS_INS_BINSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSR_D, MIPS_INS_BINSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSR_H, MIPS_INS_BINSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BINSR_W, MIPS_INS_BINSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BITREV, MIPS_INS_BITREV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BITSWAP, MIPS_INS_BITSWAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BLEZ, MIPS_INS_BLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLEZ64, MIPS_INS_BLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLEZALC, MIPS_INS_BLEZALC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLEZC, MIPS_INS_BLEZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLEZL, MIPS_INS_BLEZL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLEZ_MM, MIPS_INS_BLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLTC, MIPS_INS_BLTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLTUC, MIPS_INS_BLTUC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLTZ, MIPS_INS_BLTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLTZ64, MIPS_INS_BLTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLTZAL, MIPS_INS_BLTZAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BLTZALC, MIPS_INS_BLTZALC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLTZALL, MIPS_INS_BLTZALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BLTZALS_MM, MIPS_INS_BLTZALS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BLTZAL_MM, MIPS_INS_BLTZAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BLTZC, MIPS_INS_BLTZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLTZL, MIPS_INS_BLTZL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BLTZ_MM, MIPS_INS_BLTZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BMNZI_B, MIPS_INS_BMNZI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BMNZ_V, MIPS_INS_BMNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BMZI_B, MIPS_INS_BMZI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BMZ_V, MIPS_INS_BMZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BNE, MIPS_INS_BNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNE64, MIPS_INS_BNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNEC, MIPS_INS_BNEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNEGI_B, MIPS_INS_BNEGI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BNEGI_D, MIPS_INS_BNEGI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BNEGI_H, MIPS_INS_BNEGI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BNEGI_W, MIPS_INS_BNEGI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BNEG_B, MIPS_INS_BNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BNEG_D, MIPS_INS_BNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BNEG_H, MIPS_INS_BNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BNEG_W, MIPS_INS_BNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BNEL, MIPS_INS_BNEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNEZ16_MM, MIPS_INS_BNEZ16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNEZALC, MIPS_INS_BNEZALC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNEZC, MIPS_INS_BNEZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNEZC_MM, MIPS_INS_BNEZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNE_MM, MIPS_INS_BNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNVC, MIPS_INS_BNVC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNZ_B, MIPS_INS_BNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNZ_D, MIPS_INS_BNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNZ_H, MIPS_INS_BNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNZ_V, MIPS_INS_BNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BNZ_W, MIPS_INS_BNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BOVC, MIPS_INS_BOVC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BPOSGE32, MIPS_INS_BPOSGE32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BREAK, MIPS_INS_BREAK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BREAK16_MM, MIPS_INS_BREAK16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BREAK_MM, MIPS_INS_BREAK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BSELI_B, MIPS_INS_BSELI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BSEL_V, MIPS_INS_BSEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BSETI_B, MIPS_INS_BSETI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BSETI_D, MIPS_INS_BSETI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BSETI_H, MIPS_INS_BSETI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BSETI_W, MIPS_INS_BSETI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BSET_B, MIPS_INS_BSET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BSET_D, MIPS_INS_BSET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BSET_H, MIPS_INS_BSET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BSET_W, MIPS_INS_BSET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_BZ_B, MIPS_INS_BZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BZ_D, MIPS_INS_BZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BZ_H, MIPS_INS_BZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BZ_V, MIPS_INS_BZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BZ_W, MIPS_INS_BZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MSA, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BeqzRxImm16, MIPS_INS_BEQZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BeqzRxImmX16, MIPS_INS_BEQZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
+#endif
+},
+{
+ Mips_Bimm16, MIPS_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BimmX16, MIPS_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BnezRxImm16, MIPS_INS_BNEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BnezRxImmX16, MIPS_INS_BNEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
+#endif
+},
+{
+ Mips_Break16, MIPS_INS_BREAK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_Bteqz16, MIPS_INS_BTEQZ,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BteqzX16, MIPS_INS_BTEQZ,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
+#endif
+},
+{
+ Mips_Btnez16, MIPS_INS_BTNEZ,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
+#endif
+},
+{
+ Mips_BtnezX16, MIPS_INS_BTNEZ,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_T8, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 0
+#endif
+},
+{
+ Mips_CACHE, MIPS_INS_CACHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CACHE_MM, MIPS_INS_CACHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CACHE_R6, MIPS_INS_CACHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEIL_L_D64, MIPS_INS_CEIL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEIL_L_S, MIPS_INS_CEIL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEIL_W_D32, MIPS_INS_CEIL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEIL_W_D64, MIPS_INS_CEIL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEIL_W_MM, MIPS_INS_CEIL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEIL_W_S, MIPS_INS_CEIL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEIL_W_S_MM, MIPS_INS_CEIL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEQI_B, MIPS_INS_CEQI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEQI_D, MIPS_INS_CEQI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEQI_H, MIPS_INS_CEQI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEQI_W, MIPS_INS_CEQI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEQ_B, MIPS_INS_CEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEQ_D, MIPS_INS_CEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEQ_H, MIPS_INS_CEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CEQ_W, MIPS_INS_CEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CFC1, MIPS_INS_CFC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CFC1_MM, MIPS_INS_CFC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CFCMSA, MIPS_INS_CFCMSA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CINS, MIPS_INS_CINS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CINS32, MIPS_INS_CINS32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLASS_D, MIPS_INS_CLASS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLASS_S, MIPS_INS_CLASS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLEI_S_B, MIPS_INS_CLEI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLEI_S_D, MIPS_INS_CLEI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLEI_S_H, MIPS_INS_CLEI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLEI_S_W, MIPS_INS_CLEI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLEI_U_B, MIPS_INS_CLEI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLEI_U_D, MIPS_INS_CLEI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLEI_U_H, MIPS_INS_CLEI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLEI_U_W, MIPS_INS_CLEI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLE_S_B, MIPS_INS_CLE_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLE_S_D, MIPS_INS_CLE_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLE_S_H, MIPS_INS_CLE_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLE_S_W, MIPS_INS_CLE_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLE_U_B, MIPS_INS_CLE_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLE_U_D, MIPS_INS_CLE_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLE_U_H, MIPS_INS_CLE_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLE_U_W, MIPS_INS_CLE_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLO, MIPS_INS_CLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLO_MM, MIPS_INS_CLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLO_R6, MIPS_INS_CLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLTI_S_B, MIPS_INS_CLTI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLTI_S_D, MIPS_INS_CLTI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLTI_S_H, MIPS_INS_CLTI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLTI_S_W, MIPS_INS_CLTI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLTI_U_B, MIPS_INS_CLTI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLTI_U_D, MIPS_INS_CLTI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLTI_U_H, MIPS_INS_CLTI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLTI_U_W, MIPS_INS_CLTI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLT_S_B, MIPS_INS_CLT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLT_S_D, MIPS_INS_CLT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLT_S_H, MIPS_INS_CLT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLT_S_W, MIPS_INS_CLT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLT_U_B, MIPS_INS_CLT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLT_U_D, MIPS_INS_CLT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLT_U_H, MIPS_INS_CLT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLT_U_W, MIPS_INS_CLT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLZ, MIPS_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLZ_MM, MIPS_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CLZ_R6, MIPS_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMPGDU_EQ_QB, MIPS_INS_CMPGDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMPGDU_LE_QB, MIPS_INS_CMPGDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMPGDU_LT_QB, MIPS_INS_CMPGDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMPGU_EQ_QB, MIPS_INS_CMPGU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMPGU_LE_QB, MIPS_INS_CMPGU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMPGU_LT_QB, MIPS_INS_CMPGU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMPU_EQ_QB, MIPS_INS_CMPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMPU_LE_QB, MIPS_INS_CMPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMPU_LT_QB, MIPS_INS_CMPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_EQ_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_EQ_PH, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_EQ_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_F_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_F_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_LE_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_LE_PH, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_LE_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_LT_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_LT_PH, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPCCOND, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_LT_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SAF_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SAF_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SEQ_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SEQ_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SLE_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SLE_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SLT_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SLT_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SUEQ_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SUEQ_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SULE_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SULE_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SULT_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SULT_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SUN_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_SUN_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_UEQ_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_UEQ_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_ULE_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_ULE_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_ULT_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_ULT_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_UN_D, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CMP_UN_S, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_COPY_S_B, MIPS_INS_COPY_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_COPY_S_D, MIPS_INS_COPY_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0
+#endif
+},
+{
+ Mips_COPY_S_H, MIPS_INS_COPY_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_COPY_S_W, MIPS_INS_COPY_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_COPY_U_B, MIPS_INS_COPY_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_COPY_U_D, MIPS_INS_COPY_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0
+#endif
+},
+{
+ Mips_COPY_U_H, MIPS_INS_COPY_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_COPY_U_W, MIPS_INS_COPY_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CTC1, MIPS_INS_CTC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CTC1_MM, MIPS_INS_CTC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CTCMSA, MIPS_INS_CTCMSA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_D32_S, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_D32_W, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_D32_W_MM, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_D64_L, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_D64_S, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_D64_W, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_D_S_MM, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_L_D64, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_L_D64_MM, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_L_S, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_L_S_MM, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_S_D32, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_S_D32_MM, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_S_D64, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_S_L, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_S_W, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_S_W_MM, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_W_D32, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_W_D64, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_W_MM, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_W_S, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CVT_W_S_MM, MIPS_INS_CVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_EQ_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_EQ_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_EQ_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_F_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_F_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_F_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_LE_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_LE_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_LE_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_LT_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_LT_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_LT_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGE_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGE_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGE_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGLE_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGLE_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGLE_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGL_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGL_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGL_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGT_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGT_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_NGT_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_OLE_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_OLE_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_OLE_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_OLT_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_OLT_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_OLT_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_SEQ_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_SEQ_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_SEQ_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_SF_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_SF_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_SF_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_UEQ_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_UEQ_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_UEQ_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_ULE_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_ULE_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_ULE_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_ULT_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_ULT_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_ULT_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_UN_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_UN_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_C_UN_S, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CmpRxRy16, MIPS_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CmpiRxImm16, MIPS_INS_CMPI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_CmpiRxImmX16, MIPS_INS_CMPI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DADD, MIPS_INS_DADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DADDi, MIPS_INS_DADDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DADDiu, MIPS_INS_DADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DADDu, MIPS_INS_DADDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DAHI, MIPS_INS_DAHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DALIGN, MIPS_INS_DALIGN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DATI, MIPS_INS_DATI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DAUI, MIPS_INS_DAUI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DBITSWAP, MIPS_INS_DBITSWAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DCLO, MIPS_INS_DCLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DCLO_R6, MIPS_INS_DCLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DCLZ, MIPS_INS_DCLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DCLZ_R6, MIPS_INS_DCLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DDIV, MIPS_INS_DDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DDIVU, MIPS_INS_DDIVU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DERET, MIPS_INS_DERET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DERET_MM, MIPS_INS_DERET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DEXT, MIPS_INS_DEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DEXTM, MIPS_INS_DEXTM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DEXTU, MIPS_INS_DEXTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DI, MIPS_INS_DI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DINS, MIPS_INS_DINS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DINSM, MIPS_INS_DINSM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DINSU, MIPS_INS_DINSU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DIV, MIPS_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DIVU, MIPS_INS_DIVU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DIV_S_B, MIPS_INS_DIV_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DIV_S_D, MIPS_INS_DIV_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DIV_S_H, MIPS_INS_DIV_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DIV_S_W, MIPS_INS_DIV_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DIV_U_B, MIPS_INS_DIV_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DIV_U_D, MIPS_INS_DIV_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DIV_U_H, MIPS_INS_DIV_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DIV_U_W, MIPS_INS_DIV_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DI_MM, MIPS_INS_DI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DLSA, MIPS_INS_DLSA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DLSA_R6, MIPS_INS_DLSA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMFC0, MIPS_INS_DMFC0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMFC1, MIPS_INS_DMFC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMFC2, MIPS_INS_DMFC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMOD, MIPS_INS_DMOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMODU, MIPS_INS_DMODU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMTC0, MIPS_INS_DMTC0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMTC1, MIPS_INS_DMTC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMTC2, MIPS_INS_DMTC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS64, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMUH, MIPS_INS_DMUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMUHU, MIPS_INS_DMUHU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMUL, MIPS_INS_DMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMULT, MIPS_INS_DMULT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMULTu, MIPS_INS_DMULTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMULU, MIPS_INS_DMULU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DMUL_R6, MIPS_INS_DMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DOTP_S_D, MIPS_INS_DOTP_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DOTP_S_H, MIPS_INS_DOTP_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DOTP_S_W, MIPS_INS_DOTP_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DOTP_U_D, MIPS_INS_DOTP_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DOTP_U_H, MIPS_INS_DOTP_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DOTP_U_W, MIPS_INS_DOTP_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPADD_S_D, MIPS_INS_DPADD_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPADD_S_H, MIPS_INS_DPADD_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPADD_S_W, MIPS_INS_DPADD_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPADD_U_D, MIPS_INS_DPADD_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPADD_U_H, MIPS_INS_DPADD_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPADD_U_W, MIPS_INS_DPADD_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPAQX_SA_W_PH, MIPS_INS_DPAQX_SA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPAQX_S_W_PH, MIPS_INS_DPAQX_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPAQ_SA_L_W, MIPS_INS_DPAQ_SA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPAQ_S_W_PH, MIPS_INS_DPAQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPAU_H_QBL, MIPS_INS_DPAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPAU_H_QBR, MIPS_INS_DPAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPAX_W_PH, MIPS_INS_DPAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPA_W_PH, MIPS_INS_DPA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPOP, MIPS_INS_DPOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSQX_SA_W_PH, MIPS_INS_DPSQX_SA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSQX_S_W_PH, MIPS_INS_DPSQX_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSQ_SA_L_W, MIPS_INS_DPSQ_SA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSQ_S_W_PH, MIPS_INS_DPSQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSUB_S_D, MIPS_INS_DPSUB_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSUB_S_H, MIPS_INS_DPSUB_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSUB_S_W, MIPS_INS_DPSUB_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSUB_U_D, MIPS_INS_DPSUB_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSUB_U_H, MIPS_INS_DPSUB_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSUB_U_W, MIPS_INS_DPSUB_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSU_H_QBL, MIPS_INS_DPSU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSU_H_QBR, MIPS_INS_DPSU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPSX_W_PH, MIPS_INS_DPSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DPS_W_PH, MIPS_INS_DPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DROTR, MIPS_INS_DROTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DROTR32, MIPS_INS_DROTR32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DROTRV, MIPS_INS_DROTRV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSBH, MIPS_INS_DSBH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSDIV, MIPS_INS_DDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSHD, MIPS_INS_DSHD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSLL, MIPS_INS_DSLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSLL32, MIPS_INS_DSLL32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSLL64_32, MIPS_INS_DSLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSLLV, MIPS_INS_DSLLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSRA, MIPS_INS_DSRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSRA32, MIPS_INS_DSRA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSRAV, MIPS_INS_DSRAV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSRL, MIPS_INS_DSRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSRL32, MIPS_INS_DSRL32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSRLV, MIPS_INS_DSRLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSUB, MIPS_INS_DSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DSUBu, MIPS_INS_DSUBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DUDIV, MIPS_INS_DDIVU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DivRxRy16, MIPS_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_DivuRxRy16, MIPS_INS_DIVU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EHB, MIPS_INS_EHB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EHB_MM, MIPS_INS_EHB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EI, MIPS_INS_EI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EI_MM, MIPS_INS_EI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ERET, MIPS_INS_ERET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ERET_MM, MIPS_INS_ERET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXT, MIPS_INS_EXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTP, MIPS_INS_EXTP,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTPDP, MIPS_INS_EXTPDP,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPPOS, MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTPDPV, MIPS_INS_EXTPDPV,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPPOS, MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTPV, MIPS_INS_EXTPV,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_DSPPOS, 0 }, { MIPS_REG_DSPEFI, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTRV_RS_W, MIPS_INS_EXTRV_RS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTRV_R_W, MIPS_INS_EXTRV_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTRV_S_H, MIPS_INS_EXTRV_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTRV_W, MIPS_INS_EXTRV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTR_RS_W, MIPS_INS_EXTR_RS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTR_R_W, MIPS_INS_EXTR_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTR_S_H, MIPS_INS_EXTR_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTR_W, MIPS_INS_EXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG23, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTS, MIPS_INS_EXTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXTS32, MIPS_INS_EXTS32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_EXT_MM, MIPS_INS_EXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FABS_D32, MIPS_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FABS_D64, MIPS_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FABS_MM, MIPS_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FABS_S, MIPS_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FABS_S_MM, MIPS_INS_ABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FADD_D, MIPS_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FADD_D32, MIPS_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FADD_D64, MIPS_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FADD_MM, MIPS_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FADD_S, MIPS_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FADD_S_MM, MIPS_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FADD_W, MIPS_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCAF_D, MIPS_INS_FCAF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCAF_W, MIPS_INS_FCAF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCEQ_D, MIPS_INS_FCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCEQ_W, MIPS_INS_FCEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCLASS_D, MIPS_INS_FCLASS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCLASS_W, MIPS_INS_FCLASS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCLE_D, MIPS_INS_FCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCLE_W, MIPS_INS_FCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCLT_D, MIPS_INS_FCLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCLT_W, MIPS_INS_FCLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCMP_D32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCMP_D32_MM, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCMP_D64, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCMP_S32, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCMP_S32_MM, MIPS_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_FCC0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCNE_D, MIPS_INS_FCNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCNE_W, MIPS_INS_FCNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCOR_D, MIPS_INS_FCOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCOR_W, MIPS_INS_FCOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCUEQ_D, MIPS_INS_FCUEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCUEQ_W, MIPS_INS_FCUEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCULE_D, MIPS_INS_FCULE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCULE_W, MIPS_INS_FCULE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCULT_D, MIPS_INS_FCULT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCULT_W, MIPS_INS_FCULT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCUNE_D, MIPS_INS_FCUNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCUNE_W, MIPS_INS_FCUNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCUN_D, MIPS_INS_FCUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FCUN_W, MIPS_INS_FCUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FDIV_D, MIPS_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FDIV_D32, MIPS_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FDIV_D64, MIPS_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FDIV_MM, MIPS_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FDIV_S, MIPS_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FDIV_S_MM, MIPS_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FDIV_W, MIPS_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FEXDO_H, MIPS_INS_FEXDO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FEXDO_W, MIPS_INS_FEXDO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FEXP2_D, MIPS_INS_FEXP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FEXP2_W, MIPS_INS_FEXP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FEXUPL_D, MIPS_INS_FEXUPL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FEXUPL_W, MIPS_INS_FEXUPL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FEXUPR_D, MIPS_INS_FEXUPR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FEXUPR_W, MIPS_INS_FEXUPR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FFINT_S_D, MIPS_INS_FFINT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FFINT_S_W, MIPS_INS_FFINT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FFINT_U_D, MIPS_INS_FFINT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FFINT_U_W, MIPS_INS_FFINT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FFQL_D, MIPS_INS_FFQL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FFQL_W, MIPS_INS_FFQL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FFQR_D, MIPS_INS_FFQR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FFQR_W, MIPS_INS_FFQR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FILL_B, MIPS_INS_FILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FILL_D, MIPS_INS_FILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FILL_H, MIPS_INS_FILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FILL_W, MIPS_INS_FILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FLOG2_D, MIPS_INS_FLOG2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FLOG2_W, MIPS_INS_FLOG2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FLOOR_L_D64, MIPS_INS_FLOOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FLOOR_L_S, MIPS_INS_FLOOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FLOOR_W_D32, MIPS_INS_FLOOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FLOOR_W_D64, MIPS_INS_FLOOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FLOOR_W_MM, MIPS_INS_FLOOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FLOOR_W_S, MIPS_INS_FLOOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FLOOR_W_S_MM, MIPS_INS_FLOOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMADD_D, MIPS_INS_FMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMADD_W, MIPS_INS_FMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMAX_A_D, MIPS_INS_FMAX_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMAX_A_W, MIPS_INS_FMAX_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMAX_D, MIPS_INS_FMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMAX_W, MIPS_INS_FMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMIN_A_D, MIPS_INS_FMIN_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMIN_A_W, MIPS_INS_FMIN_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMIN_D, MIPS_INS_FMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMIN_W, MIPS_INS_FMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMOV_D32, MIPS_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMOV_D32_MM, MIPS_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMOV_D64, MIPS_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMOV_S, MIPS_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMOV_S_MM, MIPS_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMSUB_D, MIPS_INS_FMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMSUB_W, MIPS_INS_FMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMUL_D, MIPS_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMUL_D32, MIPS_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMUL_D64, MIPS_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMUL_MM, MIPS_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMUL_S, MIPS_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMUL_S_MM, MIPS_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FMUL_W, MIPS_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FNEG_D32, MIPS_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FNEG_D64, MIPS_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FNEG_MM, MIPS_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FNEG_S, MIPS_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FNEG_S_MM, MIPS_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FRCP_D, MIPS_INS_FRCP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FRCP_W, MIPS_INS_FRCP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FRINT_D, MIPS_INS_FRINT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FRINT_W, MIPS_INS_FRINT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FRSQRT_D, MIPS_INS_FRSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FRSQRT_W, MIPS_INS_FRSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSAF_D, MIPS_INS_FSAF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSAF_W, MIPS_INS_FSAF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSEQ_D, MIPS_INS_FSEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSEQ_W, MIPS_INS_FSEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSLE_D, MIPS_INS_FSLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSLE_W, MIPS_INS_FSLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSLT_D, MIPS_INS_FSLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSLT_W, MIPS_INS_FSLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSNE_D, MIPS_INS_FSNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSNE_W, MIPS_INS_FSNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSOR_D, MIPS_INS_FSOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSOR_W, MIPS_INS_FSOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSQRT_D, MIPS_INS_FSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSQRT_D32, MIPS_INS_SQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSQRT_D64, MIPS_INS_SQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSQRT_MM, MIPS_INS_SQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSQRT_S, MIPS_INS_SQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSQRT_S_MM, MIPS_INS_SQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSQRT_W, MIPS_INS_FSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUB_D, MIPS_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUB_D32, MIPS_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUB_D64, MIPS_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUB_MM, MIPS_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUB_S, MIPS_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUB_S_MM, MIPS_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUB_W, MIPS_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUEQ_D, MIPS_INS_FSUEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUEQ_W, MIPS_INS_FSUEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSULE_D, MIPS_INS_FSULE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSULE_W, MIPS_INS_FSULE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSULT_D, MIPS_INS_FSULT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSULT_W, MIPS_INS_FSULT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUNE_D, MIPS_INS_FSUNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUNE_W, MIPS_INS_FSUNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUN_D, MIPS_INS_FSUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FSUN_W, MIPS_INS_FSUN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FTINT_S_D, MIPS_INS_FTINT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FTINT_S_W, MIPS_INS_FTINT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FTINT_U_D, MIPS_INS_FTINT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FTINT_U_W, MIPS_INS_FTINT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FTQ_H, MIPS_INS_FTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FTQ_W, MIPS_INS_FTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FTRUNC_S_D, MIPS_INS_FTRUNC_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FTRUNC_S_W, MIPS_INS_FTRUNC_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FTRUNC_U_D, MIPS_INS_FTRUNC_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_FTRUNC_U_W, MIPS_INS_FTRUNC_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HADD_S_D, MIPS_INS_HADD_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HADD_S_H, MIPS_INS_HADD_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HADD_S_W, MIPS_INS_HADD_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HADD_U_D, MIPS_INS_HADD_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HADD_U_H, MIPS_INS_HADD_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HADD_U_W, MIPS_INS_HADD_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HSUB_S_D, MIPS_INS_HSUB_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HSUB_S_H, MIPS_INS_HSUB_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HSUB_S_W, MIPS_INS_HSUB_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HSUB_U_D, MIPS_INS_HSUB_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HSUB_U_H, MIPS_INS_HSUB_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_HSUB_U_W, MIPS_INS_HSUB_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVEV_B, MIPS_INS_ILVEV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVEV_D, MIPS_INS_ILVEV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVEV_H, MIPS_INS_ILVEV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVEV_W, MIPS_INS_ILVEV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVL_B, MIPS_INS_ILVL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVL_D, MIPS_INS_ILVL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVL_H, MIPS_INS_ILVL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVL_W, MIPS_INS_ILVL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVOD_B, MIPS_INS_ILVOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVOD_D, MIPS_INS_ILVOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVOD_H, MIPS_INS_ILVOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVOD_W, MIPS_INS_ILVOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVR_B, MIPS_INS_ILVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVR_D, MIPS_INS_ILVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVR_H, MIPS_INS_ILVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ILVR_W, MIPS_INS_ILVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INS, MIPS_INS_INS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INSERT_B, MIPS_INS_INSERT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INSERT_D, MIPS_INS_INSERT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, MIPS_GRP_MIPS64, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INSERT_H, MIPS_INS_INSERT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INSERT_W, MIPS_INS_INSERT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INSV, MIPS_INS_INSV,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_DSPPOS, MIPS_REG_DSPSCOUNT, 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INSVE_B, MIPS_INS_INSVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INSVE_D, MIPS_INS_INSVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INSVE_H, MIPS_INS_INSVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INSVE_W, MIPS_INS_INSVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_INS_MM, MIPS_INS_INS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_J, MIPS_INS_J,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, 0 }, 1, 0
+#endif
+},
+{
+ Mips_JAL, MIPS_INS_JAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JALR, MIPS_INS_JALR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JALR16_MM, MIPS_INS_JALR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JALR64, MIPS_INS_JALR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JALRS16_MM, MIPS_INS_JALRS16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JALRS_MM, MIPS_INS_JALRS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JALR_HB, MIPS_INS_JALR_HB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 1
+#endif
+},
+{
+ Mips_JALR_MM, MIPS_INS_JALR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JALS_MM, MIPS_INS_JALS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JALX, MIPS_INS_JALX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JALX_MM, MIPS_INS_JALX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JAL_MM, MIPS_INS_JAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JIALC, MIPS_INS_JIALC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JIC, MIPS_INS_JIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JR, MIPS_INS_JR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 1, 1
+#endif
+},
+{
+ Mips_JR16_MM, MIPS_INS_JR16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1
+#endif
+},
+{
+ Mips_JR64, MIPS_INS_JR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 1, 1
+#endif
+},
+{
+ Mips_JRADDIUSP, MIPS_INS_JRADDIUSP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1
+#endif
+},
+{
+ Mips_JRC16_MM, MIPS_INS_JRC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1
+#endif
+},
+{
+ Mips_JR_HB, MIPS_INS_JR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 1, 1
+#endif
+},
+{
+ Mips_JR_HB_R6, MIPS_INS_JR_HB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 1, 1
+#endif
+},
+{
+ Mips_JR_MM, MIPS_INS_JR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 1, 1
+#endif
+},
+{
+ Mips_J_MM, MIPS_INS_J,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_AT, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_Jal16, MIPS_INS_JAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_JrRa16, MIPS_INS_JR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 1
+#endif
+},
+{
+ Mips_JrcRa16, MIPS_INS_JRC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 1
+#endif
+},
+{
+ Mips_JrcRx16, MIPS_INS_JRC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 1, 1
+#endif
+},
+{
+ Mips_JumpLinkReg16, MIPS_INS_JALRC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LB, MIPS_INS_LB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LB64, MIPS_INS_LB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LBU16_MM, MIPS_INS_LBU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LBUX, MIPS_INS_LBUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LB_MM, MIPS_INS_LB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LBu, MIPS_INS_LBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LBu64, MIPS_INS_LBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LBu_MM, MIPS_INS_LBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LD, MIPS_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDC1, MIPS_INS_LDC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDC164, MIPS_INS_LDC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDC1_MM, MIPS_INS_LDC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDC2, MIPS_INS_LDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDC2_R6, MIPS_INS_LDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDC3, MIPS_INS_LDC3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDI_B, MIPS_INS_LDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDI_D, MIPS_INS_LDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDI_H, MIPS_INS_LDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDI_W, MIPS_INS_LDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDL, MIPS_INS_LDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDPC, MIPS_INS_LDPC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDR, MIPS_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDXC1, MIPS_INS_LDXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, MIPS_GRP_NOTNACL, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LDXC164, MIPS_INS_LDXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LD_B, MIPS_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LD_D, MIPS_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LD_H, MIPS_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LD_W, MIPS_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LEA_ADDiu, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LEA_ADDiu64, MIPS_INS_DADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LEA_ADDiu_MM, MIPS_INS_ADDIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LH, MIPS_INS_LH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LH64, MIPS_INS_LH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LHU16_MM, MIPS_INS_LHU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LHX, MIPS_INS_LHX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LH_MM, MIPS_INS_LH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LHu, MIPS_INS_LHU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LHu64, MIPS_INS_LHU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LHu_MM, MIPS_INS_LHU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LI16_MM, MIPS_INS_LI16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LL, MIPS_INS_LL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LLD, MIPS_INS_LLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LLD_R6, MIPS_INS_LLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LL_MM, MIPS_INS_LL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LL_R6, MIPS_INS_LL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LSA, MIPS_INS_LSA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LSA_R6, MIPS_INS_LSA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LUXC1, MIPS_INS_LUXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LUXC164, MIPS_INS_LUXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LUXC1_MM, MIPS_INS_LUXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LUi, MIPS_INS_LUI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LUi64, MIPS_INS_LUI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LUi_MM, MIPS_INS_LUI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LW, MIPS_INS_LW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LW16_MM, MIPS_INS_LW16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LW64, MIPS_INS_LW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWC1, MIPS_INS_LWC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWC1_MM, MIPS_INS_LWC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWC2, MIPS_INS_LWC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWC2_R6, MIPS_INS_LWC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWC3, MIPS_INS_LWC3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWGP_MM, MIPS_INS_LW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWL, MIPS_INS_LWL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWL64, MIPS_INS_LWL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWL_MM, MIPS_INS_LWL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWM16_MM, MIPS_INS_LWM16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWM32_MM, MIPS_INS_LWM32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWPC, MIPS_INS_LWPC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWP_MM, MIPS_INS_LWP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWR, MIPS_INS_LWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWR64, MIPS_INS_LWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWR_MM, MIPS_INS_LWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWSP_MM, MIPS_INS_LW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWUPC, MIPS_INS_LWUPC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWU_MM, MIPS_INS_LWU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWX, MIPS_INS_LWX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWXC1, MIPS_INS_LWXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWXC1_MM, MIPS_INS_LWXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWXS_MM, MIPS_INS_LWXS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LW_MM, MIPS_INS_LW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LWu, MIPS_INS_LWU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LbRxRyOffMemX16, MIPS_INS_LB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LbuRxRyOffMemX16, MIPS_INS_LBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LhRxRyOffMemX16, MIPS_INS_LH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LhuRxRyOffMemX16, MIPS_INS_LHU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LiRxImm16, MIPS_INS_LI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LiRxImmX16, MIPS_INS_LI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LwRxPcTcp16, MIPS_INS_LW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LwRxPcTcpX16, MIPS_INS_LW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LwRxRyOffMemX16, MIPS_INS_LW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_LwRxSpImmX16, MIPS_INS_LW,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_SP, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADD, MIPS_INS_MADD,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDF_D, MIPS_INS_MADDF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDF_S, MIPS_INS_MADDF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDR_Q_H, MIPS_INS_MADDR_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDR_Q_W, MIPS_INS_MADDR_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDU, MIPS_INS_MADDU,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDU_DSP, MIPS_INS_MADDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDU_MM, MIPS_INS_MADDU,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDV_B, MIPS_INS_MADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDV_D, MIPS_INS_MADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDV_H, MIPS_INS_MADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADDV_W, MIPS_INS_MADDV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADD_D32, MIPS_INS_MADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADD_D32_MM, MIPS_INS_MADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADD_D64, MIPS_INS_MADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADD_DSP, MIPS_INS_MADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADD_MM, MIPS_INS_MADD,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADD_Q_H, MIPS_INS_MADD_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADD_Q_W, MIPS_INS_MADD_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADD_S, MIPS_INS_MADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MADD_S_MM, MIPS_INS_MADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAQ_SA_W_PHL, MIPS_INS_MAQ_SA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAQ_SA_W_PHR, MIPS_INS_MAQ_SA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAQ_S_W_PHL, MIPS_INS_MAQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAQ_S_W_PHR, MIPS_INS_MAQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAXA_D, MIPS_INS_MAXA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAXA_S, MIPS_INS_MAXA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAXI_S_B, MIPS_INS_MAXI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAXI_S_D, MIPS_INS_MAXI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAXI_S_H, MIPS_INS_MAXI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAXI_S_W, MIPS_INS_MAXI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAXI_U_B, MIPS_INS_MAXI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAXI_U_D, MIPS_INS_MAXI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAXI_U_H, MIPS_INS_MAXI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAXI_U_W, MIPS_INS_MAXI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_A_B, MIPS_INS_MAX_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_A_D, MIPS_INS_MAX_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_A_H, MIPS_INS_MAX_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_A_W, MIPS_INS_MAX_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_D, MIPS_INS_MAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_S, MIPS_INS_MAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_S_B, MIPS_INS_MAX_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_S_D, MIPS_INS_MAX_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_S_H, MIPS_INS_MAX_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_S_W, MIPS_INS_MAX_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_U_B, MIPS_INS_MAX_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_U_D, MIPS_INS_MAX_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_U_H, MIPS_INS_MAX_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MAX_U_W, MIPS_INS_MAX_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFC0, MIPS_INS_MFC0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFC1, MIPS_INS_MFC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFC1_MM, MIPS_INS_MFC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFC2, MIPS_INS_MFC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFHC1_D32, MIPS_INS_MFHC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFHC1_D64, MIPS_INS_MFHC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFHC1_MM, MIPS_INS_MFHC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFHI, MIPS_INS_MFHI,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFHI16_MM, MIPS_INS_MFHI,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFHI64, MIPS_INS_MFHI,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFHI_DSP, MIPS_INS_MFHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFHI_MM, MIPS_INS_MFHI,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFLO, MIPS_INS_MFLO,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFLO16_MM, MIPS_INS_MFLO,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFLO64, MIPS_INS_MFLO,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFLO_DSP, MIPS_INS_MFLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MFLO_MM, MIPS_INS_MFLO,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_AC0, 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MINA_D, MIPS_INS_MINA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MINA_S, MIPS_INS_MINA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MINI_S_B, MIPS_INS_MINI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MINI_S_D, MIPS_INS_MINI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MINI_S_H, MIPS_INS_MINI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MINI_S_W, MIPS_INS_MINI_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MINI_U_B, MIPS_INS_MINI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MINI_U_D, MIPS_INS_MINI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MINI_U_H, MIPS_INS_MINI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MINI_U_W, MIPS_INS_MINI_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_A_B, MIPS_INS_MIN_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_A_D, MIPS_INS_MIN_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_A_H, MIPS_INS_MIN_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_A_W, MIPS_INS_MIN_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_D, MIPS_INS_MIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_S, MIPS_INS_MIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_S_B, MIPS_INS_MIN_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_S_D, MIPS_INS_MIN_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_S_H, MIPS_INS_MIN_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_S_W, MIPS_INS_MIN_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_U_B, MIPS_INS_MIN_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_U_D, MIPS_INS_MIN_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_U_H, MIPS_INS_MIN_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MIN_U_W, MIPS_INS_MIN_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOD, MIPS_INS_MOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MODSUB, MIPS_INS_MODSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MODU, MIPS_INS_MODU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOD_S_B, MIPS_INS_MOD_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOD_S_D, MIPS_INS_MOD_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOD_S_H, MIPS_INS_MOD_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOD_S_W, MIPS_INS_MOD_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOD_U_B, MIPS_INS_MOD_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOD_U_D, MIPS_INS_MOD_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOD_U_H, MIPS_INS_MOD_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOD_U_W, MIPS_INS_MOD_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVE16_MM, MIPS_INS_MOVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVEP_MM, MIPS_INS_MOVEP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVE_V, MIPS_INS_MOVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVF_D32, MIPS_INS_MOVF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVF_D32_MM, MIPS_INS_MOVF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVF_D64, MIPS_INS_MOVF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVF_I, MIPS_INS_MOVF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVF_I64, MIPS_INS_MOVF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_GP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVF_I_MM, MIPS_INS_MOVF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVF_S, MIPS_INS_MOVF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVF_S_MM, MIPS_INS_MOVF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I64_D64, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I64_I, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I64_I64, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I64_S, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_GP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I_D32, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I_D32_MM, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I_D64, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I_I, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I_I64, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I_MM, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I_S, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVN_I_S_MM, MIPS_INS_MOVN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVT_D32, MIPS_INS_MOVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVT_D32_MM, MIPS_INS_MOVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVT_D64, MIPS_INS_MOVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVT_I, MIPS_INS_MOVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVT_I64, MIPS_INS_MOVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_GP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVT_I_MM, MIPS_INS_MOVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVT_S, MIPS_INS_MOVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVT_S_MM, MIPS_INS_MOVT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I64_D64, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I64_I, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I64_I64, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I64_S, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_MIPS64, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I_D32, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I_D32_MM, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I_D64, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I_I, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I_I64, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I_MM, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I_S, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MOVZ_I_S_MM, MIPS_INS_MOVZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUB, MIPS_INS_MSUB,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBF_D, MIPS_INS_MSUBF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBF_S, MIPS_INS_MSUBF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBR_Q_H, MIPS_INS_MSUBR_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBR_Q_W, MIPS_INS_MSUBR_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBU, MIPS_INS_MSUBU,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBU_DSP, MIPS_INS_MSUBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBU_MM, MIPS_INS_MSUBU,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBV_B, MIPS_INS_MSUBV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBV_D, MIPS_INS_MSUBV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBV_H, MIPS_INS_MSUBV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUBV_W, MIPS_INS_MSUBV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUB_D32, MIPS_INS_MSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUB_D32_MM, MIPS_INS_MSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUB_D64, MIPS_INS_MSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUB_DSP, MIPS_INS_MSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUB_MM, MIPS_INS_MSUB,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUB_Q_H, MIPS_INS_MSUB_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUB_Q_W, MIPS_INS_MSUB_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUB_S, MIPS_INS_MSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MSUB_S_MM, MIPS_INS_MSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTC0, MIPS_INS_MTC0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTC1, MIPS_INS_MTC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTC1_MM, MIPS_INS_MTC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTC2, MIPS_INS_MTC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTHC1_D32, MIPS_INS_MTHC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTHC1_D64, MIPS_INS_MTHC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTHC1_MM, MIPS_INS_MTHC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTHI, MIPS_INS_MTHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTHI64, MIPS_INS_MTHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTHI_DSP, MIPS_INS_MTHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTHI_MM, MIPS_INS_MTHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTHLIP, MIPS_INS_MTHLIP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPPOS, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTLO, MIPS_INS_MTLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTLO64, MIPS_INS_MTLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTLO_DSP, MIPS_INS_MTLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTLO_MM, MIPS_INS_MTLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTM0, MIPS_INS_MTM0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_MPL0, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTM1, MIPS_INS_MTM1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_MPL1, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTM2, MIPS_INS_MTM2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_MPL2, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTP0, MIPS_INS_MTP0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_P0, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTP1, MIPS_INS_MTP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_P1, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MTP2, MIPS_INS_MTP2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MUH, MIPS_INS_MUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MUHU, MIPS_INS_MUHU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MUL, MIPS_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULEQ_S_W_PHL, MIPS_INS_MULEQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULEQ_S_W_PHR, MIPS_INS_MULEQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULEU_S_PH_QBL, MIPS_INS_MULEU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULEU_S_PH_QBR, MIPS_INS_MULEU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULQ_RS_PH, MIPS_INS_MULQ_RS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULQ_RS_W, MIPS_INS_MULQ_RS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULQ_S_PH, MIPS_INS_MULQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULQ_S_W, MIPS_INS_MULQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULR_Q_H, MIPS_INS_MULR_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULR_Q_W, MIPS_INS_MULR_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULSAQ_S_W_PH, MIPS_INS_MULSAQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG16_19, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULSA_W_PH, MIPS_INS_MULSA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULT, MIPS_INS_MULT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULTU_DSP, MIPS_INS_MULTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULT_DSP, MIPS_INS_MULT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULT_MM, MIPS_INS_MULT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULTu, MIPS_INS_MULTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULTu_MM, MIPS_INS_MULTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULU, MIPS_INS_MULU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULV_B, MIPS_INS_MULV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULV_D, MIPS_INS_MULV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULV_H, MIPS_INS_MULV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MULV_W, MIPS_INS_MULV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MUL_MM, MIPS_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MUL_PH, MIPS_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MUL_Q_H, MIPS_INS_MUL_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MUL_Q_W, MIPS_INS_MUL_Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MUL_R6, MIPS_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MUL_S_PH, MIPS_INS_MUL_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG21, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_Mfhi16, MIPS_INS_MFHI,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_HI0, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_Mflo16, MIPS_INS_MFLO,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_LO0, 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_Move32R16, MIPS_INS_MOVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_MoveR3216, MIPS_INS_MOVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NLOC_B, MIPS_INS_NLOC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NLOC_D, MIPS_INS_NLOC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NLOC_H, MIPS_INS_NLOC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NLOC_W, MIPS_INS_NLOC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NLZC_B, MIPS_INS_NLZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NLZC_D, MIPS_INS_NLZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NLZC_H, MIPS_INS_NLZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NLZC_W, MIPS_INS_NLZC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NMADD_D32, MIPS_INS_NMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NMADD_D32_MM, MIPS_INS_NMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NMADD_D64, MIPS_INS_NMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NMADD_S, MIPS_INS_NMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NMADD_S_MM, MIPS_INS_NMADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NMSUB_D32, MIPS_INS_NMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NMSUB_D32_MM, MIPS_INS_NMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NMSUB_D64, MIPS_INS_NMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NMSUB_S, MIPS_INS_NMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NONANSFPMATH, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NMSUB_S_MM, MIPS_INS_NMSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NOR, MIPS_INS_NOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NOR64, MIPS_INS_NOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NORI_B, MIPS_INS_NORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NOR_MM, MIPS_INS_NOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NOR_V, MIPS_INS_NOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NOT16_MM, MIPS_INS_NOT16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NegRxRy16, MIPS_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_NotRxRy16, MIPS_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_OR, MIPS_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_OR16_MM, MIPS_INS_OR16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_OR64, MIPS_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ORI_B, MIPS_INS_ORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_OR_MM, MIPS_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_OR_V, MIPS_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ORi, MIPS_INS_ORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ORi64, MIPS_INS_ORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ORi_MM, MIPS_INS_ORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_OrRxRxRy16, MIPS_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PACKRL_PH, MIPS_INS_PACKRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PAUSE, MIPS_INS_PAUSE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PAUSE_MM, MIPS_INS_PAUSE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCKEV_B, MIPS_INS_PCKEV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCKEV_D, MIPS_INS_PCKEV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCKEV_H, MIPS_INS_PCKEV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCKEV_W, MIPS_INS_PCKEV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCKOD_B, MIPS_INS_PCKOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCKOD_D, MIPS_INS_PCKOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCKOD_H, MIPS_INS_PCKOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCKOD_W, MIPS_INS_PCKOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCNT_B, MIPS_INS_PCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCNT_D, MIPS_INS_PCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCNT_H, MIPS_INS_PCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PCNT_W, MIPS_INS_PCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PICK_PH, MIPS_INS_PICK,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_DSPCCOND, 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PICK_QB, MIPS_INS_PICK,
+#ifndef CAPSTONE_DIET
+ { MIPS_REG_DSPCCOND, 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_POP, MIPS_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECEQU_PH_QBL, MIPS_INS_PRECEQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECEQU_PH_QBLA, MIPS_INS_PRECEQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECEQU_PH_QBR, MIPS_INS_PRECEQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECEQU_PH_QBRA, MIPS_INS_PRECEQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECEQ_W_PHL, MIPS_INS_PRECEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECEQ_W_PHR, MIPS_INS_PRECEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECEU_PH_QBL, MIPS_INS_PRECEU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECEU_PH_QBLA, MIPS_INS_PRECEU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECEU_PH_QBR, MIPS_INS_PRECEU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECEU_PH_QBRA, MIPS_INS_PRECEU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECRQU_S_QB_PH, MIPS_INS_PRECRQU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECRQ_PH_W, MIPS_INS_PRECRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECRQ_QB_PH, MIPS_INS_PRECRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECRQ_RS_PH_W, MIPS_INS_PRECRQ_RS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECR_QB_PH, MIPS_INS_PRECR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECR_SRA_PH_W, MIPS_INS_PRECR_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PRECR_SRA_R_PH_W, MIPS_INS_PRECR_SRA_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PREF, MIPS_INS_PREF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3_32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PREF_MM, MIPS_INS_PREF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PREF_R6, MIPS_INS_PREF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_PREPEND, MIPS_INS_PREPEND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_RADDU_W_QB, MIPS_INS_RADDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_RDDSP, MIPS_INS_RDDSP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_RDHWR, MIPS_INS_RDHWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_RDHWR64, MIPS_INS_RDHWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_RDHWR_MM, MIPS_INS_RDHWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_REPLV_PH, MIPS_INS_REPLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_REPLV_QB, MIPS_INS_REPLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_REPL_PH, MIPS_INS_REPL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_REPL_QB, MIPS_INS_REPL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_RINT_D, MIPS_INS_RINT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_RINT_S, MIPS_INS_RINT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROTR, MIPS_INS_ROTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROTRV, MIPS_INS_ROTRV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROTRV_MM, MIPS_INS_ROTRV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROTR_MM, MIPS_INS_ROTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROUND_L_D64, MIPS_INS_ROUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROUND_L_S, MIPS_INS_ROUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROUND_W_D32, MIPS_INS_ROUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROUND_W_D64, MIPS_INS_ROUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROUND_W_MM, MIPS_INS_ROUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROUND_W_S, MIPS_INS_ROUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ROUND_W_S_MM, MIPS_INS_ROUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SAT_S_B, MIPS_INS_SAT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SAT_S_D, MIPS_INS_SAT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SAT_S_H, MIPS_INS_SAT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SAT_S_W, MIPS_INS_SAT_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SAT_U_B, MIPS_INS_SAT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SAT_U_D, MIPS_INS_SAT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SAT_U_H, MIPS_INS_SAT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SAT_U_W, MIPS_INS_SAT_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SB, MIPS_INS_SB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SB16_MM, MIPS_INS_SB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SB64, MIPS_INS_SB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SB_MM, MIPS_INS_SB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SC, MIPS_INS_SC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SCD, MIPS_INS_SCD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SCD_R6, MIPS_INS_SCD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SC_MM, MIPS_INS_SC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SC_R6, MIPS_INS_SC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SD, MIPS_INS_SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDBBP, MIPS_INS_SDBBP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDBBP16_MM, MIPS_INS_SDBBP16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDBBP_MM, MIPS_INS_SDBBP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDBBP_R6, MIPS_INS_SDBBP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDC1, MIPS_INS_SDC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDC164, MIPS_INS_SDC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDC1_MM, MIPS_INS_SDC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDC2, MIPS_INS_SDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDC2_R6, MIPS_INS_SDC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDC3, MIPS_INS_SDC3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDIV, MIPS_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDIV_MM, MIPS_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDL, MIPS_INS_SDL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDR, MIPS_INS_SDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS3, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDXC1, MIPS_INS_SDXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, MIPS_GRP_NOTNACL, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SDXC164, MIPS_INS_SDXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SEB, MIPS_INS_SEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SEB64, MIPS_INS_SEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SEB_MM, MIPS_INS_SEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SEH, MIPS_INS_SEH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SEH64, MIPS_INS_SEH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SEH_MM, MIPS_INS_SEH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SELEQZ, MIPS_INS_SELEQZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP32BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SELEQZ64, MIPS_INS_SELEQZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP64BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SELEQZ_D, MIPS_INS_SELEQZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SELEQZ_S, MIPS_INS_SELEQZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SELNEZ, MIPS_INS_SELNEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP32BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SELNEZ64, MIPS_INS_SELNEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_GP64BIT, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SELNEZ_D, MIPS_INS_SELNEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SELNEZ_S, MIPS_INS_SELNEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SEL_D, MIPS_INS_SEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SEL_S, MIPS_INS_SEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SEQ, MIPS_INS_SEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SEQi, MIPS_INS_SEQI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SH, MIPS_INS_SH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SH16_MM, MIPS_INS_SH16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SH64, MIPS_INS_SH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHF_B, MIPS_INS_SHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHF_H, MIPS_INS_SHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHF_W, MIPS_INS_SHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHILO, MIPS_INS_SHILO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHILOV, MIPS_INS_SHILOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHLLV_PH, MIPS_INS_SHLLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHLLV_QB, MIPS_INS_SHLLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHLLV_S_PH, MIPS_INS_SHLLV_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHLLV_S_W, MIPS_INS_SHLLV_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHLL_PH, MIPS_INS_SHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHLL_QB, MIPS_INS_SHLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHLL_S_PH, MIPS_INS_SHLL_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHLL_S_W, MIPS_INS_SHLL_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG22, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRAV_PH, MIPS_INS_SHRAV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRAV_QB, MIPS_INS_SHRAV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRAV_R_PH, MIPS_INS_SHRAV_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRAV_R_QB, MIPS_INS_SHRAV_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRAV_R_W, MIPS_INS_SHRAV_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRA_PH, MIPS_INS_SHRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRA_QB, MIPS_INS_SHRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRA_R_PH, MIPS_INS_SHRA_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRA_R_QB, MIPS_INS_SHRA_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRA_R_W, MIPS_INS_SHRA_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRLV_PH, MIPS_INS_SHRLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRLV_QB, MIPS_INS_SHRLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRL_PH, MIPS_INS_SHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SHRL_QB, MIPS_INS_SHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SH_MM, MIPS_INS_SH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLDI_B, MIPS_INS_SLDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLDI_D, MIPS_INS_SLDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLDI_H, MIPS_INS_SLDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLDI_W, MIPS_INS_SLDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLD_B, MIPS_INS_SLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLD_D, MIPS_INS_SLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLD_H, MIPS_INS_SLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLD_W, MIPS_INS_SLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLL, MIPS_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLL16_MM, MIPS_INS_SLL16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLL64_32, MIPS_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLL64_64, MIPS_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLLI_B, MIPS_INS_SLLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLLI_D, MIPS_INS_SLLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLLI_H, MIPS_INS_SLLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLLI_W, MIPS_INS_SLLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLLV, MIPS_INS_SLLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLLV_MM, MIPS_INS_SLLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLL_B, MIPS_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLL_D, MIPS_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLL_H, MIPS_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLL_MM, MIPS_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLL_W, MIPS_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLT, MIPS_INS_SLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLT64, MIPS_INS_SLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLT_MM, MIPS_INS_SLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLTi, MIPS_INS_SLTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLTi64, MIPS_INS_SLTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLTi_MM, MIPS_INS_SLTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLTiu, MIPS_INS_SLTIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLTiu64, MIPS_INS_SLTIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLTiu_MM, MIPS_INS_SLTIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLTu, MIPS_INS_SLTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLTu64, MIPS_INS_SLTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SLTu_MM, MIPS_INS_SLTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SNE, MIPS_INS_SNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SNEi, MIPS_INS_SNEI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SPLATI_B, MIPS_INS_SPLATI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SPLATI_D, MIPS_INS_SPLATI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SPLATI_H, MIPS_INS_SPLATI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SPLATI_W, MIPS_INS_SPLATI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SPLAT_B, MIPS_INS_SPLAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SPLAT_D, MIPS_INS_SPLAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SPLAT_H, MIPS_INS_SPLAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SPLAT_W, MIPS_INS_SPLAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRA, MIPS_INS_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRAI_B, MIPS_INS_SRAI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRAI_D, MIPS_INS_SRAI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRAI_H, MIPS_INS_SRAI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRAI_W, MIPS_INS_SRAI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRARI_B, MIPS_INS_SRARI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRARI_D, MIPS_INS_SRARI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRARI_H, MIPS_INS_SRARI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRARI_W, MIPS_INS_SRARI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRAR_B, MIPS_INS_SRAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRAR_D, MIPS_INS_SRAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRAR_H, MIPS_INS_SRAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRAR_W, MIPS_INS_SRAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRAV, MIPS_INS_SRAV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRAV_MM, MIPS_INS_SRAV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRA_B, MIPS_INS_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRA_D, MIPS_INS_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRA_H, MIPS_INS_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRA_MM, MIPS_INS_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRA_W, MIPS_INS_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRL, MIPS_INS_SRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRL16_MM, MIPS_INS_SRL16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLI_B, MIPS_INS_SRLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLI_D, MIPS_INS_SRLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLI_H, MIPS_INS_SRLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLI_W, MIPS_INS_SRLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLRI_B, MIPS_INS_SRLRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLRI_D, MIPS_INS_SRLRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLRI_H, MIPS_INS_SRLRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLRI_W, MIPS_INS_SRLRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLR_B, MIPS_INS_SRLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLR_D, MIPS_INS_SRLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLR_H, MIPS_INS_SRLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLR_W, MIPS_INS_SRLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLV, MIPS_INS_SRLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRLV_MM, MIPS_INS_SRLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRL_B, MIPS_INS_SRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRL_D, MIPS_INS_SRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRL_H, MIPS_INS_SRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRL_MM, MIPS_INS_SRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SRL_W, MIPS_INS_SRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SSNOP, MIPS_INS_SSNOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SSNOP_MM, MIPS_INS_SSNOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ST_B, MIPS_INS_ST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ST_D, MIPS_INS_ST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ST_H, MIPS_INS_ST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ST_W, MIPS_INS_ST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUB, MIPS_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBQH_PH, MIPS_INS_SUBQH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBQH_R_PH, MIPS_INS_SUBQH_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBQH_R_W, MIPS_INS_SUBQH_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBQH_W, MIPS_INS_SUBQH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBQ_PH, MIPS_INS_SUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBQ_S_PH, MIPS_INS_SUBQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBQ_S_W, MIPS_INS_SUBQ_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBSUS_U_B, MIPS_INS_SUBSUS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBSUS_U_D, MIPS_INS_SUBSUS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBSUS_U_H, MIPS_INS_SUBSUS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBSUS_U_W, MIPS_INS_SUBSUS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBSUU_S_B, MIPS_INS_SUBSUU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBSUU_S_D, MIPS_INS_SUBSUU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBSUU_S_H, MIPS_INS_SUBSUU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBSUU_S_W, MIPS_INS_SUBSUU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBS_S_B, MIPS_INS_SUBS_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBS_S_D, MIPS_INS_SUBS_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBS_S_H, MIPS_INS_SUBS_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBS_S_W, MIPS_INS_SUBS_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBS_U_B, MIPS_INS_SUBS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBS_U_D, MIPS_INS_SUBS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBS_U_H, MIPS_INS_SUBS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBS_U_W, MIPS_INS_SUBS_U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBU16_MM, MIPS_INS_SUBU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBUH_QB, MIPS_INS_SUBUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBUH_R_QB, MIPS_INS_SUBUH_R,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBU_PH, MIPS_INS_SUBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBU_QB, MIPS_INS_SUBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBU_S_PH, MIPS_INS_SUBU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSPR2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBU_S_QB, MIPS_INS_SUBU_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_DSPOUTFLAG20, 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBVI_B, MIPS_INS_SUBVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBVI_D, MIPS_INS_SUBVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBVI_H, MIPS_INS_SUBVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBVI_W, MIPS_INS_SUBVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBV_B, MIPS_INS_SUBV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBV_D, MIPS_INS_SUBV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBV_H, MIPS_INS_SUBV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBV_W, MIPS_INS_SUBV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUB_MM, MIPS_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBu, MIPS_INS_SUBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUBu_MM, MIPS_INS_SUBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUXC1, MIPS_INS_SUXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTFP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUXC164, MIPS_INS_SUXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, MIPS_GRP_MIPS5_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SUXC1_MM, MIPS_INS_SUXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SW, MIPS_INS_SW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SW16_MM, MIPS_INS_SW16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SW64, MIPS_INS_SW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWC1, MIPS_INS_SWC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWC1_MM, MIPS_INS_SWC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWC2, MIPS_INS_SWC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWC2_R6, MIPS_INS_SWC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWC3, MIPS_INS_SWC3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWL, MIPS_INS_SWL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWL64, MIPS_INS_SWL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWL_MM, MIPS_INS_SWL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWM16_MM, MIPS_INS_SWM16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWM32_MM, MIPS_INS_SWM32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWP_MM, MIPS_INS_SWP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWR, MIPS_INS_SWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWR64, MIPS_INS_SWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWR_MM, MIPS_INS_SWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWSP_MM, MIPS_INS_SW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWXC1, MIPS_INS_SWXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS4_32R2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, MIPS_GRP_NOTNACL, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SWXC1_MM, MIPS_INS_SWXC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SW_MM, MIPS_INS_SW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SYNC, MIPS_INS_SYNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SYNCI, MIPS_INS_SYNCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SYNC_MM, MIPS_INS_SYNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SYSCALL, MIPS_INS_SYSCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SYSCALL_MM, MIPS_INS_SYSCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SbRxRyOffMemX16, MIPS_INS_SB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SebRx16, MIPS_INS_SEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SehRx16, MIPS_INS_SEH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_ShRxRyOffMemX16, MIPS_INS_SH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SllX16, MIPS_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SllvRxRy16, MIPS_INS_SLLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SltRxRy16, MIPS_INS_SLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SltiRxImm16, MIPS_INS_SLTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SltiRxImmX16, MIPS_INS_SLTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SltiuRxImm16, MIPS_INS_SLTIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SltiuRxImmX16, MIPS_INS_SLTIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SltuRxRy16, MIPS_INS_SLTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_T8, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SraX16, MIPS_INS_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SravRxRy16, MIPS_INS_SRAV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SrlX16, MIPS_INS_SRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SrlvRxRy16, MIPS_INS_SRLV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SubuRxRyRz16, MIPS_INS_SUBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SwRxRyOffMemX16, MIPS_INS_SW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_SwRxSpImmX16, MIPS_INS_SW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TEQ, MIPS_INS_TEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TEQI, MIPS_INS_TEQI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TEQI_MM, MIPS_INS_TEQI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TEQ_MM, MIPS_INS_TEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TGE, MIPS_INS_TGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TGEI, MIPS_INS_TGEI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TGEIU, MIPS_INS_TGEIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TGEIU_MM, MIPS_INS_TGEIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TGEI_MM, MIPS_INS_TGEI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TGEU, MIPS_INS_TGEU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TGEU_MM, MIPS_INS_TGEU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TGE_MM, MIPS_INS_TGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLBP, MIPS_INS_TLBP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLBP_MM, MIPS_INS_TLBP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLBR, MIPS_INS_TLBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLBR_MM, MIPS_INS_TLBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLBWI, MIPS_INS_TLBWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLBWI_MM, MIPS_INS_TLBWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLBWR, MIPS_INS_TLBWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLBWR_MM, MIPS_INS_TLBWR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLT, MIPS_INS_TLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLTI, MIPS_INS_TLTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLTIU_MM, MIPS_INS_TLTIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLTI_MM, MIPS_INS_TLTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLTU, MIPS_INS_TLTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLTU_MM, MIPS_INS_TLTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TLT_MM, MIPS_INS_TLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TNE, MIPS_INS_TNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TNEI, MIPS_INS_TNEI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TNEI_MM, MIPS_INS_TNEI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TNE_MM, MIPS_INS_TNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TRUNC_L_D64, MIPS_INS_TRUNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TRUNC_L_S, MIPS_INS_TRUNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TRUNC_W_D32, MIPS_INS_TRUNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTFP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TRUNC_W_D64, MIPS_INS_TRUNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_FP64BIT, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TRUNC_W_MM, MIPS_INS_TRUNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TRUNC_W_S, MIPS_INS_TRUNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TRUNC_W_S_MM, MIPS_INS_TRUNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_TTLTIU, MIPS_INS_TLTIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS2, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_UDIV, MIPS_INS_DIVU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTMIPS32R6, MIPS_GRP_NOTMIPS64R6, 0 }, 0, 0
+#endif
+},
+{
+ Mips_UDIV_MM, MIPS_INS_DIVU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_HI0, MIPS_REG_LO0, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_V3MULU, MIPS_INS_V3MULU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_VMM0, MIPS_INS_VMM0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_MPL0, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_VMULU, MIPS_INS_VMULU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { MIPS_REG_MPL1, MIPS_REG_MPL2, MIPS_REG_P0, MIPS_REG_P1, MIPS_REG_P2, 0 }, { MIPS_GRP_CNMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_VSHF_B, MIPS_INS_VSHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_VSHF_D, MIPS_INS_VSHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_VSHF_H, MIPS_INS_VSHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_VSHF_W, MIPS_INS_VSHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_WAIT, MIPS_INS_WAIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_WAIT_MM, MIPS_INS_WAIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_WRDSP, MIPS_INS_WRDSP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_DSP, 0 }, 0, 0
+#endif
+},
+{
+ Mips_WSBH, MIPS_INS_WSBH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32R2, 0 }, 0, 0
+#endif
+},
+{
+ Mips_WSBH_MM, MIPS_INS_WSBH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_XOR, MIPS_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_XOR16_MM, MIPS_INS_XOR16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_XOR64, MIPS_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_XORI_B, MIPS_INS_XORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_XOR_MM, MIPS_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_XOR_V, MIPS_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MSA, 0 }, 0, 0
+#endif
+},
+{
+ Mips_XORi, MIPS_INS_XORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_XORi64, MIPS_INS_XORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0
+#endif
+},
+{
+ Mips_XORi_MM, MIPS_INS_XORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0
+#endif
+},
+{
+ Mips_XorRxRxRy16, MIPS_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0
+#endif
+},
diff --git a/arch/PowerPC/PPCMapping.c b/arch/PowerPC/PPCMapping.c
index 5d554cb..5361a13 100644
--- a/arch/PowerPC/PPCMapping.c
+++ b/arch/PowerPC/PPCMapping.c
@@ -251,8058 +251,7 @@
#endif
},
- {
- PPC_ADD4, PPC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADD4TLS, PPC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADD4o, PPC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADD8, PPC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADD8TLS, PPC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADD8TLS_, PPC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADD8o, PPC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDC, PPC_INS_ADDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDC8, PPC_INS_ADDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDC8o, PPC_INS_ADDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDCo, PPC_INS_ADDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDE, PPC_INS_ADDE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDE8, PPC_INS_ADDE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDE8o, PPC_INS_ADDE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDEo, PPC_INS_ADDE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDI, PPC_INS_ADDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDI8, PPC_INS_ADDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDIC, PPC_INS_ADDIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDIC8, PPC_INS_ADDIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDICo, PPC_INS_ADDIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDIS, PPC_INS_ADDIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDIS8, PPC_INS_ADDIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDME, PPC_INS_ADDME,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDME8, PPC_INS_ADDME,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDME8o, PPC_INS_ADDME,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDMEo, PPC_INS_ADDME,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDZE, PPC_INS_ADDZE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDZE8, PPC_INS_ADDZE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDZE8o, PPC_INS_ADDZE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ADDZEo, PPC_INS_ADDZE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_AND, PPC_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_AND8, PPC_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_AND8o, PPC_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ANDC, PPC_INS_ANDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ANDC8, PPC_INS_ANDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ANDC8o, PPC_INS_ANDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ANDCo, PPC_INS_ANDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ANDISo, PPC_INS_ANDIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ANDISo8, PPC_INS_ANDIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ANDIo, PPC_INS_ANDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ANDIo8, PPC_INS_ANDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ANDo, PPC_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ATTN, PPC_INS_ATTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_B, PPC_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BA, PPC_INS_BA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BC, PPC_INS_BC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BCC, PPC_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BCCA, PPC_INS_BA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BCCCTR, PPC_INS_BCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- PPC_BCCCTR8, PPC_INS_BCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1
-#endif
- },
- {
- PPC_BCCCTRL, PPC_INS_BCTRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCCCTRL8, PPC_INS_BCTRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- PPC_BCCL, PPC_INS_BL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCCLA, PPC_INS_BLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCCLR, PPC_INS_BLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_LR, PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BCCLRL, PPC_INS_BLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCCTR, PPC_INS_BCCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- PPC_BCCTR8, PPC_INS_BCCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1
-#endif
- },
- {
- PPC_BCCTR8n, PPC_INS_BCCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1
-#endif
- },
- {
- PPC_BCCTRL, PPC_INS_BCCTRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCCTRL8, PPC_INS_BCCTRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- PPC_BCCTRL8n, PPC_INS_BCCTRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- PPC_BCCTRLn, PPC_INS_BCCTRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCCTRn, PPC_INS_BCCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- PPC_BCL, PPC_INS_BCL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCLR, PPC_INS_BCLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_LR, PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BCLRL, PPC_INS_BCLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCLRLn, PPC_INS_BCLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCLRn, PPC_INS_BCLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BCLalways, PPC_INS_BCL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCLn, PPC_INS_BCL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BCTR, PPC_INS_BCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- PPC_BCTR8, PPC_INS_BCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1
-#endif
- },
- {
- PPC_BCTRL, PPC_INS_BCTRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { PPC_GRP_MODE32, 0 }, 0, 0
-#endif
- },
- {
- PPC_BCTRL8, PPC_INS_BCTRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- PPC_BCTRL8_LDinto_toc, PPC_INS_BCT, // FIXME
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, PPC_REG_X2, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- PPC_BCn, PPC_INS_BC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZ, PPC_INS_BDNZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZ8, PPC_INS_BDNZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZA, PPC_INS_BDNZA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZAm, PPC_INS_BDNZA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZAp, PPC_INS_BDNZA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZL, PPC_INS_BDNZL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDNZLA, PPC_INS_BDNZLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDNZLAm, PPC_INS_BDNZLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDNZLAp, PPC_INS_BDNZLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDNZLR, PPC_INS_BDNZLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZLR8, PPC_INS_BDNZLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, PPC_REG_LR8, PPC_REG_RM, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZLRL, PPC_INS_BDNZLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDNZLRLm, PPC_INS_BDNZLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDNZLRLp, PPC_INS_BDNZLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDNZLRm, PPC_INS_BDNZLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZLRp, PPC_INS_BDNZLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZLm, PPC_INS_BDNZL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDNZLp, PPC_INS_BDNZL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDNZm, PPC_INS_BDNZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDNZp, PPC_INS_BDNZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZ, PPC_INS_BDZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZ8, PPC_INS_BDZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZA, PPC_INS_BDZA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZAm, PPC_INS_BDZA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZAp, PPC_INS_BDZA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZL, PPC_INS_BDZL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDZLA, PPC_INS_BDZLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDZLAm, PPC_INS_BDZLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDZLAp, PPC_INS_BDZLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDZLR, PPC_INS_BDZLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZLR8, PPC_INS_BDZLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, PPC_REG_LR8, PPC_REG_RM, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZLRL, PPC_INS_BDZLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDZLRLm, PPC_INS_BDZLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDZLRLp, PPC_INS_BDZLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDZLRm, PPC_INS_BDZLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZLRp, PPC_INS_BDZLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZLm, PPC_INS_BDZL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDZLp, PPC_INS_BDZL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BDZm, PPC_INS_BDZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BDZp, PPC_INS_BDZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_BL, PPC_INS_BL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BL8, PPC_INS_BL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BL8_NOP, PPC_INS_BL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BL8_NOP_TLS, PPC_INS_BL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BL8_TLS, PPC_INS_BL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BL8_TLS_, PPC_INS_BL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BLA, PPC_INS_BLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BLA8, PPC_INS_BLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BLA8_NOP, PPC_INS_BLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BLR, PPC_INS_BLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_LR, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE32, 0 }, 0, 0
-#endif
- },
- {
- PPC_BLR8, PPC_INS_BLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_LR8, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- PPC_BLRL, PPC_INS_BLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BL_TLS, PPC_INS_BL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_BRINC, PPC_INS_BRINC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_CMPB, PPC_INS_CMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CMPB8, PPC_INS_CMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CMPD, PPC_INS_CMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CMPDI, PPC_INS_CMPDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CMPLD, PPC_INS_CMPLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CMPLDI, PPC_INS_CMPLDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CMPLW, PPC_INS_CMPLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CMPLWI, PPC_INS_CMPLWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CMPW, PPC_INS_CMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CMPWI, PPC_INS_CMPWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CNTLZD, PPC_INS_CNTLZD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CNTLZDo, PPC_INS_CNTLZD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CNTLZW, PPC_INS_CNTLZW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CNTLZW8, PPC_INS_CNTLZW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CNTLZW8o, PPC_INS_CNTLZW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CNTLZWo, PPC_INS_CNTLZW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CR6SET, PPC_INS_CREQV,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1EQ, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CR6UNSET, PPC_INS_CRXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1EQ, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CRAND, PPC_INS_CRAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CRANDC, PPC_INS_CRANDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CREQV, PPC_INS_CREQV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CRNAND, PPC_INS_CRNAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CRNOR, PPC_INS_CRNOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CROR, PPC_INS_CROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CRORC, PPC_INS_CRORC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CRSET, PPC_INS_CREQV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CRUNSET, PPC_INS_CRXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_CRXOR, PPC_INS_CRXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DCBA, PPC_INS_DCBA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DCBF, PPC_INS_DCBF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DCBI, PPC_INS_DCBI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DCBST, PPC_INS_DCBST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DCBT, PPC_INS_DCBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DCBTST, PPC_INS_DCBTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DCBZ, PPC_INS_DCBZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DCBZL, PPC_INS_DCBZL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DCCCI, PPC_INS_DCCCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
-#endif
- },
- {
- PPC_DIVD, PPC_INS_DIVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DIVDU, PPC_INS_DIVDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DIVDUo, PPC_INS_DIVDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DIVDo, PPC_INS_DIVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DIVW, PPC_INS_DIVW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DIVWU, PPC_INS_DIVWU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DIVWUo, PPC_INS_DIVWU,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DIVWo, PPC_INS_DIVW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_DSS, PPC_INS_DSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_DSSALL, PPC_INS_DSSALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_DST, PPC_INS_DST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_DST64, PPC_INS_DST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_DSTST, PPC_INS_DSTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_DSTST64, PPC_INS_DSTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_DSTSTT, PPC_INS_DSTSTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_DSTSTT64, PPC_INS_DSTSTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_DSTT, PPC_INS_DSTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_DSTT64, PPC_INS_DSTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_EQV, PPC_INS_EQV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EQV8, PPC_INS_EQV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EQV8o, PPC_INS_EQV,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EQVo, PPC_INS_EQV,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EVABS, PPC_INS_EVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVADDIW, PPC_INS_EVADDIW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVADDSMIAAW, PPC_INS_EVADDSMIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVADDSSIAAW, PPC_INS_EVADDSSIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVADDUMIAAW, PPC_INS_EVADDUMIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVADDUSIAAW, PPC_INS_EVADDUSIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVADDW, PPC_INS_EVADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVAND, PPC_INS_EVAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVANDC, PPC_INS_EVANDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVCMPEQ, PPC_INS_EVCMPEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVCMPGTS, PPC_INS_EVCMPGTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVCMPGTU, PPC_INS_EVCMPGTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVCMPLTS, PPC_INS_EVCMPLTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVCMPLTU, PPC_INS_EVCMPLTU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVCNTLSW, PPC_INS_EVCNTLSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVCNTLZW, PPC_INS_EVCNTLZW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVDIVWS, PPC_INS_EVDIVWS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVDIVWU, PPC_INS_EVDIVWU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVEQV, PPC_INS_EVEQV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVEXTSB, PPC_INS_EVEXTSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVEXTSH, PPC_INS_EVEXTSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLDD, PPC_INS_EVLDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLDDX, PPC_INS_EVLDDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLDH, PPC_INS_EVLDH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLDHX, PPC_INS_EVLDHX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLDW, PPC_INS_EVLDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLDWX, PPC_INS_EVLDWX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLHHESPLAT, PPC_INS_EVLHHESPLAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLHHESPLATX, PPC_INS_EVLHHESPLATX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLHHOSSPLAT, PPC_INS_EVLHHOSSPLAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLHHOSSPLATX, PPC_INS_EVLHHOSSPLATX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLHHOUSPLAT, PPC_INS_EVLHHOUSPLAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLHHOUSPLATX, PPC_INS_EVLHHOUSPLATX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLWHE, PPC_INS_EVLWHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLWHEX, PPC_INS_EVLWHEX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLWHOS, PPC_INS_EVLWHOS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLWHOSX, PPC_INS_EVLWHOSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLWHOU, PPC_INS_EVLWHOU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLWHOUX, PPC_INS_EVLWHOUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLWHSPLAT, PPC_INS_EVLWHSPLAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLWHSPLATX, PPC_INS_EVLWHSPLATX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLWWSPLAT, PPC_INS_EVLWWSPLAT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVLWWSPLATX, PPC_INS_EVLWWSPLATX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMERGEHI, PPC_INS_EVMERGEHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMERGEHILO, PPC_INS_EVMERGEHILO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMERGELO, PPC_INS_EVMERGELO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMERGELOHI, PPC_INS_EVMERGELOHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEGSMFAA, PPC_INS_EVMHEGSMFAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEGSMFAN, PPC_INS_EVMHEGSMFAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEGSMIAA, PPC_INS_EVMHEGSMIAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEGSMIAN, PPC_INS_EVMHEGSMIAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEGUMIAA, PPC_INS_EVMHEGUMIAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEGUMIAN, PPC_INS_EVMHEGUMIAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESMF, PPC_INS_EVMHESMF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESMFA, PPC_INS_EVMHESMFA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESMFAAW, PPC_INS_EVMHESMFAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESMFANW, PPC_INS_EVMHESMFANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESMI, PPC_INS_EVMHESMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESMIA, PPC_INS_EVMHESMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESMIAAW, PPC_INS_EVMHESMIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESMIANW, PPC_INS_EVMHESMIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESSF, PPC_INS_EVMHESSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESSFA, PPC_INS_EVMHESSFA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESSFAAW, PPC_INS_EVMHESSFAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESSFANW, PPC_INS_EVMHESSFANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESSIAAW, PPC_INS_EVMHESSIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHESSIANW, PPC_INS_EVMHESSIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEUMI, PPC_INS_EVMHEUMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEUMIA, PPC_INS_EVMHEUMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEUMIAAW, PPC_INS_EVMHEUMIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEUMIANW, PPC_INS_EVMHEUMIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEUSIAAW, PPC_INS_EVMHEUSIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHEUSIANW, PPC_INS_EVMHEUSIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOGSMFAA, PPC_INS_EVMHOGSMFAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOGSMFAN, PPC_INS_EVMHOGSMFAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOGSMIAA, PPC_INS_EVMHOGSMIAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOGSMIAN, PPC_INS_EVMHOGSMIAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOGUMIAA, PPC_INS_EVMHOGUMIAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOGUMIAN, PPC_INS_EVMHOGUMIAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSMF, PPC_INS_EVMHOSMF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSMFA, PPC_INS_EVMHOSMFA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSMFAAW, PPC_INS_EVMHOSMFAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSMFANW, PPC_INS_EVMHOSMFANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSMI, PPC_INS_EVMHOSMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSMIA, PPC_INS_EVMHOSMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSMIAAW, PPC_INS_EVMHOSMIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSMIANW, PPC_INS_EVMHOSMIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSSF, PPC_INS_EVMHOSSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSSFA, PPC_INS_EVMHOSSFA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSSFAAW, PPC_INS_EVMHOSSFAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSSFANW, PPC_INS_EVMHOSSFANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSSIAAW, PPC_INS_EVMHOSSIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOSSIANW, PPC_INS_EVMHOSSIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOUMI, PPC_INS_EVMHOUMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOUMIA, PPC_INS_EVMHOUMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOUMIAAW, PPC_INS_EVMHOUMIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOUMIANW, PPC_INS_EVMHOUMIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOUSIAAW, PPC_INS_EVMHOUSIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMHOUSIANW, PPC_INS_EVMHOUSIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMRA, PPC_INS_EVMRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWHSMF, PPC_INS_EVMWHSMF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWHSMFA, PPC_INS_EVMWHSMFA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWHSMI, PPC_INS_EVMWHSMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWHSMIA, PPC_INS_EVMWHSMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWHSSF, PPC_INS_EVMWHSSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWHSSFA, PPC_INS_EVMWHSSFA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWHUMI, PPC_INS_EVMWHUMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWHUMIA, PPC_INS_EVMWHUMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWLSMIAAW, PPC_INS_EVMWLSMIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWLSMIANW, PPC_INS_EVMWLSMIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWLSSIAAW, PPC_INS_EVMWLSSIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWLSSIANW, PPC_INS_EVMWLSSIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWLUMI, PPC_INS_EVMWLUMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWLUMIA, PPC_INS_EVMWLUMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWLUMIAAW, PPC_INS_EVMWLUMIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWLUMIANW, PPC_INS_EVMWLUMIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWLUSIAAW, PPC_INS_EVMWLUSIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWLUSIANW, PPC_INS_EVMWLUSIANW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSMF, PPC_INS_EVMWSMF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSMFA, PPC_INS_EVMWSMFA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSMFAA, PPC_INS_EVMWSMFAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSMFAN, PPC_INS_EVMWSMFAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSMI, PPC_INS_EVMWSMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSMIA, PPC_INS_EVMWSMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSMIAA, PPC_INS_EVMWSMIAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSMIAN, PPC_INS_EVMWSMIAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSSF, PPC_INS_EVMWSSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSSFA, PPC_INS_EVMWSSFA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSSFAA, PPC_INS_EVMWSSFAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWSSFAN, PPC_INS_EVMWSSFAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWUMI, PPC_INS_EVMWUMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWUMIA, PPC_INS_EVMWUMIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWUMIAA, PPC_INS_EVMWUMIAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVMWUMIAN, PPC_INS_EVMWUMIAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVNAND, PPC_INS_EVNAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVNEG, PPC_INS_EVNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVNOR, PPC_INS_EVNOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVOR, PPC_INS_EVOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVORC, PPC_INS_EVORC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVRLW, PPC_INS_EVRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVRLWI, PPC_INS_EVRLWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVRNDW, PPC_INS_EVRNDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSLW, PPC_INS_EVSLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSLWI, PPC_INS_EVSLWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSPLATFI, PPC_INS_EVSPLATFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSPLATI, PPC_INS_EVSPLATI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSRWIS, PPC_INS_EVSRWIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSRWIU, PPC_INS_EVSRWIU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSRWS, PPC_INS_EVSRWS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSRWU, PPC_INS_EVSRWU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTDD, PPC_INS_EVSTDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTDDX, PPC_INS_EVSTDDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTDH, PPC_INS_EVSTDH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTDHX, PPC_INS_EVSTDHX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTDW, PPC_INS_EVSTDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTDWX, PPC_INS_EVSTDWX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTWHE, PPC_INS_EVSTWHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTWHEX, PPC_INS_EVSTWHEX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTWHO, PPC_INS_EVSTWHO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTWHOX, PPC_INS_EVSTWHOX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTWWE, PPC_INS_EVSTWWE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTWWEX, PPC_INS_EVSTWWEX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTWWO, PPC_INS_EVSTWWO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSTWWOX, PPC_INS_EVSTWWOX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSUBFSMIAAW, PPC_INS_EVSUBFSMIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSUBFSSIAAW, PPC_INS_EVSUBFSSIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSUBFUMIAAW, PPC_INS_EVSUBFUMIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSUBFUSIAAW, PPC_INS_EVSUBFUSIAAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSUBFW, PPC_INS_EVSUBFW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVSUBIFW, PPC_INS_EVSUBIFW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EVXOR, PPC_INS_EVXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSB, PPC_INS_EXTSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSB8, PPC_INS_EXTSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSB8_32_64, PPC_INS_EXTSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSB8o, PPC_INS_EXTSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSBo, PPC_INS_EXTSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSH, PPC_INS_EXTSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSH8, PPC_INS_EXTSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSH8_32_64, PPC_INS_EXTSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSH8o, PPC_INS_EXTSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSHo, PPC_INS_EXTSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSW, PPC_INS_EXTSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSW_32_64, PPC_INS_EXTSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSW_32_64o, PPC_INS_EXTSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EXTSWo, PPC_INS_EXTSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_EnforceIEIO, PPC_INS_EIEIO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FABSD, PPC_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FABSDo, PPC_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FABSS, PPC_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FABSSo, PPC_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FADD, PPC_INS_FADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FADDS, PPC_INS_FADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FADDSo, PPC_INS_FADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FADDo, PPC_INS_FADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCFID, PPC_INS_FCFID,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCFIDS, PPC_INS_FCFIDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCFIDSo, PPC_INS_FCFIDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCFIDU, PPC_INS_FCFIDU,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCFIDUS, PPC_INS_FCFIDUS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCFIDUSo, PPC_INS_FCFIDUS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCFIDUo, PPC_INS_FCFIDU,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCFIDo, PPC_INS_FCFID,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCMPUD, PPC_INS_FCMPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCMPUS, PPC_INS_FCMPU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCPSGND, PPC_INS_FCPSGN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCPSGNDo, PPC_INS_FCPSGN,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCPSGNS, PPC_INS_FCPSGN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCPSGNSo, PPC_INS_FCPSGN,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTID, PPC_INS_FCTID,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIDUZ, PPC_INS_FCTIDUZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIDUZo, PPC_INS_FCTIDUZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIDZ, PPC_INS_FCTIDZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIDZo, PPC_INS_FCTIDZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIDo, PPC_INS_FCTID,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIW, PPC_INS_FCTIW,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIWUZ, PPC_INS_FCTIWUZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIWUZo, PPC_INS_FCTIWUZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIWZ, PPC_INS_FCTIWZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIWZo, PPC_INS_FCTIWZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FCTIWo, PPC_INS_FCTIW,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FDIV, PPC_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FDIVS, PPC_INS_FDIVS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FDIVSo, PPC_INS_FDIVS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FDIVo, PPC_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMADD, PPC_INS_FMADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMADDS, PPC_INS_FMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMADDSo, PPC_INS_FMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMADDo, PPC_INS_FMADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMR, PPC_INS_FMR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMRo, PPC_INS_FMR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMSUB, PPC_INS_FMSUB,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMSUBS, PPC_INS_FMSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMSUBSo, PPC_INS_FMSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMSUBo, PPC_INS_FMSUB,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMUL, PPC_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMULS, PPC_INS_FMULS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMULSo, PPC_INS_FMULS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FMULo, PPC_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNABSD, PPC_INS_FNABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNABSDo, PPC_INS_FNABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNABSS, PPC_INS_FNABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNABSSo, PPC_INS_FNABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNEGD, PPC_INS_FNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNEGDo, PPC_INS_FNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNEGS, PPC_INS_FNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNEGSo, PPC_INS_FNEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNMADD, PPC_INS_FNMADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNMADDS, PPC_INS_FNMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNMADDSo, PPC_INS_FNMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNMADDo, PPC_INS_FNMADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNMSUB, PPC_INS_FNMSUB,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNMSUBS, PPC_INS_FNMSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNMSUBSo, PPC_INS_FNMSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FNMSUBo, PPC_INS_FNMSUB,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRE, PPC_INS_FRE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRES, PPC_INS_FRES,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRESo, PPC_INS_FRES,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FREo, PPC_INS_FRE,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIMD, PPC_INS_FRIM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIMDo, PPC_INS_FRIM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIMS, PPC_INS_FRIM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIMSo, PPC_INS_FRIM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIND, PPC_INS_FRIN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRINDo, PPC_INS_FRIN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRINS, PPC_INS_FRIN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRINSo, PPC_INS_FRIN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIPD, PPC_INS_FRIP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIPDo, PPC_INS_FRIP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIPS, PPC_INS_FRIP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIPSo, PPC_INS_FRIP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIZD, PPC_INS_FRIZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIZDo, PPC_INS_FRIZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIZS, PPC_INS_FRIZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRIZSo, PPC_INS_FRIZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRSP, PPC_INS_FRSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRSPo, PPC_INS_FRSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRSQRTE, PPC_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRSQRTES, PPC_INS_FRSQRTES,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRSQRTESo, PPC_INS_FRSQRTES,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FRSQRTEo, PPC_INS_FRSQRTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSELD, PPC_INS_FSEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSELDo, PPC_INS_FSEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSELS, PPC_INS_FSEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSELSo, PPC_INS_FSEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSQRT, PPC_INS_FSQRT,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSQRTS, PPC_INS_FSQRTS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSQRTSo, PPC_INS_FSQRTS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSQRTo, PPC_INS_FSQRT,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSUB, PPC_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSUBS, PPC_INS_FSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSUBSo, PPC_INS_FSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_FSUBo, PPC_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ICBI, PPC_INS_ICBI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ICBT, PPC_INS_ICBT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ICBT, 0 }, 0, 0
-#endif
- },
- {
- PPC_ICCCI, PPC_INS_ICCCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
-#endif
- },
- {
- PPC_ISEL, PPC_INS_ISEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ISEL8, PPC_INS_ISEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ISYNC, PPC_INS_ISYNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LA, PPC_INS_LA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LBZ, PPC_INS_LBZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LBZ8, PPC_INS_LBZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LBZCIX, PPC_INS_LBZCIX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LBZU, PPC_INS_LBZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LBZU8, PPC_INS_LBZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LBZUX, PPC_INS_LBZUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LBZUX8, PPC_INS_LBZUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LBZX, PPC_INS_LBZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LBZX8, PPC_INS_LBZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LD, PPC_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LDARX, PPC_INS_LDARX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LDBRX, PPC_INS_LDBRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LDCIX, PPC_INS_LDCIX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LDU, PPC_INS_LDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LDUX, PPC_INS_LDUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LDX, PPC_INS_LDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LFD, PPC_INS_LFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LFDU, PPC_INS_LFDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LFDUX, PPC_INS_LFDUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LFDX, PPC_INS_LFDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LFIWAX, PPC_INS_LFIWAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LFIWZX, PPC_INS_LFIWZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LFS, PPC_INS_LFS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LFSU, PPC_INS_LFSU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LFSUX, PPC_INS_LFSUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LFSX, PPC_INS_LFSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHA, PPC_INS_LHA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHA8, PPC_INS_LHA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHAU, PPC_INS_LHAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHAU8, PPC_INS_LHAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHAUX, PPC_INS_LHAUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHAUX8, PPC_INS_LHAUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHAX, PPC_INS_LHAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHAX8, PPC_INS_LHAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHBRX, PPC_INS_LHBRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHBRX8, PPC_INS_LHBRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHZ, PPC_INS_LHZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHZ8, PPC_INS_LHZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHZCIX, PPC_INS_LHZCIX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHZU, PPC_INS_LHZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHZU8, PPC_INS_LHZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHZUX, PPC_INS_LHZUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHZUX8, PPC_INS_LHZUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHZX, PPC_INS_LHZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LHZX8, PPC_INS_LHZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LI, PPC_INS_LI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LI8, PPC_INS_LI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LIS, PPC_INS_LIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LIS8, PPC_INS_LIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LMW, PPC_INS_LMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LSWI, PPC_INS_LSWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LVEBX, PPC_INS_LVEBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_LVEHX, PPC_INS_LVEHX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_LVEWX, PPC_INS_LVEWX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_LVSL, PPC_INS_LVSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_LVSR, PPC_INS_LVSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_LVX, PPC_INS_LVX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_LVXL, PPC_INS_LVXL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_LWA, PPC_INS_LWA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWARX, PPC_INS_LWARX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWAUX, PPC_INS_LWAUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWAX, PPC_INS_LWAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWAX_32, PPC_INS_LWAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWA_32, PPC_INS_LWA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWBRX, PPC_INS_LWBRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWBRX8, PPC_INS_LWBRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWZ, PPC_INS_LWZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWZ8, PPC_INS_LWZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWZCIX, PPC_INS_LWZCIX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWZU, PPC_INS_LWZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWZU8, PPC_INS_LWZU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWZUX, PPC_INS_LWZUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWZUX8, PPC_INS_LWZUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWZX, PPC_INS_LWZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LWZX8, PPC_INS_LWZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_LXSDX, PPC_INS_LXSDX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_LXVD2X, PPC_INS_LXVD2X,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_LXVDSX, PPC_INS_LXVDSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_LXVW4X, PPC_INS_LXVW4X,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_MBAR, PPC_INS_MBAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
-#endif
- },
- {
- PPC_MCRF, PPC_INS_MCRF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MCRFS, PPC_INS_MCRFS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFCR, PPC_INS_MFCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFCR8, PPC_INS_MFCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFCTR, PPC_INS_MFCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFCTR8, PPC_INS_MFCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFDCR, PPC_INS_MFDCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
-#endif
- },
- {
- PPC_MFFS, PPC_INS_MFFS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFFSo, PPC_INS_MFFS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFLR, PPC_INS_MFLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_LR, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFLR8, PPC_INS_MFLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_LR8, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFMSR, PPC_INS_MFMSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFOCRF, PPC_INS_MFOCRF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFOCRF8, PPC_INS_MFOCRF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFSPR, PPC_INS_MFSPR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFSR, PPC_INS_MFSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFSRIN, PPC_INS_MFSRIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFTB, PPC_INS_MFTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFTB8, PPC_INS_MFSPR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFVRSAVE, PPC_INS_MFSPR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFVRSAVEv, PPC_INS_MFSPR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MFVSCR, PPC_INS_MFVSCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_MSYNC, PPC_INS_MSYNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTCRF, PPC_INS_MTCRF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTCRF8, PPC_INS_MTCRF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTCTR, PPC_INS_MTCTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTCTR8, PPC_INS_MTCTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTCTR8loop, PPC_INS_MTCTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTCTRloop, PPC_INS_MTCTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTDCR, PPC_INS_MTDCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
-#endif
- },
- {
- PPC_MTFSB0, PPC_INS_MTFSB0,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_RM, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTFSB1, PPC_INS_MTFSB1,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_RM, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTFSF, PPC_INS_MTFSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTFSFI, PPC_INS_MTFSFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTFSFIo, PPC_INS_MTFSFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTFSFb, PPC_INS_MTFSF,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_RM, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTFSFo, PPC_INS_MTFSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTLR, PPC_INS_MTLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTLR8, PPC_INS_MTLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTMSR, PPC_INS_MTMSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTMSRD, PPC_INS_MTMSRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTOCRF, PPC_INS_MTOCRF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTOCRF8, PPC_INS_MTOCRF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTSPR, PPC_INS_MTSPR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTSR, PPC_INS_MTSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTSRIN, PPC_INS_MTSRIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTVRSAVE, PPC_INS_MTSPR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTVRSAVEv, PPC_INS_MTSPR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MTVSCR, PPC_INS_MTVSCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_MULHD, PPC_INS_MULHD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULHDU, PPC_INS_MULHDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULHDUo, PPC_INS_MULHDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULHDo, PPC_INS_MULHD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULHW, PPC_INS_MULHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULHWU, PPC_INS_MULHWU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULHWUo, PPC_INS_MULHWU,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULHWo, PPC_INS_MULHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULLD, PPC_INS_MULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULLDo, PPC_INS_MULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULLI, PPC_INS_MULLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULLI8, PPC_INS_MULLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULLW, PPC_INS_MULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_MULLWo, PPC_INS_MULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NAND, PPC_INS_NAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NAND8, PPC_INS_NAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NAND8o, PPC_INS_NAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NANDo, PPC_INS_NAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NEG, PPC_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NEG8, PPC_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NEG8o, PPC_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NEGo, PPC_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NOP, PPC_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NOP_GT_PWR6, PPC_INS_ORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NOP_GT_PWR7, PPC_INS_ORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NOR, PPC_INS_NOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NOR8, PPC_INS_NOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NOR8o, PPC_INS_NOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_NORo, PPC_INS_NOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_OR, PPC_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_OR8, PPC_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_OR8o, PPC_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ORC, PPC_INS_ORC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ORC8, PPC_INS_ORC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ORC8o, PPC_INS_ORC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ORCo, PPC_INS_ORC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ORI, PPC_INS_ORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ORI8, PPC_INS_ORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ORIS, PPC_INS_ORIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ORIS8, PPC_INS_ORIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_ORo, PPC_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_POPCNTD, PPC_INS_POPCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_POPCNTW, PPC_INS_POPCNTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_QVALIGNI, PPC_INS_QVALIGNI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVALIGNIb, PPC_INS_QVALIGNI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVALIGNIs, PPC_INS_QVALIGNI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVESPLATI, PPC_INS_QVESPLATI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVESPLATIb, PPC_INS_QVESPLATI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVESPLATIs, PPC_INS_QVESPLATI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFABS, PPC_INS_QVFABS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFABSs, PPC_INS_QVFABS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFADD, PPC_INS_QVFADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFADDS, PPC_INS_QVFADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFADDSs, PPC_INS_QVFADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCFID, PPC_INS_QVFCFID,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCFIDS, PPC_INS_QVFCFIDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCFIDU, PPC_INS_QVFCFIDU,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCFIDUS, PPC_INS_QVFCFIDUS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCFIDb, PPC_INS_QVFCFID,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCMPEQ, PPC_INS_QVFCMPEQ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCMPEQb, PPC_INS_QVFCMPEQ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCMPEQbs, PPC_INS_QVFCMPEQ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCMPGT, PPC_INS_QVFCMPGT,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCMPGTb, PPC_INS_QVFCMPGT,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCMPGTbs, PPC_INS_QVFCMPGT,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCMPLT, PPC_INS_QVFCMPLT,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCMPLTb, PPC_INS_QVFCMPLT,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCMPLTbs, PPC_INS_QVFCMPLT,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCPSGN, PPC_INS_QVFCPSGN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCPSGNs, PPC_INS_QVFCPSGN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCTID, PPC_INS_QVFCTID,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCTIDU, PPC_INS_QVFCTIDU,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCTIDUZ, PPC_INS_QVFCTIDUZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCTIDZ, PPC_INS_QVFCTIDZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCTIDb, PPC_INS_QVFCTID,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCTIW, PPC_INS_QVFCTIW,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCTIWU, PPC_INS_QVFCTIWU,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCTIWUZ, PPC_INS_QVFCTIWUZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFCTIWZ, PPC_INS_QVFCTIWZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFLOGICAL, PPC_INS_QVFLOGICAL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFLOGICALb, PPC_INS_QVFLOGICAL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFLOGICALs, PPC_INS_QVFLOGICAL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMADD, PPC_INS_QVFMADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMADDS, PPC_INS_QVFMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMADDSs, PPC_INS_QVFMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMR, PPC_INS_QVFMR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMRb, PPC_INS_QVFMR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMRs, PPC_INS_QVFMR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMSUB, PPC_INS_QVFMSUB,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMSUBS, PPC_INS_QVFMSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMSUBSs, PPC_INS_QVFMSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMUL, PPC_INS_QVFMUL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMULS, PPC_INS_QVFMULS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFMULSs, PPC_INS_QVFMULS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFNABS, PPC_INS_QVFNABS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFNABSs, PPC_INS_QVFNABS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFNEG, PPC_INS_QVFNEG,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFNEGs, PPC_INS_QVFNEG,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFNMADD, PPC_INS_QVFNMADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFNMADDS, PPC_INS_QVFNMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFNMADDSs, PPC_INS_QVFNMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFNMSUB, PPC_INS_QVFNMSUB,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFNMSUBS, PPC_INS_QVFNMSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFNMSUBSs, PPC_INS_QVFNMSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFPERM, PPC_INS_QVFPERM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFPERMs, PPC_INS_QVFPERM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRE, PPC_INS_QVFRE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRES, PPC_INS_QVFRES,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRESs, PPC_INS_QVFRES,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRIM, PPC_INS_QVFRIM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRIMs, PPC_INS_QVFRIM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRIN, PPC_INS_QVFRIN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRINs, PPC_INS_QVFRIN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRIP, PPC_INS_QVFRIP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRIPs, PPC_INS_QVFRIP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRIZ, PPC_INS_QVFRIZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRIZs, PPC_INS_QVFRIZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRSP, PPC_INS_QVFRSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRSPs, PPC_INS_QVFRSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRSQRTE, PPC_INS_QVFRSQRTE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRSQRTES, PPC_INS_QVFRSQRTES,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFRSQRTESs, PPC_INS_QVFRSQRTES,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFSEL, PPC_INS_QVFSEL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFSELb, PPC_INS_QVFSEL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFSELbb, PPC_INS_QVFSEL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFSELbs, PPC_INS_QVFSEL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFSUB, PPC_INS_QVFSUB,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFSUBS, PPC_INS_QVFSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFSUBSs, PPC_INS_QVFSUBS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFTSTNAN, PPC_INS_QVFTSTNAN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFTSTNANb, PPC_INS_QVFTSTNAN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFTSTNANbs, PPC_INS_QVFTSTNAN,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFXMADD, PPC_INS_QVFXMADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFXMADDS, PPC_INS_QVFXMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFXMUL, PPC_INS_QVFXMUL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFXMULS, PPC_INS_QVFXMULS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFXXCPNMADD, PPC_INS_QVFXXCPNMADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFXXCPNMADDS, PPC_INS_QVFXXCPNMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFXXMADD, PPC_INS_QVFXXMADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFXXMADDS, PPC_INS_QVFXXMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFXXNPMADD, PPC_INS_QVFXXNPMADD,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVFXXNPMADDS, PPC_INS_QVFXXNPMADDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVGPCI, PPC_INS_QVGPCI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFCDUX, PPC_INS_QVLFCDUX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFCDUXA, PPC_INS_QVLFCDUXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFCDX, PPC_INS_QVLFCDX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFCDXA, PPC_INS_QVLFCDXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFCSUX, PPC_INS_QVLFCSUX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFCSUXA, PPC_INS_QVLFCSUXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFCSX, PPC_INS_QVLFCSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFCSXA, PPC_INS_QVLFCSXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFCSXs, PPC_INS_QVLFCSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFDUX, PPC_INS_QVLFDUX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFDUXA, PPC_INS_QVLFDUXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFDX, PPC_INS_QVLFDX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFDXA, PPC_INS_QVLFDXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFDXb, PPC_INS_QVLFDX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFIWAX, PPC_INS_QVLFIWAX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFIWAXA, PPC_INS_QVLFIWAXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFIWZX, PPC_INS_QVLFIWZX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFIWZXA, PPC_INS_QVLFIWZXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFSUX, PPC_INS_QVLFSUX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFSUXA, PPC_INS_QVLFSUXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFSX, PPC_INS_QVLFSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFSXA, PPC_INS_QVLFSXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFSXb, PPC_INS_QVLFSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLFSXs, PPC_INS_QVLFSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLPCLDX, PPC_INS_QVLPCLDX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLPCLSX, PPC_INS_QVLPCLSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLPCLSXint, PPC_INS_QVLPCLSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLPCRDX, PPC_INS_QVLPCRDX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVLPCRSX, PPC_INS_QVLPCRSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCDUX, PPC_INS_QVSTFCDUX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCDUXA, PPC_INS_QVSTFCDUXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCDUXI, PPC_INS_QVSTFCDUXI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCDUXIA, PPC_INS_QVSTFCDUXIA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCDX, PPC_INS_QVSTFCDX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCDXA, PPC_INS_QVSTFCDXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCDXI, PPC_INS_QVSTFCDXI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCDXIA, PPC_INS_QVSTFCDXIA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCSUX, PPC_INS_QVSTFCSUX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCSUXA, PPC_INS_QVSTFCSUXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCSUXI, PPC_INS_QVSTFCSUXI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCSUXIA, PPC_INS_QVSTFCSUXIA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCSX, PPC_INS_QVSTFCSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCSXA, PPC_INS_QVSTFCSXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCSXI, PPC_INS_QVSTFCSXI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCSXIA, PPC_INS_QVSTFCSXIA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFCSXs, PPC_INS_QVSTFCSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFDUX, PPC_INS_QVSTFDUX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFDUXA, PPC_INS_QVSTFDUXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFDUXI, PPC_INS_QVSTFDUXI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFDUXIA, PPC_INS_QVSTFDUXIA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFDX, PPC_INS_QVSTFDX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFDXA, PPC_INS_QVSTFDXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFDXI, PPC_INS_QVSTFDXI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFDXIA, PPC_INS_QVSTFDXIA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFDXb, PPC_INS_QVSTFDX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFIWX, PPC_INS_QVSTFIWX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFIWXA, PPC_INS_QVSTFIWXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFSUX, PPC_INS_QVSTFSUX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFSUXA, PPC_INS_QVSTFSUXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFSUXI, PPC_INS_QVSTFSUXI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFSUXIA, PPC_INS_QVSTFSUXIA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFSUXs, PPC_INS_QVSTFSUX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFSX, PPC_INS_QVSTFSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFSXA, PPC_INS_QVSTFSXA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFSXI, PPC_INS_QVSTFSXI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFSXIA, PPC_INS_QVSTFSXIA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_QVSTFSXs, PPC_INS_QVSTFSX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
-#endif
- },
- {
- PPC_RFCI, PPC_INS_RFCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
-#endif
- },
- {
- PPC_RFDI, PPC_INS_RFDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_E500, 0 }, 0, 0
-#endif
- },
- {
- PPC_RFI, PPC_INS_RFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
-#endif
- },
- {
- PPC_RFID, PPC_INS_RFID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RFMCI, PPC_INS_RFMCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_E500, 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDCL, PPC_INS_RLDCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDCLo, PPC_INS_RLDCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDCR, PPC_INS_RLDCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDCRo, PPC_INS_RLDCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDIC, PPC_INS_RLDIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDICL, PPC_INS_RLDICL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDICL_32_64, PPC_INS_RLDICL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDICLo, PPC_INS_RLDICL,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDICR, PPC_INS_RLDICR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDICRo, PPC_INS_RLDICR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDICo, PPC_INS_RLDIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDIMI, PPC_INS_RLDIMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLDIMIo, PPC_INS_RLDIMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWIMI, PPC_INS_RLWIMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWIMI8, PPC_INS_RLWIMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWIMI8o, PPC_INS_RLWIMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWIMIo, PPC_INS_RLWIMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWINM, PPC_INS_RLWINM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWINM8, PPC_INS_RLWINM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWINM8o, PPC_INS_RLWINM,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWINMo, PPC_INS_RLWINM,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWNM, PPC_INS_RLWNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWNM8, PPC_INS_RLWNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWNM8o, PPC_INS_RLWNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_RLWNMo, PPC_INS_RLWNM,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SC, PPC_INS_SC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SLBIA, PPC_INS_SLBIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SLBIE, PPC_INS_SLBIE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SLBMFEE, PPC_INS_SLBMFEE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SLBMTE, PPC_INS_SLBMTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SLD, PPC_INS_SLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SLDo, PPC_INS_SLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SLW, PPC_INS_SLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SLW8, PPC_INS_SLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SLW8o, PPC_INS_SLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SLWo, PPC_INS_SLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRAD, PPC_INS_SRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRADI, PPC_INS_SRADI,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRADIo, PPC_INS_SRADI,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRADo, PPC_INS_SRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRAW, PPC_INS_SRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRAWI, PPC_INS_SRAWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRAWIo, PPC_INS_SRAWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRAWo, PPC_INS_SRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRD, PPC_INS_SRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRDo, PPC_INS_SRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRW, PPC_INS_SRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRW8, PPC_INS_SRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRW8o, PPC_INS_SRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SRWo, PPC_INS_SRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STB, PPC_INS_STB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STB8, PPC_INS_STB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STBCIX, PPC_INS_STBCIX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STBU, PPC_INS_STBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STBU8, PPC_INS_STBU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STBUX, PPC_INS_STBUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STBUX8, PPC_INS_STBUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STBX, PPC_INS_STBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STBX8, PPC_INS_STBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STD, PPC_INS_STD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STDBRX, PPC_INS_STDBRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STDCIX, PPC_INS_STDCIX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STDCX, PPC_INS_STDCX,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STDU, PPC_INS_STDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STDUX, PPC_INS_STDUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STDX, PPC_INS_STDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STFD, PPC_INS_STFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STFDU, PPC_INS_STFDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STFDUX, PPC_INS_STFDUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STFDX, PPC_INS_STFDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STFIWX, PPC_INS_STFIWX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STFS, PPC_INS_STFS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STFSU, PPC_INS_STFSU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STFSUX, PPC_INS_STFSUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STFSX, PPC_INS_STFSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STH, PPC_INS_STH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STH8, PPC_INS_STH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STHBRX, PPC_INS_STHBRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STHCIX, PPC_INS_STHCIX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STHU, PPC_INS_STHU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STHU8, PPC_INS_STHU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STHUX, PPC_INS_STHUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STHUX8, PPC_INS_STHUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STHX, PPC_INS_STHX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STHX8, PPC_INS_STHX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STMW, PPC_INS_STMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STSWI, PPC_INS_STSWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STVEBX, PPC_INS_STVEBX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_STVEHX, PPC_INS_STVEHX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_STVEWX, PPC_INS_STVEWX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_STVX, PPC_INS_STVX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_STVXL, PPC_INS_STVXL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_STW, PPC_INS_STW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STW8, PPC_INS_STW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STWBRX, PPC_INS_STWBRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STWCIX, PPC_INS_STWCIX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STWCX, PPC_INS_STWCX,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STWU, PPC_INS_STWU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STWU8, PPC_INS_STWU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STWUX, PPC_INS_STWUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STWUX8, PPC_INS_STWUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STWX, PPC_INS_STWX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STWX8, PPC_INS_STWX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_STXSDX, PPC_INS_STXSDX,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_STXVD2X, PPC_INS_STXVD2X,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_STXVW4X, PPC_INS_STXVW4X,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBF, PPC_INS_SUBF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBF8, PPC_INS_SUBF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBF8o, PPC_INS_SUBF,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFC, PPC_INS_SUBFC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFC8, PPC_INS_SUBFC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFC8o, PPC_INS_SUBFC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFCo, PPC_INS_SUBFC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFE, PPC_INS_SUBFE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFE8, PPC_INS_SUBFE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFE8o, PPC_INS_SUBFE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFEo, PPC_INS_SUBFE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFIC, PPC_INS_SUBFIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFIC8, PPC_INS_SUBFIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFME, PPC_INS_SUBFME,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFME8, PPC_INS_SUBFME,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFME8o, PPC_INS_SUBFME,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFMEo, PPC_INS_SUBFME,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFZE, PPC_INS_SUBFZE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFZE8, PPC_INS_SUBFZE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFZE8o, PPC_INS_SUBFZE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFZEo, PPC_INS_SUBFZE,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SUBFo, PPC_INS_SUBF,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_SYNC, PPC_INS_SYNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_TAILB, PPC_INS_B,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_TAILB8, PPC_INS_B,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_TAILBA, PPC_INS_BA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_TAILBA8, PPC_INS_BA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- PPC_TAILBCTR, PPC_INS_BCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE32, 0 }, 1, 1
-#endif
- },
- {
- PPC_TAILBCTR8, PPC_INS_BCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR8, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1
-#endif
- },
- {
- PPC_TD, PPC_INS_TD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_TDI, PPC_INS_TDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBIA, PPC_INS_TLBIA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBIE, PPC_INS_TLBIE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBIEL, PPC_INS_TLBIEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBIVAX, PPC_INS_TLBIVAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBLD, PPC_INS_TLBLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_PPC6XX, 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBLI, PPC_INS_TLBLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_PPC6XX, 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBRE, PPC_INS_TLBRE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBRE2, PPC_INS_TLBRE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBSX, PPC_INS_TLBSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBSX2, PPC_INS_TLBSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBSX2D, PPC_INS_TLBSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBSYNC, PPC_INS_TLBSYNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBWE, PPC_INS_TLBWE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
-#endif
- },
- {
- PPC_TLBWE2, PPC_INS_TLBWE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
-#endif
- },
- {
- PPC_TRAP, PPC_INS_TRAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_TW, PPC_INS_TW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_TWI, PPC_INS_TWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDCUW, PPC_INS_VADDCUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDFP, PPC_INS_VADDFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDSBS, PPC_INS_VADDSBS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDSHS, PPC_INS_VADDSHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDSWS, PPC_INS_VADDSWS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDUBM, PPC_INS_VADDUBM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDUBS, PPC_INS_VADDUBS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDUDM, PPC_INS_VADDUDM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDUHM, PPC_INS_VADDUHM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDUHS, PPC_INS_VADDUHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDUWM, PPC_INS_VADDUWM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VADDUWS, PPC_INS_VADDUWS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VAND, PPC_INS_VAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VANDC, PPC_INS_VANDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VAVGSB, PPC_INS_VAVGSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VAVGSH, PPC_INS_VAVGSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VAVGSW, PPC_INS_VAVGSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VAVGUB, PPC_INS_VAVGUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VAVGUH, PPC_INS_VAVGUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VAVGUW, PPC_INS_VAVGUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCFSX, PPC_INS_VCFSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCFSX_0, PPC_INS_VCFSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCFUX, PPC_INS_VCFUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCFUX_0, PPC_INS_VCFUX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCLZB, PPC_INS_VCLZB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCLZD, PPC_INS_VCLZD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCLZH, PPC_INS_VCLZH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCLZW, PPC_INS_VCLZW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPBFP, PPC_INS_VCMPBFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPBFPo, PPC_INS_VCMPBFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPEQFP, PPC_INS_VCMPEQFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPEQFPo, PPC_INS_VCMPEQFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPEQUB, PPC_INS_VCMPEQUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPEQUBo, PPC_INS_VCMPEQUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPEQUD, PPC_INS_VCMPEQUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPEQUDo, PPC_INS_VCMPEQUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPEQUH, PPC_INS_VCMPEQUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPEQUHo, PPC_INS_VCMPEQUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPEQUW, PPC_INS_VCMPEQUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPEQUWo, PPC_INS_VCMPEQUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGEFP, PPC_INS_VCMPGEFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGEFPo, PPC_INS_VCMPGEFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTFP, PPC_INS_VCMPGTFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTFPo, PPC_INS_VCMPGTFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTSB, PPC_INS_VCMPGTSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTSBo, PPC_INS_VCMPGTSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTSD, PPC_INS_VCMPGTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTSDo, PPC_INS_VCMPGTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTSH, PPC_INS_VCMPGTSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTSHo, PPC_INS_VCMPGTSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTSW, PPC_INS_VCMPGTSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTSWo, PPC_INS_VCMPGTSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTUB, PPC_INS_VCMPGTUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTUBo, PPC_INS_VCMPGTUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTUD, PPC_INS_VCMPGTUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTUDo, PPC_INS_VCMPGTUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTUH, PPC_INS_VCMPGTUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTUHo, PPC_INS_VCMPGTUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTUW, PPC_INS_VCMPGTUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCMPGTUWo, PPC_INS_VCMPGTUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCTSXS, PPC_INS_VCTSXS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCTSXS_0, PPC_INS_VCTSXS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCTUXS, PPC_INS_VCTUXS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VCTUXS_0, PPC_INS_VCTUXS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VEQV, PPC_INS_VEQV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VEXPTEFP, PPC_INS_VEXPTEFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VLOGEFP, PPC_INS_VLOGEFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMADDFP, PPC_INS_VMADDFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMAXFP, PPC_INS_VMAXFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMAXSB, PPC_INS_VMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMAXSD, PPC_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMAXSH, PPC_INS_VMAXSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMAXSW, PPC_INS_VMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMAXUB, PPC_INS_VMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMAXUD, PPC_INS_VMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMAXUH, PPC_INS_VMAXUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMAXUW, PPC_INS_VMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMHADDSHS, PPC_INS_VMHADDSHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMHRADDSHS, PPC_INS_VMHRADDSHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMIDUD, PPC_INS_VMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMINFP, PPC_INS_VMINFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMINSB, PPC_INS_VMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMINSD, PPC_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMINSH, PPC_INS_VMINSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMINSW, PPC_INS_VMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMINUB, PPC_INS_VMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMINUH, PPC_INS_VMINUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMINUW, PPC_INS_VMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMLADDUHM, PPC_INS_VMLADDUHM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMRGHB, PPC_INS_VMRGHB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMRGHH, PPC_INS_VMRGHH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMRGHW, PPC_INS_VMRGHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMRGLB, PPC_INS_VMRGLB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMRGLH, PPC_INS_VMRGLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMRGLW, PPC_INS_VMRGLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMSUMMBM, PPC_INS_VMSUMMBM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMSUMSHM, PPC_INS_VMSUMSHM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMSUMSHS, PPC_INS_VMSUMSHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMSUMUBM, PPC_INS_VMSUMUBM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMSUMUHM, PPC_INS_VMSUMUHM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMSUMUHS, PPC_INS_VMSUMUHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULESB, PPC_INS_VMULESB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULESH, PPC_INS_VMULESH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULESW, PPC_INS_VMULESW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULEUB, PPC_INS_VMULEUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULEUH, PPC_INS_VMULEUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULEUW, PPC_INS_VMULEUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULOSB, PPC_INS_VMULOSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULOSH, PPC_INS_VMULOSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULOSW, PPC_INS_VMULOSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULOUB, PPC_INS_VMULOUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULOUH, PPC_INS_VMULOUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULOUW, PPC_INS_VMULOUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VMULUWM, PPC_INS_VMULUWM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VNAND, PPC_INS_VNAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VNMSUBFP, PPC_INS_VNMSUBFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VNOR, PPC_INS_VNOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VOR, PPC_INS_VOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VORC, PPC_INS_VORC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPERM, PPC_INS_VPERM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPKPX, PPC_INS_VPKPX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPKSHSS, PPC_INS_VPKSHSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPKSHUS, PPC_INS_VPKSHUS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPKSWSS, PPC_INS_VPKSWSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPKSWUS, PPC_INS_VPKSWUS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPKUHUM, PPC_INS_VPKUHUM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPKUHUS, PPC_INS_VPKUHUS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPKUWUM, PPC_INS_VPKUWUM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPKUWUS, PPC_INS_VPKUWUS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPOPCNTB, PPC_INS_VPOPCNTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPOPCNTD, PPC_INS_VPOPCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPOPCNTH, PPC_INS_VPOPCNTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VPOPCNTW, PPC_INS_VPOPCNTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VREFP, PPC_INS_VREFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VRFIM, PPC_INS_VRFIM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VRFIN, PPC_INS_VRFIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VRFIP, PPC_INS_VRFIP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VRFIZ, PPC_INS_VRFIZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VRLB, PPC_INS_VRLB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VRLD, PPC_INS_VRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VRLH, PPC_INS_VRLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VRLW, PPC_INS_VRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VRSQRTEFP, PPC_INS_VRSQRTEFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSEL, PPC_INS_VSEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSL, PPC_INS_VSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSLB, PPC_INS_VSLB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSLD, PPC_INS_VSLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSLDOI, PPC_INS_VSLDOI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSLH, PPC_INS_VSLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSLO, PPC_INS_VSLO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSLW, PPC_INS_VSLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSPLTB, PPC_INS_VSPLTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSPLTH, PPC_INS_VSPLTH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSPLTISB, PPC_INS_VSPLTISB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSPLTISH, PPC_INS_VSPLTISH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSPLTISW, PPC_INS_VSPLTISW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSPLTW, PPC_INS_VSPLTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSR, PPC_INS_VSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSRAB, PPC_INS_VSRAB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSRAD, PPC_INS_VSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSRAH, PPC_INS_VSRAH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSRAW, PPC_INS_VSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSRB, PPC_INS_VSRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSRD, PPC_INS_VSRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSRH, PPC_INS_VSRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSRO, PPC_INS_VSRO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSRW, PPC_INS_VSRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBCUW, PPC_INS_VSUBCUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBFP, PPC_INS_VSUBFP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBSBS, PPC_INS_VSUBSBS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBSHS, PPC_INS_VSUBSHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBSWS, PPC_INS_VSUBSWS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBUBM, PPC_INS_VSUBUBM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBUBS, PPC_INS_VSUBUBS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBUDM, PPC_INS_VSUBUDM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBUHM, PPC_INS_VSUBUHM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBUHS, PPC_INS_VSUBUHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBUWM, PPC_INS_VSUBUWM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUBUWS, PPC_INS_VSUBUWS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUM2SWS, PPC_INS_VSUM2SWS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUM4SBS, PPC_INS_VSUM4SBS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUM4SHS, PPC_INS_VSUM4SHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUM4UBS, PPC_INS_VSUM4UBS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VSUMSWS, PPC_INS_VSUMSWS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VUPKHPX, PPC_INS_VUPKHPX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VUPKHSB, PPC_INS_VUPKHSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VUPKHSH, PPC_INS_VUPKHSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VUPKLPX, PPC_INS_VUPKLPX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VUPKLSB, PPC_INS_VUPKLSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VUPKLSH, PPC_INS_VUPKLSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_VXOR, PPC_INS_VXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_V_SET0, PPC_INS_VXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_V_SET0B, PPC_INS_VXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_V_SET0H, PPC_INS_VXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_V_SETALLONES, PPC_INS_VSPLTISW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_V_SETALLONESB, PPC_INS_VSPLTISW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_V_SETALLONESH, PPC_INS_VSPLTISW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
-#endif
- },
- {
- PPC_WAIT, PPC_INS_WAIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_WRTEE, PPC_INS_WRTEE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
-#endif
- },
- {
- PPC_WRTEEI, PPC_INS_WRTEEI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
-#endif
- },
- {
- PPC_XOR, PPC_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_XOR8, PPC_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_XOR8o, PPC_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_XORI, PPC_INS_XORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_XORI8, PPC_INS_XORI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_XORIS, PPC_INS_XORIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_XORIS8, PPC_INS_XORIS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_XORo, PPC_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_XSABSDP, PPC_INS_XSABSDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSADDDP, PPC_INS_XSADDDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCMPODP, PPC_INS_XSCMPODP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCMPUDP, PPC_INS_XSCMPUDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCPSGNDP, PPC_INS_XSCPSGNDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCVDPSP, PPC_INS_XSCVDPSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCVDPSXDS, PPC_INS_XSCVDPSXDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCVDPSXWS, PPC_INS_XSCVDPSXWS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCVDPUXDS, PPC_INS_XSCVDPUXDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCVDPUXWS, PPC_INS_XSCVDPUXWS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCVSPDP, PPC_INS_XSCVSPDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCVSXDDP, PPC_INS_XSCVSXDDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSCVUXDDP, PPC_INS_XSCVUXDDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSDIVDP, PPC_INS_XSDIVDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSMADDADP, PPC_INS_XSMADDADP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSMADDMDP, PPC_INS_XSMADDMDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSMAXDP, PPC_INS_XSMAXDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSMINDP, PPC_INS_XSMINDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSMSUBADP, PPC_INS_XSMSUBADP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSMSUBMDP, PPC_INS_XSMSUBMDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSMULDP, PPC_INS_XSMULDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSNABSDP, PPC_INS_XSNABSDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSNEGDP, PPC_INS_XSNEGDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSNMADDADP, PPC_INS_XSNMADDADP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSNMADDMDP, PPC_INS_XSNMADDMDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSNMSUBADP, PPC_INS_XSNMSUBADP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSNMSUBMDP, PPC_INS_XSNMSUBMDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSRDPI, PPC_INS_XSRDPI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSRDPIC, PPC_INS_XSRDPIC,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSRDPIM, PPC_INS_XSRDPIM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSRDPIP, PPC_INS_XSRDPIP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSRDPIZ, PPC_INS_XSRDPIZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSREDP, PPC_INS_XSREDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSRSQRTEDP, PPC_INS_XSRSQRTEDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSSQRTDP, PPC_INS_XSSQRTDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSSUBDP, PPC_INS_XSSUBDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSTDIVDP, PPC_INS_XSTDIVDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XSTSQRTDP, PPC_INS_XSTSQRTDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVABSDP, PPC_INS_XVABSDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVABSSP, PPC_INS_XVABSSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVADDDP, PPC_INS_XVADDDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVADDSP, PPC_INS_XVADDSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPEQDP, PPC_INS_XVCMPEQDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPEQDPo, PPC_INS_XVCMPEQDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPEQSP, PPC_INS_XVCMPEQSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPEQSPo, PPC_INS_XVCMPEQSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPGEDP, PPC_INS_XVCMPGEDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPGEDPo, PPC_INS_XVCMPGEDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPGESP, PPC_INS_XVCMPGESP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPGESPo, PPC_INS_XVCMPGESP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPGTDP, PPC_INS_XVCMPGTDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPGTDPo, PPC_INS_XVCMPGTDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPGTSP, PPC_INS_XVCMPGTSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCMPGTSPo, PPC_INS_XVCMPGTSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCPSGNDP, PPC_INS_XVCPSGNDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCPSGNSP, PPC_INS_XVCPSGNSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVDPSP, PPC_INS_XVCVDPSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVDPSXDS, PPC_INS_XVCVDPSXDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVDPSXWS, PPC_INS_XVCVDPSXWS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVDPUXDS, PPC_INS_XVCVDPUXDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVDPUXWS, PPC_INS_XVCVDPUXWS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVSPDP, PPC_INS_XVCVSPDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVSPSXDS, PPC_INS_XVCVSPSXDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVSPSXWS, PPC_INS_XVCVSPSXWS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVSPUXDS, PPC_INS_XVCVSPUXDS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVSPUXWS, PPC_INS_XVCVSPUXWS,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVSXDDP, PPC_INS_XVCVSXDDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVSXDSP, PPC_INS_XVCVSXDSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVSXWDP, PPC_INS_XVCVSXWDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVSXWSP, PPC_INS_XVCVSXWSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVUXDDP, PPC_INS_XVCVUXDDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVUXDSP, PPC_INS_XVCVUXDSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVUXWDP, PPC_INS_XVCVUXWDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVCVUXWSP, PPC_INS_XVCVUXWSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVDIVDP, PPC_INS_XVDIVDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVDIVSP, PPC_INS_XVDIVSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMADDADP, PPC_INS_XVMADDADP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMADDASP, PPC_INS_XVMADDASP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMADDMDP, PPC_INS_XVMADDMDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMADDMSP, PPC_INS_XVMADDMSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMAXDP, PPC_INS_XVMAXDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMAXSP, PPC_INS_XVMAXSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMINDP, PPC_INS_XVMINDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMINSP, PPC_INS_XVMINSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMSUBADP, PPC_INS_XVMSUBADP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMSUBASP, PPC_INS_XVMSUBASP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMSUBMDP, PPC_INS_XVMSUBMDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMSUBMSP, PPC_INS_XVMSUBMSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMULDP, PPC_INS_XVMULDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVMULSP, PPC_INS_XVMULSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNABSDP, PPC_INS_XVNABSDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNABSSP, PPC_INS_XVNABSSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNEGDP, PPC_INS_XVNEGDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNEGSP, PPC_INS_XVNEGSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNMADDADP, PPC_INS_XVNMADDADP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNMADDASP, PPC_INS_XVNMADDASP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNMADDMDP, PPC_INS_XVNMADDMDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNMADDMSP, PPC_INS_XVNMADDMSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNMSUBADP, PPC_INS_XVNMSUBADP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNMSUBASP, PPC_INS_XVNMSUBASP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNMSUBMDP, PPC_INS_XVNMSUBMDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVNMSUBMSP, PPC_INS_XVNMSUBMSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRDPI, PPC_INS_XVRDPI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRDPIC, PPC_INS_XVRDPIC,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRDPIM, PPC_INS_XVRDPIM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRDPIP, PPC_INS_XVRDPIP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRDPIZ, PPC_INS_XVRDPIZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVREDP, PPC_INS_XVREDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRESP, PPC_INS_XVRESP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRSPI, PPC_INS_XVRSPI,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRSPIC, PPC_INS_XVRSPIC,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRSPIM, PPC_INS_XVRSPIM,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRSPIP, PPC_INS_XVRSPIP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRSPIZ, PPC_INS_XVRSPIZ,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRSQRTEDP, PPC_INS_XVRSQRTEDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVRSQRTESP, PPC_INS_XVRSQRTESP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVSQRTDP, PPC_INS_XVSQRTDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVSQRTSP, PPC_INS_XVSQRTSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVSUBDP, PPC_INS_XVSUBDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVSUBSP, PPC_INS_XVSUBSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVTDIVDP, PPC_INS_XVTDIVDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVTDIVSP, PPC_INS_XVTDIVSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVTSQRTDP, PPC_INS_XVTSQRTDP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XVTSQRTSP, PPC_INS_XVTSQRTSP,
-#ifndef CAPSTONE_DIET
- { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXLAND, PPC_INS_XXLAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXLANDC, PPC_INS_XXLANDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXLEQV, PPC_INS_XXLEQV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8VECTOR, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXLNAND, PPC_INS_XXLNAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8VECTOR, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXLNOR, PPC_INS_XXLNOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXLOR, PPC_INS_XXLOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXLORC, PPC_INS_XXLORC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_P8VECTOR, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXLORf, PPC_INS_XXLOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXLXOR, PPC_INS_XXLXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXMRGHW, PPC_INS_XXMRGHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXMRGLW, PPC_INS_XXMRGLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXPERMDI, PPC_INS_XXPERMDI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXSEL, PPC_INS_XXSEL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXSLDWI, PPC_INS_XXSLDWI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_XXSPLTW, PPC_INS_XXSPLTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
-#endif
- },
- {
- PPC_gBC, PPC_INS_BC,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_gBCA, PPC_INS_BCA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_gBCCTR, PPC_INS_BCCTR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_gBCCTRL, PPC_INS_BCCTRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_gBCL, PPC_INS_BCL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_gBCLA, PPC_INS_BCLA,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_gBCLR, PPC_INS_BCLR,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- PPC_gBCLRL, PPC_INS_BCLRL,
-#ifndef CAPSTONE_DIET
- { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0
-#endif
- },
+#include "PPCMappingInsn.inc"
};
// given internal insn id, return public instruction info
diff --git a/arch/PowerPC/PPCMappingInsn.inc b/arch/PowerPC/PPCMappingInsn.inc
new file mode 100644
index 0000000..a976566
--- /dev/null
+++ b/arch/PowerPC/PPCMappingInsn.inc
@@ -0,0 +1,8055 @@
+// This is auto-gen data for Capstone engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{
+ PPC_ADD4, PPC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADD4TLS, PPC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADD4o, PPC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADD8, PPC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADD8TLS, PPC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADD8TLS_, PPC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADD8o, PPC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDC, PPC_INS_ADDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDC8, PPC_INS_ADDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDC8o, PPC_INS_ADDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDCo, PPC_INS_ADDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDE, PPC_INS_ADDE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDE8, PPC_INS_ADDE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDE8o, PPC_INS_ADDE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDEo, PPC_INS_ADDE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDI, PPC_INS_ADDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDI8, PPC_INS_ADDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDIC, PPC_INS_ADDIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDIC8, PPC_INS_ADDIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDICo, PPC_INS_ADDIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDIS, PPC_INS_ADDIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDIS8, PPC_INS_ADDIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDME, PPC_INS_ADDME,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDME8, PPC_INS_ADDME,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDME8o, PPC_INS_ADDME,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDMEo, PPC_INS_ADDME,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDZE, PPC_INS_ADDZE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDZE8, PPC_INS_ADDZE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDZE8o, PPC_INS_ADDZE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ADDZEo, PPC_INS_ADDZE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_AND, PPC_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_AND8, PPC_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_AND8o, PPC_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ANDC, PPC_INS_ANDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ANDC8, PPC_INS_ANDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ANDC8o, PPC_INS_ANDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ANDCo, PPC_INS_ANDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ANDISo, PPC_INS_ANDIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ANDISo8, PPC_INS_ANDIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ANDIo, PPC_INS_ANDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ANDIo8, PPC_INS_ANDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ANDo, PPC_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ATTN, PPC_INS_ATTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_B, PPC_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BA, PPC_INS_BA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BC, PPC_INS_BC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BCC, PPC_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BCCA, PPC_INS_BA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BCCCTR, PPC_INS_BCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ PPC_BCCCTR8, PPC_INS_BCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1
+#endif
+},
+{
+ PPC_BCCCTRL, PPC_INS_BCTRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCCCTRL8, PPC_INS_BCTRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCCL, PPC_INS_BL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCCLA, PPC_INS_BLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCCLR, PPC_INS_BLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_LR, PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BCCLRL, PPC_INS_BLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCCTR, PPC_INS_BCCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ PPC_BCCTR8, PPC_INS_BCCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1
+#endif
+},
+{
+ PPC_BCCTR8n, PPC_INS_BCCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1
+#endif
+},
+{
+ PPC_BCCTRL, PPC_INS_BCCTRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCCTRL8, PPC_INS_BCCTRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCCTRL8n, PPC_INS_BCCTRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCCTRLn, PPC_INS_BCCTRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCCTRn, PPC_INS_BCCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ PPC_BCL, PPC_INS_BCL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCLR, PPC_INS_BCLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_LR, PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BCLRL, PPC_INS_BCLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCLRLn, PPC_INS_BCLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCLRn, PPC_INS_BCLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BCLalways, PPC_INS_BCL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCLn, PPC_INS_BCL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCTR, PPC_INS_BCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ PPC_BCTR8, PPC_INS_BCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1
+#endif
+},
+{
+ PPC_BCTRL, PPC_INS_BCTRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { PPC_GRP_MODE32, 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCTRL8, PPC_INS_BCTRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCTRL8_LDinto_toc, PPC_INS_BCT, // FIXME
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, PPC_REG_RM, 0 }, { PPC_REG_LR8, PPC_REG_X2, 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ PPC_BCn, PPC_INS_BC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZ, PPC_INS_BDNZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZ8, PPC_INS_BDNZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZA, PPC_INS_BDNZA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZAm, PPC_INS_BDNZA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZAp, PPC_INS_BDNZA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZL, PPC_INS_BDNZL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDNZLA, PPC_INS_BDNZLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDNZLAm, PPC_INS_BDNZLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDNZLAp, PPC_INS_BDNZLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDNZLR, PPC_INS_BDNZLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZLR8, PPC_INS_BDNZLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, PPC_REG_LR8, PPC_REG_RM, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZLRL, PPC_INS_BDNZLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDNZLRLm, PPC_INS_BDNZLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDNZLRLp, PPC_INS_BDNZLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDNZLRm, PPC_INS_BDNZLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZLRp, PPC_INS_BDNZLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZLm, PPC_INS_BDNZL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDNZLp, PPC_INS_BDNZL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDNZm, PPC_INS_BDNZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDNZp, PPC_INS_BDNZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZ, PPC_INS_BDZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZ8, PPC_INS_BDZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZA, PPC_INS_BDZA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZAm, PPC_INS_BDZA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZAp, PPC_INS_BDZA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZL, PPC_INS_BDZL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDZLA, PPC_INS_BDZLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDZLAm, PPC_INS_BDZLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDZLAp, PPC_INS_BDZLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDZLR, PPC_INS_BDZLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZLR8, PPC_INS_BDZLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, PPC_REG_LR8, PPC_REG_RM, 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZLRL, PPC_INS_BDZLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDZLRLm, PPC_INS_BDZLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDZLRLp, PPC_INS_BDZLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDZLRm, PPC_INS_BDZLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZLRp, PPC_INS_BDZLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZLm, PPC_INS_BDZL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDZLp, PPC_INS_BDZL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BDZm, PPC_INS_BDZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BDZp, PPC_INS_BDZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_BL, PPC_INS_BL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BL8, PPC_INS_BL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BL8_NOP, PPC_INS_BL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BL8_NOP_TLS, PPC_INS_BL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BL8_TLS, PPC_INS_BL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BL8_TLS_, PPC_INS_BL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BLA, PPC_INS_BLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BLA8, PPC_INS_BLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BLA8_NOP, PPC_INS_BLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BLR, PPC_INS_BLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_LR, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE32, 0 }, 0, 0
+#endif
+},
+{
+ PPC_BLR8, PPC_INS_BLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_LR8, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ PPC_BLRL, PPC_INS_BLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BL_TLS, PPC_INS_BL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_BRINC, PPC_INS_BRINC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_CMPB, PPC_INS_CMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CMPB8, PPC_INS_CMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CMPD, PPC_INS_CMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CMPDI, PPC_INS_CMPDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CMPLD, PPC_INS_CMPLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CMPLDI, PPC_INS_CMPLDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CMPLW, PPC_INS_CMPLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CMPLWI, PPC_INS_CMPLWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CMPW, PPC_INS_CMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CMPWI, PPC_INS_CMPWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CNTLZD, PPC_INS_CNTLZD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CNTLZDo, PPC_INS_CNTLZD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CNTLZW, PPC_INS_CNTLZW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CNTLZW8, PPC_INS_CNTLZW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CNTLZW8o, PPC_INS_CNTLZW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CNTLZWo, PPC_INS_CNTLZW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CR6SET, PPC_INS_CREQV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1EQ, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CR6UNSET, PPC_INS_CRXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1EQ, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CRAND, PPC_INS_CRAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CRANDC, PPC_INS_CRANDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CREQV, PPC_INS_CREQV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CRNAND, PPC_INS_CRNAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CRNOR, PPC_INS_CRNOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CROR, PPC_INS_CROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CRORC, PPC_INS_CRORC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CRSET, PPC_INS_CREQV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CRUNSET, PPC_INS_CRXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_CRXOR, PPC_INS_CRXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DCBA, PPC_INS_DCBA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DCBF, PPC_INS_DCBF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DCBI, PPC_INS_DCBI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DCBST, PPC_INS_DCBST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DCBT, PPC_INS_DCBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DCBTST, PPC_INS_DCBTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DCBZ, PPC_INS_DCBZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DCBZL, PPC_INS_DCBZL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DCCCI, PPC_INS_DCCCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_DIVD, PPC_INS_DIVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DIVDU, PPC_INS_DIVDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DIVDUo, PPC_INS_DIVDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DIVDo, PPC_INS_DIVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DIVW, PPC_INS_DIVW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DIVWU, PPC_INS_DIVWU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DIVWUo, PPC_INS_DIVWU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DIVWo, PPC_INS_DIVW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_DSS, PPC_INS_DSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_DSSALL, PPC_INS_DSSALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_DST, PPC_INS_DST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_DST64, PPC_INS_DST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_DSTST, PPC_INS_DSTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_DSTST64, PPC_INS_DSTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_DSTSTT, PPC_INS_DSTSTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_DSTSTT64, PPC_INS_DSTSTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_DSTT, PPC_INS_DSTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_DSTT64, PPC_INS_DSTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EQV, PPC_INS_EQV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EQV8, PPC_INS_EQV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EQV8o, PPC_INS_EQV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EQVo, PPC_INS_EQV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVABS, PPC_INS_EVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVADDIW, PPC_INS_EVADDIW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVADDSMIAAW, PPC_INS_EVADDSMIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVADDSSIAAW, PPC_INS_EVADDSSIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVADDUMIAAW, PPC_INS_EVADDUMIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVADDUSIAAW, PPC_INS_EVADDUSIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVADDW, PPC_INS_EVADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVAND, PPC_INS_EVAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVANDC, PPC_INS_EVANDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVCMPEQ, PPC_INS_EVCMPEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVCMPGTS, PPC_INS_EVCMPGTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVCMPGTU, PPC_INS_EVCMPGTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVCMPLTS, PPC_INS_EVCMPLTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVCMPLTU, PPC_INS_EVCMPLTU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVCNTLSW, PPC_INS_EVCNTLSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVCNTLZW, PPC_INS_EVCNTLZW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVDIVWS, PPC_INS_EVDIVWS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVDIVWU, PPC_INS_EVDIVWU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVEQV, PPC_INS_EVEQV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVEXTSB, PPC_INS_EVEXTSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVEXTSH, PPC_INS_EVEXTSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLDD, PPC_INS_EVLDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLDDX, PPC_INS_EVLDDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLDH, PPC_INS_EVLDH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLDHX, PPC_INS_EVLDHX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLDW, PPC_INS_EVLDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLDWX, PPC_INS_EVLDWX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLHHESPLAT, PPC_INS_EVLHHESPLAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLHHESPLATX, PPC_INS_EVLHHESPLATX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLHHOSSPLAT, PPC_INS_EVLHHOSSPLAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLHHOSSPLATX, PPC_INS_EVLHHOSSPLATX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLHHOUSPLAT, PPC_INS_EVLHHOUSPLAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLHHOUSPLATX, PPC_INS_EVLHHOUSPLATX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLWHE, PPC_INS_EVLWHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLWHEX, PPC_INS_EVLWHEX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLWHOS, PPC_INS_EVLWHOS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLWHOSX, PPC_INS_EVLWHOSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLWHOU, PPC_INS_EVLWHOU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLWHOUX, PPC_INS_EVLWHOUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLWHSPLAT, PPC_INS_EVLWHSPLAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLWHSPLATX, PPC_INS_EVLWHSPLATX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLWWSPLAT, PPC_INS_EVLWWSPLAT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVLWWSPLATX, PPC_INS_EVLWWSPLATX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMERGEHI, PPC_INS_EVMERGEHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMERGEHILO, PPC_INS_EVMERGEHILO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMERGELO, PPC_INS_EVMERGELO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMERGELOHI, PPC_INS_EVMERGELOHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEGSMFAA, PPC_INS_EVMHEGSMFAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEGSMFAN, PPC_INS_EVMHEGSMFAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEGSMIAA, PPC_INS_EVMHEGSMIAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEGSMIAN, PPC_INS_EVMHEGSMIAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEGUMIAA, PPC_INS_EVMHEGUMIAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEGUMIAN, PPC_INS_EVMHEGUMIAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESMF, PPC_INS_EVMHESMF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESMFA, PPC_INS_EVMHESMFA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESMFAAW, PPC_INS_EVMHESMFAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESMFANW, PPC_INS_EVMHESMFANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESMI, PPC_INS_EVMHESMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESMIA, PPC_INS_EVMHESMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESMIAAW, PPC_INS_EVMHESMIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESMIANW, PPC_INS_EVMHESMIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESSF, PPC_INS_EVMHESSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESSFA, PPC_INS_EVMHESSFA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESSFAAW, PPC_INS_EVMHESSFAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESSFANW, PPC_INS_EVMHESSFANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESSIAAW, PPC_INS_EVMHESSIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHESSIANW, PPC_INS_EVMHESSIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEUMI, PPC_INS_EVMHEUMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEUMIA, PPC_INS_EVMHEUMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEUMIAAW, PPC_INS_EVMHEUMIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEUMIANW, PPC_INS_EVMHEUMIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEUSIAAW, PPC_INS_EVMHEUSIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHEUSIANW, PPC_INS_EVMHEUSIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOGSMFAA, PPC_INS_EVMHOGSMFAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOGSMFAN, PPC_INS_EVMHOGSMFAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOGSMIAA, PPC_INS_EVMHOGSMIAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOGSMIAN, PPC_INS_EVMHOGSMIAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOGUMIAA, PPC_INS_EVMHOGUMIAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOGUMIAN, PPC_INS_EVMHOGUMIAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSMF, PPC_INS_EVMHOSMF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSMFA, PPC_INS_EVMHOSMFA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSMFAAW, PPC_INS_EVMHOSMFAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSMFANW, PPC_INS_EVMHOSMFANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSMI, PPC_INS_EVMHOSMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSMIA, PPC_INS_EVMHOSMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSMIAAW, PPC_INS_EVMHOSMIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSMIANW, PPC_INS_EVMHOSMIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSSF, PPC_INS_EVMHOSSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSSFA, PPC_INS_EVMHOSSFA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSSFAAW, PPC_INS_EVMHOSSFAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSSFANW, PPC_INS_EVMHOSSFANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSSIAAW, PPC_INS_EVMHOSSIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOSSIANW, PPC_INS_EVMHOSSIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOUMI, PPC_INS_EVMHOUMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOUMIA, PPC_INS_EVMHOUMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOUMIAAW, PPC_INS_EVMHOUMIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOUMIANW, PPC_INS_EVMHOUMIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOUSIAAW, PPC_INS_EVMHOUSIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMHOUSIANW, PPC_INS_EVMHOUSIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMRA, PPC_INS_EVMRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWHSMF, PPC_INS_EVMWHSMF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWHSMFA, PPC_INS_EVMWHSMFA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWHSMI, PPC_INS_EVMWHSMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWHSMIA, PPC_INS_EVMWHSMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWHSSF, PPC_INS_EVMWHSSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWHSSFA, PPC_INS_EVMWHSSFA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWHUMI, PPC_INS_EVMWHUMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWHUMIA, PPC_INS_EVMWHUMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWLSMIAAW, PPC_INS_EVMWLSMIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWLSMIANW, PPC_INS_EVMWLSMIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWLSSIAAW, PPC_INS_EVMWLSSIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWLSSIANW, PPC_INS_EVMWLSSIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWLUMI, PPC_INS_EVMWLUMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWLUMIA, PPC_INS_EVMWLUMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWLUMIAAW, PPC_INS_EVMWLUMIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWLUMIANW, PPC_INS_EVMWLUMIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWLUSIAAW, PPC_INS_EVMWLUSIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWLUSIANW, PPC_INS_EVMWLUSIANW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSMF, PPC_INS_EVMWSMF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSMFA, PPC_INS_EVMWSMFA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSMFAA, PPC_INS_EVMWSMFAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSMFAN, PPC_INS_EVMWSMFAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSMI, PPC_INS_EVMWSMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSMIA, PPC_INS_EVMWSMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSMIAA, PPC_INS_EVMWSMIAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSMIAN, PPC_INS_EVMWSMIAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSSF, PPC_INS_EVMWSSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSSFA, PPC_INS_EVMWSSFA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSSFAA, PPC_INS_EVMWSSFAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWSSFAN, PPC_INS_EVMWSSFAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWUMI, PPC_INS_EVMWUMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWUMIA, PPC_INS_EVMWUMIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWUMIAA, PPC_INS_EVMWUMIAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVMWUMIAN, PPC_INS_EVMWUMIAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVNAND, PPC_INS_EVNAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVNEG, PPC_INS_EVNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVNOR, PPC_INS_EVNOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVOR, PPC_INS_EVOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVORC, PPC_INS_EVORC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVRLW, PPC_INS_EVRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVRLWI, PPC_INS_EVRLWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVRNDW, PPC_INS_EVRNDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSLW, PPC_INS_EVSLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSLWI, PPC_INS_EVSLWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSPLATFI, PPC_INS_EVSPLATFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSPLATI, PPC_INS_EVSPLATI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSRWIS, PPC_INS_EVSRWIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSRWIU, PPC_INS_EVSRWIU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSRWS, PPC_INS_EVSRWS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSRWU, PPC_INS_EVSRWU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTDD, PPC_INS_EVSTDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTDDX, PPC_INS_EVSTDDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTDH, PPC_INS_EVSTDH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTDHX, PPC_INS_EVSTDHX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTDW, PPC_INS_EVSTDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTDWX, PPC_INS_EVSTDWX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTWHE, PPC_INS_EVSTWHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTWHEX, PPC_INS_EVSTWHEX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTWHO, PPC_INS_EVSTWHO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTWHOX, PPC_INS_EVSTWHOX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTWWE, PPC_INS_EVSTWWE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTWWEX, PPC_INS_EVSTWWEX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTWWO, PPC_INS_EVSTWWO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSTWWOX, PPC_INS_EVSTWWOX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSUBFSMIAAW, PPC_INS_EVSUBFSMIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSUBFSSIAAW, PPC_INS_EVSUBFSSIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSUBFUMIAAW, PPC_INS_EVSUBFUMIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSUBFUSIAAW, PPC_INS_EVSUBFUSIAAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSUBFW, PPC_INS_EVSUBFW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVSUBIFW, PPC_INS_EVSUBIFW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EVXOR, PPC_INS_EVXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_SPE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSB, PPC_INS_EXTSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSB8, PPC_INS_EXTSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSB8_32_64, PPC_INS_EXTSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSB8o, PPC_INS_EXTSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSBo, PPC_INS_EXTSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSH, PPC_INS_EXTSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSH8, PPC_INS_EXTSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSH8_32_64, PPC_INS_EXTSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSH8o, PPC_INS_EXTSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSHo, PPC_INS_EXTSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSW, PPC_INS_EXTSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSW_32_64, PPC_INS_EXTSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSW_32_64o, PPC_INS_EXTSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EXTSWo, PPC_INS_EXTSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_EnforceIEIO, PPC_INS_EIEIO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FABSD, PPC_INS_FABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FABSDo, PPC_INS_FABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FABSS, PPC_INS_FABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FABSSo, PPC_INS_FABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FADD, PPC_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FADDS, PPC_INS_FADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FADDSo, PPC_INS_FADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FADDo, PPC_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCFID, PPC_INS_FCFID,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCFIDS, PPC_INS_FCFIDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCFIDSo, PPC_INS_FCFIDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCFIDU, PPC_INS_FCFIDU,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCFIDUS, PPC_INS_FCFIDUS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCFIDUSo, PPC_INS_FCFIDUS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCFIDUo, PPC_INS_FCFIDU,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCFIDo, PPC_INS_FCFID,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCMPUD, PPC_INS_FCMPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCMPUS, PPC_INS_FCMPU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCPSGND, PPC_INS_FCPSGN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCPSGNDo, PPC_INS_FCPSGN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCPSGNS, PPC_INS_FCPSGN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCPSGNSo, PPC_INS_FCPSGN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTID, PPC_INS_FCTID,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIDUZ, PPC_INS_FCTIDUZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIDUZo, PPC_INS_FCTIDUZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIDZ, PPC_INS_FCTIDZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIDZo, PPC_INS_FCTIDZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIDo, PPC_INS_FCTID,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIW, PPC_INS_FCTIW,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIWUZ, PPC_INS_FCTIWUZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIWUZo, PPC_INS_FCTIWUZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIWZ, PPC_INS_FCTIWZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIWZo, PPC_INS_FCTIWZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FCTIWo, PPC_INS_FCTIW,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FDIV, PPC_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FDIVS, PPC_INS_FDIVS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FDIVSo, PPC_INS_FDIVS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FDIVo, PPC_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMADD, PPC_INS_FMADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMADDS, PPC_INS_FMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMADDSo, PPC_INS_FMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMADDo, PPC_INS_FMADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMR, PPC_INS_FMR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMRo, PPC_INS_FMR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMSUB, PPC_INS_FMSUB,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMSUBS, PPC_INS_FMSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMSUBSo, PPC_INS_FMSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMSUBo, PPC_INS_FMSUB,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMUL, PPC_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMULS, PPC_INS_FMULS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMULSo, PPC_INS_FMULS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FMULo, PPC_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNABSD, PPC_INS_FNABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNABSDo, PPC_INS_FNABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNABSS, PPC_INS_FNABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNABSSo, PPC_INS_FNABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNEGD, PPC_INS_FNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNEGDo, PPC_INS_FNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNEGS, PPC_INS_FNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNEGSo, PPC_INS_FNEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNMADD, PPC_INS_FNMADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNMADDS, PPC_INS_FNMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNMADDSo, PPC_INS_FNMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNMADDo, PPC_INS_FNMADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNMSUB, PPC_INS_FNMSUB,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNMSUBS, PPC_INS_FNMSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNMSUBSo, PPC_INS_FNMSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FNMSUBo, PPC_INS_FNMSUB,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRE, PPC_INS_FRE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRES, PPC_INS_FRES,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRESo, PPC_INS_FRES,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FREo, PPC_INS_FRE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIMD, PPC_INS_FRIM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIMDo, PPC_INS_FRIM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIMS, PPC_INS_FRIM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIMSo, PPC_INS_FRIM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIND, PPC_INS_FRIN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRINDo, PPC_INS_FRIN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRINS, PPC_INS_FRIN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRINSo, PPC_INS_FRIN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIPD, PPC_INS_FRIP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIPDo, PPC_INS_FRIP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIPS, PPC_INS_FRIP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIPSo, PPC_INS_FRIP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIZD, PPC_INS_FRIZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIZDo, PPC_INS_FRIZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIZS, PPC_INS_FRIZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRIZSo, PPC_INS_FRIZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRSP, PPC_INS_FRSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRSPo, PPC_INS_FRSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRSQRTE, PPC_INS_FRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRSQRTES, PPC_INS_FRSQRTES,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRSQRTESo, PPC_INS_FRSQRTES,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FRSQRTEo, PPC_INS_FRSQRTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSELD, PPC_INS_FSEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSELDo, PPC_INS_FSEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSELS, PPC_INS_FSEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSELSo, PPC_INS_FSEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSQRT, PPC_INS_FSQRT,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSQRTS, PPC_INS_FSQRTS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSQRTSo, PPC_INS_FSQRTS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSQRTo, PPC_INS_FSQRT,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSUB, PPC_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSUBS, PPC_INS_FSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSUBSo, PPC_INS_FSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_FSUBo, PPC_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ICBI, PPC_INS_ICBI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ICBT, PPC_INS_ICBT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ICBT, 0 }, 0, 0
+#endif
+},
+{
+ PPC_ICCCI, PPC_INS_ICCCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_ISEL, PPC_INS_ISEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ISEL8, PPC_INS_ISEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ISYNC, PPC_INS_ISYNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LA, PPC_INS_LA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LBZ, PPC_INS_LBZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LBZ8, PPC_INS_LBZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LBZCIX, PPC_INS_LBZCIX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LBZU, PPC_INS_LBZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LBZU8, PPC_INS_LBZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LBZUX, PPC_INS_LBZUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LBZUX8, PPC_INS_LBZUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LBZX, PPC_INS_LBZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LBZX8, PPC_INS_LBZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LD, PPC_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LDARX, PPC_INS_LDARX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LDBRX, PPC_INS_LDBRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LDCIX, PPC_INS_LDCIX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LDU, PPC_INS_LDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LDUX, PPC_INS_LDUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LDX, PPC_INS_LDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LFD, PPC_INS_LFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LFDU, PPC_INS_LFDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LFDUX, PPC_INS_LFDUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LFDX, PPC_INS_LFDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LFIWAX, PPC_INS_LFIWAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LFIWZX, PPC_INS_LFIWZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LFS, PPC_INS_LFS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LFSU, PPC_INS_LFSU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LFSUX, PPC_INS_LFSUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LFSX, PPC_INS_LFSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHA, PPC_INS_LHA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHA8, PPC_INS_LHA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHAU, PPC_INS_LHAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHAU8, PPC_INS_LHAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHAUX, PPC_INS_LHAUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHAUX8, PPC_INS_LHAUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHAX, PPC_INS_LHAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHAX8, PPC_INS_LHAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHBRX, PPC_INS_LHBRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHBRX8, PPC_INS_LHBRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHZ, PPC_INS_LHZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHZ8, PPC_INS_LHZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHZCIX, PPC_INS_LHZCIX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHZU, PPC_INS_LHZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHZU8, PPC_INS_LHZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHZUX, PPC_INS_LHZUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHZUX8, PPC_INS_LHZUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHZX, PPC_INS_LHZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LHZX8, PPC_INS_LHZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LI, PPC_INS_LI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LI8, PPC_INS_LI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LIS, PPC_INS_LIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LIS8, PPC_INS_LIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LMW, PPC_INS_LMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LSWI, PPC_INS_LSWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LVEBX, PPC_INS_LVEBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_LVEHX, PPC_INS_LVEHX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_LVEWX, PPC_INS_LVEWX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_LVSL, PPC_INS_LVSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_LVSR, PPC_INS_LVSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_LVX, PPC_INS_LVX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_LVXL, PPC_INS_LVXL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWA, PPC_INS_LWA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWARX, PPC_INS_LWARX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWAUX, PPC_INS_LWAUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWAX, PPC_INS_LWAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWAX_32, PPC_INS_LWAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWA_32, PPC_INS_LWA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWBRX, PPC_INS_LWBRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWBRX8, PPC_INS_LWBRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWZ, PPC_INS_LWZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWZ8, PPC_INS_LWZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWZCIX, PPC_INS_LWZCIX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWZU, PPC_INS_LWZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWZU8, PPC_INS_LWZU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWZUX, PPC_INS_LWZUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWZUX8, PPC_INS_LWZUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWZX, PPC_INS_LWZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LWZX8, PPC_INS_LWZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_LXSDX, PPC_INS_LXSDX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_LXVD2X, PPC_INS_LXVD2X,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_LXVDSX, PPC_INS_LXVDSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_LXVW4X, PPC_INS_LXVW4X,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_MBAR, PPC_INS_MBAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_MCRF, PPC_INS_MCRF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MCRFS, PPC_INS_MCRFS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFCR, PPC_INS_MFCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFCR8, PPC_INS_MFCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFCTR, PPC_INS_MFCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFCTR8, PPC_INS_MFCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFDCR, PPC_INS_MFDCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFFS, PPC_INS_MFFS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFFSo, PPC_INS_MFFS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR1, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFLR, PPC_INS_MFLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_LR, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFLR8, PPC_INS_MFLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_LR8, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFMSR, PPC_INS_MFMSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFOCRF, PPC_INS_MFOCRF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFOCRF8, PPC_INS_MFOCRF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFSPR, PPC_INS_MFSPR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFSR, PPC_INS_MFSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFSRIN, PPC_INS_MFSRIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFTB, PPC_INS_MFTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFTB8, PPC_INS_MFSPR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFVRSAVE, PPC_INS_MFSPR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFVRSAVEv, PPC_INS_MFSPR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MFVSCR, PPC_INS_MFVSCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_MSYNC, PPC_INS_MSYNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTCRF, PPC_INS_MTCRF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTCRF8, PPC_INS_MTCRF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTCTR, PPC_INS_MTCTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTCTR8, PPC_INS_MTCTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTCTR8loop, PPC_INS_MTCTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CTR8, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTCTRloop, PPC_INS_MTCTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTDCR, PPC_INS_MTDCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTFSB0, PPC_INS_MTFSB0,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_RM, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTFSB1, PPC_INS_MTFSB1,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_RM, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTFSF, PPC_INS_MTFSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTFSFI, PPC_INS_MTFSFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTFSFIo, PPC_INS_MTFSFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTFSFb, PPC_INS_MTFSF,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_RM, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTFSFo, PPC_INS_MTFSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTLR, PPC_INS_MTLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTLR8, PPC_INS_MTLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_LR8, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTMSR, PPC_INS_MTMSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTMSRD, PPC_INS_MTMSRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTOCRF, PPC_INS_MTOCRF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTOCRF8, PPC_INS_MTOCRF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTSPR, PPC_INS_MTSPR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTSR, PPC_INS_MTSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTSRIN, PPC_INS_MTSRIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTVRSAVE, PPC_INS_MTSPR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTVRSAVEv, PPC_INS_MTSPR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MTVSCR, PPC_INS_MTVSCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULHD, PPC_INS_MULHD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULHDU, PPC_INS_MULHDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULHDUo, PPC_INS_MULHDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULHDo, PPC_INS_MULHD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULHW, PPC_INS_MULHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULHWU, PPC_INS_MULHWU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULHWUo, PPC_INS_MULHWU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULHWo, PPC_INS_MULHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULLD, PPC_INS_MULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULLDo, PPC_INS_MULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULLI, PPC_INS_MULLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULLI8, PPC_INS_MULLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULLW, PPC_INS_MULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_MULLWo, PPC_INS_MULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NAND, PPC_INS_NAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NAND8, PPC_INS_NAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NAND8o, PPC_INS_NAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NANDo, PPC_INS_NAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NEG, PPC_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NEG8, PPC_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NEG8o, PPC_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NEGo, PPC_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NOP, PPC_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NOP_GT_PWR6, PPC_INS_ORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NOP_GT_PWR7, PPC_INS_ORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NOR, PPC_INS_NOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NOR8, PPC_INS_NOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NOR8o, PPC_INS_NOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_NORo, PPC_INS_NOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_OR, PPC_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_OR8, PPC_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_OR8o, PPC_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ORC, PPC_INS_ORC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ORC8, PPC_INS_ORC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ORC8o, PPC_INS_ORC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ORCo, PPC_INS_ORC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ORI, PPC_INS_ORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ORI8, PPC_INS_ORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ORIS, PPC_INS_ORIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ORIS8, PPC_INS_ORIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_ORo, PPC_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_POPCNTD, PPC_INS_POPCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_POPCNTW, PPC_INS_POPCNTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVALIGNI, PPC_INS_QVALIGNI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVALIGNIb, PPC_INS_QVALIGNI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVALIGNIs, PPC_INS_QVALIGNI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVESPLATI, PPC_INS_QVESPLATI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVESPLATIb, PPC_INS_QVESPLATI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVESPLATIs, PPC_INS_QVESPLATI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFABS, PPC_INS_QVFABS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFABSs, PPC_INS_QVFABS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFADD, PPC_INS_QVFADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFADDS, PPC_INS_QVFADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFADDSs, PPC_INS_QVFADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCFID, PPC_INS_QVFCFID,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCFIDS, PPC_INS_QVFCFIDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCFIDU, PPC_INS_QVFCFIDU,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCFIDUS, PPC_INS_QVFCFIDUS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCFIDb, PPC_INS_QVFCFID,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCMPEQ, PPC_INS_QVFCMPEQ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCMPEQb, PPC_INS_QVFCMPEQ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCMPEQbs, PPC_INS_QVFCMPEQ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCMPGT, PPC_INS_QVFCMPGT,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCMPGTb, PPC_INS_QVFCMPGT,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCMPGTbs, PPC_INS_QVFCMPGT,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCMPLT, PPC_INS_QVFCMPLT,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCMPLTb, PPC_INS_QVFCMPLT,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCMPLTbs, PPC_INS_QVFCMPLT,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCPSGN, PPC_INS_QVFCPSGN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCPSGNs, PPC_INS_QVFCPSGN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCTID, PPC_INS_QVFCTID,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCTIDU, PPC_INS_QVFCTIDU,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCTIDUZ, PPC_INS_QVFCTIDUZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCTIDZ, PPC_INS_QVFCTIDZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCTIDb, PPC_INS_QVFCTID,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCTIW, PPC_INS_QVFCTIW,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCTIWU, PPC_INS_QVFCTIWU,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCTIWUZ, PPC_INS_QVFCTIWUZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFCTIWZ, PPC_INS_QVFCTIWZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFLOGICAL, PPC_INS_QVFLOGICAL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFLOGICALb, PPC_INS_QVFLOGICAL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFLOGICALs, PPC_INS_QVFLOGICAL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMADD, PPC_INS_QVFMADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMADDS, PPC_INS_QVFMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMADDSs, PPC_INS_QVFMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMR, PPC_INS_QVFMR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMRb, PPC_INS_QVFMR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMRs, PPC_INS_QVFMR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMSUB, PPC_INS_QVFMSUB,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMSUBS, PPC_INS_QVFMSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMSUBSs, PPC_INS_QVFMSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMUL, PPC_INS_QVFMUL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMULS, PPC_INS_QVFMULS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFMULSs, PPC_INS_QVFMULS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFNABS, PPC_INS_QVFNABS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFNABSs, PPC_INS_QVFNABS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFNEG, PPC_INS_QVFNEG,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFNEGs, PPC_INS_QVFNEG,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFNMADD, PPC_INS_QVFNMADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFNMADDS, PPC_INS_QVFNMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFNMADDSs, PPC_INS_QVFNMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFNMSUB, PPC_INS_QVFNMSUB,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFNMSUBS, PPC_INS_QVFNMSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFNMSUBSs, PPC_INS_QVFNMSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFPERM, PPC_INS_QVFPERM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFPERMs, PPC_INS_QVFPERM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRE, PPC_INS_QVFRE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRES, PPC_INS_QVFRES,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRESs, PPC_INS_QVFRES,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRIM, PPC_INS_QVFRIM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRIMs, PPC_INS_QVFRIM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRIN, PPC_INS_QVFRIN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRINs, PPC_INS_QVFRIN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRIP, PPC_INS_QVFRIP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRIPs, PPC_INS_QVFRIP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRIZ, PPC_INS_QVFRIZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRIZs, PPC_INS_QVFRIZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRSP, PPC_INS_QVFRSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRSPs, PPC_INS_QVFRSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRSQRTE, PPC_INS_QVFRSQRTE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRSQRTES, PPC_INS_QVFRSQRTES,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFRSQRTESs, PPC_INS_QVFRSQRTES,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFSEL, PPC_INS_QVFSEL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFSELb, PPC_INS_QVFSEL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFSELbb, PPC_INS_QVFSEL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFSELbs, PPC_INS_QVFSEL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFSUB, PPC_INS_QVFSUB,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFSUBS, PPC_INS_QVFSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFSUBSs, PPC_INS_QVFSUBS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFTSTNAN, PPC_INS_QVFTSTNAN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFTSTNANb, PPC_INS_QVFTSTNAN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFTSTNANbs, PPC_INS_QVFTSTNAN,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFXMADD, PPC_INS_QVFXMADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFXMADDS, PPC_INS_QVFXMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFXMUL, PPC_INS_QVFXMUL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFXMULS, PPC_INS_QVFXMULS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFXXCPNMADD, PPC_INS_QVFXXCPNMADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFXXCPNMADDS, PPC_INS_QVFXXCPNMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFXXMADD, PPC_INS_QVFXXMADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFXXMADDS, PPC_INS_QVFXXMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFXXNPMADD, PPC_INS_QVFXXNPMADD,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVFXXNPMADDS, PPC_INS_QVFXXNPMADDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVGPCI, PPC_INS_QVGPCI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFCDUX, PPC_INS_QVLFCDUX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFCDUXA, PPC_INS_QVLFCDUXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFCDX, PPC_INS_QVLFCDX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFCDXA, PPC_INS_QVLFCDXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFCSUX, PPC_INS_QVLFCSUX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFCSUXA, PPC_INS_QVLFCSUXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFCSX, PPC_INS_QVLFCSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFCSXA, PPC_INS_QVLFCSXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFCSXs, PPC_INS_QVLFCSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFDUX, PPC_INS_QVLFDUX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFDUXA, PPC_INS_QVLFDUXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFDX, PPC_INS_QVLFDX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFDXA, PPC_INS_QVLFDXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFDXb, PPC_INS_QVLFDX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFIWAX, PPC_INS_QVLFIWAX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFIWAXA, PPC_INS_QVLFIWAXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFIWZX, PPC_INS_QVLFIWZX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFIWZXA, PPC_INS_QVLFIWZXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFSUX, PPC_INS_QVLFSUX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFSUXA, PPC_INS_QVLFSUXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFSX, PPC_INS_QVLFSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFSXA, PPC_INS_QVLFSXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFSXb, PPC_INS_QVLFSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLFSXs, PPC_INS_QVLFSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLPCLDX, PPC_INS_QVLPCLDX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLPCLSX, PPC_INS_QVLPCLSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLPCLSXint, PPC_INS_QVLPCLSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLPCRDX, PPC_INS_QVLPCRDX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVLPCRSX, PPC_INS_QVLPCRSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCDUX, PPC_INS_QVSTFCDUX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCDUXA, PPC_INS_QVSTFCDUXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCDUXI, PPC_INS_QVSTFCDUXI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCDUXIA, PPC_INS_QVSTFCDUXIA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCDX, PPC_INS_QVSTFCDX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCDXA, PPC_INS_QVSTFCDXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCDXI, PPC_INS_QVSTFCDXI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCDXIA, PPC_INS_QVSTFCDXIA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCSUX, PPC_INS_QVSTFCSUX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCSUXA, PPC_INS_QVSTFCSUXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCSUXI, PPC_INS_QVSTFCSUXI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCSUXIA, PPC_INS_QVSTFCSUXIA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCSX, PPC_INS_QVSTFCSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCSXA, PPC_INS_QVSTFCSXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCSXI, PPC_INS_QVSTFCSXI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCSXIA, PPC_INS_QVSTFCSXIA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFCSXs, PPC_INS_QVSTFCSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFDUX, PPC_INS_QVSTFDUX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFDUXA, PPC_INS_QVSTFDUXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFDUXI, PPC_INS_QVSTFDUXI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFDUXIA, PPC_INS_QVSTFDUXIA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFDX, PPC_INS_QVSTFDX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFDXA, PPC_INS_QVSTFDXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFDXI, PPC_INS_QVSTFDXI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFDXIA, PPC_INS_QVSTFDXIA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFDXb, PPC_INS_QVSTFDX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFIWX, PPC_INS_QVSTFIWX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFIWXA, PPC_INS_QVSTFIWXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFSUX, PPC_INS_QVSTFSUX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFSUXA, PPC_INS_QVSTFSUXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFSUXI, PPC_INS_QVSTFSUXI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFSUXIA, PPC_INS_QVSTFSUXIA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFSUXs, PPC_INS_QVSTFSUX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFSX, PPC_INS_QVSTFSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFSXA, PPC_INS_QVSTFSXA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFSXI, PPC_INS_QVSTFSXI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFSXIA, PPC_INS_QVSTFSXIA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_QVSTFSXs, PPC_INS_QVSTFSX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_QPX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_RFCI, PPC_INS_RFCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_RFDI, PPC_INS_RFDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_E500, 0 }, 0, 0
+#endif
+},
+{
+ PPC_RFI, PPC_INS_RFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_RFID, PPC_INS_RFID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RFMCI, PPC_INS_RFMCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_E500, 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDCL, PPC_INS_RLDCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDCLo, PPC_INS_RLDCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDCR, PPC_INS_RLDCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDCRo, PPC_INS_RLDCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDIC, PPC_INS_RLDIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDICL, PPC_INS_RLDICL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDICL_32_64, PPC_INS_RLDICL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDICLo, PPC_INS_RLDICL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDICR, PPC_INS_RLDICR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDICRo, PPC_INS_RLDICR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDICo, PPC_INS_RLDIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDIMI, PPC_INS_RLDIMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLDIMIo, PPC_INS_RLDIMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWIMI, PPC_INS_RLWIMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWIMI8, PPC_INS_RLWIMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWIMI8o, PPC_INS_RLWIMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWIMIo, PPC_INS_RLWIMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWINM, PPC_INS_RLWINM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWINM8, PPC_INS_RLWINM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWINM8o, PPC_INS_RLWINM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWINMo, PPC_INS_RLWINM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWNM, PPC_INS_RLWNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWNM8, PPC_INS_RLWNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWNM8o, PPC_INS_RLWNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_RLWNMo, PPC_INS_RLWNM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SC, PPC_INS_SC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SLBIA, PPC_INS_SLBIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SLBIE, PPC_INS_SLBIE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SLBMFEE, PPC_INS_SLBMFEE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SLBMTE, PPC_INS_SLBMTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SLD, PPC_INS_SLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SLDo, PPC_INS_SLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SLW, PPC_INS_SLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SLW8, PPC_INS_SLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SLW8o, PPC_INS_SLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SLWo, PPC_INS_SLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRAD, PPC_INS_SRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRADI, PPC_INS_SRADI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRADIo, PPC_INS_SRADI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRADo, PPC_INS_SRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRAW, PPC_INS_SRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRAWI, PPC_INS_SRAWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRAWIo, PPC_INS_SRAWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRAWo, PPC_INS_SRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRD, PPC_INS_SRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRDo, PPC_INS_SRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRW, PPC_INS_SRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRW8, PPC_INS_SRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRW8o, PPC_INS_SRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SRWo, PPC_INS_SRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STB, PPC_INS_STB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STB8, PPC_INS_STB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STBCIX, PPC_INS_STBCIX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STBU, PPC_INS_STBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STBU8, PPC_INS_STBU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STBUX, PPC_INS_STBUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STBUX8, PPC_INS_STBUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STBX, PPC_INS_STBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STBX8, PPC_INS_STBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STD, PPC_INS_STD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STDBRX, PPC_INS_STDBRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STDCIX, PPC_INS_STDCIX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STDCX, PPC_INS_STDCX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STDU, PPC_INS_STDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STDUX, PPC_INS_STDUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STDX, PPC_INS_STDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STFD, PPC_INS_STFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STFDU, PPC_INS_STFDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STFDUX, PPC_INS_STFDUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STFDX, PPC_INS_STFDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STFIWX, PPC_INS_STFIWX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STFS, PPC_INS_STFS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STFSU, PPC_INS_STFSU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STFSUX, PPC_INS_STFSUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STFSX, PPC_INS_STFSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STH, PPC_INS_STH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STH8, PPC_INS_STH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STHBRX, PPC_INS_STHBRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STHCIX, PPC_INS_STHCIX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STHU, PPC_INS_STHU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STHU8, PPC_INS_STHU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STHUX, PPC_INS_STHUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STHUX8, PPC_INS_STHUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STHX, PPC_INS_STHX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STHX8, PPC_INS_STHX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STMW, PPC_INS_STMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STSWI, PPC_INS_STSWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STVEBX, PPC_INS_STVEBX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_STVEHX, PPC_INS_STVEHX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_STVEWX, PPC_INS_STVEWX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_STVX, PPC_INS_STVX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_STVXL, PPC_INS_STVXL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_STW, PPC_INS_STW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STW8, PPC_INS_STW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STWBRX, PPC_INS_STWBRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STWCIX, PPC_INS_STWCIX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STWCX, PPC_INS_STWCX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STWU, PPC_INS_STWU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STWU8, PPC_INS_STWU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STWUX, PPC_INS_STWUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STWUX8, PPC_INS_STWUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STWX, PPC_INS_STWX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STWX8, PPC_INS_STWX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_STXSDX, PPC_INS_STXSDX,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_STXVD2X, PPC_INS_STXVD2X,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_STXVW4X, PPC_INS_STXVW4X,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBF, PPC_INS_SUBF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBF8, PPC_INS_SUBF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBF8o, PPC_INS_SUBF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFC, PPC_INS_SUBFC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFC8, PPC_INS_SUBFC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFC8o, PPC_INS_SUBFC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFCo, PPC_INS_SUBFC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFE, PPC_INS_SUBFE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFE8, PPC_INS_SUBFE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFE8o, PPC_INS_SUBFE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFEo, PPC_INS_SUBFE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFIC, PPC_INS_SUBFIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFIC8, PPC_INS_SUBFIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFME, PPC_INS_SUBFME,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFME8, PPC_INS_SUBFME,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFME8o, PPC_INS_SUBFME,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFMEo, PPC_INS_SUBFME,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFZE, PPC_INS_SUBFZE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFZE8, PPC_INS_SUBFZE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFZE8o, PPC_INS_SUBFZE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFZEo, PPC_INS_SUBFZE,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CARRY, 0 }, { PPC_REG_CARRY, PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SUBFo, PPC_INS_SUBF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_SYNC, PPC_INS_SYNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_TAILB, PPC_INS_B,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_TAILB8, PPC_INS_B,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_TAILBA, PPC_INS_BA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_TAILBA8, PPC_INS_BA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ PPC_TAILBCTR, PPC_INS_BCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE32, 0 }, 1, 1
+#endif
+},
+{
+ PPC_TAILBCTR8, PPC_INS_BCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR8, PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_MODE64, 0 }, 1, 1
+#endif
+},
+{
+ PPC_TD, PPC_INS_TD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_TDI, PPC_INS_TDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBIA, PPC_INS_TLBIA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBIE, PPC_INS_TLBIE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBIEL, PPC_INS_TLBIEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBIVAX, PPC_INS_TLBIVAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBLD, PPC_INS_TLBLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_PPC6XX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBLI, PPC_INS_TLBLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_PPC6XX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBRE, PPC_INS_TLBRE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBRE2, PPC_INS_TLBRE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBSX, PPC_INS_TLBSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBSX2, PPC_INS_TLBSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBSX2D, PPC_INS_TLBSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBSYNC, PPC_INS_TLBSYNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBWE, PPC_INS_TLBWE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_TLBWE2, PPC_INS_TLBWE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_PPC4XX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_TRAP, PPC_INS_TRAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_TW, PPC_INS_TW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_TWI, PPC_INS_TWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDCUW, PPC_INS_VADDCUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDFP, PPC_INS_VADDFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDSBS, PPC_INS_VADDSBS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDSHS, PPC_INS_VADDSHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDSWS, PPC_INS_VADDSWS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDUBM, PPC_INS_VADDUBM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDUBS, PPC_INS_VADDUBS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDUDM, PPC_INS_VADDUDM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDUHM, PPC_INS_VADDUHM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDUHS, PPC_INS_VADDUHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDUWM, PPC_INS_VADDUWM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VADDUWS, PPC_INS_VADDUWS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VAND, PPC_INS_VAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VANDC, PPC_INS_VANDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VAVGSB, PPC_INS_VAVGSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VAVGSH, PPC_INS_VAVGSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VAVGSW, PPC_INS_VAVGSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VAVGUB, PPC_INS_VAVGUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VAVGUH, PPC_INS_VAVGUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VAVGUW, PPC_INS_VAVGUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCFSX, PPC_INS_VCFSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCFSX_0, PPC_INS_VCFSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCFUX, PPC_INS_VCFUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCFUX_0, PPC_INS_VCFUX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCLZB, PPC_INS_VCLZB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCLZD, PPC_INS_VCLZD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCLZH, PPC_INS_VCLZH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCLZW, PPC_INS_VCLZW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPBFP, PPC_INS_VCMPBFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPBFPo, PPC_INS_VCMPBFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPEQFP, PPC_INS_VCMPEQFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPEQFPo, PPC_INS_VCMPEQFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPEQUB, PPC_INS_VCMPEQUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPEQUBo, PPC_INS_VCMPEQUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPEQUD, PPC_INS_VCMPEQUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPEQUDo, PPC_INS_VCMPEQUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPEQUH, PPC_INS_VCMPEQUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPEQUHo, PPC_INS_VCMPEQUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPEQUW, PPC_INS_VCMPEQUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPEQUWo, PPC_INS_VCMPEQUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGEFP, PPC_INS_VCMPGEFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGEFPo, PPC_INS_VCMPGEFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTFP, PPC_INS_VCMPGTFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTFPo, PPC_INS_VCMPGTFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTSB, PPC_INS_VCMPGTSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTSBo, PPC_INS_VCMPGTSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTSD, PPC_INS_VCMPGTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTSDo, PPC_INS_VCMPGTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTSH, PPC_INS_VCMPGTSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTSHo, PPC_INS_VCMPGTSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTSW, PPC_INS_VCMPGTSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTSWo, PPC_INS_VCMPGTSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTUB, PPC_INS_VCMPGTUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTUBo, PPC_INS_VCMPGTUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTUD, PPC_INS_VCMPGTUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTUDo, PPC_INS_VCMPGTUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTUH, PPC_INS_VCMPGTUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTUHo, PPC_INS_VCMPGTUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTUW, PPC_INS_VCMPGTUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCMPGTUWo, PPC_INS_VCMPGTUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCTSXS, PPC_INS_VCTSXS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCTSXS_0, PPC_INS_VCTSXS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCTUXS, PPC_INS_VCTUXS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VCTUXS_0, PPC_INS_VCTUXS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VEQV, PPC_INS_VEQV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VEXPTEFP, PPC_INS_VEXPTEFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VLOGEFP, PPC_INS_VLOGEFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMADDFP, PPC_INS_VMADDFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMAXFP, PPC_INS_VMAXFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMAXSB, PPC_INS_VMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMAXSD, PPC_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMAXSH, PPC_INS_VMAXSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMAXSW, PPC_INS_VMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMAXUB, PPC_INS_VMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMAXUD, PPC_INS_VMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMAXUH, PPC_INS_VMAXUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMAXUW, PPC_INS_VMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMHADDSHS, PPC_INS_VMHADDSHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMHRADDSHS, PPC_INS_VMHRADDSHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMIDUD, PPC_INS_VMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMINFP, PPC_INS_VMINFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMINSB, PPC_INS_VMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMINSD, PPC_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMINSH, PPC_INS_VMINSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMINSW, PPC_INS_VMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMINUB, PPC_INS_VMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMINUH, PPC_INS_VMINUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMINUW, PPC_INS_VMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMLADDUHM, PPC_INS_VMLADDUHM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMRGHB, PPC_INS_VMRGHB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMRGHH, PPC_INS_VMRGHH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMRGHW, PPC_INS_VMRGHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMRGLB, PPC_INS_VMRGLB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMRGLH, PPC_INS_VMRGLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMRGLW, PPC_INS_VMRGLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMSUMMBM, PPC_INS_VMSUMMBM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMSUMSHM, PPC_INS_VMSUMSHM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMSUMSHS, PPC_INS_VMSUMSHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMSUMUBM, PPC_INS_VMSUMUBM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMSUMUHM, PPC_INS_VMSUMUHM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMSUMUHS, PPC_INS_VMSUMUHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULESB, PPC_INS_VMULESB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULESH, PPC_INS_VMULESH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULESW, PPC_INS_VMULESW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULEUB, PPC_INS_VMULEUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULEUH, PPC_INS_VMULEUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULEUW, PPC_INS_VMULEUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULOSB, PPC_INS_VMULOSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULOSH, PPC_INS_VMULOSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULOSW, PPC_INS_VMULOSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULOUB, PPC_INS_VMULOUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULOUH, PPC_INS_VMULOUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULOUW, PPC_INS_VMULOUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VMULUWM, PPC_INS_VMULUWM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VNAND, PPC_INS_VNAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VNMSUBFP, PPC_INS_VNMSUBFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VNOR, PPC_INS_VNOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VOR, PPC_INS_VOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VORC, PPC_INS_VORC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPERM, PPC_INS_VPERM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPKPX, PPC_INS_VPKPX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPKSHSS, PPC_INS_VPKSHSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPKSHUS, PPC_INS_VPKSHUS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPKSWSS, PPC_INS_VPKSWSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPKSWUS, PPC_INS_VPKSWUS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPKUHUM, PPC_INS_VPKUHUM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPKUHUS, PPC_INS_VPKUHUS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPKUWUM, PPC_INS_VPKUWUM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPKUWUS, PPC_INS_VPKUWUS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPOPCNTB, PPC_INS_VPOPCNTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPOPCNTD, PPC_INS_VPOPCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPOPCNTH, PPC_INS_VPOPCNTH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VPOPCNTW, PPC_INS_VPOPCNTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VREFP, PPC_INS_VREFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VRFIM, PPC_INS_VRFIM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VRFIN, PPC_INS_VRFIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VRFIP, PPC_INS_VRFIP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VRFIZ, PPC_INS_VRFIZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VRLB, PPC_INS_VRLB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VRLD, PPC_INS_VRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VRLH, PPC_INS_VRLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VRLW, PPC_INS_VRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VRSQRTEFP, PPC_INS_VRSQRTEFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSEL, PPC_INS_VSEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSL, PPC_INS_VSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSLB, PPC_INS_VSLB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSLD, PPC_INS_VSLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSLDOI, PPC_INS_VSLDOI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSLH, PPC_INS_VSLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSLO, PPC_INS_VSLO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSLW, PPC_INS_VSLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSPLTB, PPC_INS_VSPLTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSPLTH, PPC_INS_VSPLTH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSPLTISB, PPC_INS_VSPLTISB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSPLTISH, PPC_INS_VSPLTISH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSPLTISW, PPC_INS_VSPLTISW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSPLTW, PPC_INS_VSPLTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSR, PPC_INS_VSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSRAB, PPC_INS_VSRAB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSRAD, PPC_INS_VSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSRAH, PPC_INS_VSRAH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSRAW, PPC_INS_VSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSRB, PPC_INS_VSRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSRD, PPC_INS_VSRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSRH, PPC_INS_VSRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSRO, PPC_INS_VSRO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSRW, PPC_INS_VSRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBCUW, PPC_INS_VSUBCUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBFP, PPC_INS_VSUBFP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBSBS, PPC_INS_VSUBSBS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBSHS, PPC_INS_VSUBSHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBSWS, PPC_INS_VSUBSWS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBUBM, PPC_INS_VSUBUBM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBUBS, PPC_INS_VSUBUBS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBUDM, PPC_INS_VSUBUDM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBUHM, PPC_INS_VSUBUHM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBUHS, PPC_INS_VSUBUHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBUWM, PPC_INS_VSUBUWM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUBUWS, PPC_INS_VSUBUWS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUM2SWS, PPC_INS_VSUM2SWS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUM4SBS, PPC_INS_VSUM4SBS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUM4SHS, PPC_INS_VSUM4SHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUM4UBS, PPC_INS_VSUM4UBS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VSUMSWS, PPC_INS_VSUMSWS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VUPKHPX, PPC_INS_VUPKHPX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VUPKHSB, PPC_INS_VUPKHSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VUPKHSH, PPC_INS_VUPKHSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VUPKLPX, PPC_INS_VUPKLPX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VUPKLSB, PPC_INS_VUPKLSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VUPKLSH, PPC_INS_VUPKLSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_VXOR, PPC_INS_VXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_V_SET0, PPC_INS_VXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_V_SET0B, PPC_INS_VXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_V_SET0H, PPC_INS_VXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_V_SETALLONES, PPC_INS_VSPLTISW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_V_SETALLONESB, PPC_INS_VSPLTISW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_V_SETALLONESH, PPC_INS_VSPLTISW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_ALTIVEC, 0 }, 0, 0
+#endif
+},
+{
+ PPC_WAIT, PPC_INS_WAIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_WRTEE, PPC_INS_WRTEE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_WRTEEI, PPC_INS_WRTEEI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_BOOKE, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XOR, PPC_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_XOR8, PPC_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_XOR8o, PPC_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_XORI, PPC_INS_XORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_XORI8, PPC_INS_XORI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_XORIS, PPC_INS_XORIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_XORIS8, PPC_INS_XORIS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_XORo, PPC_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { PPC_REG_CR0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSABSDP, PPC_INS_XSABSDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSADDDP, PPC_INS_XSADDDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCMPODP, PPC_INS_XSCMPODP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCMPUDP, PPC_INS_XSCMPUDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCPSGNDP, PPC_INS_XSCPSGNDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCVDPSP, PPC_INS_XSCVDPSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCVDPSXDS, PPC_INS_XSCVDPSXDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCVDPSXWS, PPC_INS_XSCVDPSXWS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCVDPUXDS, PPC_INS_XSCVDPUXDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCVDPUXWS, PPC_INS_XSCVDPUXWS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCVSPDP, PPC_INS_XSCVSPDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCVSXDDP, PPC_INS_XSCVSXDDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSCVUXDDP, PPC_INS_XSCVUXDDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSDIVDP, PPC_INS_XSDIVDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSMADDADP, PPC_INS_XSMADDADP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSMADDMDP, PPC_INS_XSMADDMDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSMAXDP, PPC_INS_XSMAXDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSMINDP, PPC_INS_XSMINDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSMSUBADP, PPC_INS_XSMSUBADP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSMSUBMDP, PPC_INS_XSMSUBMDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSMULDP, PPC_INS_XSMULDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSNABSDP, PPC_INS_XSNABSDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSNEGDP, PPC_INS_XSNEGDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSNMADDADP, PPC_INS_XSNMADDADP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSNMADDMDP, PPC_INS_XSNMADDMDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSNMSUBADP, PPC_INS_XSNMSUBADP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSNMSUBMDP, PPC_INS_XSNMSUBMDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSRDPI, PPC_INS_XSRDPI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSRDPIC, PPC_INS_XSRDPIC,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSRDPIM, PPC_INS_XSRDPIM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSRDPIP, PPC_INS_XSRDPIP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSRDPIZ, PPC_INS_XSRDPIZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSREDP, PPC_INS_XSREDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSRSQRTEDP, PPC_INS_XSRSQRTEDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSSQRTDP, PPC_INS_XSSQRTDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSSUBDP, PPC_INS_XSSUBDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSTDIVDP, PPC_INS_XSTDIVDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XSTSQRTDP, PPC_INS_XSTSQRTDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVABSDP, PPC_INS_XVABSDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVABSSP, PPC_INS_XVABSSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVADDDP, PPC_INS_XVADDDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVADDSP, PPC_INS_XVADDSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPEQDP, PPC_INS_XVCMPEQDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPEQDPo, PPC_INS_XVCMPEQDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPEQSP, PPC_INS_XVCMPEQSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPEQSPo, PPC_INS_XVCMPEQSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPGEDP, PPC_INS_XVCMPGEDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPGEDPo, PPC_INS_XVCMPGEDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPGESP, PPC_INS_XVCMPGESP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPGESPo, PPC_INS_XVCMPGESP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPGTDP, PPC_INS_XVCMPGTDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPGTDPo, PPC_INS_XVCMPGTDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPGTSP, PPC_INS_XVCMPGTSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCMPGTSPo, PPC_INS_XVCMPGTSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { PPC_REG_CR6, 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCPSGNDP, PPC_INS_XVCPSGNDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCPSGNSP, PPC_INS_XVCPSGNSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVDPSP, PPC_INS_XVCVDPSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVDPSXDS, PPC_INS_XVCVDPSXDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVDPSXWS, PPC_INS_XVCVDPSXWS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVDPUXDS, PPC_INS_XVCVDPUXDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVDPUXWS, PPC_INS_XVCVDPUXWS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVSPDP, PPC_INS_XVCVSPDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVSPSXDS, PPC_INS_XVCVSPSXDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVSPSXWS, PPC_INS_XVCVSPSXWS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVSPUXDS, PPC_INS_XVCVSPUXDS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVSPUXWS, PPC_INS_XVCVSPUXWS,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVSXDDP, PPC_INS_XVCVSXDDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVSXDSP, PPC_INS_XVCVSXDSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVSXWDP, PPC_INS_XVCVSXWDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVSXWSP, PPC_INS_XVCVSXWSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVUXDDP, PPC_INS_XVCVUXDDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVUXDSP, PPC_INS_XVCVUXDSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVUXWDP, PPC_INS_XVCVUXWDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVCVUXWSP, PPC_INS_XVCVUXWSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVDIVDP, PPC_INS_XVDIVDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVDIVSP, PPC_INS_XVDIVSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMADDADP, PPC_INS_XVMADDADP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMADDASP, PPC_INS_XVMADDASP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMADDMDP, PPC_INS_XVMADDMDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMADDMSP, PPC_INS_XVMADDMSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMAXDP, PPC_INS_XVMAXDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMAXSP, PPC_INS_XVMAXSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMINDP, PPC_INS_XVMINDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMINSP, PPC_INS_XVMINSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMSUBADP, PPC_INS_XVMSUBADP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMSUBASP, PPC_INS_XVMSUBASP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMSUBMDP, PPC_INS_XVMSUBMDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMSUBMSP, PPC_INS_XVMSUBMSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMULDP, PPC_INS_XVMULDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVMULSP, PPC_INS_XVMULSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNABSDP, PPC_INS_XVNABSDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNABSSP, PPC_INS_XVNABSSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNEGDP, PPC_INS_XVNEGDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNEGSP, PPC_INS_XVNEGSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNMADDADP, PPC_INS_XVNMADDADP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNMADDASP, PPC_INS_XVNMADDASP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNMADDMDP, PPC_INS_XVNMADDMDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNMADDMSP, PPC_INS_XVNMADDMSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNMSUBADP, PPC_INS_XVNMSUBADP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNMSUBASP, PPC_INS_XVNMSUBASP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNMSUBMDP, PPC_INS_XVNMSUBMDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVNMSUBMSP, PPC_INS_XVNMSUBMSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRDPI, PPC_INS_XVRDPI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRDPIC, PPC_INS_XVRDPIC,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRDPIM, PPC_INS_XVRDPIM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRDPIP, PPC_INS_XVRDPIP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRDPIZ, PPC_INS_XVRDPIZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVREDP, PPC_INS_XVREDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRESP, PPC_INS_XVRESP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRSPI, PPC_INS_XVRSPI,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRSPIC, PPC_INS_XVRSPIC,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRSPIM, PPC_INS_XVRSPIM,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRSPIP, PPC_INS_XVRSPIP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRSPIZ, PPC_INS_XVRSPIZ,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRSQRTEDP, PPC_INS_XVRSQRTEDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVRSQRTESP, PPC_INS_XVRSQRTESP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVSQRTDP, PPC_INS_XVSQRTDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVSQRTSP, PPC_INS_XVSQRTSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVSUBDP, PPC_INS_XVSUBDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVSUBSP, PPC_INS_XVSUBSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVTDIVDP, PPC_INS_XVTDIVDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVTDIVSP, PPC_INS_XVTDIVSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVTSQRTDP, PPC_INS_XVTSQRTDP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XVTSQRTSP, PPC_INS_XVTSQRTSP,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_RM, 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXLAND, PPC_INS_XXLAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXLANDC, PPC_INS_XXLANDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXLEQV, PPC_INS_XXLEQV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8VECTOR, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXLNAND, PPC_INS_XXLNAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8VECTOR, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXLNOR, PPC_INS_XXLNOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXLOR, PPC_INS_XXLOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXLORC, PPC_INS_XXLORC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_P8VECTOR, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXLORf, PPC_INS_XXLOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXLXOR, PPC_INS_XXLXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXMRGHW, PPC_INS_XXMRGHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXMRGLW, PPC_INS_XXMRGLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXPERMDI, PPC_INS_XXPERMDI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXSEL, PPC_INS_XXSEL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXSLDWI, PPC_INS_XXSLDWI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_XXSPLTW, PPC_INS_XXSPLTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { PPC_GRP_VSX, 0 }, 0, 0
+#endif
+},
+{
+ PPC_gBC, PPC_INS_BC,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_gBCA, PPC_INS_BCA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_gBCCTR, PPC_INS_BCCTR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_gBCCTRL, PPC_INS_BCCTRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_gBCL, PPC_INS_BCL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_gBCLA, PPC_INS_BCLA,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_gBCLR, PPC_INS_BCLR,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ PPC_gBCLRL, PPC_INS_BCLRL,
+#ifndef CAPSTONE_DIET
+ { PPC_REG_CTR, PPC_REG_LR, PPC_REG_RM, 0 }, { PPC_REG_LR, PPC_REG_CTR, 0 }, { 0 }, 0, 0
+#endif
+},
diff --git a/arch/Sparc/SparcMapping.c b/arch/Sparc/SparcMapping.c
index 6b78875..7d965f5 100644
--- a/arch/Sparc/SparcMapping.c
+++ b/arch/Sparc/SparcMapping.c
@@ -130,2646 +130,7 @@
#endif
},
- {
- SP_ADDCCri, SPARC_INS_ADDCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ADDCCrr, SPARC_INS_ADDCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ADDCri, SPARC_INS_ADDX,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ADDCrr, SPARC_INS_ADDX,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ADDEri, SPARC_INS_ADDXCC,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ADDErr, SPARC_INS_ADDXCC,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ADDXC, SPARC_INS_ADDXC,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_ADDXCCC, SPARC_INS_ADDXCCC,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_ADDXri, SPARC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_ADDXrr, SPARC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_ADDri, SPARC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ADDrr, SPARC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ALIGNADDR, SPARC_INS_ALIGNADDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_ALIGNADDRL, SPARC_INS_ALIGNADDRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_ANDCCri, SPARC_INS_ANDCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ANDCCrr, SPARC_INS_ANDCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ANDNCCri, SPARC_INS_ANDNCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ANDNCCrr, SPARC_INS_ANDNCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ANDNri, SPARC_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ANDNrr, SPARC_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ANDXNrr, SPARC_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_ANDXri, SPARC_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_ANDXrr, SPARC_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_ANDri, SPARC_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ANDrr, SPARC_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ARRAY16, SPARC_INS_ARRAY16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_ARRAY32, SPARC_INS_ARRAY32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_ARRAY8, SPARC_INS_ARRAY8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_BA, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SP_BCOND, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SP_BCONDA, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SP_BINDri, SPARC_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- SP_BINDrr, SPARC_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- SP_BMASK, SPARC_INS_BMASK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
-#endif
- },
- {
- SP_BPFCC, SPARC_INS_FB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
-#endif
- },
- {
- SP_BPFCCA, SPARC_INS_FB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
-#endif
- },
- {
- SP_BPFCCANT, SPARC_INS_FB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
-#endif
- },
- {
- SP_BPFCCNT, SPARC_INS_FB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
-#endif
- },
- {
- SP_BPGEZapn, SPARC_INS_BRGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPGEZapt, SPARC_INS_BRGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPGEZnapn, SPARC_INS_BRGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPGEZnapt, SPARC_INS_BRGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPGZapn, SPARC_INS_BRGZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPGZapt, SPARC_INS_BRGZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPGZnapn, SPARC_INS_BRGZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPGZnapt, SPARC_INS_BRGZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPICC, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
-#endif
- },
- {
- SP_BPICCA, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
-#endif
- },
- {
- SP_BPICCANT, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
-#endif
- },
- {
- SP_BPICCNT, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
-#endif
- },
- {
- SP_BPLEZapn, SPARC_INS_BRLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPLEZapt, SPARC_INS_BRLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPLEZnapn, SPARC_INS_BRLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPLEZnapt, SPARC_INS_BRLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPLZapn, SPARC_INS_BRLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPLZapt, SPARC_INS_BRLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPLZnapn, SPARC_INS_BRLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPLZnapt, SPARC_INS_BRLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPNZapn, SPARC_INS_BRNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPNZapt, SPARC_INS_BRNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPNZnapn, SPARC_INS_BRNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPNZnapt, SPARC_INS_BRNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPXCC, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPXCCA, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPXCCANT, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPXCCNT, SPARC_INS_B,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPZapn, SPARC_INS_BRZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPZapt, SPARC_INS_BRZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPZnapn, SPARC_INS_BRZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BPZnapt, SPARC_INS_BRZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
-#endif
- },
- {
- SP_BSHUFFLE, SPARC_INS_BSHUFFLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
-#endif
- },
- {
- SP_CALL, SPARC_INS_CALL,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_CALLri, SPARC_INS_CALL,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_CALLrr, SPARC_INS_CALL,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_CASXrr, SPARC_INS_CASX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_CASrr, SPARC_INS_CAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_CMASK16, SPARC_INS_CMASK16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_CMASK32, SPARC_INS_CMASK32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_CMASK8, SPARC_INS_CMASK8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_CMPri, SPARC_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_CMPrr, SPARC_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE16, SPARC_INS_EDGE16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE16L, SPARC_INS_EDGE16L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE16LN, SPARC_INS_EDGE16LN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE16N, SPARC_INS_EDGE16N,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE32, SPARC_INS_EDGE32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE32L, SPARC_INS_EDGE32L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE32LN, SPARC_INS_EDGE32LN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE32N, SPARC_INS_EDGE32N,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE8, SPARC_INS_EDGE8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE8L, SPARC_INS_EDGE8L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE8LN, SPARC_INS_EDGE8LN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
-#endif
- },
- {
- SP_EDGE8N, SPARC_INS_EDGE8N,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
-#endif
- },
- {
- SP_FABSD, SPARC_INS_FABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FABSQ, SPARC_INS_FABSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FABSS, SPARC_INS_FABSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FADDD, SPARC_INS_FADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FADDQ, SPARC_INS_FADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FADDS, SPARC_INS_FADDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FALIGNADATA, SPARC_INS_FALIGNDATA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FAND, SPARC_INS_FAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FANDNOT1, SPARC_INS_FANDNOT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FANDNOT1S, SPARC_INS_FANDNOT1S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FANDNOT2, SPARC_INS_FANDNOT2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FANDNOT2S, SPARC_INS_FANDNOT2S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FANDS, SPARC_INS_FANDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FBCOND, SPARC_INS_FB,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_FCC0, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SP_FBCONDA, SPARC_INS_FB,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_FCC0, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SP_FCHKSM16, SPARC_INS_FCHKSM16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPD, SPARC_INS_FCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_FCC0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPEQ16, SPARC_INS_FCMPEQ16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPEQ32, SPARC_INS_FCMPEQ32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPGT16, SPARC_INS_FCMPGT16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPGT32, SPARC_INS_FCMPGT32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPLE16, SPARC_INS_FCMPLE16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPLE32, SPARC_INS_FCMPLE32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPNE16, SPARC_INS_FCMPNE16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPNE32, SPARC_INS_FCMPNE32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPQ, SPARC_INS_FCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_FCC0, 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FCMPS, SPARC_INS_FCMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_FCC0, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FDIVD, SPARC_INS_FDIVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FDIVQ, SPARC_INS_FDIVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FDIVS, SPARC_INS_FDIVS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FDMULQ, SPARC_INS_FDMULQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FDTOI, SPARC_INS_FDTOI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FDTOQ, SPARC_INS_FDTOQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FDTOS, SPARC_INS_FDTOS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FDTOX, SPARC_INS_FDTOX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_FEXPAND, SPARC_INS_FEXPAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FHADDD, SPARC_INS_FHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FHADDS, SPARC_INS_FHADDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FHSUBD, SPARC_INS_FHSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FHSUBS, SPARC_INS_FHSUBS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FITOD, SPARC_INS_FITOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FITOQ, SPARC_INS_FITOQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FITOS, SPARC_INS_FITOS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FLCMPD, SPARC_INS_FLCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FLCMPS, SPARC_INS_FLCMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FLUSHW, SPARC_INS_FLUSHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMEAN16, SPARC_INS_FMEAN16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVD, SPARC_INS_FMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVD_FCC, SPARC_INS_FMOVD,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVD_ICC, SPARC_INS_FMOVD,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVD_XCC, SPARC_INS_FMOVD,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVQ, SPARC_INS_FMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVQ_FCC, SPARC_INS_FMOVQ,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVQ_ICC, SPARC_INS_FMOVQ,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVQ_XCC, SPARC_INS_FMOVQ,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRGEZD, SPARC_INS_FMOVRDGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRGEZQ, SPARC_INS_FMOVRQGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRGEZS, SPARC_INS_FMOVRSGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRGZD, SPARC_INS_FMOVRDGZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRGZQ, SPARC_INS_FMOVRQGZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRGZS, SPARC_INS_FMOVRSGZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRLEZD, SPARC_INS_FMOVRDLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRLEZQ, SPARC_INS_FMOVRQLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRLEZS, SPARC_INS_FMOVRSLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRLZD, SPARC_INS_FMOVRDLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRLZQ, SPARC_INS_FMOVRQLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRLZS, SPARC_INS_FMOVRSLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRNZD, SPARC_INS_FMOVRDNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRNZQ, SPARC_INS_FMOVRQNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRNZS, SPARC_INS_FMOVRSNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRZD, SPARC_INS_FMOVRDZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRZQ, SPARC_INS_FMOVRQZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVRZS, SPARC_INS_FMOVRSZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVS, SPARC_INS_FMOVS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVS_FCC, SPARC_INS_FMOVS,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVS_ICC, SPARC_INS_FMOVS,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FMOVS_XCC, SPARC_INS_FMOVS,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_FMUL8SUX16, SPARC_INS_FMUL8SUX16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FMUL8ULX16, SPARC_INS_FMUL8ULX16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FMUL8X16, SPARC_INS_FMUL8X16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FMUL8X16AL, SPARC_INS_FMUL8X16AL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FMUL8X16AU, SPARC_INS_FMUL8X16AU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FMULD, SPARC_INS_FMULD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FMULD8SUX16, SPARC_INS_FMULD8SUX16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FMULD8ULX16, SPARC_INS_FMULD8ULX16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FMULQ, SPARC_INS_FMULQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FMULS, SPARC_INS_FMULS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FNADDD, SPARC_INS_FNADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FNADDS, SPARC_INS_FNADDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FNAND, SPARC_INS_FNAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FNANDS, SPARC_INS_FNANDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FNEGD, SPARC_INS_FNEGD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FNEGQ, SPARC_INS_FNEGQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_FNEGS, SPARC_INS_FNEGS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FNHADDD, SPARC_INS_FNHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FNHADDS, SPARC_INS_FNHADDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FNMULD, SPARC_INS_FNHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FNMULS, SPARC_INS_FNHADDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FNOR, SPARC_INS_FNOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FNORS, SPARC_INS_FNORS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FNOT1, SPARC_INS_FNOT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FNOT1S, SPARC_INS_FNOT1S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FNOT2, SPARC_INS_FNOT2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FNOT2S, SPARC_INS_FNOT2S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FNSMULD, SPARC_INS_FNHADDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FONE, SPARC_INS_FONE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FONES, SPARC_INS_FONES,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FOR, SPARC_INS_FOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FORNOT1, SPARC_INS_FORNOT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FORNOT1S, SPARC_INS_FORNOT1S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FORNOT2, SPARC_INS_FORNOT2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FORNOT2S, SPARC_INS_FORNOT2S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FORS, SPARC_INS_FORS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPACK16, SPARC_INS_FPACK16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPACK32, SPARC_INS_FPACK32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPACKFIX, SPARC_INS_FPACKFIX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPADD16, SPARC_INS_FPADD16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPADD16S, SPARC_INS_FPADD16S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPADD32, SPARC_INS_FPADD32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPADD32S, SPARC_INS_FPADD32S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPADD64, SPARC_INS_FPADD64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FPMERGE, SPARC_INS_FPMERGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPSUB16, SPARC_INS_FPSUB16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPSUB16S, SPARC_INS_FPSUB16S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPSUB32, SPARC_INS_FPSUB32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FPSUB32S, SPARC_INS_FPSUB32S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FQTOD, SPARC_INS_FQTOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FQTOI, SPARC_INS_FQTOI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FQTOS, SPARC_INS_FQTOS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FQTOX, SPARC_INS_FQTOX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_FSLAS16, SPARC_INS_FSLAS16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FSLAS32, SPARC_INS_FSLAS32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FSLL16, SPARC_INS_FSLL16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FSLL32, SPARC_INS_FSLL32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FSMULD, SPARC_INS_FSMULD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FSQRTD, SPARC_INS_FSQRTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FSQRTQ, SPARC_INS_FSQRTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FSQRTS, SPARC_INS_FSQRTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FSRA16, SPARC_INS_FSRA16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FSRA32, SPARC_INS_FSRA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FSRC1, SPARC_INS_FSRC1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FSRC1S, SPARC_INS_FSRC1S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FSRC2, SPARC_INS_FSRC2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FSRC2S, SPARC_INS_FSRC2S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FSRL16, SPARC_INS_FSRL16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FSRL32, SPARC_INS_FSRL32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_FSTOD, SPARC_INS_FSTOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FSTOI, SPARC_INS_FSTOI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FSTOQ, SPARC_INS_FSTOQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FSTOX, SPARC_INS_FSTOX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_FSUBD, SPARC_INS_FSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FSUBQ, SPARC_INS_FSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_FSUBS, SPARC_INS_FSUBS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_FXNOR, SPARC_INS_FXNOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FXNORS, SPARC_INS_FXNORS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FXOR, SPARC_INS_FXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FXORS, SPARC_INS_FXORS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FXTOD, SPARC_INS_FXTOD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_FXTOQ, SPARC_INS_FXTOQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_FXTOS, SPARC_INS_FXTOS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_FZERO, SPARC_INS_FZERO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_FZEROS, SPARC_INS_FZEROS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_JMPLri, SPARC_INS_JMPL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_JMPLrr, SPARC_INS_JMPL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDDFri, SPARC_INS_LDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDDFrr, SPARC_INS_LDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDFri, SPARC_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDFrr, SPARC_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDQFri, SPARC_INS_LDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_LDQFrr, SPARC_INS_LDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_LDSBri, SPARC_INS_LDSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDSBrr, SPARC_INS_LDSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDSHri, SPARC_INS_LDSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDSHrr, SPARC_INS_LDSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDSWri, SPARC_INS_LDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_LDSWrr, SPARC_INS_LDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_LDUBri, SPARC_INS_LDUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDUBrr, SPARC_INS_LDUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDUHri, SPARC_INS_LDUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDUHrr, SPARC_INS_LDUH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDXri, SPARC_INS_LDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_LDXrr, SPARC_INS_LDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_LDri, SPARC_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LDrr, SPARC_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_LEAX_ADDri, SPARC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_LEA_ADDri, SPARC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_32BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_LZCNT, SPARC_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_MEMBARi, SPARC_INS_MEMBAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVDTOX, SPARC_INS_MOVDTOX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVFCCri, SPARC_INS_MOV,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVFCCrr, SPARC_INS_MOV,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVICCri, SPARC_INS_MOV,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVICCrr, SPARC_INS_MOV,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRGEZri, SPARC_INS_MOVRGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRGEZrr, SPARC_INS_MOVRGEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRGZri, SPARC_INS_MOVRGZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRGZrr, SPARC_INS_MOVRGZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRLEZri, SPARC_INS_MOVRLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRLEZrr, SPARC_INS_MOVRLEZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRLZri, SPARC_INS_MOVRLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRLZrr, SPARC_INS_MOVRLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRNZri, SPARC_INS_MOVRNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRNZrr, SPARC_INS_MOVRNZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRRZri, SPARC_INS_MOVRZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVRRZrr, SPARC_INS_MOVRZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVSTOSW, SPARC_INS_MOVSTOSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVSTOUW, SPARC_INS_MOVSTOUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVWTOS, SPARC_INS_MOVDTOX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVXCCri, SPARC_INS_MOV,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVXCCrr, SPARC_INS_MOV,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MOVXTOD, SPARC_INS_MOVDTOX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_MULXri, SPARC_INS_MULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_MULXrr, SPARC_INS_MULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_NOP, SPARC_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ORCCri, SPARC_INS_ORCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ORCCrr, SPARC_INS_ORCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ORNCCri, SPARC_INS_ORNCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ORNCCrr, SPARC_INS_ORNCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ORNri, SPARC_INS_ORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ORNrr, SPARC_INS_ORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ORXNrr, SPARC_INS_ORN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_ORXri, SPARC_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_ORXrr, SPARC_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_ORri, SPARC_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_ORrr, SPARC_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_PDIST, SPARC_INS_PDIST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_PDISTN, SPARC_INS_PDISTN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_POPCrr, SPARC_INS_POPC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_RDY, SPARC_INS_RD,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_Y, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_RESTOREri, SPARC_INS_RESTORE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_RESTORErr, SPARC_INS_RESTORE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_RET, SPARC_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_RETL, SPARC_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_RETTri, SPARC_INS_RETT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_RETTrr, SPARC_INS_RETT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SAVEri, SPARC_INS_SAVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SAVErr, SPARC_INS_SAVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SDIVCCri, SPARC_INS_SDIVCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SDIVCCrr, SPARC_INS_SDIVCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SDIVXri, SPARC_INS_SDIVX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SDIVXrr, SPARC_INS_SDIVX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SDIVri, SPARC_INS_SDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SDIVrr, SPARC_INS_SDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SETHIXi, SPARC_INS_SETHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SETHIi, SPARC_INS_SETHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SHUTDOWN, SPARC_INS_SHUTDOWN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
-#endif
- },
- {
- SP_SIAM, SPARC_INS_SIAM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
-#endif
- },
- {
- SP_SLLXri, SPARC_INS_SLLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SLLXrr, SPARC_INS_SLLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SLLri, SPARC_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SLLrr, SPARC_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SMULCCri, SPARC_INS_SMULCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SMULCCrr, SPARC_INS_SMULCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SMULri, SPARC_INS_SMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SMULrr, SPARC_INS_SMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SRAXri, SPARC_INS_SRAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SRAXrr, SPARC_INS_SRAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SRAri, SPARC_INS_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SRArr, SPARC_INS_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SRLXri, SPARC_INS_SRLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SRLXrr, SPARC_INS_SRLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SRLri, SPARC_INS_SRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SRLrr, SPARC_INS_SRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STBAR, SPARC_INS_STBAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STBri, SPARC_INS_STB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STBrr, SPARC_INS_STB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STDFri, SPARC_INS_STD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STDFrr, SPARC_INS_STD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STFri, SPARC_INS_ST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STFrr, SPARC_INS_ST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STHri, SPARC_INS_STH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STHrr, SPARC_INS_STH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STQFri, SPARC_INS_STQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_STQFrr, SPARC_INS_STQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_STXri, SPARC_INS_STX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_STXrr, SPARC_INS_STX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_STri, SPARC_INS_ST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_STrr, SPARC_INS_ST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SUBCCri, SPARC_INS_SUBCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SUBCCrr, SPARC_INS_SUBCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SUBCri, SPARC_INS_SUBX,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SUBCrr, SPARC_INS_SUBX,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SUBEri, SPARC_INS_SUBXCC,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SUBErr, SPARC_INS_SUBXCC,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SUBXri, SPARC_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SUBXrr, SPARC_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_SUBri, SPARC_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SUBrr, SPARC_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SWAPri, SPARC_INS_SWAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_SWAPrr, SPARC_INS_SWAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TA3, SPARC_INS_T,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TA5, SPARC_INS_T,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TADDCCTVri, SPARC_INS_TADDCCTV,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TADDCCTVrr, SPARC_INS_TADDCCTV,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TADDCCri, SPARC_INS_TADDCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TADDCCrr, SPARC_INS_TADDCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TICCri, SPARC_INS_T,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TICCrr, SPARC_INS_T,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TLS_ADDXrr, SPARC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_TLS_ADDrr, SPARC_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TLS_CALL, SPARC_INS_CALL,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TLS_LDXrr, SPARC_INS_LDX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_TLS_LDrr, SPARC_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TSUBCCTVri, SPARC_INS_TSUBCCTV,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TSUBCCTVrr, SPARC_INS_TSUBCCTV,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TSUBCCri, SPARC_INS_TSUBCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TSUBCCrr, SPARC_INS_TSUBCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_TXCCri, SPARC_INS_T,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_TXCCrr, SPARC_INS_T,
-#ifndef CAPSTONE_DIET
- { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_UDIVCCri, SPARC_INS_UDIVCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_UDIVCCrr, SPARC_INS_UDIVCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_UDIVXri, SPARC_INS_UDIVX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_UDIVXrr, SPARC_INS_UDIVX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_UDIVri, SPARC_INS_UDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_UDIVrr, SPARC_INS_UDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_UMULCCri, SPARC_INS_UMULCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_UMULCCrr, SPARC_INS_UMULCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_UMULXHI, SPARC_INS_UMULXHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_UMULri, SPARC_INS_UMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_UMULrr, SPARC_INS_UMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_UNIMP, SPARC_INS_UNIMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_V9FCMPD, SPARC_INS_FCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_V9FCMPED, SPARC_INS_FCMPED,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_V9FCMPEQ, SPARC_INS_FCMPEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_V9FCMPES, SPARC_INS_FCMPES,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_V9FCMPQ, SPARC_INS_FCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
-#endif
- },
- {
- SP_V9FCMPS, SPARC_INS_FCMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_V9FMOVD_FCC, SPARC_INS_FMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_V9FMOVQ_FCC, SPARC_INS_FMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_V9FMOVS_FCC, SPARC_INS_FMOVS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_V9MOVFCCri, SPARC_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_V9MOVFCCrr, SPARC_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
-#endif
- },
- {
- SP_WRYri, SPARC_INS_WR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_WRYrr, SPARC_INS_WR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_XMULX, SPARC_INS_XMULX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_XMULXHI, SPARC_INS_XMULXHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
-#endif
- },
- {
- SP_XNORCCri, SPARC_INS_XNORCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_XNORCCrr, SPARC_INS_XNORCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_XNORXrr, SPARC_INS_XNOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_XNORri, SPARC_INS_XNOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_XNORrr, SPARC_INS_XNOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_XORCCri, SPARC_INS_XORCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_XORCCrr, SPARC_INS_XORCC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_XORXri, SPARC_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_XORXrr, SPARC_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
-#endif
- },
- {
- SP_XORri, SPARC_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SP_XORrr, SPARC_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
+#include "SparcMappingInsn.inc"
};
static struct hint_map {
diff --git a/arch/Sparc/SparcMappingInsn.inc b/arch/Sparc/SparcMappingInsn.inc
new file mode 100644
index 0000000..8762fde
--- /dev/null
+++ b/arch/Sparc/SparcMappingInsn.inc
@@ -0,0 +1,2643 @@
+// This is auto-gen data for Capstone engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{
+ SP_ADDCCri, SPARC_INS_ADDCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDCCrr, SPARC_INS_ADDCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDCri, SPARC_INS_ADDX,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDCrr, SPARC_INS_ADDX,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDEri, SPARC_INS_ADDXCC,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDErr, SPARC_INS_ADDXCC,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDXC, SPARC_INS_ADDXC,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDXCCC, SPARC_INS_ADDXCCC,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDXri, SPARC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDXrr, SPARC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDri, SPARC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ADDrr, SPARC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ALIGNADDR, SPARC_INS_ALIGNADDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_ALIGNADDRL, SPARC_INS_ALIGNADDRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDCCri, SPARC_INS_ANDCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDCCrr, SPARC_INS_ANDCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDNCCri, SPARC_INS_ANDNCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDNCCrr, SPARC_INS_ANDNCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDNri, SPARC_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDNrr, SPARC_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDXNrr, SPARC_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDXri, SPARC_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDXrr, SPARC_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDri, SPARC_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ANDrr, SPARC_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ARRAY16, SPARC_INS_ARRAY16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_ARRAY32, SPARC_INS_ARRAY32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_ARRAY8, SPARC_INS_ARRAY8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_BA, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SP_BCOND, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SP_BCONDA, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SP_BINDri, SPARC_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ SP_BINDrr, SPARC_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ SP_BMASK, SPARC_INS_BMASK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
+#endif
+},
+{
+ SP_BPFCC, SPARC_INS_FB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPFCCA, SPARC_INS_FB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPFCCANT, SPARC_INS_FB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPFCCNT, SPARC_INS_FB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPGEZapn, SPARC_INS_BRGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPGEZapt, SPARC_INS_BRGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPGEZnapn, SPARC_INS_BRGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPGEZnapt, SPARC_INS_BRGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPGZapn, SPARC_INS_BRGZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPGZapt, SPARC_INS_BRGZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPGZnapn, SPARC_INS_BRGZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPGZnapt, SPARC_INS_BRGZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPICC, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPICCA, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPICCANT, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPICCNT, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPLEZapn, SPARC_INS_BRLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPLEZapt, SPARC_INS_BRLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPLEZnapn, SPARC_INS_BRLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPLEZnapt, SPARC_INS_BRLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPLZapn, SPARC_INS_BRLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPLZapt, SPARC_INS_BRLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPLZnapn, SPARC_INS_BRLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPLZnapt, SPARC_INS_BRLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPNZapn, SPARC_INS_BRNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPNZapt, SPARC_INS_BRNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPNZnapn, SPARC_INS_BRNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPNZnapt, SPARC_INS_BRNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPXCC, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPXCCA, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPXCCANT, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPXCCNT, SPARC_INS_B,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPZapn, SPARC_INS_BRZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPZapt, SPARC_INS_BRZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPZnapn, SPARC_INS_BRZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BPZnapt, SPARC_INS_BRZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 1, 0
+#endif
+},
+{
+ SP_BSHUFFLE, SPARC_INS_BSHUFFLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
+#endif
+},
+{
+ SP_CALL, SPARC_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_CALLri, SPARC_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_CALLrr, SPARC_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_CASXrr, SPARC_INS_CASX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_CASrr, SPARC_INS_CAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_CMASK16, SPARC_INS_CMASK16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_CMASK32, SPARC_INS_CMASK32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_CMASK8, SPARC_INS_CMASK8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_CMPri, SPARC_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_CMPrr, SPARC_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE16, SPARC_INS_EDGE16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE16L, SPARC_INS_EDGE16L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE16LN, SPARC_INS_EDGE16LN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE16N, SPARC_INS_EDGE16N,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE32, SPARC_INS_EDGE32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE32L, SPARC_INS_EDGE32L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE32LN, SPARC_INS_EDGE32LN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE32N, SPARC_INS_EDGE32N,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE8, SPARC_INS_EDGE8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE8L, SPARC_INS_EDGE8L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE8LN, SPARC_INS_EDGE8LN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
+#endif
+},
+{
+ SP_EDGE8N, SPARC_INS_EDGE8N,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
+#endif
+},
+{
+ SP_FABSD, SPARC_INS_FABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FABSQ, SPARC_INS_FABSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FABSS, SPARC_INS_FABSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FADDD, SPARC_INS_FADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FADDQ, SPARC_INS_FADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FADDS, SPARC_INS_FADDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FALIGNADATA, SPARC_INS_FALIGNDATA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FAND, SPARC_INS_FAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FANDNOT1, SPARC_INS_FANDNOT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FANDNOT1S, SPARC_INS_FANDNOT1S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FANDNOT2, SPARC_INS_FANDNOT2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FANDNOT2S, SPARC_INS_FANDNOT2S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FANDS, SPARC_INS_FANDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FBCOND, SPARC_INS_FB,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_FCC0, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SP_FBCONDA, SPARC_INS_FB,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_FCC0, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SP_FCHKSM16, SPARC_INS_FCHKSM16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPD, SPARC_INS_FCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_FCC0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPEQ16, SPARC_INS_FCMPEQ16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPEQ32, SPARC_INS_FCMPEQ32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPGT16, SPARC_INS_FCMPGT16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPGT32, SPARC_INS_FCMPGT32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPLE16, SPARC_INS_FCMPLE16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPLE32, SPARC_INS_FCMPLE32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPNE16, SPARC_INS_FCMPNE16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPNE32, SPARC_INS_FCMPNE32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPQ, SPARC_INS_FCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_FCC0, 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FCMPS, SPARC_INS_FCMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_FCC0, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FDIVD, SPARC_INS_FDIVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FDIVQ, SPARC_INS_FDIVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FDIVS, SPARC_INS_FDIVS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FDMULQ, SPARC_INS_FDMULQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FDTOI, SPARC_INS_FDTOI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FDTOQ, SPARC_INS_FDTOQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FDTOS, SPARC_INS_FDTOS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FDTOX, SPARC_INS_FDTOX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_FEXPAND, SPARC_INS_FEXPAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FHADDD, SPARC_INS_FHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FHADDS, SPARC_INS_FHADDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FHSUBD, SPARC_INS_FHSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FHSUBS, SPARC_INS_FHSUBS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FITOD, SPARC_INS_FITOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FITOQ, SPARC_INS_FITOQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FITOS, SPARC_INS_FITOS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FLCMPD, SPARC_INS_FLCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FLCMPS, SPARC_INS_FLCMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FLUSHW, SPARC_INS_FLUSHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMEAN16, SPARC_INS_FMEAN16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVD, SPARC_INS_FMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVD_FCC, SPARC_INS_FMOVD,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVD_ICC, SPARC_INS_FMOVD,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVD_XCC, SPARC_INS_FMOVD,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVQ, SPARC_INS_FMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVQ_FCC, SPARC_INS_FMOVQ,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVQ_ICC, SPARC_INS_FMOVQ,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVQ_XCC, SPARC_INS_FMOVQ,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRGEZD, SPARC_INS_FMOVRDGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRGEZQ, SPARC_INS_FMOVRQGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRGEZS, SPARC_INS_FMOVRSGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRGZD, SPARC_INS_FMOVRDGZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRGZQ, SPARC_INS_FMOVRQGZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRGZS, SPARC_INS_FMOVRSGZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRLEZD, SPARC_INS_FMOVRDLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRLEZQ, SPARC_INS_FMOVRQLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRLEZS, SPARC_INS_FMOVRSLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRLZD, SPARC_INS_FMOVRDLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRLZQ, SPARC_INS_FMOVRQLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRLZS, SPARC_INS_FMOVRSLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRNZD, SPARC_INS_FMOVRDNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRNZQ, SPARC_INS_FMOVRQNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRNZS, SPARC_INS_FMOVRSNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRZD, SPARC_INS_FMOVRDZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRZQ, SPARC_INS_FMOVRQZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVRZS, SPARC_INS_FMOVRSZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVS, SPARC_INS_FMOVS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVS_FCC, SPARC_INS_FMOVS,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVS_ICC, SPARC_INS_FMOVS,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMOVS_XCC, SPARC_INS_FMOVS,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMUL8SUX16, SPARC_INS_FMUL8SUX16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMUL8ULX16, SPARC_INS_FMUL8ULX16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMUL8X16, SPARC_INS_FMUL8X16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMUL8X16AL, SPARC_INS_FMUL8X16AL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMUL8X16AU, SPARC_INS_FMUL8X16AU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMULD, SPARC_INS_FMULD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FMULD8SUX16, SPARC_INS_FMULD8SUX16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMULD8ULX16, SPARC_INS_FMULD8ULX16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMULQ, SPARC_INS_FMULQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FMULS, SPARC_INS_FMULS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FNADDD, SPARC_INS_FNADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNADDS, SPARC_INS_FNADDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNAND, SPARC_INS_FNAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNANDS, SPARC_INS_FNANDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNEGD, SPARC_INS_FNEGD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNEGQ, SPARC_INS_FNEGQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNEGS, SPARC_INS_FNEGS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FNHADDD, SPARC_INS_FNHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNHADDS, SPARC_INS_FNHADDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNMULD, SPARC_INS_FNHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNMULS, SPARC_INS_FNHADDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNOR, SPARC_INS_FNOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNORS, SPARC_INS_FNORS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNOT1, SPARC_INS_FNOT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNOT1S, SPARC_INS_FNOT1S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNOT2, SPARC_INS_FNOT2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNOT2S, SPARC_INS_FNOT2S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FNSMULD, SPARC_INS_FNHADDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FONE, SPARC_INS_FONE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FONES, SPARC_INS_FONES,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FOR, SPARC_INS_FOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FORNOT1, SPARC_INS_FORNOT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FORNOT1S, SPARC_INS_FORNOT1S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FORNOT2, SPARC_INS_FORNOT2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FORNOT2S, SPARC_INS_FORNOT2S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FORS, SPARC_INS_FORS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPACK16, SPARC_INS_FPACK16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPACK32, SPARC_INS_FPACK32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPACKFIX, SPARC_INS_FPACKFIX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPADD16, SPARC_INS_FPADD16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPADD16S, SPARC_INS_FPADD16S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPADD32, SPARC_INS_FPADD32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPADD32S, SPARC_INS_FPADD32S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPADD64, SPARC_INS_FPADD64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPMERGE, SPARC_INS_FPMERGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPSUB16, SPARC_INS_FPSUB16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPSUB16S, SPARC_INS_FPSUB16S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPSUB32, SPARC_INS_FPSUB32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FPSUB32S, SPARC_INS_FPSUB32S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FQTOD, SPARC_INS_FQTOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FQTOI, SPARC_INS_FQTOI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FQTOS, SPARC_INS_FQTOS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FQTOX, SPARC_INS_FQTOX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSLAS16, SPARC_INS_FSLAS16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSLAS32, SPARC_INS_FSLAS32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSLL16, SPARC_INS_FSLL16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSLL32, SPARC_INS_FSLL32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSMULD, SPARC_INS_FSMULD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FSQRTD, SPARC_INS_FSQRTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FSQRTQ, SPARC_INS_FSQRTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSQRTS, SPARC_INS_FSQRTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FSRA16, SPARC_INS_FSRA16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSRA32, SPARC_INS_FSRA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSRC1, SPARC_INS_FSRC1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSRC1S, SPARC_INS_FSRC1S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSRC2, SPARC_INS_FSRC2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSRC2S, SPARC_INS_FSRC2S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSRL16, SPARC_INS_FSRL16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSRL32, SPARC_INS_FSRL32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSTOD, SPARC_INS_FSTOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FSTOI, SPARC_INS_FSTOI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FSTOQ, SPARC_INS_FSTOQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSTOX, SPARC_INS_FSTOX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSUBD, SPARC_INS_FSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FSUBQ, SPARC_INS_FSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_FSUBS, SPARC_INS_FSUBS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_FXNOR, SPARC_INS_FXNOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FXNORS, SPARC_INS_FXNORS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FXOR, SPARC_INS_FXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FXORS, SPARC_INS_FXORS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FXTOD, SPARC_INS_FXTOD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_FXTOQ, SPARC_INS_FXTOQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_FXTOS, SPARC_INS_FXTOS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_FZERO, SPARC_INS_FZERO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_FZEROS, SPARC_INS_FZEROS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_JMPLri, SPARC_INS_JMPL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_JMPLrr, SPARC_INS_JMPL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDDFri, SPARC_INS_LDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDDFrr, SPARC_INS_LDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDFri, SPARC_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDFrr, SPARC_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDQFri, SPARC_INS_LDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_LDQFrr, SPARC_INS_LDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_LDSBri, SPARC_INS_LDSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDSBrr, SPARC_INS_LDSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDSHri, SPARC_INS_LDSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDSHrr, SPARC_INS_LDSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDSWri, SPARC_INS_LDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_LDSWrr, SPARC_INS_LDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_LDUBri, SPARC_INS_LDUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDUBrr, SPARC_INS_LDUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDUHri, SPARC_INS_LDUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDUHrr, SPARC_INS_LDUH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDXri, SPARC_INS_LDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_LDXrr, SPARC_INS_LDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_LDri, SPARC_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LDrr, SPARC_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_LEAX_ADDri, SPARC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_LEA_ADDri, SPARC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_32BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_LZCNT, SPARC_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_MEMBARi, SPARC_INS_MEMBAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVDTOX, SPARC_INS_MOVDTOX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVFCCri, SPARC_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVFCCrr, SPARC_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_FCC0, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVICCri, SPARC_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVICCrr, SPARC_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRGEZri, SPARC_INS_MOVRGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRGEZrr, SPARC_INS_MOVRGEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRGZri, SPARC_INS_MOVRGZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRGZrr, SPARC_INS_MOVRGZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRLEZri, SPARC_INS_MOVRLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRLEZrr, SPARC_INS_MOVRLEZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRLZri, SPARC_INS_MOVRLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRLZrr, SPARC_INS_MOVRLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRNZri, SPARC_INS_MOVRNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRNZrr, SPARC_INS_MOVRNZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRRZri, SPARC_INS_MOVRZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVRRZrr, SPARC_INS_MOVRZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVSTOSW, SPARC_INS_MOVSTOSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVSTOUW, SPARC_INS_MOVSTOUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVWTOS, SPARC_INS_MOVDTOX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVXCCri, SPARC_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVXCCrr, SPARC_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MOVXTOD, SPARC_INS_MOVDTOX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_MULXri, SPARC_INS_MULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_MULXrr, SPARC_INS_MULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_NOP, SPARC_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ORCCri, SPARC_INS_ORCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ORCCrr, SPARC_INS_ORCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ORNCCri, SPARC_INS_ORNCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ORNCCrr, SPARC_INS_ORNCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ORNri, SPARC_INS_ORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ORNrr, SPARC_INS_ORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ORXNrr, SPARC_INS_ORN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_ORXri, SPARC_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_ORXrr, SPARC_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_ORri, SPARC_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_ORrr, SPARC_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_PDIST, SPARC_INS_PDIST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_PDISTN, SPARC_INS_PDISTN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_POPCrr, SPARC_INS_POPC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_RDY, SPARC_INS_RD,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_Y, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_RESTOREri, SPARC_INS_RESTORE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_RESTORErr, SPARC_INS_RESTORE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_RET, SPARC_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_RETL, SPARC_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_RETTri, SPARC_INS_RETT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_RETTrr, SPARC_INS_RETT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SAVEri, SPARC_INS_SAVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SAVErr, SPARC_INS_SAVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SDIVCCri, SPARC_INS_SDIVCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SDIVCCrr, SPARC_INS_SDIVCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SDIVXri, SPARC_INS_SDIVX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SDIVXrr, SPARC_INS_SDIVX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SDIVri, SPARC_INS_SDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SDIVrr, SPARC_INS_SDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SETHIXi, SPARC_INS_SETHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SETHIi, SPARC_INS_SETHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SHUTDOWN, SPARC_INS_SHUTDOWN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS, 0 }, 0, 0
+#endif
+},
+{
+ SP_SIAM, SPARC_INS_SIAM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS2, 0 }, 0, 0
+#endif
+},
+{
+ SP_SLLXri, SPARC_INS_SLLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SLLXrr, SPARC_INS_SLLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SLLri, SPARC_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SLLrr, SPARC_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SMULCCri, SPARC_INS_SMULCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SMULCCrr, SPARC_INS_SMULCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SMULri, SPARC_INS_SMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SMULrr, SPARC_INS_SMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SRAXri, SPARC_INS_SRAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SRAXrr, SPARC_INS_SRAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SRAri, SPARC_INS_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SRArr, SPARC_INS_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SRLXri, SPARC_INS_SRLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SRLXrr, SPARC_INS_SRLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SRLri, SPARC_INS_SRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SRLrr, SPARC_INS_SRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STBAR, SPARC_INS_STBAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STBri, SPARC_INS_STB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STBrr, SPARC_INS_STB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STDFri, SPARC_INS_STD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STDFrr, SPARC_INS_STD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STFri, SPARC_INS_ST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STFrr, SPARC_INS_ST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STHri, SPARC_INS_STH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STHrr, SPARC_INS_STH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STQFri, SPARC_INS_STQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_STQFrr, SPARC_INS_STQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_STXri, SPARC_INS_STX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_STXrr, SPARC_INS_STX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_STri, SPARC_INS_ST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_STrr, SPARC_INS_ST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SUBCCri, SPARC_INS_SUBCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SUBCCrr, SPARC_INS_SUBCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SUBCri, SPARC_INS_SUBX,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SUBCrr, SPARC_INS_SUBX,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SUBEri, SPARC_INS_SUBXCC,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SUBErr, SPARC_INS_SUBXCC,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SUBXri, SPARC_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SUBXrr, SPARC_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_SUBri, SPARC_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SUBrr, SPARC_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SWAPri, SPARC_INS_SWAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_SWAPrr, SPARC_INS_SWAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TA3, SPARC_INS_T,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TA5, SPARC_INS_T,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TADDCCTVri, SPARC_INS_TADDCCTV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TADDCCTVrr, SPARC_INS_TADDCCTV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TADDCCri, SPARC_INS_TADDCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TADDCCrr, SPARC_INS_TADDCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TICCri, SPARC_INS_T,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TICCrr, SPARC_INS_T,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TLS_ADDXrr, SPARC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_TLS_ADDrr, SPARC_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TLS_CALL, SPARC_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_O6, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TLS_LDXrr, SPARC_INS_LDX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_TLS_LDrr, SPARC_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TSUBCCTVri, SPARC_INS_TSUBCCTV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TSUBCCTVrr, SPARC_INS_TSUBCCTV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TSUBCCri, SPARC_INS_TSUBCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TSUBCCrr, SPARC_INS_TSUBCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_TXCCri, SPARC_INS_T,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_TXCCrr, SPARC_INS_T,
+#ifndef CAPSTONE_DIET
+ { SPARC_REG_ICC, 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_UDIVCCri, SPARC_INS_UDIVCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_UDIVCCrr, SPARC_INS_UDIVCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_UDIVXri, SPARC_INS_UDIVX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_UDIVXrr, SPARC_INS_UDIVX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_UDIVri, SPARC_INS_UDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_UDIVrr, SPARC_INS_UDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_UMULCCri, SPARC_INS_UMULCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_UMULCCrr, SPARC_INS_UMULCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_UMULXHI, SPARC_INS_UMULXHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_UMULri, SPARC_INS_UMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_UMULrr, SPARC_INS_UMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_UNIMP, SPARC_INS_UNIMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_V9FCMPD, SPARC_INS_FCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_V9FCMPED, SPARC_INS_FCMPED,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_V9FCMPEQ, SPARC_INS_FCMPEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_V9FCMPES, SPARC_INS_FCMPES,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_V9FCMPQ, SPARC_INS_FCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_HARDQUAD, 0 }, 0, 0
+#endif
+},
+{
+ SP_V9FCMPS, SPARC_INS_FCMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_V9FMOVD_FCC, SPARC_INS_FMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_V9FMOVQ_FCC, SPARC_INS_FMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_V9FMOVS_FCC, SPARC_INS_FMOVS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_V9MOVFCCri, SPARC_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_V9MOVFCCrr, SPARC_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_V9, 0 }, 0, 0
+#endif
+},
+{
+ SP_WRYri, SPARC_INS_WR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_WRYrr, SPARC_INS_WR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_Y, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_XMULX, SPARC_INS_XMULX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_XMULXHI, SPARC_INS_XMULXHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_VIS3, 0 }, 0, 0
+#endif
+},
+{
+ SP_XNORCCri, SPARC_INS_XNORCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_XNORCCrr, SPARC_INS_XNORCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_XNORXrr, SPARC_INS_XNOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_XNORri, SPARC_INS_XNOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_XNORrr, SPARC_INS_XNOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_XORCCri, SPARC_INS_XORCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_XORCCrr, SPARC_INS_XORCC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SPARC_REG_ICC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_XORXri, SPARC_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_XORXrr, SPARC_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SPARC_GRP_64BIT, 0 }, 0, 0
+#endif
+},
+{
+ SP_XORri, SPARC_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SP_XORrr, SPARC_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
diff --git a/arch/SystemZ/SystemZMapping.c b/arch/SystemZ/SystemZMapping.c
index e6cac1b..ad27338 100644
--- a/arch/SystemZ/SystemZMapping.c
+++ b/arch/SystemZ/SystemZMapping.c
@@ -75,4242 +75,7 @@
#endif
},
- {
- SystemZ_A, SYSZ_INS_A,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ADB, SYSZ_INS_ADB,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ADBR, SYSZ_INS_ADBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AEB, SYSZ_INS_AEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AEBR, SYSZ_INS_AEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AFI, SYSZ_INS_AFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AG, SYSZ_INS_AG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AGF, SYSZ_INS_AGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AGFI, SYSZ_INS_AGFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AGFR, SYSZ_INS_AGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AGHI, SYSZ_INS_AGHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AGHIK, SYSZ_INS_AGHIK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AGR, SYSZ_INS_AGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AGRK, SYSZ_INS_AGRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AGSI, SYSZ_INS_AGSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AH, SYSZ_INS_AH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AHI, SYSZ_INS_AHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AHIK, SYSZ_INS_AHIK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AHY, SYSZ_INS_AHY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AIH, SYSZ_INS_AIH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AL, SYSZ_INS_AL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALC, SYSZ_INS_ALC,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALCG, SYSZ_INS_ALCG,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALCGR, SYSZ_INS_ALCGR,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALCR, SYSZ_INS_ALCR,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALFI, SYSZ_INS_ALFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALG, SYSZ_INS_ALG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALGF, SYSZ_INS_ALGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALGFI, SYSZ_INS_ALGFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALGFR, SYSZ_INS_ALGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALGHSIK, SYSZ_INS_ALGHSIK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALGR, SYSZ_INS_ALGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALGRK, SYSZ_INS_ALGRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALHSIK, SYSZ_INS_ALHSIK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALR, SYSZ_INS_ALR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALRK, SYSZ_INS_ALRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ALY, SYSZ_INS_ALY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AR, SYSZ_INS_AR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ARK, SYSZ_INS_ARK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ASI, SYSZ_INS_ASI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AXBR, SYSZ_INS_AXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AY, SYSZ_INS_AY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmBCR, SYSZ_INS_BCR,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmBRC, SYSZ_INS_BRC,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmBRCL, SYSZ_INS_BRCL,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmCGIJ, SYSZ_INS_CGIJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmCGRJ, SYSZ_INS_CGRJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmCIJ, SYSZ_INS_CIJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmCLGIJ, SYSZ_INS_CLGIJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmCLGRJ, SYSZ_INS_CLGRJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmCLIJ, SYSZ_INS_CLIJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmCLRJ, SYSZ_INS_CLRJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmCRJ, SYSZ_INS_CRJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_AsmEBR, SYSZ_INS_BER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmEJ, SYSZ_INS_JE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmEJG, SYSZ_INS_JGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmELOC, SYSZ_INS_LOCE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmELOCG, SYSZ_INS_LOCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmELOCGR, SYSZ_INS_LOCGRE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmELOCR, SYSZ_INS_LOCRE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmESTOC, SYSZ_INS_STOCE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmESTOCG, SYSZ_INS_STOCGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHBR, SYSZ_INS_BHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHEBR, SYSZ_INS_BHER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHEJ, SYSZ_INS_JHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHEJG, SYSZ_INS_JGHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHELOC, SYSZ_INS_LOCHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHELOCG, SYSZ_INS_LOCGHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHELOCGR, SYSZ_INS_LOCGRHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHELOCR, SYSZ_INS_LOCRHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHESTOC, SYSZ_INS_STOCHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHESTOCG, SYSZ_INS_STOCGHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHJ, SYSZ_INS_JH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHJG, SYSZ_INS_JGH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHLOC, SYSZ_INS_LOCH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHLOCG, SYSZ_INS_LOCGH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHLOCGR, SYSZ_INS_LOCGRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHLOCR, SYSZ_INS_LOCRH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHSTOC, SYSZ_INS_STOCH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmHSTOCG, SYSZ_INS_STOCGH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJEAltCGI, SYSZ_INS_CGIJNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJEAltCGR, SYSZ_INS_CGRJNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJEAltCI, SYSZ_INS_CIJNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJEAltCLGI, SYSZ_INS_CLGIJNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJEAltCLGR, SYSZ_INS_CLGRJNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJEAltCLI, SYSZ_INS_CLIJNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJEAltCLR, SYSZ_INS_CLRJNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJEAltCR, SYSZ_INS_CRJNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJECGI, SYSZ_INS_CGIJE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJECGR, SYSZ_INS_CGRJE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJECI, SYSZ_INS_CIJE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJECLGI, SYSZ_INS_CLGIJE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJECLGR, SYSZ_INS_CLGRJE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJECLI, SYSZ_INS_CLIJE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJECLR, SYSZ_INS_CLRJE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJECR, SYSZ_INS_CRJE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHAltCGI, SYSZ_INS_CGIJNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHAltCGR, SYSZ_INS_CGRJNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHAltCI, SYSZ_INS_CIJNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHAltCLGI, SYSZ_INS_CLGIJNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHAltCLGR, SYSZ_INS_CLGRJNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHAltCLI, SYSZ_INS_CLIJNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHAltCLR, SYSZ_INS_CLRJNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHAltCR, SYSZ_INS_CRJNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHCGI, SYSZ_INS_CGIJH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHCGR, SYSZ_INS_CGRJH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHCI, SYSZ_INS_CIJH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHCLGI, SYSZ_INS_CLGIJH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHCLGR, SYSZ_INS_CLGRJH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHCLI, SYSZ_INS_CLIJH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHCLR, SYSZ_INS_CLRJH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHCR, SYSZ_INS_CRJH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHEAltCGI, SYSZ_INS_CGIJNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHEAltCGR, SYSZ_INS_CGRJNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHEAltCI, SYSZ_INS_CIJNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHEAltCLGI, SYSZ_INS_CLGIJNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHEAltCLGR, SYSZ_INS_CLGRJNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHEAltCLI, SYSZ_INS_CLIJNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHEAltCLR, SYSZ_INS_CLRJNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHEAltCR, SYSZ_INS_CRJNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHECGI, SYSZ_INS_CGIJHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHECGR, SYSZ_INS_CGRJHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHECI, SYSZ_INS_CIJHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHECLGI, SYSZ_INS_CLGIJHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHECLGR, SYSZ_INS_CLGRJHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHECLI, SYSZ_INS_CLIJHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHECLR, SYSZ_INS_CLRJHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJHECR, SYSZ_INS_CRJHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLAltCGI, SYSZ_INS_CGIJNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLAltCGR, SYSZ_INS_CGRJNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLAltCI, SYSZ_INS_CIJNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLAltCLGI, SYSZ_INS_CLGIJNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLAltCLGR, SYSZ_INS_CLGRJNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLAltCLI, SYSZ_INS_CLIJNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLAltCLR, SYSZ_INS_CLRJNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLAltCR, SYSZ_INS_CRJNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLCGI, SYSZ_INS_CGIJL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLCGR, SYSZ_INS_CGRJL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLCI, SYSZ_INS_CIJL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLCLGI, SYSZ_INS_CLGIJL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLCLGR, SYSZ_INS_CLGRJL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLCLI, SYSZ_INS_CLIJL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLCLR, SYSZ_INS_CLRJL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLCR, SYSZ_INS_CRJL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLEAltCGI, SYSZ_INS_CGIJNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLEAltCGR, SYSZ_INS_CGRJNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLEAltCI, SYSZ_INS_CIJNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLEAltCLGI, SYSZ_INS_CLGIJNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLEAltCLGR, SYSZ_INS_CLGRJNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLEAltCLI, SYSZ_INS_CLIJNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLEAltCLR, SYSZ_INS_CLRJNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLEAltCR, SYSZ_INS_CRJNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLECGI, SYSZ_INS_CGIJLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLECGR, SYSZ_INS_CGRJLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLECI, SYSZ_INS_CIJLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLECLGI, SYSZ_INS_CLGIJLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLECLGR, SYSZ_INS_CLGRJLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLECLI, SYSZ_INS_CLIJLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLECLR, SYSZ_INS_CLRJLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLECR, SYSZ_INS_CRJLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHAltCGI, SYSZ_INS_CGIJNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHAltCGR, SYSZ_INS_CGRJNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHAltCI, SYSZ_INS_CIJNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHAltCLGI, SYSZ_INS_CLGIJNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHAltCLGR, SYSZ_INS_CLGRJNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHAltCLI, SYSZ_INS_CLIJNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHAltCLR, SYSZ_INS_CLRJNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHAltCR, SYSZ_INS_CRJNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHCGI, SYSZ_INS_CGIJLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHCGR, SYSZ_INS_CGRJLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHCI, SYSZ_INS_CIJLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHCLGI, SYSZ_INS_CLGIJLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHCLGR, SYSZ_INS_CLGRJLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHCLI, SYSZ_INS_CLIJLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHCLR, SYSZ_INS_CLRJLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmJLHCR, SYSZ_INS_CRJLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLBR, SYSZ_INS_BLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLEBR, SYSZ_INS_BLER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLEJ, SYSZ_INS_JLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLEJG, SYSZ_INS_JGLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLELOC, SYSZ_INS_LOCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLELOCG, SYSZ_INS_LOCGLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLELOCGR, SYSZ_INS_LOCGRLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLELOCR, SYSZ_INS_LOCRLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLESTOC, SYSZ_INS_STOCLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLESTOCG, SYSZ_INS_STOCGLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLHBR, SYSZ_INS_BLHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLHJ, SYSZ_INS_JLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLHJG, SYSZ_INS_JGLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLHLOC, SYSZ_INS_LOCLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLHLOCG, SYSZ_INS_LOCGLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLHLOCGR, SYSZ_INS_LOCGRLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLHLOCR, SYSZ_INS_LOCRLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLHSTOC, SYSZ_INS_STOCLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLHSTOCG, SYSZ_INS_STOCGLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLJ, SYSZ_INS_JL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLJG, SYSZ_INS_JGL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLLOC, SYSZ_INS_LOCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLLOCG, SYSZ_INS_LOCGL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLLOCGR, SYSZ_INS_LOCGRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLLOCR, SYSZ_INS_LOCRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLOC, SYSZ_INS_LOC,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLOCG, SYSZ_INS_LOCG,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLOCGR, SYSZ_INS_LOCGR,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLOCR, SYSZ_INS_LOCR,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLSTOC, SYSZ_INS_STOCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmLSTOCG, SYSZ_INS_STOCGL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNEBR, SYSZ_INS_BNER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNEJ, SYSZ_INS_JNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNEJG, SYSZ_INS_JGNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNELOC, SYSZ_INS_LOCNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNELOCG, SYSZ_INS_LOCGNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNELOCGR, SYSZ_INS_LOCGRNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNELOCR, SYSZ_INS_LOCRNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNESTOC, SYSZ_INS_STOCNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNESTOCG, SYSZ_INS_STOCGNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHBR, SYSZ_INS_BNHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHEBR, SYSZ_INS_BNHER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHEJ, SYSZ_INS_JNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHEJG, SYSZ_INS_JGNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHELOC, SYSZ_INS_LOCNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHELOCG, SYSZ_INS_LOCGNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHELOCGR, SYSZ_INS_LOCGRNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHELOCR, SYSZ_INS_LOCRNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHESTOC, SYSZ_INS_STOCNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHESTOCG, SYSZ_INS_STOCGNHE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHJ, SYSZ_INS_JNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHJG, SYSZ_INS_JGNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHLOC, SYSZ_INS_LOCNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHLOCG, SYSZ_INS_LOCGNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHLOCGR, SYSZ_INS_LOCGRNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHLOCR, SYSZ_INS_LOCRNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHSTOC, SYSZ_INS_STOCNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNHSTOCG, SYSZ_INS_STOCGNH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLBR, SYSZ_INS_BNLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLEBR, SYSZ_INS_BNLER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLEJ, SYSZ_INS_JNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLEJG, SYSZ_INS_JGNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLELOC, SYSZ_INS_LOCNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLELOCG, SYSZ_INS_LOCGNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLELOCGR, SYSZ_INS_LOCGRNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLELOCR, SYSZ_INS_LOCRNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLESTOC, SYSZ_INS_STOCNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLESTOCG, SYSZ_INS_STOCGNLE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLHBR, SYSZ_INS_BNLHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLHJ, SYSZ_INS_JNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLHJG, SYSZ_INS_JGNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLHLOC, SYSZ_INS_LOCNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLHLOCG, SYSZ_INS_LOCGNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLHLOCGR, SYSZ_INS_LOCGRNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLHLOCR, SYSZ_INS_LOCRNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLHSTOC, SYSZ_INS_STOCNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLHSTOCG, SYSZ_INS_STOCGNLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLJ, SYSZ_INS_JNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLJG, SYSZ_INS_JGNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLLOC, SYSZ_INS_LOCNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLLOCG, SYSZ_INS_LOCGNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLLOCGR, SYSZ_INS_LOCGRNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLLOCR, SYSZ_INS_LOCRNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLSTOC, SYSZ_INS_STOCNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNLSTOCG, SYSZ_INS_STOCGNL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNOBR, SYSZ_INS_BNOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNOJ, SYSZ_INS_JNO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNOJG, SYSZ_INS_JGNO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNOLOC, SYSZ_INS_LOCNO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNOLOCG, SYSZ_INS_LOCGNO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNOLOCGR, SYSZ_INS_LOCGRNO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNOLOCR, SYSZ_INS_LOCRNO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNOSTOC, SYSZ_INS_STOCNO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmNOSTOCG, SYSZ_INS_STOCGNO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmOBR, SYSZ_INS_BOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmOJ, SYSZ_INS_JO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmOJG, SYSZ_INS_JGO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmOLOC, SYSZ_INS_LOCO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmOLOCG, SYSZ_INS_LOCGO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmOLOCGR, SYSZ_INS_LOCGRO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmOLOCR, SYSZ_INS_LOCRO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmOSTOC, SYSZ_INS_STOCO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmOSTOCG, SYSZ_INS_STOCGO,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmSTOC, SYSZ_INS_STOC,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_AsmSTOCG, SYSZ_INS_STOCG,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_BASR, SYSZ_INS_BASR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_BR, SYSZ_INS_BR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- SystemZ_BRAS, SYSZ_INS_BRAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_BRASL, SYSZ_INS_BRASL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_BRC, SYSZ_INS_J,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_BRCL, SYSZ_INS_JG,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_BRCT, SYSZ_INS_BRCT,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_BRCTG, SYSZ_INS_BRCTG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_C, SYSZ_INS_C,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CDB, SYSZ_INS_CDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CDBR, SYSZ_INS_CDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CDFBR, SYSZ_INS_CDFBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CDGBR, SYSZ_INS_CDGBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CDLFBR, SYSZ_INS_CDLFBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CDLGBR, SYSZ_INS_CDLGBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CEB, SYSZ_INS_CEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CEBR, SYSZ_INS_CEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CEFBR, SYSZ_INS_CEFBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CEGBR, SYSZ_INS_CEGBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CELFBR, SYSZ_INS_CELFBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CELGBR, SYSZ_INS_CELGBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CFDBR, SYSZ_INS_CFDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CFEBR, SYSZ_INS_CFEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CFI, SYSZ_INS_CFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CFXBR, SYSZ_INS_CFXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CG, SYSZ_INS_CG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGDBR, SYSZ_INS_CGDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGEBR, SYSZ_INS_CGEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGF, SYSZ_INS_CGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGFI, SYSZ_INS_CGFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGFR, SYSZ_INS_CGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGFRL, SYSZ_INS_CGFRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGH, SYSZ_INS_CGH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGHI, SYSZ_INS_CGHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGHRL, SYSZ_INS_CGHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGHSI, SYSZ_INS_CGHSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGIJ, SYSZ_INS_CGIJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_CGR, SYSZ_INS_CGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGRJ, SYSZ_INS_CGRJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_CGRL, SYSZ_INS_CGRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CGXBR, SYSZ_INS_CGXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CH, SYSZ_INS_CH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CHF, SYSZ_INS_CHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CHHSI, SYSZ_INS_CHHSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CHI, SYSZ_INS_CHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CHRL, SYSZ_INS_CHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CHSI, SYSZ_INS_CHSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CHY, SYSZ_INS_CHY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CIH, SYSZ_INS_CIH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CIJ, SYSZ_INS_CIJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_CL, SYSZ_INS_CL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLC, SYSZ_INS_CLC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLFDBR, SYSZ_INS_CLFDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLFEBR, SYSZ_INS_CLFEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLFHSI, SYSZ_INS_CLFHSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLFI, SYSZ_INS_CLFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLFXBR, SYSZ_INS_CLFXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLG, SYSZ_INS_CLG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGDBR, SYSZ_INS_CLGDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGEBR, SYSZ_INS_CLGEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGF, SYSZ_INS_CLGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGFI, SYSZ_INS_CLGFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGFR, SYSZ_INS_CLGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGFRL, SYSZ_INS_CLGFRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGHRL, SYSZ_INS_CLGHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGHSI, SYSZ_INS_CLGHSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGIJ, SYSZ_INS_CLGIJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_CLGR, SYSZ_INS_CLGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGRJ, SYSZ_INS_CLGRJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_CLGRL, SYSZ_INS_CLGRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLGXBR, SYSZ_INS_CLGXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLHF, SYSZ_INS_CLHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLHHSI, SYSZ_INS_CLHHSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLHRL, SYSZ_INS_CLHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLI, SYSZ_INS_CLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLIH, SYSZ_INS_CLIH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLIJ, SYSZ_INS_CLIJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_CLIY, SYSZ_INS_CLIY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLR, SYSZ_INS_CLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLRJ, SYSZ_INS_CLRJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_CLRL, SYSZ_INS_CLRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLST, SYSZ_INS_CLST,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_R0L, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CLY, SYSZ_INS_CLY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CPSDRdd, SYSZ_INS_CPSDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CPSDRds, SYSZ_INS_CPSDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CPSDRsd, SYSZ_INS_CPSDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CPSDRss, SYSZ_INS_CPSDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CR, SYSZ_INS_CR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CRJ, SYSZ_INS_CRJ,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_CRL, SYSZ_INS_CRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CS, SYSZ_INS_CS,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CSG, SYSZ_INS_CSG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CSY, SYSZ_INS_CSY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CXBR, SYSZ_INS_CXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CXFBR, SYSZ_INS_CXFBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CXGBR, SYSZ_INS_CXGBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CXLFBR, SYSZ_INS_CXLFBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CXLGBR, SYSZ_INS_CXLGBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_CY, SYSZ_INS_CY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DDB, SYSZ_INS_DDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DDBR, SYSZ_INS_DDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DEB, SYSZ_INS_DEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DEBR, SYSZ_INS_DEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DL, SYSZ_INS_DL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DLG, SYSZ_INS_DLG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DLGR, SYSZ_INS_DLGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DLR, SYSZ_INS_DLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DSG, SYSZ_INS_DSG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DSGF, SYSZ_INS_DSGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DSGFR, SYSZ_INS_DSGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DSGR, SYSZ_INS_DSGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_DXBR, SYSZ_INS_DXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_EAR, SYSZ_INS_EAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_FIDBR, SYSZ_INS_FIDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_FIDBRA, SYSZ_INS_FIDBRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_FIEBR, SYSZ_INS_FIEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_FIEBRA, SYSZ_INS_FIEBRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_FIXBR, SYSZ_INS_FIXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_FIXBRA, SYSZ_INS_FIXBRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_FLOGR, SYSZ_INS_FLOGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_IC, SYSZ_INS_IC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_IC32, SYSZ_INS_IC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_IC32Y, SYSZ_INS_ICY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ICY, SYSZ_INS_ICY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_IIHF, SYSZ_INS_IIHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_IIHH, SYSZ_INS_IIHH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_IIHL, SYSZ_INS_IIHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_IILF, SYSZ_INS_IILF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_IILH, SYSZ_INS_IILH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_IILL, SYSZ_INS_IILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_IPM, SYSZ_INS_IPM,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_J, SYSZ_INS_J,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_JG, SYSZ_INS_JG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- SystemZ_L, SYSZ_INS_L,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LA, SYSZ_INS_LA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LAA, SYSZ_INS_LAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LAAG, SYSZ_INS_LAAG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LAAL, SYSZ_INS_LAAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LAALG, SYSZ_INS_LAALG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LAN, SYSZ_INS_LAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LANG, SYSZ_INS_LANG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LAO, SYSZ_INS_LAO,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LAOG, SYSZ_INS_LAOG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LARL, SYSZ_INS_LARL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LAX, SYSZ_INS_LAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LAXG, SYSZ_INS_LAXG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LAY, SYSZ_INS_LAY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LB, SYSZ_INS_LB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LBH, SYSZ_INS_LBH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LBR, SYSZ_INS_LBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LCDBR, SYSZ_INS_LCDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LCEBR, SYSZ_INS_LCEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LCGFR, SYSZ_INS_LCGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LCGR, SYSZ_INS_LCGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LCR, SYSZ_INS_LCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LCXBR, SYSZ_INS_LCXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LD, SYSZ_INS_LD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LDEB, SYSZ_INS_LDEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LDEBR, SYSZ_INS_LDEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LDGR, SYSZ_INS_LDGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LDR, SYSZ_INS_LDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LDXBR, SYSZ_INS_LDXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LDXBRA, SYSZ_INS_LDXBRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LDY, SYSZ_INS_LDY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LE, SYSZ_INS_LE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LEDBR, SYSZ_INS_LEDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LEDBRA, SYSZ_INS_LEDBRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LER, SYSZ_INS_LER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LEXBR, SYSZ_INS_LEXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LEXBRA, SYSZ_INS_LEXBRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LEY, SYSZ_INS_LEY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LFH, SYSZ_INS_LFH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LG, SYSZ_INS_LG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGB, SYSZ_INS_LGB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGBR, SYSZ_INS_LGBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGDR, SYSZ_INS_LGDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGF, SYSZ_INS_LGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGFI, SYSZ_INS_LGFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGFR, SYSZ_INS_LGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGFRL, SYSZ_INS_LGFRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGH, SYSZ_INS_LGH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGHI, SYSZ_INS_LGHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGHR, SYSZ_INS_LGHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGHRL, SYSZ_INS_LGHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGR, SYSZ_INS_LGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LGRL, SYSZ_INS_LGRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LH, SYSZ_INS_LH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LHH, SYSZ_INS_LHH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LHI, SYSZ_INS_LHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LHR, SYSZ_INS_LHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LHRL, SYSZ_INS_LHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LHY, SYSZ_INS_LHY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLC, SYSZ_INS_LLC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLCH, SYSZ_INS_LLCH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLCR, SYSZ_INS_LLCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLGC, SYSZ_INS_LLGC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLGCR, SYSZ_INS_LLGCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLGF, SYSZ_INS_LLGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLGFR, SYSZ_INS_LLGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLGFRL, SYSZ_INS_LLGFRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLGH, SYSZ_INS_LLGH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLGHR, SYSZ_INS_LLGHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLGHRL, SYSZ_INS_LLGHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLH, SYSZ_INS_LLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLHH, SYSZ_INS_LLHH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLHR, SYSZ_INS_LLHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLHRL, SYSZ_INS_LLHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLIHF, SYSZ_INS_LLIHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLIHH, SYSZ_INS_LLIHH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLIHL, SYSZ_INS_LLIHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLILF, SYSZ_INS_LLILF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLILH, SYSZ_INS_LLILH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LLILL, SYSZ_INS_LLILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LMG, SYSZ_INS_LMG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LNDBR, SYSZ_INS_LNDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LNEBR, SYSZ_INS_LNEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LNGFR, SYSZ_INS_LNGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LNGR, SYSZ_INS_LNGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LNR, SYSZ_INS_LNR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LNXBR, SYSZ_INS_LNXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LOC, SYSZ_INS_LOC,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LOCG, SYSZ_INS_LOCG,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LOCGR, SYSZ_INS_LOCGR,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LOCR, SYSZ_INS_LOCR,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LPDBR, SYSZ_INS_LPDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LPEBR, SYSZ_INS_LPEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LPGFR, SYSZ_INS_LPGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LPGR, SYSZ_INS_LPGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LPR, SYSZ_INS_LPR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LPXBR, SYSZ_INS_LPXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LR, SYSZ_INS_LR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LRL, SYSZ_INS_LRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LRV, SYSZ_INS_LRV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LRVG, SYSZ_INS_LRVG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LRVGR, SYSZ_INS_LRVGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LRVR, SYSZ_INS_LRVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LT, SYSZ_INS_LT,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTDBR, SYSZ_INS_LTDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTDBRCompare, SYSZ_INS_LTDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTEBR, SYSZ_INS_LTEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTEBRCompare, SYSZ_INS_LTEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTG, SYSZ_INS_LTG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTGF, SYSZ_INS_LTGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTGFR, SYSZ_INS_LTGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTGR, SYSZ_INS_LTGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTR, SYSZ_INS_LTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTXBR, SYSZ_INS_LTXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LTXBRCompare, SYSZ_INS_LTXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LXDB, SYSZ_INS_LXDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LXDBR, SYSZ_INS_LXDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LXEB, SYSZ_INS_LXEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LXEBR, SYSZ_INS_LXEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LXR, SYSZ_INS_LXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LY, SYSZ_INS_LY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LZDR, SYSZ_INS_LZDR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LZER, SYSZ_INS_LZER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_LZXR, SYSZ_INS_LZXR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MADB, SYSZ_INS_MADB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MADBR, SYSZ_INS_MADBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MAEB, SYSZ_INS_MAEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MAEBR, SYSZ_INS_MAEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MDB, SYSZ_INS_MDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MDBR, SYSZ_INS_MDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MDEB, SYSZ_INS_MDEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MDEBR, SYSZ_INS_MDEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MEEB, SYSZ_INS_MEEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MEEBR, SYSZ_INS_MEEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MGHI, SYSZ_INS_MGHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MH, SYSZ_INS_MH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MHI, SYSZ_INS_MHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MHY, SYSZ_INS_MHY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MLG, SYSZ_INS_MLG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MLGR, SYSZ_INS_MLGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MS, SYSZ_INS_MS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSDB, SYSZ_INS_MSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSDBR, SYSZ_INS_MSDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSEB, SYSZ_INS_MSEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSEBR, SYSZ_INS_MSEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSFI, SYSZ_INS_MSFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSG, SYSZ_INS_MSG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSGF, SYSZ_INS_MSGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSGFI, SYSZ_INS_MSGFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSGFR, SYSZ_INS_MSGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSGR, SYSZ_INS_MSGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSR, SYSZ_INS_MSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MSY, SYSZ_INS_MSY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MVC, SYSZ_INS_MVC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MVGHI, SYSZ_INS_MVGHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MVHHI, SYSZ_INS_MVHHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MVHI, SYSZ_INS_MVHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MVI, SYSZ_INS_MVI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MVIY, SYSZ_INS_MVIY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MVST, SYSZ_INS_MVST,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_R0L, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MXBR, SYSZ_INS_MXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MXDB, SYSZ_INS_MXDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_MXDBR, SYSZ_INS_MXDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_N, SYSZ_INS_N,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NC, SYSZ_INS_NC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NG, SYSZ_INS_NG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NGR, SYSZ_INS_NGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NGRK, SYSZ_INS_NGRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NI, SYSZ_INS_NI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NIHF, SYSZ_INS_NIHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NIHH, SYSZ_INS_NIHH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NIHL, SYSZ_INS_NIHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NILF, SYSZ_INS_NILF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NILH, SYSZ_INS_NILH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NILL, SYSZ_INS_NILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NIY, SYSZ_INS_NIY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NR, SYSZ_INS_NR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NRK, SYSZ_INS_NRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_NY, SYSZ_INS_NY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_O, SYSZ_INS_O,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OC, SYSZ_INS_OC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OG, SYSZ_INS_OG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OGR, SYSZ_INS_OGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OGRK, SYSZ_INS_OGRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OI, SYSZ_INS_OI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OIHF, SYSZ_INS_OIHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OIHH, SYSZ_INS_OIHH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OIHL, SYSZ_INS_OIHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OILF, SYSZ_INS_OILF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OILH, SYSZ_INS_OILH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OILL, SYSZ_INS_OILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OIY, SYSZ_INS_OIY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OR, SYSZ_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ORK, SYSZ_INS_ORK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_OY, SYSZ_INS_OY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_PFD, SYSZ_INS_PFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_PFDRL, SYSZ_INS_PFDRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_RISBG, SYSZ_INS_RISBG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_RISBG32, SYSZ_INS_RISBG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_RISBHG, SYSZ_INS_RISBHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_RISBLG, SYSZ_INS_RISBLG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_RLL, SYSZ_INS_RLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_RLLG, SYSZ_INS_RLLG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_RNSBG, SYSZ_INS_RNSBG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ROSBG, SYSZ_INS_ROSBG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_RXSBG, SYSZ_INS_RXSBG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_S, SYSZ_INS_S,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SDB, SYSZ_INS_SDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SDBR, SYSZ_INS_SDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SEB, SYSZ_INS_SEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SEBR, SYSZ_INS_SEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SG, SYSZ_INS_SG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SGF, SYSZ_INS_SGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SGFR, SYSZ_INS_SGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SGR, SYSZ_INS_SGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SGRK, SYSZ_INS_SGRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SH, SYSZ_INS_SH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SHY, SYSZ_INS_SHY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SL, SYSZ_INS_SL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLB, SYSZ_INS_SLB,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLBG, SYSZ_INS_SLBG,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLBR, SYSZ_INS_SLBR,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLFI, SYSZ_INS_SLFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLG, SYSZ_INS_SLG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLGBR, SYSZ_INS_SLBGR,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLGF, SYSZ_INS_SLGF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLGFI, SYSZ_INS_SLGFI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLGFR, SYSZ_INS_SLGFR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLGR, SYSZ_INS_SLGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLGRK, SYSZ_INS_SLGRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLL, SYSZ_INS_SLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLLG, SYSZ_INS_SLLG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLLK, SYSZ_INS_SLLK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLR, SYSZ_INS_SLR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLRK, SYSZ_INS_SLRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SLY, SYSZ_INS_SLY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SQDB, SYSZ_INS_SQDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SQDBR, SYSZ_INS_SQDBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SQEB, SYSZ_INS_SQEB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SQEBR, SYSZ_INS_SQEBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SQXBR, SYSZ_INS_SQXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SR, SYSZ_INS_SR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SRA, SYSZ_INS_SRA,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SRAG, SYSZ_INS_SRAG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SRAK, SYSZ_INS_SRAK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SRK, SYSZ_INS_SRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SRL, SYSZ_INS_SRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SRLG, SYSZ_INS_SRLG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SRLK, SYSZ_INS_SRLK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SRST, SYSZ_INS_SRST,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_R0L, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_ST, SYSZ_INS_ST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STC, SYSZ_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STCH, SYSZ_INS_STCH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STCY, SYSZ_INS_STCY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STD, SYSZ_INS_STD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STDY, SYSZ_INS_STDY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STE, SYSZ_INS_STE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STEY, SYSZ_INS_STEY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STFH, SYSZ_INS_STFH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STG, SYSZ_INS_STG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STGRL, SYSZ_INS_STGRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STH, SYSZ_INS_STH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STHH, SYSZ_INS_STHH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STHRL, SYSZ_INS_STHRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STHY, SYSZ_INS_STHY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STMG, SYSZ_INS_STMG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STOC, SYSZ_INS_STOC,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STOCG, SYSZ_INS_STOCG,
-#ifndef CAPSTONE_DIET
- { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STRL, SYSZ_INS_STRL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STRV, SYSZ_INS_STRV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STRVG, SYSZ_INS_STRVG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_STY, SYSZ_INS_STY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SXBR, SYSZ_INS_SXBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_SY, SYSZ_INS_SY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_TM, SYSZ_INS_TM,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_TMHH, SYSZ_INS_TMHH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_TMHL, SYSZ_INS_TMHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_TMLH, SYSZ_INS_TMLH,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_TMLL, SYSZ_INS_TMLL,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_TMY, SYSZ_INS_TMY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_X, SYSZ_INS_X,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XC, SYSZ_INS_XC,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XG, SYSZ_INS_XG,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XGR, SYSZ_INS_XGR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XGRK, SYSZ_INS_XGRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XI, SYSZ_INS_XI,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XIHF, SYSZ_INS_XIHF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XILF, SYSZ_INS_XILF,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XIY, SYSZ_INS_XIY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XR, SYSZ_INS_XR,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XRK, SYSZ_INS_XRK,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
-#endif
- },
- {
- SystemZ_XY, SYSZ_INS_XY,
-#ifndef CAPSTONE_DIET
- { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
-#endif
- },
+#include "SystemZMappingInsn.inc"
};
// given internal insn id, return public instruction info
diff --git a/arch/SystemZ/SystemZMappingInsn.inc b/arch/SystemZ/SystemZMappingInsn.inc
new file mode 100644
index 0000000..edf7334
--- /dev/null
+++ b/arch/SystemZ/SystemZMappingInsn.inc
@@ -0,0 +1,4239 @@
+// This is auto-gen data for Capstone engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{
+ SystemZ_A, SYSZ_INS_A,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ADB, SYSZ_INS_ADB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ADBR, SYSZ_INS_ADBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AEB, SYSZ_INS_AEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AEBR, SYSZ_INS_AEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AFI, SYSZ_INS_AFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AG, SYSZ_INS_AG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AGF, SYSZ_INS_AGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AGFI, SYSZ_INS_AGFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AGFR, SYSZ_INS_AGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AGHI, SYSZ_INS_AGHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AGHIK, SYSZ_INS_AGHIK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AGR, SYSZ_INS_AGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AGRK, SYSZ_INS_AGRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AGSI, SYSZ_INS_AGSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AH, SYSZ_INS_AH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AHI, SYSZ_INS_AHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AHIK, SYSZ_INS_AHIK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AHY, SYSZ_INS_AHY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AIH, SYSZ_INS_AIH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AL, SYSZ_INS_AL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALC, SYSZ_INS_ALC,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALCG, SYSZ_INS_ALCG,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALCGR, SYSZ_INS_ALCGR,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALCR, SYSZ_INS_ALCR,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALFI, SYSZ_INS_ALFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALG, SYSZ_INS_ALG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALGF, SYSZ_INS_ALGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALGFI, SYSZ_INS_ALGFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALGFR, SYSZ_INS_ALGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALGHSIK, SYSZ_INS_ALGHSIK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALGR, SYSZ_INS_ALGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALGRK, SYSZ_INS_ALGRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALHSIK, SYSZ_INS_ALHSIK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALR, SYSZ_INS_ALR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALRK, SYSZ_INS_ALRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ALY, SYSZ_INS_ALY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AR, SYSZ_INS_AR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ARK, SYSZ_INS_ARK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ASI, SYSZ_INS_ASI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AXBR, SYSZ_INS_AXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AY, SYSZ_INS_AY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmBCR, SYSZ_INS_BCR,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmBRC, SYSZ_INS_BRC,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmBRCL, SYSZ_INS_BRCL,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmCGIJ, SYSZ_INS_CGIJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmCGRJ, SYSZ_INS_CGRJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmCIJ, SYSZ_INS_CIJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmCLGIJ, SYSZ_INS_CLGIJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmCLGRJ, SYSZ_INS_CLGRJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmCLIJ, SYSZ_INS_CLIJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmCLRJ, SYSZ_INS_CLRJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmCRJ, SYSZ_INS_CRJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_AsmEBR, SYSZ_INS_BER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmEJ, SYSZ_INS_JE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmEJG, SYSZ_INS_JGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmELOC, SYSZ_INS_LOCE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmELOCG, SYSZ_INS_LOCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmELOCGR, SYSZ_INS_LOCGRE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmELOCR, SYSZ_INS_LOCRE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmESTOC, SYSZ_INS_STOCE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmESTOCG, SYSZ_INS_STOCGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHBR, SYSZ_INS_BHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHEBR, SYSZ_INS_BHER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHEJ, SYSZ_INS_JHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHEJG, SYSZ_INS_JGHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHELOC, SYSZ_INS_LOCHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHELOCG, SYSZ_INS_LOCGHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHELOCGR, SYSZ_INS_LOCGRHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHELOCR, SYSZ_INS_LOCRHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHESTOC, SYSZ_INS_STOCHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHESTOCG, SYSZ_INS_STOCGHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHJ, SYSZ_INS_JH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHJG, SYSZ_INS_JGH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHLOC, SYSZ_INS_LOCH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHLOCG, SYSZ_INS_LOCGH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHLOCGR, SYSZ_INS_LOCGRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHLOCR, SYSZ_INS_LOCRH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHSTOC, SYSZ_INS_STOCH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmHSTOCG, SYSZ_INS_STOCGH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJEAltCGI, SYSZ_INS_CGIJNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJEAltCGR, SYSZ_INS_CGRJNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJEAltCI, SYSZ_INS_CIJNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJEAltCLGI, SYSZ_INS_CLGIJNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJEAltCLGR, SYSZ_INS_CLGRJNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJEAltCLI, SYSZ_INS_CLIJNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJEAltCLR, SYSZ_INS_CLRJNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJEAltCR, SYSZ_INS_CRJNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJECGI, SYSZ_INS_CGIJE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJECGR, SYSZ_INS_CGRJE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJECI, SYSZ_INS_CIJE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJECLGI, SYSZ_INS_CLGIJE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJECLGR, SYSZ_INS_CLGRJE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJECLI, SYSZ_INS_CLIJE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJECLR, SYSZ_INS_CLRJE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJECR, SYSZ_INS_CRJE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHAltCGI, SYSZ_INS_CGIJNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHAltCGR, SYSZ_INS_CGRJNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHAltCI, SYSZ_INS_CIJNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHAltCLGI, SYSZ_INS_CLGIJNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHAltCLGR, SYSZ_INS_CLGRJNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHAltCLI, SYSZ_INS_CLIJNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHAltCLR, SYSZ_INS_CLRJNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHAltCR, SYSZ_INS_CRJNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHCGI, SYSZ_INS_CGIJH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHCGR, SYSZ_INS_CGRJH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHCI, SYSZ_INS_CIJH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHCLGI, SYSZ_INS_CLGIJH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHCLGR, SYSZ_INS_CLGRJH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHCLI, SYSZ_INS_CLIJH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHCLR, SYSZ_INS_CLRJH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHCR, SYSZ_INS_CRJH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHEAltCGI, SYSZ_INS_CGIJNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHEAltCGR, SYSZ_INS_CGRJNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHEAltCI, SYSZ_INS_CIJNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHEAltCLGI, SYSZ_INS_CLGIJNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHEAltCLGR, SYSZ_INS_CLGRJNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHEAltCLI, SYSZ_INS_CLIJNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHEAltCLR, SYSZ_INS_CLRJNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHEAltCR, SYSZ_INS_CRJNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHECGI, SYSZ_INS_CGIJHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHECGR, SYSZ_INS_CGRJHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHECI, SYSZ_INS_CIJHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHECLGI, SYSZ_INS_CLGIJHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHECLGR, SYSZ_INS_CLGRJHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHECLI, SYSZ_INS_CLIJHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHECLR, SYSZ_INS_CLRJHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJHECR, SYSZ_INS_CRJHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLAltCGI, SYSZ_INS_CGIJNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLAltCGR, SYSZ_INS_CGRJNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLAltCI, SYSZ_INS_CIJNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLAltCLGI, SYSZ_INS_CLGIJNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLAltCLGR, SYSZ_INS_CLGRJNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLAltCLI, SYSZ_INS_CLIJNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLAltCLR, SYSZ_INS_CLRJNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLAltCR, SYSZ_INS_CRJNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLCGI, SYSZ_INS_CGIJL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLCGR, SYSZ_INS_CGRJL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLCI, SYSZ_INS_CIJL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLCLGI, SYSZ_INS_CLGIJL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLCLGR, SYSZ_INS_CLGRJL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLCLI, SYSZ_INS_CLIJL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLCLR, SYSZ_INS_CLRJL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLCR, SYSZ_INS_CRJL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLEAltCGI, SYSZ_INS_CGIJNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLEAltCGR, SYSZ_INS_CGRJNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLEAltCI, SYSZ_INS_CIJNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLEAltCLGI, SYSZ_INS_CLGIJNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLEAltCLGR, SYSZ_INS_CLGRJNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLEAltCLI, SYSZ_INS_CLIJNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLEAltCLR, SYSZ_INS_CLRJNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLEAltCR, SYSZ_INS_CRJNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLECGI, SYSZ_INS_CGIJLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLECGR, SYSZ_INS_CGRJLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLECI, SYSZ_INS_CIJLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLECLGI, SYSZ_INS_CLGIJLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLECLGR, SYSZ_INS_CLGRJLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLECLI, SYSZ_INS_CLIJLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLECLR, SYSZ_INS_CLRJLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLECR, SYSZ_INS_CRJLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHAltCGI, SYSZ_INS_CGIJNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHAltCGR, SYSZ_INS_CGRJNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHAltCI, SYSZ_INS_CIJNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHAltCLGI, SYSZ_INS_CLGIJNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHAltCLGR, SYSZ_INS_CLGRJNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHAltCLI, SYSZ_INS_CLIJNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHAltCLR, SYSZ_INS_CLRJNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHAltCR, SYSZ_INS_CRJNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHCGI, SYSZ_INS_CGIJLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHCGR, SYSZ_INS_CGRJLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHCI, SYSZ_INS_CIJLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHCLGI, SYSZ_INS_CLGIJLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHCLGR, SYSZ_INS_CLGRJLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHCLI, SYSZ_INS_CLIJLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHCLR, SYSZ_INS_CLRJLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmJLHCR, SYSZ_INS_CRJLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLBR, SYSZ_INS_BLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLEBR, SYSZ_INS_BLER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLEJ, SYSZ_INS_JLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLEJG, SYSZ_INS_JGLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLELOC, SYSZ_INS_LOCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLELOCG, SYSZ_INS_LOCGLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLELOCGR, SYSZ_INS_LOCGRLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLELOCR, SYSZ_INS_LOCRLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLESTOC, SYSZ_INS_STOCLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLESTOCG, SYSZ_INS_STOCGLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLHBR, SYSZ_INS_BLHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLHJ, SYSZ_INS_JLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLHJG, SYSZ_INS_JGLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLHLOC, SYSZ_INS_LOCLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLHLOCG, SYSZ_INS_LOCGLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLHLOCGR, SYSZ_INS_LOCGRLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLHLOCR, SYSZ_INS_LOCRLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLHSTOC, SYSZ_INS_STOCLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLHSTOCG, SYSZ_INS_STOCGLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLJ, SYSZ_INS_JL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLJG, SYSZ_INS_JGL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLLOC, SYSZ_INS_LOCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLLOCG, SYSZ_INS_LOCGL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLLOCGR, SYSZ_INS_LOCGRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLLOCR, SYSZ_INS_LOCRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLOC, SYSZ_INS_LOC,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLOCG, SYSZ_INS_LOCG,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLOCGR, SYSZ_INS_LOCGR,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLOCR, SYSZ_INS_LOCR,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLSTOC, SYSZ_INS_STOCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmLSTOCG, SYSZ_INS_STOCGL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNEBR, SYSZ_INS_BNER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNEJ, SYSZ_INS_JNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNEJG, SYSZ_INS_JGNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNELOC, SYSZ_INS_LOCNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNELOCG, SYSZ_INS_LOCGNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNELOCGR, SYSZ_INS_LOCGRNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNELOCR, SYSZ_INS_LOCRNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNESTOC, SYSZ_INS_STOCNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNESTOCG, SYSZ_INS_STOCGNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHBR, SYSZ_INS_BNHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHEBR, SYSZ_INS_BNHER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHEJ, SYSZ_INS_JNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHEJG, SYSZ_INS_JGNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHELOC, SYSZ_INS_LOCNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHELOCG, SYSZ_INS_LOCGNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHELOCGR, SYSZ_INS_LOCGRNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHELOCR, SYSZ_INS_LOCRNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHESTOC, SYSZ_INS_STOCNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHESTOCG, SYSZ_INS_STOCGNHE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHJ, SYSZ_INS_JNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHJG, SYSZ_INS_JGNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHLOC, SYSZ_INS_LOCNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHLOCG, SYSZ_INS_LOCGNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHLOCGR, SYSZ_INS_LOCGRNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHLOCR, SYSZ_INS_LOCRNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHSTOC, SYSZ_INS_STOCNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNHSTOCG, SYSZ_INS_STOCGNH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLBR, SYSZ_INS_BNLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLEBR, SYSZ_INS_BNLER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLEJ, SYSZ_INS_JNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLEJG, SYSZ_INS_JGNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLELOC, SYSZ_INS_LOCNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLELOCG, SYSZ_INS_LOCGNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLELOCGR, SYSZ_INS_LOCGRNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLELOCR, SYSZ_INS_LOCRNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLESTOC, SYSZ_INS_STOCNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLESTOCG, SYSZ_INS_STOCGNLE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLHBR, SYSZ_INS_BNLHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLHJ, SYSZ_INS_JNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLHJG, SYSZ_INS_JGNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLHLOC, SYSZ_INS_LOCNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLHLOCG, SYSZ_INS_LOCGNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLHLOCGR, SYSZ_INS_LOCGRNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLHLOCR, SYSZ_INS_LOCRNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLHSTOC, SYSZ_INS_STOCNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLHSTOCG, SYSZ_INS_STOCGNLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLJ, SYSZ_INS_JNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLJG, SYSZ_INS_JGNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLLOC, SYSZ_INS_LOCNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLLOCG, SYSZ_INS_LOCGNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLLOCGR, SYSZ_INS_LOCGRNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLLOCR, SYSZ_INS_LOCRNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLSTOC, SYSZ_INS_STOCNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNLSTOCG, SYSZ_INS_STOCGNL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNOBR, SYSZ_INS_BNOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNOJ, SYSZ_INS_JNO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNOJG, SYSZ_INS_JGNO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNOLOC, SYSZ_INS_LOCNO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNOLOCG, SYSZ_INS_LOCGNO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNOLOCGR, SYSZ_INS_LOCGRNO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNOLOCR, SYSZ_INS_LOCRNO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNOSTOC, SYSZ_INS_STOCNO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmNOSTOCG, SYSZ_INS_STOCGNO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmOBR, SYSZ_INS_BOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmOJ, SYSZ_INS_JO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmOJG, SYSZ_INS_JGO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmOLOC, SYSZ_INS_LOCO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmOLOCG, SYSZ_INS_LOCGO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmOLOCGR, SYSZ_INS_LOCGRO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmOLOCR, SYSZ_INS_LOCRO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmOSTOC, SYSZ_INS_STOCO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmOSTOCG, SYSZ_INS_STOCGO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmSTOC, SYSZ_INS_STOC,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_AsmSTOCG, SYSZ_INS_STOCG,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_BASR, SYSZ_INS_BASR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_BR, SYSZ_INS_BR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ SystemZ_BRAS, SYSZ_INS_BRAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_BRASL, SYSZ_INS_BRASL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_BRC, SYSZ_INS_J,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_BRCL, SYSZ_INS_JG,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_BRCT, SYSZ_INS_BRCT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_BRCTG, SYSZ_INS_BRCTG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_C, SYSZ_INS_C,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CDB, SYSZ_INS_CDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CDBR, SYSZ_INS_CDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CDFBR, SYSZ_INS_CDFBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CDGBR, SYSZ_INS_CDGBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CDLFBR, SYSZ_INS_CDLFBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CDLGBR, SYSZ_INS_CDLGBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CEB, SYSZ_INS_CEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CEBR, SYSZ_INS_CEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CEFBR, SYSZ_INS_CEFBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CEGBR, SYSZ_INS_CEGBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CELFBR, SYSZ_INS_CELFBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CELGBR, SYSZ_INS_CELGBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CFDBR, SYSZ_INS_CFDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CFEBR, SYSZ_INS_CFEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CFI, SYSZ_INS_CFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CFXBR, SYSZ_INS_CFXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CG, SYSZ_INS_CG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGDBR, SYSZ_INS_CGDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGEBR, SYSZ_INS_CGEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGF, SYSZ_INS_CGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGFI, SYSZ_INS_CGFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGFR, SYSZ_INS_CGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGFRL, SYSZ_INS_CGFRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGH, SYSZ_INS_CGH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGHI, SYSZ_INS_CGHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGHRL, SYSZ_INS_CGHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGHSI, SYSZ_INS_CGHSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGIJ, SYSZ_INS_CGIJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_CGR, SYSZ_INS_CGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGRJ, SYSZ_INS_CGRJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_CGRL, SYSZ_INS_CGRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CGXBR, SYSZ_INS_CGXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CH, SYSZ_INS_CH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CHF, SYSZ_INS_CHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CHHSI, SYSZ_INS_CHHSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CHI, SYSZ_INS_CHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CHRL, SYSZ_INS_CHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CHSI, SYSZ_INS_CHSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CHY, SYSZ_INS_CHY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CIH, SYSZ_INS_CIH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CIJ, SYSZ_INS_CIJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_CL, SYSZ_INS_CL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLC, SYSZ_INS_CLC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLFDBR, SYSZ_INS_CLFDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLFEBR, SYSZ_INS_CLFEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLFHSI, SYSZ_INS_CLFHSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLFI, SYSZ_INS_CLFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLFXBR, SYSZ_INS_CLFXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLG, SYSZ_INS_CLG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGDBR, SYSZ_INS_CLGDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGEBR, SYSZ_INS_CLGEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGF, SYSZ_INS_CLGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGFI, SYSZ_INS_CLGFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGFR, SYSZ_INS_CLGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGFRL, SYSZ_INS_CLGFRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGHRL, SYSZ_INS_CLGHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGHSI, SYSZ_INS_CLGHSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGIJ, SYSZ_INS_CLGIJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_CLGR, SYSZ_INS_CLGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGRJ, SYSZ_INS_CLGRJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_CLGRL, SYSZ_INS_CLGRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLGXBR, SYSZ_INS_CLGXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLHF, SYSZ_INS_CLHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLHHSI, SYSZ_INS_CLHHSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLHRL, SYSZ_INS_CLHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLI, SYSZ_INS_CLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLIH, SYSZ_INS_CLIH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLIJ, SYSZ_INS_CLIJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_CLIY, SYSZ_INS_CLIY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLR, SYSZ_INS_CLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLRJ, SYSZ_INS_CLRJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_CLRL, SYSZ_INS_CLRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLST, SYSZ_INS_CLST,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_R0L, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CLY, SYSZ_INS_CLY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CPSDRdd, SYSZ_INS_CPSDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CPSDRds, SYSZ_INS_CPSDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CPSDRsd, SYSZ_INS_CPSDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CPSDRss, SYSZ_INS_CPSDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CR, SYSZ_INS_CR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CRJ, SYSZ_INS_CRJ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_CRL, SYSZ_INS_CRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CS, SYSZ_INS_CS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CSG, SYSZ_INS_CSG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CSY, SYSZ_INS_CSY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CXBR, SYSZ_INS_CXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CXFBR, SYSZ_INS_CXFBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CXGBR, SYSZ_INS_CXGBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CXLFBR, SYSZ_INS_CXLFBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CXLGBR, SYSZ_INS_CXLGBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_CY, SYSZ_INS_CY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DDB, SYSZ_INS_DDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DDBR, SYSZ_INS_DDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DEB, SYSZ_INS_DEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DEBR, SYSZ_INS_DEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DL, SYSZ_INS_DL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DLG, SYSZ_INS_DLG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DLGR, SYSZ_INS_DLGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DLR, SYSZ_INS_DLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DSG, SYSZ_INS_DSG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DSGF, SYSZ_INS_DSGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DSGFR, SYSZ_INS_DSGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DSGR, SYSZ_INS_DSGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_DXBR, SYSZ_INS_DXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_EAR, SYSZ_INS_EAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_FIDBR, SYSZ_INS_FIDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_FIDBRA, SYSZ_INS_FIDBRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_FIEBR, SYSZ_INS_FIEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_FIEBRA, SYSZ_INS_FIEBRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_FIXBR, SYSZ_INS_FIXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_FIXBRA, SYSZ_INS_FIXBRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_FLOGR, SYSZ_INS_FLOGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_IC, SYSZ_INS_IC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_IC32, SYSZ_INS_IC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_IC32Y, SYSZ_INS_ICY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ICY, SYSZ_INS_ICY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_IIHF, SYSZ_INS_IIHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_IIHH, SYSZ_INS_IIHH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_IIHL, SYSZ_INS_IIHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_IILF, SYSZ_INS_IILF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_IILH, SYSZ_INS_IILH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_IILL, SYSZ_INS_IILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_IPM, SYSZ_INS_IPM,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_J, SYSZ_INS_J,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_JG, SYSZ_INS_JG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ SystemZ_L, SYSZ_INS_L,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LA, SYSZ_INS_LA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LAA, SYSZ_INS_LAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LAAG, SYSZ_INS_LAAG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LAAL, SYSZ_INS_LAAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LAALG, SYSZ_INS_LAALG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LAN, SYSZ_INS_LAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LANG, SYSZ_INS_LANG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LAO, SYSZ_INS_LAO,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LAOG, SYSZ_INS_LAOG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LARL, SYSZ_INS_LARL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LAX, SYSZ_INS_LAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LAXG, SYSZ_INS_LAXG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_INTERLOCKEDACCESS1, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LAY, SYSZ_INS_LAY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LB, SYSZ_INS_LB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LBH, SYSZ_INS_LBH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LBR, SYSZ_INS_LBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LCDBR, SYSZ_INS_LCDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LCEBR, SYSZ_INS_LCEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LCGFR, SYSZ_INS_LCGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LCGR, SYSZ_INS_LCGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LCR, SYSZ_INS_LCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LCXBR, SYSZ_INS_LCXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LD, SYSZ_INS_LD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LDEB, SYSZ_INS_LDEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LDEBR, SYSZ_INS_LDEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LDGR, SYSZ_INS_LDGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LDR, SYSZ_INS_LDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LDXBR, SYSZ_INS_LDXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LDXBRA, SYSZ_INS_LDXBRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LDY, SYSZ_INS_LDY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LE, SYSZ_INS_LE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LEDBR, SYSZ_INS_LEDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LEDBRA, SYSZ_INS_LEDBRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LER, SYSZ_INS_LER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LEXBR, SYSZ_INS_LEXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LEXBRA, SYSZ_INS_LEXBRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_FPEXTENSION, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LEY, SYSZ_INS_LEY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LFH, SYSZ_INS_LFH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LG, SYSZ_INS_LG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGB, SYSZ_INS_LGB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGBR, SYSZ_INS_LGBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGDR, SYSZ_INS_LGDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGF, SYSZ_INS_LGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGFI, SYSZ_INS_LGFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGFR, SYSZ_INS_LGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGFRL, SYSZ_INS_LGFRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGH, SYSZ_INS_LGH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGHI, SYSZ_INS_LGHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGHR, SYSZ_INS_LGHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGHRL, SYSZ_INS_LGHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGR, SYSZ_INS_LGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LGRL, SYSZ_INS_LGRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LH, SYSZ_INS_LH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LHH, SYSZ_INS_LHH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LHI, SYSZ_INS_LHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LHR, SYSZ_INS_LHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LHRL, SYSZ_INS_LHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LHY, SYSZ_INS_LHY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLC, SYSZ_INS_LLC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLCH, SYSZ_INS_LLCH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLCR, SYSZ_INS_LLCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLGC, SYSZ_INS_LLGC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLGCR, SYSZ_INS_LLGCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLGF, SYSZ_INS_LLGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLGFR, SYSZ_INS_LLGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLGFRL, SYSZ_INS_LLGFRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLGH, SYSZ_INS_LLGH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLGHR, SYSZ_INS_LLGHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLGHRL, SYSZ_INS_LLGHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLH, SYSZ_INS_LLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLHH, SYSZ_INS_LLHH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLHR, SYSZ_INS_LLHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLHRL, SYSZ_INS_LLHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLIHF, SYSZ_INS_LLIHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLIHH, SYSZ_INS_LLIHH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLIHL, SYSZ_INS_LLIHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLILF, SYSZ_INS_LLILF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLILH, SYSZ_INS_LLILH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LLILL, SYSZ_INS_LLILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LMG, SYSZ_INS_LMG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LNDBR, SYSZ_INS_LNDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LNEBR, SYSZ_INS_LNEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LNGFR, SYSZ_INS_LNGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LNGR, SYSZ_INS_LNGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LNR, SYSZ_INS_LNR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LNXBR, SYSZ_INS_LNXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LOC, SYSZ_INS_LOC,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LOCG, SYSZ_INS_LOCG,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LOCGR, SYSZ_INS_LOCGR,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LOCR, SYSZ_INS_LOCR,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LPDBR, SYSZ_INS_LPDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LPEBR, SYSZ_INS_LPEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LPGFR, SYSZ_INS_LPGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LPGR, SYSZ_INS_LPGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LPR, SYSZ_INS_LPR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LPXBR, SYSZ_INS_LPXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LR, SYSZ_INS_LR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LRL, SYSZ_INS_LRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LRV, SYSZ_INS_LRV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LRVG, SYSZ_INS_LRVG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LRVGR, SYSZ_INS_LRVGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LRVR, SYSZ_INS_LRVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LT, SYSZ_INS_LT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTDBR, SYSZ_INS_LTDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTDBRCompare, SYSZ_INS_LTDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTEBR, SYSZ_INS_LTEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTEBRCompare, SYSZ_INS_LTEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTG, SYSZ_INS_LTG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTGF, SYSZ_INS_LTGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTGFR, SYSZ_INS_LTGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTGR, SYSZ_INS_LTGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTR, SYSZ_INS_LTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTXBR, SYSZ_INS_LTXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LTXBRCompare, SYSZ_INS_LTXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LXDB, SYSZ_INS_LXDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LXDBR, SYSZ_INS_LXDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LXEB, SYSZ_INS_LXEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LXEBR, SYSZ_INS_LXEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LXR, SYSZ_INS_LXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LY, SYSZ_INS_LY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LZDR, SYSZ_INS_LZDR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LZER, SYSZ_INS_LZER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_LZXR, SYSZ_INS_LZXR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MADB, SYSZ_INS_MADB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MADBR, SYSZ_INS_MADBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MAEB, SYSZ_INS_MAEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MAEBR, SYSZ_INS_MAEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MDB, SYSZ_INS_MDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MDBR, SYSZ_INS_MDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MDEB, SYSZ_INS_MDEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MDEBR, SYSZ_INS_MDEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MEEB, SYSZ_INS_MEEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MEEBR, SYSZ_INS_MEEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MGHI, SYSZ_INS_MGHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MH, SYSZ_INS_MH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MHI, SYSZ_INS_MHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MHY, SYSZ_INS_MHY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MLG, SYSZ_INS_MLG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MLGR, SYSZ_INS_MLGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MS, SYSZ_INS_MS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSDB, SYSZ_INS_MSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSDBR, SYSZ_INS_MSDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSEB, SYSZ_INS_MSEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSEBR, SYSZ_INS_MSEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSFI, SYSZ_INS_MSFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSG, SYSZ_INS_MSG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSGF, SYSZ_INS_MSGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSGFI, SYSZ_INS_MSGFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSGFR, SYSZ_INS_MSGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSGR, SYSZ_INS_MSGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSR, SYSZ_INS_MSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MSY, SYSZ_INS_MSY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MVC, SYSZ_INS_MVC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MVGHI, SYSZ_INS_MVGHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MVHHI, SYSZ_INS_MVHHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MVHI, SYSZ_INS_MVHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MVI, SYSZ_INS_MVI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MVIY, SYSZ_INS_MVIY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MVST, SYSZ_INS_MVST,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_R0L, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MXBR, SYSZ_INS_MXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MXDB, SYSZ_INS_MXDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_MXDBR, SYSZ_INS_MXDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_N, SYSZ_INS_N,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NC, SYSZ_INS_NC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NG, SYSZ_INS_NG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NGR, SYSZ_INS_NGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NGRK, SYSZ_INS_NGRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NI, SYSZ_INS_NI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NIHF, SYSZ_INS_NIHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NIHH, SYSZ_INS_NIHH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NIHL, SYSZ_INS_NIHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NILF, SYSZ_INS_NILF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NILH, SYSZ_INS_NILH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NILL, SYSZ_INS_NILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NIY, SYSZ_INS_NIY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NR, SYSZ_INS_NR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NRK, SYSZ_INS_NRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_NY, SYSZ_INS_NY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_O, SYSZ_INS_O,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OC, SYSZ_INS_OC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OG, SYSZ_INS_OG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OGR, SYSZ_INS_OGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OGRK, SYSZ_INS_OGRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OI, SYSZ_INS_OI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OIHF, SYSZ_INS_OIHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OIHH, SYSZ_INS_OIHH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OIHL, SYSZ_INS_OIHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OILF, SYSZ_INS_OILF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OILH, SYSZ_INS_OILH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OILL, SYSZ_INS_OILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OIY, SYSZ_INS_OIY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OR, SYSZ_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ORK, SYSZ_INS_ORK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_OY, SYSZ_INS_OY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_PFD, SYSZ_INS_PFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_PFDRL, SYSZ_INS_PFDRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_RISBG, SYSZ_INS_RISBG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_RISBG32, SYSZ_INS_RISBG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_RISBHG, SYSZ_INS_RISBHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_RISBLG, SYSZ_INS_RISBLG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_RLL, SYSZ_INS_RLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_RLLG, SYSZ_INS_RLLG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_RNSBG, SYSZ_INS_RNSBG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ROSBG, SYSZ_INS_ROSBG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_RXSBG, SYSZ_INS_RXSBG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_S, SYSZ_INS_S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SDB, SYSZ_INS_SDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SDBR, SYSZ_INS_SDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SEB, SYSZ_INS_SEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SEBR, SYSZ_INS_SEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SG, SYSZ_INS_SG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SGF, SYSZ_INS_SGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SGFR, SYSZ_INS_SGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SGR, SYSZ_INS_SGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SGRK, SYSZ_INS_SGRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SH, SYSZ_INS_SH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SHY, SYSZ_INS_SHY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SL, SYSZ_INS_SL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLB, SYSZ_INS_SLB,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLBG, SYSZ_INS_SLBG,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLBR, SYSZ_INS_SLBR,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLFI, SYSZ_INS_SLFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLG, SYSZ_INS_SLG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLGBR, SYSZ_INS_SLBGR,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLGF, SYSZ_INS_SLGF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLGFI, SYSZ_INS_SLGFI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLGFR, SYSZ_INS_SLGFR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLGR, SYSZ_INS_SLGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLGRK, SYSZ_INS_SLGRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLL, SYSZ_INS_SLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLLG, SYSZ_INS_SLLG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLLK, SYSZ_INS_SLLK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLR, SYSZ_INS_SLR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLRK, SYSZ_INS_SLRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SLY, SYSZ_INS_SLY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SQDB, SYSZ_INS_SQDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SQDBR, SYSZ_INS_SQDBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SQEB, SYSZ_INS_SQEB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SQEBR, SYSZ_INS_SQEBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SQXBR, SYSZ_INS_SQXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SR, SYSZ_INS_SR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SRA, SYSZ_INS_SRA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SRAG, SYSZ_INS_SRAG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SRAK, SYSZ_INS_SRAK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SRK, SYSZ_INS_SRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SRL, SYSZ_INS_SRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SRLG, SYSZ_INS_SRLG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SRLK, SYSZ_INS_SRLK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SRST, SYSZ_INS_SRST,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_R0L, 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_ST, SYSZ_INS_ST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STC, SYSZ_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STCH, SYSZ_INS_STCH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STCY, SYSZ_INS_STCY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STD, SYSZ_INS_STD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STDY, SYSZ_INS_STDY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STE, SYSZ_INS_STE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STEY, SYSZ_INS_STEY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STFH, SYSZ_INS_STFH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STG, SYSZ_INS_STG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STGRL, SYSZ_INS_STGRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STH, SYSZ_INS_STH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STHH, SYSZ_INS_STHH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { SYSZ_GRP_HIGHWORD, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STHRL, SYSZ_INS_STHRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STHY, SYSZ_INS_STHY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STMG, SYSZ_INS_STMG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STOC, SYSZ_INS_STOC,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STOCG, SYSZ_INS_STOCG,
+#ifndef CAPSTONE_DIET
+ { SYSZ_REG_CC, 0 }, { 0 }, { SYSZ_GRP_LOADSTOREONCOND, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STRL, SYSZ_INS_STRL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STRV, SYSZ_INS_STRV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STRVG, SYSZ_INS_STRVG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_STY, SYSZ_INS_STY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SXBR, SYSZ_INS_SXBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_SY, SYSZ_INS_SY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_TM, SYSZ_INS_TM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_TMHH, SYSZ_INS_TMHH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_TMHL, SYSZ_INS_TMHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_TMLH, SYSZ_INS_TMLH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_TMLL, SYSZ_INS_TMLL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_TMY, SYSZ_INS_TMY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_X, SYSZ_INS_X,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XC, SYSZ_INS_XC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XG, SYSZ_INS_XG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XGR, SYSZ_INS_XGR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XGRK, SYSZ_INS_XGRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XI, SYSZ_INS_XI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XIHF, SYSZ_INS_XIHF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XILF, SYSZ_INS_XILF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XIY, SYSZ_INS_XIY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XR, SYSZ_INS_XR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XRK, SYSZ_INS_XRK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { SYSZ_GRP_DISTINCTOPS, 0 }, 0, 0
+#endif
+},
+{
+ SystemZ_XY, SYSZ_INS_XY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { SYSZ_REG_CC, 0 }, { 0 }, 0, 0
+#endif
+},
diff --git a/arch/X86/X86Mapping.c b/arch/X86/X86Mapping.c
index 37ee8ff..d8561ae 100644
--- a/arch/X86/X86Mapping.c
+++ b/arch/X86/X86Mapping.c
@@ -2280,50904 +2280,7 @@
#endif
},
- {
- X86_AAA, X86_INS_AAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_AAD8i8, X86_INS_AAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_AAM8i8, X86_INS_AAM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_AAS, X86_INS_AAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ABS_F, X86_INS_FABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16i16, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16mi, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16mi8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16mr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16ri, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16ri8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16rm, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16rr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16rr_REV, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32i32, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32mi, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32mi8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32mr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32ri, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32ri8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32rm, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32rr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32rr_REV, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64i32, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64mi32, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64mi8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64mr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64ri32, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64ri8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64rm, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64rr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64rr_REV, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8i8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8mi, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8mi8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8mr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8ri, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8ri8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8rm, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8rr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8rr_REV, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADCX32rm, X86_INS_ADCX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADCX32rr, X86_INS_ADCX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADCX64rm, X86_INS_ADCX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADCX64rr, X86_INS_ADCX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16i16, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16ri, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16ri8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16rm, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16rr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16rr_REV, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32i32, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32ri, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32ri8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32rm, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32rr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32rr_REV, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64i32, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64mi32, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64ri32, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64ri8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64rm, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64rr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64rr_REV, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8i8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8ri, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8ri8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8rm, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8rr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8rr_REV, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADDPDrm, X86_INS_ADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDPDrr, X86_INS_ADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDPSrm, X86_INS_ADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDPSrr, X86_INS_ADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSDrm, X86_INS_ADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSDrm_Int, X86_INS_ADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSDrr, X86_INS_ADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSDrr_Int, X86_INS_ADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSSrm, X86_INS_ADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSSrm_Int, X86_INS_ADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSSrr, X86_INS_ADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSSrr_Int, X86_INS_ADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSUBPDrm, X86_INS_ADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSUBPDrr, X86_INS_ADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSUBPSrm, X86_INS_ADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_ADDSUBPSrr, X86_INS_ADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_ADD_F32m, X86_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD_F64m, X86_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD_FI16m, X86_INS_FIADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD_FI32m, X86_INS_FIADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD_FPrST0, X86_INS_FADDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD_FST0r, X86_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD_FrST0, X86_INS_FADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADOX32rm, X86_INS_ADOX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADOX32rr, X86_INS_ADOX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADOX64rm, X86_INS_ADOX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADOX64rr, X86_INS_ADOX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_AESDECLASTrm, X86_INS_AESDECLAST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESDECLASTrr, X86_INS_AESDECLAST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESDECrm, X86_INS_AESDEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESDECrr, X86_INS_AESDEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESENCLASTrm, X86_INS_AESENCLAST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESENCLASTrr, X86_INS_AESENCLAST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESENCrm, X86_INS_AESENC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESENCrr, X86_INS_AESENC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESIMCrm, X86_INS_AESIMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESIMCrr, X86_INS_AESIMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESKEYGENASSIST128rm, X86_INS_AESKEYGENASSIST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AESKEYGENASSIST128rr, X86_INS_AESKEYGENASSIST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_AND16i16, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16ri, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16ri8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16rm, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16rr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16rr_REV, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32i32, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32ri, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32ri8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32rm, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32rr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32rr_REV, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64i32, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64mi32, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64ri32, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64ri8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64rm, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64rr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64rr_REV, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8i8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_AND8mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8ri, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8ri8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_AND8rm, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8rr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8rr_REV, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ANDN32rm, X86_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDN32rr, X86_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDN64rm, X86_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDN64rr, X86_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDNPDrm, X86_INS_ANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDNPDrr, X86_INS_ANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDNPSrm, X86_INS_ANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDNPSrr, X86_INS_ANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDPDrm, X86_INS_ANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDPDrr, X86_INS_ANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDPSrm, X86_INS_ANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDPSrr, X86_INS_ANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ARPL16mr, X86_INS_ARPL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ARPL16rr, X86_INS_ARPL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTR32rm, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTR32rr, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTR64rm, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTR64rr, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTRI32mi, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTRI32ri, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTRI64mi, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTRI64ri, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCFILL32rm, X86_INS_BLCFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCFILL32rr, X86_INS_BLCFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCFILL64rm, X86_INS_BLCFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCFILL64rr, X86_INS_BLCFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCI32rm, X86_INS_BLCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCI32rr, X86_INS_BLCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCI64rm, X86_INS_BLCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCI64rr, X86_INS_BLCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCIC32rm, X86_INS_BLCIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCIC32rr, X86_INS_BLCIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCIC64rm, X86_INS_BLCIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCIC64rr, X86_INS_BLCIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCMSK32rm, X86_INS_BLCMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCMSK32rr, X86_INS_BLCMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCMSK64rm, X86_INS_BLCMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCMSK64rr, X86_INS_BLCMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCS32rm, X86_INS_BLCS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCS32rr, X86_INS_BLCS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCS64rm, X86_INS_BLCS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCS64rr, X86_INS_BLCS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLENDPDrmi, X86_INS_BLENDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_BLENDPDrri, X86_INS_BLENDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_BLENDPSrmi, X86_INS_BLENDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_BLENDPSrri, X86_INS_BLENDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_BLENDVPDrm0, X86_INS_BLENDVPD,
-#ifndef CAPSTONE_DIET
- { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_BLENDVPDrr0, X86_INS_BLENDVPD,
-#ifndef CAPSTONE_DIET
- { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_BLENDVPSrm0, X86_INS_BLENDVPS,
-#ifndef CAPSTONE_DIET
- { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_BLENDVPSrr0, X86_INS_BLENDVPS,
-#ifndef CAPSTONE_DIET
- { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSFILL32rm, X86_INS_BLSFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSFILL32rr, X86_INS_BLSFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSFILL64rm, X86_INS_BLSFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSFILL64rr, X86_INS_BLSFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSI32rm, X86_INS_BLSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSI32rr, X86_INS_BLSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSI64rm, X86_INS_BLSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSI64rr, X86_INS_BLSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSIC32rm, X86_INS_BLSIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSIC32rr, X86_INS_BLSIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSIC64rm, X86_INS_BLSIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSIC64rr, X86_INS_BLSIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSMSK32rm, X86_INS_BLSMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSMSK32rr, X86_INS_BLSMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSMSK64rm, X86_INS_BLSMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSMSK64rr, X86_INS_BLSMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSR32rm, X86_INS_BLSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSR32rr, X86_INS_BLSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSR64rm, X86_INS_BLSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSR64rr, X86_INS_BLSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BOUNDS16rm, X86_INS_BOUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_BOUNDS32rm, X86_INS_BOUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_BSF16rm, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSF16rr, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSF32rm, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSF32rr, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSF64rm, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSF64rr, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR16rm, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR16rr, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR32rm, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR32rr, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR64rm, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR64rr, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSWAP32r, X86_INS_BSWAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSWAP64r, X86_INS_BSWAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT16mi8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT16mr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT16ri8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT16rr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT32mi8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT32mr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT32ri8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT32rr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT64mi8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT64mr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT64ri8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT64rr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC16mi8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC16mr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC16ri8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC16rr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC32mi8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC32mr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC32ri8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC32rr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC64mi8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC64mr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC64ri8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC64rr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR16mi8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR16mr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR16ri8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR16rr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR32mi8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR32mr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR32ri8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR32rr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR64mi8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR64mr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR64ri8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR64rr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS16mi8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS16mr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS16ri8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS16rr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS32mi8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS32mr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS32ri8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS32rr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS64mi8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS64mr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS64ri8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS64rr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BZHI32rm, X86_INS_BZHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_BZHI32rr, X86_INS_BZHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_BZHI64rm, X86_INS_BZHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_BZHI64rr, X86_INS_BZHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL16m, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL16r, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL32m, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL32r, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL64m, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL64pcrel32, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL64r, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_CALLpcrel16, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
-#endif
- },
- {
- X86_CALLpcrel32, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CBW, X86_INS_CBW,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CDQ, X86_INS_CDQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CDQE, X86_INS_CDQE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_RAX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CHS_F, X86_INS_FCHS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLAC, X86_INS_CLAC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLC, X86_INS_CLC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLD, X86_INS_CLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLFLUSH, X86_INS_CLFLUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CLFLUSHOPT, X86_INS_CLFLUSHOPT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLGI, X86_INS_CLGI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_CLI, X86_INS_CLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLTS, X86_INS_CLTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLWB, X86_INS_CLWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMC, X86_INS_CMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA16rm, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA16rr, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA32rm, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA32rr, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA64rm, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA64rr, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE16rm, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE16rr, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE32rm, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE32rr, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE64rm, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE64rr, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB16rm, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB16rr, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB32rm, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB32rr, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB64rm, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB64rr, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE16rm, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE16rr, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE32rm, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE32rr, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE64rm, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE64rr, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE_F, X86_INS_FCMOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB_F, X86_INS_FCMOVB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE16rm, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE16rr, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE32rm, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE32rr, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE64rm, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE64rr, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE_F, X86_INS_FCMOVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG16rm, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG16rr, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG32rm, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG32rr, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG64rm, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG64rr, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE16rm, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE16rr, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE32rm, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE32rr, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE64rm, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE64rr, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL16rm, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL16rr, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL32rm, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL32rr, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL64rm, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL64rr, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE16rm, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE16rr, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE32rm, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE32rr, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE64rm, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE64rr, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNBE_F, X86_INS_FCMOVNBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNB_F, X86_INS_FCMOVNB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE16rm, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE16rr, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE32rm, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE32rr, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE64rm, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE64rr, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE_F, X86_INS_FCMOVNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO16rm, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO16rr, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO32rm, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO32rr, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO64rm, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO64rr, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP16rm, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP16rr, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP32rm, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP32rr, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP64rm, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP64rr, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP_F, X86_INS_FCMOVNU,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS16rm, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS16rr, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS32rm, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS32rr, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS64rm, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS64rr, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO16rm, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO16rr, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO32rm, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO32rr, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO64rm, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO64rr, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP16rm, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP16rr, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP32rm, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP32rr, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP64rm, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP64rr, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP_F, X86_INS_FCMOVU,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS16rm, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS16rr, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS32rm, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS32rr, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS64rm, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS64rr, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16i16, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16mi, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16mi8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16mr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16ri, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16ri8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16rm, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16rr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16rr_REV, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32i32, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32mi, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32mi8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32mr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32ri, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32ri8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32rm, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32rr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32rr_REV, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64i32, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64mi32, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64mi8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64mr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64ri32, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64ri8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64rm, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64rr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64rr_REV, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8i8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8mi, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8mi8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8mr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8ri, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8ri8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8rm, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8rr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8rr_REV, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPPDrmi, X86_INS_CMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPPDrmi_alt, X86_INS_CMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPPDrri, X86_INS_CMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPPDrri_alt, X86_INS_CMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPPSrmi, X86_INS_CMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPPSrmi_alt, X86_INS_CMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPPSrri, X86_INS_CMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPPSrri_alt, X86_INS_CMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSB, X86_INS_CMPSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSDrm, X86_INS_CMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSDrm_alt, X86_INS_CMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSDrr, X86_INS_CMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSDrr_alt, X86_INS_CMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSL, X86_INS_CMPSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSQ, X86_INS_CMPSQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSSrm, X86_INS_CMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSSrm_alt, X86_INS_CMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSSrr, X86_INS_CMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSSrr_alt, X86_INS_CMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSW, X86_INS_CMPSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG16B, X86_INS_CMPXCHG16B,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG16rm, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG16rr, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG32rm, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG32rr, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG64rm, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG64rr, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG8B, X86_INS_CMPXCHG8B,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG8rm, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG8rr, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_COMISDrm, X86_INS_COMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_COMISDrr, X86_INS_COMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_COMISSrm, X86_INS_COMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_COMISSrr, X86_INS_COMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_COMP_FST0r, X86_INS_FCOMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_COM_FIPr, X86_INS_FCOMPI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_COM_FIr, X86_INS_FCOMI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_COM_FST0r, X86_INS_FCOM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_COS_F, X86_INS_FCOS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CPUID, X86_INS_CPUID,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CQO, X86_INS_CQO,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CRC32r32m16, X86_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_CRC32r32m32, X86_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_CRC32r32m8, X86_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_CRC32r32r16, X86_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_CRC32r32r32, X86_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_CRC32r32r8, X86_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_CRC32r64m64, X86_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_CRC32r64m8, X86_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_CRC32r64r64, X86_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_CRC32r64r8, X86_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTDQ2PDrm, X86_INS_CVTDQ2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTDQ2PDrr, X86_INS_CVTDQ2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTDQ2PSrm, X86_INS_CVTDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTDQ2PSrr, X86_INS_CVTDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTPD2DQrm, X86_INS_CVTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTPD2DQrr, X86_INS_CVTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTPD2PSrm, X86_INS_CVTPD2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTPD2PSrr, X86_INS_CVTPD2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTPS2DQrm, X86_INS_CVTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTPS2DQrr, X86_INS_CVTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTPS2PDrm, X86_INS_CVTPS2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTPS2PDrr, X86_INS_CVTPS2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSD2SI64rm, X86_INS_CVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSD2SI64rr, X86_INS_CVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSD2SIrm, X86_INS_CVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSD2SIrr, X86_INS_CVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSD2SSrm, X86_INS_CVTSD2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSD2SSrr, X86_INS_CVTSD2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSI2SD64rm, X86_INS_CVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSI2SD64rr, X86_INS_CVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSI2SDrm, X86_INS_CVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSI2SDrr, X86_INS_CVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSI2SS64rm, X86_INS_CVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSI2SS64rr, X86_INS_CVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSI2SSrm, X86_INS_CVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSI2SSrr, X86_INS_CVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSS2SDrm, X86_INS_CVTSS2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSS2SDrr, X86_INS_CVTSS2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSS2SI64rm, X86_INS_CVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSS2SI64rr, X86_INS_CVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSS2SIrm, X86_INS_CVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTSS2SIrr, X86_INS_CVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTPD2DQrm, X86_INS_CVTTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTPD2DQrr, X86_INS_CVTTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTPS2DQrm, X86_INS_CVTTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTPS2DQrr, X86_INS_CVTTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTSD2SI64rm, X86_INS_CVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTSD2SI64rr, X86_INS_CVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTSD2SIrm, X86_INS_CVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTSD2SIrr, X86_INS_CVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTSS2SI64rm, X86_INS_CVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTSS2SI64rr, X86_INS_CVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTSS2SIrm, X86_INS_CVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CVTTSS2SIrr, X86_INS_CVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_CWD, X86_INS_CWD,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CWDE, X86_INS_CWDE,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DAA, X86_INS_DAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_DAS, X86_INS_DAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_DATA16_PREFIX, X86_INS_DATA16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC16m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC16r, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC16r_alt, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_DEC32m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC32r, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC32r_alt, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_DEC64m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC64r, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC8m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC8r, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV16m, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV16r, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV32m, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV32r, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV64m, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV64r, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV8m, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV8r, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIVPDrm, X86_INS_DIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVPDrr, X86_INS_DIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVPSrm, X86_INS_DIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVPSrr, X86_INS_DIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVR_F32m, X86_INS_FDIVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIVR_F64m, X86_INS_FDIVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIVR_FI16m, X86_INS_FIDIVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIVR_FI32m, X86_INS_FIDIVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIVR_FPrST0, X86_INS_FDIVRP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIVR_FST0r, X86_INS_FDIVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIVR_FrST0, X86_INS_FDIVR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIVSDrm, X86_INS_DIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVSDrm_Int, X86_INS_DIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVSDrr, X86_INS_DIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVSDrr_Int, X86_INS_DIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVSSrm, X86_INS_DIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVSSrm_Int, X86_INS_DIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVSSrr, X86_INS_DIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_DIVSSrr_Int, X86_INS_DIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_DIV_F32m, X86_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV_F64m, X86_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV_FI16m, X86_INS_FIDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV_FI32m, X86_INS_FIDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV_FPrST0, X86_INS_FDIVP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV_FST0r, X86_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV_FrST0, X86_INS_FDIV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DPPDrmi, X86_INS_DPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_DPPDrri, X86_INS_DPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_DPPSrmi, X86_INS_DPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_DPPSrri, X86_INS_DPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_ENCLS, X86_INS_ENCLS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ENCLU, X86_INS_ENCLU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ENTER, X86_INS_ENTER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_EXTRACTPSmr, X86_INS_EXTRACTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_EXTRACTPSrr, X86_INS_EXTRACTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_EXTRQ, X86_INS_EXTRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
-#endif
- },
- {
- X86_EXTRQI, X86_INS_EXTRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
-#endif
- },
- {
- X86_F2XM1, X86_INS_F2XM1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FARCALL16i, X86_INS_LCALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_FARCALL16m, X86_INS_LCALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
-#endif
- },
- {
- X86_FARCALL32i, X86_INS_LCALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_FARCALL32m, X86_INS_LCALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
-#endif
- },
- {
- X86_FARCALL64, X86_INS_LCALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
-#endif
- },
- {
- X86_FARJMP16i, X86_INS_LJMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_FARJMP16m, X86_INS_LJMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- X86_FARJMP32i, X86_INS_LJMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_FARJMP32m, X86_INS_LJMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- X86_FARJMP64, X86_INS_LJMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- X86_FBLDm, X86_INS_FBLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FBSTPm, X86_INS_FBSTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FCOM32m, X86_INS_FCOM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FCOM64m, X86_INS_FCOM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FCOMP32m, X86_INS_FCOMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FCOMP64m, X86_INS_FCOMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FCOMPP, X86_INS_FCOMPP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FDECSTP, X86_INS_FDECSTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FEMMS, X86_INS_FEMMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_FFREE, X86_INS_FFREE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FICOM16m, X86_INS_FICOM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FICOM32m, X86_INS_FICOM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FICOMP16m, X86_INS_FICOMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FICOMP32m, X86_INS_FICOMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FINCSTP, X86_INS_FINCSTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FLDCW16m, X86_INS_FLDCW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FLDENVm, X86_INS_FLDENV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FLDL2E, X86_INS_FLDL2E,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FLDL2T, X86_INS_FLDL2T,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FLDLG2, X86_INS_FLDLG2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FLDLN2, X86_INS_FLDLN2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FLDPI, X86_INS_FLDPI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FNCLEX, X86_INS_FNCLEX,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FNINIT, X86_INS_FNINIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FNOP, X86_INS_FNOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FNSTCW16m, X86_INS_FNSTCW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FNSTSW16r, X86_INS_FNSTSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_FPSW, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FNSTSWm, X86_INS_FNSTSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FPATAN, X86_INS_FPATAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FPREM, X86_INS_FPREM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FPREM1, X86_INS_FPREM1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FPTAN, X86_INS_FPTAN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FP_FFREEP, X86_INS_FFREEP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FRNDINT, X86_INS_FRNDINT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FRSTORm, X86_INS_FRSTOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FSAVEm, X86_INS_FNSAVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FSCALE, X86_INS_FSCALE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FSETPM, X86_INS_FSETPM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FSINCOS, X86_INS_FSINCOS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FSTENVm, X86_INS_FNSTENV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FXAM, X86_INS_FXAM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FXRSTOR, X86_INS_FXRSTOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FXRSTOR64, X86_INS_FXRSTOR64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_FXSAVE, X86_INS_FXSAVE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FXSAVE64, X86_INS_FXSAVE64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_FXTRACT, X86_INS_FXTRACT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FYL2X, X86_INS_FYL2X,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FYL2XP1, X86_INS_FYL2XP1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FsANDNPDrm, X86_INS_ANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FsANDNPDrr, X86_INS_ANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FsANDNPSrm, X86_INS_ANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FsANDNPSrr, X86_INS_ANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FsANDPDrm, X86_INS_ANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FsANDPDrr, X86_INS_ANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FsANDPSrm, X86_INS_ANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FsANDPSrr, X86_INS_ANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FsMOVAPDrm, X86_INS_MOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FsMOVAPSrm, X86_INS_MOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FsORPDrm, X86_INS_ORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FsORPDrr, X86_INS_ORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FsORPSrm, X86_INS_ORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FsORPSrr, X86_INS_ORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FsVMOVAPDrm, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_FsVMOVAPSrm, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_FsXORPDrm, X86_INS_XORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FsXORPDrr, X86_INS_XORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FsXORPSrm, X86_INS_XORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FsXORPSrr, X86_INS_XORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FvANDNPDrm, X86_INS_ANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FvANDNPDrr, X86_INS_ANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FvANDNPSrm, X86_INS_ANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FvANDNPSrr, X86_INS_ANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FvANDPDrm, X86_INS_ANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FvANDPDrr, X86_INS_ANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FvANDPSrm, X86_INS_ANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FvANDPSrr, X86_INS_ANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FvORPDrm, X86_INS_ORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FvORPDrr, X86_INS_ORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FvORPSrm, X86_INS_ORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FvORPSrr, X86_INS_ORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FvXORPDrm, X86_INS_XORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FvXORPDrr, X86_INS_XORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_FvXORPSrm, X86_INS_XORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_FvXORPSrr, X86_INS_XORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_GETSEC, X86_INS_GETSEC,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_HADDPDrm, X86_INS_HADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_HADDPDrr, X86_INS_HADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_HADDPSrm, X86_INS_HADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_HADDPSrr, X86_INS_HADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_HLT, X86_INS_HLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_HSUBPDrm, X86_INS_HSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_HSUBPDrr, X86_INS_HSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_HSUBPSrm, X86_INS_HSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_HSUBPSrr, X86_INS_HSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV16m, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV16r, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV32m, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV32r, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV64m, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV64r, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV8m, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV8r, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ILD_F16m, X86_INS_FILD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ILD_F32m, X86_INS_FILD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ILD_F64m, X86_INS_FILD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16m, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16r, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rm, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rmi, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rmi8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rr, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rri, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rri8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32m, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32r, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rm, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rmi, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rmi8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rr, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rri, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rri8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64m, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64r, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rm, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rmi32, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rmi8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rr, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rri32, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rri8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL8m, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL8r, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN16ri, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN16rr, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN32ri, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN32rr, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN8ri, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN8rr, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC16m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC16r, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC16r_alt, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INC32m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC32r, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC32r_alt, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INC64m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC64r, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC8m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC8r, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INSB, X86_INS_INSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INSERTPSrm, X86_INS_INSERTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_INSERTPSrr, X86_INS_INSERTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_INSERTQ, X86_INS_INSERTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
-#endif
- },
- {
- X86_INSERTQI, X86_INS_INSERTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
-#endif
- },
- {
- X86_INSL, X86_INS_INSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INSW, X86_INS_INSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INT, X86_INS_INT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
-#endif
- },
- {
- X86_INT1, X86_INS_INT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_INT, 0 }, 0, 0
-#endif
- },
- {
- X86_INT3, X86_INS_INT3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
-#endif
- },
- {
- X86_INTO, X86_INS_INTO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_INT, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INVD, X86_INS_INVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INVEPT32, X86_INS_INVEPT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INVEPT64, X86_INS_INVEPT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_INVLPG, X86_INS_INVLPG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INVLPGA32, X86_INS_INVLPGA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INVLPGA64, X86_INS_INVLPGA,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_INVPCID32, X86_INS_INVPCID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INVPCID64, X86_INS_INVPCID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_INVVPID32, X86_INS_INVVPID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INVVPID64, X86_INS_INVVPID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_IRET16, X86_INS_IRET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
-#endif
- },
- {
- X86_IRET32, X86_INS_IRETD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
-#endif
- },
- {
- X86_IRET64, X86_INS_IRETQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_ISTT_FP16m, X86_INS_FISTTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ISTT_FP32m, X86_INS_FISTTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ISTT_FP64m, X86_INS_FISTTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IST_F16m, X86_INS_FIST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IST_F32m, X86_INS_FIST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IST_FP16m, X86_INS_FISTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IST_FP32m, X86_INS_FISTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IST_FP64m, X86_INS_FISTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CMPSDrm, X86_INS_CMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CMPSDrr, X86_INS_CMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CMPSSrm, X86_INS_CMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CMPSSrr, X86_INS_CMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_COMISDrm, X86_INS_COMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_COMISDrr, X86_INS_COMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_COMISSrm, X86_INS_COMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_COMISSrr, X86_INS_COMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSD2SSrm, X86_INS_CVTSD2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSD2SSrr, X86_INS_CVTSD2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSI2SD64rm, X86_INS_CVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSI2SD64rr, X86_INS_CVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSI2SDrm, X86_INS_CVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSI2SDrr, X86_INS_CVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSI2SS64rm, X86_INS_CVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSI2SS64rr, X86_INS_CVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSI2SSrm, X86_INS_CVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSI2SSrr, X86_INS_CVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSS2SDrm, X86_INS_CVTSS2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTSS2SDrr, X86_INS_CVTSS2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTTSD2SI64rm, X86_INS_CVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTTSD2SI64rr, X86_INS_CVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTTSD2SIrm, X86_INS_CVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTTSD2SIrr, X86_INS_CVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTTSS2SI64rm, X86_INS_CVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTTSS2SI64rr, X86_INS_CVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTTSS2SIrm, X86_INS_CVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_CVTTSS2SIrr, X86_INS_CVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_UCOMISDrm, X86_INS_UCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_UCOMISDrr, X86_INS_UCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_UCOMISSrm, X86_INS_UCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_UCOMISSrr, X86_INS_UCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCMPSDrm, X86_INS_VCMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCMPSDrr, X86_INS_VCMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCMPSSrm, X86_INS_VCMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCMPSSrr, X86_INS_VCMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCOMISDZrm, X86_INS_VCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCOMISDZrr, X86_INS_VCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCOMISDrm, X86_INS_VCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCOMISDrr, X86_INS_VCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCOMISSZrm, X86_INS_VCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCOMISSZrr, X86_INS_VCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCOMISSrm, X86_INS_VCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCOMISSrr, X86_INS_VCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSD2SSrm, X86_INS_VCVTSD2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSD2SSrr, X86_INS_VCVTSD2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SD64Zrm, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SD64Zrr, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SD64rm, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SD64rr, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SDZrm, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SDZrr, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SDrm, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SDrr, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SS64Zrm, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SS64Zrr, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SS64rm, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SS64rr, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SSZrm, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SSZrr, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SSrm, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSI2SSrr, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSS2SDrm, X86_INS_VCVTSS2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTSS2SDrr, X86_INS_VCVTSS2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTUSI2SD64Zrm, X86_INS_VCVTUSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTUSI2SD64Zrr, X86_INS_VCVTUSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTUSI2SS64Zrm, X86_INS_VCVTUSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTUSI2SS64Zrr, X86_INS_VCVTUSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VUCOMISDZrm, X86_INS_VUCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VUCOMISDZrr, X86_INS_VUCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VUCOMISDrm, X86_INS_VUCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VUCOMISDrr, X86_INS_VUCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VUCOMISSZrm, X86_INS_VUCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VUCOMISSZrr, X86_INS_VUCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VUCOMISSrm, X86_INS_VUCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_Int_VUCOMISSrr, X86_INS_VUCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_JAE_1, X86_INS_JAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JAE_2, X86_INS_JAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JAE_4, X86_INS_JAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JA_1, X86_INS_JA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JA_2, X86_INS_JA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JA_4, X86_INS_JA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JBE_1, X86_INS_JBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JBE_2, X86_INS_JBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JBE_4, X86_INS_JBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JB_1, X86_INS_JB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JB_2, X86_INS_JB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JB_4, X86_INS_JB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JCXZ, X86_INS_JCXZ,
-#ifndef CAPSTONE_DIET
- { X86_REG_CX, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JECXZ, X86_INS_JECXZ,
-#ifndef CAPSTONE_DIET
- { X86_REG_ECX, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JE_1, X86_INS_JE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JE_2, X86_INS_JE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JE_4, X86_INS_JE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JGE_1, X86_INS_JGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JGE_2, X86_INS_JGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JGE_4, X86_INS_JGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JG_1, X86_INS_JG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JG_2, X86_INS_JG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JG_4, X86_INS_JG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JLE_1, X86_INS_JLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JLE_2, X86_INS_JLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JLE_4, X86_INS_JLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JL_1, X86_INS_JL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JL_2, X86_INS_JL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JL_4, X86_INS_JL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JMP16m, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP16r, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP32m, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP32r, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP64m, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP64r, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP_1, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JMP_2, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JMP_4, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNE_1, X86_INS_JNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNE_2, X86_INS_JNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNE_4, X86_INS_JNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNO_1, X86_INS_JNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNO_2, X86_INS_JNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNO_4, X86_INS_JNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNP_1, X86_INS_JNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNP_2, X86_INS_JNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNP_4, X86_INS_JNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNS_1, X86_INS_JNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNS_2, X86_INS_JNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNS_4, X86_INS_JNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JO_1, X86_INS_JO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JO_2, X86_INS_JO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JO_4, X86_INS_JO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JP_1, X86_INS_JP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JP_2, X86_INS_JP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JP_4, X86_INS_JP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JRCXZ, X86_INS_JRCXZ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RCX, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JS_1, X86_INS_JS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JS_2, X86_INS_JS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JS_4, X86_INS_JS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_KANDBrr, X86_INS_KANDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KANDDrr, X86_INS_KANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KANDNBrr, X86_INS_KANDNB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KANDNDrr, X86_INS_KANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KANDNQrr, X86_INS_KANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KANDNWrr, X86_INS_KANDNW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KANDQrr, X86_INS_KANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KANDWrr, X86_INS_KANDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVBkk, X86_INS_KMOVB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVBkm, X86_INS_KMOVB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVBkr, X86_INS_KMOVB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVBmk, X86_INS_KMOVB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVBrk, X86_INS_KMOVB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVDkk, X86_INS_KMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVDkm, X86_INS_KMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVDkr, X86_INS_KMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVDmk, X86_INS_KMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVDrk, X86_INS_KMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVQkk, X86_INS_KMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVQkm, X86_INS_KMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVQkr, X86_INS_KMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVQmk, X86_INS_KMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVQrk, X86_INS_KMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVWkk, X86_INS_KMOVW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVWkm, X86_INS_KMOVW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVWkr, X86_INS_KMOVW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVWmk, X86_INS_KMOVW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KMOVWrk, X86_INS_KMOVW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KNOTBrr, X86_INS_KNOTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KNOTDrr, X86_INS_KNOTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KNOTQrr, X86_INS_KNOTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KNOTWrr, X86_INS_KNOTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KORBrr, X86_INS_KORB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KORDrr, X86_INS_KORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KORQrr, X86_INS_KORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KORTESTBrr, X86_INS_KORTESTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KORTESTDrr, X86_INS_KORTESTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KORTESTQrr, X86_INS_KORTESTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KORTESTWrr, X86_INS_KORTESTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KORWrr, X86_INS_KORW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KSHIFTLBri, X86_INS_KSHIFTLB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KSHIFTLDri, X86_INS_KSHIFTLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KSHIFTLQri, X86_INS_KSHIFTLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KSHIFTLWri, X86_INS_KSHIFTLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KSHIFTRBri, X86_INS_KSHIFTRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KSHIFTRDri, X86_INS_KSHIFTRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KSHIFTRQri, X86_INS_KSHIFTRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KSHIFTRWri, X86_INS_KSHIFTRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KUNPCKBWrr, X86_INS_KUNPCKBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KXNORBrr, X86_INS_KXNORB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KXNORDrr, X86_INS_KXNORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KXNORQrr, X86_INS_KXNORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KXNORWrr, X86_INS_KXNORW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_KXORBrr, X86_INS_KXORB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_KXORDrr, X86_INS_KXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KXORQrr, X86_INS_KXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_KXORWrr, X86_INS_KXORW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_LAHF, X86_INS_LAHF,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_AH, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR16rm, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR16rr, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR32rm, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR32rr, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR64rm, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR64rr, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG16, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG16B, X86_INS_CMPXCHG16B,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG32, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG64, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG8, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG8B, X86_INS_CMPXCHG8B,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LDDQUrm, X86_INS_LDDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_LDMXCSR, X86_INS_LDMXCSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_LDS16rm, X86_INS_LDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LDS32rm, X86_INS_LDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LD_F0, X86_INS_FLDZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LD_F1, X86_INS_FLD1,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LD_F32m, X86_INS_FLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LD_F64m, X86_INS_FLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LD_F80m, X86_INS_FLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LD_Frr, X86_INS_FLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LEA16r, X86_INS_LEA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LEA32r, X86_INS_LEA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LEA64_32r, X86_INS_LEA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LEA64r, X86_INS_LEA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LEAVE, X86_INS_LEAVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LEAVE64, X86_INS_LEAVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LES16rm, X86_INS_LES,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LES32rm, X86_INS_LES,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LFENCE, X86_INS_LFENCE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_LFS16rm, X86_INS_LFS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LFS32rm, X86_INS_LFS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LFS64rm, X86_INS_LFS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LGDT16m, X86_INS_LGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LGDT32m, X86_INS_LGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LGDT64m, X86_INS_LGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LGS16rm, X86_INS_LGS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LGS32rm, X86_INS_LGS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LGS64rm, X86_INS_LGS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LIDT16m, X86_INS_LIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LIDT32m, X86_INS_LIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LIDT64m, X86_INS_LIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LLDT16m, X86_INS_LLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LLDT16r, X86_INS_LLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LMSW16m, X86_INS_LMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LMSW16r, X86_INS_LMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD16mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD16mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD16mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD32mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD32mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD32mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD64mi32, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD64mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD64mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD8mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD8mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND16mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND16mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND16mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND32mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND32mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND32mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND64mi32, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND64mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND64mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND8mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND8mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_DEC16m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_DEC32m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_DEC64m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_DEC8m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_INC16m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_INC32m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_INC64m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_INC8m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR16mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR16mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR16mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR32mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR32mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR32mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR64mi32, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR64mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR64mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR8mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR8mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB16mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB16mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB16mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB32mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB32mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB32mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB64mi32, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB64mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB64mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB8mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB8mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR16mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR16mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR16mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR32mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR32mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR32mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR64mi32, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR64mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR64mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR8mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR8mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LODSB, X86_INS_LODSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AL, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LODSL, X86_INS_LODSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EAX, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LODSQ, X86_INS_LODSQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_RAX, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LODSW, X86_INS_LODSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AX, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOOP, X86_INS_LOOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOOPE, X86_INS_LOOPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOOPNE, X86_INS_LOOPNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LRETIL, X86_INS_RETF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
-#endif
- },
- {
- X86_LRETIQ, X86_INS_RETFQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LRETIW, X86_INS_RETF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
-#endif
- },
- {
- X86_LRETL, X86_INS_RETF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
-#endif
- },
- {
- X86_LRETQ, X86_INS_RETFQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LRETW, X86_INS_RETF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
-#endif
- },
- {
- X86_LSL16rm, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL16rr, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL32rm, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL32rr, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL64rm, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL64rr, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSS16rm, X86_INS_LSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSS32rm, X86_INS_LSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSS64rm, X86_INS_LSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LTRm, X86_INS_LTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LTRr, X86_INS_LTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LXADD16, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LXADD32, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LXADD64, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LXADD8, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT16rm, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT16rr, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT32rm, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT32rr, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT64rm, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT64rr, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MASKMOVDQU, X86_INS_MASKMOVDQU,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, 0 }, { 0 }, { X86_GRP_SSE2, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_MASKMOVDQU64, X86_INS_MASKMOVDQU,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDI, 0 }, { 0 }, { X86_GRP_SSE2, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXCPDrm, X86_INS_MAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXCPDrr, X86_INS_MAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXCPSrm, X86_INS_MAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXCPSrr, X86_INS_MAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXCSDrm, X86_INS_MAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXCSDrr, X86_INS_MAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXCSSrm, X86_INS_MAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXCSSrr, X86_INS_MAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXPDrm, X86_INS_MAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXPDrr, X86_INS_MAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXPSrm, X86_INS_MAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXPSrr, X86_INS_MAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXSDrm, X86_INS_MAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXSDrm_Int, X86_INS_MAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXSDrr, X86_INS_MAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXSDrr_Int, X86_INS_MAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXSSrm, X86_INS_MAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXSSrm_Int, X86_INS_MAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXSSrr, X86_INS_MAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MAXSSrr_Int, X86_INS_MAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MFENCE, X86_INS_MFENCE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINCPDrm, X86_INS_MINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINCPDrr, X86_INS_MINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINCPSrm, X86_INS_MINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MINCPSrr, X86_INS_MINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MINCSDrm, X86_INS_MINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINCSDrr, X86_INS_MINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINCSSrm, X86_INS_MINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MINCSSrr, X86_INS_MINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MINPDrm, X86_INS_MINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINPDrr, X86_INS_MINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINPSrm, X86_INS_MINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MINPSrr, X86_INS_MINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MINSDrm, X86_INS_MINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINSDrm_Int, X86_INS_MINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINSDrr, X86_INS_MINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINSDrr_Int, X86_INS_MINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MINSSrm, X86_INS_MINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MINSSrm_Int, X86_INS_MINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MINSSrr, X86_INS_MINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MINSSrr_Int, X86_INS_MINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTPD2PIirm, X86_INS_CVTPD2PI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTPD2PIirr, X86_INS_CVTPD2PI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTPI2PDirm, X86_INS_CVTPI2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTPI2PDirr, X86_INS_CVTPI2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTPI2PSirm, X86_INS_CVTPI2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTPI2PSirr, X86_INS_CVTPI2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTPS2PIirm, X86_INS_CVTPS2PI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTPS2PIirr, X86_INS_CVTPS2PI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTTPD2PIirm, X86_INS_CVTTPD2PI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTTPD2PIirr, X86_INS_CVTTPD2PI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTTPS2PIirm, X86_INS_CVTTPS2PI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_CVTTPS2PIirr, X86_INS_CVTTPS2PI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_EMMS, X86_INS_EMMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MASKMOVQ, X86_INS_MASKMOVQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, 0 }, { 0 }, { X86_GRP_MMX, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MASKMOVQ64, X86_INS_MASKMOVQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDI, 0 }, { 0 }, { X86_GRP_MMX, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVD64from64rm, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVD64from64rr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVD64grr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVD64mr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVD64rm, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVD64rr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVD64to64rm, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVD64to64rr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVDQ2Qrr, X86_INS_MOVDQ2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVFR642Qrr, X86_INS_MOVDQ2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVNTQmr, X86_INS_MOVNTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVQ2DQrr, X86_INS_MOVQ2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVQ2FR64rr, X86_INS_MOVQ2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVQ64mr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVQ64rm, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVQ64rr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_MOVQ64rr_REV, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PABSBrm64, X86_INS_PABSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PABSBrr64, X86_INS_PABSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PABSDrm64, X86_INS_PABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PABSDrr64, X86_INS_PABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PABSWrm64, X86_INS_PABSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PABSWrr64, X86_INS_PABSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PACKSSDWirm, X86_INS_PACKSSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PACKSSDWirr, X86_INS_PACKSSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PACKSSWBirm, X86_INS_PACKSSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PACKSSWBirr, X86_INS_PACKSSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PACKUSWBirm, X86_INS_PACKUSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PACKUSWBirr, X86_INS_PACKUSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDBirm, X86_INS_PADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDBirr, X86_INS_PADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDDirm, X86_INS_PADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDDirr, X86_INS_PADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDQirm, X86_INS_PADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDQirr, X86_INS_PADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDSBirm, X86_INS_PADDSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDSBirr, X86_INS_PADDSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDSWirm, X86_INS_PADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDSWirr, X86_INS_PADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDUSBirm, X86_INS_PADDUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDUSBirr, X86_INS_PADDUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDUSWirm, X86_INS_PADDUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDUSWirr, X86_INS_PADDUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDWirm, X86_INS_PADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PADDWirr, X86_INS_PADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PALIGNR64irm, X86_INS_PALIGNR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PALIGNR64irr, X86_INS_PALIGNR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PANDNirm, X86_INS_PANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PANDNirr, X86_INS_PANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PANDirm, X86_INS_PAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PANDirr, X86_INS_PAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PAVGBirm, X86_INS_PAVGB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PAVGBirr, X86_INS_PAVGB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PAVGWirm, X86_INS_PAVGW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PAVGWirr, X86_INS_PAVGW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPEQBirm, X86_INS_PCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPEQBirr, X86_INS_PCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPEQDirm, X86_INS_PCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPEQDirr, X86_INS_PCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPEQWirm, X86_INS_PCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPEQWirr, X86_INS_PCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPGTBirm, X86_INS_PCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPGTBirr, X86_INS_PCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPGTDirm, X86_INS_PCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPGTDirr, X86_INS_PCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPGTWirm, X86_INS_PCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PCMPGTWirr, X86_INS_PCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PEXTRWirri, X86_INS_PEXTRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHADDSWrm64, X86_INS_PHADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHADDSWrr64, X86_INS_PHADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHADDWrm64, X86_INS_PHADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHADDWrr64, X86_INS_PHADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHADDrm64, X86_INS_PHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHADDrr64, X86_INS_PHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHSUBDrm64, X86_INS_PHSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHSUBDrr64, X86_INS_PHSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHSUBSWrm64, X86_INS_PHSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHSUBSWrr64, X86_INS_PHSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHSUBWrm64, X86_INS_PHSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PHSUBWrr64, X86_INS_PHSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PINSRWirmi, X86_INS_PINSRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PINSRWirri, X86_INS_PINSRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMADDUBSWrm64, X86_INS_PMADDUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMADDUBSWrr64, X86_INS_PMADDUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMADDWDirm, X86_INS_PMADDWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMADDWDirr, X86_INS_PMADDWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMAXSWirm, X86_INS_PMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMAXSWirr, X86_INS_PMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMAXUBirm, X86_INS_PMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMAXUBirr, X86_INS_PMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMINSWirm, X86_INS_PMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMINSWirr, X86_INS_PMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMINUBirm, X86_INS_PMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMINUBirr, X86_INS_PMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMOVMSKBrr, X86_INS_PMOVMSKB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMULHRSWrm64, X86_INS_PMULHRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMULHRSWrr64, X86_INS_PMULHRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMULHUWirm, X86_INS_PMULHUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMULHUWirr, X86_INS_PMULHUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMULHWirm, X86_INS_PMULHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMULHWirr, X86_INS_PMULHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMULLWirm, X86_INS_PMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMULLWirr, X86_INS_PMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMULUDQirm, X86_INS_PMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PMULUDQirr, X86_INS_PMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PORirm, X86_INS_POR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PORirr, X86_INS_POR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSADBWirm, X86_INS_PSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSADBWirr, X86_INS_PSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSHUFBrm64, X86_INS_PSHUFB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSHUFBrr64, X86_INS_PSHUFB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSHUFWmi, X86_INS_PSHUFW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSHUFWri, X86_INS_PSHUFW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSIGNBrm64, X86_INS_PSIGNB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSIGNBrr64, X86_INS_PSIGNB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSIGNDrm64, X86_INS_PSIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSIGNDrr64, X86_INS_PSIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSIGNWrm64, X86_INS_PSIGNW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSIGNWrr64, X86_INS_PSIGNW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSLLDri, X86_INS_PSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSLLDrm, X86_INS_PSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSLLDrr, X86_INS_PSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSLLQri, X86_INS_PSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSLLQrm, X86_INS_PSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSLLQrr, X86_INS_PSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSLLWri, X86_INS_PSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSLLWrm, X86_INS_PSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSLLWrr, X86_INS_PSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRADri, X86_INS_PSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRADrm, X86_INS_PSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRADrr, X86_INS_PSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRAWri, X86_INS_PSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRAWrm, X86_INS_PSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRAWrr, X86_INS_PSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRLDri, X86_INS_PSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRLDrm, X86_INS_PSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRLDrr, X86_INS_PSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRLQri, X86_INS_PSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRLQrm, X86_INS_PSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRLQrr, X86_INS_PSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRLWri, X86_INS_PSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRLWrm, X86_INS_PSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSRLWrr, X86_INS_PSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBBirm, X86_INS_PSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBBirr, X86_INS_PSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBDirm, X86_INS_PSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBDirr, X86_INS_PSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBQirm, X86_INS_PSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBQirr, X86_INS_PSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBSBirm, X86_INS_PSUBSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBSBirr, X86_INS_PSUBSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBSWirm, X86_INS_PSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBSWirr, X86_INS_PSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBUSBirm, X86_INS_PSUBUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBUSBirr, X86_INS_PSUBUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBUSWirm, X86_INS_PSUBUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBUSWirr, X86_INS_PSUBUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBWirm, X86_INS_PSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PSUBWirr, X86_INS_PSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKHBWirm, X86_INS_PUNPCKHBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKHBWirr, X86_INS_PUNPCKHBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKHDQirm, X86_INS_PUNPCKHDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKHDQirr, X86_INS_PUNPCKHDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKHWDirm, X86_INS_PUNPCKHWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKHWDirr, X86_INS_PUNPCKHWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKLBWirm, X86_INS_PUNPCKLBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKLBWirr, X86_INS_PUNPCKLBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKLDQirm, X86_INS_PUNPCKLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKLDQirr, X86_INS_PUNPCKLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKLWDirm, X86_INS_PUNPCKLWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PUNPCKLWDirr, X86_INS_PUNPCKLWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PXORirm, X86_INS_PXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MMX_PXORirr, X86_INS_PXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
-#endif
- },
- {
- X86_MONITORrrr, X86_INS_MONITOR,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MONTMUL, X86_INS_MONTMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RSI, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_RSI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ao16, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ao32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ao64, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16mi, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16mr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ms, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16o16a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16o32a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16o64a, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ri, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ri_alt, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16rm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16rr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16rr_REV, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16rs, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16sm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16sr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ao16, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ao32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ao64, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32cr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32dr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32mi, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32mr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ms, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32o16a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32o32a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32o64a, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rc, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rd, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ri, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ri_alt, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rr_REV, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rs, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32sm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32sr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64ao32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64ao64, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64cr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64dr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64mi32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64mr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64ms, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64o32a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64o64a, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rc, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rd, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64ri, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64ri32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rr_REV, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rs, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64sm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64sr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64toPQIrm, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64toPQIrr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64toSDrm, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64toSDrr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8ao16, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8ao32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8ao64, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8mi, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8mr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8mr_NOREX, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8o16a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8o32a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8o64a, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8ri, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8ri_alt, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8rm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8rm_NOREX, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8rr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8rr_NOREX, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8rr_REV, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVAPDmr, X86_INS_MOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVAPDrm, X86_INS_MOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVAPDrr, X86_INS_MOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVAPDrr_REV, X86_INS_MOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVAPSmr, X86_INS_MOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVAPSrm, X86_INS_MOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVAPSrr, X86_INS_MOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVAPSrr_REV, X86_INS_MOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE16mr, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE16rm, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE32mr, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE32rm, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE64mr, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE64rm, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDDUPrm, X86_INS_MOVDDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDDUPrr, X86_INS_MOVDDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDI2PDIrm, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDI2PDIrr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDI2SSrm, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDI2SSrr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDQAmr, X86_INS_MOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDQArm, X86_INS_MOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDQArr, X86_INS_MOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDQArr_REV, X86_INS_MOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDQUmr, X86_INS_MOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDQUrm, X86_INS_MOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDQUrr, X86_INS_MOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVDQUrr_REV, X86_INS_MOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVHLPSrr, X86_INS_MOVHLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVHPDmr, X86_INS_MOVHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVHPDrm, X86_INS_MOVHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVHPSmr, X86_INS_MOVHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVHPSrm, X86_INS_MOVHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVLHPSrr, X86_INS_MOVLHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVLPDmr, X86_INS_MOVLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVLPDrm, X86_INS_MOVLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVLPSmr, X86_INS_MOVLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVLPSrm, X86_INS_MOVLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVMSKPDrr, X86_INS_MOVMSKPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVMSKPSrr, X86_INS_MOVMSKPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVNTDQArm, X86_INS_MOVNTDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVNTDQmr, X86_INS_MOVNTDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVNTI_64mr, X86_INS_MOVNTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVNTImr, X86_INS_MOVNTI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVNTPDmr, X86_INS_MOVNTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVNTPSmr, X86_INS_MOVNTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVNTSD, X86_INS_MOVNTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVNTSS, X86_INS_MOVNTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVPDI2DImr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVPDI2DIrr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVPQI2QImr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVPQI2QIrr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVPQIto64rm, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVPQIto64rr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVQI2PQIrm, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSB, X86_INS_MOVSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSDmr, X86_INS_MOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSDrm, X86_INS_MOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSDrr, X86_INS_MOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSDrr_REV, X86_INS_MOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSDto64mr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSDto64rr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSHDUPrm, X86_INS_MOVSHDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSHDUPrr, X86_INS_MOVSHDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSL, X86_INS_MOVSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSLDUPrm, X86_INS_MOVSLDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSLDUPrr, X86_INS_MOVSLDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSQ, X86_INS_MOVSQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSS2DImr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSS2DIrr, X86_INS_MOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSSmr, X86_INS_MOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSSrm, X86_INS_MOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSSrr, X86_INS_MOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSSrr_REV, X86_INS_MOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSW, X86_INS_MOVSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX16rm8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX16rr8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32_NOREXrm8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32_NOREXrr8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32rm16, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32rm8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32rr16, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32rr8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64_NOREXrr32, X86_INS_MOVSXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rm16, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rm32, X86_INS_MOVSXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rm32_alt, X86_INS_MOVSXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rm8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rr16, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rr32, X86_INS_MOVSXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rr8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVUPDmr, X86_INS_MOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVUPDrm, X86_INS_MOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVUPDrr, X86_INS_MOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVUPDrr_REV, X86_INS_MOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVUPSmr, X86_INS_MOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVUPSrm, X86_INS_MOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVUPSrr, X86_INS_MOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVUPSrr_REV, X86_INS_MOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZPQILo2PQIrm, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZPQILo2PQIrr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZQI2PQIrm, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZQI2PQIrr, X86_INS_MOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX16rm8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX16rr8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32_NOREXrm8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32_NOREXrr8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32rm16, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32rm8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32rr16, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32rr8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX64rm16_Q, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX64rm8_Q, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX64rr16_Q, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX64rr8_Q, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MPSADBWrmi, X86_INS_MPSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_MPSADBWrri, X86_INS_MPSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_MUL16m, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL16r, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL32m, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL32r, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL64m, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL64r, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL8m, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL8r, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MULPDrm, X86_INS_MULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULPDrr, X86_INS_MULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULPSrm, X86_INS_MULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MULPSrr, X86_INS_MULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MULSDrm, X86_INS_MULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULSDrm_Int, X86_INS_MULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULSDrr, X86_INS_MULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULSDrr_Int, X86_INS_MULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULSSrm, X86_INS_MULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MULSSrm_Int, X86_INS_MULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MULSSrr, X86_INS_MULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MULSSrr_Int, X86_INS_MULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_MULX32rm, X86_INS_MULX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULX32rr, X86_INS_MULX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULX64rm, X86_INS_MULX,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULX64rr, X86_INS_MULX,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_MUL_F32m, X86_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL_F64m, X86_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL_FI16m, X86_INS_FIMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL_FI32m, X86_INS_FIMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL_FPrST0, X86_INS_FMULP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL_FST0r, X86_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL_FrST0, X86_INS_FMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MWAITrr, X86_INS_MWAIT,
-#ifndef CAPSTONE_DIET
- { X86_REG_ECX, X86_REG_EAX, 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_NEG16m, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG16r, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG32m, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG32r, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG64m, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG64r, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG8m, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG8r, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16m4, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16m5, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16m6, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16m7, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16r4, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16r5, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16r6, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16r7, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_m4, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_m5, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_m6, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_m7, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_r4, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_r5, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_r6, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_r7, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP19rr, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_19, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_1a, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_1b, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_1c, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_1d, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_1e, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_19, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_1a, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_1b, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_1c, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_1d, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_1e, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT16m, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT16r, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT32m, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT32r, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT64m, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT64r, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT8m, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT8r, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16i16, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16ri, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16ri8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16rm, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16rr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16rr_REV, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32i32, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32mrLocked, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_OR32ri, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32ri8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32rm, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32rr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32rr_REV, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64i32, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64mi32, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64ri32, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64ri8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64rm, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64rr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64rr_REV, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8i8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_OR8mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8ri, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8ri8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_OR8rm, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8rr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8rr_REV, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ORPDrm, X86_INS_ORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ORPDrr, X86_INS_ORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_ORPSrm, X86_INS_ORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_ORPSrr, X86_INS_ORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_OUT16ir, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT16rr, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT32ir, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT32rr, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT8ir, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT8rr, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUTSB, X86_INS_OUTSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUTSL, X86_INS_OUTSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUTSW, X86_INS_OUTSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PABSBrm128, X86_INS_PABSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PABSBrr128, X86_INS_PABSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PABSDrm128, X86_INS_PABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PABSDrr128, X86_INS_PABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PABSWrm128, X86_INS_PABSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PABSWrr128, X86_INS_PABSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PACKSSDWrm, X86_INS_PACKSSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PACKSSDWrr, X86_INS_PACKSSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PACKSSWBrm, X86_INS_PACKSSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PACKSSWBrr, X86_INS_PACKSSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PACKUSDWrm, X86_INS_PACKUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PACKUSDWrr, X86_INS_PACKUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PACKUSWBrm, X86_INS_PACKUSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PACKUSWBrr, X86_INS_PACKUSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDBrm, X86_INS_PADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDBrr, X86_INS_PADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDDrm, X86_INS_PADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDDrr, X86_INS_PADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDQrm, X86_INS_PADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDQrr, X86_INS_PADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDSBrm, X86_INS_PADDSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDSBrr, X86_INS_PADDSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDSWrm, X86_INS_PADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDSWrr, X86_INS_PADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDUSBrm, X86_INS_PADDUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDUSBrr, X86_INS_PADDUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDUSWrm, X86_INS_PADDUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDUSWrr, X86_INS_PADDUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDWrm, X86_INS_PADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PADDWrr, X86_INS_PADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PALIGNR128rm, X86_INS_PALIGNR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PALIGNR128rr, X86_INS_PALIGNR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PANDNrm, X86_INS_PANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PANDNrr, X86_INS_PANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PANDrm, X86_INS_PAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PANDrr, X86_INS_PAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PAUSE, X86_INS_PAUSE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PAVGBrm, X86_INS_PAVGB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PAVGBrr, X86_INS_PAVGB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PAVGUSBrm, X86_INS_PAVGUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PAVGUSBrr, X86_INS_PAVGUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PAVGWrm, X86_INS_PAVGW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PAVGWrr, X86_INS_PAVGW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PBLENDVBrm0, X86_INS_PBLENDVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PBLENDVBrr0, X86_INS_PBLENDVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PBLENDWrmi, X86_INS_PBLENDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PBLENDWrri, X86_INS_PBLENDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PCLMULQDQrm, X86_INS_PCLMULQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PCLMUL, 0 }, 0, 0
-#endif
- },
- {
- X86_PCLMULQDQrr, X86_INS_PCLMULQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PCLMUL, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPEQBrm, X86_INS_PCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPEQBrr, X86_INS_PCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPEQDrm, X86_INS_PCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPEQDrr, X86_INS_PCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPEQQrm, X86_INS_PCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPEQQrr, X86_INS_PCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPEQWrm, X86_INS_PCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPEQWrr, X86_INS_PCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPESTRIrm, X86_INS_PCMPESTRI,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPESTRIrr, X86_INS_PCMPESTRI,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPESTRM128rm, X86_INS_PCMPESTRM,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPESTRM128rr, X86_INS_PCMPESTRM,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPGTBrm, X86_INS_PCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPGTBrr, X86_INS_PCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPGTDrm, X86_INS_PCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPGTDrr, X86_INS_PCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPGTQrm, X86_INS_PCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPGTQrr, X86_INS_PCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPGTWrm, X86_INS_PCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPGTWrr, X86_INS_PCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPISTRIrm, X86_INS_PCMPISTRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPISTRIrr, X86_INS_PCMPISTRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPISTRM128rm, X86_INS_PCMPISTRM,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_PCMPISTRM128rr, X86_INS_PCMPISTRM,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
-#endif
- },
- {
- X86_PCOMMIT, X86_INS_PCOMMIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PDEP32rm, X86_INS_PDEP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PDEP32rr, X86_INS_PDEP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PDEP64rm, X86_INS_PDEP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PDEP64rr, X86_INS_PDEP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXT32rm, X86_INS_PEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXT32rr, X86_INS_PEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXT64rm, X86_INS_PEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXT64rr, X86_INS_PEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXTRBmr, X86_INS_PEXTRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXTRBrr, X86_INS_PEXTRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXTRDmr, X86_INS_PEXTRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXTRDrr, X86_INS_PEXTRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXTRQmr, X86_INS_PEXTRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXTRQrr, X86_INS_PEXTRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXTRWmr, X86_INS_PEXTRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXTRWri, X86_INS_PEXTRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXTRWrr_REV, X86_INS_PEXTRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PF2IDrm, X86_INS_PF2ID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PF2IDrr, X86_INS_PF2ID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PF2IWrm, X86_INS_PF2IW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PF2IWrr, X86_INS_PF2IW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFACCrm, X86_INS_PFACC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFACCrr, X86_INS_PFACC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFADDrm, X86_INS_PFADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFADDrr, X86_INS_PFADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFCMPEQrm, X86_INS_PFCMPEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFCMPEQrr, X86_INS_PFCMPEQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFCMPGErm, X86_INS_PFCMPGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFCMPGErr, X86_INS_PFCMPGE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFCMPGTrm, X86_INS_PFCMPGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFCMPGTrr, X86_INS_PFCMPGT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFMAXrm, X86_INS_PFMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFMAXrr, X86_INS_PFMAX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFMINrm, X86_INS_PFMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFMINrr, X86_INS_PFMIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFMULrm, X86_INS_PFMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFMULrr, X86_INS_PFMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFNACCrm, X86_INS_PFNACC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFNACCrr, X86_INS_PFNACC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFPNACCrm, X86_INS_PFPNACC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFPNACCrr, X86_INS_PFPNACC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFRCPIT1rm, X86_INS_PFRCPIT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFRCPIT1rr, X86_INS_PFRCPIT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFRCPIT2rm, X86_INS_PFRCPIT2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFRCPIT2rr, X86_INS_PFRCPIT2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFRCPrm, X86_INS_PFRCP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFRCPrr, X86_INS_PFRCP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFRSQIT1rm, X86_INS_PFRSQIT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFRSQIT1rr, X86_INS_PFRSQIT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFRSQRTrm, X86_INS_PFRSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFRSQRTrr, X86_INS_PFRSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFSUBRrm, X86_INS_PFSUBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFSUBRrr, X86_INS_PFSUBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFSUBrm, X86_INS_PFSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PFSUBrr, X86_INS_PFSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PHADDDrm, X86_INS_PHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHADDDrr, X86_INS_PHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHADDSWrm128, X86_INS_PHADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHADDSWrr128, X86_INS_PHADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHADDWrm, X86_INS_PHADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHADDWrr, X86_INS_PHADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHMINPOSUWrm128, X86_INS_PHMINPOSUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PHMINPOSUWrr128, X86_INS_PHMINPOSUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PHSUBDrm, X86_INS_PHSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHSUBDrr, X86_INS_PHSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHSUBSWrm128, X86_INS_PHSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHSUBSWrr128, X86_INS_PHSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHSUBWrm, X86_INS_PHSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PHSUBWrr, X86_INS_PHSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PI2FDrm, X86_INS_PI2FD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PI2FDrr, X86_INS_PI2FD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PI2FWrm, X86_INS_PI2FW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PI2FWrr, X86_INS_PI2FW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PINSRBrm, X86_INS_PINSRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PINSRBrr, X86_INS_PINSRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PINSRDrm, X86_INS_PINSRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PINSRDrr, X86_INS_PINSRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PINSRQrm, X86_INS_PINSRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PINSRQrr, X86_INS_PINSRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PINSRWrmi, X86_INS_PINSRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PINSRWrri, X86_INS_PINSRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMADDUBSWrm128, X86_INS_PMADDUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PMADDUBSWrr128, X86_INS_PMADDUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PMADDWDrm, X86_INS_PMADDWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMADDWDrr, X86_INS_PMADDWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXSBrm, X86_INS_PMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXSBrr, X86_INS_PMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXSDrm, X86_INS_PMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXSDrr, X86_INS_PMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXSWrm, X86_INS_PMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXSWrr, X86_INS_PMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXUBrm, X86_INS_PMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXUBrr, X86_INS_PMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXUDrm, X86_INS_PMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXUDrr, X86_INS_PMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXUWrm, X86_INS_PMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMAXUWrr, X86_INS_PMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINSBrm, X86_INS_PMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINSBrr, X86_INS_PMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINSDrm, X86_INS_PMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINSDrr, X86_INS_PMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINSWrm, X86_INS_PMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINSWrr, X86_INS_PMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINUBrm, X86_INS_PMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINUBrr, X86_INS_PMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINUDrm, X86_INS_PMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINUDrr, X86_INS_PMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINUWrm, X86_INS_PMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMINUWrr, X86_INS_PMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVMSKBrr, X86_INS_PMOVMSKB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXBDrm, X86_INS_PMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXBDrr, X86_INS_PMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXBQrm, X86_INS_PMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXBQrr, X86_INS_PMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXBWrm, X86_INS_PMOVSXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXBWrr, X86_INS_PMOVSXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXDQrm, X86_INS_PMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXDQrr, X86_INS_PMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXWDrm, X86_INS_PMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXWDrr, X86_INS_PMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXWQrm, X86_INS_PMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVSXWQrr, X86_INS_PMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXBDrm, X86_INS_PMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXBDrr, X86_INS_PMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXBQrm, X86_INS_PMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXBQrr, X86_INS_PMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXBWrm, X86_INS_PMOVZXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXBWrr, X86_INS_PMOVZXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXDQrm, X86_INS_PMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXDQrr, X86_INS_PMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXWDrm, X86_INS_PMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXWDrr, X86_INS_PMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXWQrm, X86_INS_PMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMOVZXWQrr, X86_INS_PMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULDQrm, X86_INS_PMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULDQrr, X86_INS_PMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULHRSWrm128, X86_INS_PMULHRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULHRSWrr128, X86_INS_PMULHRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULHRWrm, X86_INS_PMULHRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULHRWrr, X86_INS_PMULHRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULHUWrm, X86_INS_PMULHUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULHUWrr, X86_INS_PMULHUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULHWrm, X86_INS_PMULHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULHWrr, X86_INS_PMULHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULLDrm, X86_INS_PMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULLDrr, X86_INS_PMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULLWrm, X86_INS_PMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULLWrr, X86_INS_PMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULUDQrm, X86_INS_PMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PMULUDQrr, X86_INS_PMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_POP16r, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POP16rmm, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POP16rmr, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POP32r, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POP32rmm, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POP32rmr, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POP64r, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POP64rmm, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POP64rmr, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POPA16, X86_INS_POPAW,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPA32, X86_INS_POPAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPCNT16rm, X86_INS_POPCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPCNT16rr, X86_INS_POPCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPCNT32rm, X86_INS_POPCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPCNT32rr, X86_INS_POPCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPCNT64rm, X86_INS_POPCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPCNT64rr, X86_INS_POPCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPDS16, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPDS32, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPES16, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPES32, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPF16, X86_INS_POPF,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPF32, X86_INS_POPFD,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPF64, X86_INS_POPFQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POPFS16, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPFS32, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPFS64, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POPGS16, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPGS32, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPGS64, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POPSS16, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPSS32, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PORrm, X86_INS_POR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PORrr, X86_INS_POR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PREFETCH, X86_INS_PREFETCH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PREFETCHNTA, X86_INS_PREFETCHNTA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_PREFETCHT0, X86_INS_PREFETCHT0,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_PREFETCHT1, X86_INS_PREFETCHT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_PREFETCHT2, X86_INS_PREFETCHT2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_PREFETCHW, X86_INS_PREFETCHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PSADBWrm, X86_INS_PSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSADBWrr, X86_INS_PSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSHUFBrm, X86_INS_PSHUFB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PSHUFBrr, X86_INS_PSHUFB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PSHUFDmi, X86_INS_PSHUFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSHUFDri, X86_INS_PSHUFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSHUFHWmi, X86_INS_PSHUFHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSHUFHWri, X86_INS_PSHUFHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSHUFLWmi, X86_INS_PSHUFLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSHUFLWri, X86_INS_PSHUFLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSIGNBrm, X86_INS_PSIGNB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PSIGNBrr, X86_INS_PSIGNB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PSIGNDrm, X86_INS_PSIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PSIGNDrr, X86_INS_PSIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PSIGNWrm, X86_INS_PSIGNW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PSIGNWrr, X86_INS_PSIGNW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
-#endif
- },
- {
- X86_PSLLDQri, X86_INS_PSLLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSLLDri, X86_INS_PSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSLLDrm, X86_INS_PSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSLLDrr, X86_INS_PSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSLLQri, X86_INS_PSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSLLQrm, X86_INS_PSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSLLQrr, X86_INS_PSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSLLWri, X86_INS_PSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSLLWrm, X86_INS_PSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSLLWrr, X86_INS_PSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRADri, X86_INS_PSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRADrm, X86_INS_PSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRADrr, X86_INS_PSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRAWri, X86_INS_PSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRAWrm, X86_INS_PSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRAWrr, X86_INS_PSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRLDQri, X86_INS_PSRLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRLDri, X86_INS_PSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRLDrm, X86_INS_PSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRLDrr, X86_INS_PSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRLQri, X86_INS_PSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRLQrm, X86_INS_PSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRLQrr, X86_INS_PSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRLWri, X86_INS_PSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRLWrm, X86_INS_PSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSRLWrr, X86_INS_PSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBBrm, X86_INS_PSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBBrr, X86_INS_PSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBDrm, X86_INS_PSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBDrr, X86_INS_PSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBQrm, X86_INS_PSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBQrr, X86_INS_PSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBSBrm, X86_INS_PSUBSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBSBrr, X86_INS_PSUBSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBSWrm, X86_INS_PSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBSWrr, X86_INS_PSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBUSBrm, X86_INS_PSUBUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBUSBrr, X86_INS_PSUBUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBUSWrm, X86_INS_PSUBUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBUSWrr, X86_INS_PSUBUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBWrm, X86_INS_PSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSUBWrr, X86_INS_PSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PSWAPDrm, X86_INS_PSWAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PSWAPDrr, X86_INS_PSWAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
-#endif
- },
- {
- X86_PTESTrm, X86_INS_PTEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PTESTrr, X86_INS_PTEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKHBWrm, X86_INS_PUNPCKHBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKHBWrr, X86_INS_PUNPCKHBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKHDQrm, X86_INS_PUNPCKHDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKHDQrr, X86_INS_PUNPCKHDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKHQDQrm, X86_INS_PUNPCKHQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKHQDQrr, X86_INS_PUNPCKHQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKHWDrm, X86_INS_PUNPCKHWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKHWDrr, X86_INS_PUNPCKHWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKLBWrm, X86_INS_PUNPCKLBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKLBWrr, X86_INS_PUNPCKLBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKLDQrm, X86_INS_PUNPCKLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKLDQrr, X86_INS_PUNPCKLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKLQDQrm, X86_INS_PUNPCKLQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKLQDQrr, X86_INS_PUNPCKLQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKLWDrm, X86_INS_PUNPCKLWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUNPCKLWDrr, X86_INS_PUNPCKLWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH16i8, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH16r, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH16rmm, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH16rmr, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH32i8, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH32r, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH32rmm, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH32rmr, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64i16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64i32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64i8, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64r, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64rmm, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64rmr, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHA16, X86_INS_PUSHAW,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHA32, X86_INS_PUSHAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHCS16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHCS32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHDS16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHDS32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHES16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHES32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHF16, X86_INS_PUSHF,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHF32, X86_INS_PUSHFD,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHF64, X86_INS_PUSHFQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHFS16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHFS32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHFS64, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHGS16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHGS32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHGS64, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHSS16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHSS32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHi16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHi32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PXORrm, X86_INS_PXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_PXORrr, X86_INS_PXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16m1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16mCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16mi, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16r1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16rCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16ri, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32m1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32mCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32mi, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32r1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32rCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32ri, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64m1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64mCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64mi, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64r1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64rCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64ri, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8m1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8mCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8mi, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8r1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8rCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8ri, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCPPSm, X86_INS_RCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RCPPSm_Int, X86_INS_RCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RCPPSr, X86_INS_RCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RCPPSr_Int, X86_INS_RCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RCPSSm, X86_INS_RCPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RCPSSm_Int, X86_INS_RCPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCPSSr, X86_INS_RCPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RCPSSr_Int, X86_INS_RCPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16m1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16mCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16mi, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16r1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16rCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16ri, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32m1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32mCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32mi, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32r1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32rCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32ri, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64m1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64mCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64mi, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64r1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64rCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64ri, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8m1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8mCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8mi, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8r1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8rCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8ri, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDFSBASE, X86_INS_RDFSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RDFSBASE64, X86_INS_RDFSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RDGSBASE, X86_INS_RDGSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RDGSBASE64, X86_INS_RDGSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RDMSR, X86_INS_RDMSR,
-#ifndef CAPSTONE_DIET
- { X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDPMC, X86_INS_RDPMC,
-#ifndef CAPSTONE_DIET
- { X86_REG_ECX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDRAND16r, X86_INS_RDRAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDRAND32r, X86_INS_RDRAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDRAND64r, X86_INS_RDRAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDSEED16r, X86_INS_RDSEED,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDSEED32r, X86_INS_RDSEED,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDSEED64r, X86_INS_RDSEED,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDTSC, X86_INS_RDTSC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDTSCP, X86_INS_RDTSCP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_RAX, X86_REG_RCX, X86_REG_RDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RETIL, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_RETIQ, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RETIW, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
-#endif
- },
- {
- X86_RETL, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_RETQ, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RETW, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16m1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16mCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16mi, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16r1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16rCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16ri, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32m1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32mCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32mi, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32r1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32rCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32ri, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64m1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64mCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64mi, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64r1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64rCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64ri, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8m1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8mCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8mi, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8r1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8rCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8ri, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16m1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16mCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16mi, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16r1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16rCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16ri, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32m1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32mCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32mi, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32r1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32rCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32ri, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64m1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64mCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64mi, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64r1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64rCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64ri, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8m1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8mCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8mi, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8r1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8rCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8ri, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RORX32mi, X86_INS_RORX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_RORX32ri, X86_INS_RORX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_RORX64mi, X86_INS_RORX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_RORX64ri, X86_INS_RORX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_ROUNDPDm, X86_INS_ROUNDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_ROUNDPDr, X86_INS_ROUNDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_ROUNDPSm, X86_INS_ROUNDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_ROUNDPSr, X86_INS_ROUNDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_ROUNDSDm, X86_INS_ROUNDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_ROUNDSDr, X86_INS_ROUNDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_ROUNDSDr_Int, X86_INS_ROUNDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_ROUNDSSm, X86_INS_ROUNDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_ROUNDSSr, X86_INS_ROUNDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_ROUNDSSr_Int, X86_INS_ROUNDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
-#endif
- },
- {
- X86_RSM, X86_INS_RSM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RSQRTPSm, X86_INS_RSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RSQRTPSm_Int, X86_INS_RSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RSQRTPSr, X86_INS_RSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RSQRTPSr_Int, X86_INS_RSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RSQRTSSm, X86_INS_RSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RSQRTSSm_Int, X86_INS_RSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RSQRTSSr, X86_INS_RSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_RSQRTSSr_Int, X86_INS_RSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAHF, X86_INS_SAHF,
-#ifndef CAPSTONE_DIET
- { X86_REG_AH, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16m1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16mCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16mi, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16r1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16rCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16ri, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32m1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32mCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32mi, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32r1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32rCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32ri, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64m1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64mCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64mi, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64r1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64rCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64ri, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8m1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8mCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8mi, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8r1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8rCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8ri, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SALC, X86_INS_SALC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_AL, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16m1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16mCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16mi, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16r1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16rCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16ri, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32m1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32mCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32mi, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32r1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32rCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32ri, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64m1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64mCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64mi, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64r1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64rCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64ri, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8m1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8mCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8mi, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8r1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8rCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8ri, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SARX32rm, X86_INS_SARX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SARX32rr, X86_INS_SARX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SARX64rm, X86_INS_SARX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SARX64rr, X86_INS_SARX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16i16, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16mi, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16mi8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16mr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16ri, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16ri8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16rm, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16rr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16rr_REV, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32i32, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32mi, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32mi8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32mr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32ri, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32ri8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32rm, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32rr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32rr_REV, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64i32, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64mi32, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64mi8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64mr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64ri32, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64ri8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64rm, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64rr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64rr_REV, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8i8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8mi, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8mi8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8mr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8ri, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8ri8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8rm, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8rr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8rr_REV, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SCASB, X86_INS_SCASB,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SCASL, X86_INS_SCASD,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SCASQ, X86_INS_SCASQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SCASW, X86_INS_SCASW,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETAEm, X86_INS_SETAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETAEr, X86_INS_SETAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETAm, X86_INS_SETA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETAr, X86_INS_SETA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETBEm, X86_INS_SETBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETBEr, X86_INS_SETBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETBm, X86_INS_SETB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETBr, X86_INS_SETB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETEm, X86_INS_SETE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETEr, X86_INS_SETE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETGEm, X86_INS_SETGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETGEr, X86_INS_SETGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETGm, X86_INS_SETG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETGr, X86_INS_SETG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETLEm, X86_INS_SETLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETLEr, X86_INS_SETLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETLm, X86_INS_SETL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETLr, X86_INS_SETL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNEm, X86_INS_SETNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNEr, X86_INS_SETNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNOm, X86_INS_SETNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNOr, X86_INS_SETNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNPm, X86_INS_SETNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNPr, X86_INS_SETNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNSm, X86_INS_SETNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNSr, X86_INS_SETNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETOm, X86_INS_SETO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETOr, X86_INS_SETO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETPm, X86_INS_SETP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETPr, X86_INS_SETP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETSm, X86_INS_SETS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETSr, X86_INS_SETS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SFENCE, X86_INS_SFENCE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SGDT16m, X86_INS_SGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SGDT32m, X86_INS_SGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SGDT64m, X86_INS_SGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA1MSG1rm, X86_INS_SHA1MSG1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA1MSG1rr, X86_INS_SHA1MSG1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA1MSG2rm, X86_INS_SHA1MSG2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA1MSG2rr, X86_INS_SHA1MSG2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA1NEXTErm, X86_INS_SHA1NEXTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA1NEXTErr, X86_INS_SHA1NEXTE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA1RNDS4rmi, X86_INS_SHA1RNDS4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA1RNDS4rri, X86_INS_SHA1RNDS4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA256MSG1rm, X86_INS_SHA256MSG1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA256MSG1rr, X86_INS_SHA256MSG1,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA256MSG2rm, X86_INS_SHA256MSG2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA256MSG2rr, X86_INS_SHA256MSG2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA256RNDS2rm, X86_INS_SHA256RNDS2,
-#ifndef CAPSTONE_DIET
- { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHA256RNDS2rr, X86_INS_SHA256RNDS2,
-#ifndef CAPSTONE_DIET
- { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16m1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16mCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16mi, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16r1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16rCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16ri, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32m1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32mCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32mi, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32r1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32rCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32ri, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64m1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64mCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64mi, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64r1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64rCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64ri, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8m1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8mCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8mi, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8r1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8rCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8ri, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD16mrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD16mri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD16rrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD16rri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD32mrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD32mri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD32rrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD32rri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD64mrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD64mri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD64rrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD64rri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLX32rm, X86_INS_SHLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHLX32rr, X86_INS_SHLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHLX64rm, X86_INS_SHLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHLX64rr, X86_INS_SHLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16m1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16mCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16mi, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16r1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16rCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16ri, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32m1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32mCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32mi, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32r1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32rCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32ri, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64m1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64mCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64mi, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64r1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64rCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64ri, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8m1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8mCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8mi, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8r1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8rCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8ri, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD16mrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD16mri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD16rrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD16rri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD32mrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD32mri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD32rrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD32rri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD64mrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD64mri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD64rrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD64rri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRX32rm, X86_INS_SHRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHRX32rr, X86_INS_SHRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHRX64rm, X86_INS_SHRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHRX64rr, X86_INS_SHRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHUFPDrmi, X86_INS_SHUFPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHUFPDrri, X86_INS_SHUFPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHUFPSrmi, X86_INS_SHUFPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SHUFPSrri, X86_INS_SHUFPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SIDT16m, X86_INS_SIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SIDT32m, X86_INS_SIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SIDT64m, X86_INS_SIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_SIN_F, X86_INS_FSIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SKINIT, X86_INS_SKINIT,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_SLDT16m, X86_INS_SLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SLDT16r, X86_INS_SLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SLDT32r, X86_INS_SLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SLDT64m, X86_INS_SLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SLDT64r, X86_INS_SLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SMSW16m, X86_INS_SMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SMSW16r, X86_INS_SMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SMSW32r, X86_INS_SMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SMSW64r, X86_INS_SMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTPDm, X86_INS_SQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTPDr, X86_INS_SQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTPSm, X86_INS_SQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTPSr, X86_INS_SQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTSDm, X86_INS_SQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTSDm_Int, X86_INS_SQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTSDr, X86_INS_SQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTSDr_Int, X86_INS_SQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTSSm, X86_INS_SQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTSSm_Int, X86_INS_SQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTSSr, X86_INS_SQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SQRTSSr_Int, X86_INS_SQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SQRT_F, X86_INS_FSQRT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STAC, X86_INS_STAC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STC, X86_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STD, X86_INS_STD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STGI, X86_INS_STGI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_STI, X86_INS_STI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STMXCSR, X86_INS_STMXCSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_STOSB, X86_INS_STOSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STOSL, X86_INS_STOSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STOSQ, X86_INS_STOSQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RCX, X86_REG_RDI, X86_REG_EFLAGS, 0 }, { X86_REG_RCX, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STOSW, X86_INS_STOSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STR16r, X86_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STR32r, X86_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STR64r, X86_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STRm, X86_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_F32m, X86_INS_FST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_F64m, X86_INS_FST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FCOMPST0r, X86_INS_FCOMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FCOMPST0r_alt, X86_INS_FCOMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FCOMST0r, X86_INS_FCOM,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FP32m, X86_INS_FSTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FP64m, X86_INS_FSTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FP80m, X86_INS_FSTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FPNCEST0r, X86_INS_FSTPNCE,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FPST0r, X86_INS_FSTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FPST0r_alt, X86_INS_FSTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FPrr, X86_INS_FSTP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FXCHST0r, X86_INS_FXCH,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_FXCHST0r_alt, X86_INS_FXCH,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ST_Frr, X86_INS_FST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16i16, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16ri, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16ri8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16rm, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16rr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16rr_REV, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32i32, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32ri, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32ri8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32rm, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32rr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32rr_REV, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64i32, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64mi32, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64ri32, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64ri8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64rm, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64rr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64rr_REV, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8i8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8ri, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8ri8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8rm, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8rr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8rr_REV, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUBPDrm, X86_INS_SUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBPDrr, X86_INS_SUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBPSrm, X86_INS_SUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBPSrr, X86_INS_SUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBR_F32m, X86_INS_FSUBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUBR_F64m, X86_INS_FSUBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUBR_FI16m, X86_INS_FISUBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUBR_FI32m, X86_INS_FISUBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUBR_FPrST0, X86_INS_FSUBRP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUBR_FST0r, X86_INS_FSUBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUBR_FrST0, X86_INS_FSUBR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUBSDrm, X86_INS_SUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBSDrm_Int, X86_INS_SUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBSDrr, X86_INS_SUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBSDrr_Int, X86_INS_SUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBSSrm, X86_INS_SUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBSSrm_Int, X86_INS_SUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBSSrr, X86_INS_SUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SUBSSrr_Int, X86_INS_SUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_SUB_F32m, X86_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB_F64m, X86_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB_FI16m, X86_INS_FISUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB_FI32m, X86_INS_FISUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB_FPrST0, X86_INS_FSUBP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB_FST0r, X86_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB_FrST0, X86_INS_FSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SWAPGS, X86_INS_SWAPGS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SYSCALL, X86_INS_SYSCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
-#endif
- },
- {
- X86_SYSENTER, X86_INS_SYSENTER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
-#endif
- },
- {
- X86_SYSEXIT, X86_INS_SYSEXIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
-#endif
- },
- {
- X86_SYSEXIT64, X86_INS_SYSEXIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_SYSRET, X86_INS_SYSRET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
-#endif
- },
- {
- X86_SYSRET64, X86_INS_SYSRET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_T1MSKC32rm, X86_INS_T1MSKC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_T1MSKC32rr, X86_INS_T1MSKC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_T1MSKC64rm, X86_INS_T1MSKC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_T1MSKC64rr, X86_INS_T1MSKC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16i16, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16mi, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16mi_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16ri, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16ri_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16rm, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16rr, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32i32, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32mi, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32mi_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32ri, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32ri_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32rm, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32rr, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64i32, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64mi32, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64mi32_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64ri32, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64ri32_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64rm, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64rr, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8i8, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8mi, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8mi_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8ri, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8ri_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8rm, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8rr, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TRAP, X86_INS_UD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TST_F, X86_INS_FTST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT16rm, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT16rr, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT32rm, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT32rr, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT64rm, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT64rr, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZMSK32rm, X86_INS_TZMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_TZMSK32rr, X86_INS_TZMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_TZMSK64rm, X86_INS_TZMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_TZMSK64rr, X86_INS_TZMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_UCOMISDrm, X86_INS_UCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_UCOMISDrr, X86_INS_UCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_UCOMISSrm, X86_INS_UCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_UCOMISSrr, X86_INS_UCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_UCOM_FIPr, X86_INS_FUCOMPI,
-#ifndef CAPSTONE_DIET
- { X86_REG_ST0, 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_UCOM_FIr, X86_INS_FUCOMI,
-#ifndef CAPSTONE_DIET
- { X86_REG_ST0, 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_UCOM_FPPr, X86_INS_FUCOMPP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ST0, 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_UCOM_FPr, X86_INS_FUCOMP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ST0, 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_UCOM_Fr, X86_INS_FUCOM,
-#ifndef CAPSTONE_DIET
- { X86_REG_ST0, 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_UD2B, X86_INS_UD2B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_UNPCKHPDrm, X86_INS_UNPCKHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_UNPCKHPDrr, X86_INS_UNPCKHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_UNPCKHPSrm, X86_INS_UNPCKHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_UNPCKHPSrr, X86_INS_UNPCKHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_UNPCKLPDrm, X86_INS_UNPCKLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_UNPCKLPDrr, X86_INS_UNPCKLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_UNPCKLPSrm, X86_INS_UNPCKLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_UNPCKLPSrr, X86_INS_UNPCKLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDYrm, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDYrr, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ128rm, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ128rmb, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ128rmbk, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ128rmbkz, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ128rmk, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ128rmkz, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ128rr, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ128rrk, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ128rrkz, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ256rm, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ256rmb, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ256rmbk, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ256rmbkz, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ256rmk, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ256rmkz, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ256rr, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ256rrk, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZ256rrkz, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrb, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrbk, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrbkz, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrm, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrmb, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrmbk, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrmbkz, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrmk, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrmkz, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrr, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrrk, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDZrrkz, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDrm, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPDrr, X86_INS_VADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSYrm, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSYrr, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ128rm, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ128rmb, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ128rmbk, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ128rmbkz, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ128rmk, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ128rmkz, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ128rr, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ128rrk, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ128rrkz, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ256rm, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ256rmb, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ256rmbk, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ256rmbkz, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ256rmk, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ256rmkz, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ256rr, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ256rrk, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZ256rrkz, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrb, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrbk, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrbkz, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrm, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrmb, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrmbk, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrmbkz, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrmk, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrmkz, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrr, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrrk, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSZrrkz, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSrm, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDPSrr, X86_INS_VADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrm, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrm_Int, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrm_Intk, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrm_Intkz, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrr, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrr_Int, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrr_Intk, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrr_Intkz, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrrb, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrrbk, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDZrrbkz, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDrm, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDrm_Int, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDrr, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSDrr_Int, X86_INS_VADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrm, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrm_Int, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrm_Intk, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrm_Intkz, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrr, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrr_Int, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrr_Intk, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrr_Intkz, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrrb, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrrbk, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSZrrbkz, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSrm, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSrm_Int, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSrr, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSSrr_Int, X86_INS_VADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSUBPDYrm, X86_INS_VADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSUBPDYrr, X86_INS_VADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSUBPDrm, X86_INS_VADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSUBPDrr, X86_INS_VADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSUBPSYrm, X86_INS_VADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSUBPSYrr, X86_INS_VADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSUBPSrm, X86_INS_VADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VADDSUBPSrr, X86_INS_VADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESDECLASTrm, X86_INS_VAESDECLAST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESDECLASTrr, X86_INS_VAESDECLAST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESDECrm, X86_INS_VAESDEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESDECrr, X86_INS_VAESDEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESENCLASTrm, X86_INS_VAESENCLAST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESENCLASTrr, X86_INS_VAESENCLAST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESENCrm, X86_INS_VAESENC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESENCrr, X86_INS_VAESENC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESIMCrm, X86_INS_VAESIMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESIMCrr, X86_INS_VAESIMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESKEYGENASSIST128rm, X86_INS_VAESKEYGENASSIST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VAESKEYGENASSIST128rr, X86_INS_VAESKEYGENASSIST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
-#endif
- },
- {
- X86_VALIGNDrmi, X86_INS_VALIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VALIGNDrri, X86_INS_VALIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VALIGNDrrik, X86_INS_VALIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VALIGNDrrikz, X86_INS_VALIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VALIGNQrmi, X86_INS_VALIGNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VALIGNQrri, X86_INS_VALIGNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VALIGNQrrik, X86_INS_VALIGNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VALIGNQrrikz, X86_INS_VALIGNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDNPDYrm, X86_INS_VANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDNPDYrr, X86_INS_VANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDNPDrm, X86_INS_VANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDNPDrr, X86_INS_VANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDNPSYrm, X86_INS_VANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDNPSYrr, X86_INS_VANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDNPSrm, X86_INS_VANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDNPSrr, X86_INS_VANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDPDYrm, X86_INS_VANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDPDYrr, X86_INS_VANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDPDrm, X86_INS_VANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDPDrr, X86_INS_VANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDPSYrm, X86_INS_VANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDPSYrr, X86_INS_VANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDPSrm, X86_INS_VANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VANDPSrr, X86_INS_VANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ128rm, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ128rmb, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ128rmbk, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ128rmk, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ128rmkz, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ128rr, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ128rrk, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ128rrkz, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ256rm, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ256rmb, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ256rmbk, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ256rmk, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ256rmkz, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ256rr, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ256rrk, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZ256rrkz, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZrm, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZrmb, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZrmbk, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZrmk, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZrmkz, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZrr, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZrrk, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPDZrrkz, X86_INS_VBLENDMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ128rm, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ128rmb, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ128rmbk, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ128rmk, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ128rmkz, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ128rr, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ128rrk, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ128rrkz, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ256rm, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ256rmb, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ256rmbk, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ256rmk, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ256rmkz, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ256rr, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ256rrk, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZ256rrkz, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZrm, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZrmb, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZrmbk, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZrmk, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZrmkz, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZrr, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZrrk, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDMPSZrrkz, X86_INS_VBLENDMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDPDYrmi, X86_INS_VBLENDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDPDYrri, X86_INS_VBLENDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDPDrmi, X86_INS_VBLENDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDPDrri, X86_INS_VBLENDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDPSYrmi, X86_INS_VBLENDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDPSYrri, X86_INS_VBLENDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDPSrmi, X86_INS_VBLENDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDPSrri, X86_INS_VBLENDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDVPDYrm, X86_INS_VBLENDVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDVPDYrr, X86_INS_VBLENDVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDVPDrm, X86_INS_VBLENDVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDVPDrr, X86_INS_VBLENDVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDVPSYrm, X86_INS_VBLENDVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDVPSYrr, X86_INS_VBLENDVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDVPSrm, X86_INS_VBLENDVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBLENDVPSrr, X86_INS_VBLENDVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTF128, X86_INS_VBROADCASTF128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTI32X4krm, X86_INS_VBROADCASTI32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTI32X4rm, X86_INS_VBROADCASTI32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTI64X4krm, X86_INS_VBROADCASTI64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTI64X4rm, X86_INS_VBROADCASTI64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDYrm, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDYrr, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZ256m, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZ256mk, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZ256mkz, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZ256r, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZ256rk, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZ256rkz, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZm, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZmk, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZmkz, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZr, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZrk, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSDZrkz, X86_INS_VBROADCASTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSYrm, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSYrr, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ128m, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ128mk, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ128mkz, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ128r, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ128rk, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ128rkz, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ256m, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ256mk, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ256mkz, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ256r, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ256rk, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZ256rkz, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZm, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZmk, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZmkz, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZr, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZrk, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSZrkz, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSrm, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VBROADCASTSSrr, X86_INS_VBROADCASTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDYrmi, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDYrmi_alt, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDYrri, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDYrri_alt, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDZrmi, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDZrmi_alt, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDZrri, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDZrri_alt, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDZrrib, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDZrrib_alt, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDrmi, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDrmi_alt, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDrri, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPDrri_alt, X86_INS_VCMPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSYrmi, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSYrmi_alt, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSYrri, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSYrri_alt, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSZrmi, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSZrmi_alt, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSZrri, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSZrri_alt, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSZrrib, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSZrrib_alt, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSrmi, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSrmi_alt, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSrri, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPPSrri_alt, X86_INS_VCMPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSDZrm, X86_INS_VCMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSDZrmi_alt, X86_INS_VCMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSDZrr, X86_INS_VCMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSDZrri_alt, X86_INS_VCMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSDrm, X86_INS_VCMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSDrm_alt, X86_INS_VCMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSDrr, X86_INS_VCMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSDrr_alt, X86_INS_VCMPSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSSZrm, X86_INS_VCMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSSZrmi_alt, X86_INS_VCMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSSZrr, X86_INS_VCMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSSZrri_alt, X86_INS_VCMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSSrm, X86_INS_VCMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSSrm_alt, X86_INS_VCMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSSrr, X86_INS_VCMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCMPSSrr_alt, X86_INS_VCMPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMISDZrm, X86_INS_VCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMISDZrr, X86_INS_VCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMISDrm, X86_INS_VCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMISDrr, X86_INS_VCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMISSZrm, X86_INS_VCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMISSZrr, X86_INS_VCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMISSrm, X86_INS_VCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMISSrr, X86_INS_VCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPDZ128mrk, X86_INS_VCOMPRESSPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPDZ128rrk, X86_INS_VCOMPRESSPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPDZ128rrkz, X86_INS_VCOMPRESSPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPDZ256mrk, X86_INS_VCOMPRESSPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPDZ256rrk, X86_INS_VCOMPRESSPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPDZ256rrkz, X86_INS_VCOMPRESSPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPDZmrk, X86_INS_VCOMPRESSPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPDZrrk, X86_INS_VCOMPRESSPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPDZrrkz, X86_INS_VCOMPRESSPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPSZ128mrk, X86_INS_VCOMPRESSPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPSZ128rrk, X86_INS_VCOMPRESSPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPSZ128rrkz, X86_INS_VCOMPRESSPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPSZ256mrk, X86_INS_VCOMPRESSPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPSZ256rrk, X86_INS_VCOMPRESSPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPSZ256rrkz, X86_INS_VCOMPRESSPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPSZmrk, X86_INS_VCOMPRESSPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPSZrrk, X86_INS_VCOMPRESSPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCOMPRESSPSZrrkz, X86_INS_VCOMPRESSPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PDYrm, X86_INS_VCVTDQ2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PDYrr, X86_INS_VCVTDQ2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PDZrm, X86_INS_VCVTDQ2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PDZrr, X86_INS_VCVTDQ2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PDrm, X86_INS_VCVTDQ2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PDrr, X86_INS_VCVTDQ2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PSYrm, X86_INS_VCVTDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PSYrr, X86_INS_VCVTDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PSZrm, X86_INS_VCVTDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PSZrr, X86_INS_VCVTDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PSZrrb, X86_INS_VCVTDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PSrm, X86_INS_VCVTDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTDQ2PSrr, X86_INS_VCVTDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2DQXrm, X86_INS_VCVTPD2DQX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2DQYrm, X86_INS_VCVTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2DQYrr, X86_INS_VCVTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2DQZrm, X86_INS_VCVTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2DQZrr, X86_INS_VCVTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2DQZrrb, X86_INS_VCVTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2DQrr, X86_INS_VCVTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2PSXrm, X86_INS_VCVTPD2PSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2PSYrm, X86_INS_VCVTPD2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2PSYrr, X86_INS_VCVTPD2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2PSZrm, X86_INS_VCVTPD2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2PSZrr, X86_INS_VCVTPD2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2PSZrrb, X86_INS_VCVTPD2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2PSrr, X86_INS_VCVTPD2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2UDQZrm, X86_INS_VCVTPD2UDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2UDQZrr, X86_INS_VCVTPD2UDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPD2UDQZrrb, X86_INS_VCVTPD2UDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPH2PSYrm, X86_INS_VCVTPH2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPH2PSYrr, X86_INS_VCVTPH2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPH2PSZrm, X86_INS_VCVTPH2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPH2PSZrr, X86_INS_VCVTPH2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPH2PSrm, X86_INS_VCVTPH2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPH2PSrr, X86_INS_VCVTPH2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2DQYrm, X86_INS_VCVTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2DQYrr, X86_INS_VCVTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2DQZrm, X86_INS_VCVTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2DQZrr, X86_INS_VCVTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2DQZrrb, X86_INS_VCVTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2DQrm, X86_INS_VCVTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2DQrr, X86_INS_VCVTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PDYrm, X86_INS_VCVTPS2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PDYrr, X86_INS_VCVTPS2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PDZrm, X86_INS_VCVTPS2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PDZrr, X86_INS_VCVTPS2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PDrm, X86_INS_VCVTPS2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PDrr, X86_INS_VCVTPS2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PHYmr, X86_INS_VCVTPS2PH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PHYrr, X86_INS_VCVTPS2PH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PHZmr, X86_INS_VCVTPS2PH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PHZrr, X86_INS_VCVTPS2PH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PHmr, X86_INS_VCVTPS2PH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2PHrr, X86_INS_VCVTPS2PH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2UDQZrm, X86_INS_VCVTPS2UDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2UDQZrr, X86_INS_VCVTPS2UDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTPS2UDQZrrb, X86_INS_VCVTPS2UDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SI64Zrm, X86_INS_VCVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SI64Zrr, X86_INS_VCVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SI64rm, X86_INS_VCVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SI64rr, X86_INS_VCVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SIZrm, X86_INS_VCVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SIZrr, X86_INS_VCVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SIrm, X86_INS_VCVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SIrr, X86_INS_VCVTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SSZrm, X86_INS_VCVTSD2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SSZrr, X86_INS_VCVTSD2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SSrm, X86_INS_VCVTSD2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2SSrr, X86_INS_VCVTSD2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2USI64Zrm, X86_INS_VCVTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2USI64Zrr, X86_INS_VCVTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2USIZrm, X86_INS_VCVTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSD2USIZrr, X86_INS_VCVTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SD64rm, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SD64rr, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SDZrm, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SDZrr, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SDrm, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SDrr, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SS64rm, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SS64rr, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SSZrm, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SSZrr, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SSrm, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI2SSrr, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI642SDZrm, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI642SDZrr, X86_INS_VCVTSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI642SSZrm, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSI642SSZrr, X86_INS_VCVTSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SDZrm, X86_INS_VCVTSS2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SDZrr, X86_INS_VCVTSS2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SDrm, X86_INS_VCVTSS2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SDrr, X86_INS_VCVTSS2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SI64Zrm, X86_INS_VCVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SI64Zrr, X86_INS_VCVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SI64rm, X86_INS_VCVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SI64rr, X86_INS_VCVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SIZrm, X86_INS_VCVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SIZrr, X86_INS_VCVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SIrm, X86_INS_VCVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2SIrr, X86_INS_VCVTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2USI64Zrm, X86_INS_VCVTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2USI64Zrr, X86_INS_VCVTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2USIZrm, X86_INS_VCVTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTSS2USIZrr, X86_INS_VCVTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPD2DQXrm, X86_INS_VCVTTPD2DQX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPD2DQYrm, X86_INS_VCVTTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPD2DQYrr, X86_INS_VCVTTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPD2DQZrm, X86_INS_VCVTTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPD2DQZrr, X86_INS_VCVTTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPD2DQrr, X86_INS_VCVTTPD2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPD2UDQZrm, X86_INS_VCVTTPD2UDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPD2UDQZrr, X86_INS_VCVTTPD2UDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPS2DQYrm, X86_INS_VCVTTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPS2DQYrr, X86_INS_VCVTTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPS2DQZrm, X86_INS_VCVTTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPS2DQZrr, X86_INS_VCVTTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPS2DQrm, X86_INS_VCVTTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPS2DQrr, X86_INS_VCVTTPS2DQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPS2UDQZrm, X86_INS_VCVTTPS2UDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTPS2UDQZrr, X86_INS_VCVTTPS2UDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUDQ2PDZrm, X86_INS_VCVTUDQ2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUDQ2PDZrr, X86_INS_VCVTUDQ2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUDQ2PSZrm, X86_INS_VCVTUDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUDQ2PSZrr, X86_INS_VCVTUDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUDQ2PSZrrb, X86_INS_VCVTUDQ2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUSI642SDZrm, X86_INS_VCVTUSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUSI642SDZrr, X86_INS_VCVTUSI2SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUSI642SSZrm, X86_INS_VCVTUSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VCVTUSI642SSZrr, X86_INS_VCVTUSI2SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDYrm, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDYrr, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ128rm, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ128rmb, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ128rmbk, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ128rmbkz, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ128rmk, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ128rmkz, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ128rr, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ128rrk, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ128rrkz, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ256rm, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ256rmb, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ256rmbk, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ256rmbkz, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ256rmk, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ256rmkz, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ256rr, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ256rrk, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZ256rrkz, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrb, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrbk, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrbkz, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrm, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrmb, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrmbk, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrmbkz, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrmk, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrmkz, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrr, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrrk, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDZrrkz, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDrm, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPDrr, X86_INS_VDIVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSYrm, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSYrr, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ128rm, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ128rmb, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ128rmbk, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ128rmbkz, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ128rmk, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ128rmkz, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ128rr, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ128rrk, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ128rrkz, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ256rm, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ256rmb, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ256rmbk, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ256rmbkz, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ256rmk, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ256rmkz, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ256rr, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ256rrk, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZ256rrkz, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrb, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrbk, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrbkz, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrm, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrmb, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrmbk, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrmbkz, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrmk, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrmkz, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrr, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrrk, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSZrrkz, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSrm, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVPSrr, X86_INS_VDIVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrm, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrm_Int, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrm_Intk, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrm_Intkz, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrr, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrr_Int, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrr_Intk, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrr_Intkz, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrrb, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrrbk, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDZrrbkz, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDrm, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDrm_Int, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDrr, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSDrr_Int, X86_INS_VDIVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrm, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrm_Int, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrm_Intk, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrm_Intkz, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrr, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrr_Int, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrr_Intk, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrr_Intkz, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrrb, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrrbk, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSZrrbkz, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSrm, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSrm_Int, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSrr, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDIVSSrr_Int, X86_INS_VDIVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDPPDrmi, X86_INS_VDPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDPPDrri, X86_INS_VDPPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDPPSYrmi, X86_INS_VDPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDPPSYrri, X86_INS_VDPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDPPSrmi, X86_INS_VDPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VDPPSrri, X86_INS_VDPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VERRm, X86_INS_VERR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VERRr, X86_INS_VERR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VERWm, X86_INS_VERW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VERWr, X86_INS_VERW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDm, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDmb, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDmbk, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDmbkz, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDmk, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDmkz, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDr, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDrb, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDrbk, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDrbkz, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDrk, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PDrkz, X86_INS_VEXP2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSm, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSmb, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSmbk, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSmbkz, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSmk, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSmkz, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSr, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSrb, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSrbk, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSrbkz, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSrk, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXP2PSrkz, X86_INS_VEXP2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZ128rmk, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZ128rmkz, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZ128rrk, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZ128rrkz, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZ256rmk, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZ256rmkz, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZ256rrk, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZ256rrkz, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZrmk, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZrmkz, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZrrk, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPDZrrkz, X86_INS_VEXPANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZ128rmk, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZ128rmkz, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZ128rrk, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZ128rrkz, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZ256rmk, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZ256rmkz, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZ256rrk, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZ256rrkz, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZrmk, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZrmkz, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZrrk, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXPANDPSZrrkz, X86_INS_VEXPANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTF128mr, X86_INS_VEXTRACTF128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTF128rr, X86_INS_VEXTRACTF128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTF32x4rm, X86_INS_VEXTRACTF32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTF32x4rr, X86_INS_VEXTRACTF32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTF32x4rrk, X86_INS_VEXTRACTF32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTF32x4rrkz, X86_INS_VEXTRACTF32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTF64x4rm, X86_INS_VEXTRACTF64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTF64x4rr, X86_INS_VEXTRACTF64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTF64x4rrk, X86_INS_VEXTRACTF64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTF64x4rrkz, X86_INS_VEXTRACTF64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTI128mr, X86_INS_VEXTRACTI128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTI128rr, X86_INS_VEXTRACTI128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTI32x4rm, X86_INS_VEXTRACTI32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTI32x4rr, X86_INS_VEXTRACTI32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTI32x4rrk, X86_INS_VEXTRACTI32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTI32x4rrkz, X86_INS_VEXTRACTI32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTI64x4rm, X86_INS_VEXTRACTI64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTI64x4rr, X86_INS_VEXTRACTI64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTI64x4rrk, X86_INS_VEXTRACTI64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTI64x4rrkz, X86_INS_VEXTRACTI64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTPSmr, X86_INS_VEXTRACTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTPSrr, X86_INS_VEXTRACTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTPSzmr, X86_INS_VEXTRACTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VEXTRACTPSzrr, X86_INS_VEXTRACTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PDZ128m, X86_INS_VFMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PDZ128mb, X86_INS_VFMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PDZ256m, X86_INS_VFMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PDZ256mb, X86_INS_VFMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PDZm, X86_INS_VFMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PDZmb, X86_INS_VFMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PSZ128m, X86_INS_VFMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PSZ128mb, X86_INS_VFMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PSZ256m, X86_INS_VFMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PSZ256mb, X86_INS_VFMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PSZm, X86_INS_VFMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADD132PSZmb, X86_INS_VFMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPD4mr, X86_INS_VFMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPD4mrY, X86_INS_VFMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPD4rm, X86_INS_VFMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPD4rmY, X86_INS_VFMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPD4rr, X86_INS_VFMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPD4rrY, X86_INS_VFMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPD4rrY_REV, X86_INS_VFMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPD4rr_REV, X86_INS_VFMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v213rm, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v213rmb, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v213rmbk, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v213rmbkz, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v213rmk, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v213rmkz, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v213rr, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v213rrk, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v213rrkz, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v231rm, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v231rmb, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v231rmbk, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v231rmbkz, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v231rmk, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v231rmkz, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v231rr, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v231rrk, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ128v231rrkz, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v213rm, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v213rmb, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v213rmbk, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v213rmbkz, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v213rmk, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v213rmkz, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v213rr, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v213rrk, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v213rrkz, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v231rm, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v231rmb, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v231rmbk, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v231rmbkz, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v231rmk, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v231rmkz, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v231rr, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v231rrk, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZ256v231rrkz, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rm, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rmb, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rmbk, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rmbkz, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rmk, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rmkz, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rr, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rrb, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rrbk, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rrbkz, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rrk, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv213rrkz, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv231rm, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv231rmb, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv231rmbk, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv231rmbkz, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv231rmk, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv231rmkz, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv231rr, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv231rrk, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDZv231rrkz, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr132m, X86_INS_VFMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr132mY, X86_INS_VFMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr132r, X86_INS_VFMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr132rY, X86_INS_VFMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr213m, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr213mY, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr213r, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr213rY, X86_INS_VFMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr231m, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr231mY, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr231r, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPDr231rY, X86_INS_VFMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPS4mr, X86_INS_VFMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPS4mrY, X86_INS_VFMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPS4rm, X86_INS_VFMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPS4rmY, X86_INS_VFMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPS4rr, X86_INS_VFMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPS4rrY, X86_INS_VFMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPS4rrY_REV, X86_INS_VFMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPS4rr_REV, X86_INS_VFMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v213rm, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v213rmb, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v213rmbk, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v213rmbkz, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v213rmk, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v213rmkz, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v213rr, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v213rrk, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v213rrkz, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v231rm, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v231rmb, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v231rmbk, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v231rmbkz, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v231rmk, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v231rmkz, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v231rr, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v231rrk, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ128v231rrkz, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v213rm, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v213rmb, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v213rmbk, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v213rmbkz, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v213rmk, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v213rmkz, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v213rr, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v213rrk, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v213rrkz, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v231rm, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v231rmb, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v231rmbk, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v231rmbkz, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v231rmk, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v231rmkz, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v231rr, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v231rrk, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZ256v231rrkz, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rm, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rmb, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rmbk, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rmbkz, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rmk, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rmkz, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rr, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rrb, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rrbk, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rrbkz, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rrk, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv213rrkz, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv231rm, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv231rmb, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv231rmbk, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv231rmbkz, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv231rmk, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv231rmkz, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv231rr, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv231rrk, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSZv231rrkz, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr132m, X86_INS_VFMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr132mY, X86_INS_VFMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr132r, X86_INS_VFMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr132rY, X86_INS_VFMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr213m, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr213mY, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr213r, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr213rY, X86_INS_VFMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr231m, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr231mY, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr231r, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDPSr231rY, X86_INS_VFMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSD4mr, X86_INS_VFMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSD4mr_Int, X86_INS_VFMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSD4rm, X86_INS_VFMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSD4rm_Int, X86_INS_VFMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSD4rr, X86_INS_VFMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSD4rr_Int, X86_INS_VFMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSD4rr_REV, X86_INS_VFMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSDZm, X86_INS_VFMADD213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSDZr, X86_INS_VFMADD213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSDr132m, X86_INS_VFMADD132SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSDr132r, X86_INS_VFMADD132SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSDr213m, X86_INS_VFMADD213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSDr213r, X86_INS_VFMADD213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSDr231m, X86_INS_VFMADD231SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSDr231r, X86_INS_VFMADD231SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSS4mr, X86_INS_VFMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSS4mr_Int, X86_INS_VFMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSS4rm, X86_INS_VFMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSS4rm_Int, X86_INS_VFMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSS4rr, X86_INS_VFMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSS4rr_Int, X86_INS_VFMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSS4rr_REV, X86_INS_VFMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSSZm, X86_INS_VFMADD213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSSZr, X86_INS_VFMADD213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSSr132m, X86_INS_VFMADD132SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSSr132r, X86_INS_VFMADD132SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSSr213m, X86_INS_VFMADD213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSSr213r, X86_INS_VFMADD213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSSr231m, X86_INS_VFMADD231SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSSr231r, X86_INS_VFMADD231SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PDZ128m, X86_INS_VFMADDSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PDZ128mb, X86_INS_VFMADDSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PDZ256m, X86_INS_VFMADDSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PDZ256mb, X86_INS_VFMADDSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PDZm, X86_INS_VFMADDSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PDZmb, X86_INS_VFMADDSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PSZ128m, X86_INS_VFMADDSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PSZ128mb, X86_INS_VFMADDSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PSZ256m, X86_INS_VFMADDSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PSZ256mb, X86_INS_VFMADDSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PSZm, X86_INS_VFMADDSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUB132PSZmb, X86_INS_VFMADDSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPD4mr, X86_INS_VFMADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPD4mrY, X86_INS_VFMADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPD4rm, X86_INS_VFMADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPD4rmY, X86_INS_VFMADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPD4rr, X86_INS_VFMADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPD4rrY, X86_INS_VFMADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPD4rrY_REV, X86_INS_VFMADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPD4rr_REV, X86_INS_VFMADDSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v213rm, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v213rmb, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v213rmbk, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v213rmbkz, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v213rmk, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v213rmkz, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v213rr, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v213rrk, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v213rrkz, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v231rm, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v231rmb, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v231rmbk, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v231rmbkz, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v231rmk, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v231rmkz, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v231rr, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v231rrk, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ128v231rrkz, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v213rm, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v213rmb, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v213rmbk, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v213rmbkz, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v213rmk, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v213rmkz, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v213rr, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v213rrk, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v213rrkz, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v231rm, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v231rmb, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v231rmbk, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v231rmbkz, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v231rmk, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v231rmkz, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v231rr, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v231rrk, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZ256v231rrkz, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rm, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rmb, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rmbk, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rmbkz, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rmk, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rmkz, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rr, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rrb, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rrbk, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rrbkz, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rrk, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv213rrkz, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv231rm, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv231rmb, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv231rmbk, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv231rmbkz, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv231rmk, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv231rmkz, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv231rr, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv231rrk, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDZv231rrkz, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr132m, X86_INS_VFMADDSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr132mY, X86_INS_VFMADDSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr132r, X86_INS_VFMADDSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr132rY, X86_INS_VFMADDSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr213m, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr213mY, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr213r, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr213rY, X86_INS_VFMADDSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr231m, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr231mY, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr231r, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPDr231rY, X86_INS_VFMADDSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPS4mr, X86_INS_VFMADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPS4mrY, X86_INS_VFMADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPS4rm, X86_INS_VFMADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPS4rmY, X86_INS_VFMADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPS4rr, X86_INS_VFMADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPS4rrY, X86_INS_VFMADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPS4rrY_REV, X86_INS_VFMADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPS4rr_REV, X86_INS_VFMADDSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v213rm, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v213rmb, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v213rmbk, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v213rmbkz, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v213rmk, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v213rmkz, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v213rr, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v213rrk, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v213rrkz, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v231rm, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v231rmb, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v231rmbk, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v231rmbkz, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v231rmk, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v231rmkz, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v231rr, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v231rrk, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ128v231rrkz, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v213rm, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v213rmb, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v213rmbk, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v213rmbkz, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v213rmk, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v213rmkz, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v213rr, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v213rrk, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v213rrkz, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v231rm, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v231rmb, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v231rmbk, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v231rmbkz, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v231rmk, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v231rmkz, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v231rr, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v231rrk, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZ256v231rrkz, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rm, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rmb, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rmbk, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rmbkz, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rmk, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rmkz, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rr, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rrb, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rrbk, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rrbkz, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rrk, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv213rrkz, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv231rm, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv231rmb, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv231rmbk, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv231rmbkz, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv231rmk, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv231rmkz, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv231rr, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv231rrk, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSZv231rrkz, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr132m, X86_INS_VFMADDSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr132mY, X86_INS_VFMADDSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr132r, X86_INS_VFMADDSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr132rY, X86_INS_VFMADDSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr213m, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr213mY, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr213r, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr213rY, X86_INS_VFMADDSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr231m, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr231mY, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr231r, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMADDSUBPSr231rY, X86_INS_VFMADDSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PDZ128m, X86_INS_VFMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PDZ128mb, X86_INS_VFMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PDZ256m, X86_INS_VFMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PDZ256mb, X86_INS_VFMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PDZm, X86_INS_VFMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PDZmb, X86_INS_VFMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PSZ128m, X86_INS_VFMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PSZ128mb, X86_INS_VFMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PSZ256m, X86_INS_VFMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PSZ256mb, X86_INS_VFMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PSZm, X86_INS_VFMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUB132PSZmb, X86_INS_VFMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PDZ128m, X86_INS_VFMSUBADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PDZ128mb, X86_INS_VFMSUBADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PDZ256m, X86_INS_VFMSUBADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PDZ256mb, X86_INS_VFMSUBADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PDZm, X86_INS_VFMSUBADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PDZmb, X86_INS_VFMSUBADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PSZ128m, X86_INS_VFMSUBADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PSZ128mb, X86_INS_VFMSUBADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PSZ256m, X86_INS_VFMSUBADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PSZ256mb, X86_INS_VFMSUBADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PSZm, X86_INS_VFMSUBADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADD132PSZmb, X86_INS_VFMSUBADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPD4mr, X86_INS_VFMSUBADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPD4mrY, X86_INS_VFMSUBADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPD4rm, X86_INS_VFMSUBADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPD4rmY, X86_INS_VFMSUBADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPD4rr, X86_INS_VFMSUBADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPD4rrY, X86_INS_VFMSUBADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPD4rrY_REV, X86_INS_VFMSUBADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPD4rr_REV, X86_INS_VFMSUBADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v213rm, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v213rmb, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v213rmbk, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v213rmbkz, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v213rmk, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v213rmkz, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v213rr, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v213rrk, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v213rrkz, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v231rm, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v231rmb, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v231rmbk, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v231rmbkz, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v231rmk, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v231rmkz, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v231rr, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v231rrk, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ128v231rrkz, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v213rm, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v213rmb, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v213rmbk, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v213rmbkz, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v213rmk, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v213rmkz, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v213rr, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v213rrk, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v213rrkz, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v231rm, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v231rmb, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v231rmbk, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v231rmbkz, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v231rmk, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v231rmkz, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v231rr, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v231rrk, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZ256v231rrkz, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rm, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rmb, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rmbk, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rmbkz, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rmk, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rmkz, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rr, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rrb, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rrbk, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rrbkz, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rrk, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv213rrkz, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv231rm, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv231rmb, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv231rmbk, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv231rmbkz, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv231rmk, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv231rmkz, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv231rr, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv231rrk, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDZv231rrkz, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr132m, X86_INS_VFMSUBADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr132mY, X86_INS_VFMSUBADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr132r, X86_INS_VFMSUBADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr132rY, X86_INS_VFMSUBADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr213m, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr213mY, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr213r, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr213rY, X86_INS_VFMSUBADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr231m, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr231mY, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr231r, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPDr231rY, X86_INS_VFMSUBADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPS4mr, X86_INS_VFMSUBADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPS4mrY, X86_INS_VFMSUBADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPS4rm, X86_INS_VFMSUBADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPS4rmY, X86_INS_VFMSUBADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPS4rr, X86_INS_VFMSUBADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPS4rrY, X86_INS_VFMSUBADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPS4rrY_REV, X86_INS_VFMSUBADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPS4rr_REV, X86_INS_VFMSUBADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v213rm, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v213rmb, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v213rmbk, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v213rmbkz, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v213rmk, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v213rmkz, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v213rr, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v213rrk, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v213rrkz, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v231rm, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v231rmb, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v231rmbk, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v231rmbkz, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v231rmk, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v231rmkz, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v231rr, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v231rrk, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ128v231rrkz, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v213rm, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v213rmb, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v213rmbk, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v213rmbkz, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v213rmk, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v213rmkz, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v213rr, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v213rrk, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v213rrkz, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v231rm, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v231rmb, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v231rmbk, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v231rmbkz, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v231rmk, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v231rmkz, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v231rr, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v231rrk, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZ256v231rrkz, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rm, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rmb, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rmbk, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rmbkz, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rmk, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rmkz, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rr, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rrb, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rrbk, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rrbkz, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rrk, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv213rrkz, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv231rm, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv231rmb, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv231rmbk, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv231rmbkz, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv231rmk, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv231rmkz, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv231rr, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv231rrk, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSZv231rrkz, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr132m, X86_INS_VFMSUBADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr132mY, X86_INS_VFMSUBADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr132r, X86_INS_VFMSUBADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr132rY, X86_INS_VFMSUBADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr213m, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr213mY, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr213r, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr213rY, X86_INS_VFMSUBADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr231m, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr231mY, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr231r, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBADDPSr231rY, X86_INS_VFMSUBADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPD4mr, X86_INS_VFMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPD4mrY, X86_INS_VFMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPD4rm, X86_INS_VFMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPD4rmY, X86_INS_VFMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPD4rr, X86_INS_VFMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPD4rrY, X86_INS_VFMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPD4rrY_REV, X86_INS_VFMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPD4rr_REV, X86_INS_VFMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v213rm, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v213rmb, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v213rmbk, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v213rmbkz, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v213rmk, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v213rmkz, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v213rr, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v213rrk, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v213rrkz, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v231rm, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v231rmb, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v231rmbk, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v231rmbkz, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v231rmk, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v231rmkz, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v231rr, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v231rrk, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ128v231rrkz, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v213rm, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v213rmb, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v213rmbk, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v213rmbkz, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v213rmk, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v213rmkz, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v213rr, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v213rrk, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v213rrkz, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v231rm, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v231rmb, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v231rmbk, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v231rmbkz, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v231rmk, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v231rmkz, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v231rr, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v231rrk, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZ256v231rrkz, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rm, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rmb, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rmbk, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rmbkz, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rmk, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rmkz, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rr, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rrb, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rrbk, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rrbkz, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rrk, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv213rrkz, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv231rm, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv231rmb, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv231rmbk, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv231rmbkz, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv231rmk, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv231rmkz, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv231rr, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv231rrk, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDZv231rrkz, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr132m, X86_INS_VFMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr132mY, X86_INS_VFMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr132r, X86_INS_VFMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr132rY, X86_INS_VFMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr213m, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr213mY, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr213r, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr213rY, X86_INS_VFMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr231m, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr231mY, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr231r, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPDr231rY, X86_INS_VFMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPS4mr, X86_INS_VFMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPS4mrY, X86_INS_VFMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPS4rm, X86_INS_VFMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPS4rmY, X86_INS_VFMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPS4rr, X86_INS_VFMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPS4rrY, X86_INS_VFMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPS4rrY_REV, X86_INS_VFMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPS4rr_REV, X86_INS_VFMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v213rm, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v213rmb, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v213rmbk, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v213rmbkz, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v213rmk, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v213rmkz, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v213rr, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v213rrk, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v213rrkz, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v231rm, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v231rmb, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v231rmbk, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v231rmbkz, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v231rmk, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v231rmkz, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v231rr, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v231rrk, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ128v231rrkz, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v213rm, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v213rmb, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v213rmbk, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v213rmbkz, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v213rmk, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v213rmkz, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v213rr, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v213rrk, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v213rrkz, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v231rm, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v231rmb, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v231rmbk, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v231rmbkz, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v231rmk, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v231rmkz, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v231rr, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v231rrk, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZ256v231rrkz, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rm, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rmb, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rmbk, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rmbkz, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rmk, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rmkz, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rr, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rrb, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rrbk, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rrbkz, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rrk, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv213rrkz, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv231rm, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv231rmb, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv231rmbk, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv231rmbkz, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv231rmk, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv231rmkz, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv231rr, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv231rrk, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSZv231rrkz, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr132m, X86_INS_VFMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr132mY, X86_INS_VFMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr132r, X86_INS_VFMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr132rY, X86_INS_VFMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr213m, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr213mY, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr213r, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr213rY, X86_INS_VFMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr231m, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr231mY, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr231r, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBPSr231rY, X86_INS_VFMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSD4mr, X86_INS_VFMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSD4mr_Int, X86_INS_VFMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSD4rm, X86_INS_VFMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSD4rm_Int, X86_INS_VFMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSD4rr, X86_INS_VFMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSD4rr_Int, X86_INS_VFMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSD4rr_REV, X86_INS_VFMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSDZm, X86_INS_VFMSUB213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSDZr, X86_INS_VFMSUB213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSDr132m, X86_INS_VFMSUB132SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSDr132r, X86_INS_VFMSUB132SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSDr213m, X86_INS_VFMSUB213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSDr213r, X86_INS_VFMSUB213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSDr231m, X86_INS_VFMSUB231SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSDr231r, X86_INS_VFMSUB231SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSS4mr, X86_INS_VFMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSS4mr_Int, X86_INS_VFMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSS4rm, X86_INS_VFMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSS4rm_Int, X86_INS_VFMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSS4rr, X86_INS_VFMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSS4rr_Int, X86_INS_VFMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSS4rr_REV, X86_INS_VFMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSSZm, X86_INS_VFMSUB213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSSZr, X86_INS_VFMSUB213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSSr132m, X86_INS_VFMSUB132SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSSr132r, X86_INS_VFMSUB132SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSSr213m, X86_INS_VFMSUB213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSSr213r, X86_INS_VFMSUB213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSSr231m, X86_INS_VFMSUB231SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFMSUBSSr231r, X86_INS_VFMSUB231SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PDZ128m, X86_INS_VFNMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PDZ128mb, X86_INS_VFNMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PDZ256m, X86_INS_VFNMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PDZ256mb, X86_INS_VFNMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PDZm, X86_INS_VFNMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PDZmb, X86_INS_VFNMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PSZ128m, X86_INS_VFNMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PSZ128mb, X86_INS_VFNMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PSZ256m, X86_INS_VFNMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PSZ256mb, X86_INS_VFNMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PSZm, X86_INS_VFNMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADD132PSZmb, X86_INS_VFNMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPD4mr, X86_INS_VFNMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPD4mrY, X86_INS_VFNMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPD4rm, X86_INS_VFNMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPD4rmY, X86_INS_VFNMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPD4rr, X86_INS_VFNMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPD4rrY, X86_INS_VFNMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPD4rrY_REV, X86_INS_VFNMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPD4rr_REV, X86_INS_VFNMADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v213rm, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v213rmb, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v213rmbk, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v213rmbkz, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v213rmk, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v213rmkz, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v213rr, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v213rrk, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v213rrkz, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v231rm, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v231rmb, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v231rmbk, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v231rmbkz, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v231rmk, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v231rmkz, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v231rr, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v231rrk, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ128v231rrkz, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v213rm, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v213rmb, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v213rmbk, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v213rmbkz, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v213rmk, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v213rmkz, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v213rr, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v213rrk, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v213rrkz, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v231rm, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v231rmb, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v231rmbk, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v231rmbkz, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v231rmk, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v231rmkz, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v231rr, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v231rrk, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZ256v231rrkz, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rm, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rmb, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rmbk, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rmbkz, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rmk, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rmkz, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rr, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rrb, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rrbk, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rrbkz, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rrk, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv213rrkz, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv231rm, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv231rmb, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv231rmbk, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv231rmbkz, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv231rmk, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv231rmkz, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv231rr, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv231rrk, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDZv231rrkz, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr132m, X86_INS_VFNMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr132mY, X86_INS_VFNMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr132r, X86_INS_VFNMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr132rY, X86_INS_VFNMADD132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr213m, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr213mY, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr213r, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr213rY, X86_INS_VFNMADD213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr231m, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr231mY, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr231r, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPDr231rY, X86_INS_VFNMADD231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPS4mr, X86_INS_VFNMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPS4mrY, X86_INS_VFNMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPS4rm, X86_INS_VFNMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPS4rmY, X86_INS_VFNMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPS4rr, X86_INS_VFNMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPS4rrY, X86_INS_VFNMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPS4rrY_REV, X86_INS_VFNMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPS4rr_REV, X86_INS_VFNMADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v213rm, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v213rmb, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v213rmbk, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v213rmbkz, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v213rmk, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v213rmkz, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v213rr, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v213rrk, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v213rrkz, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v231rm, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v231rmb, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v231rmbk, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v231rmbkz, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v231rmk, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v231rmkz, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v231rr, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v231rrk, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ128v231rrkz, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v213rm, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v213rmb, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v213rmbk, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v213rmbkz, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v213rmk, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v213rmkz, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v213rr, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v213rrk, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v213rrkz, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v231rm, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v231rmb, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v231rmbk, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v231rmbkz, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v231rmk, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v231rmkz, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v231rr, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v231rrk, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZ256v231rrkz, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rm, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rmb, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rmbk, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rmbkz, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rmk, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rmkz, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rr, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rrb, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rrbk, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rrbkz, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rrk, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv213rrkz, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv231rm, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv231rmb, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv231rmbk, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv231rmbkz, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv231rmk, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv231rmkz, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv231rr, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv231rrk, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSZv231rrkz, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr132m, X86_INS_VFNMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr132mY, X86_INS_VFNMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr132r, X86_INS_VFNMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr132rY, X86_INS_VFNMADD132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr213m, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr213mY, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr213r, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr213rY, X86_INS_VFNMADD213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr231m, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr231mY, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr231r, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDPSr231rY, X86_INS_VFNMADD231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSD4mr, X86_INS_VFNMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSD4mr_Int, X86_INS_VFNMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSD4rm, X86_INS_VFNMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSD4rm_Int, X86_INS_VFNMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSD4rr, X86_INS_VFNMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSD4rr_Int, X86_INS_VFNMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSD4rr_REV, X86_INS_VFNMADDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSDZm, X86_INS_VFNMADD213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSDZr, X86_INS_VFNMADD213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSDr132m, X86_INS_VFNMADD132SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSDr132r, X86_INS_VFNMADD132SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSDr213m, X86_INS_VFNMADD213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSDr213r, X86_INS_VFNMADD213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSDr231m, X86_INS_VFNMADD231SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSDr231r, X86_INS_VFNMADD231SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSS4mr, X86_INS_VFNMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSS4mr_Int, X86_INS_VFNMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSS4rm, X86_INS_VFNMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSS4rm_Int, X86_INS_VFNMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSS4rr, X86_INS_VFNMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSS4rr_Int, X86_INS_VFNMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSS4rr_REV, X86_INS_VFNMADDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSSZm, X86_INS_VFNMADD213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSSZr, X86_INS_VFNMADD213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSSr132m, X86_INS_VFNMADD132SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSSr132r, X86_INS_VFNMADD132SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSSr213m, X86_INS_VFNMADD213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSSr213r, X86_INS_VFNMADD213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSSr231m, X86_INS_VFNMADD231SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMADDSSr231r, X86_INS_VFNMADD231SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PDZ128m, X86_INS_VFNMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PDZ128mb, X86_INS_VFNMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PDZ256m, X86_INS_VFNMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PDZ256mb, X86_INS_VFNMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PDZm, X86_INS_VFNMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PDZmb, X86_INS_VFNMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PSZ128m, X86_INS_VFNMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PSZ128mb, X86_INS_VFNMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PSZ256m, X86_INS_VFNMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PSZ256mb, X86_INS_VFNMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PSZm, X86_INS_VFNMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUB132PSZmb, X86_INS_VFNMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPD4mr, X86_INS_VFNMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPD4mrY, X86_INS_VFNMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPD4rm, X86_INS_VFNMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPD4rmY, X86_INS_VFNMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPD4rr, X86_INS_VFNMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPD4rrY, X86_INS_VFNMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPD4rrY_REV, X86_INS_VFNMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPD4rr_REV, X86_INS_VFNMSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v213rm, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v213rmb, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v213rmbk, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v213rmbkz, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v213rmk, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v213rmkz, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v213rr, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v213rrk, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v213rrkz, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v231rm, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v231rmb, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v231rmbk, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v231rmbkz, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v231rmk, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v231rmkz, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v231rr, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v231rrk, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ128v231rrkz, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v213rm, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v213rmb, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v213rmbk, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v213rmbkz, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v213rmk, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v213rmkz, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v213rr, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v213rrk, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v213rrkz, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v231rm, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v231rmb, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v231rmbk, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v231rmbkz, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v231rmk, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v231rmkz, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v231rr, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v231rrk, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZ256v231rrkz, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rm, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rmb, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rmbk, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rmbkz, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rmk, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rmkz, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rr, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rrb, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rrbk, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rrbkz, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rrk, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv213rrkz, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv231rm, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv231rmb, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv231rmbk, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv231rmbkz, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv231rmk, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv231rmkz, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv231rr, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv231rrk, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDZv231rrkz, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr132m, X86_INS_VFNMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr132mY, X86_INS_VFNMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr132r, X86_INS_VFNMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr132rY, X86_INS_VFNMSUB132PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr213m, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr213mY, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr213r, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr213rY, X86_INS_VFNMSUB213PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr231m, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr231mY, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr231r, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPDr231rY, X86_INS_VFNMSUB231PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPS4mr, X86_INS_VFNMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPS4mrY, X86_INS_VFNMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPS4rm, X86_INS_VFNMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPS4rmY, X86_INS_VFNMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPS4rr, X86_INS_VFNMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPS4rrY, X86_INS_VFNMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPS4rrY_REV, X86_INS_VFNMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPS4rr_REV, X86_INS_VFNMSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v213rm, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v213rmb, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v213rmbk, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v213rmbkz, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v213rmk, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v213rmkz, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v213rr, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v213rrk, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v213rrkz, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v231rm, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v231rmb, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v231rmbk, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v231rmbkz, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v231rmk, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v231rmkz, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v231rr, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v231rrk, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ128v231rrkz, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v213rm, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v213rmb, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v213rmbk, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v213rmbkz, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v213rmk, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v213rmkz, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v213rr, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v213rrk, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v213rrkz, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v231rm, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v231rmb, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v231rmbk, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v231rmbkz, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v231rmk, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v231rmkz, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v231rr, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v231rrk, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZ256v231rrkz, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rm, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rmb, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rmbk, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rmbkz, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rmk, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rmkz, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rr, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rrb, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rrbk, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rrbkz, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rrk, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv213rrkz, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv231rm, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv231rmb, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv231rmbk, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv231rmbkz, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv231rmk, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv231rmkz, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv231rr, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv231rrk, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSZv231rrkz, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr132m, X86_INS_VFNMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr132mY, X86_INS_VFNMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr132r, X86_INS_VFNMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr132rY, X86_INS_VFNMSUB132PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr213m, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr213mY, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr213r, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr213rY, X86_INS_VFNMSUB213PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr231m, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr231mY, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr231r, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBPSr231rY, X86_INS_VFNMSUB231PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSD4mr, X86_INS_VFNMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSD4mr_Int, X86_INS_VFNMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSD4rm, X86_INS_VFNMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSD4rm_Int, X86_INS_VFNMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSD4rr, X86_INS_VFNMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSD4rr_Int, X86_INS_VFNMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSD4rr_REV, X86_INS_VFNMSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSDZm, X86_INS_VFNMSUB213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSDZr, X86_INS_VFNMSUB213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSDr132m, X86_INS_VFNMSUB132SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSDr132r, X86_INS_VFNMSUB132SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSDr213m, X86_INS_VFNMSUB213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSDr213r, X86_INS_VFNMSUB213SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSDr231m, X86_INS_VFNMSUB231SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSDr231r, X86_INS_VFNMSUB231SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSS4mr, X86_INS_VFNMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSS4mr_Int, X86_INS_VFNMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSS4rm, X86_INS_VFNMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSS4rm_Int, X86_INS_VFNMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSS4rr, X86_INS_VFNMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSS4rr_Int, X86_INS_VFNMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSS4rr_REV, X86_INS_VFNMSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSSZm, X86_INS_VFNMSUB213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSSZr, X86_INS_VFNMSUB213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSSr132m, X86_INS_VFNMSUB132SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSSr132r, X86_INS_VFNMSUB132SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSSr213m, X86_INS_VFNMSUB213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSSr213r, X86_INS_VFNMSUB213SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSSr231m, X86_INS_VFNMSUB231SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFNMSUBSSr231r, X86_INS_VFNMSUB231SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZPDrm, X86_INS_VFRCZPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZPDrmY, X86_INS_VFRCZPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZPDrr, X86_INS_VFRCZPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZPDrrY, X86_INS_VFRCZPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZPSrm, X86_INS_VFRCZPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZPSrmY, X86_INS_VFRCZPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZPSrr, X86_INS_VFRCZPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZPSrrY, X86_INS_VFRCZPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZSDrm, X86_INS_VFRCZSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZSDrr, X86_INS_VFRCZSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZSSrm, X86_INS_VFRCZSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFRCZSSrr, X86_INS_VFRCZSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsANDNPDrm, X86_INS_VANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsANDNPDrr, X86_INS_VANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsANDNPSrm, X86_INS_VANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsANDNPSrr, X86_INS_VANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsANDPDrm, X86_INS_VANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsANDPDrr, X86_INS_VANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsANDPSrm, X86_INS_VANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsANDPSrr, X86_INS_VANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsORPDrm, X86_INS_VORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsORPDrr, X86_INS_VORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsORPSrm, X86_INS_VORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsORPSrr, X86_INS_VORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsXORPDrm, X86_INS_VXORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsXORPDrr, X86_INS_VXORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsXORPSrm, X86_INS_VXORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFsXORPSrr, X86_INS_VXORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvANDNPDrm, X86_INS_VANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvANDNPDrr, X86_INS_VANDNPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvANDNPSrm, X86_INS_VANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvANDNPSrr, X86_INS_VANDNPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvANDPDrm, X86_INS_VANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvANDPDrr, X86_INS_VANDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvANDPSrm, X86_INS_VANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvANDPSrr, X86_INS_VANDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvORPDrm, X86_INS_VORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvORPDrr, X86_INS_VORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvORPSrm, X86_INS_VORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvORPSrr, X86_INS_VORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvXORPDrm, X86_INS_VXORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvXORPDrr, X86_INS_VXORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvXORPSrm, X86_INS_VXORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VFvXORPSrr, X86_INS_VXORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERDPDYrm, X86_INS_VGATHERDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERDPDZrm, X86_INS_VGATHERDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERDPDrm, X86_INS_VGATHERDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERDPSYrm, X86_INS_VGATHERDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERDPSZrm, X86_INS_VGATHERDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERDPSrm, X86_INS_VGATHERDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERPF0DPDm, X86_INS_VGATHERPF0DPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERPF0DPSm, X86_INS_VGATHERPF0DPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERPF0QPDm, X86_INS_VGATHERPF0QPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERPF0QPSm, X86_INS_VGATHERPF0QPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERPF1DPDm, X86_INS_VGATHERPF1DPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERPF1DPSm, X86_INS_VGATHERPF1DPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERPF1QPDm, X86_INS_VGATHERPF1QPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERPF1QPSm, X86_INS_VGATHERPF1QPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERQPDYrm, X86_INS_VGATHERQPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERQPDZrm, X86_INS_VGATHERQPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERQPDrm, X86_INS_VGATHERQPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERQPSYrm, X86_INS_VGATHERQPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERQPSZrm, X86_INS_VGATHERQPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VGATHERQPSrm, X86_INS_VGATHERQPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VHADDPDYrm, X86_INS_VHADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHADDPDYrr, X86_INS_VHADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHADDPDrm, X86_INS_VHADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHADDPDrr, X86_INS_VHADDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHADDPSYrm, X86_INS_VHADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHADDPSYrr, X86_INS_VHADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHADDPSrm, X86_INS_VHADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHADDPSrr, X86_INS_VHADDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHSUBPDYrm, X86_INS_VHSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHSUBPDYrr, X86_INS_VHSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHSUBPDrm, X86_INS_VHSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHSUBPDrr, X86_INS_VHSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHSUBPSYrm, X86_INS_VHSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHSUBPSYrr, X86_INS_VHSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHSUBPSrm, X86_INS_VHSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VHSUBPSrr, X86_INS_VHSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTF128rm, X86_INS_VINSERTF128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTF128rr, X86_INS_VINSERTF128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTF32x4rm, X86_INS_VINSERTF32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTF32x4rr, X86_INS_VINSERTF32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTF32x8rm, X86_INS_VINSERTF32X8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTF32x8rr, X86_INS_VINSERTF32X8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTF64x2rm, X86_INS_VINSERTF64X2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTF64x2rr, X86_INS_VINSERTF64X2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTF64x4rm, X86_INS_VINSERTF64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTF64x4rr, X86_INS_VINSERTF64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTI128rm, X86_INS_VINSERTI128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTI128rr, X86_INS_VINSERTI128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTI32x4rm, X86_INS_VINSERTI32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTI32x4rr, X86_INS_VINSERTI32X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTI32x8rm, X86_INS_VINSERTI32X8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTI32x8rr, X86_INS_VINSERTI32X8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTI64x2rm, X86_INS_VINSERTI64X2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTI64x2rr, X86_INS_VINSERTI64X2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTI64x4rm, X86_INS_VINSERTI64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTI64x4rr, X86_INS_VINSERTI64X4,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTPSrm, X86_INS_VINSERTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTPSrr, X86_INS_VINSERTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTPSzrm, X86_INS_VINSERTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VINSERTPSzrr, X86_INS_VINSERTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VLDDQUYrm, X86_INS_VLDDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VLDDQUrm, X86_INS_VLDDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VLDMXCSR, X86_INS_VLDMXCSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMASKMOVDQU, X86_INS_VMASKMOVDQU,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMASKMOVDQU64, X86_INS_VMASKMOVDQU,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDI, 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMASKMOVPDYmr, X86_INS_VMASKMOVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMASKMOVPDYrm, X86_INS_VMASKMOVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMASKMOVPDmr, X86_INS_VMASKMOVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMASKMOVPDrm, X86_INS_VMASKMOVPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMASKMOVPSYmr, X86_INS_VMASKMOVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMASKMOVPSYrm, X86_INS_VMASKMOVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMASKMOVPSmr, X86_INS_VMASKMOVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMASKMOVPSrm, X86_INS_VMASKMOVPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCPDYrm, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCPDYrr, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCPDrm, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCPDrr, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCPSYrm, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCPSYrr, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCPSrm, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCPSrr, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCSDrm, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCSDrr, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCSSrm, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXCSSrr, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDYrm, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDYrr, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ128rm, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ128rmb, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ128rmbk, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ128rmbkz, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ128rmk, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ128rmkz, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ128rr, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ128rrk, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ128rrkz, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ256rm, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ256rmb, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ256rmbk, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ256rmbkz, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ256rmk, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ256rmkz, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ256rr, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ256rrk, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZ256rrkz, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZrm, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZrmb, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZrmbk, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZrmbkz, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZrmk, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZrmkz, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZrr, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZrrk, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDZrrkz, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDrm, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPDrr, X86_INS_VMAXPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSYrm, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSYrr, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ128rm, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ128rmb, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ128rmbk, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ128rmbkz, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ128rmk, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ128rmkz, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ128rr, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ128rrk, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ128rrkz, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ256rm, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ256rmb, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ256rmbk, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ256rmbkz, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ256rmk, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ256rmkz, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ256rr, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ256rrk, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZ256rrkz, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZrm, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZrmb, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZrmbk, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZrmbkz, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZrmk, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZrmkz, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZrr, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZrrk, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSZrrkz, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSrm, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXPSrr, X86_INS_VMAXPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrm, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrm_Int, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrm_Intk, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrm_Intkz, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrr, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrr_Int, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrr_Intk, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrr_Intkz, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrrb, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrrbk, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDZrrbkz, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDrm, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDrm_Int, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDrr, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSDrr_Int, X86_INS_VMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrm, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrm_Int, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrm_Intk, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrm_Intkz, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrr, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrr_Int, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrr_Intk, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrr_Intkz, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrrb, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrrbk, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSZrrbkz, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSrm, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSrm_Int, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSrr, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMAXSSrr_Int, X86_INS_VMAXSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMCALL, X86_INS_VMCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMCLEARm, X86_INS_VMCLEAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMFUNC, X86_INS_VMFUNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCPDYrm, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCPDYrr, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCPDrm, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCPDrr, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCPSYrm, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCPSYrr, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCPSrm, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCPSrr, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCSDrm, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCSDrr, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCSSrm, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINCSSrr, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDYrm, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDYrr, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ128rm, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ128rmb, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ128rmbk, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ128rmbkz, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ128rmk, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ128rmkz, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ128rr, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ128rrk, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ128rrkz, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ256rm, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ256rmb, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ256rmbk, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ256rmbkz, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ256rmk, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ256rmkz, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ256rr, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ256rrk, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZ256rrkz, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZrm, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZrmb, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZrmbk, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZrmbkz, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZrmk, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZrmkz, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZrr, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZrrk, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDZrrkz, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDrm, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPDrr, X86_INS_VMINPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSYrm, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSYrr, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ128rm, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ128rmb, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ128rmbk, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ128rmbkz, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ128rmk, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ128rmkz, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ128rr, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ128rrk, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ128rrkz, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ256rm, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ256rmb, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ256rmbk, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ256rmbkz, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ256rmk, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ256rmkz, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ256rr, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ256rrk, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZ256rrkz, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZrm, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZrmb, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZrmbk, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZrmbkz, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZrmk, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZrmkz, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZrr, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZrrk, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSZrrkz, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSrm, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINPSrr, X86_INS_VMINPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrm, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrm_Int, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrm_Intk, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrm_Intkz, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrr, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrr_Int, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrr_Intk, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrr_Intkz, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrrb, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrrbk, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDZrrbkz, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDrm, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDrm_Int, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDrr, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSDrr_Int, X86_INS_VMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrm, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrm_Int, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrm_Intk, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrm_Intkz, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrr, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrr_Int, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrr_Intk, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrr_Intkz, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrrb, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrrbk, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSZrrbkz, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSrm, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSrm_Int, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSrr, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMINSSrr_Int, X86_INS_VMINSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMLAUNCH, X86_INS_VMLAUNCH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMLOAD32, X86_INS_VMLOAD,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMLOAD64, X86_INS_VMLOAD,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMMCALL, X86_INS_VMMCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOV64toPQIZrr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOV64toPQIrm, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOV64toPQIrr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOV64toSDZrr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOV64toSDrm, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOV64toSDrr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDYmr, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDYrm, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDYrr, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDYrr_REV, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128mr, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128mrk, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128rm, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128rmk, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128rmkz, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128rr, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128rr_alt, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128rrk, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128rrk_alt, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128rrkz, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ128rrkz_alt, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256mr, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256mrk, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256rm, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256rmk, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256rmkz, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256rr, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256rr_alt, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256rrk, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256rrk_alt, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256rrkz, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZ256rrkz_alt, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZmr, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZmrk, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZrm, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZrmk, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZrmkz, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZrr, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZrr_alt, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZrrk, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZrrk_alt, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZrrkz, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDZrrkz_alt, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDmr, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDrm, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDrr, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPDrr_REV, X86_INS_VMOVAPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSYmr, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSYrm, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSYrr, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSYrr_REV, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128mr, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128mrk, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128rm, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128rmk, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128rmkz, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128rr, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128rr_alt, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128rrk, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128rrk_alt, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128rrkz, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ128rrkz_alt, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256mr, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256mrk, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256rm, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256rmk, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256rmkz, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256rr, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256rr_alt, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256rrk, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256rrk_alt, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256rrkz, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZ256rrkz_alt, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZmr, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZmrk, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZrm, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZrmk, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZrmkz, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZrr, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZrr_alt, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZrrk, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZrrk_alt, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZrrkz, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSZrrkz_alt, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSmr, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSrm, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSrr, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVAPSrr_REV, X86_INS_VMOVAPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDDUPYrm, X86_INS_VMOVDDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDDUPYrr, X86_INS_VMOVDDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDDUPZrm, X86_INS_VMOVDDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDDUPZrr, X86_INS_VMOVDDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDDUPrm, X86_INS_VMOVDDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDDUPrr, X86_INS_VMOVDDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDI2PDIZrm, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDI2PDIZrr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDI2PDIrm, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDI2PDIrr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDI2SSZrm, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDI2SSZrr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDI2SSrm, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDI2SSrr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128mr, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128mrk, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128rm, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128rmk, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128rmkz, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128rr, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128rr_alt, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128rrk, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128rrk_alt, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128rrkz, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z128rrkz_alt, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256mr, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256mrk, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256rm, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256rmk, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256rmkz, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256rr, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256rr_alt, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256rrk, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256rrk_alt, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256rrkz, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Z256rrkz_alt, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zmr, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zmrk, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zrm, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zrmk, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zrmkz, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zrr, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zrr_alt, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zrrk, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zrrk_alt, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zrrkz, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA32Zrrkz_alt, X86_INS_VMOVDQA32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128mr, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128mrk, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128rm, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128rmk, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128rmkz, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128rr, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128rr_alt, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128rrk, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128rrk_alt, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128rrkz, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z128rrkz_alt, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256mr, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256mrk, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256rm, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256rmk, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256rmkz, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256rr, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256rr_alt, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256rrk, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256rrk_alt, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256rrkz, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Z256rrkz_alt, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zmr, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zmrk, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zrm, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zrmk, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zrmkz, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zrr, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zrr_alt, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zrrk, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zrrk_alt, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zrrkz, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQA64Zrrkz_alt, X86_INS_VMOVDQA64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQAYmr, X86_INS_VMOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQAYrm, X86_INS_VMOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQAYrr, X86_INS_VMOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQAYrr_REV, X86_INS_VMOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQAmr, X86_INS_VMOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQArm, X86_INS_VMOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQArr, X86_INS_VMOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQArr_REV, X86_INS_VMOVDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128mr, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128mrk, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128rm, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128rmk, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128rmkz, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128rr, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128rr_alt, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128rrk, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128rrk_alt, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128rrkz, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z128rrkz_alt, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256mr, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256mrk, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256rm, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256rmk, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256rmkz, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256rr, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256rr_alt, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256rrk, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256rrk_alt, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256rrkz, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Z256rrkz_alt, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zmr, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zmrk, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zrm, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zrmk, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zrmkz, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zrr, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zrr_alt, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zrrk, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zrrk_alt, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zrrkz, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU16Zrrkz_alt, X86_INS_VMOVDQU16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128mr, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128mrk, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128rm, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128rmk, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128rmkz, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128rr, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128rr_alt, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128rrk, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128rrk_alt, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128rrkz, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z128rrkz_alt, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256mr, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256mrk, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256rm, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256rmk, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256rmkz, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256rr, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256rr_alt, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256rrk, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256rrk_alt, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256rrkz, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Z256rrkz_alt, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zmr, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zmrk, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zrm, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zrmk, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zrmkz, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zrr, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zrr_alt, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zrrk, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zrrk_alt, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zrrkz, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU32Zrrkz_alt, X86_INS_VMOVDQU32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128mr, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128mrk, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128rm, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128rmk, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128rmkz, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128rr, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128rr_alt, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128rrk, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128rrk_alt, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128rrkz, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z128rrkz_alt, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256mr, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256mrk, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256rm, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256rmk, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256rmkz, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256rr, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256rr_alt, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256rrk, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256rrk_alt, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256rrkz, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Z256rrkz_alt, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zmr, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zmrk, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zrm, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zrmk, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zrmkz, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zrr, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zrr_alt, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zrrk, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zrrk_alt, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zrrkz, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU64Zrrkz_alt, X86_INS_VMOVDQU64,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128mr, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128mrk, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128rm, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128rmk, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128rmkz, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128rr, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128rr_alt, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128rrk, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128rrk_alt, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128rrkz, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z128rrkz_alt, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256mr, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256mrk, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256rm, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256rmk, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256rmkz, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256rr, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256rr_alt, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256rrk, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256rrk_alt, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256rrkz, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Z256rrkz_alt, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zmr, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zmrk, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zrm, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zrmk, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zrmkz, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zrr, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zrr_alt, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zrrk, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zrrk_alt, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zrrkz, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQU8Zrrkz_alt, X86_INS_VMOVDQU8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQUYmr, X86_INS_VMOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQUYrm, X86_INS_VMOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQUYrr, X86_INS_VMOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQUYrr_REV, X86_INS_VMOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQUmr, X86_INS_VMOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQUrm, X86_INS_VMOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQUrr, X86_INS_VMOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVDQUrr_REV, X86_INS_VMOVDQU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVHLPSZrr, X86_INS_VMOVHLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVHLPSrr, X86_INS_VMOVHLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVHPDmr, X86_INS_VMOVHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVHPDrm, X86_INS_VMOVHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVHPSmr, X86_INS_VMOVHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVHPSrm, X86_INS_VMOVHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVLHPSZrr, X86_INS_VMOVLHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVLHPSrr, X86_INS_VMOVLHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVLPDmr, X86_INS_VMOVLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVLPDrm, X86_INS_VMOVLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVLPSmr, X86_INS_VMOVLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVLPSrm, X86_INS_VMOVLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVMSKPDYrr, X86_INS_VMOVMSKPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVMSKPDrr, X86_INS_VMOVMSKPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVMSKPSYrr, X86_INS_VMOVMSKPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVMSKPSrr, X86_INS_VMOVMSKPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTDQAYrm, X86_INS_VMOVNTDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTDQAZ128rm, X86_INS_VMOVNTDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTDQAZ256rm, X86_INS_VMOVNTDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTDQAZrm, X86_INS_VMOVNTDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTDQArm, X86_INS_VMOVNTDQA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTDQYmr, X86_INS_VMOVNTDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTDQZ128mr, X86_INS_VMOVNTDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTDQZ256mr, X86_INS_VMOVNTDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTDQZmr, X86_INS_VMOVNTDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTDQmr, X86_INS_VMOVNTDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTPDYmr, X86_INS_VMOVNTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTPDZ128mr, X86_INS_VMOVNTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTPDZ256mr, X86_INS_VMOVNTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTPDZmr, X86_INS_VMOVNTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTPDmr, X86_INS_VMOVNTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTPSYmr, X86_INS_VMOVNTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTPSZ128mr, X86_INS_VMOVNTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTPSZ256mr, X86_INS_VMOVNTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTPSZmr, X86_INS_VMOVNTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVNTPSmr, X86_INS_VMOVNTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVPDI2DIZmr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVPDI2DIZrr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVPDI2DImr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVPDI2DIrr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVPQI2QImr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVPQI2QIrr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVPQIto64Zmr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVPQIto64Zrr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVPQIto64rm, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVPQIto64rr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVQI2PQIZrm, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVQI2PQIrm, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDZmr, X86_INS_VMOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDZmrk, X86_INS_VMOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDZrm, X86_INS_VMOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDZrr, X86_INS_VMOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDZrr_REV, X86_INS_VMOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDZrrk, X86_INS_VMOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDmr, X86_INS_VMOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDrm, X86_INS_VMOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDrr, X86_INS_VMOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDrr_REV, X86_INS_VMOVSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDto64Zmr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDto64Zrr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDto64mr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSDto64rr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSHDUPYrm, X86_INS_VMOVSHDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSHDUPYrr, X86_INS_VMOVSHDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSHDUPZrm, X86_INS_VMOVSHDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSHDUPZrr, X86_INS_VMOVSHDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSHDUPrm, X86_INS_VMOVSHDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSHDUPrr, X86_INS_VMOVSHDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSLDUPYrm, X86_INS_VMOVSLDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSLDUPYrr, X86_INS_VMOVSLDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSLDUPZrm, X86_INS_VMOVSLDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSLDUPZrr, X86_INS_VMOVSLDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSLDUPrm, X86_INS_VMOVSLDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSLDUPrr, X86_INS_VMOVSLDUP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSS2DIZmr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSS2DIZrr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSS2DImr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSS2DIrr, X86_INS_VMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSSZmr, X86_INS_VMOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSSZmrk, X86_INS_VMOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSSZrm, X86_INS_VMOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSSZrr, X86_INS_VMOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSSZrr_REV, X86_INS_VMOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSSZrrk, X86_INS_VMOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSSmr, X86_INS_VMOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSSrm, X86_INS_VMOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSSrr, X86_INS_VMOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVSSrr_REV, X86_INS_VMOVSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDYmr, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDYrm, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDYrr, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDYrr_REV, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128mr, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128mrk, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128rm, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128rmk, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128rmkz, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128rr, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128rr_alt, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128rrk, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128rrk_alt, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128rrkz, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ128rrkz_alt, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256mr, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256mrk, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256rm, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256rmk, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256rmkz, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256rr, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256rr_alt, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256rrk, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256rrk_alt, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256rrkz, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZ256rrkz_alt, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZmr, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZmrk, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZrm, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZrmk, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZrmkz, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZrr, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZrr_alt, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZrrk, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZrrk_alt, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZrrkz, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDZrrkz_alt, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDmr, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDrm, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDrr, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPDrr_REV, X86_INS_VMOVUPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSYmr, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSYrm, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSYrr, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSYrr_REV, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128mr, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128mrk, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128rm, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128rmk, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128rmkz, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128rr, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128rr_alt, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128rrk, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128rrk_alt, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128rrkz, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ128rrkz_alt, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256mr, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256mrk, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256rm, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256rmk, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256rmkz, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256rr, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256rr_alt, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256rrk, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256rrk_alt, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256rrkz, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZ256rrkz_alt, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZmr, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZmrk, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZrm, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZrmk, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZrmkz, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZrr, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZrr_alt, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZrrk, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZrrk_alt, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZrrkz, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSZrrkz_alt, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSmr, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSrm, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSrr, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVUPSrr_REV, X86_INS_VMOVUPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVZPQILo2PQIZrm, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVZPQILo2PQIZrr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVZPQILo2PQIrm, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVZPQILo2PQIrr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVZQI2PQIrm, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMOVZQI2PQIrr, X86_INS_VMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMPSADBWYrmi, X86_INS_VMPSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VMPSADBWYrri, X86_INS_VMPSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VMPSADBWrmi, X86_INS_VMPSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMPSADBWrri, X86_INS_VMPSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMPTRLDm, X86_INS_VMPTRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMPTRSTm, X86_INS_VMPTRST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMREAD32rm, X86_INS_VMREAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMREAD32rr, X86_INS_VMREAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMREAD64rm, X86_INS_VMREAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMREAD64rr, X86_INS_VMREAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMRESUME, X86_INS_VMRESUME,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMRUN32, X86_INS_VMRUN,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMRUN64, X86_INS_VMRUN,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMSAVE32, X86_INS_VMSAVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMSAVE64, X86_INS_VMSAVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDYrm, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDYrr, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ128rm, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ128rmb, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ128rmbk, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ128rmbkz, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ128rmk, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ128rmkz, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ128rr, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ128rrk, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ128rrkz, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ256rm, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ256rmb, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ256rmbk, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ256rmbkz, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ256rmk, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ256rmkz, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ256rr, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ256rrk, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZ256rrkz, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrb, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrbk, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrbkz, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrm, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrmb, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrmbk, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrmbkz, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrmk, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrmkz, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrr, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrrk, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDZrrkz, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDrm, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPDrr, X86_INS_VMULPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSYrm, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSYrr, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ128rm, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ128rmb, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ128rmbk, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ128rmbkz, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ128rmk, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ128rmkz, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ128rr, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ128rrk, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ128rrkz, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ256rm, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ256rmb, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ256rmbk, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ256rmbkz, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ256rmk, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ256rmkz, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ256rr, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ256rrk, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZ256rrkz, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrb, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrbk, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrbkz, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrm, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrmb, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrmbk, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrmbkz, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrmk, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrmkz, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrr, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrrk, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSZrrkz, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSrm, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULPSrr, X86_INS_VMULPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrm, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrm_Int, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrm_Intk, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrm_Intkz, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrr, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrr_Int, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrr_Intk, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrr_Intkz, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrrb, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrrbk, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDZrrbkz, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDrm, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDrm_Int, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDrr, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSDrr_Int, X86_INS_VMULSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrm, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrm_Int, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrm_Intk, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrm_Intkz, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrr, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrr_Int, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrr_Intk, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrr_Intkz, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrrb, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrrbk, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSZrrbkz, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSrm, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSrm_Int, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSrr, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMULSSrr_Int, X86_INS_VMULSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VMWRITE32rm, X86_INS_VMWRITE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMWRITE32rr, X86_INS_VMWRITE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMWRITE64rm, X86_INS_VMWRITE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMWRITE64rr, X86_INS_VMWRITE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMXOFF, X86_INS_VMXOFF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMXON, X86_INS_VMXON,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VORPDYrm, X86_INS_VORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VORPDYrr, X86_INS_VORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VORPDrm, X86_INS_VORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VORPDrr, X86_INS_VORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VORPSYrm, X86_INS_VORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VORPSYrr, X86_INS_VORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VORPSrm, X86_INS_VORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VORPSrr, X86_INS_VORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSBrm128, X86_INS_VPABSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSBrm256, X86_INS_VPABSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSBrr128, X86_INS_VPABSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSBrr256, X86_INS_VPABSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDZrm, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDZrmb, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDZrmbk, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDZrmbkz, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDZrmk, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDZrmkz, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDZrr, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDZrrk, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDZrrkz, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDrm128, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDrm256, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDrr128, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSDrr256, X86_INS_VPABSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSQZrm, X86_INS_VPABSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSQZrmb, X86_INS_VPABSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSQZrmbk, X86_INS_VPABSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSQZrmbkz, X86_INS_VPABSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSQZrmk, X86_INS_VPABSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSQZrmkz, X86_INS_VPABSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSQZrr, X86_INS_VPABSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSQZrrk, X86_INS_VPABSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSQZrrkz, X86_INS_VPABSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSWrm128, X86_INS_VPABSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSWrm256, X86_INS_VPABSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSWrr128, X86_INS_VPABSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPABSWrr256, X86_INS_VPABSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKSSDWYrm, X86_INS_VPACKSSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKSSDWYrr, X86_INS_VPACKSSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKSSDWrm, X86_INS_VPACKSSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKSSDWrr, X86_INS_VPACKSSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKSSWBYrm, X86_INS_VPACKSSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKSSWBYrr, X86_INS_VPACKSSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKSSWBrm, X86_INS_VPACKSSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKSSWBrr, X86_INS_VPACKSSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKUSDWYrm, X86_INS_VPACKUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKUSDWYrr, X86_INS_VPACKUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKUSDWrm, X86_INS_VPACKUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKUSDWrr, X86_INS_VPACKUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKUSWBYrm, X86_INS_VPACKUSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKUSWBYrr, X86_INS_VPACKUSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKUSWBrm, X86_INS_VPACKUSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPACKUSWBrr, X86_INS_VPACKUSWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBYrm, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBYrr, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ128rm, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ128rmk, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ128rmkz, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ128rr, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ128rrk, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ128rrkz, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ256rm, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ256rmk, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ256rmkz, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ256rr, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ256rrk, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZ256rrkz, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZrm, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZrmk, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZrmkz, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZrr, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZrrk, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBZrrkz, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBrm, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDBrr, X86_INS_VPADDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDYrm, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDYrr, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ128rm, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ128rmb, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ128rmbk, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ128rmbkz, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ128rmk, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ128rmkz, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ128rr, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ128rrk, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ128rrkz, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ256rm, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ256rmb, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ256rmbk, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ256rmbkz, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ256rmk, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ256rmkz, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ256rr, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ256rrk, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZ256rrkz, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZrm, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZrmb, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZrmbk, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZrmbkz, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZrmk, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZrmkz, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZrr, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZrrk, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDZrrkz, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDrm, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDDrr, X86_INS_VPADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQYrm, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQYrr, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ128rm, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ128rmb, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ128rmbk, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ128rmbkz, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ128rmk, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ128rmkz, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ128rr, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ128rrk, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ128rrkz, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ256rm, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ256rmb, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ256rmbk, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ256rmbkz, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ256rmk, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ256rmkz, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ256rr, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ256rrk, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZ256rrkz, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZrm, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZrmb, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZrmbk, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZrmbkz, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZrmk, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZrmkz, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZrr, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZrrk, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQZrrkz, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQrm, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDQrr, X86_INS_VPADDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDSBYrm, X86_INS_VPADDSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDSBYrr, X86_INS_VPADDSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDSBrm, X86_INS_VPADDSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDSBrr, X86_INS_VPADDSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDSWYrm, X86_INS_VPADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDSWYrr, X86_INS_VPADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDSWrm, X86_INS_VPADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDSWrr, X86_INS_VPADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDUSBYrm, X86_INS_VPADDUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDUSBYrr, X86_INS_VPADDUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDUSBrm, X86_INS_VPADDUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDUSBrr, X86_INS_VPADDUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDUSWYrm, X86_INS_VPADDUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDUSWYrr, X86_INS_VPADDUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDUSWrm, X86_INS_VPADDUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDUSWrr, X86_INS_VPADDUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWYrm, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWYrr, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ128rm, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ128rmk, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ128rmkz, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ128rr, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ128rrk, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ128rrkz, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ256rm, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ256rmk, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ256rmkz, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ256rr, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ256rrk, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZ256rrkz, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZrm, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZrmk, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZrmkz, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZrr, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZrrk, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWZrrkz, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWrm, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPADDWrr, X86_INS_VPADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPALIGNR128rm, X86_INS_VPALIGNR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPALIGNR128rr, X86_INS_VPALIGNR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPALIGNR256rm, X86_INS_VPALIGNR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPALIGNR256rr, X86_INS_VPALIGNR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ128rm, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ128rmb, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ128rmbk, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ128rmbkz, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ128rmk, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ128rmkz, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ128rr, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ128rrk, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ128rrkz, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ256rm, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ256rmb, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ256rmbk, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ256rmbkz, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ256rmk, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ256rmkz, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ256rr, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ256rrk, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZ256rrkz, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZrm, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZrmb, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZrmbk, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZrmbkz, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZrmk, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZrmkz, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZrr, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZrrk, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDDZrrkz, X86_INS_VPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ128rm, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ128rmb, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ128rmbk, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ128rmbkz, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ128rmk, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ128rmkz, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ128rr, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ128rrk, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ128rrkz, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ256rm, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ256rmb, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ256rmbk, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ256rmbkz, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ256rmk, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ256rmkz, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ256rr, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ256rrk, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZ256rrkz, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZrm, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZrmb, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZrmbk, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZrmbkz, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZrmk, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZrmkz, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZrr, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZrrk, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNDZrrkz, X86_INS_VPANDND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ128rm, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ128rmb, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ128rmbk, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ128rmbkz, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ128rmk, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ128rmkz, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ128rr, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ128rrk, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ128rrkz, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ256rm, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ256rmb, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ256rmbk, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ256rmbkz, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ256rmk, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ256rmkz, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ256rr, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ256rrk, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZ256rrkz, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZrm, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZrmb, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZrmbk, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZrmbkz, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZrmk, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZrmkz, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZrr, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZrrk, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNQZrrkz, X86_INS_VPANDNQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNYrm, X86_INS_VPANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNYrr, X86_INS_VPANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNrm, X86_INS_VPANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDNrr, X86_INS_VPANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ128rm, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ128rmb, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ128rmbk, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ128rmbkz, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ128rmk, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ128rmkz, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ128rr, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ128rrk, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ128rrkz, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ256rm, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ256rmb, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ256rmbk, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ256rmbkz, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ256rmk, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ256rmkz, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ256rr, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ256rrk, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZ256rrkz, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZrm, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZrmb, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZrmbk, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZrmbkz, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZrmk, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZrmkz, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZrr, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZrrk, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDQZrrkz, X86_INS_VPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDYrm, X86_INS_VPAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDYrr, X86_INS_VPAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDrm, X86_INS_VPAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPANDrr, X86_INS_VPAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPAVGBYrm, X86_INS_VPAVGB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPAVGBYrr, X86_INS_VPAVGB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPAVGBrm, X86_INS_VPAVGB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPAVGBrr, X86_INS_VPAVGB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPAVGWYrm, X86_INS_VPAVGW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPAVGWYrr, X86_INS_VPAVGW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPAVGWrm, X86_INS_VPAVGW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPAVGWrr, X86_INS_VPAVGW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDDYrmi, X86_INS_VPBLENDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDDYrri, X86_INS_VPBLENDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDDrmi, X86_INS_VPBLENDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDDrri, X86_INS_VPBLENDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ128rm, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ128rmk, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ128rmkz, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ128rr, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ128rrk, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ128rrkz, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ256rm, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ256rmk, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ256rmkz, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ256rr, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ256rrk, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZ256rrkz, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZrm, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZrmk, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZrmkz, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZrr, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZrrk, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMBZrrkz, X86_INS_VPBLENDMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ128rm, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ128rmb, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ128rmbk, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ128rmk, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ128rmkz, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ128rr, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ128rrk, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ128rrkz, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ256rm, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ256rmb, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ256rmbk, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ256rmk, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ256rmkz, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ256rr, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ256rrk, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZ256rrkz, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZrm, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZrmb, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZrmbk, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZrmk, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZrmkz, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZrr, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZrrk, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMDZrrkz, X86_INS_VPBLENDMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ128rm, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ128rmb, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ128rmbk, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ128rmk, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ128rmkz, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ128rr, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ128rrk, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ128rrkz, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ256rm, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ256rmb, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ256rmbk, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ256rmk, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ256rmkz, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ256rr, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ256rrk, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZ256rrkz, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZrm, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZrmb, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZrmbk, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZrmk, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZrmkz, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZrr, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZrrk, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMQZrrkz, X86_INS_VPBLENDMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ128rm, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ128rmk, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ128rmkz, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ128rr, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ128rrk, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ128rrkz, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ256rm, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ256rmk, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ256rmkz, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ256rr, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ256rrk, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZ256rrkz, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZrm, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZrmk, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZrmkz, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZrr, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZrrk, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDMWZrrkz, X86_INS_VPBLENDMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDVBYrm, X86_INS_VPBLENDVB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDVBYrr, X86_INS_VPBLENDVB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDVBrm, X86_INS_VPBLENDVB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDVBrr, X86_INS_VPBLENDVB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDWYrmi, X86_INS_VPBLENDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDWYrri, X86_INS_VPBLENDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDWrmi, X86_INS_VPBLENDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBLENDWrri, X86_INS_VPBLENDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBYrm, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBYrr, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrZ128r, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrZ128rk, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrZ128rkz, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrZ256r, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrZ256rk, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrZ256rkz, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrZr, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrZrk, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrZrkz, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrm, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTBrr, X86_INS_VPBROADCASTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDYrm, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDYrr, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDZkrm, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDZkrr, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDZrm, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDZrr, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrZ128r, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrZ128rk, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrZ128rkz, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrZ256r, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrZ256rk, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrZ256rkz, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrZr, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrZrk, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrZrkz, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrm, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTDrr, X86_INS_VPBROADCASTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTMB2QZ128rr, X86_INS_VPBROADCASTMB2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTMB2QZ256rr, X86_INS_VPBROADCASTMB2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTMB2QZrr, X86_INS_VPBROADCASTMB2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTMW2DZ128rr, X86_INS_VPBROADCASTMW2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTMW2DZ256rr, X86_INS_VPBROADCASTMW2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTMW2DZrr, X86_INS_VPBROADCASTMW2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQYrm, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQYrr, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQZkrm, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQZkrr, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQZrm, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQZrr, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrZ128r, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrZ128rk, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrZ128rkz, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrZ256r, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrZ256rk, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrZ256rkz, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrZr, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrZrk, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrZrkz, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrm, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTQrr, X86_INS_VPBROADCASTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWYrm, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWYrr, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrZ128r, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrZ128rk, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrZ128rkz, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrZ256r, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrZ256rk, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrZ256rkz, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrZr, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrZrk, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrZrkz, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrm, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPBROADCASTWrr, X86_INS_VPBROADCASTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCLMULQDQrm, X86_INS_VPCLMULQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_PCLMUL, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCLMULQDQrr, X86_INS_VPCLMULQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_PCLMUL, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMOVmr, X86_INS_VPCMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMOVmrY, X86_INS_VPCMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMOVrm, X86_INS_VPCMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMOVrmY, X86_INS_VPCMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMOVrr, X86_INS_VPCMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMOVrrY, X86_INS_VPCMOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ128rmi, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ128rmi_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ128rmik, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ128rmik_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ128rri, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ128rri_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ128rrik, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ128rrik_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ256rmi, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ256rmi_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ256rmik, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ256rmik_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ256rri, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ256rri_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ256rrik, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZ256rrik_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZrmi, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZrmi_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZrmik, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZrmik_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZrri, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZrri_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZrrik, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPBZrrik_alt, X86_INS_VPCMPB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rmi, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rmi_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rmib, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rmib_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rmibk, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rmibk_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rmik, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rmik_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rri, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rri_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rrik, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ128rrik_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rmi, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rmi_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rmib, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rmib_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rmibk, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rmibk_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rmik, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rmik_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rri, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rri_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rrik, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZ256rrik_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrmi, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrmi_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrmib, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrmib_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrmibk, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrmibk_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrmik, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrmik_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrri, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrri_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrrik, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPDZrrik_alt, X86_INS_VPCMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBYrm, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBYrr, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZ128rm, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZ128rmk, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZ128rr, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZ128rrk, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZ256rm, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZ256rmk, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZ256rr, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZ256rrk, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZrm, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZrmk, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZrr, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBZrrk, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBrm, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQBrr, X86_INS_VPCMPEQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDYrm, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDYrr, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ128rm, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ128rmb, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ128rmbk, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ128rmk, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ128rr, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ128rrk, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ256rm, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ256rmb, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ256rmbk, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ256rmk, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ256rr, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZ256rrk, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZrm, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZrmb, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZrmbk, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZrmk, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZrr, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDZrrk, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDrm, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQDrr, X86_INS_VPCMPEQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQYrm, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQYrr, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ128rm, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ128rmb, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ128rmbk, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ128rmk, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ128rr, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ128rrk, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ256rm, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ256rmb, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ256rmbk, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ256rmk, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ256rr, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZ256rrk, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZrm, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZrmb, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZrmbk, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZrmk, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZrr, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQZrrk, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQrm, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQQrr, X86_INS_VPCMPEQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWYrm, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWYrr, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZ128rm, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZ128rmk, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZ128rr, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZ128rrk, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZ256rm, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZ256rmk, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZ256rr, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZ256rrk, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZrm, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZrmk, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZrr, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWZrrk, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWrm, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPEQWrr, X86_INS_VPCMPEQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPESTRIrm, X86_INS_VPCMPESTRI,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPESTRIrr, X86_INS_VPCMPESTRI,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPESTRM128rm, X86_INS_VPCMPESTRM,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPESTRM128rr, X86_INS_VPCMPESTRM,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBYrm, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBYrr, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZ128rm, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZ128rmk, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZ128rr, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZ128rrk, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZ256rm, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZ256rmk, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZ256rr, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZ256rrk, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZrm, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZrmk, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZrr, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBZrrk, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBrm, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTBrr, X86_INS_VPCMPGTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDYrm, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDYrr, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ128rm, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ128rmb, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ128rmbk, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ128rmk, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ128rr, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ128rrk, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ256rm, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ256rmb, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ256rmbk, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ256rmk, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ256rr, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZ256rrk, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZrm, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZrmb, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZrmbk, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZrmk, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZrr, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDZrrk, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDrm, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTDrr, X86_INS_VPCMPGTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQYrm, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQYrr, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ128rm, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ128rmb, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ128rmbk, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ128rmk, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ128rr, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ128rrk, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ256rm, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ256rmb, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ256rmbk, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ256rmk, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ256rr, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZ256rrk, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZrm, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZrmb, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZrmbk, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZrmk, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZrr, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQZrrk, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQrm, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTQrr, X86_INS_VPCMPGTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWYrm, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWYrr, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZ128rm, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZ128rmk, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZ128rr, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZ128rrk, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZ256rm, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZ256rmk, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZ256rr, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZ256rrk, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZrm, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZrmk, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZrr, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWZrrk, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWrm, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPGTWrr, X86_INS_VPCMPGTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPISTRIrm, X86_INS_VPCMPISTRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPISTRIrr, X86_INS_VPCMPISTRI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPISTRM128rm, X86_INS_VPCMPISTRM,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPISTRM128rr, X86_INS_VPCMPISTRM,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rmi, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rmi_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rmib, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rmib_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rmibk, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rmibk_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rmik, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rmik_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rri, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rri_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rrik, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ128rrik_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rmi, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rmi_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rmib, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rmib_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rmibk, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rmibk_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rmik, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rmik_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rri, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rri_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rrik, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZ256rrik_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrmi, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrmi_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrmib, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrmib_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrmibk, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrmibk_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrmik, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrmik_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrri, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrri_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrrik, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPQZrrik_alt, X86_INS_VPCMPQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ128rmi, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ128rmi_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ128rmik, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ128rmik_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ128rri, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ128rri_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ128rrik, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ128rrik_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ256rmi, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ256rmi_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ256rmik, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ256rmik_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ256rri, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ256rri_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ256rrik, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZ256rrik_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZrmi, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZrmi_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZrmik, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZrmik_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZrri, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZrri_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZrrik, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUBZrrik_alt, X86_INS_VPCMPUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rmi, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rmi_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rmib, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rmib_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rmibk, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rmibk_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rmik, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rmik_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rri, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rri_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rrik, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ128rrik_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rmi, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rmi_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rmib, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rmib_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rmibk, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rmibk_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rmik, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rmik_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rri, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rri_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rrik, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZ256rrik_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrmi, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrmi_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrmib, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrmib_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrmibk, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrmibk_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrmik, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrmik_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrri, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrri_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrrik, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUDZrrik_alt, X86_INS_VPCMPUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rmi, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rmi_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rmib, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rmib_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rmibk, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rmibk_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rmik, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rmik_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rri, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rri_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rrik, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ128rrik_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rmi, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rmi_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rmib, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rmib_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rmibk, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rmibk_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rmik, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rmik_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rri, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rri_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rrik, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZ256rrik_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrmi, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrmi_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrmib, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrmib_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrmibk, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrmibk_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrmik, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrmik_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrri, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrri_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrrik, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUQZrrik_alt, X86_INS_VPCMPUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ128rmi, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ128rmi_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ128rmik, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ128rmik_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ128rri, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ128rri_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ128rrik, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ128rrik_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ256rmi, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ256rmi_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ256rmik, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ256rmik_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ256rri, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ256rri_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ256rrik, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZ256rrik_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZrmi, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZrmi_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZrmik, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZrmik_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZrri, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZrri_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZrrik, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPUWZrrik_alt, X86_INS_VPCMPUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ128rmi, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ128rmi_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ128rmik, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ128rmik_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ128rri, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ128rri_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ128rrik, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ128rrik_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ256rmi, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ256rmi_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ256rmik, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ256rmik_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ256rri, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ256rri_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ256rrik, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZ256rrik_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZrmi, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZrmi_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZrmik, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZrmik_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZrri, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZrri_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZrrik, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCMPWZrrik_alt, X86_INS_VPCMPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMBmi, X86_INS_VPCOMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMBmi_alt, X86_INS_VPCOMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMBri, X86_INS_VPCOMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMBri_alt, X86_INS_VPCOMB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMDmi, X86_INS_VPCOMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMDmi_alt, X86_INS_VPCOMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMDri, X86_INS_VPCOMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMDri_alt, X86_INS_VPCOMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSDZ128mrk, X86_INS_VPCOMPRESSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSDZ128rrk, X86_INS_VPCOMPRESSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSDZ128rrkz, X86_INS_VPCOMPRESSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSDZ256mrk, X86_INS_VPCOMPRESSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSDZ256rrk, X86_INS_VPCOMPRESSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSDZ256rrkz, X86_INS_VPCOMPRESSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSDZmrk, X86_INS_VPCOMPRESSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSDZrrk, X86_INS_VPCOMPRESSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSDZrrkz, X86_INS_VPCOMPRESSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSQZ128mrk, X86_INS_VPCOMPRESSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSQZ128rrk, X86_INS_VPCOMPRESSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSQZ128rrkz, X86_INS_VPCOMPRESSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSQZ256mrk, X86_INS_VPCOMPRESSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSQZ256rrk, X86_INS_VPCOMPRESSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSQZ256rrkz, X86_INS_VPCOMPRESSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSQZmrk, X86_INS_VPCOMPRESSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSQZrrk, X86_INS_VPCOMPRESSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMPRESSQZrrkz, X86_INS_VPCOMPRESSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMQmi, X86_INS_VPCOMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMQmi_alt, X86_INS_VPCOMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMQri, X86_INS_VPCOMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMQri_alt, X86_INS_VPCOMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUBmi, X86_INS_VPCOMUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUBmi_alt, X86_INS_VPCOMUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUBri, X86_INS_VPCOMUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUBri_alt, X86_INS_VPCOMUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUDmi, X86_INS_VPCOMUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUDmi_alt, X86_INS_VPCOMUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUDri, X86_INS_VPCOMUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUDri_alt, X86_INS_VPCOMUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUQmi, X86_INS_VPCOMUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUQmi_alt, X86_INS_VPCOMUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUQri, X86_INS_VPCOMUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUQri_alt, X86_INS_VPCOMUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUWmi, X86_INS_VPCOMUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUWmi_alt, X86_INS_VPCOMUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUWri, X86_INS_VPCOMUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMUWri_alt, X86_INS_VPCOMUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMWmi, X86_INS_VPCOMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMWmi_alt, X86_INS_VPCOMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMWri, X86_INS_VPCOMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCOMWri_alt, X86_INS_VPCOMW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTDrm, X86_INS_VPCONFLICTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTDrmb, X86_INS_VPCONFLICTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTDrmbk, X86_INS_VPCONFLICTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTDrmbkz, X86_INS_VPCONFLICTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTDrmk, X86_INS_VPCONFLICTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTDrmkz, X86_INS_VPCONFLICTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTDrr, X86_INS_VPCONFLICTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTDrrk, X86_INS_VPCONFLICTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTDrrkz, X86_INS_VPCONFLICTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTQrm, X86_INS_VPCONFLICTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTQrmb, X86_INS_VPCONFLICTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTQrmbk, X86_INS_VPCONFLICTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTQrmbkz, X86_INS_VPCONFLICTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTQrmk, X86_INS_VPCONFLICTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTQrmkz, X86_INS_VPCONFLICTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTQrr, X86_INS_VPCONFLICTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTQrrk, X86_INS_VPCONFLICTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPCONFLICTQrrkz, X86_INS_VPCONFLICTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERM2F128rm, X86_INS_VPERM2F128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERM2F128rr, X86_INS_VPERM2F128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERM2I128rm, X86_INS_VPERM2I128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERM2I128rr, X86_INS_VPERM2I128,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMDYrm, X86_INS_VPERMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMDYrr, X86_INS_VPERMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMDZrm, X86_INS_VPERMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMDZrr, X86_INS_VPERMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Drm, X86_INS_VPERMI2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Drmk, X86_INS_VPERMI2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Drmkz, X86_INS_VPERMI2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Drr, X86_INS_VPERMI2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Drrk, X86_INS_VPERMI2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Drrkz, X86_INS_VPERMI2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PDrm, X86_INS_VPERMI2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PDrmk, X86_INS_VPERMI2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PDrmkz, X86_INS_VPERMI2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PDrr, X86_INS_VPERMI2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PDrrk, X86_INS_VPERMI2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PDrrkz, X86_INS_VPERMI2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PSrm, X86_INS_VPERMI2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PSrmk, X86_INS_VPERMI2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PSrmkz, X86_INS_VPERMI2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PSrr, X86_INS_VPERMI2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PSrrk, X86_INS_VPERMI2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2PSrrkz, X86_INS_VPERMI2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Qrm, X86_INS_VPERMI2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Qrmk, X86_INS_VPERMI2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Qrmkz, X86_INS_VPERMI2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Qrr, X86_INS_VPERMI2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Qrrk, X86_INS_VPERMI2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMI2Qrrkz, X86_INS_VPERMI2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PDmr, X86_INS_VPERMIL2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PDmrY, X86_INS_VPERMIL2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PDrm, X86_INS_VPERMIL2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PDrmY, X86_INS_VPERMIL2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PDrr, X86_INS_VPERMIL2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PDrrY, X86_INS_VPERMIL2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PSmr, X86_INS_VPERMIL2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PSmrY, X86_INS_VPERMIL2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PSrm, X86_INS_VPERMIL2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PSrmY, X86_INS_VPERMIL2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PSrr, X86_INS_VPERMIL2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMIL2PSrrY, X86_INS_VPERMIL2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDYmi, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDYri, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDYrm, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDYrr, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDZmi, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDZri, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDZrm, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDZrr, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDmi, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDri, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDrm, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPDrr, X86_INS_VPERMILPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSYmi, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSYri, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSYrm, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSYrr, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSZmi, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSZri, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSZrm, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSZrr, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSmi, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSri, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSrm, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMILPSrr, X86_INS_VPERMILPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMPDYmi, X86_INS_VPERMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMPDYri, X86_INS_VPERMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMPDZmi, X86_INS_VPERMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMPDZri, X86_INS_VPERMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMPDZrm, X86_INS_VPERMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMPDZrr, X86_INS_VPERMPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMPSYrm, X86_INS_VPERMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMPSYrr, X86_INS_VPERMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMPSZrm, X86_INS_VPERMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMPSZrr, X86_INS_VPERMPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMQYmi, X86_INS_VPERMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMQYri, X86_INS_VPERMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMQZmi, X86_INS_VPERMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMQZri, X86_INS_VPERMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMQZrm, X86_INS_VPERMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMQZrr, X86_INS_VPERMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Drm, X86_INS_VPERMT2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Drmk, X86_INS_VPERMT2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Drmkz, X86_INS_VPERMT2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Drr, X86_INS_VPERMT2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Drrk, X86_INS_VPERMT2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Drrkz, X86_INS_VPERMT2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PDrm, X86_INS_VPERMT2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PDrmk, X86_INS_VPERMT2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PDrmkz, X86_INS_VPERMT2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PDrr, X86_INS_VPERMT2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PDrrk, X86_INS_VPERMT2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PDrrkz, X86_INS_VPERMT2PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PSrm, X86_INS_VPERMT2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PSrmk, X86_INS_VPERMT2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PSrmkz, X86_INS_VPERMT2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PSrr, X86_INS_VPERMT2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PSrrk, X86_INS_VPERMT2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2PSrrkz, X86_INS_VPERMT2PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Qrm, X86_INS_VPERMT2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Qrmk, X86_INS_VPERMT2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Qrmkz, X86_INS_VPERMT2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Qrr, X86_INS_VPERMT2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Qrrk, X86_INS_VPERMT2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPERMT2Qrrkz, X86_INS_VPERMT2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZ128rmk, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZ128rmkz, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZ128rrk, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZ128rrkz, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZ256rmk, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZ256rmkz, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZ256rrk, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZ256rrkz, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZrmk, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZrmkz, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZrrk, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDDZrrkz, X86_INS_VPEXPANDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZ128rmk, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZ128rmkz, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZ128rrk, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZ128rrkz, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZ256rmk, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZ256rmkz, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZ256rrk, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZ256rrkz, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZrmk, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZrmkz, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZrrk, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXPANDQZrrkz, X86_INS_VPEXPANDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXTRBmr, X86_INS_VPEXTRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXTRBrr, X86_INS_VPEXTRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXTRDmr, X86_INS_VPEXTRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXTRDrr, X86_INS_VPEXTRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXTRQmr, X86_INS_VPEXTRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXTRQrr, X86_INS_VPEXTRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXTRWmr, X86_INS_VPEXTRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXTRWri, X86_INS_VPEXTRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPEXTRWrr_REV, X86_INS_VPEXTRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERDDYrm, X86_INS_VPGATHERDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERDDZrm, X86_INS_VPGATHERDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERDDrm, X86_INS_VPGATHERDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERDQYrm, X86_INS_VPGATHERDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERDQZrm, X86_INS_VPGATHERDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERDQrm, X86_INS_VPGATHERDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERQDYrm, X86_INS_VPGATHERQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERQDZrm, X86_INS_VPGATHERQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERQDrm, X86_INS_VPGATHERQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERQQYrm, X86_INS_VPGATHERQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERQQZrm, X86_INS_VPGATHERQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPGATHERQQrm, X86_INS_VPGATHERQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDBDrm, X86_INS_VPHADDBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDBDrr, X86_INS_VPHADDBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDBQrm, X86_INS_VPHADDBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDBQrr, X86_INS_VPHADDBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDBWrm, X86_INS_VPHADDBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDBWrr, X86_INS_VPHADDBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDDQrm, X86_INS_VPHADDDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDDQrr, X86_INS_VPHADDDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDDYrm, X86_INS_VPHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDDYrr, X86_INS_VPHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDDrm, X86_INS_VPHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDDrr, X86_INS_VPHADDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDSWrm128, X86_INS_VPHADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDSWrm256, X86_INS_VPHADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDSWrr128, X86_INS_VPHADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDSWrr256, X86_INS_VPHADDSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUBDrm, X86_INS_VPHADDUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUBDrr, X86_INS_VPHADDUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUBQrm, X86_INS_VPHADDUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUBQrr, X86_INS_VPHADDUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUBWrm, X86_INS_VPHADDUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUBWrr, X86_INS_VPHADDUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUDQrm, X86_INS_VPHADDUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUDQrr, X86_INS_VPHADDUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUWDrm, X86_INS_VPHADDUWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUWDrr, X86_INS_VPHADDUWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUWQrm, X86_INS_VPHADDUWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDUWQrr, X86_INS_VPHADDUWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDWDrm, X86_INS_VPHADDWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDWDrr, X86_INS_VPHADDWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDWQrm, X86_INS_VPHADDWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDWQrr, X86_INS_VPHADDWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDWYrm, X86_INS_VPHADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDWYrr, X86_INS_VPHADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDWrm, X86_INS_VPHADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHADDWrr, X86_INS_VPHADDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHMINPOSUWrm128, X86_INS_VPHMINPOSUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHMINPOSUWrr128, X86_INS_VPHMINPOSUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBBWrm, X86_INS_VPHSUBBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBBWrr, X86_INS_VPHSUBBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBDQrm, X86_INS_VPHSUBDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBDQrr, X86_INS_VPHSUBDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBDYrm, X86_INS_VPHSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBDYrr, X86_INS_VPHSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBDrm, X86_INS_VPHSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBDrr, X86_INS_VPHSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBSWrm128, X86_INS_VPHSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBSWrm256, X86_INS_VPHSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBSWrr128, X86_INS_VPHSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBSWrr256, X86_INS_VPHSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBWDrm, X86_INS_VPHSUBWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBWDrr, X86_INS_VPHSUBWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBWYrm, X86_INS_VPHSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBWYrr, X86_INS_VPHSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBWrm, X86_INS_VPHSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPHSUBWrr, X86_INS_VPHSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPINSRBrm, X86_INS_VPINSRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPINSRBrr, X86_INS_VPINSRB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPINSRDrm, X86_INS_VPINSRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPINSRDrr, X86_INS_VPINSRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPINSRQrm, X86_INS_VPINSRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPINSRQrr, X86_INS_VPINSRQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPINSRWrmi, X86_INS_VPINSRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPINSRWrri, X86_INS_VPINSRW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTDrm, X86_INS_VPLZCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTDrmb, X86_INS_VPLZCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTDrmbk, X86_INS_VPLZCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTDrmbkz, X86_INS_VPLZCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTDrmk, X86_INS_VPLZCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTDrmkz, X86_INS_VPLZCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTDrr, X86_INS_VPLZCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTDrrk, X86_INS_VPLZCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTDrrkz, X86_INS_VPLZCNTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTQrm, X86_INS_VPLZCNTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTQrmb, X86_INS_VPLZCNTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTQrmbk, X86_INS_VPLZCNTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTQrmbkz, X86_INS_VPLZCNTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTQrmk, X86_INS_VPLZCNTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTQrmkz, X86_INS_VPLZCNTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTQrr, X86_INS_VPLZCNTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTQrrk, X86_INS_VPLZCNTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPLZCNTQrrkz, X86_INS_VPLZCNTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSDDrm, X86_INS_VPMACSDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSDDrr, X86_INS_VPMACSDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSDQHrm, X86_INS_VPMACSDQH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSDQHrr, X86_INS_VPMACSDQH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSDQLrm, X86_INS_VPMACSDQL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSDQLrr, X86_INS_VPMACSDQL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSSDDrm, X86_INS_VPMACSSDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSSDDrr, X86_INS_VPMACSSDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSSDQHrm, X86_INS_VPMACSSDQH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSSDQHrr, X86_INS_VPMACSSDQH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSSDQLrm, X86_INS_VPMACSSDQL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSSDQLrr, X86_INS_VPMACSSDQL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSSWDrm, X86_INS_VPMACSSWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSSWDrr, X86_INS_VPMACSSWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSSWWrm, X86_INS_VPMACSSWW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSSWWrr, X86_INS_VPMACSSWW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSWDrm, X86_INS_VPMACSWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSWDrr, X86_INS_VPMACSWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSWWrm, X86_INS_VPMACSWW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMACSWWrr, X86_INS_VPMACSWW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADCSSWDrm, X86_INS_VPMADCSSWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADCSSWDrr, X86_INS_VPMADCSSWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADCSWDrm, X86_INS_VPMADCSWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADCSWDrr, X86_INS_VPMADCSWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADDUBSWrm128, X86_INS_VPMADDUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADDUBSWrm256, X86_INS_VPMADDUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADDUBSWrr128, X86_INS_VPMADDUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADDUBSWrr256, X86_INS_VPMADDUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADDWDYrm, X86_INS_VPMADDWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADDWDYrr, X86_INS_VPMADDWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADDWDrm, X86_INS_VPMADDWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMADDWDrr, X86_INS_VPMADDWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMASKMOVDYmr, X86_INS_VPMASKMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMASKMOVDYrm, X86_INS_VPMASKMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMASKMOVDmr, X86_INS_VPMASKMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMASKMOVDrm, X86_INS_VPMASKMOVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMASKMOVQYmr, X86_INS_VPMASKMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMASKMOVQYrm, X86_INS_VPMASKMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMASKMOVQmr, X86_INS_VPMASKMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMASKMOVQrm, X86_INS_VPMASKMOVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBYrm, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBYrr, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ128rm, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ128rmk, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ128rmkz, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ128rr, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ128rrk, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ128rrkz, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ256rm, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ256rmk, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ256rmkz, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ256rr, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ256rrk, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZ256rrkz, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZrm, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZrmk, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZrmkz, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZrr, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZrrk, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBZrrkz, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBrm, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSBrr, X86_INS_VPMAXSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDYrm, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDYrr, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ128rm, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ128rmb, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ128rmbk, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ128rmbkz, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ128rmk, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ128rmkz, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ128rr, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ128rrk, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ128rrkz, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ256rm, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ256rmb, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ256rmbk, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ256rmbkz, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ256rmk, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ256rmkz, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ256rr, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ256rrk, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZ256rrkz, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZrm, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZrmb, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZrmbk, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZrmbkz, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZrmk, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZrmkz, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZrr, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZrrk, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDZrrkz, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDrm, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSDrr, X86_INS_VPMAXSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ128rm, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ128rmb, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ128rmbk, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ128rmbkz, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ128rmk, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ128rmkz, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ128rr, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ128rrk, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ128rrkz, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ256rm, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ256rmb, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ256rmbk, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ256rmbkz, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ256rmk, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ256rmkz, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ256rr, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ256rrk, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZ256rrkz, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZrm, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZrmb, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZrmbk, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZrmbkz, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZrmk, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZrmkz, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZrr, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZrrk, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSQZrrkz, X86_INS_VPMAXSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWYrm, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWYrr, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ128rm, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ128rmk, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ128rmkz, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ128rr, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ128rrk, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ128rrkz, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ256rm, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ256rmk, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ256rmkz, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ256rr, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ256rrk, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZ256rrkz, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZrm, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZrmk, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZrmkz, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZrr, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZrrk, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWZrrkz, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWrm, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXSWrr, X86_INS_VPMAXSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBYrm, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBYrr, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ128rm, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ128rmk, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ128rmkz, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ128rr, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ128rrk, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ128rrkz, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ256rm, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ256rmk, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ256rmkz, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ256rr, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ256rrk, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZ256rrkz, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZrm, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZrmk, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZrmkz, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZrr, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZrrk, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBZrrkz, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBrm, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUBrr, X86_INS_VPMAXUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDYrm, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDYrr, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ128rm, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ128rmb, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ128rmbk, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ128rmbkz, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ128rmk, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ128rmkz, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ128rr, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ128rrk, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ128rrkz, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ256rm, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ256rmb, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ256rmbk, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ256rmbkz, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ256rmk, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ256rmkz, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ256rr, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ256rrk, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZ256rrkz, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZrm, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZrmb, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZrmbk, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZrmbkz, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZrmk, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZrmkz, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZrr, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZrrk, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDZrrkz, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDrm, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUDrr, X86_INS_VPMAXUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ128rm, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ128rmb, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ128rmbk, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ128rmbkz, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ128rmk, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ128rmkz, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ128rr, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ128rrk, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ128rrkz, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ256rm, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ256rmb, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ256rmbk, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ256rmbkz, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ256rmk, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ256rmkz, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ256rr, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ256rrk, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZ256rrkz, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZrm, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZrmb, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZrmbk, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZrmbkz, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZrmk, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZrmkz, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZrr, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZrrk, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUQZrrkz, X86_INS_VPMAXUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWYrm, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWYrr, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ128rm, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ128rmk, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ128rmkz, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ128rr, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ128rrk, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ128rrkz, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ256rm, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ256rmk, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ256rmkz, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ256rr, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ256rrk, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZ256rrkz, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZrm, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZrmk, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZrmkz, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZrr, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZrrk, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWZrrkz, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWrm, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMAXUWrr, X86_INS_VPMAXUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBYrm, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBYrr, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ128rm, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ128rmk, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ128rmkz, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ128rr, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ128rrk, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ128rrkz, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ256rm, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ256rmk, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ256rmkz, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ256rr, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ256rrk, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZ256rrkz, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZrm, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZrmk, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZrmkz, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZrr, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZrrk, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBZrrkz, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBrm, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSBrr, X86_INS_VPMINSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDYrm, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDYrr, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ128rm, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ128rmb, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ128rmbk, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ128rmbkz, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ128rmk, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ128rmkz, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ128rr, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ128rrk, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ128rrkz, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ256rm, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ256rmb, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ256rmbk, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ256rmbkz, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ256rmk, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ256rmkz, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ256rr, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ256rrk, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZ256rrkz, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZrm, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZrmb, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZrmbk, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZrmbkz, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZrmk, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZrmkz, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZrr, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZrrk, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDZrrkz, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDrm, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSDrr, X86_INS_VPMINSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ128rm, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ128rmb, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ128rmbk, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ128rmbkz, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ128rmk, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ128rmkz, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ128rr, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ128rrk, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ128rrkz, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ256rm, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ256rmb, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ256rmbk, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ256rmbkz, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ256rmk, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ256rmkz, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ256rr, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ256rrk, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZ256rrkz, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZrm, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZrmb, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZrmbk, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZrmbkz, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZrmk, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZrmkz, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZrr, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZrrk, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSQZrrkz, X86_INS_VPMINSQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWYrm, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWYrr, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ128rm, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ128rmk, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ128rmkz, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ128rr, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ128rrk, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ128rrkz, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ256rm, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ256rmk, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ256rmkz, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ256rr, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ256rrk, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZ256rrkz, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZrm, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZrmk, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZrmkz, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZrr, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZrrk, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWZrrkz, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWrm, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINSWrr, X86_INS_VPMINSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBYrm, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBYrr, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ128rm, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ128rmk, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ128rmkz, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ128rr, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ128rrk, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ128rrkz, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ256rm, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ256rmk, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ256rmkz, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ256rr, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ256rrk, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZ256rrkz, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZrm, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZrmk, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZrmkz, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZrr, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZrrk, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBZrrkz, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBrm, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUBrr, X86_INS_VPMINUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDYrm, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDYrr, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ128rm, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ128rmb, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ128rmbk, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ128rmbkz, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ128rmk, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ128rmkz, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ128rr, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ128rrk, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ128rrkz, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ256rm, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ256rmb, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ256rmbk, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ256rmbkz, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ256rmk, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ256rmkz, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ256rr, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ256rrk, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZ256rrkz, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZrm, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZrmb, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZrmbk, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZrmbkz, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZrmk, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZrmkz, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZrr, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZrrk, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDZrrkz, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDrm, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUDrr, X86_INS_VPMINUD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ128rm, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ128rmb, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ128rmbk, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ128rmbkz, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ128rmk, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ128rmkz, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ128rr, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ128rrk, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ128rrkz, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ256rm, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ256rmb, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ256rmbk, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ256rmbkz, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ256rmk, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ256rmkz, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ256rr, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ256rrk, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZ256rrkz, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZrm, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZrmb, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZrmbk, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZrmbkz, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZrmk, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZrmkz, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZrr, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZrrk, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUQZrrkz, X86_INS_VPMINUQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWYrm, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWYrr, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ128rm, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ128rmk, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ128rmkz, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ128rr, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ128rrk, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ128rrkz, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ256rm, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ256rmk, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ256rmkz, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ256rr, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ256rrk, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZ256rrkz, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZrm, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZrmk, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZrmkz, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZrr, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZrrk, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWZrrkz, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWrm, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMINUWrr, X86_INS_VPMINUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVDBmr, X86_INS_VPMOVDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVDBmrk, X86_INS_VPMOVDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVDBrr, X86_INS_VPMOVDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVDBrrk, X86_INS_VPMOVDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVDBrrkz, X86_INS_VPMOVDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVDWmr, X86_INS_VPMOVDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVDWmrk, X86_INS_VPMOVDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVDWrr, X86_INS_VPMOVDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVDWrrk, X86_INS_VPMOVDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVDWrrkz, X86_INS_VPMOVDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2BZ128rr, X86_INS_VPMOVM2B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2BZ256rr, X86_INS_VPMOVM2B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2BZrr, X86_INS_VPMOVM2B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2DZ128rr, X86_INS_VPMOVM2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2DZ256rr, X86_INS_VPMOVM2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2DZrr, X86_INS_VPMOVM2D,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2QZ128rr, X86_INS_VPMOVM2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2QZ256rr, X86_INS_VPMOVM2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2QZrr, X86_INS_VPMOVM2Q,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2WZ128rr, X86_INS_VPMOVM2W,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2WZ256rr, X86_INS_VPMOVM2W,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVM2WZrr, X86_INS_VPMOVM2W,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVMSKBYrr, X86_INS_VPMOVMSKB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVMSKBrr, X86_INS_VPMOVMSKB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQBmr, X86_INS_VPMOVQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQBmrk, X86_INS_VPMOVQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQBrr, X86_INS_VPMOVQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQBrrk, X86_INS_VPMOVQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQBrrkz, X86_INS_VPMOVQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQDmr, X86_INS_VPMOVQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQDmrk, X86_INS_VPMOVQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQDrr, X86_INS_VPMOVQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQDrrk, X86_INS_VPMOVQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQDrrkz, X86_INS_VPMOVQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQWmr, X86_INS_VPMOVQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQWmrk, X86_INS_VPMOVQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQWrr, X86_INS_VPMOVQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQWrrk, X86_INS_VPMOVQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVQWrrkz, X86_INS_VPMOVQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSDBmr, X86_INS_VPMOVSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSDBmrk, X86_INS_VPMOVSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSDBrr, X86_INS_VPMOVSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSDBrrk, X86_INS_VPMOVSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSDBrrkz, X86_INS_VPMOVSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSDWmr, X86_INS_VPMOVSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSDWmrk, X86_INS_VPMOVSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSDWrr, X86_INS_VPMOVSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSDWrrk, X86_INS_VPMOVSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSDWrrkz, X86_INS_VPMOVSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQBmr, X86_INS_VPMOVSQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQBmrk, X86_INS_VPMOVSQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQBrr, X86_INS_VPMOVSQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQBrrk, X86_INS_VPMOVSQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQBrrkz, X86_INS_VPMOVSQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQDmr, X86_INS_VPMOVSQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQDmrk, X86_INS_VPMOVSQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQDrr, X86_INS_VPMOVSQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQDrrk, X86_INS_VPMOVSQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQDrrkz, X86_INS_VPMOVSQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQWmr, X86_INS_VPMOVSQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQWmrk, X86_INS_VPMOVSQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQWrr, X86_INS_VPMOVSQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQWrrk, X86_INS_VPMOVSQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSQWrrkz, X86_INS_VPMOVSQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBDYrm, X86_INS_VPMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBDYrr, X86_INS_VPMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBDZrm, X86_INS_VPMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBDZrmk, X86_INS_VPMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBDZrmkz, X86_INS_VPMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBDZrr, X86_INS_VPMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBDZrrk, X86_INS_VPMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBDZrrkz, X86_INS_VPMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBDrm, X86_INS_VPMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBDrr, X86_INS_VPMOVSXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBQYrm, X86_INS_VPMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBQYrr, X86_INS_VPMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBQZrm, X86_INS_VPMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBQZrmk, X86_INS_VPMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBQZrmkz, X86_INS_VPMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBQZrr, X86_INS_VPMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBQZrrk, X86_INS_VPMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBQZrrkz, X86_INS_VPMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBQrm, X86_INS_VPMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBQrr, X86_INS_VPMOVSXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBWYrm, X86_INS_VPMOVSXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBWYrr, X86_INS_VPMOVSXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBWrm, X86_INS_VPMOVSXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXBWrr, X86_INS_VPMOVSXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXDQYrm, X86_INS_VPMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXDQYrr, X86_INS_VPMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXDQZrm, X86_INS_VPMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXDQZrmk, X86_INS_VPMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXDQZrmkz, X86_INS_VPMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXDQZrr, X86_INS_VPMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXDQZrrk, X86_INS_VPMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXDQZrrkz, X86_INS_VPMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXDQrm, X86_INS_VPMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXDQrr, X86_INS_VPMOVSXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWDYrm, X86_INS_VPMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWDYrr, X86_INS_VPMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWDZrm, X86_INS_VPMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWDZrmk, X86_INS_VPMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWDZrmkz, X86_INS_VPMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWDZrr, X86_INS_VPMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWDZrrk, X86_INS_VPMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWDZrrkz, X86_INS_VPMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWDrm, X86_INS_VPMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWDrr, X86_INS_VPMOVSXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWQYrm, X86_INS_VPMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWQYrr, X86_INS_VPMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWQZrm, X86_INS_VPMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWQZrmk, X86_INS_VPMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWQZrmkz, X86_INS_VPMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWQZrr, X86_INS_VPMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWQZrrk, X86_INS_VPMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWQZrrkz, X86_INS_VPMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWQrm, X86_INS_VPMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVSXWQrr, X86_INS_VPMOVSXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSDBmr, X86_INS_VPMOVUSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSDBmrk, X86_INS_VPMOVUSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSDBrr, X86_INS_VPMOVUSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSDBrrk, X86_INS_VPMOVUSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSDBrrkz, X86_INS_VPMOVUSDB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSDWmr, X86_INS_VPMOVUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSDWmrk, X86_INS_VPMOVUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSDWrr, X86_INS_VPMOVUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSDWrrk, X86_INS_VPMOVUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSDWrrkz, X86_INS_VPMOVUSDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQBmr, X86_INS_VPMOVUSQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQBmrk, X86_INS_VPMOVUSQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQBrr, X86_INS_VPMOVUSQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQBrrk, X86_INS_VPMOVUSQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQBrrkz, X86_INS_VPMOVUSQB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQDmr, X86_INS_VPMOVUSQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQDmrk, X86_INS_VPMOVUSQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQDrr, X86_INS_VPMOVUSQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQDrrk, X86_INS_VPMOVUSQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQDrrkz, X86_INS_VPMOVUSQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQWmr, X86_INS_VPMOVUSQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQWmrk, X86_INS_VPMOVUSQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQWrr, X86_INS_VPMOVUSQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQWrrk, X86_INS_VPMOVUSQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVUSQWrrkz, X86_INS_VPMOVUSQW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBDYrm, X86_INS_VPMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBDYrr, X86_INS_VPMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBDZrm, X86_INS_VPMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBDZrmk, X86_INS_VPMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBDZrmkz, X86_INS_VPMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBDZrr, X86_INS_VPMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBDZrrk, X86_INS_VPMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBDZrrkz, X86_INS_VPMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBDrm, X86_INS_VPMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBDrr, X86_INS_VPMOVZXBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBQYrm, X86_INS_VPMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBQYrr, X86_INS_VPMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBQZrm, X86_INS_VPMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBQZrmk, X86_INS_VPMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBQZrmkz, X86_INS_VPMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBQZrr, X86_INS_VPMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBQZrrk, X86_INS_VPMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBQZrrkz, X86_INS_VPMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBQrm, X86_INS_VPMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBQrr, X86_INS_VPMOVZXBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBWYrm, X86_INS_VPMOVZXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBWYrr, X86_INS_VPMOVZXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBWrm, X86_INS_VPMOVZXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXBWrr, X86_INS_VPMOVZXBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXDQYrm, X86_INS_VPMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXDQYrr, X86_INS_VPMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXDQZrm, X86_INS_VPMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXDQZrmk, X86_INS_VPMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXDQZrmkz, X86_INS_VPMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXDQZrr, X86_INS_VPMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXDQZrrk, X86_INS_VPMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXDQZrrkz, X86_INS_VPMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXDQrm, X86_INS_VPMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXDQrr, X86_INS_VPMOVZXDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWDYrm, X86_INS_VPMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWDYrr, X86_INS_VPMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWDZrm, X86_INS_VPMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWDZrmk, X86_INS_VPMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWDZrmkz, X86_INS_VPMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWDZrr, X86_INS_VPMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWDZrrk, X86_INS_VPMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWDZrrkz, X86_INS_VPMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWDrm, X86_INS_VPMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWDrr, X86_INS_VPMOVZXWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWQYrm, X86_INS_VPMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWQYrr, X86_INS_VPMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWQZrm, X86_INS_VPMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWQZrmk, X86_INS_VPMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWQZrmkz, X86_INS_VPMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWQZrr, X86_INS_VPMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWQZrrk, X86_INS_VPMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWQZrrkz, X86_INS_VPMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWQrm, X86_INS_VPMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMOVZXWQrr, X86_INS_VPMOVZXWQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQYrm, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQYrr, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQZrm, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQZrmb, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQZrmbk, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQZrmbkz, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQZrmk, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQZrmkz, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQZrr, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQZrrk, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQZrrkz, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQrm, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULDQrr, X86_INS_VPMULDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHRSWrm128, X86_INS_VPMULHRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHRSWrm256, X86_INS_VPMULHRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHRSWrr128, X86_INS_VPMULHRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHRSWrr256, X86_INS_VPMULHRSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHUWYrm, X86_INS_VPMULHUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHUWYrr, X86_INS_VPMULHUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHUWrm, X86_INS_VPMULHUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHUWrr, X86_INS_VPMULHUW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHWYrm, X86_INS_VPMULHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHWYrr, X86_INS_VPMULHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHWrm, X86_INS_VPMULHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULHWrr, X86_INS_VPMULHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDYrm, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDYrr, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ128rm, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ128rmb, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ128rmbk, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ128rmbkz, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ128rmk, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ128rmkz, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ128rr, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ128rrk, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ128rrkz, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ256rm, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ256rmb, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ256rmbk, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ256rmbkz, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ256rmk, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ256rmkz, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ256rr, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ256rrk, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZ256rrkz, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZrm, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZrmb, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZrmbk, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZrmbkz, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZrmk, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZrmkz, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZrr, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZrrk, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDZrrkz, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDrm, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLDrr, X86_INS_VPMULLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ128rm, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ128rmb, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ128rmbk, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ128rmbkz, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ128rmk, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ128rmkz, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ128rr, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ128rrk, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ128rrkz, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ256rm, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ256rmb, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ256rmbk, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ256rmbkz, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ256rmk, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ256rmkz, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ256rr, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ256rrk, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZ256rrkz, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZrm, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZrmb, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZrmbk, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZrmbkz, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZrmk, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZrmkz, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZrr, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZrrk, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLQZrrkz, X86_INS_VPMULLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWYrm, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWYrr, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ128rm, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ128rmk, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ128rmkz, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ128rr, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ128rrk, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ128rrkz, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ256rm, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ256rmk, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ256rmkz, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ256rr, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ256rrk, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZ256rrkz, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZrm, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZrmk, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZrmkz, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZrr, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZrrk, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWZrrkz, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWrm, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULLWrr, X86_INS_VPMULLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQYrm, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQYrr, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQZrm, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQZrmb, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQZrmbk, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQZrmbkz, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQZrmk, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQZrmkz, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQZrr, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQZrrk, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQZrrkz, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQrm, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPMULUDQrr, X86_INS_VPMULUDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ128rm, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ128rmb, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ128rmbk, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ128rmbkz, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ128rmk, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ128rmkz, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ128rr, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ128rrk, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ128rrkz, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ256rm, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ256rmb, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ256rmbk, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ256rmbkz, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ256rmk, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ256rmkz, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ256rr, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ256rrk, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZ256rrkz, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZrm, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZrmb, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZrmbk, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZrmbkz, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZrmk, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZrmkz, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZrr, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZrrk, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORDZrrkz, X86_INS_VPORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ128rm, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ128rmb, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ128rmbk, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ128rmbkz, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ128rmk, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ128rmkz, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ128rr, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ128rrk, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ128rrkz, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ256rm, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ256rmb, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ256rmbk, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ256rmbkz, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ256rmk, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ256rmkz, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ256rr, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ256rrk, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZ256rrkz, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZrm, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZrmb, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZrmbk, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZrmbkz, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZrmk, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZrmkz, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZrr, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZrrk, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORQZrrkz, X86_INS_VPORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORYrm, X86_INS_VPOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORYrr, X86_INS_VPOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORrm, X86_INS_VPOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPORrr, X86_INS_VPOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPPERMmr, X86_INS_VPPERM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPPERMrm, X86_INS_VPPERM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPPERMrr, X86_INS_VPPERM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTBmi, X86_INS_VPROTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTBmr, X86_INS_VPROTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTBri, X86_INS_VPROTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTBrm, X86_INS_VPROTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTBrr, X86_INS_VPROTB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTDmi, X86_INS_VPROTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTDmr, X86_INS_VPROTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTDri, X86_INS_VPROTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTDrm, X86_INS_VPROTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTDrr, X86_INS_VPROTD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTQmi, X86_INS_VPROTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTQmr, X86_INS_VPROTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTQri, X86_INS_VPROTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTQrm, X86_INS_VPROTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTQrr, X86_INS_VPROTQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTWmi, X86_INS_VPROTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTWmr, X86_INS_VPROTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTWri, X86_INS_VPROTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTWrm, X86_INS_VPROTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPROTWrr, X86_INS_VPROTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSADBWYrm, X86_INS_VPSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSADBWYrr, X86_INS_VPSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSADBWrm, X86_INS_VPSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSADBWrr, X86_INS_VPSADBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSCATTERDDZmr, X86_INS_VPSCATTERDD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSCATTERDQZmr, X86_INS_VPSCATTERDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSCATTERQDZmr, X86_INS_VPSCATTERQD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSCATTERQQZmr, X86_INS_VPSCATTERQQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHABmr, X86_INS_VPSHAB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHABrm, X86_INS_VPSHAB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHABrr, X86_INS_VPSHAB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHADmr, X86_INS_VPSHAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHADrm, X86_INS_VPSHAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHADrr, X86_INS_VPSHAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHAQmr, X86_INS_VPSHAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHAQrm, X86_INS_VPSHAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHAQrr, X86_INS_VPSHAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHAWmr, X86_INS_VPSHAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHAWrm, X86_INS_VPSHAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHAWrr, X86_INS_VPSHAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLBmr, X86_INS_VPSHLB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLBrm, X86_INS_VPSHLB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLBrr, X86_INS_VPSHLB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLDmr, X86_INS_VPSHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLDrm, X86_INS_VPSHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLDrr, X86_INS_VPSHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLQmr, X86_INS_VPSHLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLQrm, X86_INS_VPSHLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLQrr, X86_INS_VPSHLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLWmr, X86_INS_VPSHLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLWrm, X86_INS_VPSHLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHLWrr, X86_INS_VPSHLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFBYrm, X86_INS_VPSHUFB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFBYrr, X86_INS_VPSHUFB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFBrm, X86_INS_VPSHUFB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFBrr, X86_INS_VPSHUFB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFDYmi, X86_INS_VPSHUFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFDYri, X86_INS_VPSHUFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFDZmi, X86_INS_VPSHUFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFDZri, X86_INS_VPSHUFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFDmi, X86_INS_VPSHUFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFDri, X86_INS_VPSHUFD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFHWYmi, X86_INS_VPSHUFHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFHWYri, X86_INS_VPSHUFHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFHWmi, X86_INS_VPSHUFHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFHWri, X86_INS_VPSHUFHW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFLWYmi, X86_INS_VPSHUFLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFLWYri, X86_INS_VPSHUFLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFLWmi, X86_INS_VPSHUFLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSHUFLWri, X86_INS_VPSHUFLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNBYrm, X86_INS_VPSIGNB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNBYrr, X86_INS_VPSIGNB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNBrm, X86_INS_VPSIGNB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNBrr, X86_INS_VPSIGNB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNDYrm, X86_INS_VPSIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNDYrr, X86_INS_VPSIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNDrm, X86_INS_VPSIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNDrr, X86_INS_VPSIGND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNWYrm, X86_INS_VPSIGNW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNWYrr, X86_INS_VPSIGNW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNWrm, X86_INS_VPSIGNW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSIGNWrr, X86_INS_VPSIGNW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDQYri, X86_INS_VPSLLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDQri, X86_INS_VPSLLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDYri, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDYrm, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDYrr, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZmi, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZmik, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZmikz, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZri, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZrik, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZrikz, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZrm, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZrmk, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZrmkz, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZrr, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZrrk, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDZrrkz, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDri, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDrm, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLDrr, X86_INS_VPSLLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQYri, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQYrm, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQYrr, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZmi, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZmik, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZmikz, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZri, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZrik, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZrikz, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZrm, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZrmk, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZrmkz, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZrr, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZrrk, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQZrrkz, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQri, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQrm, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLQrr, X86_INS_VPSLLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVDYrm, X86_INS_VPSLLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVDYrr, X86_INS_VPSLLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVDZrm, X86_INS_VPSLLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVDZrmk, X86_INS_VPSLLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVDZrmkz, X86_INS_VPSLLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVDZrr, X86_INS_VPSLLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVDZrrk, X86_INS_VPSLLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVDZrrkz, X86_INS_VPSLLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVDrm, X86_INS_VPSLLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVDrr, X86_INS_VPSLLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVQYrm, X86_INS_VPSLLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVQYrr, X86_INS_VPSLLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVQZrm, X86_INS_VPSLLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVQZrmk, X86_INS_VPSLLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVQZrmkz, X86_INS_VPSLLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVQZrr, X86_INS_VPSLLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVQZrrk, X86_INS_VPSLLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVQZrrkz, X86_INS_VPSLLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVQrm, X86_INS_VPSLLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLVQrr, X86_INS_VPSLLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLWYri, X86_INS_VPSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLWYrm, X86_INS_VPSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLWYrr, X86_INS_VPSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLWri, X86_INS_VPSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLWrm, X86_INS_VPSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSLLWrr, X86_INS_VPSLLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADYri, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADYrm, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADYrr, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZmi, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZmik, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZmikz, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZri, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZrik, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZrikz, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZrm, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZrmk, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZrmkz, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZrr, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZrrk, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADZrrkz, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADri, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADrm, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRADrr, X86_INS_VPSRAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZmi, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZmik, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZmikz, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZri, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZrik, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZrikz, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZrm, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZrmk, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZrmkz, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZrr, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZrrk, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAQZrrkz, X86_INS_VPSRAQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVDYrm, X86_INS_VPSRAVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVDYrr, X86_INS_VPSRAVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVDZrm, X86_INS_VPSRAVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVDZrmk, X86_INS_VPSRAVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVDZrmkz, X86_INS_VPSRAVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVDZrr, X86_INS_VPSRAVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVDZrrk, X86_INS_VPSRAVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVDZrrkz, X86_INS_VPSRAVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVDrm, X86_INS_VPSRAVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVDrr, X86_INS_VPSRAVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVQZrm, X86_INS_VPSRAVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVQZrmk, X86_INS_VPSRAVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVQZrmkz, X86_INS_VPSRAVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVQZrr, X86_INS_VPSRAVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVQZrrk, X86_INS_VPSRAVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAVQZrrkz, X86_INS_VPSRAVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAWYri, X86_INS_VPSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAWYrm, X86_INS_VPSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAWYrr, X86_INS_VPSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAWri, X86_INS_VPSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAWrm, X86_INS_VPSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRAWrr, X86_INS_VPSRAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDQYri, X86_INS_VPSRLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDQri, X86_INS_VPSRLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDYri, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDYrm, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDYrr, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZmi, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZmik, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZmikz, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZri, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZrik, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZrikz, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZrm, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZrmk, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZrmkz, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZrr, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZrrk, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDZrrkz, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDri, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDrm, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLDrr, X86_INS_VPSRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQYri, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQYrm, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQYrr, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZmi, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZmik, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZmikz, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZri, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZrik, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZrikz, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZrm, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZrmk, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZrmkz, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZrr, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZrrk, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQZrrkz, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQri, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQrm, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLQrr, X86_INS_VPSRLQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVDYrm, X86_INS_VPSRLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVDYrr, X86_INS_VPSRLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVDZrm, X86_INS_VPSRLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVDZrmk, X86_INS_VPSRLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVDZrmkz, X86_INS_VPSRLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVDZrr, X86_INS_VPSRLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVDZrrk, X86_INS_VPSRLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVDZrrkz, X86_INS_VPSRLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVDrm, X86_INS_VPSRLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVDrr, X86_INS_VPSRLVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVQYrm, X86_INS_VPSRLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVQYrr, X86_INS_VPSRLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVQZrm, X86_INS_VPSRLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVQZrmk, X86_INS_VPSRLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVQZrmkz, X86_INS_VPSRLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVQZrr, X86_INS_VPSRLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVQZrrk, X86_INS_VPSRLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVQZrrkz, X86_INS_VPSRLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVQrm, X86_INS_VPSRLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLVQrr, X86_INS_VPSRLVQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLWYri, X86_INS_VPSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLWYrm, X86_INS_VPSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLWYrr, X86_INS_VPSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLWri, X86_INS_VPSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLWrm, X86_INS_VPSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSRLWrr, X86_INS_VPSRLW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBYrm, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBYrr, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ128rm, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ128rmk, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ128rmkz, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ128rr, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ128rrk, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ128rrkz, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ256rm, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ256rmk, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ256rmkz, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ256rr, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ256rrk, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZ256rrkz, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZrm, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZrmk, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZrmkz, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZrr, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZrrk, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBZrrkz, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBrm, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBBrr, X86_INS_VPSUBB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDYrm, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDYrr, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ128rm, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ128rmb, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ128rmbk, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ128rmbkz, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ128rmk, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ128rmkz, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ128rr, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ128rrk, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ128rrkz, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ256rm, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ256rmb, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ256rmbk, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ256rmbkz, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ256rmk, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ256rmkz, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ256rr, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ256rrk, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZ256rrkz, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZrm, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZrmb, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZrmbk, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZrmbkz, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZrmk, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZrmkz, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZrr, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZrrk, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDZrrkz, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDrm, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBDrr, X86_INS_VPSUBD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQYrm, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQYrr, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ128rm, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ128rmb, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ128rmbk, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ128rmbkz, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ128rmk, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ128rmkz, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ128rr, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ128rrk, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ128rrkz, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ256rm, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ256rmb, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ256rmbk, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ256rmbkz, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ256rmk, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ256rmkz, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ256rr, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ256rrk, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZ256rrkz, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZrm, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZrmb, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZrmbk, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZrmbkz, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZrmk, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZrmkz, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZrr, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZrrk, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQZrrkz, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQrm, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBQrr, X86_INS_VPSUBQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBSBYrm, X86_INS_VPSUBSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBSBYrr, X86_INS_VPSUBSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBSBrm, X86_INS_VPSUBSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBSBrr, X86_INS_VPSUBSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBSWYrm, X86_INS_VPSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBSWYrr, X86_INS_VPSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBSWrm, X86_INS_VPSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBSWrr, X86_INS_VPSUBSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBUSBYrm, X86_INS_VPSUBUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBUSBYrr, X86_INS_VPSUBUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBUSBrm, X86_INS_VPSUBUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBUSBrr, X86_INS_VPSUBUSB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBUSWYrm, X86_INS_VPSUBUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBUSWYrr, X86_INS_VPSUBUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBUSWrm, X86_INS_VPSUBUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBUSWrr, X86_INS_VPSUBUSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWYrm, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWYrr, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ128rm, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ128rmk, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ128rmkz, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ128rr, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ128rrk, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ128rrkz, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ256rm, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ256rmk, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ256rmkz, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ256rr, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ256rrk, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZ256rrkz, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZrm, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZrmk, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZrmkz, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZrr, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZrrk, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWZrrkz, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWrm, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPSUBWrr, X86_INS_VPSUBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTMDZrm, X86_INS_VPTESTMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTMDZrr, X86_INS_VPTESTMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTMQZrm, X86_INS_VPTESTMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTMQZrr, X86_INS_VPTESTMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTNMDZrm, X86_INS_VPTESTNMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTNMDZrr, X86_INS_VPTESTNMD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTNMQZrm, X86_INS_VPTESTNMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTNMQZrr, X86_INS_VPTESTNMQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTYrm, X86_INS_VPTEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTYrr, X86_INS_VPTEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTrm, X86_INS_VPTEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPTESTrr, X86_INS_VPTEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHBWYrm, X86_INS_VPUNPCKHBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHBWYrr, X86_INS_VPUNPCKHBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHBWrm, X86_INS_VPUNPCKHBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHBWrr, X86_INS_VPUNPCKHBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHDQYrm, X86_INS_VPUNPCKHDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHDQYrr, X86_INS_VPUNPCKHDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHDQZrm, X86_INS_VPUNPCKHDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHDQZrr, X86_INS_VPUNPCKHDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHDQrm, X86_INS_VPUNPCKHDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHDQrr, X86_INS_VPUNPCKHDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHQDQYrm, X86_INS_VPUNPCKHQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHQDQYrr, X86_INS_VPUNPCKHQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHQDQZrm, X86_INS_VPUNPCKHQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHQDQZrr, X86_INS_VPUNPCKHQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHQDQrm, X86_INS_VPUNPCKHQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHQDQrr, X86_INS_VPUNPCKHQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHWDYrm, X86_INS_VPUNPCKHWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHWDYrr, X86_INS_VPUNPCKHWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHWDrm, X86_INS_VPUNPCKHWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKHWDrr, X86_INS_VPUNPCKHWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLBWYrm, X86_INS_VPUNPCKLBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLBWYrr, X86_INS_VPUNPCKLBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLBWrm, X86_INS_VPUNPCKLBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLBWrr, X86_INS_VPUNPCKLBW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLDQYrm, X86_INS_VPUNPCKLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLDQYrr, X86_INS_VPUNPCKLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLDQZrm, X86_INS_VPUNPCKLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLDQZrr, X86_INS_VPUNPCKLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLDQrm, X86_INS_VPUNPCKLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLDQrr, X86_INS_VPUNPCKLDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLQDQYrm, X86_INS_VPUNPCKLQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLQDQYrr, X86_INS_VPUNPCKLQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLQDQZrm, X86_INS_VPUNPCKLQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLQDQZrr, X86_INS_VPUNPCKLQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLQDQrm, X86_INS_VPUNPCKLQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLQDQrr, X86_INS_VPUNPCKLQDQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLWDYrm, X86_INS_VPUNPCKLWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLWDYrr, X86_INS_VPUNPCKLWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLWDrm, X86_INS_VPUNPCKLWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPUNPCKLWDrr, X86_INS_VPUNPCKLWD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ128rm, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ128rmb, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ128rmbk, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ128rmbkz, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ128rmk, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ128rmkz, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ128rr, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ128rrk, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ128rrkz, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ256rm, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ256rmb, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ256rmbk, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ256rmbkz, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ256rmk, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ256rmkz, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ256rr, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ256rrk, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZ256rrkz, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZrm, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZrmb, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZrmbk, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZrmbkz, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZrmk, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZrmkz, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZrr, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZrrk, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORDZrrkz, X86_INS_VPXORD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ128rm, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ128rmb, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ128rmbk, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ128rmbkz, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ128rmk, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ128rmkz, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ128rr, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ128rrk, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ128rrkz, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ256rm, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ256rmb, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ256rmbk, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ256rmbkz, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ256rmk, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ256rmkz, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ256rr, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ256rrk, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZ256rrkz, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZrm, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZrmb, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZrmbk, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZrmbkz, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZrmk, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZrmkz, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZrr, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZrrk, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORQZrrkz, X86_INS_VPXORQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORYrm, X86_INS_VPXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORYrr, X86_INS_VPXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORrm, X86_INS_VPXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VPXORrr, X86_INS_VPXOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ128m, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ128mb, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ128mbk, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ128mbkz, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ128mk, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ128mkz, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ128r, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ128rk, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ128rkz, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ256m, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ256mb, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ256mbk, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ256mbkz, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ256mk, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ256mkz, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ256r, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ256rk, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZ256rkz, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZm, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZmb, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZmbk, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZmbkz, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZmk, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZmkz, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZr, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZrk, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PDZrkz, X86_INS_VRCP14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ128m, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ128mb, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ128mbk, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ128mbkz, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ128mk, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ128mkz, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ128r, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ128rk, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ128rkz, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ256m, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ256mb, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ256mbk, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ256mbkz, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ256mk, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ256mkz, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ256r, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ256rk, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZ256rkz, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZm, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZmb, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZmbk, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZmbkz, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZmk, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZmkz, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZr, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZrk, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14PSZrkz, X86_INS_VRCP14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14SDrm, X86_INS_VRCP14SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14SDrr, X86_INS_VRCP14SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14SSrm, X86_INS_VRCP14SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP14SSrr, X86_INS_VRCP14SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDm, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDmb, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDmbk, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDmbkz, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDmk, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDmkz, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDr, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDrb, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDrbk, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDrbkz, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDrk, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PDrkz, X86_INS_VRCP28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSm, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSmb, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSmbk, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSmbkz, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSmk, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSmkz, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSr, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSrb, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSrbk, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSrbkz, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSrk, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28PSrkz, X86_INS_VRCP28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SDm, X86_INS_VRCP28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SDmk, X86_INS_VRCP28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SDmkz, X86_INS_VRCP28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SDr, X86_INS_VRCP28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SDrb, X86_INS_VRCP28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SDrbk, X86_INS_VRCP28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SDrbkz, X86_INS_VRCP28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SDrk, X86_INS_VRCP28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SDrkz, X86_INS_VRCP28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SSm, X86_INS_VRCP28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SSmk, X86_INS_VRCP28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SSmkz, X86_INS_VRCP28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SSr, X86_INS_VRCP28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SSrb, X86_INS_VRCP28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SSrbk, X86_INS_VRCP28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SSrbkz, X86_INS_VRCP28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SSrk, X86_INS_VRCP28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCP28SSrkz, X86_INS_VRCP28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPPSYm, X86_INS_VRCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPPSYm_Int, X86_INS_VRCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPPSYr, X86_INS_VRCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPPSYr_Int, X86_INS_VRCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPPSm, X86_INS_VRCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPPSm_Int, X86_INS_VRCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPPSr, X86_INS_VRCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPPSr_Int, X86_INS_VRCPPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPSSm, X86_INS_VRCPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPSSm_Int, X86_INS_VRCPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VRCPSSr, X86_INS_VRCPSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALEPDZm, X86_INS_VRNDSCALEPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALEPDZr, X86_INS_VRNDSCALEPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALEPSZm, X86_INS_VRNDSCALEPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALEPSZr, X86_INS_VRNDSCALEPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESDm, X86_INS_VRNDSCALESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESDmk, X86_INS_VRNDSCALESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESDmkz, X86_INS_VRNDSCALESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESDr, X86_INS_VRNDSCALESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESDrb, X86_INS_VRNDSCALESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESDrbk, X86_INS_VRNDSCALESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESDrbkz, X86_INS_VRNDSCALESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESDrk, X86_INS_VRNDSCALESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESDrkz, X86_INS_VRNDSCALESD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESSm, X86_INS_VRNDSCALESS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESSmk, X86_INS_VRNDSCALESS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESSmkz, X86_INS_VRNDSCALESS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESSr, X86_INS_VRNDSCALESS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESSrb, X86_INS_VRNDSCALESS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESSrbk, X86_INS_VRNDSCALESS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESSrbkz, X86_INS_VRNDSCALESS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESSrk, X86_INS_VRNDSCALESS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRNDSCALESSrkz, X86_INS_VRNDSCALESS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDPDm, X86_INS_VROUNDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDPDr, X86_INS_VROUNDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDPSm, X86_INS_VROUNDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDPSr, X86_INS_VROUNDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDSDm, X86_INS_VROUNDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDSDr, X86_INS_VROUNDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDSDr_Int, X86_INS_VROUNDSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDSSm, X86_INS_VROUNDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDSSr, X86_INS_VROUNDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDSSr_Int, X86_INS_VROUNDSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDYPDm, X86_INS_VROUNDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDYPDr, X86_INS_VROUNDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDYPSm, X86_INS_VROUNDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VROUNDYPSr, X86_INS_VROUNDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ128m, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ128mb, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ128mbk, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ128mbkz, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ128mk, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ128mkz, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ128r, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ128rk, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ128rkz, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ256m, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ256mb, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ256mbk, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ256mbkz, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ256mk, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ256mkz, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ256r, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ256rk, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZ256rkz, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZm, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZmb, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZmbk, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZmbkz, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZmk, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZmkz, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZr, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZrk, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PDZrkz, X86_INS_VRSQRT14PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ128m, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ128mb, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ128mbk, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ128mbkz, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ128mk, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ128mkz, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ128r, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ128rk, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ128rkz, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ256m, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ256mb, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ256mbk, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ256mbkz, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ256mk, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ256mkz, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ256r, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ256rk, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZ256rkz, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZm, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZmb, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZmbk, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZmbkz, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZmk, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZmkz, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZr, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZrk, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14PSZrkz, X86_INS_VRSQRT14PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14SDrm, X86_INS_VRSQRT14SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14SDrr, X86_INS_VRSQRT14SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14SSrm, X86_INS_VRSQRT14SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT14SSrr, X86_INS_VRSQRT14SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDm, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDmb, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDmbk, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDmbkz, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDmk, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDmkz, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDr, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDrb, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDrbk, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDrbkz, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDrk, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PDrkz, X86_INS_VRSQRT28PD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSm, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSmb, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSmbk, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSmbkz, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSmk, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSmkz, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSr, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSrb, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSrbk, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSrbkz, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSrk, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28PSrkz, X86_INS_VRSQRT28PS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SDm, X86_INS_VRSQRT28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SDmk, X86_INS_VRSQRT28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SDmkz, X86_INS_VRSQRT28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SDr, X86_INS_VRSQRT28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SDrb, X86_INS_VRSQRT28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SDrbk, X86_INS_VRSQRT28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SDrbkz, X86_INS_VRSQRT28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SDrk, X86_INS_VRSQRT28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SDrkz, X86_INS_VRSQRT28SD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SSm, X86_INS_VRSQRT28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SSmk, X86_INS_VRSQRT28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SSmkz, X86_INS_VRSQRT28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SSr, X86_INS_VRSQRT28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SSrb, X86_INS_VRSQRT28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SSrbk, X86_INS_VRSQRT28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SSrbkz, X86_INS_VRSQRT28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SSrk, X86_INS_VRSQRT28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRT28SSrkz, X86_INS_VRSQRT28SS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTPSYm, X86_INS_VRSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTPSYm_Int, X86_INS_VRSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTPSYr, X86_INS_VRSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTPSYr_Int, X86_INS_VRSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTPSm, X86_INS_VRSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTPSm_Int, X86_INS_VRSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTPSr, X86_INS_VRSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTPSr_Int, X86_INS_VRSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTSSm, X86_INS_VRSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTSSm_Int, X86_INS_VRSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VRSQRTSSr, X86_INS_VRSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERDPDZmr, X86_INS_VSCATTERDPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERDPSZmr, X86_INS_VSCATTERDPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERPF0DPDm, X86_INS_VSCATTERPF0DPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERPF0DPSm, X86_INS_VSCATTERPF0DPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERPF0QPDm, X86_INS_VSCATTERPF0QPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERPF0QPSm, X86_INS_VSCATTERPF0QPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERPF1DPDm, X86_INS_VSCATTERPF1DPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERPF1DPSm, X86_INS_VSCATTERPF1DPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERPF1QPDm, X86_INS_VSCATTERPF1QPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERPF1QPSm, X86_INS_VSCATTERPF1QPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERQPDZmr, X86_INS_VSCATTERQPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSCATTERQPSZmr, X86_INS_VSCATTERQPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPDYrmi, X86_INS_VSHUFPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPDYrri, X86_INS_VSHUFPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPDZrmi, X86_INS_VSHUFPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPDZrri, X86_INS_VSHUFPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPDrmi, X86_INS_VSHUFPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPDrri, X86_INS_VSHUFPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPSYrmi, X86_INS_VSHUFPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPSYrri, X86_INS_VSHUFPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPSZrmi, X86_INS_VSHUFPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPSZrri, X86_INS_VSHUFPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPSrmi, X86_INS_VSHUFPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSHUFPSrri, X86_INS_VSHUFPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDYm, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDYr, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ128m, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ128mb, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ128mbk, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ128mbkz, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ128mk, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ128mkz, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ128r, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ128rk, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ128rkz, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ256m, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ256mb, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ256mbk, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ256mbkz, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ256mk, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ256mkz, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ256r, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ256rk, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZ256rkz, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZm, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZmb, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZmbk, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZmbkz, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZmk, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZmkz, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZr, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZrk, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDZrkz, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDm, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPDr, X86_INS_VSQRTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSYm, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSYr, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ128m, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ128mb, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ128mbk, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ128mbkz, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ128mk, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ128mkz, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ128r, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ128rk, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ128rkz, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ256m, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ256mb, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ256mbk, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ256mbkz, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ256mk, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ256mkz, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ256r, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ256rk, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZ256rkz, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZm, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZmb, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZmbk, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZmbkz, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZmk, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZmkz, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZr, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZrk, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSZrkz, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSm, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTPSr, X86_INS_VSQRTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSDZm, X86_INS_VSQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSDZm_Int, X86_INS_VSQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSDZr, X86_INS_VSQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSDZr_Int, X86_INS_VSQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSDm, X86_INS_VSQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSDm_Int, X86_INS_VSQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSDr, X86_INS_VSQRTSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSSZm, X86_INS_VSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSSZm_Int, X86_INS_VSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSSZr, X86_INS_VSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSSZr_Int, X86_INS_VSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSSm, X86_INS_VSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSSm_Int, X86_INS_VSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VSQRTSSr, X86_INS_VSQRTSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VSTMXCSR, X86_INS_VSTMXCSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDYrm, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDYrr, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ128rm, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ128rmb, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ128rmbk, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ128rmbkz, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ128rmk, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ128rmkz, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ128rr, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ128rrk, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ128rrkz, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ256rm, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ256rmb, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ256rmbk, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ256rmbkz, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ256rmk, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ256rmkz, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ256rr, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ256rrk, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZ256rrkz, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrb, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrbk, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrbkz, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrm, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrmb, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrmbk, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrmbkz, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrmk, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrmkz, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrr, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrrk, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDZrrkz, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDrm, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPDrr, X86_INS_VSUBPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSYrm, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSYrr, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ128rm, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ128rmb, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ128rmbk, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ128rmbkz, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ128rmk, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ128rmkz, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ128rr, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ128rrk, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ128rrkz, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ256rm, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ256rmb, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ256rmbk, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ256rmbkz, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ256rmk, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ256rmkz, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ256rr, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ256rrk, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZ256rrkz, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrb, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrbk, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrbkz, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrm, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrmb, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrmbk, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrmbkz, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrmk, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrmkz, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrr, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrrk, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSZrrkz, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSrm, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBPSrr, X86_INS_VSUBPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrm, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrm_Int, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrm_Intk, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrm_Intkz, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrr, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrr_Int, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrr_Intk, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrr_Intkz, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrrb, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrrbk, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDZrrbkz, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDrm, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDrm_Int, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDrr, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSDrr_Int, X86_INS_VSUBSD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrm, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrm_Int, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrm_Intk, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrm_Intkz, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrr, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrr_Int, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrr_Intk, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrr_Intkz, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrrb, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrrbk, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSZrrbkz, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSrm, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSrm_Int, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSrr, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VSUBSSrr_Int, X86_INS_VSUBSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VTESTPDYrm, X86_INS_VTESTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VTESTPDYrr, X86_INS_VTESTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VTESTPDrm, X86_INS_VTESTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VTESTPDrr, X86_INS_VTESTPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VTESTPSYrm, X86_INS_VTESTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VTESTPSYrr, X86_INS_VTESTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VTESTPSrm, X86_INS_VTESTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VTESTPSrr, X86_INS_VTESTPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUCOMISDZrm, X86_INS_VUCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUCOMISDZrr, X86_INS_VUCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUCOMISDrm, X86_INS_VUCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUCOMISDrr, X86_INS_VUCOMISD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUCOMISSZrm, X86_INS_VUCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUCOMISSZrr, X86_INS_VUCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUCOMISSrm, X86_INS_VUCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUCOMISSrr, X86_INS_VUCOMISS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPDYrm, X86_INS_VUNPCKHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPDYrr, X86_INS_VUNPCKHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPDZrm, X86_INS_VUNPCKHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPDZrr, X86_INS_VUNPCKHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPDrm, X86_INS_VUNPCKHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPDrr, X86_INS_VUNPCKHPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPSYrm, X86_INS_VUNPCKHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPSYrr, X86_INS_VUNPCKHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPSZrm, X86_INS_VUNPCKHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPSZrr, X86_INS_VUNPCKHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPSrm, X86_INS_VUNPCKHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKHPSrr, X86_INS_VUNPCKHPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPDYrm, X86_INS_VUNPCKLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPDYrr, X86_INS_VUNPCKLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPDZrm, X86_INS_VUNPCKLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPDZrr, X86_INS_VUNPCKLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPDrm, X86_INS_VUNPCKLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPDrr, X86_INS_VUNPCKLPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPSYrm, X86_INS_VUNPCKLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPSYrr, X86_INS_VUNPCKLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPSZrm, X86_INS_VUNPCKLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPSZrr, X86_INS_VUNPCKLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPSrm, X86_INS_VUNPCKLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VUNPCKLPSrr, X86_INS_VUNPCKLPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VXORPDYrm, X86_INS_VXORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VXORPDYrr, X86_INS_VXORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VXORPDrm, X86_INS_VXORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VXORPDrr, X86_INS_VXORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VXORPSYrm, X86_INS_VXORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VXORPSYrr, X86_INS_VXORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VXORPSrm, X86_INS_VXORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VXORPSrr, X86_INS_VXORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
-#endif
- },
- {
- X86_VZEROALL, X86_INS_VZEROALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_YMM0, X86_REG_YMM1, X86_REG_YMM2, X86_REG_YMM3, X86_REG_YMM4, X86_REG_YMM5, X86_REG_YMM6, X86_REG_YMM7, X86_REG_YMM8, X86_REG_YMM9, X86_REG_YMM10, X86_REG_YMM11, X86_REG_YMM12, X86_REG_YMM13, X86_REG_YMM14, X86_REG_YMM15, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_VZEROUPPER, X86_INS_VZEROUPPER,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_YMM0, X86_REG_YMM1, X86_REG_YMM2, X86_REG_YMM3, X86_REG_YMM4, X86_REG_YMM5, X86_REG_YMM6, X86_REG_YMM7, X86_REG_YMM8, X86_REG_YMM9, X86_REG_YMM10, X86_REG_YMM11, X86_REG_YMM12, X86_REG_YMM13, X86_REG_YMM14, X86_REG_YMM15, 0 }, { X86_GRP_AVX, 0 }, 0, 0
-#endif
- },
- {
- X86_WAIT, X86_INS_WAIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_WBINVD, X86_INS_WBINVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_WRFSBASE, X86_INS_WRFSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_WRFSBASE64, X86_INS_WRFSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_WRGSBASE, X86_INS_WRGSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_WRGSBASE64, X86_INS_WRGSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_WRMSR, X86_INS_WRMSR,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XABORT, X86_INS_XABORT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RTM, 0 }, 0, 0
-#endif
- },
- {
- X86_XACQUIRE_PREFIX, X86_INS_XACQUIRE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_HLE, 0 }, 0, 0
-#endif
- },
- {
- X86_XADD16rm, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD16rr, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD32rm, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD32rr, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD64rm, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD64rr, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD8rm, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD8rr, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XBEGIN_2, X86_INS_XBEGIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EAX, 0 }, { X86_GRP_RTM, 0 }, 1, 0
-#endif
- },
- {
- X86_XBEGIN_4, X86_INS_XBEGIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EAX, 0 }, { X86_GRP_RTM, 0 }, 1, 0
-#endif
- },
- {
- X86_XCHG16ar, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG16rm, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG16rr, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG32ar, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG32ar64, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG32rm, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG32rr, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG64ar, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG64rm, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG64rr, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG8rm, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG8rr, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCH_F, X86_INS_FXCH,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCRYPTCBC, X86_INS_XCRYPTCBC,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCRYPTCFB, X86_INS_XCRYPTCFB,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCRYPTCTR, X86_INS_XCRYPTCTR,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCRYPTECB, X86_INS_XCRYPTECB,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCRYPTOFB, X86_INS_XCRYPTOFB,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XEND, X86_INS_XEND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_RTM, 0 }, 0, 0
-#endif
- },
- {
- X86_XGETBV, X86_INS_XGETBV,
-#ifndef CAPSTONE_DIET
- { X86_REG_ECX, 0 }, { X86_REG_EDX, X86_REG_EAX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XLAT, X86_INS_XLATB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16i16, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16ri, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16ri8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16rm, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16rr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16rr_REV, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32i32, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32ri, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32ri8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32rm, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32rr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32rr_REV, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64i32, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64mi32, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64ri32, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64ri8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64rm, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64rr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64rr_REV, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8i8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8ri, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8ri8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8rm, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8rr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8rr_REV, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XORPDrm, X86_INS_XORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_XORPDrr, X86_INS_XORPD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
-#endif
- },
- {
- X86_XORPSrm, X86_INS_XORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_XORPSrr, X86_INS_XORPS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
-#endif
- },
- {
- X86_XRELEASE_PREFIX, X86_INS_XRELEASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_HLE, 0 }, 0, 0
-#endif
- },
- {
- X86_XRSTOR, X86_INS_XRSTOR,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XRSTOR64, X86_INS_XRSTOR64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XRSTORS, X86_INS_XRSTORS,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XRSTORS64, X86_INS_XRSTORS64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVE, X86_INS_XSAVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVE64, X86_INS_XSAVE64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVEC, X86_INS_XSAVEC,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVEC64, X86_INS_XSAVEC64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVEOPT, X86_INS_XSAVEOPT,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVEOPT64, X86_INS_XSAVEOPT64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVES, X86_INS_XSAVES,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVES64, X86_INS_XSAVES64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XSETBV, X86_INS_XSETBV,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDX, X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSHA1, X86_INS_XSHA1,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSHA256, X86_INS_XSHA256,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSTORE, X86_INS_XSTORE,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XTEST, X86_INS_XTEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_fdisi8087_nop, X86_INS_FDISI8087_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_feni8087_nop, X86_INS_FENI8087_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
-#endif
- },
+#include "X86MappingInsn.inc"
};
#else // X86 reduce (defined CAPSTONE_X86_REDUCE)
static insn_map insns[] = { // reduce x86 instructions
@@ -53189,9354 +2292,7 @@
#endif
},
- {
- X86_AAA, X86_INS_AAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_AAD8i8, X86_INS_AAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_AAM8i8, X86_INS_AAM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_AAS, X86_INS_AAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16i16, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16mi, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16mi8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16mr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16ri, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16ri8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16rm, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16rr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC16rr_REV, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32i32, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32mi, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32mi8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32mr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32ri, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32ri8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32rm, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32rr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC32rr_REV, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64i32, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64mi32, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64mi8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64mr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64ri32, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64ri8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64rm, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64rr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC64rr_REV, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8i8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8mi, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8mi8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8mr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8ri, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8ri8, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8rm, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8rr, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADC8rr_REV, X86_INS_ADC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADCX32rm, X86_INS_ADCX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADCX32rr, X86_INS_ADCX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADCX64rm, X86_INS_ADCX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADCX64rr, X86_INS_ADCX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16i16, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16ri, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16ri8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16rm, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16rr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD16rr_REV, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32i32, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32ri, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32ri8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32rm, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32rr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD32rr_REV, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64i32, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64mi32, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64ri32, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64ri8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64rm, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64rr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD64rr_REV, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8i8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8ri, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8ri8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8rm, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8rr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADD8rr_REV, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ADOX32rm, X86_INS_ADOX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADOX32rr, X86_INS_ADOX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADOX64rm, X86_INS_ADOX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_ADOX64rr, X86_INS_ADOX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
-#endif
- },
- {
- X86_AND16i16, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16ri, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16ri8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16rm, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16rr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND16rr_REV, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32i32, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32ri, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32ri8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32rm, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32rr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND32rr_REV, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64i32, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64mi32, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64ri32, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64ri8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64rm, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64rr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND64rr_REV, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8i8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_AND8mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8ri, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8ri8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_AND8rm, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8rr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_AND8rr_REV, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ANDN32rm, X86_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDN32rr, X86_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDN64rm, X86_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_ANDN64rr, X86_INS_ANDN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_ARPL16mr, X86_INS_ARPL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_ARPL16rr, X86_INS_ARPL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTR32rm, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTR32rr, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTR64rm, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTR64rr, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTRI32mi, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTRI32ri, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTRI64mi, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BEXTRI64ri, X86_INS_BEXTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCFILL32rm, X86_INS_BLCFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCFILL32rr, X86_INS_BLCFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCFILL64rm, X86_INS_BLCFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCFILL64rr, X86_INS_BLCFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCI32rm, X86_INS_BLCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCI32rr, X86_INS_BLCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCI64rm, X86_INS_BLCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCI64rr, X86_INS_BLCI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCIC32rm, X86_INS_BLCIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCIC32rr, X86_INS_BLCIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCIC64rm, X86_INS_BLCIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCIC64rr, X86_INS_BLCIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCMSK32rm, X86_INS_BLCMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCMSK32rr, X86_INS_BLCMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCMSK64rm, X86_INS_BLCMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCMSK64rr, X86_INS_BLCMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCS32rm, X86_INS_BLCS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCS32rr, X86_INS_BLCS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCS64rm, X86_INS_BLCS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLCS64rr, X86_INS_BLCS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSFILL32rm, X86_INS_BLSFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSFILL32rr, X86_INS_BLSFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSFILL64rm, X86_INS_BLSFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSFILL64rr, X86_INS_BLSFILL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSI32rm, X86_INS_BLSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSI32rr, X86_INS_BLSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSI64rm, X86_INS_BLSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSI64rr, X86_INS_BLSI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSIC32rm, X86_INS_BLSIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSIC32rr, X86_INS_BLSIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSIC64rm, X86_INS_BLSIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSIC64rr, X86_INS_BLSIC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSMSK32rm, X86_INS_BLSMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSMSK32rr, X86_INS_BLSMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSMSK64rm, X86_INS_BLSMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSMSK64rr, X86_INS_BLSMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSR32rm, X86_INS_BLSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSR32rr, X86_INS_BLSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSR64rm, X86_INS_BLSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BLSR64rr, X86_INS_BLSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_BOUNDS16rm, X86_INS_BOUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_BOUNDS32rm, X86_INS_BOUND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_BSF16rm, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSF16rr, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSF32rm, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSF32rr, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSF64rm, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSF64rr, X86_INS_BSF,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR16rm, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR16rr, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR32rm, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR32rr, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR64rm, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSR64rr, X86_INS_BSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSWAP32r, X86_INS_BSWAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BSWAP64r, X86_INS_BSWAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT16mi8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT16mr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT16ri8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT16rr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT32mi8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT32mr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT32ri8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT32rr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT64mi8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT64mr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT64ri8, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BT64rr, X86_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC16mi8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC16mr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC16ri8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC16rr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC32mi8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC32mr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC32ri8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC32rr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC64mi8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC64mr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC64ri8, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTC64rr, X86_INS_BTC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR16mi8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR16mr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR16ri8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR16rr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR32mi8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR32mr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR32ri8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR32rr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR64mi8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR64mr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR64ri8, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTR64rr, X86_INS_BTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS16mi8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS16mr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS16ri8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS16rr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS32mi8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS32mr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS32ri8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS32rr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS64mi8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS64mr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS64ri8, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BTS64rr, X86_INS_BTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_BZHI32rm, X86_INS_BZHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_BZHI32rr, X86_INS_BZHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_BZHI64rm, X86_INS_BZHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_BZHI64rr, X86_INS_BZHI,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL16m, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL16r, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL32m, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL32r, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL64m, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL64pcrel32, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_CALL64r, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_CALLpcrel16, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
-#endif
- },
- {
- X86_CALLpcrel32, X86_INS_CALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CBW, X86_INS_CBW,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CDQ, X86_INS_CDQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CDQE, X86_INS_CDQE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_RAX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLAC, X86_INS_CLAC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLC, X86_INS_CLC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLD, X86_INS_CLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLFLUSHOPT, X86_INS_CLFLUSHOPT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLGI, X86_INS_CLGI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_CLI, X86_INS_CLI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLTS, X86_INS_CLTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CLWB, X86_INS_CLWB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMC, X86_INS_CMC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA16rm, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA16rr, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA32rm, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA32rr, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA64rm, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVA64rr, X86_INS_CMOVA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE16rm, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE16rr, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE32rm, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE32rr, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE64rm, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVAE64rr, X86_INS_CMOVAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB16rm, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB16rr, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB32rm, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB32rr, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB64rm, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVB64rr, X86_INS_CMOVB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE16rm, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE16rr, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE32rm, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE32rr, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE64rm, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVBE64rr, X86_INS_CMOVBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE16rm, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE16rr, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE32rm, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE32rr, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE64rm, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVE64rr, X86_INS_CMOVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG16rm, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG16rr, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG32rm, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG32rr, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG64rm, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVG64rr, X86_INS_CMOVG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE16rm, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE16rr, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE32rm, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE32rr, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE64rm, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVGE64rr, X86_INS_CMOVGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL16rm, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL16rr, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL32rm, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL32rr, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL64rm, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVL64rr, X86_INS_CMOVL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE16rm, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE16rr, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE32rm, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE32rr, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE64rm, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVLE64rr, X86_INS_CMOVLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE16rm, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE16rr, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE32rm, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE32rr, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE64rm, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNE64rr, X86_INS_CMOVNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO16rm, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO16rr, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO32rm, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO32rr, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO64rm, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNO64rr, X86_INS_CMOVNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP16rm, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP16rr, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP32rm, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP32rr, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP64rm, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNP64rr, X86_INS_CMOVNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS16rm, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS16rr, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS32rm, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS32rr, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS64rm, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVNS64rr, X86_INS_CMOVNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO16rm, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO16rr, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO32rm, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO32rr, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO64rm, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVO64rr, X86_INS_CMOVO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP16rm, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP16rr, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP32rm, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP32rr, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP64rm, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVP64rr, X86_INS_CMOVP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS16rm, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS16rr, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS32rm, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS32rr, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS64rm, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMOVS64rr, X86_INS_CMOVS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16i16, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16mi, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16mi8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16mr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16ri, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16ri8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16rm, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16rr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP16rr_REV, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32i32, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32mi, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32mi8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32mr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32ri, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32ri8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32rm, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32rr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP32rr_REV, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64i32, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64mi32, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64mi8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64mr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64ri32, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64ri8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64rm, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64rr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP64rr_REV, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8i8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8mi, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8mi8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8mr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8ri, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8ri8, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8rm, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8rr, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMP8rr_REV, X86_INS_CMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSB, X86_INS_CMPSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSL, X86_INS_CMPSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSQ, X86_INS_CMPSQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPSW, X86_INS_CMPSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG16B, X86_INS_CMPXCHG16B,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG16rm, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG16rr, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG32rm, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG32rr, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG64rm, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG64rr, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG8B, X86_INS_CMPXCHG8B,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG8rm, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CMPXCHG8rr, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CPUID, X86_INS_CPUID,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CQO, X86_INS_CQO,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CWD, X86_INS_CWD,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_CWDE, X86_INS_CWDE,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DAA, X86_INS_DAA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_DAS, X86_INS_DAS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_DATA16_PREFIX, X86_INS_DATA16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC16m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC16r, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC16r_alt, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_DEC32m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC32r, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC32r_alt, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_DEC64m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC64r, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC8m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DEC8r, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV16m, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV16r, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV32m, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV32r, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV64m, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV64r, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV8m, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_DIV8r, X86_INS_DIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ENTER, X86_INS_ENTER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_FARCALL16i, X86_INS_LCALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_FARCALL16m, X86_INS_LCALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
-#endif
- },
- {
- X86_FARCALL32i, X86_INS_LCALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_FARCALL32m, X86_INS_LCALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
-#endif
- },
- {
- X86_FARCALL64, X86_INS_LCALL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
-#endif
- },
- {
- X86_FARJMP16i, X86_INS_LJMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_FARJMP16m, X86_INS_LJMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- X86_FARJMP32i, X86_INS_LJMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_FARJMP32m, X86_INS_LJMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- X86_FARJMP64, X86_INS_LJMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- X86_FSETPM, X86_INS_FSETPM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_GETSEC, X86_INS_GETSEC,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_HLT, X86_INS_HLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV16m, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV16r, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV32m, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV32r, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV64m, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV64r, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV8m, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IDIV8r, X86_INS_IDIV,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16m, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16r, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rm, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rmi, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rmi8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rr, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rri, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL16rri8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32m, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32r, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rm, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rmi, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rmi8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rr, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rri, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL32rri8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64m, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64r, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rm, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rmi32, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rmi8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rr, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rri32, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL64rri8, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL8m, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IMUL8r, X86_INS_IMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN16ri, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN16rr, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN32ri, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN32rr, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN8ri, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_IN8rr, X86_INS_IN,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC16m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC16r, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC16r_alt, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INC32m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC32r, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC32r_alt, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INC64m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC64r, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC8m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INC8r, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INSB, X86_INS_INSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INSL, X86_INS_INSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INSW, X86_INS_INSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INT, X86_INS_INT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
-#endif
- },
- {
- X86_INT1, X86_INS_INT1,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_INT, 0 }, 0, 0
-#endif
- },
- {
- X86_INT3, X86_INS_INT3,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
-#endif
- },
- {
- X86_INTO, X86_INS_INTO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_INT, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INVD, X86_INS_INVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_INVEPT32, X86_INS_INVEPT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INVEPT64, X86_INS_INVEPT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_INVLPG, X86_INS_INVLPG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_INVLPGA32, X86_INS_INVLPGA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INVLPGA64, X86_INS_INVLPGA,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_INVPCID32, X86_INS_INVPCID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INVPCID64, X86_INS_INVPCID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_INVVPID32, X86_INS_INVVPID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_INVVPID64, X86_INS_INVVPID,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_IRET16, X86_INS_IRET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
-#endif
- },
- {
- X86_IRET32, X86_INS_IRETD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
-#endif
- },
- {
- X86_IRET64, X86_INS_IRETQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_JAE_1, X86_INS_JAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JAE_2, X86_INS_JAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JAE_4, X86_INS_JAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JA_1, X86_INS_JA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JA_2, X86_INS_JA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JA_4, X86_INS_JA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JBE_1, X86_INS_JBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JBE_2, X86_INS_JBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JBE_4, X86_INS_JBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JB_1, X86_INS_JB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JB_2, X86_INS_JB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JB_4, X86_INS_JB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JCXZ, X86_INS_JCXZ,
-#ifndef CAPSTONE_DIET
- { X86_REG_CX, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JECXZ, X86_INS_JECXZ,
-#ifndef CAPSTONE_DIET
- { X86_REG_ECX, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JE_1, X86_INS_JE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JE_2, X86_INS_JE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JE_4, X86_INS_JE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JGE_1, X86_INS_JGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JGE_2, X86_INS_JGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JGE_4, X86_INS_JGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JG_1, X86_INS_JG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JG_2, X86_INS_JG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JG_4, X86_INS_JG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JLE_1, X86_INS_JLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JLE_2, X86_INS_JLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JLE_4, X86_INS_JLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JL_1, X86_INS_JL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JL_2, X86_INS_JL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JL_4, X86_INS_JL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JMP16m, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP16r, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP32m, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP32r, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP64m, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP64r, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1
-#endif
- },
- {
- X86_JMP_1, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JMP_2, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JMP_4, X86_INS_JMP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNE_1, X86_INS_JNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNE_2, X86_INS_JNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNE_4, X86_INS_JNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNO_1, X86_INS_JNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNO_2, X86_INS_JNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNO_4, X86_INS_JNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNP_1, X86_INS_JNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNP_2, X86_INS_JNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNP_4, X86_INS_JNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNS_1, X86_INS_JNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNS_2, X86_INS_JNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JNS_4, X86_INS_JNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JO_1, X86_INS_JO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JO_2, X86_INS_JO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JO_4, X86_INS_JO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JP_1, X86_INS_JP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JP_2, X86_INS_JP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JP_4, X86_INS_JP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JRCXZ, X86_INS_JRCXZ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RCX, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JS_1, X86_INS_JS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JS_2, X86_INS_JS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_JS_4, X86_INS_JS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- X86_LAHF, X86_INS_LAHF,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_AH, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR16rm, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR16rr, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR32rm, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR32rr, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR64rm, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LAR64rr, X86_INS_LAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG16, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG16B, X86_INS_CMPXCHG16B,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG32, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG64, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG8, X86_INS_CMPXCHG,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LCMPXCHG8B, X86_INS_CMPXCHG8B,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LDS16rm, X86_INS_LDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LDS32rm, X86_INS_LDS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LEA16r, X86_INS_LEA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LEA32r, X86_INS_LEA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LEA64_32r, X86_INS_LEA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LEA64r, X86_INS_LEA,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LEAVE, X86_INS_LEAVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LEAVE64, X86_INS_LEAVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LES16rm, X86_INS_LES,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LES32rm, X86_INS_LES,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LFS16rm, X86_INS_LFS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LFS32rm, X86_INS_LFS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LFS64rm, X86_INS_LFS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LGDT16m, X86_INS_LGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LGDT32m, X86_INS_LGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LGDT64m, X86_INS_LGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LGS16rm, X86_INS_LGS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LGS32rm, X86_INS_LGS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LGS64rm, X86_INS_LGS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LIDT16m, X86_INS_LIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LIDT32m, X86_INS_LIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_LIDT64m, X86_INS_LIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LLDT16m, X86_INS_LLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LLDT16r, X86_INS_LLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LMSW16m, X86_INS_LMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LMSW16r, X86_INS_LMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD16mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD16mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD16mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD32mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD32mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD32mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD64mi32, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD64mi8, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD64mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD8mi, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_ADD8mr, X86_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND16mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND16mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND16mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND32mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND32mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND32mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND64mi32, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND64mi8, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND64mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND8mi, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_AND8mr, X86_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_DEC16m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_DEC32m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_DEC64m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_DEC8m, X86_INS_DEC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_INC16m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_INC32m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_INC64m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_INC8m, X86_INS_INC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR16mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR16mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR16mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR32mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR32mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR32mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR64mi32, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR64mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR64mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR8mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_OR8mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB16mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB16mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB16mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB32mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB32mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB32mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB64mi32, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB64mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB64mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB8mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_SUB8mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR16mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR16mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR16mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR32mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR32mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR32mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR64mi32, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR64mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR64mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR8mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOCK_XOR8mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LODSB, X86_INS_LODSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AL, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LODSL, X86_INS_LODSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EAX, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LODSQ, X86_INS_LODSQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_RAX, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LODSW, X86_INS_LODSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AX, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOOP, X86_INS_LOOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOOPE, X86_INS_LOOPE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LOOPNE, X86_INS_LOOPNE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LRETIL, X86_INS_RETF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LRETIQ, X86_INS_RETFQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LRETIW, X86_INS_RETF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LRETL, X86_INS_RETF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LRETQ, X86_INS_RETFQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_LRETW, X86_INS_RETF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL16rm, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL16rr, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL32rm, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL32rr, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL64rm, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSL64rr, X86_INS_LSL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSS16rm, X86_INS_LSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSS32rm, X86_INS_LSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LSS64rm, X86_INS_LSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LTRm, X86_INS_LTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LTRr, X86_INS_LTR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LXADD16, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LXADD32, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LXADD64, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LXADD8, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT16rm, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT16rr, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT32rm, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT32rr, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT64rm, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_LZCNT64rr, X86_INS_LZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MONTMUL, X86_INS_MONTMUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RSI, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_RSI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ao16, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ao32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ao64, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16mi, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16mr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ms, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16o16a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16o32a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16o64a, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ri, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16ri_alt, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16rm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16rr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16rr_REV, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16rs, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16sm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV16sr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ao16, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ao32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ao64, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32cr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32dr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32mi, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32mr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ms, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32o16a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32o32a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32o64a, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rc, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rd, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ri, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32ri_alt, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rr_REV, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32rs, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32sm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV32sr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64ao32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64ao64, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64cr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64dr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64mi32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64mr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64ms, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64o32a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64o64a, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rc, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rd, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64ri, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64ri32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rr_REV, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64rs, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64sm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV64sr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8ao16, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8ao32, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8ao64, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8mi, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8mr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8mr_NOREX, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8o16a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8o32a, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8o64a, X86_INS_MOVABS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8ri, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8ri_alt, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8rm, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8rm_NOREX, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8rr, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8rr_NOREX, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOV8rr_REV, X86_INS_MOV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE16mr, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE16rm, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE32mr, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE32rm, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE64mr, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVBE64rm, X86_INS_MOVBE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSB, X86_INS_MOVSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSL, X86_INS_MOVSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSQ, X86_INS_MOVSQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSW, X86_INS_MOVSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX16rm8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX16rr8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32_NOREXrm8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32_NOREXrr8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32rm16, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32rm8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32rr16, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX32rr8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64_NOREXrr32, X86_INS_MOVSXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rm16, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rm32, X86_INS_MOVSXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rm32_alt, X86_INS_MOVSXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rm8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rr16, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rr32, X86_INS_MOVSXD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_MOVSX64rr8, X86_INS_MOVSX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX16rm8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX16rr8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32_NOREXrm8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32_NOREXrr8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32rm16, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32rm8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32rr16, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX32rr8, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX64rm16_Q, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX64rm8_Q, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX64rr16_Q, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MOVZX64rr8_Q, X86_INS_MOVZX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL16m, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL16r, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL32m, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL32r, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL64m, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL64r, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL8m, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MUL8r, X86_INS_MUL,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_MULX32rm, X86_INS_MULX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULX32rr, X86_INS_MULX,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULX64rm, X86_INS_MULX,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_MULX64rr, X86_INS_MULX,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_NEG16m, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG16r, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG32m, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG32r, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG64m, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG64r, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG8m, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NEG8r, X86_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16m4, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16m5, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16m6, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16m7, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16r4, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16r5, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16r6, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_16r7, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_m4, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_m5, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_m6, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_m7, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_r4, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_r5, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_r6, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP18_r7, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOP19rr, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_19, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_1a, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_1b, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_1c, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_1d, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPL_1e, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_19, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_1a, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_1b, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_1c, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_1d, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOOPW_1e, X86_INS_NOP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT16m, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT16r, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT32m, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT32r, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT64m, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT64r, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT8m, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_NOT8r, X86_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16i16, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16ri, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16ri8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16rm, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16rr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR16rr_REV, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32i32, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32mrLocked, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_OR32ri, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32ri8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32rm, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32rr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR32rr_REV, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64i32, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64mi32, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64ri32, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64ri8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64rm, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64rr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR64rr_REV, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8i8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8mi, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8mi8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_OR8mr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8ri, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8ri8, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_OR8rm, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8rr, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OR8rr_REV, X86_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT16ir, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT16rr, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT32ir, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT32rr, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT8ir, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUT8rr, X86_INS_OUT,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUTSB, X86_INS_OUTSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUTSL, X86_INS_OUTSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_OUTSW, X86_INS_OUTSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PCOMMIT, X86_INS_PCOMMIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PDEP32rm, X86_INS_PDEP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PDEP32rr, X86_INS_PDEP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PDEP64rm, X86_INS_PDEP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PDEP64rr, X86_INS_PDEP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXT32rm, X86_INS_PEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXT32rr, X86_INS_PEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXT64rm, X86_INS_PEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_PEXT64rr, X86_INS_PEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_POP16r, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POP16rmm, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POP16rmr, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POP32r, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POP32rmm, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POP32rmr, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POP64r, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POP64rmm, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POP64rmr, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POPA16, X86_INS_POPAW,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPA32, X86_INS_POPAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPDS16, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPDS32, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPES16, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPES32, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPF16, X86_INS_POPF,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPF32, X86_INS_POPFD,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPF64, X86_INS_POPFQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POPFS16, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPFS32, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPFS64, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POPGS16, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_POPGS32, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPGS64, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_POPSS16, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_POPSS32, X86_INS_POP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH16i8, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH16r, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH16rmm, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH16rmr, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH32i8, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH32r, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH32rmm, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH32rmr, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64i16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64i32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64i8, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64r, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64rmm, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSH64rmr, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHA16, X86_INS_PUSHAW,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHA32, X86_INS_PUSHAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHCS16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHCS32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHDS16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHDS32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHES16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHES32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHF16, X86_INS_PUSHF,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHF32, X86_INS_PUSHFD,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHF64, X86_INS_PUSHFQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHFS16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHFS32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHFS64, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHGS16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHGS32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHGS64, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHSS16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHSS32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHi16, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_PUSHi32, X86_INS_PUSH,
-#ifndef CAPSTONE_DIET
- { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16m1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16mCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16mi, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16r1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16rCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL16ri, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32m1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32mCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32mi, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32r1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32rCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL32ri, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64m1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64mCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64mi, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64r1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64rCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL64ri, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8m1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8mCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8mi, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8r1, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8rCL, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCL8ri, X86_INS_RCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16m1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16mCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16mi, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16r1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16rCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR16ri, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32m1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32mCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32mi, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32r1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32rCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR32ri, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64m1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64mCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64mi, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64r1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64rCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR64ri, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8m1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8mCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8mi, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8r1, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8rCL, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RCR8ri, X86_INS_RCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDFSBASE, X86_INS_RDFSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RDFSBASE64, X86_INS_RDFSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RDGSBASE, X86_INS_RDGSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RDGSBASE64, X86_INS_RDGSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RDMSR, X86_INS_RDMSR,
-#ifndef CAPSTONE_DIET
- { X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDPMC, X86_INS_RDPMC,
-#ifndef CAPSTONE_DIET
- { X86_REG_ECX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDRAND16r, X86_INS_RDRAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDRAND32r, X86_INS_RDRAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDRAND64r, X86_INS_RDRAND,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDSEED16r, X86_INS_RDSEED,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDSEED32r, X86_INS_RDSEED,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDSEED64r, X86_INS_RDSEED,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDTSC, X86_INS_RDTSC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RDTSCP, X86_INS_RDTSCP,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_RAX, X86_REG_RCX, X86_REG_RDX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RETIL, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_RETIQ, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RETIW, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RETL, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_RETQ, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_RETW, X86_INS_RET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16m1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16mCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16mi, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16r1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16rCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL16ri, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32m1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32mCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32mi, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32r1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32rCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL32ri, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64m1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64mCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64mi, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64r1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64rCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL64ri, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8m1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8mCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8mi, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8r1, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8rCL, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROL8ri, X86_INS_ROL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16m1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16mCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16mi, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16r1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16rCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR16ri, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32m1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32mCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32mi, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32r1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32rCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR32ri, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64m1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64mCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64mi, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64r1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64rCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR64ri, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8m1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8mCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8mi, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8r1, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8rCL, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_ROR8ri, X86_INS_ROR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_RORX32mi, X86_INS_RORX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_RORX32ri, X86_INS_RORX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_RORX64mi, X86_INS_RORX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_RORX64ri, X86_INS_RORX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_RSM, X86_INS_RSM,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAHF, X86_INS_SAHF,
-#ifndef CAPSTONE_DIET
- { X86_REG_AH, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16m1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16mCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16mi, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16r1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16rCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL16ri, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32m1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32mCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32mi, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32r1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32rCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL32ri, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64m1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64mCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64mi, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64r1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64rCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL64ri, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8m1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8mCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8mi, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8r1, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8rCL, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAL8ri, X86_INS_SAL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SALC, X86_INS_SALC,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_AL, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16m1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16mCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16mi, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16r1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16rCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR16ri, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32m1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32mCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32mi, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32r1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32rCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR32ri, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64m1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64mCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64mi, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64r1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64rCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR64ri, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8m1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8mCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8mi, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8r1, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8rCL, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SAR8ri, X86_INS_SAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SARX32rm, X86_INS_SARX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SARX32rr, X86_INS_SARX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SARX64rm, X86_INS_SARX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SARX64rr, X86_INS_SARX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16i16, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16mi, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16mi8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16mr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16ri, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16ri8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16rm, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16rr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB16rr_REV, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32i32, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32mi, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32mi8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32mr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32ri, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32ri8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32rm, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32rr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB32rr_REV, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64i32, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64mi32, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64mi8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64mr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64ri32, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64ri8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64rm, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64rr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB64rr_REV, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8i8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8mi, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8mi8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8mr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8ri, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8ri8, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8rm, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8rr, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SBB8rr_REV, X86_INS_SBB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SCASB, X86_INS_SCASB,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SCASL, X86_INS_SCASD,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SCASQ, X86_INS_SCASQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SCASW, X86_INS_SCASW,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETAEm, X86_INS_SETAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETAEr, X86_INS_SETAE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETAm, X86_INS_SETA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETAr, X86_INS_SETA,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETBEm, X86_INS_SETBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETBEr, X86_INS_SETBE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETBm, X86_INS_SETB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETBr, X86_INS_SETB,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETEm, X86_INS_SETE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETEr, X86_INS_SETE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETGEm, X86_INS_SETGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETGEr, X86_INS_SETGE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETGm, X86_INS_SETG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETGr, X86_INS_SETG,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETLEm, X86_INS_SETLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETLEr, X86_INS_SETLE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETLm, X86_INS_SETL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETLr, X86_INS_SETL,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNEm, X86_INS_SETNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNEr, X86_INS_SETNE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNOm, X86_INS_SETNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNOr, X86_INS_SETNO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNPm, X86_INS_SETNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNPr, X86_INS_SETNP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNSm, X86_INS_SETNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETNSr, X86_INS_SETNS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETOm, X86_INS_SETO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETOr, X86_INS_SETO,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETPm, X86_INS_SETP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETPr, X86_INS_SETP,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETSm, X86_INS_SETS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SETSr, X86_INS_SETS,
-#ifndef CAPSTONE_DIET
- { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SGDT16m, X86_INS_SGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SGDT32m, X86_INS_SGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SGDT64m, X86_INS_SGDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16m1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16mCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16mi, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16r1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16rCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL16ri, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32m1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32mCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32mi, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32r1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32rCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL32ri, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64m1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64mCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64mi, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64r1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64rCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL64ri, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8m1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8mCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8mi, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8r1, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8rCL, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHL8ri, X86_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD16mrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD16mri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD16rrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD16rri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD32mrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD32mri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD32rrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD32rri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD64mrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD64mri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD64rrCL, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLD64rri8, X86_INS_SHLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHLX32rm, X86_INS_SHLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHLX32rr, X86_INS_SHLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHLX64rm, X86_INS_SHLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHLX64rr, X86_INS_SHLX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16m1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16mCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16mi, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16r1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16rCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR16ri, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32m1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32mCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32mi, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32r1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32rCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR32ri, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64m1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64mCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64mi, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64r1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64rCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR64ri, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8m1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8mCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8mi, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8r1, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8rCL, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHR8ri, X86_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD16mrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD16mri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD16rrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD16rri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD32mrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD32mri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD32rrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD32rri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD64mrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD64mri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD64rrCL, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRD64rri8, X86_INS_SHRD,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SHRX32rm, X86_INS_SHRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHRX32rr, X86_INS_SHRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHRX64rm, X86_INS_SHRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SHRX64rr, X86_INS_SHRX,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
-#endif
- },
- {
- X86_SIDT16m, X86_INS_SIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SIDT32m, X86_INS_SIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SIDT64m, X86_INS_SIDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_SKINIT, X86_INS_SKINIT,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_SLDT16m, X86_INS_SLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SLDT16r, X86_INS_SLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SLDT32r, X86_INS_SLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SLDT64m, X86_INS_SLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SLDT64r, X86_INS_SLDT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SMSW16m, X86_INS_SMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SMSW16r, X86_INS_SMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SMSW32r, X86_INS_SMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SMSW64r, X86_INS_SMSW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STAC, X86_INS_STAC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STC, X86_INS_STC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STD, X86_INS_STD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STGI, X86_INS_STGI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_STI, X86_INS_STI,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STOSB, X86_INS_STOSB,
-#ifndef CAPSTONE_DIET
- { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STOSL, X86_INS_STOSD,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STOSQ, X86_INS_STOSQ,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RCX, X86_REG_RDI, X86_REG_EFLAGS, 0 }, { X86_REG_RCX, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STOSW, X86_INS_STOSW,
-#ifndef CAPSTONE_DIET
- { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STR16r, X86_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STR32r, X86_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STR64r, X86_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_STRm, X86_INS_STR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16i16, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16ri, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16ri8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16rm, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16rr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB16rr_REV, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32i32, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32ri, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32ri8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32rm, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32rr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB32rr_REV, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64i32, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64mi32, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64ri32, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64ri8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64rm, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64rr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB64rr_REV, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8i8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8mi, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8mi8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8mr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8ri, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8ri8, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8rm, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8rr, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SUB8rr_REV, X86_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SWAPGS, X86_INS_SWAPGS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_SYSCALL, X86_INS_SYSCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
-#endif
- },
- {
- X86_SYSENTER, X86_INS_SYSENTER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
-#endif
- },
- {
- X86_SYSEXIT, X86_INS_SYSEXIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
-#endif
- },
- {
- X86_SYSEXIT64, X86_INS_SYSEXIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_SYSRET, X86_INS_SYSRET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
-#endif
- },
- {
- X86_SYSRET64, X86_INS_SYSRET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_T1MSKC32rm, X86_INS_T1MSKC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_T1MSKC32rr, X86_INS_T1MSKC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_T1MSKC64rm, X86_INS_T1MSKC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_T1MSKC64rr, X86_INS_T1MSKC,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16i16, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16mi, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16mi_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16ri, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16ri_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16rm, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST16rr, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32i32, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32mi, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32mi_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32ri, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32ri_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32rm, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST32rr, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64i32, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64mi32, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64mi32_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64ri32, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64ri32_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64rm, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST64rr, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8i8, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8mi, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8mi_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8ri, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8ri_alt, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8rm, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TEST8rr, X86_INS_TEST,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TRAP, X86_INS_UD2,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT16rm, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT16rr, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT32rm, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT32rr, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT64rm, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZCNT64rr, X86_INS_TZCNT,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
-#endif
- },
- {
- X86_TZMSK32rm, X86_INS_TZMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_TZMSK32rr, X86_INS_TZMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_TZMSK64rm, X86_INS_TZMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_TZMSK64rr, X86_INS_TZMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
-#endif
- },
- {
- X86_UD2B, X86_INS_UD2B,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VERRm, X86_INS_VERR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VERRr, X86_INS_VERR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VERWm, X86_INS_VERW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VERWr, X86_INS_VERW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_VMCALL, X86_INS_VMCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMCLEARm, X86_INS_VMCLEAR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMFUNC, X86_INS_VMFUNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMLAUNCH, X86_INS_VMLAUNCH,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMLOAD32, X86_INS_VMLOAD,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMLOAD64, X86_INS_VMLOAD,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMMCALL, X86_INS_VMMCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMPTRLDm, X86_INS_VMPTRLD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMPTRSTm, X86_INS_VMPTRST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMREAD32rm, X86_INS_VMREAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMREAD32rr, X86_INS_VMREAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMREAD64rm, X86_INS_VMREAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMREAD64rr, X86_INS_VMREAD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMRESUME, X86_INS_VMRESUME,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMRUN32, X86_INS_VMRUN,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMRUN64, X86_INS_VMRUN,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMSAVE32, X86_INS_VMSAVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMSAVE64, X86_INS_VMSAVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMWRITE32rm, X86_INS_VMWRITE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMWRITE32rr, X86_INS_VMWRITE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_VMWRITE64rm, X86_INS_VMWRITE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMWRITE64rr, X86_INS_VMWRITE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_VMXOFF, X86_INS_VMXOFF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_VMXON, X86_INS_VMXON,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
-#endif
- },
- {
- X86_WBINVD, X86_INS_WBINVD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_WRFSBASE, X86_INS_WRFSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_WRFSBASE64, X86_INS_WRFSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_WRGSBASE, X86_INS_WRGSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_WRGSBASE64, X86_INS_WRGSBASE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_WRMSR, X86_INS_WRMSR,
-#ifndef CAPSTONE_DIET
- { X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD16rm, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD16rr, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD32rm, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD32rr, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD64rm, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD64rr, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD8rm, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XADD8rr, X86_INS_XADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG16ar, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG16rm, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG16rr, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG32ar, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG32ar64, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG32rm, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG32rr, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG64ar, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG64rm, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG64rr, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG8rm, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCHG8rr, X86_INS_XCHG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCRYPTCBC, X86_INS_XCRYPTCBC,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCRYPTCFB, X86_INS_XCRYPTCFB,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCRYPTCTR, X86_INS_XCRYPTCTR,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCRYPTECB, X86_INS_XCRYPTECB,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XCRYPTOFB, X86_INS_XCRYPTOFB,
-#ifndef CAPSTONE_DIET
- { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XGETBV, X86_INS_XGETBV,
-#ifndef CAPSTONE_DIET
- { X86_REG_ECX, 0 }, { X86_REG_EDX, X86_REG_EAX, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XLAT, X86_INS_XLATB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16i16, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16ri, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16ri8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16rm, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16rr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR16rr_REV, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32i32, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32ri, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32ri8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32rm, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32rr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR32rr_REV, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64i32, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64mi32, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64ri32, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64ri8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64rm, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64rr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR64rr_REV, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8i8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8mi, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8mi8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8mr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8ri, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8ri8, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8rm, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8rr, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XOR8rr_REV, X86_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XRSTOR, X86_INS_XRSTOR,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XRSTOR64, X86_INS_XRSTOR64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XRSTORS, X86_INS_XRSTORS,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XRSTORS64, X86_INS_XRSTORS64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVE, X86_INS_XSAVE,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVE64, X86_INS_XSAVE64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVEC, X86_INS_XSAVEC,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVEC64, X86_INS_XSAVEC64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVEOPT, X86_INS_XSAVEOPT,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVEOPT64, X86_INS_XSAVEOPT64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVES, X86_INS_XSAVES,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSAVES64, X86_INS_XSAVES64,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
-#endif
- },
- {
- X86_XSETBV, X86_INS_XSETBV,
-#ifndef CAPSTONE_DIET
- { X86_REG_EDX, X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSHA1, X86_INS_XSHA1,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSHA256, X86_INS_XSHA256,
-#ifndef CAPSTONE_DIET
- { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- X86_XSTORE, X86_INS_XSTORE,
-#ifndef CAPSTONE_DIET
- { X86_REG_RDX, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RDI, 0 }, { 0 }, 0, 0
-#endif
- },
+#include "X86MappingInsn_reduce.inc"
};
#endif
diff --git a/arch/X86/X86MappingInsn.inc b/arch/X86/X86MappingInsn.inc
new file mode 100644
index 0000000..e512f39
--- /dev/null
+++ b/arch/X86/X86MappingInsn.inc
@@ -0,0 +1,50901 @@
+// This is auto-gen data for Capstone engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{
+ X86_AAA, X86_INS_AAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_AAD8i8, X86_INS_AAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_AAM8i8, X86_INS_AAM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_AAS, X86_INS_AAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ABS_F, X86_INS_FABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16i16, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16mi, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16mi8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16mr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16ri, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16ri8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16rm, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16rr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16rr_REV, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32i32, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32mi, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32mi8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32mr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32ri, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32ri8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32rm, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32rr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32rr_REV, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64i32, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64mi32, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64mi8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64mr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64ri32, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64ri8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64rm, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64rr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64rr_REV, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8i8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8mi, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8mi8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8mr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8ri, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8ri8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8rm, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8rr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8rr_REV, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADCX32rm, X86_INS_ADCX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADCX32rr, X86_INS_ADCX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADCX64rm, X86_INS_ADCX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADCX64rr, X86_INS_ADCX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16i16, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16ri, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16ri8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16rm, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16rr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16rr_REV, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32i32, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32ri, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32ri8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32rm, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32rr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32rr_REV, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64i32, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64mi32, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64ri32, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64ri8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64rm, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64rr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64rr_REV, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8i8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8ri, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8ri8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8rm, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8rr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8rr_REV, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDPDrm, X86_INS_ADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDPDrr, X86_INS_ADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDPSrm, X86_INS_ADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDPSrr, X86_INS_ADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSDrm, X86_INS_ADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSDrm_Int, X86_INS_ADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSDrr, X86_INS_ADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSDrr_Int, X86_INS_ADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSSrm, X86_INS_ADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSSrm_Int, X86_INS_ADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSSrr, X86_INS_ADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSSrr_Int, X86_INS_ADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSUBPDrm, X86_INS_ADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSUBPDrr, X86_INS_ADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSUBPSrm, X86_INS_ADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADDSUBPSrr, X86_INS_ADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD_F32m, X86_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD_F64m, X86_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD_FI16m, X86_INS_FIADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD_FI32m, X86_INS_FIADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD_FPrST0, X86_INS_FADDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD_FST0r, X86_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD_FrST0, X86_INS_FADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADOX32rm, X86_INS_ADOX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADOX32rr, X86_INS_ADOX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADOX64rm, X86_INS_ADOX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADOX64rr, X86_INS_ADOX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESDECLASTrm, X86_INS_AESDECLAST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESDECLASTrr, X86_INS_AESDECLAST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESDECrm, X86_INS_AESDEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESDECrr, X86_INS_AESDEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESENCLASTrm, X86_INS_AESENCLAST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESENCLASTrr, X86_INS_AESENCLAST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESENCrm, X86_INS_AESENC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESENCrr, X86_INS_AESENC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESIMCrm, X86_INS_AESIMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESIMCrr, X86_INS_AESIMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESKEYGENASSIST128rm, X86_INS_AESKEYGENASSIST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AESKEYGENASSIST128rr, X86_INS_AESKEYGENASSIST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16i16, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16ri, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16ri8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16rm, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16rr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16rr_REV, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32i32, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32ri, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32ri8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32rm, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32rr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32rr_REV, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64i32, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64mi32, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64ri32, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64ri8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64rm, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64rr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64rr_REV, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8i8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8ri, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8ri8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8rm, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8rr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8rr_REV, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDN32rm, X86_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDN32rr, X86_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDN64rm, X86_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDN64rr, X86_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDNPDrm, X86_INS_ANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDNPDrr, X86_INS_ANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDNPSrm, X86_INS_ANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDNPSrr, X86_INS_ANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDPDrm, X86_INS_ANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDPDrr, X86_INS_ANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDPSrm, X86_INS_ANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDPSrr, X86_INS_ANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ARPL16mr, X86_INS_ARPL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ARPL16rr, X86_INS_ARPL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTR32rm, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTR32rr, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTR64rm, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTR64rr, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTRI32mi, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTRI32ri, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTRI64mi, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTRI64ri, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCFILL32rm, X86_INS_BLCFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCFILL32rr, X86_INS_BLCFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCFILL64rm, X86_INS_BLCFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCFILL64rr, X86_INS_BLCFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCI32rm, X86_INS_BLCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCI32rr, X86_INS_BLCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCI64rm, X86_INS_BLCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCI64rr, X86_INS_BLCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCIC32rm, X86_INS_BLCIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCIC32rr, X86_INS_BLCIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCIC64rm, X86_INS_BLCIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCIC64rr, X86_INS_BLCIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCMSK32rm, X86_INS_BLCMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCMSK32rr, X86_INS_BLCMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCMSK64rm, X86_INS_BLCMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCMSK64rr, X86_INS_BLCMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCS32rm, X86_INS_BLCS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCS32rr, X86_INS_BLCS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCS64rm, X86_INS_BLCS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCS64rr, X86_INS_BLCS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLENDPDrmi, X86_INS_BLENDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLENDPDrri, X86_INS_BLENDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLENDPSrmi, X86_INS_BLENDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLENDPSrri, X86_INS_BLENDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLENDVPDrm0, X86_INS_BLENDVPD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLENDVPDrr0, X86_INS_BLENDVPD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLENDVPSrm0, X86_INS_BLENDVPS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLENDVPSrr0, X86_INS_BLENDVPS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSFILL32rm, X86_INS_BLSFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSFILL32rr, X86_INS_BLSFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSFILL64rm, X86_INS_BLSFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSFILL64rr, X86_INS_BLSFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSI32rm, X86_INS_BLSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSI32rr, X86_INS_BLSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSI64rm, X86_INS_BLSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSI64rr, X86_INS_BLSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSIC32rm, X86_INS_BLSIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSIC32rr, X86_INS_BLSIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSIC64rm, X86_INS_BLSIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSIC64rr, X86_INS_BLSIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSMSK32rm, X86_INS_BLSMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSMSK32rr, X86_INS_BLSMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSMSK64rm, X86_INS_BLSMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSMSK64rr, X86_INS_BLSMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSR32rm, X86_INS_BLSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSR32rr, X86_INS_BLSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSR64rm, X86_INS_BLSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSR64rr, X86_INS_BLSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BOUNDS16rm, X86_INS_BOUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_BOUNDS32rm, X86_INS_BOUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF16rm, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF16rr, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF32rm, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF32rr, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF64rm, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF64rr, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR16rm, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR16rr, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR32rm, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR32rr, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR64rm, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR64rr, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSWAP32r, X86_INS_BSWAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSWAP64r, X86_INS_BSWAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT16mi8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT16mr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT16ri8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT16rr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT32mi8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT32mr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT32ri8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT32rr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT64mi8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT64mr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT64ri8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT64rr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC16mi8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC16mr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC16ri8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC16rr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC32mi8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC32mr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC32ri8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC32rr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC64mi8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC64mr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC64ri8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC64rr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR16mi8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR16mr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR16ri8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR16rr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR32mi8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR32mr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR32ri8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR32rr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR64mi8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR64mr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR64ri8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR64rr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS16mi8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS16mr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS16ri8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS16rr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS32mi8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS32mr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS32ri8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS32rr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS64mi8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS64mr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS64ri8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS64rr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BZHI32rm, X86_INS_BZHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_BZHI32rr, X86_INS_BZHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_BZHI64rm, X86_INS_BZHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_BZHI64rr, X86_INS_BZHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL16m, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL16r, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL32m, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL32r, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL64m, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL64pcrel32, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL64r, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALLpcrel16, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALLpcrel32, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CBW, X86_INS_CBW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CDQ, X86_INS_CDQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CDQE, X86_INS_CDQE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_RAX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CHS_F, X86_INS_FCHS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLAC, X86_INS_CLAC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLC, X86_INS_CLC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLD, X86_INS_CLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLFLUSH, X86_INS_CLFLUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CLFLUSHOPT, X86_INS_CLFLUSHOPT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLGI, X86_INS_CLGI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_CLI, X86_INS_CLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLTS, X86_INS_CLTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLWB, X86_INS_CLWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMC, X86_INS_CMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA16rm, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA16rr, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA32rm, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA32rr, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA64rm, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA64rr, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE16rm, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE16rr, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE32rm, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE32rr, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE64rm, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE64rr, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB16rm, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB16rr, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB32rm, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB32rr, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB64rm, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB64rr, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE16rm, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE16rr, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE32rm, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE32rr, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE64rm, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE64rr, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE_F, X86_INS_FCMOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB_F, X86_INS_FCMOVB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE16rm, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE16rr, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE32rm, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE32rr, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE64rm, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE64rr, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE_F, X86_INS_FCMOVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG16rm, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG16rr, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG32rm, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG32rr, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG64rm, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG64rr, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE16rm, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE16rr, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE32rm, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE32rr, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE64rm, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE64rr, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL16rm, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL16rr, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL32rm, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL32rr, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL64rm, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL64rr, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE16rm, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE16rr, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE32rm, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE32rr, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE64rm, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE64rr, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNBE_F, X86_INS_FCMOVNBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNB_F, X86_INS_FCMOVNB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE16rm, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE16rr, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE32rm, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE32rr, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE64rm, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE64rr, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE_F, X86_INS_FCMOVNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO16rm, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO16rr, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO32rm, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO32rr, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO64rm, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO64rr, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP16rm, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP16rr, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP32rm, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP32rr, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP64rm, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP64rr, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP_F, X86_INS_FCMOVNU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS16rm, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS16rr, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS32rm, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS32rr, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS64rm, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS64rr, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO16rm, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO16rr, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO32rm, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO32rr, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO64rm, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO64rr, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP16rm, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP16rr, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP32rm, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP32rr, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP64rm, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP64rr, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP_F, X86_INS_FCMOVU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS16rm, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS16rr, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS32rm, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS32rr, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS64rm, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS64rr, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16i16, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16mi, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16mi8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16mr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16ri, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16ri8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16rm, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16rr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16rr_REV, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32i32, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32mi, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32mi8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32mr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32ri, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32ri8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32rm, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32rr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32rr_REV, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64i32, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64mi32, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64mi8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64mr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64ri32, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64ri8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64rm, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64rr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64rr_REV, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8i8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8mi, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8mi8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8mr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8ri, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8ri8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8rm, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8rr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8rr_REV, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPPDrmi, X86_INS_CMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPPDrmi_alt, X86_INS_CMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPPDrri, X86_INS_CMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPPDrri_alt, X86_INS_CMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPPSrmi, X86_INS_CMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPPSrmi_alt, X86_INS_CMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPPSrri, X86_INS_CMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPPSrri_alt, X86_INS_CMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSB, X86_INS_CMPSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSDrm, X86_INS_CMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSDrm_alt, X86_INS_CMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSDrr, X86_INS_CMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSDrr_alt, X86_INS_CMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSL, X86_INS_CMPSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSQ, X86_INS_CMPSQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSSrm, X86_INS_CMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSSrm_alt, X86_INS_CMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSSrr, X86_INS_CMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSSrr_alt, X86_INS_CMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSW, X86_INS_CMPSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG16B, X86_INS_CMPXCHG16B,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG16rm, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG16rr, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG32rm, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG32rr, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG64rm, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG64rr, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG8B, X86_INS_CMPXCHG8B,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG8rm, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG8rr, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_COMISDrm, X86_INS_COMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_COMISDrr, X86_INS_COMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_COMISSrm, X86_INS_COMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_COMISSrr, X86_INS_COMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_COMP_FST0r, X86_INS_FCOMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_COM_FIPr, X86_INS_FCOMPI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_COM_FIr, X86_INS_FCOMI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_COM_FST0r, X86_INS_FCOM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_COS_F, X86_INS_FCOS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CPUID, X86_INS_CPUID,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CQO, X86_INS_CQO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CRC32r32m16, X86_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_CRC32r32m32, X86_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_CRC32r32m8, X86_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_CRC32r32r16, X86_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_CRC32r32r32, X86_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_CRC32r32r8, X86_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_CRC32r64m64, X86_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_CRC32r64m8, X86_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_CRC32r64r64, X86_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_CRC32r64r8, X86_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTDQ2PDrm, X86_INS_CVTDQ2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTDQ2PDrr, X86_INS_CVTDQ2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTDQ2PSrm, X86_INS_CVTDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTDQ2PSrr, X86_INS_CVTDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTPD2DQrm, X86_INS_CVTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTPD2DQrr, X86_INS_CVTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTPD2PSrm, X86_INS_CVTPD2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTPD2PSrr, X86_INS_CVTPD2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTPS2DQrm, X86_INS_CVTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTPS2DQrr, X86_INS_CVTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTPS2PDrm, X86_INS_CVTPS2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTPS2PDrr, X86_INS_CVTPS2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSD2SI64rm, X86_INS_CVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSD2SI64rr, X86_INS_CVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSD2SIrm, X86_INS_CVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSD2SIrr, X86_INS_CVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSD2SSrm, X86_INS_CVTSD2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSD2SSrr, X86_INS_CVTSD2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSI2SD64rm, X86_INS_CVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSI2SD64rr, X86_INS_CVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSI2SDrm, X86_INS_CVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSI2SDrr, X86_INS_CVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSI2SS64rm, X86_INS_CVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSI2SS64rr, X86_INS_CVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSI2SSrm, X86_INS_CVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSI2SSrr, X86_INS_CVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSS2SDrm, X86_INS_CVTSS2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSS2SDrr, X86_INS_CVTSS2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSS2SI64rm, X86_INS_CVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSS2SI64rr, X86_INS_CVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSS2SIrm, X86_INS_CVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTSS2SIrr, X86_INS_CVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTPD2DQrm, X86_INS_CVTTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTPD2DQrr, X86_INS_CVTTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTPS2DQrm, X86_INS_CVTTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTPS2DQrr, X86_INS_CVTTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTSD2SI64rm, X86_INS_CVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTSD2SI64rr, X86_INS_CVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTSD2SIrm, X86_INS_CVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTSD2SIrr, X86_INS_CVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTSS2SI64rm, X86_INS_CVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTSS2SI64rr, X86_INS_CVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTSS2SIrm, X86_INS_CVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CVTTSS2SIrr, X86_INS_CVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_CWD, X86_INS_CWD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CWDE, X86_INS_CWDE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DAA, X86_INS_DAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_DAS, X86_INS_DAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_DATA16_PREFIX, X86_INS_DATA16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC16m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC16r, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC16r_alt, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC32m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC32r, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC32r_alt, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC64m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC64r, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC8m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC8r, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV16m, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV16r, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV32m, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV32r, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV64m, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV64r, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV8m, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV8r, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVPDrm, X86_INS_DIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVPDrr, X86_INS_DIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVPSrm, X86_INS_DIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVPSrr, X86_INS_DIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVR_F32m, X86_INS_FDIVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVR_F64m, X86_INS_FDIVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVR_FI16m, X86_INS_FIDIVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVR_FI32m, X86_INS_FIDIVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVR_FPrST0, X86_INS_FDIVRP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVR_FST0r, X86_INS_FDIVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVR_FrST0, X86_INS_FDIVR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVSDrm, X86_INS_DIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVSDrm_Int, X86_INS_DIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVSDrr, X86_INS_DIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVSDrr_Int, X86_INS_DIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVSSrm, X86_INS_DIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVSSrm_Int, X86_INS_DIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVSSrr, X86_INS_DIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIVSSrr_Int, X86_INS_DIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV_F32m, X86_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV_F64m, X86_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV_FI16m, X86_INS_FIDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV_FI32m, X86_INS_FIDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV_FPrST0, X86_INS_FDIVP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV_FST0r, X86_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV_FrST0, X86_INS_FDIV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DPPDrmi, X86_INS_DPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_DPPDrri, X86_INS_DPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_DPPSrmi, X86_INS_DPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_DPPSrri, X86_INS_DPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_ENCLS, X86_INS_ENCLS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ENCLU, X86_INS_ENCLU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ENTER, X86_INS_ENTER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_EXTRACTPSmr, X86_INS_EXTRACTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_EXTRACTPSrr, X86_INS_EXTRACTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_EXTRQ, X86_INS_EXTRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
+#endif
+},
+{
+ X86_EXTRQI, X86_INS_EXTRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
+#endif
+},
+{
+ X86_F2XM1, X86_INS_F2XM1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FARCALL16i, X86_INS_LCALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_FARCALL16m, X86_INS_LCALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
+#endif
+},
+{
+ X86_FARCALL32i, X86_INS_LCALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_FARCALL32m, X86_INS_LCALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
+#endif
+},
+{
+ X86_FARCALL64, X86_INS_LCALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
+#endif
+},
+{
+ X86_FARJMP16i, X86_INS_LJMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_FARJMP16m, X86_INS_LJMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ X86_FARJMP32i, X86_INS_LJMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_FARJMP32m, X86_INS_LJMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ X86_FARJMP64, X86_INS_LJMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ X86_FBLDm, X86_INS_FBLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FBSTPm, X86_INS_FBSTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FCOM32m, X86_INS_FCOM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FCOM64m, X86_INS_FCOM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FCOMP32m, X86_INS_FCOMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FCOMP64m, X86_INS_FCOMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FCOMPP, X86_INS_FCOMPP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FDECSTP, X86_INS_FDECSTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FEMMS, X86_INS_FEMMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_FFREE, X86_INS_FFREE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FICOM16m, X86_INS_FICOM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FICOM32m, X86_INS_FICOM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FICOMP16m, X86_INS_FICOMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FICOMP32m, X86_INS_FICOMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FINCSTP, X86_INS_FINCSTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FLDCW16m, X86_INS_FLDCW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FLDENVm, X86_INS_FLDENV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FLDL2E, X86_INS_FLDL2E,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FLDL2T, X86_INS_FLDL2T,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FLDLG2, X86_INS_FLDLG2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FLDLN2, X86_INS_FLDLN2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FLDPI, X86_INS_FLDPI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FNCLEX, X86_INS_FNCLEX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FNINIT, X86_INS_FNINIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FNOP, X86_INS_FNOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FNSTCW16m, X86_INS_FNSTCW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FNSTSW16r, X86_INS_FNSTSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_FPSW, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FNSTSWm, X86_INS_FNSTSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FPATAN, X86_INS_FPATAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FPREM, X86_INS_FPREM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FPREM1, X86_INS_FPREM1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FPTAN, X86_INS_FPTAN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FP_FFREEP, X86_INS_FFREEP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FRNDINT, X86_INS_FRNDINT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FRSTORm, X86_INS_FRSTOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FSAVEm, X86_INS_FNSAVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FSCALE, X86_INS_FSCALE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FSETPM, X86_INS_FSETPM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FSINCOS, X86_INS_FSINCOS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FSTENVm, X86_INS_FNSTENV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FXAM, X86_INS_FXAM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FXRSTOR, X86_INS_FXRSTOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FXRSTOR64, X86_INS_FXRSTOR64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_FXSAVE, X86_INS_FXSAVE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FXSAVE64, X86_INS_FXSAVE64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_FXTRACT, X86_INS_FXTRACT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FYL2X, X86_INS_FYL2X,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FYL2XP1, X86_INS_FYL2XP1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FsANDNPDrm, X86_INS_ANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsANDNPDrr, X86_INS_ANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsANDNPSrm, X86_INS_ANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsANDNPSrr, X86_INS_ANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsANDPDrm, X86_INS_ANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsANDPDrr, X86_INS_ANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsANDPSrm, X86_INS_ANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsANDPSrr, X86_INS_ANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsMOVAPDrm, X86_INS_MOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsMOVAPSrm, X86_INS_MOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsORPDrm, X86_INS_ORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsORPDrr, X86_INS_ORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsORPSrm, X86_INS_ORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsORPSrr, X86_INS_ORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsVMOVAPDrm, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsVMOVAPSrm, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsXORPDrm, X86_INS_XORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsXORPDrr, X86_INS_XORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsXORPSrm, X86_INS_XORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FsXORPSrr, X86_INS_XORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvANDNPDrm, X86_INS_ANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvANDNPDrr, X86_INS_ANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvANDNPSrm, X86_INS_ANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvANDNPSrr, X86_INS_ANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvANDPDrm, X86_INS_ANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvANDPDrr, X86_INS_ANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvANDPSrm, X86_INS_ANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvANDPSrr, X86_INS_ANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvORPDrm, X86_INS_ORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvORPDrr, X86_INS_ORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvORPSrm, X86_INS_ORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvORPSrr, X86_INS_ORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvXORPDrm, X86_INS_XORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvXORPDrr, X86_INS_XORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvXORPSrm, X86_INS_XORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_FvXORPSrr, X86_INS_XORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_GETSEC, X86_INS_GETSEC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_HADDPDrm, X86_INS_HADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_HADDPDrr, X86_INS_HADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_HADDPSrm, X86_INS_HADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_HADDPSrr, X86_INS_HADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_HLT, X86_INS_HLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_HSUBPDrm, X86_INS_HSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_HSUBPDrr, X86_INS_HSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_HSUBPSrm, X86_INS_HSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_HSUBPSrr, X86_INS_HSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV16m, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV16r, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV32m, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV32r, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV64m, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV64r, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV8m, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV8r, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ILD_F16m, X86_INS_FILD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ILD_F32m, X86_INS_FILD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ILD_F64m, X86_INS_FILD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16m, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16r, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rm, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rmi, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rmi8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rr, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rri, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rri8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32m, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32r, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rm, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rmi, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rmi8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rr, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rri, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rri8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64m, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64r, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rm, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rmi32, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rmi8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rr, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rri32, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rri8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL8m, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL8r, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN16ri, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN16rr, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN32ri, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN32rr, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN8ri, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN8rr, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC16m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC16r, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC16r_alt, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INC32m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC32r, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC32r_alt, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INC64m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC64r, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC8m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC8r, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INSB, X86_INS_INSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INSERTPSrm, X86_INS_INSERTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_INSERTPSrr, X86_INS_INSERTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_INSERTQ, X86_INS_INSERTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
+#endif
+},
+{
+ X86_INSERTQI, X86_INS_INSERTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
+#endif
+},
+{
+ X86_INSL, X86_INS_INSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INSW, X86_INS_INSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INT, X86_INS_INT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
+#endif
+},
+{
+ X86_INT1, X86_INS_INT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_INT, 0 }, 0, 0
+#endif
+},
+{
+ X86_INT3, X86_INS_INT3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
+#endif
+},
+{
+ X86_INTO, X86_INS_INTO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_INT, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVD, X86_INS_INVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INVEPT32, X86_INS_INVEPT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVEPT64, X86_INS_INVEPT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVLPG, X86_INS_INVLPG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INVLPGA32, X86_INS_INVLPGA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVLPGA64, X86_INS_INVLPGA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVPCID32, X86_INS_INVPCID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVPCID64, X86_INS_INVPCID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVVPID32, X86_INS_INVVPID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVVPID64, X86_INS_INVVPID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_IRET16, X86_INS_IRET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
+#endif
+},
+{
+ X86_IRET32, X86_INS_IRETD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
+#endif
+},
+{
+ X86_IRET64, X86_INS_IRETQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_ISTT_FP16m, X86_INS_FISTTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ISTT_FP32m, X86_INS_FISTTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ISTT_FP64m, X86_INS_FISTTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IST_F16m, X86_INS_FIST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IST_F32m, X86_INS_FIST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IST_FP16m, X86_INS_FISTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IST_FP32m, X86_INS_FISTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IST_FP64m, X86_INS_FISTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CMPSDrm, X86_INS_CMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CMPSDrr, X86_INS_CMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CMPSSrm, X86_INS_CMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CMPSSrr, X86_INS_CMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_COMISDrm, X86_INS_COMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_COMISDrr, X86_INS_COMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_COMISSrm, X86_INS_COMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_COMISSrr, X86_INS_COMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSD2SSrm, X86_INS_CVTSD2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSD2SSrr, X86_INS_CVTSD2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSI2SD64rm, X86_INS_CVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSI2SD64rr, X86_INS_CVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSI2SDrm, X86_INS_CVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSI2SDrr, X86_INS_CVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSI2SS64rm, X86_INS_CVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSI2SS64rr, X86_INS_CVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSI2SSrm, X86_INS_CVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSI2SSrr, X86_INS_CVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSS2SDrm, X86_INS_CVTSS2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTSS2SDrr, X86_INS_CVTSS2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTTSD2SI64rm, X86_INS_CVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTTSD2SI64rr, X86_INS_CVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTTSD2SIrm, X86_INS_CVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTTSD2SIrr, X86_INS_CVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTTSS2SI64rm, X86_INS_CVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTTSS2SI64rr, X86_INS_CVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTTSS2SIrm, X86_INS_CVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_CVTTSS2SIrr, X86_INS_CVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_UCOMISDrm, X86_INS_UCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_UCOMISDrr, X86_INS_UCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_UCOMISSrm, X86_INS_UCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_UCOMISSrr, X86_INS_UCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCMPSDrm, X86_INS_VCMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCMPSDrr, X86_INS_VCMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCMPSSrm, X86_INS_VCMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCMPSSrr, X86_INS_VCMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCOMISDZrm, X86_INS_VCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCOMISDZrr, X86_INS_VCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCOMISDrm, X86_INS_VCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCOMISDrr, X86_INS_VCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCOMISSZrm, X86_INS_VCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCOMISSZrr, X86_INS_VCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCOMISSrm, X86_INS_VCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCOMISSrr, X86_INS_VCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSD2SSrm, X86_INS_VCVTSD2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSD2SSrr, X86_INS_VCVTSD2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SD64Zrm, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SD64Zrr, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SD64rm, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SD64rr, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SDZrm, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SDZrr, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SDrm, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SDrr, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SS64Zrm, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SS64Zrr, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SS64rm, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SS64rr, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SSZrm, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SSZrr, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SSrm, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSI2SSrr, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSS2SDrm, X86_INS_VCVTSS2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTSS2SDrr, X86_INS_VCVTSS2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTUSI2SD64Zrm, X86_INS_VCVTUSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTUSI2SD64Zrr, X86_INS_VCVTUSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTUSI2SS64Zrm, X86_INS_VCVTUSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTUSI2SS64Zrr, X86_INS_VCVTUSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VUCOMISDZrm, X86_INS_VUCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VUCOMISDZrr, X86_INS_VUCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VUCOMISDrm, X86_INS_VUCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VUCOMISDrr, X86_INS_VUCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VUCOMISSZrm, X86_INS_VUCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VUCOMISSZrr, X86_INS_VUCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VUCOMISSrm, X86_INS_VUCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_Int_VUCOMISSrr, X86_INS_VUCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_JAE_1, X86_INS_JAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JAE_2, X86_INS_JAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JAE_4, X86_INS_JAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JA_1, X86_INS_JA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JA_2, X86_INS_JA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JA_4, X86_INS_JA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JBE_1, X86_INS_JBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JBE_2, X86_INS_JBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JBE_4, X86_INS_JBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JB_1, X86_INS_JB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JB_2, X86_INS_JB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JB_4, X86_INS_JB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JCXZ, X86_INS_JCXZ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CX, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JECXZ, X86_INS_JECXZ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ECX, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JE_1, X86_INS_JE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JE_2, X86_INS_JE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JE_4, X86_INS_JE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JGE_1, X86_INS_JGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JGE_2, X86_INS_JGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JGE_4, X86_INS_JGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JG_1, X86_INS_JG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JG_2, X86_INS_JG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JG_4, X86_INS_JG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JLE_1, X86_INS_JLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JLE_2, X86_INS_JLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JLE_4, X86_INS_JLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JL_1, X86_INS_JL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JL_2, X86_INS_JL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JL_4, X86_INS_JL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JMP16m, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP16r, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP32m, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP32r, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP64m, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP64r, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP_1, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JMP_2, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JMP_4, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNE_1, X86_INS_JNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNE_2, X86_INS_JNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNE_4, X86_INS_JNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNO_1, X86_INS_JNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNO_2, X86_INS_JNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNO_4, X86_INS_JNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNP_1, X86_INS_JNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNP_2, X86_INS_JNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNP_4, X86_INS_JNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNS_1, X86_INS_JNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNS_2, X86_INS_JNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNS_4, X86_INS_JNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JO_1, X86_INS_JO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JO_2, X86_INS_JO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JO_4, X86_INS_JO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JP_1, X86_INS_JP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JP_2, X86_INS_JP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JP_4, X86_INS_JP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JRCXZ, X86_INS_JRCXZ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RCX, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JS_1, X86_INS_JS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JS_2, X86_INS_JS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JS_4, X86_INS_JS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_KANDBrr, X86_INS_KANDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KANDDrr, X86_INS_KANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KANDNBrr, X86_INS_KANDNB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KANDNDrr, X86_INS_KANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KANDNQrr, X86_INS_KANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KANDNWrr, X86_INS_KANDNW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KANDQrr, X86_INS_KANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KANDWrr, X86_INS_KANDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVBkk, X86_INS_KMOVB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVBkm, X86_INS_KMOVB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVBkr, X86_INS_KMOVB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVBmk, X86_INS_KMOVB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVBrk, X86_INS_KMOVB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVDkk, X86_INS_KMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVDkm, X86_INS_KMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVDkr, X86_INS_KMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVDmk, X86_INS_KMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVDrk, X86_INS_KMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVQkk, X86_INS_KMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVQkm, X86_INS_KMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVQkr, X86_INS_KMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVQmk, X86_INS_KMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVQrk, X86_INS_KMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVWkk, X86_INS_KMOVW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVWkm, X86_INS_KMOVW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVWkr, X86_INS_KMOVW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVWmk, X86_INS_KMOVW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KMOVWrk, X86_INS_KMOVW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KNOTBrr, X86_INS_KNOTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KNOTDrr, X86_INS_KNOTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KNOTQrr, X86_INS_KNOTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KNOTWrr, X86_INS_KNOTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KORBrr, X86_INS_KORB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KORDrr, X86_INS_KORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KORQrr, X86_INS_KORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KORTESTBrr, X86_INS_KORTESTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KORTESTDrr, X86_INS_KORTESTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KORTESTQrr, X86_INS_KORTESTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KORTESTWrr, X86_INS_KORTESTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KORWrr, X86_INS_KORW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KSHIFTLBri, X86_INS_KSHIFTLB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KSHIFTLDri, X86_INS_KSHIFTLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KSHIFTLQri, X86_INS_KSHIFTLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KSHIFTLWri, X86_INS_KSHIFTLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KSHIFTRBri, X86_INS_KSHIFTRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KSHIFTRDri, X86_INS_KSHIFTRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KSHIFTRQri, X86_INS_KSHIFTRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KSHIFTRWri, X86_INS_KSHIFTRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KUNPCKBWrr, X86_INS_KUNPCKBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KXNORBrr, X86_INS_KXNORB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KXNORDrr, X86_INS_KXNORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KXNORQrr, X86_INS_KXNORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KXNORWrr, X86_INS_KXNORW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_KXORBrr, X86_INS_KXORB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KXORDrr, X86_INS_KXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KXORQrr, X86_INS_KXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_KXORWrr, X86_INS_KXORW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_LAHF, X86_INS_LAHF,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_AH, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR16rm, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR16rr, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR32rm, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR32rr, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR64rm, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR64rr, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG16, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG16B, X86_INS_CMPXCHG16B,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG32, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG64, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG8, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG8B, X86_INS_CMPXCHG8B,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LDDQUrm, X86_INS_LDDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_LDMXCSR, X86_INS_LDMXCSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_LDS16rm, X86_INS_LDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LDS32rm, X86_INS_LDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LD_F0, X86_INS_FLDZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LD_F1, X86_INS_FLD1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LD_F32m, X86_INS_FLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LD_F64m, X86_INS_FLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LD_F80m, X86_INS_FLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LD_Frr, X86_INS_FLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LEA16r, X86_INS_LEA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LEA32r, X86_INS_LEA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LEA64_32r, X86_INS_LEA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LEA64r, X86_INS_LEA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LEAVE, X86_INS_LEAVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LEAVE64, X86_INS_LEAVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LES16rm, X86_INS_LES,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LES32rm, X86_INS_LES,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LFENCE, X86_INS_LFENCE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_LFS16rm, X86_INS_LFS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LFS32rm, X86_INS_LFS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LFS64rm, X86_INS_LFS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LGDT16m, X86_INS_LGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LGDT32m, X86_INS_LGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LGDT64m, X86_INS_LGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LGS16rm, X86_INS_LGS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LGS32rm, X86_INS_LGS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LGS64rm, X86_INS_LGS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LIDT16m, X86_INS_LIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LIDT32m, X86_INS_LIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LIDT64m, X86_INS_LIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LLDT16m, X86_INS_LLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LLDT16r, X86_INS_LLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LMSW16m, X86_INS_LMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LMSW16r, X86_INS_LMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD16mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD16mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD16mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD32mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD32mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD32mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD64mi32, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD64mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD64mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD8mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD8mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND16mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND16mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND16mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND32mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND32mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND32mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND64mi32, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND64mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND64mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND8mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND8mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_DEC16m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_DEC32m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_DEC64m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_DEC8m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_INC16m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_INC32m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_INC64m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_INC8m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR16mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR16mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR16mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR32mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR32mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR32mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR64mi32, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR64mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR64mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR8mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR8mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB16mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB16mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB16mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB32mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB32mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB32mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB64mi32, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB64mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB64mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB8mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB8mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR16mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR16mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR16mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR32mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR32mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR32mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR64mi32, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR64mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR64mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR8mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR8mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LODSB, X86_INS_LODSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AL, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LODSL, X86_INS_LODSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EAX, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LODSQ, X86_INS_LODSQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_RAX, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LODSW, X86_INS_LODSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AX, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOOP, X86_INS_LOOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOOPE, X86_INS_LOOPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOOPNE, X86_INS_LOOPNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETIL, X86_INS_RETF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETIQ, X86_INS_RETFQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETIW, X86_INS_RETF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETL, X86_INS_RETF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETQ, X86_INS_RETFQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETW, X86_INS_RETF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL16rm, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL16rr, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL32rm, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL32rr, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL64rm, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL64rr, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSS16rm, X86_INS_LSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSS32rm, X86_INS_LSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSS64rm, X86_INS_LSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LTRm, X86_INS_LTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LTRr, X86_INS_LTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LXADD16, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LXADD32, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LXADD64, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LXADD8, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT16rm, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT16rr, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT32rm, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT32rr, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT64rm, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT64rr, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MASKMOVDQU, X86_INS_MASKMOVDQU,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, 0 }, { 0 }, { X86_GRP_SSE2, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_MASKMOVDQU64, X86_INS_MASKMOVDQU,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDI, 0 }, { 0 }, { X86_GRP_SSE2, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXCPDrm, X86_INS_MAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXCPDrr, X86_INS_MAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXCPSrm, X86_INS_MAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXCPSrr, X86_INS_MAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXCSDrm, X86_INS_MAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXCSDrr, X86_INS_MAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXCSSrm, X86_INS_MAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXCSSrr, X86_INS_MAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXPDrm, X86_INS_MAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXPDrr, X86_INS_MAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXPSrm, X86_INS_MAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXPSrr, X86_INS_MAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXSDrm, X86_INS_MAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXSDrm_Int, X86_INS_MAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXSDrr, X86_INS_MAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXSDrr_Int, X86_INS_MAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXSSrm, X86_INS_MAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXSSrm_Int, X86_INS_MAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXSSrr, X86_INS_MAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MAXSSrr_Int, X86_INS_MAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MFENCE, X86_INS_MFENCE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINCPDrm, X86_INS_MINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINCPDrr, X86_INS_MINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINCPSrm, X86_INS_MINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINCPSrr, X86_INS_MINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINCSDrm, X86_INS_MINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINCSDrr, X86_INS_MINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINCSSrm, X86_INS_MINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINCSSrr, X86_INS_MINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINPDrm, X86_INS_MINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINPDrr, X86_INS_MINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINPSrm, X86_INS_MINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINPSrr, X86_INS_MINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINSDrm, X86_INS_MINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINSDrm_Int, X86_INS_MINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINSDrr, X86_INS_MINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINSDrr_Int, X86_INS_MINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINSSrm, X86_INS_MINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINSSrm_Int, X86_INS_MINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINSSrr, X86_INS_MINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MINSSrr_Int, X86_INS_MINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTPD2PIirm, X86_INS_CVTPD2PI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTPD2PIirr, X86_INS_CVTPD2PI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTPI2PDirm, X86_INS_CVTPI2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTPI2PDirr, X86_INS_CVTPI2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTPI2PSirm, X86_INS_CVTPI2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTPI2PSirr, X86_INS_CVTPI2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTPS2PIirm, X86_INS_CVTPS2PI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTPS2PIirr, X86_INS_CVTPS2PI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTTPD2PIirm, X86_INS_CVTTPD2PI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTTPD2PIirr, X86_INS_CVTTPD2PI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTTPS2PIirm, X86_INS_CVTTPS2PI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_CVTTPS2PIirr, X86_INS_CVTTPS2PI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_EMMS, X86_INS_EMMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MASKMOVQ, X86_INS_MASKMOVQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, 0 }, { 0 }, { X86_GRP_MMX, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MASKMOVQ64, X86_INS_MASKMOVQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDI, 0 }, { 0 }, { X86_GRP_MMX, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVD64from64rm, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVD64from64rr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVD64grr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVD64mr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVD64rm, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVD64rr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVD64to64rm, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVD64to64rr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVDQ2Qrr, X86_INS_MOVDQ2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVFR642Qrr, X86_INS_MOVDQ2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVNTQmr, X86_INS_MOVNTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVQ2DQrr, X86_INS_MOVQ2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVQ2FR64rr, X86_INS_MOVQ2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVQ64mr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVQ64rm, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVQ64rr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_MOVQ64rr_REV, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PABSBrm64, X86_INS_PABSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PABSBrr64, X86_INS_PABSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PABSDrm64, X86_INS_PABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PABSDrr64, X86_INS_PABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PABSWrm64, X86_INS_PABSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PABSWrr64, X86_INS_PABSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PACKSSDWirm, X86_INS_PACKSSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PACKSSDWirr, X86_INS_PACKSSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PACKSSWBirm, X86_INS_PACKSSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PACKSSWBirr, X86_INS_PACKSSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PACKUSWBirm, X86_INS_PACKUSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PACKUSWBirr, X86_INS_PACKUSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDBirm, X86_INS_PADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDBirr, X86_INS_PADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDDirm, X86_INS_PADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDDirr, X86_INS_PADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDQirm, X86_INS_PADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDQirr, X86_INS_PADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDSBirm, X86_INS_PADDSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDSBirr, X86_INS_PADDSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDSWirm, X86_INS_PADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDSWirr, X86_INS_PADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDUSBirm, X86_INS_PADDUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDUSBirr, X86_INS_PADDUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDUSWirm, X86_INS_PADDUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDUSWirr, X86_INS_PADDUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDWirm, X86_INS_PADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PADDWirr, X86_INS_PADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PALIGNR64irm, X86_INS_PALIGNR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PALIGNR64irr, X86_INS_PALIGNR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PANDNirm, X86_INS_PANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PANDNirr, X86_INS_PANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PANDirm, X86_INS_PAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PANDirr, X86_INS_PAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PAVGBirm, X86_INS_PAVGB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PAVGBirr, X86_INS_PAVGB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PAVGWirm, X86_INS_PAVGW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PAVGWirr, X86_INS_PAVGW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPEQBirm, X86_INS_PCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPEQBirr, X86_INS_PCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPEQDirm, X86_INS_PCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPEQDirr, X86_INS_PCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPEQWirm, X86_INS_PCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPEQWirr, X86_INS_PCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPGTBirm, X86_INS_PCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPGTBirr, X86_INS_PCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPGTDirm, X86_INS_PCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPGTDirr, X86_INS_PCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPGTWirm, X86_INS_PCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PCMPGTWirr, X86_INS_PCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PEXTRWirri, X86_INS_PEXTRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHADDSWrm64, X86_INS_PHADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHADDSWrr64, X86_INS_PHADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHADDWrm64, X86_INS_PHADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHADDWrr64, X86_INS_PHADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHADDrm64, X86_INS_PHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHADDrr64, X86_INS_PHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHSUBDrm64, X86_INS_PHSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHSUBDrr64, X86_INS_PHSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHSUBSWrm64, X86_INS_PHSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHSUBSWrr64, X86_INS_PHSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHSUBWrm64, X86_INS_PHSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PHSUBWrr64, X86_INS_PHSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PINSRWirmi, X86_INS_PINSRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PINSRWirri, X86_INS_PINSRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMADDUBSWrm64, X86_INS_PMADDUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMADDUBSWrr64, X86_INS_PMADDUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMADDWDirm, X86_INS_PMADDWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMADDWDirr, X86_INS_PMADDWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMAXSWirm, X86_INS_PMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMAXSWirr, X86_INS_PMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMAXUBirm, X86_INS_PMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMAXUBirr, X86_INS_PMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMINSWirm, X86_INS_PMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMINSWirr, X86_INS_PMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMINUBirm, X86_INS_PMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMINUBirr, X86_INS_PMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMOVMSKBrr, X86_INS_PMOVMSKB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMULHRSWrm64, X86_INS_PMULHRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMULHRSWrr64, X86_INS_PMULHRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMULHUWirm, X86_INS_PMULHUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMULHUWirr, X86_INS_PMULHUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMULHWirm, X86_INS_PMULHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMULHWirr, X86_INS_PMULHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMULLWirm, X86_INS_PMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMULLWirr, X86_INS_PMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMULUDQirm, X86_INS_PMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PMULUDQirr, X86_INS_PMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PORirm, X86_INS_POR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PORirr, X86_INS_POR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSADBWirm, X86_INS_PSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSADBWirr, X86_INS_PSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSHUFBrm64, X86_INS_PSHUFB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSHUFBrr64, X86_INS_PSHUFB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSHUFWmi, X86_INS_PSHUFW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSHUFWri, X86_INS_PSHUFW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSIGNBrm64, X86_INS_PSIGNB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSIGNBrr64, X86_INS_PSIGNB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSIGNDrm64, X86_INS_PSIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSIGNDrr64, X86_INS_PSIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSIGNWrm64, X86_INS_PSIGNW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSIGNWrr64, X86_INS_PSIGNW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSLLDri, X86_INS_PSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSLLDrm, X86_INS_PSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSLLDrr, X86_INS_PSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSLLQri, X86_INS_PSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSLLQrm, X86_INS_PSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSLLQrr, X86_INS_PSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSLLWri, X86_INS_PSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSLLWrm, X86_INS_PSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSLLWrr, X86_INS_PSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRADri, X86_INS_PSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRADrm, X86_INS_PSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRADrr, X86_INS_PSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRAWri, X86_INS_PSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRAWrm, X86_INS_PSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRAWrr, X86_INS_PSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRLDri, X86_INS_PSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRLDrm, X86_INS_PSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRLDrr, X86_INS_PSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRLQri, X86_INS_PSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRLQrm, X86_INS_PSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRLQrr, X86_INS_PSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRLWri, X86_INS_PSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRLWrm, X86_INS_PSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSRLWrr, X86_INS_PSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBBirm, X86_INS_PSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBBirr, X86_INS_PSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBDirm, X86_INS_PSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBDirr, X86_INS_PSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBQirm, X86_INS_PSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBQirr, X86_INS_PSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBSBirm, X86_INS_PSUBSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBSBirr, X86_INS_PSUBSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBSWirm, X86_INS_PSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBSWirr, X86_INS_PSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBUSBirm, X86_INS_PSUBUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBUSBirr, X86_INS_PSUBUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBUSWirm, X86_INS_PSUBUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBUSWirr, X86_INS_PSUBUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBWirm, X86_INS_PSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PSUBWirr, X86_INS_PSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKHBWirm, X86_INS_PUNPCKHBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKHBWirr, X86_INS_PUNPCKHBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKHDQirm, X86_INS_PUNPCKHDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKHDQirr, X86_INS_PUNPCKHDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKHWDirm, X86_INS_PUNPCKHWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKHWDirr, X86_INS_PUNPCKHWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKLBWirm, X86_INS_PUNPCKLBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKLBWirr, X86_INS_PUNPCKLBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKLDQirm, X86_INS_PUNPCKLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKLDQirr, X86_INS_PUNPCKLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKLWDirm, X86_INS_PUNPCKLWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PUNPCKLWDirr, X86_INS_PUNPCKLWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PXORirm, X86_INS_PXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MMX_PXORirr, X86_INS_PXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MMX, 0 }, 0, 0
+#endif
+},
+{
+ X86_MONITORrrr, X86_INS_MONITOR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MONTMUL, X86_INS_MONTMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RSI, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_RSI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ao16, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ao32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ao64, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16mi, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16mr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ms, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16o16a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16o32a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16o64a, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ri, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ri_alt, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16rm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16rr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16rr_REV, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16rs, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16sm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16sr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ao16, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ao32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ao64, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32cr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32dr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32mi, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32mr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ms, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32o16a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32o32a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32o64a, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rc, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rd, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ri, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ri_alt, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rr_REV, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rs, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32sm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32sr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64ao32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64ao64, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64cr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64dr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64mi32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64mr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64ms, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64o32a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64o64a, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rc, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rd, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64ri, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64ri32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rr_REV, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rs, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64sm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64sr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64toPQIrm, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64toPQIrr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64toSDrm, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64toSDrr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8ao16, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8ao32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8ao64, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8mi, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8mr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8mr_NOREX, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8o16a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8o32a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8o64a, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8ri, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8ri_alt, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8rm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8rm_NOREX, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8rr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8rr_NOREX, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8rr_REV, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVAPDmr, X86_INS_MOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVAPDrm, X86_INS_MOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVAPDrr, X86_INS_MOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVAPDrr_REV, X86_INS_MOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVAPSmr, X86_INS_MOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVAPSrm, X86_INS_MOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVAPSrr, X86_INS_MOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVAPSrr_REV, X86_INS_MOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE16mr, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE16rm, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE32mr, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE32rm, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE64mr, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE64rm, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDDUPrm, X86_INS_MOVDDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDDUPrr, X86_INS_MOVDDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDI2PDIrm, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDI2PDIrr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDI2SSrm, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDI2SSrr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDQAmr, X86_INS_MOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDQArm, X86_INS_MOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDQArr, X86_INS_MOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDQArr_REV, X86_INS_MOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDQUmr, X86_INS_MOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDQUrm, X86_INS_MOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDQUrr, X86_INS_MOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVDQUrr_REV, X86_INS_MOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVHLPSrr, X86_INS_MOVHLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVHPDmr, X86_INS_MOVHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVHPDrm, X86_INS_MOVHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVHPSmr, X86_INS_MOVHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVHPSrm, X86_INS_MOVHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVLHPSrr, X86_INS_MOVLHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVLPDmr, X86_INS_MOVLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVLPDrm, X86_INS_MOVLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVLPSmr, X86_INS_MOVLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVLPSrm, X86_INS_MOVLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVMSKPDrr, X86_INS_MOVMSKPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVMSKPSrr, X86_INS_MOVMSKPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVNTDQArm, X86_INS_MOVNTDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVNTDQmr, X86_INS_MOVNTDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVNTI_64mr, X86_INS_MOVNTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVNTImr, X86_INS_MOVNTI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVNTPDmr, X86_INS_MOVNTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVNTPSmr, X86_INS_MOVNTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVNTSD, X86_INS_MOVNTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVNTSS, X86_INS_MOVNTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE4A, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVPDI2DImr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVPDI2DIrr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVPQI2QImr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVPQI2QIrr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVPQIto64rm, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVPQIto64rr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVQI2PQIrm, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSB, X86_INS_MOVSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSDmr, X86_INS_MOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSDrm, X86_INS_MOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSDrr, X86_INS_MOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSDrr_REV, X86_INS_MOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSDto64mr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSDto64rr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSHDUPrm, X86_INS_MOVSHDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSHDUPrr, X86_INS_MOVSHDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSL, X86_INS_MOVSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSLDUPrm, X86_INS_MOVSLDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSLDUPrr, X86_INS_MOVSLDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSQ, X86_INS_MOVSQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSS2DImr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSS2DIrr, X86_INS_MOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSSmr, X86_INS_MOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSSrm, X86_INS_MOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSSrr, X86_INS_MOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSSrr_REV, X86_INS_MOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSW, X86_INS_MOVSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX16rm8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX16rr8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32_NOREXrm8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32_NOREXrr8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32rm16, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32rm8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32rr16, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32rr8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64_NOREXrr32, X86_INS_MOVSXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rm16, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rm32, X86_INS_MOVSXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rm32_alt, X86_INS_MOVSXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rm8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rr16, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rr32, X86_INS_MOVSXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rr8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVUPDmr, X86_INS_MOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVUPDrm, X86_INS_MOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVUPDrr, X86_INS_MOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVUPDrr_REV, X86_INS_MOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVUPSmr, X86_INS_MOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVUPSrm, X86_INS_MOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVUPSrr, X86_INS_MOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVUPSrr_REV, X86_INS_MOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZPQILo2PQIrm, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZPQILo2PQIrr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZQI2PQIrm, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZQI2PQIrr, X86_INS_MOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX16rm8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX16rr8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32_NOREXrm8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32_NOREXrr8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32rm16, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32rm8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32rr16, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32rr8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX64rm16_Q, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX64rm8_Q, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX64rr16_Q, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX64rr8_Q, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MPSADBWrmi, X86_INS_MPSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_MPSADBWrri, X86_INS_MPSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL16m, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL16r, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL32m, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL32r, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL64m, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL64r, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL8m, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL8r, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MULPDrm, X86_INS_MULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULPDrr, X86_INS_MULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULPSrm, X86_INS_MULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULPSrr, X86_INS_MULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULSDrm, X86_INS_MULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULSDrm_Int, X86_INS_MULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULSDrr, X86_INS_MULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULSDrr_Int, X86_INS_MULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULSSrm, X86_INS_MULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULSSrm_Int, X86_INS_MULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULSSrr, X86_INS_MULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULSSrr_Int, X86_INS_MULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULX32rm, X86_INS_MULX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULX32rr, X86_INS_MULX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULX64rm, X86_INS_MULX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULX64rr, X86_INS_MULX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL_F32m, X86_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL_F64m, X86_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL_FI16m, X86_INS_FIMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL_FI32m, X86_INS_FIMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL_FPrST0, X86_INS_FMULP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL_FST0r, X86_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL_FrST0, X86_INS_FMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MWAITrr, X86_INS_MWAIT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ECX, X86_REG_EAX, 0 }, { 0 }, { X86_GRP_SSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG16m, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG16r, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG32m, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG32r, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG64m, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG64r, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG8m, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG8r, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16m4, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16m5, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16m6, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16m7, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16r4, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16r5, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16r6, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16r7, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_m4, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_m5, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_m6, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_m7, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_r4, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_r5, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_r6, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_r7, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP19rr, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_19, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_1a, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_1b, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_1c, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_1d, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_1e, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_19, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_1a, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_1b, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_1c, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_1d, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_1e, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT16m, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT16r, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT32m, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT32r, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT64m, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT64r, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT8m, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT8r, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16i16, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16ri, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16ri8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16rm, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16rr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16rr_REV, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32i32, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32mrLocked, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32ri, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32ri8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32rm, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32rr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32rr_REV, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64i32, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64mi32, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64ri32, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64ri8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64rm, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64rr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64rr_REV, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8i8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8ri, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8ri8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8rm, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8rr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8rr_REV, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ORPDrm, X86_INS_ORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ORPDrr, X86_INS_ORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ORPSrm, X86_INS_ORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_ORPSrr, X86_INS_ORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT16ir, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT16rr, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT32ir, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT32rr, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT8ir, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT8rr, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUTSB, X86_INS_OUTSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUTSL, X86_INS_OUTSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUTSW, X86_INS_OUTSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PABSBrm128, X86_INS_PABSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PABSBrr128, X86_INS_PABSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PABSDrm128, X86_INS_PABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PABSDrr128, X86_INS_PABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PABSWrm128, X86_INS_PABSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PABSWrr128, X86_INS_PABSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PACKSSDWrm, X86_INS_PACKSSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PACKSSDWrr, X86_INS_PACKSSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PACKSSWBrm, X86_INS_PACKSSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PACKSSWBrr, X86_INS_PACKSSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PACKUSDWrm, X86_INS_PACKUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PACKUSDWrr, X86_INS_PACKUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PACKUSWBrm, X86_INS_PACKUSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PACKUSWBrr, X86_INS_PACKUSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDBrm, X86_INS_PADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDBrr, X86_INS_PADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDDrm, X86_INS_PADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDDrr, X86_INS_PADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDQrm, X86_INS_PADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDQrr, X86_INS_PADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDSBrm, X86_INS_PADDSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDSBrr, X86_INS_PADDSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDSWrm, X86_INS_PADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDSWrr, X86_INS_PADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDUSBrm, X86_INS_PADDUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDUSBrr, X86_INS_PADDUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDUSWrm, X86_INS_PADDUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDUSWrr, X86_INS_PADDUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDWrm, X86_INS_PADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PADDWrr, X86_INS_PADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PALIGNR128rm, X86_INS_PALIGNR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PALIGNR128rr, X86_INS_PALIGNR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PANDNrm, X86_INS_PANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PANDNrr, X86_INS_PANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PANDrm, X86_INS_PAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PANDrr, X86_INS_PAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PAUSE, X86_INS_PAUSE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PAVGBrm, X86_INS_PAVGB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PAVGBrr, X86_INS_PAVGB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PAVGUSBrm, X86_INS_PAVGUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PAVGUSBrr, X86_INS_PAVGUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PAVGWrm, X86_INS_PAVGW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PAVGWrr, X86_INS_PAVGW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PBLENDVBrm0, X86_INS_PBLENDVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PBLENDVBrr0, X86_INS_PBLENDVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PBLENDWrmi, X86_INS_PBLENDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PBLENDWrri, X86_INS_PBLENDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCLMULQDQrm, X86_INS_PCLMULQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PCLMUL, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCLMULQDQrr, X86_INS_PCLMULQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PCLMUL, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPEQBrm, X86_INS_PCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPEQBrr, X86_INS_PCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPEQDrm, X86_INS_PCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPEQDrr, X86_INS_PCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPEQQrm, X86_INS_PCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPEQQrr, X86_INS_PCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPEQWrm, X86_INS_PCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPEQWrr, X86_INS_PCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPESTRIrm, X86_INS_PCMPESTRI,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPESTRIrr, X86_INS_PCMPESTRI,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPESTRM128rm, X86_INS_PCMPESTRM,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPESTRM128rr, X86_INS_PCMPESTRM,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPGTBrm, X86_INS_PCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPGTBrr, X86_INS_PCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPGTDrm, X86_INS_PCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPGTDrr, X86_INS_PCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPGTQrm, X86_INS_PCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPGTQrr, X86_INS_PCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPGTWrm, X86_INS_PCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPGTWrr, X86_INS_PCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPISTRIrm, X86_INS_PCMPISTRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPISTRIrr, X86_INS_PCMPISTRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPISTRM128rm, X86_INS_PCMPISTRM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCMPISTRM128rr, X86_INS_PCMPISTRM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_SSE42, 0 }, 0, 0
+#endif
+},
+{
+ X86_PCOMMIT, X86_INS_PCOMMIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PDEP32rm, X86_INS_PDEP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PDEP32rr, X86_INS_PDEP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PDEP64rm, X86_INS_PDEP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PDEP64rr, X86_INS_PDEP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXT32rm, X86_INS_PEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXT32rr, X86_INS_PEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXT64rm, X86_INS_PEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXT64rr, X86_INS_PEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXTRBmr, X86_INS_PEXTRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXTRBrr, X86_INS_PEXTRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXTRDmr, X86_INS_PEXTRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXTRDrr, X86_INS_PEXTRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXTRQmr, X86_INS_PEXTRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXTRQrr, X86_INS_PEXTRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXTRWmr, X86_INS_PEXTRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXTRWri, X86_INS_PEXTRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXTRWrr_REV, X86_INS_PEXTRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PF2IDrm, X86_INS_PF2ID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PF2IDrr, X86_INS_PF2ID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PF2IWrm, X86_INS_PF2IW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PF2IWrr, X86_INS_PF2IW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFACCrm, X86_INS_PFACC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFACCrr, X86_INS_PFACC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFADDrm, X86_INS_PFADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFADDrr, X86_INS_PFADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFCMPEQrm, X86_INS_PFCMPEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFCMPEQrr, X86_INS_PFCMPEQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFCMPGErm, X86_INS_PFCMPGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFCMPGErr, X86_INS_PFCMPGE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFCMPGTrm, X86_INS_PFCMPGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFCMPGTrr, X86_INS_PFCMPGT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFMAXrm, X86_INS_PFMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFMAXrr, X86_INS_PFMAX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFMINrm, X86_INS_PFMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFMINrr, X86_INS_PFMIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFMULrm, X86_INS_PFMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFMULrr, X86_INS_PFMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFNACCrm, X86_INS_PFNACC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFNACCrr, X86_INS_PFNACC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFPNACCrm, X86_INS_PFPNACC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFPNACCrr, X86_INS_PFPNACC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFRCPIT1rm, X86_INS_PFRCPIT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFRCPIT1rr, X86_INS_PFRCPIT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFRCPIT2rm, X86_INS_PFRCPIT2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFRCPIT2rr, X86_INS_PFRCPIT2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFRCPrm, X86_INS_PFRCP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFRCPrr, X86_INS_PFRCP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFRSQIT1rm, X86_INS_PFRSQIT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFRSQIT1rr, X86_INS_PFRSQIT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFRSQRTrm, X86_INS_PFRSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFRSQRTrr, X86_INS_PFRSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFSUBRrm, X86_INS_PFSUBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFSUBRrr, X86_INS_PFSUBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFSUBrm, X86_INS_PFSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PFSUBrr, X86_INS_PFSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHADDDrm, X86_INS_PHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHADDDrr, X86_INS_PHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHADDSWrm128, X86_INS_PHADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHADDSWrr128, X86_INS_PHADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHADDWrm, X86_INS_PHADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHADDWrr, X86_INS_PHADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHMINPOSUWrm128, X86_INS_PHMINPOSUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHMINPOSUWrr128, X86_INS_PHMINPOSUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHSUBDrm, X86_INS_PHSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHSUBDrr, X86_INS_PHSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHSUBSWrm128, X86_INS_PHSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHSUBSWrr128, X86_INS_PHSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHSUBWrm, X86_INS_PHSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PHSUBWrr, X86_INS_PHSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PI2FDrm, X86_INS_PI2FD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PI2FDrr, X86_INS_PI2FD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PI2FWrm, X86_INS_PI2FW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PI2FWrr, X86_INS_PI2FW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PINSRBrm, X86_INS_PINSRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PINSRBrr, X86_INS_PINSRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PINSRDrm, X86_INS_PINSRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PINSRDrr, X86_INS_PINSRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PINSRQrm, X86_INS_PINSRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PINSRQrr, X86_INS_PINSRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PINSRWrmi, X86_INS_PINSRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PINSRWrri, X86_INS_PINSRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMADDUBSWrm128, X86_INS_PMADDUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMADDUBSWrr128, X86_INS_PMADDUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMADDWDrm, X86_INS_PMADDWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMADDWDrr, X86_INS_PMADDWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXSBrm, X86_INS_PMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXSBrr, X86_INS_PMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXSDrm, X86_INS_PMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXSDrr, X86_INS_PMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXSWrm, X86_INS_PMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXSWrr, X86_INS_PMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXUBrm, X86_INS_PMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXUBrr, X86_INS_PMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXUDrm, X86_INS_PMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXUDrr, X86_INS_PMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXUWrm, X86_INS_PMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMAXUWrr, X86_INS_PMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINSBrm, X86_INS_PMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINSBrr, X86_INS_PMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINSDrm, X86_INS_PMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINSDrr, X86_INS_PMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINSWrm, X86_INS_PMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINSWrr, X86_INS_PMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINUBrm, X86_INS_PMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINUBrr, X86_INS_PMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINUDrm, X86_INS_PMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINUDrr, X86_INS_PMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINUWrm, X86_INS_PMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMINUWrr, X86_INS_PMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVMSKBrr, X86_INS_PMOVMSKB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXBDrm, X86_INS_PMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXBDrr, X86_INS_PMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXBQrm, X86_INS_PMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXBQrr, X86_INS_PMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXBWrm, X86_INS_PMOVSXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXBWrr, X86_INS_PMOVSXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXDQrm, X86_INS_PMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXDQrr, X86_INS_PMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXWDrm, X86_INS_PMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXWDrr, X86_INS_PMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXWQrm, X86_INS_PMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVSXWQrr, X86_INS_PMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXBDrm, X86_INS_PMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXBDrr, X86_INS_PMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXBQrm, X86_INS_PMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXBQrr, X86_INS_PMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXBWrm, X86_INS_PMOVZXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXBWrr, X86_INS_PMOVZXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXDQrm, X86_INS_PMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXDQrr, X86_INS_PMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXWDrm, X86_INS_PMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXWDrr, X86_INS_PMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXWQrm, X86_INS_PMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMOVZXWQrr, X86_INS_PMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULDQrm, X86_INS_PMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULDQrr, X86_INS_PMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULHRSWrm128, X86_INS_PMULHRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULHRSWrr128, X86_INS_PMULHRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULHRWrm, X86_INS_PMULHRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULHRWrr, X86_INS_PMULHRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULHUWrm, X86_INS_PMULHUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULHUWrr, X86_INS_PMULHUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULHWrm, X86_INS_PMULHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULHWrr, X86_INS_PMULHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULLDrm, X86_INS_PMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULLDrr, X86_INS_PMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULLWrm, X86_INS_PMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULLWrr, X86_INS_PMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULUDQrm, X86_INS_PMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PMULUDQrr, X86_INS_PMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP16r, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POP16rmm, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POP16rmr, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POP32r, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP32rmm, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP32rmr, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP64r, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP64rmm, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP64rmr, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPA16, X86_INS_POPAW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPA32, X86_INS_POPAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPCNT16rm, X86_INS_POPCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPCNT16rr, X86_INS_POPCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPCNT32rm, X86_INS_POPCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPCNT32rr, X86_INS_POPCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPCNT64rm, X86_INS_POPCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPCNT64rr, X86_INS_POPCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPDS16, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPDS32, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPES16, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPES32, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPF16, X86_INS_POPF,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPF32, X86_INS_POPFD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPF64, X86_INS_POPFQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPFS16, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPFS32, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPFS64, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPGS16, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPGS32, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPGS64, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPSS16, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPSS32, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PORrm, X86_INS_POR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PORrr, X86_INS_POR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PREFETCH, X86_INS_PREFETCH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PREFETCHNTA, X86_INS_PREFETCHNTA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_PREFETCHT0, X86_INS_PREFETCHT0,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_PREFETCHT1, X86_INS_PREFETCHT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_PREFETCHT2, X86_INS_PREFETCHT2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_PREFETCHW, X86_INS_PREFETCHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PSADBWrm, X86_INS_PSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSADBWrr, X86_INS_PSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSHUFBrm, X86_INS_PSHUFB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSHUFBrr, X86_INS_PSHUFB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSHUFDmi, X86_INS_PSHUFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSHUFDri, X86_INS_PSHUFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSHUFHWmi, X86_INS_PSHUFHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSHUFHWri, X86_INS_PSHUFHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSHUFLWmi, X86_INS_PSHUFLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSHUFLWri, X86_INS_PSHUFLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSIGNBrm, X86_INS_PSIGNB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSIGNBrr, X86_INS_PSIGNB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSIGNDrm, X86_INS_PSIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSIGNDrr, X86_INS_PSIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSIGNWrm, X86_INS_PSIGNW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSIGNWrr, X86_INS_PSIGNW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSSE3, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSLLDQri, X86_INS_PSLLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSLLDri, X86_INS_PSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSLLDrm, X86_INS_PSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSLLDrr, X86_INS_PSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSLLQri, X86_INS_PSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSLLQrm, X86_INS_PSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSLLQrr, X86_INS_PSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSLLWri, X86_INS_PSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSLLWrm, X86_INS_PSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSLLWrr, X86_INS_PSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRADri, X86_INS_PSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRADrm, X86_INS_PSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRADrr, X86_INS_PSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRAWri, X86_INS_PSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRAWrm, X86_INS_PSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRAWrr, X86_INS_PSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRLDQri, X86_INS_PSRLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRLDri, X86_INS_PSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRLDrm, X86_INS_PSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRLDrr, X86_INS_PSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRLQri, X86_INS_PSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRLQrm, X86_INS_PSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRLQrr, X86_INS_PSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRLWri, X86_INS_PSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRLWrm, X86_INS_PSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSRLWrr, X86_INS_PSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBBrm, X86_INS_PSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBBrr, X86_INS_PSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBDrm, X86_INS_PSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBDrr, X86_INS_PSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBQrm, X86_INS_PSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBQrr, X86_INS_PSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBSBrm, X86_INS_PSUBSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBSBrr, X86_INS_PSUBSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBSWrm, X86_INS_PSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBSWrr, X86_INS_PSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBUSBrm, X86_INS_PSUBUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBUSBrr, X86_INS_PSUBUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBUSWrm, X86_INS_PSUBUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBUSWrr, X86_INS_PSUBUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBWrm, X86_INS_PSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSUBWrr, X86_INS_PSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSWAPDrm, X86_INS_PSWAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PSWAPDrr, X86_INS_PSWAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_3DNOW, 0 }, 0, 0
+#endif
+},
+{
+ X86_PTESTrm, X86_INS_PTEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PTESTrr, X86_INS_PTEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKHBWrm, X86_INS_PUNPCKHBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKHBWrr, X86_INS_PUNPCKHBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKHDQrm, X86_INS_PUNPCKHDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKHDQrr, X86_INS_PUNPCKHDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKHQDQrm, X86_INS_PUNPCKHQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKHQDQrr, X86_INS_PUNPCKHQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKHWDrm, X86_INS_PUNPCKHWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKHWDrr, X86_INS_PUNPCKHWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKLBWrm, X86_INS_PUNPCKLBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKLBWrr, X86_INS_PUNPCKLBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKLDQrm, X86_INS_PUNPCKLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKLDQrr, X86_INS_PUNPCKLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKLQDQrm, X86_INS_PUNPCKLQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKLQDQrr, X86_INS_PUNPCKLQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKLWDrm, X86_INS_PUNPCKLWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUNPCKLWDrr, X86_INS_PUNPCKLWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH16i8, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH16r, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH16rmm, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH16rmr, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH32i8, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH32r, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH32rmm, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH32rmr, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64i16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64i32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64i8, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64r, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64rmm, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64rmr, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHA16, X86_INS_PUSHAW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHA32, X86_INS_PUSHAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHCS16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHCS32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHDS16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHDS32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHES16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHES32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHF16, X86_INS_PUSHF,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHF32, X86_INS_PUSHFD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHF64, X86_INS_PUSHFQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHFS16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHFS32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHFS64, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHGS16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHGS32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHGS64, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHSS16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHSS32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHi16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHi32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PXORrm, X86_INS_PXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PXORrr, X86_INS_PXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16m1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16mCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16mi, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16r1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16rCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16ri, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32m1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32mCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32mi, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32r1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32rCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32ri, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64m1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64mCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64mi, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64r1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64rCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64ri, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8m1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8mCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8mi, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8r1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8rCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8ri, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCPPSm, X86_INS_RCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RCPPSm_Int, X86_INS_RCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RCPPSr, X86_INS_RCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RCPPSr_Int, X86_INS_RCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RCPSSm, X86_INS_RCPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RCPSSm_Int, X86_INS_RCPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCPSSr, X86_INS_RCPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RCPSSr_Int, X86_INS_RCPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16m1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16mCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16mi, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16r1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16rCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16ri, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32m1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32mCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32mi, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32r1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32rCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32ri, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64m1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64mCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64mi, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64r1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64rCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64ri, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8m1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8mCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8mi, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8r1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8rCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8ri, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDFSBASE, X86_INS_RDFSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RDFSBASE64, X86_INS_RDFSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RDGSBASE, X86_INS_RDGSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RDGSBASE64, X86_INS_RDGSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RDMSR, X86_INS_RDMSR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDPMC, X86_INS_RDPMC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ECX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDRAND16r, X86_INS_RDRAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDRAND32r, X86_INS_RDRAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDRAND64r, X86_INS_RDRAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDSEED16r, X86_INS_RDSEED,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDSEED32r, X86_INS_RDSEED,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDSEED64r, X86_INS_RDSEED,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDTSC, X86_INS_RDTSC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDTSCP, X86_INS_RDTSCP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_RAX, X86_REG_RCX, X86_REG_RDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RETIL, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_RETIQ, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RETIW, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
+#endif
+},
+{
+ X86_RETL, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_RETQ, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RETW, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RET, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16m1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16mCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16mi, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16r1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16rCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16ri, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32m1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32mCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32mi, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32r1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32rCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32ri, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64m1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64mCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64mi, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64r1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64rCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64ri, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8m1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8mCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8mi, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8r1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8rCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8ri, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16m1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16mCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16mi, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16r1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16rCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16ri, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32m1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32mCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32mi, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32r1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32rCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32ri, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64m1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64mCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64mi, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64r1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64rCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64ri, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8m1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8mCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8mi, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8r1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8rCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8ri, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RORX32mi, X86_INS_RORX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_RORX32ri, X86_INS_RORX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_RORX64mi, X86_INS_RORX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_RORX64ri, X86_INS_RORX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROUNDPDm, X86_INS_ROUNDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROUNDPDr, X86_INS_ROUNDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROUNDPSm, X86_INS_ROUNDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROUNDPSr, X86_INS_ROUNDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROUNDSDm, X86_INS_ROUNDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROUNDSDr, X86_INS_ROUNDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROUNDSDr_Int, X86_INS_ROUNDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROUNDSSm, X86_INS_ROUNDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROUNDSSr, X86_INS_ROUNDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_ROUNDSSr_Int, X86_INS_ROUNDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE41, 0 }, 0, 0
+#endif
+},
+{
+ X86_RSM, X86_INS_RSM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RSQRTPSm, X86_INS_RSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RSQRTPSm_Int, X86_INS_RSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RSQRTPSr, X86_INS_RSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RSQRTPSr_Int, X86_INS_RSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RSQRTSSm, X86_INS_RSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RSQRTSSm_Int, X86_INS_RSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RSQRTSSr, X86_INS_RSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_RSQRTSSr_Int, X86_INS_RSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAHF, X86_INS_SAHF,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AH, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16m1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16mCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16mi, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16r1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16rCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16ri, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32m1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32mCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32mi, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32r1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32rCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32ri, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64m1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64mCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64mi, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64r1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64rCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64ri, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8m1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8mCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8mi, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8r1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8rCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8ri, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SALC, X86_INS_SALC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_AL, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16m1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16mCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16mi, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16r1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16rCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16ri, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32m1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32mCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32mi, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32r1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32rCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32ri, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64m1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64mCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64mi, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64r1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64rCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64ri, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8m1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8mCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8mi, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8r1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8rCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8ri, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SARX32rm, X86_INS_SARX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SARX32rr, X86_INS_SARX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SARX64rm, X86_INS_SARX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SARX64rr, X86_INS_SARX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16i16, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16mi, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16mi8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16mr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16ri, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16ri8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16rm, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16rr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16rr_REV, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32i32, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32mi, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32mi8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32mr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32ri, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32ri8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32rm, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32rr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32rr_REV, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64i32, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64mi32, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64mi8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64mr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64ri32, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64ri8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64rm, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64rr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64rr_REV, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8i8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8mi, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8mi8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8mr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8ri, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8ri8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8rm, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8rr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8rr_REV, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SCASB, X86_INS_SCASB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SCASL, X86_INS_SCASD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SCASQ, X86_INS_SCASQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SCASW, X86_INS_SCASW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETAEm, X86_INS_SETAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETAEr, X86_INS_SETAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETAm, X86_INS_SETA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETAr, X86_INS_SETA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETBEm, X86_INS_SETBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETBEr, X86_INS_SETBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETBm, X86_INS_SETB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETBr, X86_INS_SETB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETEm, X86_INS_SETE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETEr, X86_INS_SETE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETGEm, X86_INS_SETGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETGEr, X86_INS_SETGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETGm, X86_INS_SETG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETGr, X86_INS_SETG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETLEm, X86_INS_SETLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETLEr, X86_INS_SETLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETLm, X86_INS_SETL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETLr, X86_INS_SETL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNEm, X86_INS_SETNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNEr, X86_INS_SETNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNOm, X86_INS_SETNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNOr, X86_INS_SETNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNPm, X86_INS_SETNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNPr, X86_INS_SETNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNSm, X86_INS_SETNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNSr, X86_INS_SETNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETOm, X86_INS_SETO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETOr, X86_INS_SETO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETPm, X86_INS_SETP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETPr, X86_INS_SETP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETSm, X86_INS_SETS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETSr, X86_INS_SETS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SFENCE, X86_INS_SFENCE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SGDT16m, X86_INS_SGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SGDT32m, X86_INS_SGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SGDT64m, X86_INS_SGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA1MSG1rm, X86_INS_SHA1MSG1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA1MSG1rr, X86_INS_SHA1MSG1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA1MSG2rm, X86_INS_SHA1MSG2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA1MSG2rr, X86_INS_SHA1MSG2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA1NEXTErm, X86_INS_SHA1NEXTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA1NEXTErr, X86_INS_SHA1NEXTE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA1RNDS4rmi, X86_INS_SHA1RNDS4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA1RNDS4rri, X86_INS_SHA1RNDS4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA256MSG1rm, X86_INS_SHA256MSG1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA256MSG1rr, X86_INS_SHA256MSG1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA256MSG2rm, X86_INS_SHA256MSG2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA256MSG2rr, X86_INS_SHA256MSG2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA256RNDS2rm, X86_INS_SHA256RNDS2,
+#ifndef CAPSTONE_DIET
+ { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHA256RNDS2rr, X86_INS_SHA256RNDS2,
+#ifndef CAPSTONE_DIET
+ { X86_REG_XMM0, 0 }, { 0 }, { X86_GRP_SHA, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16m1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16mCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16mi, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16r1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16rCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16ri, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32m1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32mCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32mi, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32r1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32rCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32ri, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64m1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64mCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64mi, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64r1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64rCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64ri, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8m1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8mCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8mi, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8r1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8rCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8ri, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD16mrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD16mri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD16rrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD16rri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD32mrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD32mri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD32rrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD32rri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD64mrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD64mri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD64rrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD64rri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLX32rm, X86_INS_SHLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLX32rr, X86_INS_SHLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLX64rm, X86_INS_SHLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLX64rr, X86_INS_SHLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16m1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16mCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16mi, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16r1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16rCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16ri, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32m1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32mCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32mi, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32r1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32rCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32ri, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64m1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64mCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64mi, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64r1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64rCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64ri, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8m1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8mCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8mi, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8r1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8rCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8ri, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD16mrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD16mri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD16rrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD16rri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD32mrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD32mri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD32rrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD32rri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD64mrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD64mri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD64rrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD64rri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRX32rm, X86_INS_SHRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRX32rr, X86_INS_SHRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRX64rm, X86_INS_SHRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRX64rr, X86_INS_SHRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHUFPDrmi, X86_INS_SHUFPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHUFPDrri, X86_INS_SHUFPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHUFPSrmi, X86_INS_SHUFPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHUFPSrri, X86_INS_SHUFPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SIDT16m, X86_INS_SIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SIDT32m, X86_INS_SIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SIDT64m, X86_INS_SIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_SIN_F, X86_INS_FSIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SKINIT, X86_INS_SKINIT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_SLDT16m, X86_INS_SLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SLDT16r, X86_INS_SLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SLDT32r, X86_INS_SLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SLDT64m, X86_INS_SLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SLDT64r, X86_INS_SLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SMSW16m, X86_INS_SMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SMSW16r, X86_INS_SMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SMSW32r, X86_INS_SMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SMSW64r, X86_INS_SMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTPDm, X86_INS_SQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTPDr, X86_INS_SQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTPSm, X86_INS_SQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTPSr, X86_INS_SQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTSDm, X86_INS_SQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTSDm_Int, X86_INS_SQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTSDr, X86_INS_SQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTSDr_Int, X86_INS_SQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTSSm, X86_INS_SQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTSSm_Int, X86_INS_SQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTSSr, X86_INS_SQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRTSSr_Int, X86_INS_SQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SQRT_F, X86_INS_FSQRT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STAC, X86_INS_STAC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STC, X86_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STD, X86_INS_STD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STGI, X86_INS_STGI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_STI, X86_INS_STI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STMXCSR, X86_INS_STMXCSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_STOSB, X86_INS_STOSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STOSL, X86_INS_STOSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STOSQ, X86_INS_STOSQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RCX, X86_REG_RDI, X86_REG_EFLAGS, 0 }, { X86_REG_RCX, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STOSW, X86_INS_STOSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STR16r, X86_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STR32r, X86_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STR64r, X86_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STRm, X86_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_F32m, X86_INS_FST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_F64m, X86_INS_FST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FCOMPST0r, X86_INS_FCOMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FCOMPST0r_alt, X86_INS_FCOMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FCOMST0r, X86_INS_FCOM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FP32m, X86_INS_FSTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FP64m, X86_INS_FSTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FP80m, X86_INS_FSTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FPNCEST0r, X86_INS_FSTPNCE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FPST0r, X86_INS_FSTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FPST0r_alt, X86_INS_FSTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FPrr, X86_INS_FSTP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FXCHST0r, X86_INS_FXCH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_FXCHST0r_alt, X86_INS_FXCH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ST_Frr, X86_INS_FST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16i16, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16ri, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16ri8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16rm, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16rr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16rr_REV, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32i32, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32ri, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32ri8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32rm, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32rr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32rr_REV, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64i32, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64mi32, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64ri32, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64ri8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64rm, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64rr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64rr_REV, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8i8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8ri, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8ri8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8rm, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8rr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8rr_REV, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBPDrm, X86_INS_SUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBPDrr, X86_INS_SUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBPSrm, X86_INS_SUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBPSrr, X86_INS_SUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBR_F32m, X86_INS_FSUBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBR_F64m, X86_INS_FSUBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBR_FI16m, X86_INS_FISUBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBR_FI32m, X86_INS_FISUBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBR_FPrST0, X86_INS_FSUBRP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBR_FST0r, X86_INS_FSUBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBR_FrST0, X86_INS_FSUBR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBSDrm, X86_INS_SUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBSDrm_Int, X86_INS_SUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBSDrr, X86_INS_SUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBSDrr_Int, X86_INS_SUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBSSrm, X86_INS_SUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBSSrm_Int, X86_INS_SUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBSSrr, X86_INS_SUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUBSSrr_Int, X86_INS_SUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB_F32m, X86_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB_F64m, X86_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB_FI16m, X86_INS_FISUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB_FI32m, X86_INS_FISUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB_FPrST0, X86_INS_FSUBP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB_FST0r, X86_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB_FrST0, X86_INS_FSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SWAPGS, X86_INS_SWAPGS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSCALL, X86_INS_SYSCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSENTER, X86_INS_SYSENTER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSEXIT, X86_INS_SYSEXIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSEXIT64, X86_INS_SYSEXIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSRET, X86_INS_SYSRET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSRET64, X86_INS_SYSRET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_T1MSKC32rm, X86_INS_T1MSKC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_T1MSKC32rr, X86_INS_T1MSKC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_T1MSKC64rm, X86_INS_T1MSKC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_T1MSKC64rr, X86_INS_T1MSKC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16i16, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16mi, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16mi_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16ri, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16ri_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16rm, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16rr, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32i32, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32mi, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32mi_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32ri, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32ri_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32rm, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32rr, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64i32, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64mi32, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64mi32_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64ri32, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64ri32_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64rm, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64rr, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8i8, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8mi, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8mi_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8ri, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8ri_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8rm, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8rr, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TRAP, X86_INS_UD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TST_F, X86_INS_FTST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT16rm, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT16rr, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT32rm, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT32rr, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT64rm, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT64rr, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZMSK32rm, X86_INS_TZMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZMSK32rr, X86_INS_TZMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZMSK64rm, X86_INS_TZMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZMSK64rr, X86_INS_TZMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_UCOMISDrm, X86_INS_UCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_UCOMISDrr, X86_INS_UCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_UCOMISSrm, X86_INS_UCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_UCOMISSrr, X86_INS_UCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_UCOM_FIPr, X86_INS_FUCOMPI,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ST0, 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_UCOM_FIr, X86_INS_FUCOMI,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ST0, 0 }, { X86_REG_EFLAGS, X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_UCOM_FPPr, X86_INS_FUCOMPP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ST0, 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_UCOM_FPr, X86_INS_FUCOMP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ST0, 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_UCOM_Fr, X86_INS_FUCOM,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ST0, 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_UD2B, X86_INS_UD2B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_UNPCKHPDrm, X86_INS_UNPCKHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_UNPCKHPDrr, X86_INS_UNPCKHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_UNPCKHPSrm, X86_INS_UNPCKHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_UNPCKHPSrr, X86_INS_UNPCKHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_UNPCKLPDrm, X86_INS_UNPCKLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_UNPCKLPDrr, X86_INS_UNPCKLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_UNPCKLPSrm, X86_INS_UNPCKLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_UNPCKLPSrr, X86_INS_UNPCKLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDYrm, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDYrr, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ128rm, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ128rmb, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ128rmbk, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ128rmbkz, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ128rmk, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ128rmkz, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ128rr, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ128rrk, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ128rrkz, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ256rm, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ256rmb, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ256rmbk, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ256rmbkz, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ256rmk, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ256rmkz, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ256rr, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ256rrk, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZ256rrkz, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrb, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrbk, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrbkz, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrm, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrmb, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrmbk, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrmbkz, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrmk, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrmkz, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrr, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrrk, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDZrrkz, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDrm, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPDrr, X86_INS_VADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSYrm, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSYrr, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ128rm, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ128rmb, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ128rmbk, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ128rmbkz, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ128rmk, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ128rmkz, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ128rr, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ128rrk, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ128rrkz, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ256rm, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ256rmb, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ256rmbk, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ256rmbkz, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ256rmk, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ256rmkz, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ256rr, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ256rrk, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZ256rrkz, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrb, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrbk, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrbkz, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrm, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrmb, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrmbk, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrmbkz, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrmk, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrmkz, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrr, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrrk, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSZrrkz, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSrm, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDPSrr, X86_INS_VADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrm, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrm_Int, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrm_Intk, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrm_Intkz, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrr, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrr_Int, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrr_Intk, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrr_Intkz, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrrb, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrrbk, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDZrrbkz, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDrm, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDrm_Int, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDrr, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSDrr_Int, X86_INS_VADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrm, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrm_Int, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrm_Intk, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrm_Intkz, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrr, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrr_Int, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrr_Intk, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrr_Intkz, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrrb, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrrbk, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSZrrbkz, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSrm, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSrm_Int, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSrr, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSSrr_Int, X86_INS_VADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSUBPDYrm, X86_INS_VADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSUBPDYrr, X86_INS_VADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSUBPDrm, X86_INS_VADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSUBPDrr, X86_INS_VADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSUBPSYrm, X86_INS_VADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSUBPSYrr, X86_INS_VADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSUBPSrm, X86_INS_VADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VADDSUBPSrr, X86_INS_VADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESDECLASTrm, X86_INS_VAESDECLAST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESDECLASTrr, X86_INS_VAESDECLAST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESDECrm, X86_INS_VAESDEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESDECrr, X86_INS_VAESDEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESENCLASTrm, X86_INS_VAESENCLAST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESENCLASTrr, X86_INS_VAESENCLAST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESENCrm, X86_INS_VAESENC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESENCrr, X86_INS_VAESENC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESIMCrm, X86_INS_VAESIMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESIMCrr, X86_INS_VAESIMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESKEYGENASSIST128rm, X86_INS_VAESKEYGENASSIST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VAESKEYGENASSIST128rr, X86_INS_VAESKEYGENASSIST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_AES, 0 }, 0, 0
+#endif
+},
+{
+ X86_VALIGNDrmi, X86_INS_VALIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VALIGNDrri, X86_INS_VALIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VALIGNDrrik, X86_INS_VALIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VALIGNDrrikz, X86_INS_VALIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VALIGNQrmi, X86_INS_VALIGNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VALIGNQrri, X86_INS_VALIGNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VALIGNQrrik, X86_INS_VALIGNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VALIGNQrrikz, X86_INS_VALIGNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDNPDYrm, X86_INS_VANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDNPDYrr, X86_INS_VANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDNPDrm, X86_INS_VANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDNPDrr, X86_INS_VANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDNPSYrm, X86_INS_VANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDNPSYrr, X86_INS_VANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDNPSrm, X86_INS_VANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDNPSrr, X86_INS_VANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDPDYrm, X86_INS_VANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDPDYrr, X86_INS_VANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDPDrm, X86_INS_VANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDPDrr, X86_INS_VANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDPSYrm, X86_INS_VANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDPSYrr, X86_INS_VANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDPSrm, X86_INS_VANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VANDPSrr, X86_INS_VANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ128rm, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ128rmb, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ128rmbk, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ128rmk, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ128rmkz, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ128rr, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ128rrk, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ128rrkz, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ256rm, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ256rmb, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ256rmbk, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ256rmk, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ256rmkz, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ256rr, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ256rrk, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZ256rrkz, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZrm, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZrmb, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZrmbk, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZrmk, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZrmkz, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZrr, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZrrk, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPDZrrkz, X86_INS_VBLENDMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ128rm, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ128rmb, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ128rmbk, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ128rmk, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ128rmkz, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ128rr, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ128rrk, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ128rrkz, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ256rm, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ256rmb, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ256rmbk, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ256rmk, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ256rmkz, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ256rr, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ256rrk, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZ256rrkz, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZrm, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZrmb, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZrmbk, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZrmk, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZrmkz, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZrr, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZrrk, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDMPSZrrkz, X86_INS_VBLENDMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDPDYrmi, X86_INS_VBLENDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDPDYrri, X86_INS_VBLENDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDPDrmi, X86_INS_VBLENDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDPDrri, X86_INS_VBLENDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDPSYrmi, X86_INS_VBLENDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDPSYrri, X86_INS_VBLENDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDPSrmi, X86_INS_VBLENDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDPSrri, X86_INS_VBLENDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDVPDYrm, X86_INS_VBLENDVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDVPDYrr, X86_INS_VBLENDVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDVPDrm, X86_INS_VBLENDVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDVPDrr, X86_INS_VBLENDVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDVPSYrm, X86_INS_VBLENDVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDVPSYrr, X86_INS_VBLENDVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDVPSrm, X86_INS_VBLENDVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBLENDVPSrr, X86_INS_VBLENDVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTF128, X86_INS_VBROADCASTF128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTI32X4krm, X86_INS_VBROADCASTI32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTI32X4rm, X86_INS_VBROADCASTI32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTI64X4krm, X86_INS_VBROADCASTI64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTI64X4rm, X86_INS_VBROADCASTI64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDYrm, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDYrr, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZ256m, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZ256mk, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZ256mkz, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZ256r, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZ256rk, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZ256rkz, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZm, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZmk, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZmkz, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZr, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZrk, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSDZrkz, X86_INS_VBROADCASTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSYrm, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSYrr, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ128m, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ128mk, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ128mkz, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ128r, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ128rk, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ128rkz, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ256m, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ256mk, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ256mkz, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ256r, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ256rk, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZ256rkz, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZm, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZmk, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZmkz, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZr, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZrk, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSZrkz, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSrm, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VBROADCASTSSrr, X86_INS_VBROADCASTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDYrmi, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDYrmi_alt, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDYrri, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDYrri_alt, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDZrmi, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDZrmi_alt, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDZrri, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDZrri_alt, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDZrrib, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDZrrib_alt, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDrmi, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDrmi_alt, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDrri, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPDrri_alt, X86_INS_VCMPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSYrmi, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSYrmi_alt, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSYrri, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSYrri_alt, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSZrmi, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSZrmi_alt, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSZrri, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSZrri_alt, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSZrrib, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSZrrib_alt, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSrmi, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSrmi_alt, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSrri, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPPSrri_alt, X86_INS_VCMPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSDZrm, X86_INS_VCMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSDZrmi_alt, X86_INS_VCMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSDZrr, X86_INS_VCMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSDZrri_alt, X86_INS_VCMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSDrm, X86_INS_VCMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSDrm_alt, X86_INS_VCMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSDrr, X86_INS_VCMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSDrr_alt, X86_INS_VCMPSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSSZrm, X86_INS_VCMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSSZrmi_alt, X86_INS_VCMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSSZrr, X86_INS_VCMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSSZrri_alt, X86_INS_VCMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSSrm, X86_INS_VCMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSSrm_alt, X86_INS_VCMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSSrr, X86_INS_VCMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCMPSSrr_alt, X86_INS_VCMPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMISDZrm, X86_INS_VCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMISDZrr, X86_INS_VCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMISDrm, X86_INS_VCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMISDrr, X86_INS_VCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMISSZrm, X86_INS_VCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMISSZrr, X86_INS_VCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMISSrm, X86_INS_VCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMISSrr, X86_INS_VCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPDZ128mrk, X86_INS_VCOMPRESSPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPDZ128rrk, X86_INS_VCOMPRESSPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPDZ128rrkz, X86_INS_VCOMPRESSPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPDZ256mrk, X86_INS_VCOMPRESSPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPDZ256rrk, X86_INS_VCOMPRESSPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPDZ256rrkz, X86_INS_VCOMPRESSPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPDZmrk, X86_INS_VCOMPRESSPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPDZrrk, X86_INS_VCOMPRESSPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPDZrrkz, X86_INS_VCOMPRESSPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPSZ128mrk, X86_INS_VCOMPRESSPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPSZ128rrk, X86_INS_VCOMPRESSPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPSZ128rrkz, X86_INS_VCOMPRESSPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPSZ256mrk, X86_INS_VCOMPRESSPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPSZ256rrk, X86_INS_VCOMPRESSPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPSZ256rrkz, X86_INS_VCOMPRESSPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPSZmrk, X86_INS_VCOMPRESSPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPSZrrk, X86_INS_VCOMPRESSPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCOMPRESSPSZrrkz, X86_INS_VCOMPRESSPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PDYrm, X86_INS_VCVTDQ2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PDYrr, X86_INS_VCVTDQ2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PDZrm, X86_INS_VCVTDQ2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PDZrr, X86_INS_VCVTDQ2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PDrm, X86_INS_VCVTDQ2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PDrr, X86_INS_VCVTDQ2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PSYrm, X86_INS_VCVTDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PSYrr, X86_INS_VCVTDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PSZrm, X86_INS_VCVTDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PSZrr, X86_INS_VCVTDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PSZrrb, X86_INS_VCVTDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PSrm, X86_INS_VCVTDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTDQ2PSrr, X86_INS_VCVTDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2DQXrm, X86_INS_VCVTPD2DQX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2DQYrm, X86_INS_VCVTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2DQYrr, X86_INS_VCVTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2DQZrm, X86_INS_VCVTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2DQZrr, X86_INS_VCVTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2DQZrrb, X86_INS_VCVTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2DQrr, X86_INS_VCVTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2PSXrm, X86_INS_VCVTPD2PSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2PSYrm, X86_INS_VCVTPD2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2PSYrr, X86_INS_VCVTPD2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2PSZrm, X86_INS_VCVTPD2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2PSZrr, X86_INS_VCVTPD2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2PSZrrb, X86_INS_VCVTPD2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2PSrr, X86_INS_VCVTPD2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2UDQZrm, X86_INS_VCVTPD2UDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2UDQZrr, X86_INS_VCVTPD2UDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPD2UDQZrrb, X86_INS_VCVTPD2UDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPH2PSYrm, X86_INS_VCVTPH2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPH2PSYrr, X86_INS_VCVTPH2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPH2PSZrm, X86_INS_VCVTPH2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPH2PSZrr, X86_INS_VCVTPH2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPH2PSrm, X86_INS_VCVTPH2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPH2PSrr, X86_INS_VCVTPH2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2DQYrm, X86_INS_VCVTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2DQYrr, X86_INS_VCVTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2DQZrm, X86_INS_VCVTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2DQZrr, X86_INS_VCVTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2DQZrrb, X86_INS_VCVTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2DQrm, X86_INS_VCVTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2DQrr, X86_INS_VCVTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PDYrm, X86_INS_VCVTPS2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PDYrr, X86_INS_VCVTPS2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PDZrm, X86_INS_VCVTPS2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PDZrr, X86_INS_VCVTPS2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PDrm, X86_INS_VCVTPS2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PDrr, X86_INS_VCVTPS2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PHYmr, X86_INS_VCVTPS2PH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PHYrr, X86_INS_VCVTPS2PH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PHZmr, X86_INS_VCVTPS2PH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PHZrr, X86_INS_VCVTPS2PH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PHmr, X86_INS_VCVTPS2PH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2PHrr, X86_INS_VCVTPS2PH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_F16C, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2UDQZrm, X86_INS_VCVTPS2UDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2UDQZrr, X86_INS_VCVTPS2UDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTPS2UDQZrrb, X86_INS_VCVTPS2UDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SI64Zrm, X86_INS_VCVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SI64Zrr, X86_INS_VCVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SI64rm, X86_INS_VCVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SI64rr, X86_INS_VCVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SIZrm, X86_INS_VCVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SIZrr, X86_INS_VCVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SIrm, X86_INS_VCVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SIrr, X86_INS_VCVTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SSZrm, X86_INS_VCVTSD2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SSZrr, X86_INS_VCVTSD2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SSrm, X86_INS_VCVTSD2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2SSrr, X86_INS_VCVTSD2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2USI64Zrm, X86_INS_VCVTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2USI64Zrr, X86_INS_VCVTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2USIZrm, X86_INS_VCVTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSD2USIZrr, X86_INS_VCVTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SD64rm, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SD64rr, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SDZrm, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SDZrr, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SDrm, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SDrr, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SS64rm, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SS64rr, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SSZrm, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SSZrr, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SSrm, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI2SSrr, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI642SDZrm, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI642SDZrr, X86_INS_VCVTSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI642SSZrm, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSI642SSZrr, X86_INS_VCVTSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SDZrm, X86_INS_VCVTSS2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SDZrr, X86_INS_VCVTSS2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SDrm, X86_INS_VCVTSS2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SDrr, X86_INS_VCVTSS2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SI64Zrm, X86_INS_VCVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SI64Zrr, X86_INS_VCVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SI64rm, X86_INS_VCVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SI64rr, X86_INS_VCVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SIZrm, X86_INS_VCVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SIZrr, X86_INS_VCVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SIrm, X86_INS_VCVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2SIrr, X86_INS_VCVTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2USI64Zrm, X86_INS_VCVTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2USI64Zrr, X86_INS_VCVTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2USIZrm, X86_INS_VCVTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTSS2USIZrr, X86_INS_VCVTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPD2DQXrm, X86_INS_VCVTTPD2DQX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPD2DQYrm, X86_INS_VCVTTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPD2DQYrr, X86_INS_VCVTTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPD2DQZrm, X86_INS_VCVTTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPD2DQZrr, X86_INS_VCVTTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPD2DQrr, X86_INS_VCVTTPD2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPD2UDQZrm, X86_INS_VCVTTPD2UDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPD2UDQZrr, X86_INS_VCVTTPD2UDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPS2DQYrm, X86_INS_VCVTTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPS2DQYrr, X86_INS_VCVTTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPS2DQZrm, X86_INS_VCVTTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPS2DQZrr, X86_INS_VCVTTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPS2DQrm, X86_INS_VCVTTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPS2DQrr, X86_INS_VCVTTPS2DQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPS2UDQZrm, X86_INS_VCVTTPS2UDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTPS2UDQZrr, X86_INS_VCVTTPS2UDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUDQ2PDZrm, X86_INS_VCVTUDQ2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUDQ2PDZrr, X86_INS_VCVTUDQ2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUDQ2PSZrm, X86_INS_VCVTUDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUDQ2PSZrr, X86_INS_VCVTUDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUDQ2PSZrrb, X86_INS_VCVTUDQ2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUSI642SDZrm, X86_INS_VCVTUSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUSI642SDZrr, X86_INS_VCVTUSI2SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUSI642SSZrm, X86_INS_VCVTUSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VCVTUSI642SSZrr, X86_INS_VCVTUSI2SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDYrm, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDYrr, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ128rm, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ128rmb, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ128rmbk, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ128rmbkz, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ128rmk, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ128rmkz, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ128rr, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ128rrk, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ128rrkz, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ256rm, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ256rmb, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ256rmbk, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ256rmbkz, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ256rmk, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ256rmkz, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ256rr, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ256rrk, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZ256rrkz, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrb, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrbk, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrbkz, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrm, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrmb, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrmbk, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrmbkz, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrmk, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrmkz, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrr, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrrk, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDZrrkz, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDrm, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPDrr, X86_INS_VDIVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSYrm, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSYrr, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ128rm, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ128rmb, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ128rmbk, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ128rmbkz, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ128rmk, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ128rmkz, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ128rr, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ128rrk, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ128rrkz, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ256rm, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ256rmb, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ256rmbk, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ256rmbkz, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ256rmk, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ256rmkz, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ256rr, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ256rrk, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZ256rrkz, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrb, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrbk, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrbkz, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrm, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrmb, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrmbk, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrmbkz, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrmk, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrmkz, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrr, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrrk, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSZrrkz, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSrm, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVPSrr, X86_INS_VDIVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrm, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrm_Int, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrm_Intk, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrm_Intkz, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrr, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrr_Int, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrr_Intk, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrr_Intkz, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrrb, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrrbk, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDZrrbkz, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDrm, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDrm_Int, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDrr, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSDrr_Int, X86_INS_VDIVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrm, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrm_Int, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrm_Intk, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrm_Intkz, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrr, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrr_Int, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrr_Intk, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrr_Intkz, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrrb, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrrbk, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSZrrbkz, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSrm, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSrm_Int, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSrr, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDIVSSrr_Int, X86_INS_VDIVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDPPDrmi, X86_INS_VDPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDPPDrri, X86_INS_VDPPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDPPSYrmi, X86_INS_VDPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDPPSYrri, X86_INS_VDPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDPPSrmi, X86_INS_VDPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VDPPSrri, X86_INS_VDPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VERRm, X86_INS_VERR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VERRr, X86_INS_VERR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VERWm, X86_INS_VERW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VERWr, X86_INS_VERW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDm, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDmb, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDmbk, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDmbkz, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDmk, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDmkz, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDr, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDrb, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDrbk, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDrbkz, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDrk, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PDrkz, X86_INS_VEXP2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSm, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSmb, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSmbk, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSmbkz, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSmk, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSmkz, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSr, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSrb, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSrbk, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSrbkz, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSrk, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXP2PSrkz, X86_INS_VEXP2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZ128rmk, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZ128rmkz, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZ128rrk, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZ128rrkz, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZ256rmk, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZ256rmkz, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZ256rrk, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZ256rrkz, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZrmk, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZrmkz, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZrrk, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPDZrrkz, X86_INS_VEXPANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZ128rmk, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZ128rmkz, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZ128rrk, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZ128rrkz, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZ256rmk, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZ256rmkz, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZ256rrk, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZ256rrkz, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZrmk, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZrmkz, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZrrk, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXPANDPSZrrkz, X86_INS_VEXPANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTF128mr, X86_INS_VEXTRACTF128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTF128rr, X86_INS_VEXTRACTF128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTF32x4rm, X86_INS_VEXTRACTF32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTF32x4rr, X86_INS_VEXTRACTF32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTF32x4rrk, X86_INS_VEXTRACTF32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTF32x4rrkz, X86_INS_VEXTRACTF32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTF64x4rm, X86_INS_VEXTRACTF64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTF64x4rr, X86_INS_VEXTRACTF64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTF64x4rrk, X86_INS_VEXTRACTF64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTF64x4rrkz, X86_INS_VEXTRACTF64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTI128mr, X86_INS_VEXTRACTI128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTI128rr, X86_INS_VEXTRACTI128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTI32x4rm, X86_INS_VEXTRACTI32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTI32x4rr, X86_INS_VEXTRACTI32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTI32x4rrk, X86_INS_VEXTRACTI32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTI32x4rrkz, X86_INS_VEXTRACTI32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTI64x4rm, X86_INS_VEXTRACTI64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTI64x4rr, X86_INS_VEXTRACTI64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTI64x4rrk, X86_INS_VEXTRACTI64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTI64x4rrkz, X86_INS_VEXTRACTI64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTPSmr, X86_INS_VEXTRACTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTPSrr, X86_INS_VEXTRACTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTPSzmr, X86_INS_VEXTRACTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VEXTRACTPSzrr, X86_INS_VEXTRACTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PDZ128m, X86_INS_VFMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PDZ128mb, X86_INS_VFMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PDZ256m, X86_INS_VFMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PDZ256mb, X86_INS_VFMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PDZm, X86_INS_VFMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PDZmb, X86_INS_VFMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PSZ128m, X86_INS_VFMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PSZ128mb, X86_INS_VFMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PSZ256m, X86_INS_VFMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PSZ256mb, X86_INS_VFMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PSZm, X86_INS_VFMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADD132PSZmb, X86_INS_VFMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPD4mr, X86_INS_VFMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPD4mrY, X86_INS_VFMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPD4rm, X86_INS_VFMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPD4rmY, X86_INS_VFMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPD4rr, X86_INS_VFMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPD4rrY, X86_INS_VFMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPD4rrY_REV, X86_INS_VFMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPD4rr_REV, X86_INS_VFMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v213rm, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v213rmb, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v213rmbk, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v213rmbkz, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v213rmk, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v213rmkz, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v213rr, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v213rrk, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v213rrkz, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v231rm, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v231rmb, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v231rmbk, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v231rmbkz, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v231rmk, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v231rmkz, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v231rr, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v231rrk, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ128v231rrkz, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v213rm, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v213rmb, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v213rmbk, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v213rmbkz, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v213rmk, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v213rmkz, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v213rr, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v213rrk, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v213rrkz, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v231rm, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v231rmb, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v231rmbk, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v231rmbkz, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v231rmk, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v231rmkz, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v231rr, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v231rrk, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZ256v231rrkz, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rm, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rmb, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rmbk, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rmbkz, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rmk, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rmkz, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rr, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rrb, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rrbk, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rrbkz, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rrk, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv213rrkz, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv231rm, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv231rmb, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv231rmbk, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv231rmbkz, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv231rmk, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv231rmkz, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv231rr, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv231rrk, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDZv231rrkz, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr132m, X86_INS_VFMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr132mY, X86_INS_VFMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr132r, X86_INS_VFMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr132rY, X86_INS_VFMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr213m, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr213mY, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr213r, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr213rY, X86_INS_VFMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr231m, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr231mY, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr231r, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPDr231rY, X86_INS_VFMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPS4mr, X86_INS_VFMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPS4mrY, X86_INS_VFMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPS4rm, X86_INS_VFMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPS4rmY, X86_INS_VFMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPS4rr, X86_INS_VFMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPS4rrY, X86_INS_VFMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPS4rrY_REV, X86_INS_VFMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPS4rr_REV, X86_INS_VFMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v213rm, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v213rmb, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v213rmbk, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v213rmbkz, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v213rmk, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v213rmkz, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v213rr, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v213rrk, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v213rrkz, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v231rm, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v231rmb, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v231rmbk, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v231rmbkz, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v231rmk, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v231rmkz, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v231rr, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v231rrk, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ128v231rrkz, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v213rm, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v213rmb, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v213rmbk, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v213rmbkz, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v213rmk, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v213rmkz, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v213rr, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v213rrk, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v213rrkz, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v231rm, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v231rmb, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v231rmbk, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v231rmbkz, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v231rmk, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v231rmkz, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v231rr, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v231rrk, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZ256v231rrkz, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rm, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rmb, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rmbk, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rmbkz, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rmk, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rmkz, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rr, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rrb, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rrbk, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rrbkz, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rrk, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv213rrkz, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv231rm, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv231rmb, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv231rmbk, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv231rmbkz, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv231rmk, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv231rmkz, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv231rr, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv231rrk, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSZv231rrkz, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr132m, X86_INS_VFMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr132mY, X86_INS_VFMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr132r, X86_INS_VFMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr132rY, X86_INS_VFMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr213m, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr213mY, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr213r, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr213rY, X86_INS_VFMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr231m, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr231mY, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr231r, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDPSr231rY, X86_INS_VFMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSD4mr, X86_INS_VFMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSD4mr_Int, X86_INS_VFMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSD4rm, X86_INS_VFMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSD4rm_Int, X86_INS_VFMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSD4rr, X86_INS_VFMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSD4rr_Int, X86_INS_VFMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSD4rr_REV, X86_INS_VFMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSDZm, X86_INS_VFMADD213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSDZr, X86_INS_VFMADD213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSDr132m, X86_INS_VFMADD132SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSDr132r, X86_INS_VFMADD132SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSDr213m, X86_INS_VFMADD213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSDr213r, X86_INS_VFMADD213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSDr231m, X86_INS_VFMADD231SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSDr231r, X86_INS_VFMADD231SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSS4mr, X86_INS_VFMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSS4mr_Int, X86_INS_VFMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSS4rm, X86_INS_VFMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSS4rm_Int, X86_INS_VFMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSS4rr, X86_INS_VFMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSS4rr_Int, X86_INS_VFMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSS4rr_REV, X86_INS_VFMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSSZm, X86_INS_VFMADD213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSSZr, X86_INS_VFMADD213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSSr132m, X86_INS_VFMADD132SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSSr132r, X86_INS_VFMADD132SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSSr213m, X86_INS_VFMADD213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSSr213r, X86_INS_VFMADD213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSSr231m, X86_INS_VFMADD231SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSSr231r, X86_INS_VFMADD231SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PDZ128m, X86_INS_VFMADDSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PDZ128mb, X86_INS_VFMADDSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PDZ256m, X86_INS_VFMADDSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PDZ256mb, X86_INS_VFMADDSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PDZm, X86_INS_VFMADDSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PDZmb, X86_INS_VFMADDSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PSZ128m, X86_INS_VFMADDSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PSZ128mb, X86_INS_VFMADDSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PSZ256m, X86_INS_VFMADDSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PSZ256mb, X86_INS_VFMADDSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PSZm, X86_INS_VFMADDSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUB132PSZmb, X86_INS_VFMADDSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPD4mr, X86_INS_VFMADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPD4mrY, X86_INS_VFMADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPD4rm, X86_INS_VFMADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPD4rmY, X86_INS_VFMADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPD4rr, X86_INS_VFMADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPD4rrY, X86_INS_VFMADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPD4rrY_REV, X86_INS_VFMADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPD4rr_REV, X86_INS_VFMADDSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v213rm, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v213rmb, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v213rmbk, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v213rmbkz, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v213rmk, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v213rmkz, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v213rr, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v213rrk, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v213rrkz, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v231rm, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v231rmb, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v231rmbk, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v231rmbkz, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v231rmk, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v231rmkz, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v231rr, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v231rrk, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ128v231rrkz, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v213rm, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v213rmb, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v213rmbk, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v213rmbkz, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v213rmk, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v213rmkz, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v213rr, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v213rrk, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v213rrkz, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v231rm, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v231rmb, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v231rmbk, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v231rmbkz, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v231rmk, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v231rmkz, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v231rr, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v231rrk, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZ256v231rrkz, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rm, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rmb, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rmbk, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rmbkz, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rmk, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rmkz, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rr, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rrb, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rrbk, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rrbkz, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rrk, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv213rrkz, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv231rm, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv231rmb, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv231rmbk, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv231rmbkz, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv231rmk, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv231rmkz, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv231rr, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv231rrk, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDZv231rrkz, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr132m, X86_INS_VFMADDSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr132mY, X86_INS_VFMADDSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr132r, X86_INS_VFMADDSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr132rY, X86_INS_VFMADDSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr213m, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr213mY, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr213r, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr213rY, X86_INS_VFMADDSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr231m, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr231mY, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr231r, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPDr231rY, X86_INS_VFMADDSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPS4mr, X86_INS_VFMADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPS4mrY, X86_INS_VFMADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPS4rm, X86_INS_VFMADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPS4rmY, X86_INS_VFMADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPS4rr, X86_INS_VFMADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPS4rrY, X86_INS_VFMADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPS4rrY_REV, X86_INS_VFMADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPS4rr_REV, X86_INS_VFMADDSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v213rm, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v213rmb, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v213rmbk, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v213rmbkz, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v213rmk, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v213rmkz, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v213rr, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v213rrk, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v213rrkz, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v231rm, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v231rmb, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v231rmbk, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v231rmbkz, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v231rmk, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v231rmkz, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v231rr, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v231rrk, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ128v231rrkz, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v213rm, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v213rmb, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v213rmbk, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v213rmbkz, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v213rmk, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v213rmkz, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v213rr, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v213rrk, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v213rrkz, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v231rm, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v231rmb, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v231rmbk, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v231rmbkz, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v231rmk, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v231rmkz, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v231rr, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v231rrk, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZ256v231rrkz, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rm, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rmb, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rmbk, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rmbkz, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rmk, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rmkz, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rr, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rrb, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rrbk, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rrbkz, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rrk, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv213rrkz, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv231rm, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv231rmb, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv231rmbk, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv231rmbkz, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv231rmk, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv231rmkz, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv231rr, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv231rrk, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSZv231rrkz, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr132m, X86_INS_VFMADDSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr132mY, X86_INS_VFMADDSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr132r, X86_INS_VFMADDSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr132rY, X86_INS_VFMADDSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr213m, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr213mY, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr213r, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr213rY, X86_INS_VFMADDSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr231m, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr231mY, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr231r, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMADDSUBPSr231rY, X86_INS_VFMADDSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PDZ128m, X86_INS_VFMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PDZ128mb, X86_INS_VFMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PDZ256m, X86_INS_VFMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PDZ256mb, X86_INS_VFMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PDZm, X86_INS_VFMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PDZmb, X86_INS_VFMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PSZ128m, X86_INS_VFMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PSZ128mb, X86_INS_VFMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PSZ256m, X86_INS_VFMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PSZ256mb, X86_INS_VFMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PSZm, X86_INS_VFMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUB132PSZmb, X86_INS_VFMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PDZ128m, X86_INS_VFMSUBADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PDZ128mb, X86_INS_VFMSUBADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PDZ256m, X86_INS_VFMSUBADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PDZ256mb, X86_INS_VFMSUBADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PDZm, X86_INS_VFMSUBADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PDZmb, X86_INS_VFMSUBADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PSZ128m, X86_INS_VFMSUBADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PSZ128mb, X86_INS_VFMSUBADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PSZ256m, X86_INS_VFMSUBADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PSZ256mb, X86_INS_VFMSUBADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PSZm, X86_INS_VFMSUBADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADD132PSZmb, X86_INS_VFMSUBADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPD4mr, X86_INS_VFMSUBADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPD4mrY, X86_INS_VFMSUBADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPD4rm, X86_INS_VFMSUBADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPD4rmY, X86_INS_VFMSUBADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPD4rr, X86_INS_VFMSUBADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPD4rrY, X86_INS_VFMSUBADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPD4rrY_REV, X86_INS_VFMSUBADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPD4rr_REV, X86_INS_VFMSUBADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v213rm, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v213rmb, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v213rmbk, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v213rmbkz, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v213rmk, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v213rmkz, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v213rr, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v213rrk, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v213rrkz, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v231rm, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v231rmb, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v231rmbk, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v231rmbkz, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v231rmk, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v231rmkz, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v231rr, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v231rrk, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ128v231rrkz, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v213rm, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v213rmb, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v213rmbk, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v213rmbkz, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v213rmk, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v213rmkz, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v213rr, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v213rrk, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v213rrkz, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v231rm, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v231rmb, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v231rmbk, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v231rmbkz, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v231rmk, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v231rmkz, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v231rr, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v231rrk, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZ256v231rrkz, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rm, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rmb, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rmbk, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rmbkz, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rmk, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rmkz, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rr, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rrb, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rrbk, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rrbkz, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rrk, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv213rrkz, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv231rm, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv231rmb, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv231rmbk, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv231rmbkz, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv231rmk, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv231rmkz, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv231rr, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv231rrk, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDZv231rrkz, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr132m, X86_INS_VFMSUBADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr132mY, X86_INS_VFMSUBADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr132r, X86_INS_VFMSUBADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr132rY, X86_INS_VFMSUBADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr213m, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr213mY, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr213r, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr213rY, X86_INS_VFMSUBADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr231m, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr231mY, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr231r, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPDr231rY, X86_INS_VFMSUBADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPS4mr, X86_INS_VFMSUBADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPS4mrY, X86_INS_VFMSUBADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPS4rm, X86_INS_VFMSUBADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPS4rmY, X86_INS_VFMSUBADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPS4rr, X86_INS_VFMSUBADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPS4rrY, X86_INS_VFMSUBADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPS4rrY_REV, X86_INS_VFMSUBADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPS4rr_REV, X86_INS_VFMSUBADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v213rm, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v213rmb, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v213rmbk, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v213rmbkz, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v213rmk, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v213rmkz, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v213rr, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v213rrk, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v213rrkz, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v231rm, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v231rmb, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v231rmbk, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v231rmbkz, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v231rmk, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v231rmkz, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v231rr, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v231rrk, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ128v231rrkz, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v213rm, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v213rmb, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v213rmbk, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v213rmbkz, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v213rmk, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v213rmkz, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v213rr, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v213rrk, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v213rrkz, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v231rm, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v231rmb, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v231rmbk, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v231rmbkz, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v231rmk, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v231rmkz, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v231rr, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v231rrk, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZ256v231rrkz, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rm, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rmb, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rmbk, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rmbkz, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rmk, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rmkz, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rr, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rrb, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rrbk, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rrbkz, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rrk, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv213rrkz, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv231rm, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv231rmb, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv231rmbk, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv231rmbkz, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv231rmk, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv231rmkz, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv231rr, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv231rrk, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSZv231rrkz, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr132m, X86_INS_VFMSUBADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr132mY, X86_INS_VFMSUBADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr132r, X86_INS_VFMSUBADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr132rY, X86_INS_VFMSUBADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr213m, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr213mY, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr213r, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr213rY, X86_INS_VFMSUBADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr231m, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr231mY, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr231r, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBADDPSr231rY, X86_INS_VFMSUBADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPD4mr, X86_INS_VFMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPD4mrY, X86_INS_VFMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPD4rm, X86_INS_VFMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPD4rmY, X86_INS_VFMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPD4rr, X86_INS_VFMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPD4rrY, X86_INS_VFMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPD4rrY_REV, X86_INS_VFMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPD4rr_REV, X86_INS_VFMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v213rm, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v213rmb, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v213rmbk, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v213rmbkz, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v213rmk, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v213rmkz, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v213rr, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v213rrk, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v213rrkz, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v231rm, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v231rmb, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v231rmbk, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v231rmbkz, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v231rmk, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v231rmkz, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v231rr, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v231rrk, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ128v231rrkz, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v213rm, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v213rmb, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v213rmbk, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v213rmbkz, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v213rmk, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v213rmkz, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v213rr, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v213rrk, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v213rrkz, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v231rm, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v231rmb, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v231rmbk, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v231rmbkz, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v231rmk, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v231rmkz, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v231rr, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v231rrk, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZ256v231rrkz, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rm, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rmb, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rmbk, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rmbkz, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rmk, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rmkz, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rr, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rrb, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rrbk, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rrbkz, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rrk, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv213rrkz, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv231rm, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv231rmb, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv231rmbk, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv231rmbkz, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv231rmk, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv231rmkz, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv231rr, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv231rrk, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDZv231rrkz, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr132m, X86_INS_VFMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr132mY, X86_INS_VFMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr132r, X86_INS_VFMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr132rY, X86_INS_VFMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr213m, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr213mY, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr213r, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr213rY, X86_INS_VFMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr231m, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr231mY, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr231r, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPDr231rY, X86_INS_VFMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPS4mr, X86_INS_VFMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPS4mrY, X86_INS_VFMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPS4rm, X86_INS_VFMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPS4rmY, X86_INS_VFMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPS4rr, X86_INS_VFMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPS4rrY, X86_INS_VFMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPS4rrY_REV, X86_INS_VFMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPS4rr_REV, X86_INS_VFMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v213rm, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v213rmb, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v213rmbk, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v213rmbkz, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v213rmk, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v213rmkz, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v213rr, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v213rrk, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v213rrkz, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v231rm, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v231rmb, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v231rmbk, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v231rmbkz, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v231rmk, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v231rmkz, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v231rr, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v231rrk, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ128v231rrkz, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v213rm, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v213rmb, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v213rmbk, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v213rmbkz, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v213rmk, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v213rmkz, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v213rr, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v213rrk, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v213rrkz, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v231rm, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v231rmb, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v231rmbk, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v231rmbkz, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v231rmk, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v231rmkz, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v231rr, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v231rrk, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZ256v231rrkz, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rm, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rmb, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rmbk, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rmbkz, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rmk, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rmkz, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rr, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rrb, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rrbk, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rrbkz, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rrk, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv213rrkz, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv231rm, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv231rmb, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv231rmbk, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv231rmbkz, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv231rmk, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv231rmkz, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv231rr, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv231rrk, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSZv231rrkz, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr132m, X86_INS_VFMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr132mY, X86_INS_VFMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr132r, X86_INS_VFMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr132rY, X86_INS_VFMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr213m, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr213mY, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr213r, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr213rY, X86_INS_VFMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr231m, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr231mY, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr231r, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBPSr231rY, X86_INS_VFMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSD4mr, X86_INS_VFMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSD4mr_Int, X86_INS_VFMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSD4rm, X86_INS_VFMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSD4rm_Int, X86_INS_VFMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSD4rr, X86_INS_VFMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSD4rr_Int, X86_INS_VFMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSD4rr_REV, X86_INS_VFMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSDZm, X86_INS_VFMSUB213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSDZr, X86_INS_VFMSUB213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSDr132m, X86_INS_VFMSUB132SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSDr132r, X86_INS_VFMSUB132SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSDr213m, X86_INS_VFMSUB213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSDr213r, X86_INS_VFMSUB213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSDr231m, X86_INS_VFMSUB231SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSDr231r, X86_INS_VFMSUB231SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSS4mr, X86_INS_VFMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSS4mr_Int, X86_INS_VFMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSS4rm, X86_INS_VFMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSS4rm_Int, X86_INS_VFMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSS4rr, X86_INS_VFMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSS4rr_Int, X86_INS_VFMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSS4rr_REV, X86_INS_VFMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSSZm, X86_INS_VFMSUB213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSSZr, X86_INS_VFMSUB213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSSr132m, X86_INS_VFMSUB132SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSSr132r, X86_INS_VFMSUB132SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSSr213m, X86_INS_VFMSUB213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSSr213r, X86_INS_VFMSUB213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSSr231m, X86_INS_VFMSUB231SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFMSUBSSr231r, X86_INS_VFMSUB231SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PDZ128m, X86_INS_VFNMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PDZ128mb, X86_INS_VFNMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PDZ256m, X86_INS_VFNMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PDZ256mb, X86_INS_VFNMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PDZm, X86_INS_VFNMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PDZmb, X86_INS_VFNMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PSZ128m, X86_INS_VFNMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PSZ128mb, X86_INS_VFNMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PSZ256m, X86_INS_VFNMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PSZ256mb, X86_INS_VFNMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PSZm, X86_INS_VFNMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADD132PSZmb, X86_INS_VFNMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPD4mr, X86_INS_VFNMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPD4mrY, X86_INS_VFNMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPD4rm, X86_INS_VFNMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPD4rmY, X86_INS_VFNMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPD4rr, X86_INS_VFNMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPD4rrY, X86_INS_VFNMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPD4rrY_REV, X86_INS_VFNMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPD4rr_REV, X86_INS_VFNMADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v213rm, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v213rmb, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v213rmbk, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v213rmbkz, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v213rmk, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v213rmkz, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v213rr, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v213rrk, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v213rrkz, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v231rm, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v231rmb, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v231rmbk, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v231rmbkz, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v231rmk, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v231rmkz, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v231rr, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v231rrk, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ128v231rrkz, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v213rm, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v213rmb, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v213rmbk, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v213rmbkz, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v213rmk, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v213rmkz, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v213rr, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v213rrk, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v213rrkz, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v231rm, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v231rmb, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v231rmbk, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v231rmbkz, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v231rmk, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v231rmkz, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v231rr, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v231rrk, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZ256v231rrkz, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rm, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rmb, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rmbk, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rmbkz, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rmk, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rmkz, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rr, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rrb, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rrbk, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rrbkz, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rrk, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv213rrkz, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv231rm, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv231rmb, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv231rmbk, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv231rmbkz, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv231rmk, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv231rmkz, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv231rr, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv231rrk, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDZv231rrkz, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr132m, X86_INS_VFNMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr132mY, X86_INS_VFNMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr132r, X86_INS_VFNMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr132rY, X86_INS_VFNMADD132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr213m, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr213mY, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr213r, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr213rY, X86_INS_VFNMADD213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr231m, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr231mY, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr231r, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPDr231rY, X86_INS_VFNMADD231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPS4mr, X86_INS_VFNMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPS4mrY, X86_INS_VFNMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPS4rm, X86_INS_VFNMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPS4rmY, X86_INS_VFNMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPS4rr, X86_INS_VFNMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPS4rrY, X86_INS_VFNMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPS4rrY_REV, X86_INS_VFNMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPS4rr_REV, X86_INS_VFNMADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v213rm, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v213rmb, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v213rmbk, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v213rmbkz, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v213rmk, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v213rmkz, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v213rr, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v213rrk, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v213rrkz, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v231rm, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v231rmb, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v231rmbk, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v231rmbkz, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v231rmk, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v231rmkz, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v231rr, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v231rrk, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ128v231rrkz, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v213rm, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v213rmb, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v213rmbk, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v213rmbkz, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v213rmk, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v213rmkz, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v213rr, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v213rrk, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v213rrkz, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v231rm, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v231rmb, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v231rmbk, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v231rmbkz, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v231rmk, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v231rmkz, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v231rr, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v231rrk, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZ256v231rrkz, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rm, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rmb, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rmbk, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rmbkz, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rmk, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rmkz, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rr, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rrb, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rrbk, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rrbkz, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rrk, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv213rrkz, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv231rm, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv231rmb, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv231rmbk, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv231rmbkz, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv231rmk, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv231rmkz, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv231rr, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv231rrk, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSZv231rrkz, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr132m, X86_INS_VFNMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr132mY, X86_INS_VFNMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr132r, X86_INS_VFNMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr132rY, X86_INS_VFNMADD132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr213m, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr213mY, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr213r, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr213rY, X86_INS_VFNMADD213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr231m, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr231mY, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr231r, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDPSr231rY, X86_INS_VFNMADD231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSD4mr, X86_INS_VFNMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSD4mr_Int, X86_INS_VFNMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSD4rm, X86_INS_VFNMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSD4rm_Int, X86_INS_VFNMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSD4rr, X86_INS_VFNMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSD4rr_Int, X86_INS_VFNMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSD4rr_REV, X86_INS_VFNMADDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSDZm, X86_INS_VFNMADD213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSDZr, X86_INS_VFNMADD213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSDr132m, X86_INS_VFNMADD132SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSDr132r, X86_INS_VFNMADD132SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSDr213m, X86_INS_VFNMADD213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSDr213r, X86_INS_VFNMADD213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSDr231m, X86_INS_VFNMADD231SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSDr231r, X86_INS_VFNMADD231SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSS4mr, X86_INS_VFNMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSS4mr_Int, X86_INS_VFNMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSS4rm, X86_INS_VFNMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSS4rm_Int, X86_INS_VFNMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSS4rr, X86_INS_VFNMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSS4rr_Int, X86_INS_VFNMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSS4rr_REV, X86_INS_VFNMADDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSSZm, X86_INS_VFNMADD213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSSZr, X86_INS_VFNMADD213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSSr132m, X86_INS_VFNMADD132SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSSr132r, X86_INS_VFNMADD132SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSSr213m, X86_INS_VFNMADD213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSSr213r, X86_INS_VFNMADD213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSSr231m, X86_INS_VFNMADD231SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMADDSSr231r, X86_INS_VFNMADD231SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PDZ128m, X86_INS_VFNMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PDZ128mb, X86_INS_VFNMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PDZ256m, X86_INS_VFNMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PDZ256mb, X86_INS_VFNMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PDZm, X86_INS_VFNMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PDZmb, X86_INS_VFNMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PSZ128m, X86_INS_VFNMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PSZ128mb, X86_INS_VFNMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PSZ256m, X86_INS_VFNMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PSZ256mb, X86_INS_VFNMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PSZm, X86_INS_VFNMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUB132PSZmb, X86_INS_VFNMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPD4mr, X86_INS_VFNMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPD4mrY, X86_INS_VFNMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPD4rm, X86_INS_VFNMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPD4rmY, X86_INS_VFNMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPD4rr, X86_INS_VFNMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPD4rrY, X86_INS_VFNMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPD4rrY_REV, X86_INS_VFNMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPD4rr_REV, X86_INS_VFNMSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v213rm, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v213rmb, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v213rmbk, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v213rmbkz, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v213rmk, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v213rmkz, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v213rr, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v213rrk, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v213rrkz, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v231rm, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v231rmb, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v231rmbk, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v231rmbkz, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v231rmk, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v231rmkz, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v231rr, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v231rrk, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ128v231rrkz, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v213rm, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v213rmb, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v213rmbk, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v213rmbkz, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v213rmk, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v213rmkz, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v213rr, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v213rrk, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v213rrkz, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v231rm, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v231rmb, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v231rmbk, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v231rmbkz, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v231rmk, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v231rmkz, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v231rr, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v231rrk, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZ256v231rrkz, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rm, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rmb, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rmbk, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rmbkz, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rmk, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rmkz, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rr, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rrb, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rrbk, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rrbkz, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rrk, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv213rrkz, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv231rm, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv231rmb, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv231rmbk, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv231rmbkz, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv231rmk, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv231rmkz, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv231rr, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv231rrk, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDZv231rrkz, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr132m, X86_INS_VFNMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr132mY, X86_INS_VFNMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr132r, X86_INS_VFNMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr132rY, X86_INS_VFNMSUB132PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr213m, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr213mY, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr213r, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr213rY, X86_INS_VFNMSUB213PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr231m, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr231mY, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr231r, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPDr231rY, X86_INS_VFNMSUB231PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPS4mr, X86_INS_VFNMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPS4mrY, X86_INS_VFNMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPS4rm, X86_INS_VFNMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPS4rmY, X86_INS_VFNMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPS4rr, X86_INS_VFNMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPS4rrY, X86_INS_VFNMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPS4rrY_REV, X86_INS_VFNMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPS4rr_REV, X86_INS_VFNMSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v213rm, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v213rmb, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v213rmbk, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v213rmbkz, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v213rmk, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v213rmkz, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v213rr, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v213rrk, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v213rrkz, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v231rm, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v231rmb, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v231rmbk, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v231rmbkz, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v231rmk, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v231rmkz, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v231rr, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v231rrk, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ128v231rrkz, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v213rm, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v213rmb, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v213rmbk, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v213rmbkz, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v213rmk, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v213rmkz, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v213rr, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v213rrk, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v213rrkz, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v231rm, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v231rmb, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v231rmbk, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v231rmbkz, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v231rmk, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v231rmkz, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v231rr, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v231rrk, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZ256v231rrkz, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rm, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rmb, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rmbk, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rmbkz, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rmk, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rmkz, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rr, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rrb, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rrbk, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rrbkz, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rrk, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv213rrkz, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv231rm, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv231rmb, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv231rmbk, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv231rmbkz, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv231rmk, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv231rmkz, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv231rr, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv231rrk, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSZv231rrkz, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr132m, X86_INS_VFNMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr132mY, X86_INS_VFNMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr132r, X86_INS_VFNMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr132rY, X86_INS_VFNMSUB132PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr213m, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr213mY, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr213r, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr213rY, X86_INS_VFNMSUB213PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr231m, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr231mY, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr231r, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBPSr231rY, X86_INS_VFNMSUB231PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSD4mr, X86_INS_VFNMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSD4mr_Int, X86_INS_VFNMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSD4rm, X86_INS_VFNMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSD4rm_Int, X86_INS_VFNMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSD4rr, X86_INS_VFNMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSD4rr_Int, X86_INS_VFNMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSD4rr_REV, X86_INS_VFNMSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSDZm, X86_INS_VFNMSUB213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSDZr, X86_INS_VFNMSUB213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSDr132m, X86_INS_VFNMSUB132SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSDr132r, X86_INS_VFNMSUB132SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSDr213m, X86_INS_VFNMSUB213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSDr213r, X86_INS_VFNMSUB213SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSDr231m, X86_INS_VFNMSUB231SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSDr231r, X86_INS_VFNMSUB231SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSS4mr, X86_INS_VFNMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSS4mr_Int, X86_INS_VFNMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSS4rm, X86_INS_VFNMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSS4rm_Int, X86_INS_VFNMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSS4rr, X86_INS_VFNMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSS4rr_Int, X86_INS_VFNMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSS4rr_REV, X86_INS_VFNMSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA4, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSSZm, X86_INS_VFNMSUB213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSSZr, X86_INS_VFNMSUB213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSSr132m, X86_INS_VFNMSUB132SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSSr132r, X86_INS_VFNMSUB132SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSSr213m, X86_INS_VFNMSUB213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSSr213r, X86_INS_VFNMSUB213SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSSr231m, X86_INS_VFNMSUB231SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFNMSUBSSr231r, X86_INS_VFNMSUB231SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FMA, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZPDrm, X86_INS_VFRCZPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZPDrmY, X86_INS_VFRCZPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZPDrr, X86_INS_VFRCZPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZPDrrY, X86_INS_VFRCZPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZPSrm, X86_INS_VFRCZPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZPSrmY, X86_INS_VFRCZPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZPSrr, X86_INS_VFRCZPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZPSrrY, X86_INS_VFRCZPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZSDrm, X86_INS_VFRCZSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZSDrr, X86_INS_VFRCZSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZSSrm, X86_INS_VFRCZSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFRCZSSrr, X86_INS_VFRCZSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsANDNPDrm, X86_INS_VANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsANDNPDrr, X86_INS_VANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsANDNPSrm, X86_INS_VANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsANDNPSrr, X86_INS_VANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsANDPDrm, X86_INS_VANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsANDPDrr, X86_INS_VANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsANDPSrm, X86_INS_VANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsANDPSrr, X86_INS_VANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsORPDrm, X86_INS_VORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsORPDrr, X86_INS_VORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsORPSrm, X86_INS_VORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsORPSrr, X86_INS_VORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsXORPDrm, X86_INS_VXORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsXORPDrr, X86_INS_VXORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsXORPSrm, X86_INS_VXORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFsXORPSrr, X86_INS_VXORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvANDNPDrm, X86_INS_VANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvANDNPDrr, X86_INS_VANDNPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvANDNPSrm, X86_INS_VANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvANDNPSrr, X86_INS_VANDNPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvANDPDrm, X86_INS_VANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvANDPDrr, X86_INS_VANDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvANDPSrm, X86_INS_VANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvANDPSrr, X86_INS_VANDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvORPDrm, X86_INS_VORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvORPDrr, X86_INS_VORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvORPSrm, X86_INS_VORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvORPSrr, X86_INS_VORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvXORPDrm, X86_INS_VXORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvXORPDrr, X86_INS_VXORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvXORPSrm, X86_INS_VXORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VFvXORPSrr, X86_INS_VXORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERDPDYrm, X86_INS_VGATHERDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERDPDZrm, X86_INS_VGATHERDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERDPDrm, X86_INS_VGATHERDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERDPSYrm, X86_INS_VGATHERDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERDPSZrm, X86_INS_VGATHERDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERDPSrm, X86_INS_VGATHERDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERPF0DPDm, X86_INS_VGATHERPF0DPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERPF0DPSm, X86_INS_VGATHERPF0DPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERPF0QPDm, X86_INS_VGATHERPF0QPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERPF0QPSm, X86_INS_VGATHERPF0QPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERPF1DPDm, X86_INS_VGATHERPF1DPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERPF1DPSm, X86_INS_VGATHERPF1DPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERPF1QPDm, X86_INS_VGATHERPF1QPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERPF1QPSm, X86_INS_VGATHERPF1QPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERQPDYrm, X86_INS_VGATHERQPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERQPDZrm, X86_INS_VGATHERQPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERQPDrm, X86_INS_VGATHERQPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERQPSYrm, X86_INS_VGATHERQPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERQPSZrm, X86_INS_VGATHERQPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VGATHERQPSrm, X86_INS_VGATHERQPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHADDPDYrm, X86_INS_VHADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHADDPDYrr, X86_INS_VHADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHADDPDrm, X86_INS_VHADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHADDPDrr, X86_INS_VHADDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHADDPSYrm, X86_INS_VHADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHADDPSYrr, X86_INS_VHADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHADDPSrm, X86_INS_VHADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHADDPSrr, X86_INS_VHADDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHSUBPDYrm, X86_INS_VHSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHSUBPDYrr, X86_INS_VHSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHSUBPDrm, X86_INS_VHSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHSUBPDrr, X86_INS_VHSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHSUBPSYrm, X86_INS_VHSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHSUBPSYrr, X86_INS_VHSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHSUBPSrm, X86_INS_VHSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VHSUBPSrr, X86_INS_VHSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTF128rm, X86_INS_VINSERTF128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTF128rr, X86_INS_VINSERTF128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTF32x4rm, X86_INS_VINSERTF32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTF32x4rr, X86_INS_VINSERTF32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTF32x8rm, X86_INS_VINSERTF32X8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTF32x8rr, X86_INS_VINSERTF32X8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTF64x2rm, X86_INS_VINSERTF64X2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTF64x2rr, X86_INS_VINSERTF64X2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTF64x4rm, X86_INS_VINSERTF64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTF64x4rr, X86_INS_VINSERTF64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTI128rm, X86_INS_VINSERTI128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTI128rr, X86_INS_VINSERTI128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTI32x4rm, X86_INS_VINSERTI32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTI32x4rr, X86_INS_VINSERTI32X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTI32x8rm, X86_INS_VINSERTI32X8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTI32x8rr, X86_INS_VINSERTI32X8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTI64x2rm, X86_INS_VINSERTI64X2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTI64x2rr, X86_INS_VINSERTI64X2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTI64x4rm, X86_INS_VINSERTI64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTI64x4rr, X86_INS_VINSERTI64X4,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTPSrm, X86_INS_VINSERTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTPSrr, X86_INS_VINSERTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTPSzrm, X86_INS_VINSERTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VINSERTPSzrr, X86_INS_VINSERTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VLDDQUYrm, X86_INS_VLDDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VLDDQUrm, X86_INS_VLDDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VLDMXCSR, X86_INS_VLDMXCSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMASKMOVDQU, X86_INS_VMASKMOVDQU,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMASKMOVDQU64, X86_INS_VMASKMOVDQU,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDI, 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMASKMOVPDYmr, X86_INS_VMASKMOVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMASKMOVPDYrm, X86_INS_VMASKMOVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMASKMOVPDmr, X86_INS_VMASKMOVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMASKMOVPDrm, X86_INS_VMASKMOVPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMASKMOVPSYmr, X86_INS_VMASKMOVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMASKMOVPSYrm, X86_INS_VMASKMOVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMASKMOVPSmr, X86_INS_VMASKMOVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMASKMOVPSrm, X86_INS_VMASKMOVPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCPDYrm, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCPDYrr, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCPDrm, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCPDrr, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCPSYrm, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCPSYrr, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCPSrm, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCPSrr, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCSDrm, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCSDrr, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCSSrm, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXCSSrr, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDYrm, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDYrr, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ128rm, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ128rmb, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ128rmbk, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ128rmbkz, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ128rmk, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ128rmkz, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ128rr, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ128rrk, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ128rrkz, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ256rm, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ256rmb, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ256rmbk, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ256rmbkz, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ256rmk, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ256rmkz, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ256rr, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ256rrk, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZ256rrkz, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZrm, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZrmb, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZrmbk, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZrmbkz, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZrmk, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZrmkz, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZrr, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZrrk, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDZrrkz, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDrm, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPDrr, X86_INS_VMAXPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSYrm, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSYrr, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ128rm, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ128rmb, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ128rmbk, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ128rmbkz, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ128rmk, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ128rmkz, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ128rr, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ128rrk, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ128rrkz, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ256rm, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ256rmb, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ256rmbk, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ256rmbkz, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ256rmk, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ256rmkz, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ256rr, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ256rrk, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZ256rrkz, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZrm, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZrmb, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZrmbk, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZrmbkz, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZrmk, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZrmkz, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZrr, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZrrk, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSZrrkz, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSrm, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXPSrr, X86_INS_VMAXPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrm, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrm_Int, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrm_Intk, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrm_Intkz, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrr, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrr_Int, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrr_Intk, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrr_Intkz, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrrb, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrrbk, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDZrrbkz, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDrm, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDrm_Int, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDrr, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSDrr_Int, X86_INS_VMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrm, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrm_Int, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrm_Intk, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrm_Intkz, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrr, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrr_Int, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrr_Intk, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrr_Intkz, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrrb, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrrbk, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSZrrbkz, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSrm, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSrm_Int, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSrr, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMAXSSrr_Int, X86_INS_VMAXSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMCALL, X86_INS_VMCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMCLEARm, X86_INS_VMCLEAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMFUNC, X86_INS_VMFUNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCPDYrm, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCPDYrr, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCPDrm, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCPDrr, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCPSYrm, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCPSYrr, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCPSrm, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCPSrr, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCSDrm, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCSDrr, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCSSrm, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINCSSrr, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDYrm, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDYrr, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ128rm, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ128rmb, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ128rmbk, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ128rmbkz, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ128rmk, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ128rmkz, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ128rr, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ128rrk, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ128rrkz, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ256rm, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ256rmb, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ256rmbk, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ256rmbkz, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ256rmk, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ256rmkz, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ256rr, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ256rrk, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZ256rrkz, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZrm, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZrmb, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZrmbk, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZrmbkz, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZrmk, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZrmkz, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZrr, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZrrk, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDZrrkz, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDrm, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPDrr, X86_INS_VMINPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSYrm, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSYrr, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ128rm, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ128rmb, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ128rmbk, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ128rmbkz, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ128rmk, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ128rmkz, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ128rr, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ128rrk, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ128rrkz, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ256rm, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ256rmb, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ256rmbk, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ256rmbkz, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ256rmk, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ256rmkz, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ256rr, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ256rrk, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZ256rrkz, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZrm, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZrmb, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZrmbk, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZrmbkz, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZrmk, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZrmkz, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZrr, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZrrk, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSZrrkz, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSrm, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINPSrr, X86_INS_VMINPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrm, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrm_Int, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrm_Intk, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrm_Intkz, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrr, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrr_Int, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrr_Intk, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrr_Intkz, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrrb, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrrbk, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDZrrbkz, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDrm, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDrm_Int, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDrr, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSDrr_Int, X86_INS_VMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrm, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrm_Int, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrm_Intk, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrm_Intkz, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrr, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrr_Int, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrr_Intk, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrr_Intkz, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrrb, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrrbk, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSZrrbkz, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSrm, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSrm_Int, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSrr, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMINSSrr_Int, X86_INS_VMINSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMLAUNCH, X86_INS_VMLAUNCH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMLOAD32, X86_INS_VMLOAD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMLOAD64, X86_INS_VMLOAD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMMCALL, X86_INS_VMMCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOV64toPQIZrr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOV64toPQIrm, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOV64toPQIrr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOV64toSDZrr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOV64toSDrm, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOV64toSDrr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDYmr, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDYrm, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDYrr, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDYrr_REV, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128mr, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128mrk, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128rm, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128rmk, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128rmkz, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128rr, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128rr_alt, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128rrk, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128rrk_alt, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128rrkz, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ128rrkz_alt, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256mr, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256mrk, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256rm, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256rmk, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256rmkz, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256rr, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256rr_alt, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256rrk, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256rrk_alt, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256rrkz, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZ256rrkz_alt, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZmr, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZmrk, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZrm, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZrmk, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZrmkz, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZrr, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZrr_alt, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZrrk, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZrrk_alt, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZrrkz, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDZrrkz_alt, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDmr, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDrm, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDrr, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPDrr_REV, X86_INS_VMOVAPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSYmr, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSYrm, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSYrr, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSYrr_REV, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128mr, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128mrk, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128rm, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128rmk, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128rmkz, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128rr, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128rr_alt, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128rrk, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128rrk_alt, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128rrkz, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ128rrkz_alt, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256mr, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256mrk, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256rm, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256rmk, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256rmkz, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256rr, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256rr_alt, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256rrk, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256rrk_alt, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256rrkz, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZ256rrkz_alt, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZmr, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZmrk, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZrm, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZrmk, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZrmkz, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZrr, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZrr_alt, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZrrk, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZrrk_alt, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZrrkz, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSZrrkz_alt, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSmr, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSrm, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSrr, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVAPSrr_REV, X86_INS_VMOVAPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDDUPYrm, X86_INS_VMOVDDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDDUPYrr, X86_INS_VMOVDDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDDUPZrm, X86_INS_VMOVDDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDDUPZrr, X86_INS_VMOVDDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDDUPrm, X86_INS_VMOVDDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDDUPrr, X86_INS_VMOVDDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDI2PDIZrm, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDI2PDIZrr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDI2PDIrm, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDI2PDIrr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDI2SSZrm, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDI2SSZrr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDI2SSrm, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDI2SSrr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128mr, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128mrk, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128rm, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128rmk, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128rmkz, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128rr, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128rr_alt, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128rrk, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128rrk_alt, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128rrkz, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z128rrkz_alt, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256mr, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256mrk, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256rm, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256rmk, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256rmkz, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256rr, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256rr_alt, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256rrk, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256rrk_alt, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256rrkz, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Z256rrkz_alt, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zmr, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zmrk, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zrm, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zrmk, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zrmkz, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zrr, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zrr_alt, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zrrk, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zrrk_alt, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zrrkz, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA32Zrrkz_alt, X86_INS_VMOVDQA32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128mr, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128mrk, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128rm, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128rmk, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128rmkz, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128rr, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128rr_alt, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128rrk, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128rrk_alt, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128rrkz, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z128rrkz_alt, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256mr, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256mrk, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256rm, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256rmk, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256rmkz, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256rr, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256rr_alt, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256rrk, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256rrk_alt, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256rrkz, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Z256rrkz_alt, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zmr, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zmrk, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zrm, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zrmk, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zrmkz, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zrr, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zrr_alt, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zrrk, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zrrk_alt, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zrrkz, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQA64Zrrkz_alt, X86_INS_VMOVDQA64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQAYmr, X86_INS_VMOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQAYrm, X86_INS_VMOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQAYrr, X86_INS_VMOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQAYrr_REV, X86_INS_VMOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQAmr, X86_INS_VMOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQArm, X86_INS_VMOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQArr, X86_INS_VMOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQArr_REV, X86_INS_VMOVDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128mr, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128mrk, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128rm, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128rmk, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128rmkz, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128rr, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128rr_alt, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128rrk, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128rrk_alt, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128rrkz, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z128rrkz_alt, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256mr, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256mrk, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256rm, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256rmk, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256rmkz, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256rr, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256rr_alt, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256rrk, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256rrk_alt, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256rrkz, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Z256rrkz_alt, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zmr, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zmrk, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zrm, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zrmk, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zrmkz, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zrr, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zrr_alt, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zrrk, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zrrk_alt, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zrrkz, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU16Zrrkz_alt, X86_INS_VMOVDQU16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128mr, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128mrk, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128rm, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128rmk, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128rmkz, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128rr, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128rr_alt, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128rrk, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128rrk_alt, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128rrkz, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z128rrkz_alt, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256mr, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256mrk, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256rm, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256rmk, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256rmkz, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256rr, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256rr_alt, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256rrk, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256rrk_alt, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256rrkz, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Z256rrkz_alt, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zmr, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zmrk, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zrm, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zrmk, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zrmkz, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zrr, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zrr_alt, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zrrk, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zrrk_alt, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zrrkz, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU32Zrrkz_alt, X86_INS_VMOVDQU32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128mr, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128mrk, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128rm, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128rmk, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128rmkz, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128rr, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128rr_alt, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128rrk, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128rrk_alt, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128rrkz, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z128rrkz_alt, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256mr, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256mrk, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256rm, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256rmk, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256rmkz, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256rr, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256rr_alt, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256rrk, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256rrk_alt, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256rrkz, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Z256rrkz_alt, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zmr, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zmrk, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zrm, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zrmk, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zrmkz, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zrr, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zrr_alt, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zrrk, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zrrk_alt, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zrrkz, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU64Zrrkz_alt, X86_INS_VMOVDQU64,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128mr, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128mrk, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128rm, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128rmk, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128rmkz, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128rr, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128rr_alt, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128rrk, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128rrk_alt, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128rrkz, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z128rrkz_alt, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256mr, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256mrk, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256rm, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256rmk, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256rmkz, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256rr, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256rr_alt, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256rrk, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256rrk_alt, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256rrkz, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Z256rrkz_alt, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zmr, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zmrk, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zrm, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zrmk, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zrmkz, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zrr, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zrr_alt, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zrrk, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zrrk_alt, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zrrkz, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQU8Zrrkz_alt, X86_INS_VMOVDQU8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQUYmr, X86_INS_VMOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQUYrm, X86_INS_VMOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQUYrr, X86_INS_VMOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQUYrr_REV, X86_INS_VMOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQUmr, X86_INS_VMOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQUrm, X86_INS_VMOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQUrr, X86_INS_VMOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVDQUrr_REV, X86_INS_VMOVDQU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVHLPSZrr, X86_INS_VMOVHLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVHLPSrr, X86_INS_VMOVHLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVHPDmr, X86_INS_VMOVHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVHPDrm, X86_INS_VMOVHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVHPSmr, X86_INS_VMOVHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVHPSrm, X86_INS_VMOVHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVLHPSZrr, X86_INS_VMOVLHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVLHPSrr, X86_INS_VMOVLHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVLPDmr, X86_INS_VMOVLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVLPDrm, X86_INS_VMOVLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVLPSmr, X86_INS_VMOVLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVLPSrm, X86_INS_VMOVLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVMSKPDYrr, X86_INS_VMOVMSKPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVMSKPDrr, X86_INS_VMOVMSKPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVMSKPSYrr, X86_INS_VMOVMSKPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVMSKPSrr, X86_INS_VMOVMSKPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTDQAYrm, X86_INS_VMOVNTDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTDQAZ128rm, X86_INS_VMOVNTDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTDQAZ256rm, X86_INS_VMOVNTDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTDQAZrm, X86_INS_VMOVNTDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTDQArm, X86_INS_VMOVNTDQA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTDQYmr, X86_INS_VMOVNTDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTDQZ128mr, X86_INS_VMOVNTDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTDQZ256mr, X86_INS_VMOVNTDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTDQZmr, X86_INS_VMOVNTDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTDQmr, X86_INS_VMOVNTDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTPDYmr, X86_INS_VMOVNTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTPDZ128mr, X86_INS_VMOVNTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTPDZ256mr, X86_INS_VMOVNTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTPDZmr, X86_INS_VMOVNTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTPDmr, X86_INS_VMOVNTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTPSYmr, X86_INS_VMOVNTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTPSZ128mr, X86_INS_VMOVNTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTPSZ256mr, X86_INS_VMOVNTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTPSZmr, X86_INS_VMOVNTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVNTPSmr, X86_INS_VMOVNTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVPDI2DIZmr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVPDI2DIZrr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVPDI2DImr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVPDI2DIrr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVPQI2QImr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVPQI2QIrr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVPQIto64Zmr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVPQIto64Zrr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVPQIto64rm, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVPQIto64rr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVQI2PQIZrm, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVQI2PQIrm, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDZmr, X86_INS_VMOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDZmrk, X86_INS_VMOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDZrm, X86_INS_VMOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDZrr, X86_INS_VMOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDZrr_REV, X86_INS_VMOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDZrrk, X86_INS_VMOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDmr, X86_INS_VMOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDrm, X86_INS_VMOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDrr, X86_INS_VMOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDrr_REV, X86_INS_VMOVSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDto64Zmr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDto64Zrr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDto64mr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSDto64rr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSHDUPYrm, X86_INS_VMOVSHDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSHDUPYrr, X86_INS_VMOVSHDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSHDUPZrm, X86_INS_VMOVSHDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSHDUPZrr, X86_INS_VMOVSHDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSHDUPrm, X86_INS_VMOVSHDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSHDUPrr, X86_INS_VMOVSHDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSLDUPYrm, X86_INS_VMOVSLDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSLDUPYrr, X86_INS_VMOVSLDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSLDUPZrm, X86_INS_VMOVSLDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSLDUPZrr, X86_INS_VMOVSLDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSLDUPrm, X86_INS_VMOVSLDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSLDUPrr, X86_INS_VMOVSLDUP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSS2DIZmr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSS2DIZrr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSS2DImr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSS2DIrr, X86_INS_VMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSSZmr, X86_INS_VMOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSSZmrk, X86_INS_VMOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSSZrm, X86_INS_VMOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSSZrr, X86_INS_VMOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSSZrr_REV, X86_INS_VMOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSSZrrk, X86_INS_VMOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSSmr, X86_INS_VMOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSSrm, X86_INS_VMOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSSrr, X86_INS_VMOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVSSrr_REV, X86_INS_VMOVSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDYmr, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDYrm, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDYrr, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDYrr_REV, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128mr, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128mrk, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128rm, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128rmk, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128rmkz, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128rr, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128rr_alt, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128rrk, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128rrk_alt, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128rrkz, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ128rrkz_alt, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256mr, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256mrk, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256rm, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256rmk, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256rmkz, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256rr, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256rr_alt, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256rrk, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256rrk_alt, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256rrkz, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZ256rrkz_alt, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZmr, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZmrk, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZrm, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZrmk, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZrmkz, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZrr, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZrr_alt, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZrrk, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZrrk_alt, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZrrkz, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDZrrkz_alt, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDmr, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDrm, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDrr, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPDrr_REV, X86_INS_VMOVUPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSYmr, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSYrm, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSYrr, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSYrr_REV, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128mr, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128mrk, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128rm, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128rmk, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128rmkz, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128rr, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128rr_alt, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128rrk, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128rrk_alt, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128rrkz, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ128rrkz_alt, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256mr, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256mrk, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256rm, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256rmk, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256rmkz, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256rr, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256rr_alt, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256rrk, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256rrk_alt, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256rrkz, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZ256rrkz_alt, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZmr, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZmrk, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZrm, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZrmk, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZrmkz, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZrr, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZrr_alt, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZrrk, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZrrk_alt, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZrrkz, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSZrrkz_alt, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSmr, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSrm, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSrr, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVUPSrr_REV, X86_INS_VMOVUPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVZPQILo2PQIZrm, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVZPQILo2PQIZrr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVZPQILo2PQIrm, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVZPQILo2PQIrr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVZQI2PQIrm, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMOVZQI2PQIrr, X86_INS_VMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMPSADBWYrmi, X86_INS_VMPSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMPSADBWYrri, X86_INS_VMPSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMPSADBWrmi, X86_INS_VMPSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMPSADBWrri, X86_INS_VMPSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMPTRLDm, X86_INS_VMPTRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMPTRSTm, X86_INS_VMPTRST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMREAD32rm, X86_INS_VMREAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMREAD32rr, X86_INS_VMREAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMREAD64rm, X86_INS_VMREAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMREAD64rr, X86_INS_VMREAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMRESUME, X86_INS_VMRESUME,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMRUN32, X86_INS_VMRUN,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMRUN64, X86_INS_VMRUN,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMSAVE32, X86_INS_VMSAVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMSAVE64, X86_INS_VMSAVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDYrm, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDYrr, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ128rm, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ128rmb, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ128rmbk, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ128rmbkz, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ128rmk, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ128rmkz, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ128rr, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ128rrk, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ128rrkz, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ256rm, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ256rmb, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ256rmbk, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ256rmbkz, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ256rmk, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ256rmkz, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ256rr, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ256rrk, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZ256rrkz, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrb, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrbk, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrbkz, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrm, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrmb, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrmbk, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrmbkz, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrmk, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrmkz, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrr, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrrk, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDZrrkz, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDrm, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPDrr, X86_INS_VMULPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSYrm, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSYrr, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ128rm, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ128rmb, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ128rmbk, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ128rmbkz, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ128rmk, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ128rmkz, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ128rr, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ128rrk, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ128rrkz, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ256rm, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ256rmb, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ256rmbk, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ256rmbkz, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ256rmk, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ256rmkz, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ256rr, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ256rrk, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZ256rrkz, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrb, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrbk, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrbkz, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrm, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrmb, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrmbk, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrmbkz, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrmk, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrmkz, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrr, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrrk, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSZrrkz, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSrm, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULPSrr, X86_INS_VMULPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrm, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrm_Int, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrm_Intk, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrm_Intkz, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrr, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrr_Int, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrr_Intk, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrr_Intkz, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrrb, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrrbk, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDZrrbkz, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDrm, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDrm_Int, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDrr, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSDrr_Int, X86_INS_VMULSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrm, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrm_Int, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrm_Intk, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrm_Intkz, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrr, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrr_Int, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrr_Intk, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrr_Intkz, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrrb, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrrbk, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSZrrbkz, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSrm, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSrm_Int, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSrr, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMULSSrr_Int, X86_INS_VMULSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMWRITE32rm, X86_INS_VMWRITE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMWRITE32rr, X86_INS_VMWRITE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMWRITE64rm, X86_INS_VMWRITE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMWRITE64rr, X86_INS_VMWRITE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMXOFF, X86_INS_VMXOFF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMXON, X86_INS_VMXON,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VORPDYrm, X86_INS_VORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VORPDYrr, X86_INS_VORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VORPDrm, X86_INS_VORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VORPDrr, X86_INS_VORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VORPSYrm, X86_INS_VORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VORPSYrr, X86_INS_VORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VORPSrm, X86_INS_VORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VORPSrr, X86_INS_VORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSBrm128, X86_INS_VPABSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSBrm256, X86_INS_VPABSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSBrr128, X86_INS_VPABSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSBrr256, X86_INS_VPABSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDZrm, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDZrmb, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDZrmbk, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDZrmbkz, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDZrmk, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDZrmkz, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDZrr, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDZrrk, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDZrrkz, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDrm128, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDrm256, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDrr128, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSDrr256, X86_INS_VPABSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSQZrm, X86_INS_VPABSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSQZrmb, X86_INS_VPABSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSQZrmbk, X86_INS_VPABSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSQZrmbkz, X86_INS_VPABSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSQZrmk, X86_INS_VPABSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSQZrmkz, X86_INS_VPABSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSQZrr, X86_INS_VPABSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSQZrrk, X86_INS_VPABSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSQZrrkz, X86_INS_VPABSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSWrm128, X86_INS_VPABSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSWrm256, X86_INS_VPABSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSWrr128, X86_INS_VPABSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPABSWrr256, X86_INS_VPABSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKSSDWYrm, X86_INS_VPACKSSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKSSDWYrr, X86_INS_VPACKSSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKSSDWrm, X86_INS_VPACKSSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKSSDWrr, X86_INS_VPACKSSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKSSWBYrm, X86_INS_VPACKSSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKSSWBYrr, X86_INS_VPACKSSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKSSWBrm, X86_INS_VPACKSSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKSSWBrr, X86_INS_VPACKSSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKUSDWYrm, X86_INS_VPACKUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKUSDWYrr, X86_INS_VPACKUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKUSDWrm, X86_INS_VPACKUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKUSDWrr, X86_INS_VPACKUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKUSWBYrm, X86_INS_VPACKUSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKUSWBYrr, X86_INS_VPACKUSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKUSWBrm, X86_INS_VPACKUSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPACKUSWBrr, X86_INS_VPACKUSWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBYrm, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBYrr, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ128rm, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ128rmk, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ128rmkz, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ128rr, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ128rrk, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ128rrkz, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ256rm, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ256rmk, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ256rmkz, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ256rr, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ256rrk, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZ256rrkz, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZrm, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZrmk, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZrmkz, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZrr, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZrrk, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBZrrkz, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBrm, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDBrr, X86_INS_VPADDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDYrm, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDYrr, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ128rm, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ128rmb, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ128rmbk, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ128rmbkz, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ128rmk, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ128rmkz, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ128rr, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ128rrk, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ128rrkz, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ256rm, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ256rmb, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ256rmbk, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ256rmbkz, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ256rmk, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ256rmkz, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ256rr, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ256rrk, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZ256rrkz, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZrm, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZrmb, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZrmbk, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZrmbkz, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZrmk, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZrmkz, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZrr, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZrrk, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDZrrkz, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDrm, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDDrr, X86_INS_VPADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQYrm, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQYrr, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ128rm, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ128rmb, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ128rmbk, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ128rmbkz, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ128rmk, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ128rmkz, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ128rr, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ128rrk, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ128rrkz, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ256rm, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ256rmb, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ256rmbk, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ256rmbkz, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ256rmk, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ256rmkz, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ256rr, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ256rrk, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZ256rrkz, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZrm, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZrmb, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZrmbk, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZrmbkz, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZrmk, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZrmkz, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZrr, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZrrk, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQZrrkz, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQrm, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDQrr, X86_INS_VPADDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDSBYrm, X86_INS_VPADDSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDSBYrr, X86_INS_VPADDSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDSBrm, X86_INS_VPADDSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDSBrr, X86_INS_VPADDSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDSWYrm, X86_INS_VPADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDSWYrr, X86_INS_VPADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDSWrm, X86_INS_VPADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDSWrr, X86_INS_VPADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDUSBYrm, X86_INS_VPADDUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDUSBYrr, X86_INS_VPADDUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDUSBrm, X86_INS_VPADDUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDUSBrr, X86_INS_VPADDUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDUSWYrm, X86_INS_VPADDUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDUSWYrr, X86_INS_VPADDUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDUSWrm, X86_INS_VPADDUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDUSWrr, X86_INS_VPADDUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWYrm, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWYrr, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ128rm, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ128rmk, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ128rmkz, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ128rr, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ128rrk, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ128rrkz, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ256rm, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ256rmk, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ256rmkz, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ256rr, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ256rrk, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZ256rrkz, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZrm, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZrmk, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZrmkz, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZrr, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZrrk, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWZrrkz, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWrm, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPADDWrr, X86_INS_VPADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPALIGNR128rm, X86_INS_VPALIGNR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPALIGNR128rr, X86_INS_VPALIGNR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPALIGNR256rm, X86_INS_VPALIGNR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPALIGNR256rr, X86_INS_VPALIGNR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ128rm, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ128rmb, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ128rmbk, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ128rmbkz, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ128rmk, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ128rmkz, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ128rr, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ128rrk, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ128rrkz, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ256rm, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ256rmb, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ256rmbk, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ256rmbkz, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ256rmk, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ256rmkz, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ256rr, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ256rrk, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZ256rrkz, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZrm, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZrmb, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZrmbk, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZrmbkz, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZrmk, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZrmkz, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZrr, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZrrk, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDDZrrkz, X86_INS_VPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ128rm, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ128rmb, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ128rmbk, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ128rmbkz, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ128rmk, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ128rmkz, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ128rr, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ128rrk, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ128rrkz, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ256rm, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ256rmb, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ256rmbk, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ256rmbkz, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ256rmk, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ256rmkz, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ256rr, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ256rrk, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZ256rrkz, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZrm, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZrmb, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZrmbk, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZrmbkz, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZrmk, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZrmkz, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZrr, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZrrk, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNDZrrkz, X86_INS_VPANDND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ128rm, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ128rmb, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ128rmbk, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ128rmbkz, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ128rmk, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ128rmkz, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ128rr, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ128rrk, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ128rrkz, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ256rm, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ256rmb, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ256rmbk, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ256rmbkz, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ256rmk, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ256rmkz, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ256rr, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ256rrk, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZ256rrkz, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZrm, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZrmb, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZrmbk, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZrmbkz, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZrmk, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZrmkz, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZrr, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZrrk, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNQZrrkz, X86_INS_VPANDNQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNYrm, X86_INS_VPANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNYrr, X86_INS_VPANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNrm, X86_INS_VPANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDNrr, X86_INS_VPANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ128rm, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ128rmb, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ128rmbk, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ128rmbkz, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ128rmk, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ128rmkz, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ128rr, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ128rrk, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ128rrkz, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ256rm, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ256rmb, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ256rmbk, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ256rmbkz, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ256rmk, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ256rmkz, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ256rr, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ256rrk, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZ256rrkz, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZrm, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZrmb, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZrmbk, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZrmbkz, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZrmk, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZrmkz, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZrr, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZrrk, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDQZrrkz, X86_INS_VPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDYrm, X86_INS_VPAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDYrr, X86_INS_VPAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDrm, X86_INS_VPAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPANDrr, X86_INS_VPAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPAVGBYrm, X86_INS_VPAVGB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPAVGBYrr, X86_INS_VPAVGB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPAVGBrm, X86_INS_VPAVGB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPAVGBrr, X86_INS_VPAVGB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPAVGWYrm, X86_INS_VPAVGW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPAVGWYrr, X86_INS_VPAVGW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPAVGWrm, X86_INS_VPAVGW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPAVGWrr, X86_INS_VPAVGW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDDYrmi, X86_INS_VPBLENDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDDYrri, X86_INS_VPBLENDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDDrmi, X86_INS_VPBLENDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDDrri, X86_INS_VPBLENDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ128rm, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ128rmk, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ128rmkz, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ128rr, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ128rrk, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ128rrkz, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ256rm, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ256rmk, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ256rmkz, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ256rr, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ256rrk, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZ256rrkz, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZrm, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZrmk, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZrmkz, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZrr, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZrrk, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMBZrrkz, X86_INS_VPBLENDMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ128rm, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ128rmb, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ128rmbk, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ128rmk, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ128rmkz, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ128rr, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ128rrk, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ128rrkz, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ256rm, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ256rmb, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ256rmbk, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ256rmk, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ256rmkz, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ256rr, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ256rrk, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZ256rrkz, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZrm, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZrmb, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZrmbk, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZrmk, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZrmkz, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZrr, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZrrk, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMDZrrkz, X86_INS_VPBLENDMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ128rm, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ128rmb, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ128rmbk, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ128rmk, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ128rmkz, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ128rr, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ128rrk, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ128rrkz, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ256rm, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ256rmb, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ256rmbk, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ256rmk, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ256rmkz, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ256rr, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ256rrk, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZ256rrkz, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZrm, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZrmb, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZrmbk, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZrmk, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZrmkz, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZrr, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZrrk, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMQZrrkz, X86_INS_VPBLENDMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ128rm, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ128rmk, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ128rmkz, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ128rr, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ128rrk, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ128rrkz, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ256rm, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ256rmk, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ256rmkz, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ256rr, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ256rrk, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZ256rrkz, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZrm, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZrmk, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZrmkz, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZrr, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZrrk, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDMWZrrkz, X86_INS_VPBLENDMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDVBYrm, X86_INS_VPBLENDVB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDVBYrr, X86_INS_VPBLENDVB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDVBrm, X86_INS_VPBLENDVB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDVBrr, X86_INS_VPBLENDVB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDWYrmi, X86_INS_VPBLENDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDWYrri, X86_INS_VPBLENDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDWrmi, X86_INS_VPBLENDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBLENDWrri, X86_INS_VPBLENDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBYrm, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBYrr, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrZ128r, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrZ128rk, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrZ128rkz, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrZ256r, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrZ256rk, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrZ256rkz, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrZr, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrZrk, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrZrkz, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrm, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTBrr, X86_INS_VPBROADCASTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDYrm, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDYrr, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDZkrm, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDZkrr, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDZrm, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDZrr, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrZ128r, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrZ128rk, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrZ128rkz, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrZ256r, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrZ256rk, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrZ256rkz, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrZr, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrZrk, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrZrkz, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrm, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTDrr, X86_INS_VPBROADCASTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTMB2QZ128rr, X86_INS_VPBROADCASTMB2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTMB2QZ256rr, X86_INS_VPBROADCASTMB2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTMB2QZrr, X86_INS_VPBROADCASTMB2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTMW2DZ128rr, X86_INS_VPBROADCASTMW2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTMW2DZ256rr, X86_INS_VPBROADCASTMW2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTMW2DZrr, X86_INS_VPBROADCASTMW2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQYrm, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQYrr, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQZkrm, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQZkrr, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQZrm, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQZrr, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrZ128r, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrZ128rk, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrZ128rkz, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrZ256r, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrZ256rk, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrZ256rkz, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrZr, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrZrk, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrZrkz, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrm, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTQrr, X86_INS_VPBROADCASTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWYrm, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWYrr, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrZ128r, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrZ128rk, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrZ128rkz, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrZ256r, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrZ256rk, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrZ256rkz, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrZr, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrZrk, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrZrkz, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrm, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPBROADCASTWrr, X86_INS_VPBROADCASTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCLMULQDQrm, X86_INS_VPCLMULQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_PCLMUL, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCLMULQDQrr, X86_INS_VPCLMULQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_PCLMUL, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMOVmr, X86_INS_VPCMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMOVmrY, X86_INS_VPCMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMOVrm, X86_INS_VPCMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMOVrmY, X86_INS_VPCMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMOVrr, X86_INS_VPCMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMOVrrY, X86_INS_VPCMOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ128rmi, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ128rmi_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ128rmik, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ128rmik_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ128rri, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ128rri_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ128rrik, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ128rrik_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ256rmi, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ256rmi_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ256rmik, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ256rmik_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ256rri, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ256rri_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ256rrik, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZ256rrik_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZrmi, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZrmi_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZrmik, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZrmik_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZrri, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZrri_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZrrik, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPBZrrik_alt, X86_INS_VPCMPB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rmi, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rmi_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rmib, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rmib_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rmibk, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rmibk_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rmik, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rmik_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rri, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rri_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rrik, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ128rrik_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rmi, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rmi_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rmib, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rmib_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rmibk, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rmibk_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rmik, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rmik_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rri, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rri_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rrik, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZ256rrik_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrmi, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrmi_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrmib, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrmib_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrmibk, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrmibk_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrmik, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrmik_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrri, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrri_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrrik, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPDZrrik_alt, X86_INS_VPCMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBYrm, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBYrr, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZ128rm, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZ128rmk, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZ128rr, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZ128rrk, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZ256rm, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZ256rmk, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZ256rr, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZ256rrk, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZrm, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZrmk, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZrr, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBZrrk, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBrm, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQBrr, X86_INS_VPCMPEQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDYrm, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDYrr, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ128rm, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ128rmb, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ128rmbk, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ128rmk, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ128rr, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ128rrk, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ256rm, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ256rmb, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ256rmbk, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ256rmk, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ256rr, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZ256rrk, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZrm, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZrmb, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZrmbk, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZrmk, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZrr, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDZrrk, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDrm, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQDrr, X86_INS_VPCMPEQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQYrm, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQYrr, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ128rm, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ128rmb, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ128rmbk, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ128rmk, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ128rr, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ128rrk, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ256rm, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ256rmb, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ256rmbk, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ256rmk, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ256rr, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZ256rrk, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZrm, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZrmb, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZrmbk, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZrmk, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZrr, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQZrrk, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQrm, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQQrr, X86_INS_VPCMPEQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWYrm, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWYrr, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZ128rm, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZ128rmk, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZ128rr, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZ128rrk, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZ256rm, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZ256rmk, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZ256rr, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZ256rrk, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZrm, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZrmk, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZrr, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWZrrk, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWrm, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPEQWrr, X86_INS_VPCMPEQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPESTRIrm, X86_INS_VPCMPESTRI,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPESTRIrr, X86_INS_VPCMPESTRI,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPESTRM128rm, X86_INS_VPCMPESTRM,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPESTRM128rr, X86_INS_VPCMPESTRM,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBYrm, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBYrr, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZ128rm, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZ128rmk, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZ128rr, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZ128rrk, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZ256rm, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZ256rmk, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZ256rr, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZ256rrk, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZrm, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZrmk, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZrr, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBZrrk, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBrm, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTBrr, X86_INS_VPCMPGTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDYrm, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDYrr, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ128rm, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ128rmb, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ128rmbk, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ128rmk, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ128rr, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ128rrk, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ256rm, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ256rmb, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ256rmbk, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ256rmk, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ256rr, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZ256rrk, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZrm, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZrmb, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZrmbk, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZrmk, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZrr, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDZrrk, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDrm, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTDrr, X86_INS_VPCMPGTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQYrm, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQYrr, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ128rm, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ128rmb, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ128rmbk, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ128rmk, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ128rr, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ128rrk, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ256rm, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ256rmb, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ256rmbk, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ256rmk, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ256rr, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZ256rrk, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZrm, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZrmb, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZrmbk, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZrmk, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZrr, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQZrrk, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQrm, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTQrr, X86_INS_VPCMPGTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWYrm, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWYrr, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZ128rm, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZ128rmk, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZ128rr, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZ128rrk, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZ256rm, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZ256rmk, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZ256rr, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZ256rrk, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZrm, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZrmk, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZrr, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWZrrk, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWrm, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPGTWrr, X86_INS_VPCMPGTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPISTRIrm, X86_INS_VPCMPISTRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPISTRIrr, X86_INS_VPCMPISTRI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_ECX, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPISTRM128rm, X86_INS_VPCMPISTRM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPISTRM128rr, X86_INS_VPCMPISTRM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_XMM0, X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rmi, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rmi_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rmib, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rmib_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rmibk, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rmibk_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rmik, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rmik_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rri, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rri_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rrik, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ128rrik_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rmi, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rmi_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rmib, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rmib_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rmibk, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rmibk_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rmik, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rmik_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rri, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rri_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rrik, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZ256rrik_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrmi, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrmi_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrmib, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrmib_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrmibk, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrmibk_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrmik, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrmik_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrri, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrri_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrrik, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPQZrrik_alt, X86_INS_VPCMPQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ128rmi, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ128rmi_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ128rmik, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ128rmik_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ128rri, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ128rri_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ128rrik, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ128rrik_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ256rmi, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ256rmi_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ256rmik, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ256rmik_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ256rri, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ256rri_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ256rrik, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZ256rrik_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZrmi, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZrmi_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZrmik, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZrmik_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZrri, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZrri_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZrrik, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUBZrrik_alt, X86_INS_VPCMPUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rmi, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rmi_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rmib, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rmib_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rmibk, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rmibk_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rmik, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rmik_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rri, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rri_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rrik, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ128rrik_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rmi, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rmi_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rmib, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rmib_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rmibk, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rmibk_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rmik, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rmik_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rri, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rri_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rrik, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZ256rrik_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrmi, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrmi_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrmib, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrmib_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrmibk, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrmibk_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrmik, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrmik_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrri, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrri_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrrik, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUDZrrik_alt, X86_INS_VPCMPUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rmi, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rmi_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rmib, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rmib_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rmibk, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rmibk_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rmik, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rmik_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rri, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rri_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rrik, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ128rrik_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rmi, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rmi_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rmib, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rmib_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rmibk, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rmibk_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rmik, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rmik_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rri, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rri_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rrik, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZ256rrik_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrmi, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrmi_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrmib, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrmib_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrmibk, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrmibk_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrmik, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrmik_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrri, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrri_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrrik, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUQZrrik_alt, X86_INS_VPCMPUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ128rmi, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ128rmi_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ128rmik, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ128rmik_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ128rri, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ128rri_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ128rrik, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ128rrik_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ256rmi, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ256rmi_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ256rmik, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ256rmik_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ256rri, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ256rri_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ256rrik, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZ256rrik_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZrmi, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZrmi_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZrmik, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZrmik_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZrri, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZrri_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZrrik, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPUWZrrik_alt, X86_INS_VPCMPUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ128rmi, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ128rmi_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ128rmik, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ128rmik_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ128rri, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ128rri_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ128rrik, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ128rrik_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ256rmi, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ256rmi_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ256rmik, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ256rmik_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ256rri, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ256rri_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ256rrik, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZ256rrik_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZrmi, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZrmi_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZrmik, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZrmik_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZrri, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZrri_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZrrik, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCMPWZrrik_alt, X86_INS_VPCMPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMBmi, X86_INS_VPCOMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMBmi_alt, X86_INS_VPCOMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMBri, X86_INS_VPCOMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMBri_alt, X86_INS_VPCOMB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMDmi, X86_INS_VPCOMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMDmi_alt, X86_INS_VPCOMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMDri, X86_INS_VPCOMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMDri_alt, X86_INS_VPCOMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSDZ128mrk, X86_INS_VPCOMPRESSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSDZ128rrk, X86_INS_VPCOMPRESSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSDZ128rrkz, X86_INS_VPCOMPRESSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSDZ256mrk, X86_INS_VPCOMPRESSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSDZ256rrk, X86_INS_VPCOMPRESSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSDZ256rrkz, X86_INS_VPCOMPRESSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSDZmrk, X86_INS_VPCOMPRESSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSDZrrk, X86_INS_VPCOMPRESSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSDZrrkz, X86_INS_VPCOMPRESSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSQZ128mrk, X86_INS_VPCOMPRESSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSQZ128rrk, X86_INS_VPCOMPRESSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSQZ128rrkz, X86_INS_VPCOMPRESSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSQZ256mrk, X86_INS_VPCOMPRESSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSQZ256rrk, X86_INS_VPCOMPRESSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSQZ256rrkz, X86_INS_VPCOMPRESSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSQZmrk, X86_INS_VPCOMPRESSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSQZrrk, X86_INS_VPCOMPRESSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMPRESSQZrrkz, X86_INS_VPCOMPRESSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMQmi, X86_INS_VPCOMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMQmi_alt, X86_INS_VPCOMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMQri, X86_INS_VPCOMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMQri_alt, X86_INS_VPCOMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUBmi, X86_INS_VPCOMUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUBmi_alt, X86_INS_VPCOMUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUBri, X86_INS_VPCOMUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUBri_alt, X86_INS_VPCOMUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUDmi, X86_INS_VPCOMUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUDmi_alt, X86_INS_VPCOMUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUDri, X86_INS_VPCOMUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUDri_alt, X86_INS_VPCOMUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUQmi, X86_INS_VPCOMUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUQmi_alt, X86_INS_VPCOMUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUQri, X86_INS_VPCOMUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUQri_alt, X86_INS_VPCOMUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUWmi, X86_INS_VPCOMUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUWmi_alt, X86_INS_VPCOMUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUWri, X86_INS_VPCOMUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMUWri_alt, X86_INS_VPCOMUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMWmi, X86_INS_VPCOMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMWmi_alt, X86_INS_VPCOMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMWri, X86_INS_VPCOMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCOMWri_alt, X86_INS_VPCOMW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTDrm, X86_INS_VPCONFLICTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTDrmb, X86_INS_VPCONFLICTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTDrmbk, X86_INS_VPCONFLICTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTDrmbkz, X86_INS_VPCONFLICTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTDrmk, X86_INS_VPCONFLICTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTDrmkz, X86_INS_VPCONFLICTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTDrr, X86_INS_VPCONFLICTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTDrrk, X86_INS_VPCONFLICTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTDrrkz, X86_INS_VPCONFLICTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTQrm, X86_INS_VPCONFLICTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTQrmb, X86_INS_VPCONFLICTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTQrmbk, X86_INS_VPCONFLICTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTQrmbkz, X86_INS_VPCONFLICTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTQrmk, X86_INS_VPCONFLICTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTQrmkz, X86_INS_VPCONFLICTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTQrr, X86_INS_VPCONFLICTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTQrrk, X86_INS_VPCONFLICTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPCONFLICTQrrkz, X86_INS_VPCONFLICTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERM2F128rm, X86_INS_VPERM2F128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERM2F128rr, X86_INS_VPERM2F128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERM2I128rm, X86_INS_VPERM2I128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERM2I128rr, X86_INS_VPERM2I128,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMDYrm, X86_INS_VPERMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMDYrr, X86_INS_VPERMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMDZrm, X86_INS_VPERMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMDZrr, X86_INS_VPERMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Drm, X86_INS_VPERMI2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Drmk, X86_INS_VPERMI2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Drmkz, X86_INS_VPERMI2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Drr, X86_INS_VPERMI2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Drrk, X86_INS_VPERMI2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Drrkz, X86_INS_VPERMI2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PDrm, X86_INS_VPERMI2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PDrmk, X86_INS_VPERMI2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PDrmkz, X86_INS_VPERMI2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PDrr, X86_INS_VPERMI2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PDrrk, X86_INS_VPERMI2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PDrrkz, X86_INS_VPERMI2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PSrm, X86_INS_VPERMI2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PSrmk, X86_INS_VPERMI2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PSrmkz, X86_INS_VPERMI2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PSrr, X86_INS_VPERMI2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PSrrk, X86_INS_VPERMI2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2PSrrkz, X86_INS_VPERMI2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Qrm, X86_INS_VPERMI2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Qrmk, X86_INS_VPERMI2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Qrmkz, X86_INS_VPERMI2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Qrr, X86_INS_VPERMI2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Qrrk, X86_INS_VPERMI2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMI2Qrrkz, X86_INS_VPERMI2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PDmr, X86_INS_VPERMIL2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PDmrY, X86_INS_VPERMIL2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PDrm, X86_INS_VPERMIL2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PDrmY, X86_INS_VPERMIL2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PDrr, X86_INS_VPERMIL2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PDrrY, X86_INS_VPERMIL2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PSmr, X86_INS_VPERMIL2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PSmrY, X86_INS_VPERMIL2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PSrm, X86_INS_VPERMIL2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PSrmY, X86_INS_VPERMIL2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PSrr, X86_INS_VPERMIL2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMIL2PSrrY, X86_INS_VPERMIL2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDYmi, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDYri, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDYrm, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDYrr, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDZmi, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDZri, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDZrm, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDZrr, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDmi, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDri, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDrm, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPDrr, X86_INS_VPERMILPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSYmi, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSYri, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSYrm, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSYrr, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSZmi, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSZri, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSZrm, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSZrr, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSmi, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSri, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSrm, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMILPSrr, X86_INS_VPERMILPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMPDYmi, X86_INS_VPERMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMPDYri, X86_INS_VPERMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMPDZmi, X86_INS_VPERMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMPDZri, X86_INS_VPERMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMPDZrm, X86_INS_VPERMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMPDZrr, X86_INS_VPERMPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMPSYrm, X86_INS_VPERMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMPSYrr, X86_INS_VPERMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMPSZrm, X86_INS_VPERMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMPSZrr, X86_INS_VPERMPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMQYmi, X86_INS_VPERMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMQYri, X86_INS_VPERMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMQZmi, X86_INS_VPERMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMQZri, X86_INS_VPERMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMQZrm, X86_INS_VPERMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMQZrr, X86_INS_VPERMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Drm, X86_INS_VPERMT2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Drmk, X86_INS_VPERMT2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Drmkz, X86_INS_VPERMT2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Drr, X86_INS_VPERMT2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Drrk, X86_INS_VPERMT2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Drrkz, X86_INS_VPERMT2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PDrm, X86_INS_VPERMT2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PDrmk, X86_INS_VPERMT2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PDrmkz, X86_INS_VPERMT2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PDrr, X86_INS_VPERMT2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PDrrk, X86_INS_VPERMT2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PDrrkz, X86_INS_VPERMT2PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PSrm, X86_INS_VPERMT2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PSrmk, X86_INS_VPERMT2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PSrmkz, X86_INS_VPERMT2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PSrr, X86_INS_VPERMT2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PSrrk, X86_INS_VPERMT2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2PSrrkz, X86_INS_VPERMT2PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Qrm, X86_INS_VPERMT2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Qrmk, X86_INS_VPERMT2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Qrmkz, X86_INS_VPERMT2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Qrr, X86_INS_VPERMT2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Qrrk, X86_INS_VPERMT2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPERMT2Qrrkz, X86_INS_VPERMT2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZ128rmk, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZ128rmkz, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZ128rrk, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZ128rrkz, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZ256rmk, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZ256rmkz, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZ256rrk, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZ256rrkz, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZrmk, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZrmkz, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZrrk, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDDZrrkz, X86_INS_VPEXPANDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZ128rmk, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZ128rmkz, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZ128rrk, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZ128rrkz, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZ256rmk, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZ256rmkz, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZ256rrk, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZ256rrkz, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZrmk, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZrmkz, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZrrk, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXPANDQZrrkz, X86_INS_VPEXPANDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXTRBmr, X86_INS_VPEXTRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXTRBrr, X86_INS_VPEXTRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXTRDmr, X86_INS_VPEXTRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXTRDrr, X86_INS_VPEXTRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXTRQmr, X86_INS_VPEXTRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXTRQrr, X86_INS_VPEXTRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXTRWmr, X86_INS_VPEXTRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXTRWri, X86_INS_VPEXTRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPEXTRWrr_REV, X86_INS_VPEXTRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERDDYrm, X86_INS_VPGATHERDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERDDZrm, X86_INS_VPGATHERDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERDDrm, X86_INS_VPGATHERDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERDQYrm, X86_INS_VPGATHERDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERDQZrm, X86_INS_VPGATHERDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERDQrm, X86_INS_VPGATHERDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERQDYrm, X86_INS_VPGATHERQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERQDZrm, X86_INS_VPGATHERQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERQDrm, X86_INS_VPGATHERQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERQQYrm, X86_INS_VPGATHERQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERQQZrm, X86_INS_VPGATHERQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPGATHERQQrm, X86_INS_VPGATHERQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDBDrm, X86_INS_VPHADDBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDBDrr, X86_INS_VPHADDBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDBQrm, X86_INS_VPHADDBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDBQrr, X86_INS_VPHADDBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDBWrm, X86_INS_VPHADDBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDBWrr, X86_INS_VPHADDBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDDQrm, X86_INS_VPHADDDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDDQrr, X86_INS_VPHADDDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDDYrm, X86_INS_VPHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDDYrr, X86_INS_VPHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDDrm, X86_INS_VPHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDDrr, X86_INS_VPHADDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDSWrm128, X86_INS_VPHADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDSWrm256, X86_INS_VPHADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDSWrr128, X86_INS_VPHADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDSWrr256, X86_INS_VPHADDSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUBDrm, X86_INS_VPHADDUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUBDrr, X86_INS_VPHADDUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUBQrm, X86_INS_VPHADDUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUBQrr, X86_INS_VPHADDUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUBWrm, X86_INS_VPHADDUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUBWrr, X86_INS_VPHADDUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUDQrm, X86_INS_VPHADDUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUDQrr, X86_INS_VPHADDUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUWDrm, X86_INS_VPHADDUWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUWDrr, X86_INS_VPHADDUWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUWQrm, X86_INS_VPHADDUWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDUWQrr, X86_INS_VPHADDUWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDWDrm, X86_INS_VPHADDWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDWDrr, X86_INS_VPHADDWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDWQrm, X86_INS_VPHADDWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDWQrr, X86_INS_VPHADDWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDWYrm, X86_INS_VPHADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDWYrr, X86_INS_VPHADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDWrm, X86_INS_VPHADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHADDWrr, X86_INS_VPHADDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHMINPOSUWrm128, X86_INS_VPHMINPOSUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHMINPOSUWrr128, X86_INS_VPHMINPOSUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBBWrm, X86_INS_VPHSUBBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBBWrr, X86_INS_VPHSUBBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBDQrm, X86_INS_VPHSUBDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBDQrr, X86_INS_VPHSUBDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBDYrm, X86_INS_VPHSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBDYrr, X86_INS_VPHSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBDrm, X86_INS_VPHSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBDrr, X86_INS_VPHSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBSWrm128, X86_INS_VPHSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBSWrm256, X86_INS_VPHSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBSWrr128, X86_INS_VPHSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBSWrr256, X86_INS_VPHSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBWDrm, X86_INS_VPHSUBWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBWDrr, X86_INS_VPHSUBWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBWYrm, X86_INS_VPHSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBWYrr, X86_INS_VPHSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBWrm, X86_INS_VPHSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPHSUBWrr, X86_INS_VPHSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPINSRBrm, X86_INS_VPINSRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPINSRBrr, X86_INS_VPINSRB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPINSRDrm, X86_INS_VPINSRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPINSRDrr, X86_INS_VPINSRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPINSRQrm, X86_INS_VPINSRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPINSRQrr, X86_INS_VPINSRQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPINSRWrmi, X86_INS_VPINSRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPINSRWrri, X86_INS_VPINSRW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTDrm, X86_INS_VPLZCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTDrmb, X86_INS_VPLZCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTDrmbk, X86_INS_VPLZCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTDrmbkz, X86_INS_VPLZCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTDrmk, X86_INS_VPLZCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTDrmkz, X86_INS_VPLZCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTDrr, X86_INS_VPLZCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTDrrk, X86_INS_VPLZCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTDrrkz, X86_INS_VPLZCNTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTQrm, X86_INS_VPLZCNTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTQrmb, X86_INS_VPLZCNTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTQrmbk, X86_INS_VPLZCNTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTQrmbkz, X86_INS_VPLZCNTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTQrmk, X86_INS_VPLZCNTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTQrmkz, X86_INS_VPLZCNTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTQrr, X86_INS_VPLZCNTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTQrrk, X86_INS_VPLZCNTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPLZCNTQrrkz, X86_INS_VPLZCNTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSDDrm, X86_INS_VPMACSDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSDDrr, X86_INS_VPMACSDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSDQHrm, X86_INS_VPMACSDQH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSDQHrr, X86_INS_VPMACSDQH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSDQLrm, X86_INS_VPMACSDQL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSDQLrr, X86_INS_VPMACSDQL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSSDDrm, X86_INS_VPMACSSDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSSDDrr, X86_INS_VPMACSSDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSSDQHrm, X86_INS_VPMACSSDQH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSSDQHrr, X86_INS_VPMACSSDQH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSSDQLrm, X86_INS_VPMACSSDQL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSSDQLrr, X86_INS_VPMACSSDQL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSSWDrm, X86_INS_VPMACSSWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSSWDrr, X86_INS_VPMACSSWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSSWWrm, X86_INS_VPMACSSWW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSSWWrr, X86_INS_VPMACSSWW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSWDrm, X86_INS_VPMACSWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSWDrr, X86_INS_VPMACSWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSWWrm, X86_INS_VPMACSWW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMACSWWrr, X86_INS_VPMACSWW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADCSSWDrm, X86_INS_VPMADCSSWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADCSSWDrr, X86_INS_VPMADCSSWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADCSWDrm, X86_INS_VPMADCSWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADCSWDrr, X86_INS_VPMADCSWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADDUBSWrm128, X86_INS_VPMADDUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADDUBSWrm256, X86_INS_VPMADDUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADDUBSWrr128, X86_INS_VPMADDUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADDUBSWrr256, X86_INS_VPMADDUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADDWDYrm, X86_INS_VPMADDWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADDWDYrr, X86_INS_VPMADDWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADDWDrm, X86_INS_VPMADDWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMADDWDrr, X86_INS_VPMADDWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMASKMOVDYmr, X86_INS_VPMASKMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMASKMOVDYrm, X86_INS_VPMASKMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMASKMOVDmr, X86_INS_VPMASKMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMASKMOVDrm, X86_INS_VPMASKMOVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMASKMOVQYmr, X86_INS_VPMASKMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMASKMOVQYrm, X86_INS_VPMASKMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMASKMOVQmr, X86_INS_VPMASKMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMASKMOVQrm, X86_INS_VPMASKMOVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBYrm, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBYrr, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ128rm, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ128rmk, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ128rmkz, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ128rr, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ128rrk, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ128rrkz, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ256rm, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ256rmk, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ256rmkz, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ256rr, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ256rrk, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZ256rrkz, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZrm, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZrmk, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZrmkz, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZrr, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZrrk, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBZrrkz, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBrm, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSBrr, X86_INS_VPMAXSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDYrm, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDYrr, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ128rm, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ128rmb, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ128rmbk, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ128rmbkz, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ128rmk, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ128rmkz, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ128rr, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ128rrk, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ128rrkz, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ256rm, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ256rmb, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ256rmbk, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ256rmbkz, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ256rmk, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ256rmkz, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ256rr, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ256rrk, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZ256rrkz, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZrm, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZrmb, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZrmbk, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZrmbkz, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZrmk, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZrmkz, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZrr, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZrrk, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDZrrkz, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDrm, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSDrr, X86_INS_VPMAXSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ128rm, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ128rmb, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ128rmbk, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ128rmbkz, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ128rmk, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ128rmkz, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ128rr, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ128rrk, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ128rrkz, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ256rm, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ256rmb, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ256rmbk, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ256rmbkz, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ256rmk, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ256rmkz, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ256rr, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ256rrk, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZ256rrkz, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZrm, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZrmb, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZrmbk, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZrmbkz, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZrmk, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZrmkz, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZrr, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZrrk, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSQZrrkz, X86_INS_VPMAXSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWYrm, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWYrr, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ128rm, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ128rmk, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ128rmkz, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ128rr, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ128rrk, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ128rrkz, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ256rm, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ256rmk, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ256rmkz, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ256rr, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ256rrk, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZ256rrkz, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZrm, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZrmk, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZrmkz, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZrr, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZrrk, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWZrrkz, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWrm, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXSWrr, X86_INS_VPMAXSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBYrm, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBYrr, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ128rm, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ128rmk, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ128rmkz, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ128rr, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ128rrk, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ128rrkz, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ256rm, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ256rmk, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ256rmkz, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ256rr, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ256rrk, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZ256rrkz, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZrm, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZrmk, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZrmkz, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZrr, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZrrk, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBZrrkz, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBrm, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUBrr, X86_INS_VPMAXUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDYrm, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDYrr, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ128rm, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ128rmb, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ128rmbk, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ128rmbkz, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ128rmk, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ128rmkz, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ128rr, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ128rrk, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ128rrkz, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ256rm, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ256rmb, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ256rmbk, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ256rmbkz, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ256rmk, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ256rmkz, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ256rr, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ256rrk, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZ256rrkz, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZrm, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZrmb, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZrmbk, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZrmbkz, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZrmk, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZrmkz, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZrr, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZrrk, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDZrrkz, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDrm, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUDrr, X86_INS_VPMAXUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ128rm, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ128rmb, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ128rmbk, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ128rmbkz, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ128rmk, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ128rmkz, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ128rr, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ128rrk, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ128rrkz, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ256rm, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ256rmb, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ256rmbk, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ256rmbkz, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ256rmk, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ256rmkz, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ256rr, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ256rrk, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZ256rrkz, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZrm, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZrmb, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZrmbk, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZrmbkz, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZrmk, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZrmkz, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZrr, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZrrk, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUQZrrkz, X86_INS_VPMAXUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWYrm, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWYrr, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ128rm, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ128rmk, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ128rmkz, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ128rr, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ128rrk, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ128rrkz, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ256rm, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ256rmk, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ256rmkz, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ256rr, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ256rrk, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZ256rrkz, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZrm, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZrmk, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZrmkz, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZrr, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZrrk, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWZrrkz, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWrm, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMAXUWrr, X86_INS_VPMAXUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBYrm, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBYrr, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ128rm, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ128rmk, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ128rmkz, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ128rr, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ128rrk, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ128rrkz, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ256rm, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ256rmk, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ256rmkz, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ256rr, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ256rrk, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZ256rrkz, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZrm, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZrmk, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZrmkz, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZrr, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZrrk, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBZrrkz, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBrm, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSBrr, X86_INS_VPMINSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDYrm, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDYrr, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ128rm, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ128rmb, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ128rmbk, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ128rmbkz, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ128rmk, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ128rmkz, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ128rr, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ128rrk, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ128rrkz, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ256rm, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ256rmb, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ256rmbk, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ256rmbkz, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ256rmk, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ256rmkz, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ256rr, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ256rrk, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZ256rrkz, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZrm, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZrmb, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZrmbk, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZrmbkz, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZrmk, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZrmkz, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZrr, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZrrk, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDZrrkz, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDrm, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSDrr, X86_INS_VPMINSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ128rm, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ128rmb, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ128rmbk, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ128rmbkz, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ128rmk, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ128rmkz, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ128rr, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ128rrk, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ128rrkz, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ256rm, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ256rmb, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ256rmbk, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ256rmbkz, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ256rmk, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ256rmkz, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ256rr, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ256rrk, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZ256rrkz, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZrm, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZrmb, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZrmbk, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZrmbkz, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZrmk, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZrmkz, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZrr, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZrrk, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSQZrrkz, X86_INS_VPMINSQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWYrm, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWYrr, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ128rm, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ128rmk, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ128rmkz, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ128rr, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ128rrk, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ128rrkz, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ256rm, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ256rmk, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ256rmkz, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ256rr, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ256rrk, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZ256rrkz, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZrm, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZrmk, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZrmkz, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZrr, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZrrk, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWZrrkz, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWrm, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINSWrr, X86_INS_VPMINSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBYrm, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBYrr, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ128rm, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ128rmk, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ128rmkz, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ128rr, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ128rrk, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ128rrkz, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ256rm, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ256rmk, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ256rmkz, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ256rr, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ256rrk, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZ256rrkz, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZrm, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZrmk, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZrmkz, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZrr, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZrrk, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBZrrkz, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBrm, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUBrr, X86_INS_VPMINUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDYrm, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDYrr, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ128rm, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ128rmb, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ128rmbk, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ128rmbkz, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ128rmk, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ128rmkz, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ128rr, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ128rrk, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ128rrkz, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ256rm, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ256rmb, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ256rmbk, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ256rmbkz, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ256rmk, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ256rmkz, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ256rr, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ256rrk, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZ256rrkz, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZrm, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZrmb, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZrmbk, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZrmbkz, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZrmk, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZrmkz, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZrr, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZrrk, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDZrrkz, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDrm, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUDrr, X86_INS_VPMINUD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ128rm, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ128rmb, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ128rmbk, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ128rmbkz, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ128rmk, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ128rmkz, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ128rr, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ128rrk, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ128rrkz, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ256rm, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ256rmb, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ256rmbk, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ256rmbkz, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ256rmk, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ256rmkz, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ256rr, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ256rrk, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZ256rrkz, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZrm, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZrmb, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZrmbk, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZrmbkz, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZrmk, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZrmkz, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZrr, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZrrk, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUQZrrkz, X86_INS_VPMINUQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWYrm, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWYrr, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ128rm, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ128rmk, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ128rmkz, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ128rr, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ128rrk, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ128rrkz, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ256rm, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ256rmk, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ256rmkz, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ256rr, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ256rrk, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZ256rrkz, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZrm, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZrmk, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZrmkz, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZrr, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZrrk, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWZrrkz, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWrm, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMINUWrr, X86_INS_VPMINUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVDBmr, X86_INS_VPMOVDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVDBmrk, X86_INS_VPMOVDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVDBrr, X86_INS_VPMOVDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVDBrrk, X86_INS_VPMOVDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVDBrrkz, X86_INS_VPMOVDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVDWmr, X86_INS_VPMOVDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVDWmrk, X86_INS_VPMOVDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVDWrr, X86_INS_VPMOVDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVDWrrk, X86_INS_VPMOVDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVDWrrkz, X86_INS_VPMOVDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2BZ128rr, X86_INS_VPMOVM2B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2BZ256rr, X86_INS_VPMOVM2B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2BZrr, X86_INS_VPMOVM2B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2DZ128rr, X86_INS_VPMOVM2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2DZ256rr, X86_INS_VPMOVM2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2DZrr, X86_INS_VPMOVM2D,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2QZ128rr, X86_INS_VPMOVM2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2QZ256rr, X86_INS_VPMOVM2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2QZrr, X86_INS_VPMOVM2Q,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2WZ128rr, X86_INS_VPMOVM2W,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2WZ256rr, X86_INS_VPMOVM2W,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVM2WZrr, X86_INS_VPMOVM2W,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVMSKBYrr, X86_INS_VPMOVMSKB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVMSKBrr, X86_INS_VPMOVMSKB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQBmr, X86_INS_VPMOVQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQBmrk, X86_INS_VPMOVQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQBrr, X86_INS_VPMOVQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQBrrk, X86_INS_VPMOVQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQBrrkz, X86_INS_VPMOVQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQDmr, X86_INS_VPMOVQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQDmrk, X86_INS_VPMOVQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQDrr, X86_INS_VPMOVQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQDrrk, X86_INS_VPMOVQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQDrrkz, X86_INS_VPMOVQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQWmr, X86_INS_VPMOVQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQWmrk, X86_INS_VPMOVQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQWrr, X86_INS_VPMOVQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQWrrk, X86_INS_VPMOVQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVQWrrkz, X86_INS_VPMOVQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSDBmr, X86_INS_VPMOVSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSDBmrk, X86_INS_VPMOVSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSDBrr, X86_INS_VPMOVSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSDBrrk, X86_INS_VPMOVSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSDBrrkz, X86_INS_VPMOVSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSDWmr, X86_INS_VPMOVSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSDWmrk, X86_INS_VPMOVSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSDWrr, X86_INS_VPMOVSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSDWrrk, X86_INS_VPMOVSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSDWrrkz, X86_INS_VPMOVSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQBmr, X86_INS_VPMOVSQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQBmrk, X86_INS_VPMOVSQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQBrr, X86_INS_VPMOVSQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQBrrk, X86_INS_VPMOVSQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQBrrkz, X86_INS_VPMOVSQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQDmr, X86_INS_VPMOVSQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQDmrk, X86_INS_VPMOVSQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQDrr, X86_INS_VPMOVSQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQDrrk, X86_INS_VPMOVSQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQDrrkz, X86_INS_VPMOVSQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQWmr, X86_INS_VPMOVSQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQWmrk, X86_INS_VPMOVSQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQWrr, X86_INS_VPMOVSQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQWrrk, X86_INS_VPMOVSQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSQWrrkz, X86_INS_VPMOVSQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBDYrm, X86_INS_VPMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBDYrr, X86_INS_VPMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBDZrm, X86_INS_VPMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBDZrmk, X86_INS_VPMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBDZrmkz, X86_INS_VPMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBDZrr, X86_INS_VPMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBDZrrk, X86_INS_VPMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBDZrrkz, X86_INS_VPMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBDrm, X86_INS_VPMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBDrr, X86_INS_VPMOVSXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBQYrm, X86_INS_VPMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBQYrr, X86_INS_VPMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBQZrm, X86_INS_VPMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBQZrmk, X86_INS_VPMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBQZrmkz, X86_INS_VPMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBQZrr, X86_INS_VPMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBQZrrk, X86_INS_VPMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBQZrrkz, X86_INS_VPMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBQrm, X86_INS_VPMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBQrr, X86_INS_VPMOVSXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBWYrm, X86_INS_VPMOVSXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBWYrr, X86_INS_VPMOVSXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBWrm, X86_INS_VPMOVSXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXBWrr, X86_INS_VPMOVSXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXDQYrm, X86_INS_VPMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXDQYrr, X86_INS_VPMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXDQZrm, X86_INS_VPMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXDQZrmk, X86_INS_VPMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXDQZrmkz, X86_INS_VPMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXDQZrr, X86_INS_VPMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXDQZrrk, X86_INS_VPMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXDQZrrkz, X86_INS_VPMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXDQrm, X86_INS_VPMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXDQrr, X86_INS_VPMOVSXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWDYrm, X86_INS_VPMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWDYrr, X86_INS_VPMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWDZrm, X86_INS_VPMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWDZrmk, X86_INS_VPMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWDZrmkz, X86_INS_VPMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWDZrr, X86_INS_VPMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWDZrrk, X86_INS_VPMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWDZrrkz, X86_INS_VPMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWDrm, X86_INS_VPMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWDrr, X86_INS_VPMOVSXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWQYrm, X86_INS_VPMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWQYrr, X86_INS_VPMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWQZrm, X86_INS_VPMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWQZrmk, X86_INS_VPMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWQZrmkz, X86_INS_VPMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWQZrr, X86_INS_VPMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWQZrrk, X86_INS_VPMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWQZrrkz, X86_INS_VPMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWQrm, X86_INS_VPMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVSXWQrr, X86_INS_VPMOVSXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSDBmr, X86_INS_VPMOVUSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSDBmrk, X86_INS_VPMOVUSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSDBrr, X86_INS_VPMOVUSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSDBrrk, X86_INS_VPMOVUSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSDBrrkz, X86_INS_VPMOVUSDB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSDWmr, X86_INS_VPMOVUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSDWmrk, X86_INS_VPMOVUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSDWrr, X86_INS_VPMOVUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSDWrrk, X86_INS_VPMOVUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSDWrrkz, X86_INS_VPMOVUSDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQBmr, X86_INS_VPMOVUSQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQBmrk, X86_INS_VPMOVUSQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQBrr, X86_INS_VPMOVUSQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQBrrk, X86_INS_VPMOVUSQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQBrrkz, X86_INS_VPMOVUSQB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQDmr, X86_INS_VPMOVUSQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQDmrk, X86_INS_VPMOVUSQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQDrr, X86_INS_VPMOVUSQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQDrrk, X86_INS_VPMOVUSQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQDrrkz, X86_INS_VPMOVUSQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQWmr, X86_INS_VPMOVUSQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQWmrk, X86_INS_VPMOVUSQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQWrr, X86_INS_VPMOVUSQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQWrrk, X86_INS_VPMOVUSQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVUSQWrrkz, X86_INS_VPMOVUSQW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBDYrm, X86_INS_VPMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBDYrr, X86_INS_VPMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBDZrm, X86_INS_VPMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBDZrmk, X86_INS_VPMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBDZrmkz, X86_INS_VPMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBDZrr, X86_INS_VPMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBDZrrk, X86_INS_VPMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBDZrrkz, X86_INS_VPMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBDrm, X86_INS_VPMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBDrr, X86_INS_VPMOVZXBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBQYrm, X86_INS_VPMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBQYrr, X86_INS_VPMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBQZrm, X86_INS_VPMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBQZrmk, X86_INS_VPMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBQZrmkz, X86_INS_VPMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBQZrr, X86_INS_VPMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBQZrrk, X86_INS_VPMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBQZrrkz, X86_INS_VPMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBQrm, X86_INS_VPMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBQrr, X86_INS_VPMOVZXBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBWYrm, X86_INS_VPMOVZXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBWYrr, X86_INS_VPMOVZXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBWrm, X86_INS_VPMOVZXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXBWrr, X86_INS_VPMOVZXBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXDQYrm, X86_INS_VPMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXDQYrr, X86_INS_VPMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXDQZrm, X86_INS_VPMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXDQZrmk, X86_INS_VPMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXDQZrmkz, X86_INS_VPMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXDQZrr, X86_INS_VPMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXDQZrrk, X86_INS_VPMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXDQZrrkz, X86_INS_VPMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXDQrm, X86_INS_VPMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXDQrr, X86_INS_VPMOVZXDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWDYrm, X86_INS_VPMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWDYrr, X86_INS_VPMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWDZrm, X86_INS_VPMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWDZrmk, X86_INS_VPMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWDZrmkz, X86_INS_VPMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWDZrr, X86_INS_VPMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWDZrrk, X86_INS_VPMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWDZrrkz, X86_INS_VPMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWDrm, X86_INS_VPMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWDrr, X86_INS_VPMOVZXWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWQYrm, X86_INS_VPMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWQYrr, X86_INS_VPMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWQZrm, X86_INS_VPMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWQZrmk, X86_INS_VPMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWQZrmkz, X86_INS_VPMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWQZrr, X86_INS_VPMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWQZrrk, X86_INS_VPMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWQZrrkz, X86_INS_VPMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWQrm, X86_INS_VPMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMOVZXWQrr, X86_INS_VPMOVZXWQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQYrm, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQYrr, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQZrm, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQZrmb, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQZrmbk, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQZrmbkz, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQZrmk, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQZrmkz, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQZrr, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQZrrk, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQZrrkz, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQrm, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULDQrr, X86_INS_VPMULDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHRSWrm128, X86_INS_VPMULHRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHRSWrm256, X86_INS_VPMULHRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHRSWrr128, X86_INS_VPMULHRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHRSWrr256, X86_INS_VPMULHRSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHUWYrm, X86_INS_VPMULHUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHUWYrr, X86_INS_VPMULHUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHUWrm, X86_INS_VPMULHUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHUWrr, X86_INS_VPMULHUW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHWYrm, X86_INS_VPMULHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHWYrr, X86_INS_VPMULHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHWrm, X86_INS_VPMULHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULHWrr, X86_INS_VPMULHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDYrm, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDYrr, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ128rm, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ128rmb, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ128rmbk, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ128rmbkz, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ128rmk, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ128rmkz, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ128rr, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ128rrk, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ128rrkz, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ256rm, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ256rmb, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ256rmbk, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ256rmbkz, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ256rmk, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ256rmkz, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ256rr, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ256rrk, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZ256rrkz, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZrm, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZrmb, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZrmbk, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZrmbkz, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZrmk, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZrmkz, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZrr, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZrrk, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDZrrkz, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDrm, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLDrr, X86_INS_VPMULLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ128rm, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ128rmb, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ128rmbk, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ128rmbkz, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ128rmk, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ128rmkz, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ128rr, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ128rrk, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ128rrkz, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ256rm, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ256rmb, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ256rmbk, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ256rmbkz, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ256rmk, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ256rmkz, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ256rr, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ256rrk, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZ256rrkz, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZrm, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZrmb, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZrmbk, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZrmbkz, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZrmk, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZrmkz, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZrr, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZrrk, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLQZrrkz, X86_INS_VPMULLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_DQI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWYrm, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWYrr, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ128rm, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ128rmk, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ128rmkz, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ128rr, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ128rrk, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ128rrkz, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ256rm, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ256rmk, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ256rmkz, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ256rr, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ256rrk, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZ256rrkz, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZrm, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZrmk, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZrmkz, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZrr, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZrrk, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWZrrkz, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWrm, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULLWrr, X86_INS_VPMULLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQYrm, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQYrr, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQZrm, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQZrmb, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQZrmbk, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQZrmbkz, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQZrmk, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQZrmkz, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQZrr, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQZrrk, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQZrrkz, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQrm, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPMULUDQrr, X86_INS_VPMULUDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ128rm, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ128rmb, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ128rmbk, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ128rmbkz, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ128rmk, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ128rmkz, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ128rr, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ128rrk, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ128rrkz, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ256rm, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ256rmb, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ256rmbk, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ256rmbkz, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ256rmk, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ256rmkz, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ256rr, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ256rrk, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZ256rrkz, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZrm, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZrmb, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZrmbk, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZrmbkz, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZrmk, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZrmkz, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZrr, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZrrk, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORDZrrkz, X86_INS_VPORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ128rm, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ128rmb, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ128rmbk, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ128rmbkz, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ128rmk, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ128rmkz, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ128rr, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ128rrk, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ128rrkz, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ256rm, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ256rmb, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ256rmbk, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ256rmbkz, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ256rmk, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ256rmkz, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ256rr, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ256rrk, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZ256rrkz, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZrm, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZrmb, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZrmbk, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZrmbkz, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZrmk, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZrmkz, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZrr, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZrrk, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORQZrrkz, X86_INS_VPORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORYrm, X86_INS_VPOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORYrr, X86_INS_VPOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORrm, X86_INS_VPOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPORrr, X86_INS_VPOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPPERMmr, X86_INS_VPPERM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPPERMrm, X86_INS_VPPERM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPPERMrr, X86_INS_VPPERM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTBmi, X86_INS_VPROTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTBmr, X86_INS_VPROTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTBri, X86_INS_VPROTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTBrm, X86_INS_VPROTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTBrr, X86_INS_VPROTB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTDmi, X86_INS_VPROTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTDmr, X86_INS_VPROTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTDri, X86_INS_VPROTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTDrm, X86_INS_VPROTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTDrr, X86_INS_VPROTD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTQmi, X86_INS_VPROTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTQmr, X86_INS_VPROTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTQri, X86_INS_VPROTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTQrm, X86_INS_VPROTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTQrr, X86_INS_VPROTQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTWmi, X86_INS_VPROTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTWmr, X86_INS_VPROTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTWri, X86_INS_VPROTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTWrm, X86_INS_VPROTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPROTWrr, X86_INS_VPROTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSADBWYrm, X86_INS_VPSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSADBWYrr, X86_INS_VPSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSADBWrm, X86_INS_VPSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSADBWrr, X86_INS_VPSADBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSCATTERDDZmr, X86_INS_VPSCATTERDD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSCATTERDQZmr, X86_INS_VPSCATTERDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSCATTERQDZmr, X86_INS_VPSCATTERQD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSCATTERQQZmr, X86_INS_VPSCATTERQQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHABmr, X86_INS_VPSHAB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHABrm, X86_INS_VPSHAB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHABrr, X86_INS_VPSHAB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHADmr, X86_INS_VPSHAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHADrm, X86_INS_VPSHAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHADrr, X86_INS_VPSHAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHAQmr, X86_INS_VPSHAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHAQrm, X86_INS_VPSHAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHAQrr, X86_INS_VPSHAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHAWmr, X86_INS_VPSHAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHAWrm, X86_INS_VPSHAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHAWrr, X86_INS_VPSHAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLBmr, X86_INS_VPSHLB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLBrm, X86_INS_VPSHLB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLBrr, X86_INS_VPSHLB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLDmr, X86_INS_VPSHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLDrm, X86_INS_VPSHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLDrr, X86_INS_VPSHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLQmr, X86_INS_VPSHLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLQrm, X86_INS_VPSHLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLQrr, X86_INS_VPSHLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLWmr, X86_INS_VPSHLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLWrm, X86_INS_VPSHLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHLWrr, X86_INS_VPSHLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_XOP, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFBYrm, X86_INS_VPSHUFB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFBYrr, X86_INS_VPSHUFB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFBrm, X86_INS_VPSHUFB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFBrr, X86_INS_VPSHUFB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFDYmi, X86_INS_VPSHUFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFDYri, X86_INS_VPSHUFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFDZmi, X86_INS_VPSHUFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFDZri, X86_INS_VPSHUFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFDmi, X86_INS_VPSHUFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFDri, X86_INS_VPSHUFD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFHWYmi, X86_INS_VPSHUFHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFHWYri, X86_INS_VPSHUFHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFHWmi, X86_INS_VPSHUFHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFHWri, X86_INS_VPSHUFHW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFLWYmi, X86_INS_VPSHUFLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFLWYri, X86_INS_VPSHUFLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFLWmi, X86_INS_VPSHUFLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSHUFLWri, X86_INS_VPSHUFLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNBYrm, X86_INS_VPSIGNB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNBYrr, X86_INS_VPSIGNB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNBrm, X86_INS_VPSIGNB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNBrr, X86_INS_VPSIGNB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNDYrm, X86_INS_VPSIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNDYrr, X86_INS_VPSIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNDrm, X86_INS_VPSIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNDrr, X86_INS_VPSIGND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNWYrm, X86_INS_VPSIGNW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNWYrr, X86_INS_VPSIGNW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNWrm, X86_INS_VPSIGNW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSIGNWrr, X86_INS_VPSIGNW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDQYri, X86_INS_VPSLLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDQri, X86_INS_VPSLLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDYri, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDYrm, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDYrr, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZmi, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZmik, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZmikz, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZri, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZrik, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZrikz, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZrm, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZrmk, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZrmkz, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZrr, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZrrk, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDZrrkz, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDri, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDrm, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLDrr, X86_INS_VPSLLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQYri, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQYrm, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQYrr, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZmi, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZmik, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZmikz, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZri, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZrik, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZrikz, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZrm, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZrmk, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZrmkz, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZrr, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZrrk, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQZrrkz, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQri, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQrm, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLQrr, X86_INS_VPSLLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVDYrm, X86_INS_VPSLLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVDYrr, X86_INS_VPSLLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVDZrm, X86_INS_VPSLLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVDZrmk, X86_INS_VPSLLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVDZrmkz, X86_INS_VPSLLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVDZrr, X86_INS_VPSLLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVDZrrk, X86_INS_VPSLLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVDZrrkz, X86_INS_VPSLLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVDrm, X86_INS_VPSLLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVDrr, X86_INS_VPSLLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVQYrm, X86_INS_VPSLLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVQYrr, X86_INS_VPSLLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVQZrm, X86_INS_VPSLLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVQZrmk, X86_INS_VPSLLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVQZrmkz, X86_INS_VPSLLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVQZrr, X86_INS_VPSLLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVQZrrk, X86_INS_VPSLLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVQZrrkz, X86_INS_VPSLLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVQrm, X86_INS_VPSLLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLVQrr, X86_INS_VPSLLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLWYri, X86_INS_VPSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLWYrm, X86_INS_VPSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLWYrr, X86_INS_VPSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLWri, X86_INS_VPSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLWrm, X86_INS_VPSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSLLWrr, X86_INS_VPSLLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADYri, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADYrm, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADYrr, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZmi, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZmik, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZmikz, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZri, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZrik, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZrikz, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZrm, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZrmk, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZrmkz, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZrr, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZrrk, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADZrrkz, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADri, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADrm, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRADrr, X86_INS_VPSRAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZmi, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZmik, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZmikz, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZri, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZrik, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZrikz, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZrm, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZrmk, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZrmkz, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZrr, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZrrk, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAQZrrkz, X86_INS_VPSRAQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVDYrm, X86_INS_VPSRAVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVDYrr, X86_INS_VPSRAVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVDZrm, X86_INS_VPSRAVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVDZrmk, X86_INS_VPSRAVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVDZrmkz, X86_INS_VPSRAVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVDZrr, X86_INS_VPSRAVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVDZrrk, X86_INS_VPSRAVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVDZrrkz, X86_INS_VPSRAVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVDrm, X86_INS_VPSRAVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVDrr, X86_INS_VPSRAVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVQZrm, X86_INS_VPSRAVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVQZrmk, X86_INS_VPSRAVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVQZrmkz, X86_INS_VPSRAVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVQZrr, X86_INS_VPSRAVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVQZrrk, X86_INS_VPSRAVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAVQZrrkz, X86_INS_VPSRAVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAWYri, X86_INS_VPSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAWYrm, X86_INS_VPSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAWYrr, X86_INS_VPSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAWri, X86_INS_VPSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAWrm, X86_INS_VPSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRAWrr, X86_INS_VPSRAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDQYri, X86_INS_VPSRLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDQri, X86_INS_VPSRLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDYri, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDYrm, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDYrr, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZmi, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZmik, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZmikz, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZri, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZrik, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZrikz, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZrm, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZrmk, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZrmkz, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZrr, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZrrk, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDZrrkz, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDri, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDrm, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLDrr, X86_INS_VPSRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQYri, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQYrm, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQYrr, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZmi, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZmik, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZmikz, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZri, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZrik, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZrikz, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZrm, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZrmk, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZrmkz, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZrr, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZrrk, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQZrrkz, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQri, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQrm, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLQrr, X86_INS_VPSRLQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVDYrm, X86_INS_VPSRLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVDYrr, X86_INS_VPSRLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVDZrm, X86_INS_VPSRLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVDZrmk, X86_INS_VPSRLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVDZrmkz, X86_INS_VPSRLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVDZrr, X86_INS_VPSRLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVDZrrk, X86_INS_VPSRLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVDZrrkz, X86_INS_VPSRLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVDrm, X86_INS_VPSRLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVDrr, X86_INS_VPSRLVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVQYrm, X86_INS_VPSRLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVQYrr, X86_INS_VPSRLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVQZrm, X86_INS_VPSRLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVQZrmk, X86_INS_VPSRLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVQZrmkz, X86_INS_VPSRLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVQZrr, X86_INS_VPSRLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVQZrrk, X86_INS_VPSRLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVQZrrkz, X86_INS_VPSRLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVQrm, X86_INS_VPSRLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLVQrr, X86_INS_VPSRLVQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLWYri, X86_INS_VPSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLWYrm, X86_INS_VPSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLWYrr, X86_INS_VPSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLWri, X86_INS_VPSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLWrm, X86_INS_VPSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSRLWrr, X86_INS_VPSRLW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBYrm, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBYrr, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ128rm, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ128rmk, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ128rmkz, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ128rr, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ128rrk, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ128rrkz, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ256rm, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ256rmk, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ256rmkz, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ256rr, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ256rrk, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZ256rrkz, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZrm, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZrmk, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZrmkz, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZrr, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZrrk, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBZrrkz, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBrm, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBBrr, X86_INS_VPSUBB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDYrm, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDYrr, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ128rm, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ128rmb, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ128rmbk, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ128rmbkz, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ128rmk, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ128rmkz, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ128rr, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ128rrk, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ128rrkz, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ256rm, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ256rmb, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ256rmbk, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ256rmbkz, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ256rmk, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ256rmkz, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ256rr, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ256rrk, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZ256rrkz, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZrm, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZrmb, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZrmbk, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZrmbkz, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZrmk, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZrmkz, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZrr, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZrrk, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDZrrkz, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDrm, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBDrr, X86_INS_VPSUBD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQYrm, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQYrr, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ128rm, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ128rmb, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ128rmbk, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ128rmbkz, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ128rmk, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ128rmkz, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ128rr, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ128rrk, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ128rrkz, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ256rm, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ256rmb, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ256rmbk, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ256rmbkz, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ256rmk, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ256rmkz, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ256rr, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ256rrk, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZ256rrkz, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZrm, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZrmb, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZrmbk, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZrmbkz, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZrmk, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZrmkz, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZrr, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZrrk, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQZrrkz, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQrm, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBQrr, X86_INS_VPSUBQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBSBYrm, X86_INS_VPSUBSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBSBYrr, X86_INS_VPSUBSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBSBrm, X86_INS_VPSUBSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBSBrr, X86_INS_VPSUBSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBSWYrm, X86_INS_VPSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBSWYrr, X86_INS_VPSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBSWrm, X86_INS_VPSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBSWrr, X86_INS_VPSUBSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBUSBYrm, X86_INS_VPSUBUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBUSBYrr, X86_INS_VPSUBUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBUSBrm, X86_INS_VPSUBUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBUSBrr, X86_INS_VPSUBUSB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBUSWYrm, X86_INS_VPSUBUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBUSWYrr, X86_INS_VPSUBUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBUSWrm, X86_INS_VPSUBUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBUSWrr, X86_INS_VPSUBUSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWYrm, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWYrr, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ128rm, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ128rmk, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ128rmkz, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ128rr, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ128rrk, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ128rrkz, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ256rm, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ256rmk, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ256rmkz, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ256rr, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ256rrk, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZ256rrkz, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZrm, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZrmk, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZrmkz, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZrr, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZrrk, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWZrrkz, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BWI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWrm, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPSUBWrr, X86_INS_VPSUBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTMDZrm, X86_INS_VPTESTMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTMDZrr, X86_INS_VPTESTMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTMQZrm, X86_INS_VPTESTMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTMQZrr, X86_INS_VPTESTMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTNMDZrm, X86_INS_VPTESTNMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTNMDZrr, X86_INS_VPTESTNMD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTNMQZrm, X86_INS_VPTESTNMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTNMQZrr, X86_INS_VPTESTNMQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_CDI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTYrm, X86_INS_VPTEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTYrr, X86_INS_VPTEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTrm, X86_INS_VPTEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPTESTrr, X86_INS_VPTEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHBWYrm, X86_INS_VPUNPCKHBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHBWYrr, X86_INS_VPUNPCKHBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHBWrm, X86_INS_VPUNPCKHBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHBWrr, X86_INS_VPUNPCKHBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHDQYrm, X86_INS_VPUNPCKHDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHDQYrr, X86_INS_VPUNPCKHDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHDQZrm, X86_INS_VPUNPCKHDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHDQZrr, X86_INS_VPUNPCKHDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHDQrm, X86_INS_VPUNPCKHDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHDQrr, X86_INS_VPUNPCKHDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHQDQYrm, X86_INS_VPUNPCKHQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHQDQYrr, X86_INS_VPUNPCKHQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHQDQZrm, X86_INS_VPUNPCKHQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHQDQZrr, X86_INS_VPUNPCKHQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHQDQrm, X86_INS_VPUNPCKHQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHQDQrr, X86_INS_VPUNPCKHQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHWDYrm, X86_INS_VPUNPCKHWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHWDYrr, X86_INS_VPUNPCKHWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHWDrm, X86_INS_VPUNPCKHWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKHWDrr, X86_INS_VPUNPCKHWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLBWYrm, X86_INS_VPUNPCKLBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLBWYrr, X86_INS_VPUNPCKLBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLBWrm, X86_INS_VPUNPCKLBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLBWrr, X86_INS_VPUNPCKLBW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLDQYrm, X86_INS_VPUNPCKLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLDQYrr, X86_INS_VPUNPCKLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLDQZrm, X86_INS_VPUNPCKLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLDQZrr, X86_INS_VPUNPCKLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLDQrm, X86_INS_VPUNPCKLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLDQrr, X86_INS_VPUNPCKLDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLQDQYrm, X86_INS_VPUNPCKLQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLQDQYrr, X86_INS_VPUNPCKLQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLQDQZrm, X86_INS_VPUNPCKLQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLQDQZrr, X86_INS_VPUNPCKLQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLQDQrm, X86_INS_VPUNPCKLQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLQDQrr, X86_INS_VPUNPCKLQDQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLWDYrm, X86_INS_VPUNPCKLWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLWDYrr, X86_INS_VPUNPCKLWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLWDrm, X86_INS_VPUNPCKLWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPUNPCKLWDrr, X86_INS_VPUNPCKLWD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ128rm, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ128rmb, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ128rmbk, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ128rmbkz, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ128rmk, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ128rmkz, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ128rr, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ128rrk, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ128rrkz, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ256rm, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ256rmb, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ256rmbk, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ256rmbkz, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ256rmk, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ256rmkz, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ256rr, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ256rrk, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZ256rrkz, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZrm, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZrmb, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZrmbk, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZrmbkz, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZrmk, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZrmkz, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZrr, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZrrk, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORDZrrkz, X86_INS_VPXORD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ128rm, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ128rmb, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ128rmbk, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ128rmbkz, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ128rmk, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ128rmkz, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ128rr, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ128rrk, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ128rrkz, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ256rm, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ256rmb, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ256rmbk, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ256rmbkz, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ256rmk, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ256rmkz, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ256rr, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ256rrk, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZ256rrkz, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZrm, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZrmb, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZrmbk, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZrmbkz, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZrmk, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZrmkz, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZrr, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZrrk, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORQZrrkz, X86_INS_VPXORQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORYrm, X86_INS_VPXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORYrr, X86_INS_VPXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX2, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORrm, X86_INS_VPXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VPXORrr, X86_INS_VPXOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ128m, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ128mb, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ128mbk, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ128mbkz, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ128mk, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ128mkz, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ128r, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ128rk, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ128rkz, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ256m, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ256mb, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ256mbk, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ256mbkz, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ256mk, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ256mkz, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ256r, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ256rk, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZ256rkz, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZm, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZmb, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZmbk, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZmbkz, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZmk, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZmkz, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZr, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZrk, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PDZrkz, X86_INS_VRCP14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ128m, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ128mb, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ128mbk, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ128mbkz, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ128mk, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ128mkz, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ128r, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ128rk, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ128rkz, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ256m, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ256mb, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ256mbk, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ256mbkz, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ256mk, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ256mkz, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ256r, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ256rk, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZ256rkz, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZm, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZmb, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZmbk, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZmbkz, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZmk, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZmkz, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZr, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZrk, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14PSZrkz, X86_INS_VRCP14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14SDrm, X86_INS_VRCP14SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14SDrr, X86_INS_VRCP14SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14SSrm, X86_INS_VRCP14SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP14SSrr, X86_INS_VRCP14SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDm, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDmb, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDmbk, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDmbkz, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDmk, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDmkz, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDr, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDrb, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDrbk, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDrbkz, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDrk, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PDrkz, X86_INS_VRCP28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSm, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSmb, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSmbk, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSmbkz, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSmk, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSmkz, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSr, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSrb, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSrbk, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSrbkz, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSrk, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28PSrkz, X86_INS_VRCP28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SDm, X86_INS_VRCP28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SDmk, X86_INS_VRCP28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SDmkz, X86_INS_VRCP28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SDr, X86_INS_VRCP28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SDrb, X86_INS_VRCP28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SDrbk, X86_INS_VRCP28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SDrbkz, X86_INS_VRCP28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SDrk, X86_INS_VRCP28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SDrkz, X86_INS_VRCP28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SSm, X86_INS_VRCP28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SSmk, X86_INS_VRCP28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SSmkz, X86_INS_VRCP28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SSr, X86_INS_VRCP28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SSrb, X86_INS_VRCP28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SSrbk, X86_INS_VRCP28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SSrbkz, X86_INS_VRCP28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SSrk, X86_INS_VRCP28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCP28SSrkz, X86_INS_VRCP28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPPSYm, X86_INS_VRCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPPSYm_Int, X86_INS_VRCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPPSYr, X86_INS_VRCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPPSYr_Int, X86_INS_VRCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPPSm, X86_INS_VRCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPPSm_Int, X86_INS_VRCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPPSr, X86_INS_VRCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPPSr_Int, X86_INS_VRCPPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPSSm, X86_INS_VRCPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPSSm_Int, X86_INS_VRCPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VRCPSSr, X86_INS_VRCPSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALEPDZm, X86_INS_VRNDSCALEPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALEPDZr, X86_INS_VRNDSCALEPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALEPSZm, X86_INS_VRNDSCALEPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALEPSZr, X86_INS_VRNDSCALEPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESDm, X86_INS_VRNDSCALESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESDmk, X86_INS_VRNDSCALESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESDmkz, X86_INS_VRNDSCALESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESDr, X86_INS_VRNDSCALESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESDrb, X86_INS_VRNDSCALESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESDrbk, X86_INS_VRNDSCALESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESDrbkz, X86_INS_VRNDSCALESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESDrk, X86_INS_VRNDSCALESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESDrkz, X86_INS_VRNDSCALESD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESSm, X86_INS_VRNDSCALESS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESSmk, X86_INS_VRNDSCALESS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESSmkz, X86_INS_VRNDSCALESS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESSr, X86_INS_VRNDSCALESS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESSrb, X86_INS_VRNDSCALESS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESSrbk, X86_INS_VRNDSCALESS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESSrbkz, X86_INS_VRNDSCALESS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESSrk, X86_INS_VRNDSCALESS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRNDSCALESSrkz, X86_INS_VRNDSCALESS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDPDm, X86_INS_VROUNDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDPDr, X86_INS_VROUNDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDPSm, X86_INS_VROUNDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDPSr, X86_INS_VROUNDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDSDm, X86_INS_VROUNDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDSDr, X86_INS_VROUNDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDSDr_Int, X86_INS_VROUNDSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDSSm, X86_INS_VROUNDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDSSr, X86_INS_VROUNDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDSSr_Int, X86_INS_VROUNDSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDYPDm, X86_INS_VROUNDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDYPDr, X86_INS_VROUNDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDYPSm, X86_INS_VROUNDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VROUNDYPSr, X86_INS_VROUNDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ128m, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ128mb, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ128mbk, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ128mbkz, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ128mk, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ128mkz, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ128r, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ128rk, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ128rkz, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ256m, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ256mb, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ256mbk, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ256mbkz, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ256mk, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ256mkz, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ256r, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ256rk, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZ256rkz, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZm, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZmb, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZmbk, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZmbkz, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZmk, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZmkz, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZr, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZrk, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PDZrkz, X86_INS_VRSQRT14PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ128m, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ128mb, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ128mbk, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ128mbkz, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ128mk, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ128mkz, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ128r, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ128rk, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ128rkz, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ256m, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ256mb, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ256mbk, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ256mbkz, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ256mk, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ256mkz, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ256r, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ256rk, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZ256rkz, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZm, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZmb, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZmbk, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZmbkz, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZmk, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZmkz, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZr, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZrk, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14PSZrkz, X86_INS_VRSQRT14PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14SDrm, X86_INS_VRSQRT14SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14SDrr, X86_INS_VRSQRT14SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14SSrm, X86_INS_VRSQRT14SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT14SSrr, X86_INS_VRSQRT14SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDm, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDmb, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDmbk, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDmbkz, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDmk, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDmkz, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDr, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDrb, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDrbk, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDrbkz, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDrk, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PDrkz, X86_INS_VRSQRT28PD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSm, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSmb, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSmbk, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSmbkz, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSmk, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSmkz, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSr, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSrb, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSrbk, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSrbkz, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSrk, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28PSrkz, X86_INS_VRSQRT28PS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SDm, X86_INS_VRSQRT28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SDmk, X86_INS_VRSQRT28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SDmkz, X86_INS_VRSQRT28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SDr, X86_INS_VRSQRT28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SDrb, X86_INS_VRSQRT28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SDrbk, X86_INS_VRSQRT28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SDrbkz, X86_INS_VRSQRT28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SDrk, X86_INS_VRSQRT28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SDrkz, X86_INS_VRSQRT28SD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SSm, X86_INS_VRSQRT28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SSmk, X86_INS_VRSQRT28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SSmkz, X86_INS_VRSQRT28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SSr, X86_INS_VRSQRT28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SSrb, X86_INS_VRSQRT28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SSrbk, X86_INS_VRSQRT28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SSrbkz, X86_INS_VRSQRT28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SSrk, X86_INS_VRSQRT28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRT28SSrkz, X86_INS_VRSQRT28SS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_ERI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTPSYm, X86_INS_VRSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTPSYm_Int, X86_INS_VRSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTPSYr, X86_INS_VRSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTPSYr_Int, X86_INS_VRSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTPSm, X86_INS_VRSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTPSm_Int, X86_INS_VRSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTPSr, X86_INS_VRSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTPSr_Int, X86_INS_VRSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTSSm, X86_INS_VRSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTSSm_Int, X86_INS_VRSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VRSQRTSSr, X86_INS_VRSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERDPDZmr, X86_INS_VSCATTERDPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERDPSZmr, X86_INS_VSCATTERDPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERPF0DPDm, X86_INS_VSCATTERPF0DPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERPF0DPSm, X86_INS_VSCATTERPF0DPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERPF0QPDm, X86_INS_VSCATTERPF0QPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERPF0QPSm, X86_INS_VSCATTERPF0QPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERPF1DPDm, X86_INS_VSCATTERPF1DPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERPF1DPSm, X86_INS_VSCATTERPF1DPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERPF1QPDm, X86_INS_VSCATTERPF1QPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERPF1QPSm, X86_INS_VSCATTERPF1QPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_PFI, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERQPDZmr, X86_INS_VSCATTERQPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSCATTERQPSZmr, X86_INS_VSCATTERQPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPDYrmi, X86_INS_VSHUFPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPDYrri, X86_INS_VSHUFPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPDZrmi, X86_INS_VSHUFPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPDZrri, X86_INS_VSHUFPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPDrmi, X86_INS_VSHUFPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPDrri, X86_INS_VSHUFPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPSYrmi, X86_INS_VSHUFPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPSYrri, X86_INS_VSHUFPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPSZrmi, X86_INS_VSHUFPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPSZrri, X86_INS_VSHUFPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPSrmi, X86_INS_VSHUFPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSHUFPSrri, X86_INS_VSHUFPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDYm, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDYr, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ128m, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ128mb, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ128mbk, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ128mbkz, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ128mk, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ128mkz, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ128r, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ128rk, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ128rkz, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ256m, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ256mb, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ256mbk, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ256mbkz, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ256mk, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ256mkz, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ256r, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ256rk, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZ256rkz, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZm, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZmb, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZmbk, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZmbkz, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZmk, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZmkz, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZr, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZrk, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDZrkz, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDm, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPDr, X86_INS_VSQRTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSYm, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSYr, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ128m, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ128mb, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ128mbk, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ128mbkz, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ128mk, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ128mkz, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ128r, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ128rk, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ128rkz, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ256m, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ256mb, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ256mbk, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ256mbkz, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ256mk, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ256mkz, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ256r, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ256rk, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZ256rkz, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZm, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZmb, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZmbk, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZmbkz, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZmk, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZmkz, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZr, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZrk, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSZrkz, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSm, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTPSr, X86_INS_VSQRTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSDZm, X86_INS_VSQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSDZm_Int, X86_INS_VSQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSDZr, X86_INS_VSQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSDZr_Int, X86_INS_VSQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSDm, X86_INS_VSQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSDm_Int, X86_INS_VSQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSDr, X86_INS_VSQRTSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSSZm, X86_INS_VSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSSZm_Int, X86_INS_VSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSSZr, X86_INS_VSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSSZr_Int, X86_INS_VSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSSm, X86_INS_VSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSSm_Int, X86_INS_VSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VSQRTSSr, X86_INS_VSQRTSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VSTMXCSR, X86_INS_VSTMXCSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDYrm, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDYrr, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ128rm, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ128rmb, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ128rmbk, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ128rmbkz, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ128rmk, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ128rmkz, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ128rr, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ128rrk, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ128rrkz, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ256rm, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ256rmb, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ256rmbk, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ256rmbkz, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ256rmk, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ256rmkz, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ256rr, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ256rrk, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZ256rrkz, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrb, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrbk, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrbkz, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrm, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrmb, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrmbk, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrmbkz, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrmk, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrmkz, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrr, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrrk, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDZrrkz, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDrm, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPDrr, X86_INS_VSUBPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSYrm, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSYrr, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ128rm, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ128rmb, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ128rmbk, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ128rmbkz, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ128rmk, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ128rmkz, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ128rr, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ128rrk, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ128rrkz, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ256rm, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ256rmb, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ256rmbk, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ256rmbkz, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ256rmk, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ256rmkz, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ256rr, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ256rrk, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZ256rrkz, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrb, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrbk, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrbkz, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrm, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrmb, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrmbk, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrmbkz, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrmk, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrmkz, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrr, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrrk, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSZrrkz, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSrm, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBPSrr, X86_INS_VSUBPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrm, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrm_Int, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrm_Intk, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrm_Intkz, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrr, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrr_Int, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrr_Intk, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrr_Intkz, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrrb, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrrbk, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDZrrbkz, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDrm, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDrm_Int, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDrr, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSDrr_Int, X86_INS_VSUBSD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrm, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrm_Int, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrm_Intk, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrm_Intkz, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrr, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrr_Int, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrr_Intk, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrr_Intkz, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrrb, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrrbk, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSZrrbkz, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSrm, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSrm_Int, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSrr, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VSUBSSrr_Int, X86_INS_VSUBSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VTESTPDYrm, X86_INS_VTESTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VTESTPDYrr, X86_INS_VTESTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VTESTPDrm, X86_INS_VTESTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VTESTPDrr, X86_INS_VTESTPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VTESTPSYrm, X86_INS_VTESTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VTESTPSYrr, X86_INS_VTESTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VTESTPSrm, X86_INS_VTESTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VTESTPSrr, X86_INS_VTESTPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUCOMISDZrm, X86_INS_VUCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUCOMISDZrr, X86_INS_VUCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUCOMISDrm, X86_INS_VUCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUCOMISDrr, X86_INS_VUCOMISD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUCOMISSZrm, X86_INS_VUCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUCOMISSZrr, X86_INS_VUCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUCOMISSrm, X86_INS_VUCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUCOMISSrr, X86_INS_VUCOMISS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPDYrm, X86_INS_VUNPCKHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPDYrr, X86_INS_VUNPCKHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPDZrm, X86_INS_VUNPCKHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPDZrr, X86_INS_VUNPCKHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPDrm, X86_INS_VUNPCKHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPDrr, X86_INS_VUNPCKHPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPSYrm, X86_INS_VUNPCKHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPSYrr, X86_INS_VUNPCKHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPSZrm, X86_INS_VUNPCKHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPSZrr, X86_INS_VUNPCKHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPSrm, X86_INS_VUNPCKHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKHPSrr, X86_INS_VUNPCKHPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPDYrm, X86_INS_VUNPCKLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPDYrr, X86_INS_VUNPCKLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPDZrm, X86_INS_VUNPCKLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPDZrr, X86_INS_VUNPCKLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPDrm, X86_INS_VUNPCKLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPDrr, X86_INS_VUNPCKLPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPSYrm, X86_INS_VUNPCKLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPSYrr, X86_INS_VUNPCKLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPSZrm, X86_INS_VUNPCKLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPSZrr, X86_INS_VUNPCKLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPSrm, X86_INS_VUNPCKLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VUNPCKLPSrr, X86_INS_VUNPCKLPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VXORPDYrm, X86_INS_VXORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VXORPDYrr, X86_INS_VXORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VXORPDrm, X86_INS_VXORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VXORPDrr, X86_INS_VXORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VXORPSYrm, X86_INS_VXORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VXORPSYrr, X86_INS_VXORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VXORPSrm, X86_INS_VXORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VXORPSrr, X86_INS_VXORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_AVX, X86_GRP_NOVLX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VZEROALL, X86_INS_VZEROALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_YMM0, X86_REG_YMM1, X86_REG_YMM2, X86_REG_YMM3, X86_REG_YMM4, X86_REG_YMM5, X86_REG_YMM6, X86_REG_YMM7, X86_REG_YMM8, X86_REG_YMM9, X86_REG_YMM10, X86_REG_YMM11, X86_REG_YMM12, X86_REG_YMM13, X86_REG_YMM14, X86_REG_YMM15, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_VZEROUPPER, X86_INS_VZEROUPPER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_YMM0, X86_REG_YMM1, X86_REG_YMM2, X86_REG_YMM3, X86_REG_YMM4, X86_REG_YMM5, X86_REG_YMM6, X86_REG_YMM7, X86_REG_YMM8, X86_REG_YMM9, X86_REG_YMM10, X86_REG_YMM11, X86_REG_YMM12, X86_REG_YMM13, X86_REG_YMM14, X86_REG_YMM15, 0 }, { X86_GRP_AVX, 0 }, 0, 0
+#endif
+},
+{
+ X86_WAIT, X86_INS_WAIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_WBINVD, X86_INS_WBINVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_WRFSBASE, X86_INS_WRFSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_WRFSBASE64, X86_INS_WRFSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_WRGSBASE, X86_INS_WRGSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_WRGSBASE64, X86_INS_WRGSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_WRMSR, X86_INS_WRMSR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XABORT, X86_INS_XABORT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RTM, 0 }, 0, 0
+#endif
+},
+{
+ X86_XACQUIRE_PREFIX, X86_INS_XACQUIRE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_HLE, 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD16rm, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD16rr, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD32rm, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD32rr, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD64rm, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD64rr, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD8rm, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD8rr, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XBEGIN_2, X86_INS_XBEGIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EAX, 0 }, { X86_GRP_RTM, 0 }, 1, 0
+#endif
+},
+{
+ X86_XBEGIN_4, X86_INS_XBEGIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EAX, 0 }, { X86_GRP_RTM, 0 }, 1, 0
+#endif
+},
+{
+ X86_XCHG16ar, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG16rm, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG16rr, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG32ar, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG32ar64, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG32rm, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG32rr, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG64ar, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG64rm, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG64rr, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG8rm, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG8rr, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCH_F, X86_INS_FXCH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCRYPTCBC, X86_INS_XCRYPTCBC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCRYPTCFB, X86_INS_XCRYPTCFB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCRYPTCTR, X86_INS_XCRYPTCTR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCRYPTECB, X86_INS_XCRYPTECB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCRYPTOFB, X86_INS_XCRYPTOFB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XEND, X86_INS_XEND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_RTM, 0 }, 0, 0
+#endif
+},
+{
+ X86_XGETBV, X86_INS_XGETBV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ECX, 0 }, { X86_REG_EDX, X86_REG_EAX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XLAT, X86_INS_XLATB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16i16, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16ri, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16ri8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16rm, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16rr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16rr_REV, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32i32, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32ri, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32ri8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32rm, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32rr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32rr_REV, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64i32, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64mi32, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64ri32, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64ri8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64rm, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64rr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64rr_REV, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8i8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8ri, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8ri8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8rm, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8rr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8rr_REV, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XORPDrm, X86_INS_XORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_XORPDrr, X86_INS_XORPD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE2, 0 }, 0, 0
+#endif
+},
+{
+ X86_XORPSrm, X86_INS_XORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_XORPSrr, X86_INS_XORPS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_SSE1, 0 }, 0, 0
+#endif
+},
+{
+ X86_XRELEASE_PREFIX, X86_INS_XRELEASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_HLE, 0 }, 0, 0
+#endif
+},
+{
+ X86_XRSTOR, X86_INS_XRSTOR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XRSTOR64, X86_INS_XRSTOR64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XRSTORS, X86_INS_XRSTORS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XRSTORS64, X86_INS_XRSTORS64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVE, X86_INS_XSAVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVE64, X86_INS_XSAVE64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVEC, X86_INS_XSAVEC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVEC64, X86_INS_XSAVEC64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVEOPT, X86_INS_XSAVEOPT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVEOPT64, X86_INS_XSAVEOPT64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVES, X86_INS_XSAVES,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVES64, X86_INS_XSAVES64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XSETBV, X86_INS_XSETBV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDX, X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSHA1, X86_INS_XSHA1,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSHA256, X86_INS_XSHA256,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSTORE, X86_INS_XSTORE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XTEST, X86_INS_XTEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_fdisi8087_nop, X86_INS_FDISI8087_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_feni8087_nop, X86_INS_FENI8087_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_FPSW, 0 }, { 0 }, 0, 0
+#endif
+},
diff --git a/arch/X86/X86MappingInsn_reduce.inc b/arch/X86/X86MappingInsn_reduce.inc
new file mode 100644
index 0000000..9da2039
--- /dev/null
+++ b/arch/X86/X86MappingInsn_reduce.inc
@@ -0,0 +1,9351 @@
+// This is auto-gen data for Capstone engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{
+ X86_AAA, X86_INS_AAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_AAD8i8, X86_INS_AAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_AAM8i8, X86_INS_AAM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_AAS, X86_INS_AAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16i16, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16mi, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16mi8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16mr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16ri, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16ri8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16rm, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16rr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC16rr_REV, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32i32, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32mi, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32mi8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32mr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32ri, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32ri8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32rm, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32rr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC32rr_REV, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64i32, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64mi32, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64mi8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64mr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64ri32, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64ri8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64rm, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64rr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC64rr_REV, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8i8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8mi, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8mi8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8mr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8ri, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8ri8, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8rm, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8rr, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADC8rr_REV, X86_INS_ADC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADCX32rm, X86_INS_ADCX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADCX32rr, X86_INS_ADCX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADCX64rm, X86_INS_ADCX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADCX64rr, X86_INS_ADCX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16i16, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16ri, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16ri8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16rm, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16rr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD16rr_REV, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32i32, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32ri, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32ri8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32rm, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32rr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD32rr_REV, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64i32, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64mi32, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64ri32, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64ri8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64rm, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64rr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD64rr_REV, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8i8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8ri, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8ri8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8rm, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8rr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADD8rr_REV, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ADOX32rm, X86_INS_ADOX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADOX32rr, X86_INS_ADOX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADOX64rm, X86_INS_ADOX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_ADOX64rr, X86_INS_ADOX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_ADX, 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16i16, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16ri, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16ri8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16rm, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16rr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND16rr_REV, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32i32, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32ri, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32ri8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32rm, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32rr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND32rr_REV, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64i32, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64mi32, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64ri32, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64ri8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64rm, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64rr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND64rr_REV, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8i8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8ri, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8ri8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8rm, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8rr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_AND8rr_REV, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDN32rm, X86_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDN32rr, X86_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDN64rm, X86_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_ANDN64rr, X86_INS_ANDN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_ARPL16mr, X86_INS_ARPL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_ARPL16rr, X86_INS_ARPL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTR32rm, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTR32rr, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTR64rm, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTR64rr, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTRI32mi, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTRI32ri, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTRI64mi, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BEXTRI64ri, X86_INS_BEXTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCFILL32rm, X86_INS_BLCFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCFILL32rr, X86_INS_BLCFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCFILL64rm, X86_INS_BLCFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCFILL64rr, X86_INS_BLCFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCI32rm, X86_INS_BLCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCI32rr, X86_INS_BLCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCI64rm, X86_INS_BLCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCI64rr, X86_INS_BLCI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCIC32rm, X86_INS_BLCIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCIC32rr, X86_INS_BLCIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCIC64rm, X86_INS_BLCIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCIC64rr, X86_INS_BLCIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCMSK32rm, X86_INS_BLCMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCMSK32rr, X86_INS_BLCMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCMSK64rm, X86_INS_BLCMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCMSK64rr, X86_INS_BLCMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCS32rm, X86_INS_BLCS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCS32rr, X86_INS_BLCS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCS64rm, X86_INS_BLCS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLCS64rr, X86_INS_BLCS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSFILL32rm, X86_INS_BLSFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSFILL32rr, X86_INS_BLSFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSFILL64rm, X86_INS_BLSFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSFILL64rr, X86_INS_BLSFILL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSI32rm, X86_INS_BLSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSI32rr, X86_INS_BLSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSI64rm, X86_INS_BLSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSI64rr, X86_INS_BLSI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSIC32rm, X86_INS_BLSIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSIC32rr, X86_INS_BLSIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSIC64rm, X86_INS_BLSIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSIC64rr, X86_INS_BLSIC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSMSK32rm, X86_INS_BLSMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSMSK32rr, X86_INS_BLSMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSMSK64rm, X86_INS_BLSMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSMSK64rr, X86_INS_BLSMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSR32rm, X86_INS_BLSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSR32rr, X86_INS_BLSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSR64rm, X86_INS_BLSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BLSR64rr, X86_INS_BLSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_BOUNDS16rm, X86_INS_BOUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_BOUNDS32rm, X86_INS_BOUND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF16rm, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF16rr, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF32rm, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF32rr, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF64rm, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSF64rr, X86_INS_BSF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR16rm, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR16rr, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR32rm, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR32rr, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR64rm, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSR64rr, X86_INS_BSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSWAP32r, X86_INS_BSWAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BSWAP64r, X86_INS_BSWAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT16mi8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT16mr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT16ri8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT16rr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT32mi8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT32mr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT32ri8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT32rr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT64mi8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT64mr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT64ri8, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BT64rr, X86_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC16mi8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC16mr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC16ri8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC16rr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC32mi8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC32mr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC32ri8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC32rr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC64mi8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC64mr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC64ri8, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTC64rr, X86_INS_BTC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR16mi8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR16mr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR16ri8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR16rr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR32mi8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR32mr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR32ri8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR32rr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR64mi8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR64mr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR64ri8, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTR64rr, X86_INS_BTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS16mi8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS16mr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS16ri8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS16rr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS32mi8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS32mr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS32ri8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS32rr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS64mi8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS64mr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS64ri8, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BTS64rr, X86_INS_BTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_BZHI32rm, X86_INS_BZHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_BZHI32rr, X86_INS_BZHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_BZHI64rm, X86_INS_BZHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_BZHI64rr, X86_INS_BZHI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL16m, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL16r, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL32m, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL32r, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL64m, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL64pcrel32, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALL64r, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALLpcrel16, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
+#endif
+},
+{
+ X86_CALLpcrel32, X86_INS_CALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CBW, X86_INS_CBW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CDQ, X86_INS_CDQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CDQE, X86_INS_CDQE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_RAX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLAC, X86_INS_CLAC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLC, X86_INS_CLC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLD, X86_INS_CLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLFLUSHOPT, X86_INS_CLFLUSHOPT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLGI, X86_INS_CLGI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_CLI, X86_INS_CLI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLTS, X86_INS_CLTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CLWB, X86_INS_CLWB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMC, X86_INS_CMC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA16rm, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA16rr, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA32rm, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA32rr, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA64rm, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVA64rr, X86_INS_CMOVA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE16rm, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE16rr, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE32rm, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE32rr, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE64rm, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVAE64rr, X86_INS_CMOVAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB16rm, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB16rr, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB32rm, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB32rr, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB64rm, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVB64rr, X86_INS_CMOVB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE16rm, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE16rr, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE32rm, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE32rr, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE64rm, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVBE64rr, X86_INS_CMOVBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE16rm, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE16rr, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE32rm, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE32rr, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE64rm, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVE64rr, X86_INS_CMOVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG16rm, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG16rr, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG32rm, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG32rr, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG64rm, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVG64rr, X86_INS_CMOVG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE16rm, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE16rr, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE32rm, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE32rr, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE64rm, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVGE64rr, X86_INS_CMOVGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL16rm, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL16rr, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL32rm, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL32rr, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL64rm, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVL64rr, X86_INS_CMOVL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE16rm, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE16rr, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE32rm, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE32rr, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE64rm, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVLE64rr, X86_INS_CMOVLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE16rm, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE16rr, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE32rm, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE32rr, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE64rm, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNE64rr, X86_INS_CMOVNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO16rm, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO16rr, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO32rm, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO32rr, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO64rm, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNO64rr, X86_INS_CMOVNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP16rm, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP16rr, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP32rm, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP32rr, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP64rm, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNP64rr, X86_INS_CMOVNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS16rm, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS16rr, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS32rm, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS32rr, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS64rm, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVNS64rr, X86_INS_CMOVNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO16rm, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO16rr, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO32rm, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO32rr, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO64rm, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVO64rr, X86_INS_CMOVO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP16rm, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP16rr, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP32rm, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP32rr, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP64rm, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVP64rr, X86_INS_CMOVP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS16rm, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS16rr, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS32rm, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS32rr, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS64rm, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMOVS64rr, X86_INS_CMOVS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_CMOV, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16i16, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16mi, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16mi8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16mr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16ri, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16ri8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16rm, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16rr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP16rr_REV, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32i32, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32mi, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32mi8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32mr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32ri, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32ri8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32rm, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32rr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP32rr_REV, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64i32, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64mi32, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64mi8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64mr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64ri32, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64ri8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64rm, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64rr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP64rr_REV, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8i8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8mi, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8mi8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8mr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8ri, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8ri8, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8rm, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8rr, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMP8rr_REV, X86_INS_CMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSB, X86_INS_CMPSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSL, X86_INS_CMPSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSQ, X86_INS_CMPSQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPSW, X86_INS_CMPSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG16B, X86_INS_CMPXCHG16B,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG16rm, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG16rr, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG32rm, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG32rr, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG64rm, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG64rr, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG8B, X86_INS_CMPXCHG8B,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG8rm, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CMPXCHG8rr, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CPUID, X86_INS_CPUID,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CQO, X86_INS_CQO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CWD, X86_INS_CWD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_CWDE, X86_INS_CWDE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DAA, X86_INS_DAA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_DAS, X86_INS_DAS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_DATA16_PREFIX, X86_INS_DATA16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC16m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC16r, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC16r_alt, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC32m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC32r, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC32r_alt, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC64m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC64r, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC8m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DEC8r, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV16m, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV16r, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV32m, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV32r, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV64m, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV64r, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV8m, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_DIV8r, X86_INS_DIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ENTER, X86_INS_ENTER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_FARCALL16i, X86_INS_LCALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_FARCALL16m, X86_INS_LCALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
+#endif
+},
+{
+ X86_FARCALL32i, X86_INS_LCALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_FARCALL32m, X86_INS_LCALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
+#endif
+},
+{
+ X86_FARCALL64, X86_INS_LCALL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { 0 }, { X86_GRP_CALL, 0 }, 0, 0
+#endif
+},
+{
+ X86_FARJMP16i, X86_INS_LJMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_FARJMP16m, X86_INS_LJMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ X86_FARJMP32i, X86_INS_LJMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_FARJMP32m, X86_INS_LJMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ X86_FARJMP64, X86_INS_LJMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ X86_FSETPM, X86_INS_FSETPM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_GETSEC, X86_INS_GETSEC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_HLT, X86_INS_HLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV16m, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV16r, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_DX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV32m, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV32r, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV64m, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV64r, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV8m, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IDIV8r, X86_INS_IDIV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AL, X86_REG_AH, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16m, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16r, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rm, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rmi, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rmi8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rr, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rri, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL16rri8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32m, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32r, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rm, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rmi, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rmi8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rr, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rri, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL32rri8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64m, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64r, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rm, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rmi32, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rmi8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rr, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rri32, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL64rri8, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL8m, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IMUL8r, X86_INS_IMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN16ri, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN16rr, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, 0 }, { X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN32ri, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN32rr, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, 0 }, { X86_REG_EAX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN8ri, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_IN8rr, X86_INS_IN,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, 0 }, { X86_REG_AL, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC16m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC16r, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC16r_alt, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INC32m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC32r, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC32r_alt, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INC64m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC64r, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC8m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INC8r, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INSB, X86_INS_INSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INSL, X86_INS_INSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INSW, X86_INS_INSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INT, X86_INS_INT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
+#endif
+},
+{
+ X86_INT1, X86_INS_INT1,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_INT, 0 }, 0, 0
+#endif
+},
+{
+ X86_INT3, X86_INS_INT3,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
+#endif
+},
+{
+ X86_INTO, X86_INS_INTO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { X86_GRP_INT, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVD, X86_INS_INVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_INVEPT32, X86_INS_INVEPT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVEPT64, X86_INS_INVEPT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVLPG, X86_INS_INVLPG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVLPGA32, X86_INS_INVLPGA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVLPGA64, X86_INS_INVLPGA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_ECX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVPCID32, X86_INS_INVPCID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVPCID64, X86_INS_INVPCID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVVPID32, X86_INS_INVVPID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_INVVPID64, X86_INS_INVVPID,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_IRET16, X86_INS_IRET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
+#endif
+},
+{
+ X86_IRET32, X86_INS_IRETD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
+#endif
+},
+{
+ X86_IRET64, X86_INS_IRETQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_JAE_1, X86_INS_JAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JAE_2, X86_INS_JAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JAE_4, X86_INS_JAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JA_1, X86_INS_JA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JA_2, X86_INS_JA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JA_4, X86_INS_JA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JBE_1, X86_INS_JBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JBE_2, X86_INS_JBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JBE_4, X86_INS_JBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JB_1, X86_INS_JB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JB_2, X86_INS_JB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JB_4, X86_INS_JB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JCXZ, X86_INS_JCXZ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CX, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JECXZ, X86_INS_JECXZ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ECX, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JE_1, X86_INS_JE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JE_2, X86_INS_JE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JE_4, X86_INS_JE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JGE_1, X86_INS_JGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JGE_2, X86_INS_JGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JGE_4, X86_INS_JGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JG_1, X86_INS_JG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JG_2, X86_INS_JG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JG_4, X86_INS_JG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JLE_1, X86_INS_JLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JLE_2, X86_INS_JLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JLE_4, X86_INS_JLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JL_1, X86_INS_JL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JL_2, X86_INS_JL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JL_4, X86_INS_JL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JMP16m, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP16r, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP32m, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP32r, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP64m, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP64r, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 1, 1
+#endif
+},
+{
+ X86_JMP_1, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JMP_2, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JMP_4, X86_INS_JMP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNE_1, X86_INS_JNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNE_2, X86_INS_JNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNE_4, X86_INS_JNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNO_1, X86_INS_JNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNO_2, X86_INS_JNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNO_4, X86_INS_JNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNP_1, X86_INS_JNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNP_2, X86_INS_JNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNP_4, X86_INS_JNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNS_1, X86_INS_JNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNS_2, X86_INS_JNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JNS_4, X86_INS_JNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JO_1, X86_INS_JO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JO_2, X86_INS_JO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JO_4, X86_INS_JO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JP_1, X86_INS_JP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JP_2, X86_INS_JP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JP_4, X86_INS_JP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JRCXZ, X86_INS_JRCXZ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RCX, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JS_1, X86_INS_JS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JS_2, X86_INS_JS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_JS_4, X86_INS_JS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ X86_LAHF, X86_INS_LAHF,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_AH, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR16rm, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR16rr, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR32rm, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR32rr, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR64rm, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LAR64rr, X86_INS_LAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG16, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG16B, X86_INS_CMPXCHG16B,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RBX, X86_REG_RCX, X86_REG_RDX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG32, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG64, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG8, X86_INS_CMPXCHG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LCMPXCHG8B, X86_INS_CMPXCHG8B,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EBX, X86_REG_ECX, X86_REG_EDX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LDS16rm, X86_INS_LDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LDS32rm, X86_INS_LDS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LEA16r, X86_INS_LEA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LEA32r, X86_INS_LEA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LEA64_32r, X86_INS_LEA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LEA64r, X86_INS_LEA,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LEAVE, X86_INS_LEAVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_REG_EBP, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LEAVE64, X86_INS_LEAVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_REG_RBP, X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LES16rm, X86_INS_LES,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LES32rm, X86_INS_LES,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LFS16rm, X86_INS_LFS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LFS32rm, X86_INS_LFS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LFS64rm, X86_INS_LFS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LGDT16m, X86_INS_LGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LGDT32m, X86_INS_LGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LGDT64m, X86_INS_LGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LGS16rm, X86_INS_LGS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LGS32rm, X86_INS_LGS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LGS64rm, X86_INS_LGS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LIDT16m, X86_INS_LIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LIDT32m, X86_INS_LIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_LIDT64m, X86_INS_LIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LLDT16m, X86_INS_LLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LLDT16r, X86_INS_LLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LMSW16m, X86_INS_LMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LMSW16r, X86_INS_LMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD16mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD16mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD16mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD32mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD32mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD32mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD64mi32, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD64mi8, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD64mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD8mi, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_ADD8mr, X86_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND16mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND16mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND16mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND32mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND32mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND32mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND64mi32, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND64mi8, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND64mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND8mi, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_AND8mr, X86_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_DEC16m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_DEC32m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_DEC64m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_DEC8m, X86_INS_DEC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_INC16m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_INC32m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_INC64m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_INC8m, X86_INS_INC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR16mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR16mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR16mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR32mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR32mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR32mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR64mi32, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR64mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR64mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR8mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_OR8mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB16mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB16mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB16mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB32mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB32mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB32mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB64mi32, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB64mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB64mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB8mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_SUB8mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR16mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR16mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR16mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR32mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR32mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR32mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR64mi32, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR64mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR64mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR8mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOCK_XOR8mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LODSB, X86_INS_LODSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AL, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LODSL, X86_INS_LODSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EAX, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LODSQ, X86_INS_LODSQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_RAX, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LODSW, X86_INS_LODSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_AX, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOOP, X86_INS_LOOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOOPE, X86_INS_LOOPE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LOOPNE, X86_INS_LOOPNE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETIL, X86_INS_RETF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETIQ, X86_INS_RETFQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETIW, X86_INS_RETF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETL, X86_INS_RETF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETQ, X86_INS_RETFQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_LRETW, X86_INS_RETF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL16rm, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL16rr, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL32rm, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL32rr, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL64rm, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSL64rr, X86_INS_LSL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSS16rm, X86_INS_LSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSS32rm, X86_INS_LSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LSS64rm, X86_INS_LSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LTRm, X86_INS_LTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LTRr, X86_INS_LTR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LXADD16, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LXADD32, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LXADD64, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LXADD8, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT16rm, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT16rr, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT32rm, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT32rr, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT64rm, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_LZCNT64rr, X86_INS_LZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MONTMUL, X86_INS_MONTMUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RSI, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_RSI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ao16, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ao32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ao64, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16mi, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16mr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ms, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16o16a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16o32a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16o64a, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ri, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16ri_alt, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16rm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16rr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16rr_REV, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16rs, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16sm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV16sr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ao16, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ao32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ao64, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32cr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32dr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32mi, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32mr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ms, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32o16a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32o32a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32o64a, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rc, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rd, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ri, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32ri_alt, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rr_REV, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32rs, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32sm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV32sr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64ao32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64ao64, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64cr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64dr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64mi32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64mr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64ms, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64o32a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64o64a, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rc, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rd, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64ri, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64ri32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rr_REV, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64rs, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64sm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV64sr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8ao16, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8ao32, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8ao64, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8mi, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8mr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8mr_NOREX, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8o16a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8o32a, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8o64a, X86_INS_MOVABS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8ri, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8ri_alt, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8rm, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8rm_NOREX, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8rr, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8rr_NOREX, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOV8rr_REV, X86_INS_MOV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE16mr, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE16rm, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE32mr, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE32rm, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE64mr, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVBE64rm, X86_INS_MOVBE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSB, X86_INS_MOVSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSL, X86_INS_MOVSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSQ, X86_INS_MOVSQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSW, X86_INS_MOVSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX16rm8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX16rr8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32_NOREXrm8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32_NOREXrr8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32rm16, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32rm8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32rr16, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX32rr8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64_NOREXrr32, X86_INS_MOVSXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rm16, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rm32, X86_INS_MOVSXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rm32_alt, X86_INS_MOVSXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rm8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rr16, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rr32, X86_INS_MOVSXD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVSX64rr8, X86_INS_MOVSX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX16rm8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX16rr8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32_NOREXrm8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32_NOREXrr8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32rm16, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32rm8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32rr16, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX32rr8, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX64rm16_Q, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX64rm8_Q, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX64rr16_Q, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MOVZX64rr8_Q, X86_INS_MOVZX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL16m, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL16r, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { X86_REG_AX, X86_REG_DX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL32m, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL32r, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { X86_REG_EAX, X86_REG_EDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL64m, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL64r, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { X86_REG_RAX, X86_REG_RDX, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL8m, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MUL8r, X86_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { X86_REG_AL, X86_REG_EFLAGS, X86_REG_AX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_MULX32rm, X86_INS_MULX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULX32rr, X86_INS_MULX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULX64rm, X86_INS_MULX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_MULX64rr, X86_INS_MULX,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG16m, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG16r, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG32m, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG32r, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG64m, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG64r, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG8m, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NEG8r, X86_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16m4, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16m5, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16m6, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16m7, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16r4, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16r5, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16r6, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_16r7, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_m4, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_m5, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_m6, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_m7, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_r4, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_r5, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_r6, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP18_r7, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOP19rr, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_19, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_1a, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_1b, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_1c, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_1d, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPL_1e, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_19, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_1a, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_1b, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_1c, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_1d, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOOPW_1e, X86_INS_NOP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT16m, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT16r, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT32m, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT32r, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT64m, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT64r, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT8m, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_NOT8r, X86_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16i16, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16ri, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16ri8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16rm, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16rr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR16rr_REV, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32i32, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32mrLocked, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32ri, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32ri8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32rm, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32rr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR32rr_REV, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64i32, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64mi32, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64ri32, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64ri8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64rm, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64rr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR64rr_REV, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8i8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8mi, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8mi8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8mr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8ri, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8ri8, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8rm, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8rr, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OR8rr_REV, X86_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT16ir, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT16rr, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_AX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT32ir, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT32rr, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_EAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT8ir, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUT8rr, X86_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_AL, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUTSB, X86_INS_OUTSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUTSL, X86_INS_OUTSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_OUTSW, X86_INS_OUTSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_DX, X86_REG_ESI, X86_REG_EFLAGS, 0 }, { X86_REG_ESI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PCOMMIT, X86_INS_PCOMMIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PDEP32rm, X86_INS_PDEP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PDEP32rr, X86_INS_PDEP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PDEP64rm, X86_INS_PDEP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PDEP64rr, X86_INS_PDEP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXT32rm, X86_INS_PEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXT32rr, X86_INS_PEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXT64rm, X86_INS_PEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_PEXT64rr, X86_INS_PEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP16r, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POP16rmm, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POP16rmr, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POP32r, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP32rmm, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP32rmr, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP64r, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP64rmm, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POP64rmr, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPA16, X86_INS_POPAW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPA32, X86_INS_POPAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPDS16, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPDS32, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPES16, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPES32, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPF16, X86_INS_POPF,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPF32, X86_INS_POPFD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPF64, X86_INS_POPFQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPFS16, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPFS32, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPFS64, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPGS16, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_POPGS32, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPGS64, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPSS16, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_POPSS32, X86_INS_POP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH16i8, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH16r, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH16rmm, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH16rmr, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH32i8, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH32r, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH32rmm, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH32rmr, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64i16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64i32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64i8, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64r, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64rmm, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSH64rmr, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHA16, X86_INS_PUSHAW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHA32, X86_INS_PUSHAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDI, X86_REG_ESI, X86_REG_EBP, X86_REG_EBX, X86_REG_EDX, X86_REG_ECX, X86_REG_EAX, X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHCS16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHCS32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHDS16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHDS32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHES16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHES32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHF16, X86_INS_PUSHF,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHF32, X86_INS_PUSHFD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, X86_REG_EFLAGS, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHF64, X86_INS_PUSHFQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RSP, X86_REG_EFLAGS, 0 }, { X86_REG_RSP, 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHFS16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHFS32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHFS64, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHGS16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHGS32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHGS64, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHSS16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHSS32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHi16, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_PUSHi32, X86_INS_PUSH,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ESP, 0 }, { X86_REG_ESP, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16m1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16mCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16mi, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16r1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16rCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL16ri, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32m1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32mCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32mi, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32r1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32rCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL32ri, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64m1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64mCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64mi, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64r1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64rCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL64ri, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8m1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8mCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8mi, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8r1, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8rCL, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCL8ri, X86_INS_RCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16m1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16mCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16mi, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16r1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16rCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR16ri, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32m1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32mCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32mi, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32r1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32rCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR32ri, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64m1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64mCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64mi, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64r1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64rCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR64ri, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8m1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8mCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8mi, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8r1, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8rCL, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RCR8ri, X86_INS_RCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDFSBASE, X86_INS_RDFSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RDFSBASE64, X86_INS_RDFSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RDGSBASE, X86_INS_RDGSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RDGSBASE64, X86_INS_RDGSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RDMSR, X86_INS_RDMSR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ECX, 0 }, { X86_REG_EAX, X86_REG_EDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDPMC, X86_INS_RDPMC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ECX, 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDRAND16r, X86_INS_RDRAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDRAND32r, X86_INS_RDRAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDRAND64r, X86_INS_RDRAND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDSEED16r, X86_INS_RDSEED,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDSEED32r, X86_INS_RDSEED,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDSEED64r, X86_INS_RDSEED,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDTSC, X86_INS_RDTSC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_RAX, X86_REG_RDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RDTSCP, X86_INS_RDTSCP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_RAX, X86_REG_RCX, X86_REG_RDX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RETIL, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_RETIQ, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RETIW, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RETL, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_RETQ, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_RETW, X86_INS_RET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16m1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16mCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16mi, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16r1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16rCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL16ri, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32m1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32mCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32mi, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32r1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32rCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL32ri, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64m1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64mCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64mi, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64r1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64rCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL64ri, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8m1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8mCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8mi, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8r1, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8rCL, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROL8ri, X86_INS_ROL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16m1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16mCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16mi, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16r1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16rCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR16ri, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32m1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32mCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32mi, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32r1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32rCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR32ri, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64m1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64mCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64mi, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64r1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64rCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR64ri, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8m1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8mCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8mi, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8r1, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8rCL, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_ROR8ri, X86_INS_ROR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_RORX32mi, X86_INS_RORX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_RORX32ri, X86_INS_RORX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_RORX64mi, X86_INS_RORX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_RORX64ri, X86_INS_RORX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_RSM, X86_INS_RSM,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAHF, X86_INS_SAHF,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AH, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16m1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16mCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16mi, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16r1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16rCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL16ri, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32m1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32mCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32mi, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32r1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32rCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL32ri, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64m1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64mCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64mi, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64r1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64rCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL64ri, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8m1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8mCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8mi, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8r1, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8rCL, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAL8ri, X86_INS_SAL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SALC, X86_INS_SALC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_AL, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16m1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16mCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16mi, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16r1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16rCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR16ri, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32m1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32mCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32mi, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32r1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32rCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR32ri, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64m1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64mCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64mi, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64r1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64rCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR64ri, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8m1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8mCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8mi, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8r1, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8rCL, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SAR8ri, X86_INS_SAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SARX32rm, X86_INS_SARX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SARX32rr, X86_INS_SARX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SARX64rm, X86_INS_SARX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SARX64rr, X86_INS_SARX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16i16, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16mi, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16mi8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16mr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16ri, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16ri8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16rm, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16rr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB16rr_REV, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32i32, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32mi, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32mi8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32mr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32ri, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32ri8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32rm, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32rr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB32rr_REV, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64i32, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64mi32, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64mi8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64mr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64ri32, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64ri8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64rm, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64rr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB64rr_REV, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8i8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8mi, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8mi8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8mr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8ri, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8ri8, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8rm, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8rr, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SBB8rr_REV, X86_INS_SBB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SCASB, X86_INS_SCASB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SCASL, X86_INS_SCASD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SCASQ, X86_INS_SCASQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SCASW, X86_INS_SCASW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETAEm, X86_INS_SETAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETAEr, X86_INS_SETAE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETAm, X86_INS_SETA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETAr, X86_INS_SETA,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETBEm, X86_INS_SETBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETBEr, X86_INS_SETBE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETBm, X86_INS_SETB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETBr, X86_INS_SETB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETEm, X86_INS_SETE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETEr, X86_INS_SETE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETGEm, X86_INS_SETGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETGEr, X86_INS_SETGE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETGm, X86_INS_SETG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETGr, X86_INS_SETG,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETLEm, X86_INS_SETLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETLEr, X86_INS_SETLE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETLm, X86_INS_SETL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETLr, X86_INS_SETL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNEm, X86_INS_SETNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNEr, X86_INS_SETNE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNOm, X86_INS_SETNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNOr, X86_INS_SETNO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNPm, X86_INS_SETNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNPr, X86_INS_SETNP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNSm, X86_INS_SETNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETNSr, X86_INS_SETNS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETOm, X86_INS_SETO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETOr, X86_INS_SETO,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETPm, X86_INS_SETP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETPr, X86_INS_SETP,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETSm, X86_INS_SETS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SETSr, X86_INS_SETS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EFLAGS, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SGDT16m, X86_INS_SGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SGDT32m, X86_INS_SGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SGDT64m, X86_INS_SGDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16m1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16mCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16mi, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16r1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16rCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL16ri, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32m1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32mCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32mi, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32r1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32rCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL32ri, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64m1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64mCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64mi, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64r1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64rCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL64ri, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8m1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8mCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8mi, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8r1, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8rCL, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHL8ri, X86_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD16mrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD16mri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD16rrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD16rri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD32mrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD32mri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD32rrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD32rri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD64mrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD64mri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD64rrCL, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLD64rri8, X86_INS_SHLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLX32rm, X86_INS_SHLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLX32rr, X86_INS_SHLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLX64rm, X86_INS_SHLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHLX64rr, X86_INS_SHLX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16m1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16mCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16mi, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16r1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16rCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR16ri, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32m1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32mCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32mi, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32r1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32rCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR32ri, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64m1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64mCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64mi, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64r1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64rCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR64ri, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8m1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8mCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8mi, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8r1, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8rCL, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHR8ri, X86_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD16mrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD16mri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD16rrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD16rri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD32mrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD32mri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD32rrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD32rri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD64mrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD64mri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD64rrCL, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_CL, 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRD64rri8, X86_INS_SHRD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRX32rm, X86_INS_SHRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRX32rr, X86_INS_SHRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRX64rm, X86_INS_SHRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SHRX64rr, X86_INS_SHRX,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_BMI2, 0 }, 0, 0
+#endif
+},
+{
+ X86_SIDT16m, X86_INS_SIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SIDT32m, X86_INS_SIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SIDT64m, X86_INS_SIDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_SKINIT, X86_INS_SKINIT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_SLDT16m, X86_INS_SLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SLDT16r, X86_INS_SLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SLDT32r, X86_INS_SLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SLDT64m, X86_INS_SLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SLDT64r, X86_INS_SLDT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SMSW16m, X86_INS_SMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SMSW16r, X86_INS_SMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SMSW32r, X86_INS_SMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SMSW64r, X86_INS_SMSW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STAC, X86_INS_STAC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STC, X86_INS_STC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STD, X86_INS_STD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STGI, X86_INS_STGI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_STI, X86_INS_STI,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STOSB, X86_INS_STOSB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AL, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STOSL, X86_INS_STOSD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STOSQ, X86_INS_STOSQ,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RCX, X86_REG_RDI, X86_REG_EFLAGS, 0 }, { X86_REG_RCX, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STOSW, X86_INS_STOSW,
+#ifndef CAPSTONE_DIET
+ { X86_REG_AX, X86_REG_EDI, X86_REG_EFLAGS, 0 }, { X86_REG_EDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STR16r, X86_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STR32r, X86_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STR64r, X86_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_STRm, X86_INS_STR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16i16, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16ri, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16ri8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16rm, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16rr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB16rr_REV, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32i32, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32ri, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32ri8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32rm, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32rr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB32rr_REV, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64i32, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64mi32, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64ri32, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64ri8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64rm, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64rr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB64rr_REV, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8i8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8mi, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8mi8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8mr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8ri, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8ri8, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8rm, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8rr, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SUB8rr_REV, X86_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SWAPGS, X86_INS_SWAPGS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSCALL, X86_INS_SYSCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSENTER, X86_INS_SYSENTER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_INT, 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSEXIT, X86_INS_SYSEXIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSEXIT64, X86_INS_SYSEXIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSRET, X86_INS_SYSRET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, 0 }, 0, 0
+#endif
+},
+{
+ X86_SYSRET64, X86_INS_SYSRET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_IRET, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_T1MSKC32rm, X86_INS_T1MSKC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_T1MSKC32rr, X86_INS_T1MSKC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_T1MSKC64rm, X86_INS_T1MSKC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_T1MSKC64rr, X86_INS_T1MSKC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16i16, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16mi, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16mi_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16ri, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16ri_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16rm, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST16rr, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32i32, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32mi, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32mi_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32ri, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32ri_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32rm, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST32rr, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64i32, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64mi32, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64mi32_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64ri32, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64ri32_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64rm, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST64rr, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8i8, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8mi, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8mi_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8ri, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8ri_alt, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8rm, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TEST8rr, X86_INS_TEST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TRAP, X86_INS_UD2,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT16rm, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT16rr, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT32rm, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT32rr, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT64rm, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZCNT64rr, X86_INS_TZCNT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_BMI, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZMSK32rm, X86_INS_TZMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZMSK32rr, X86_INS_TZMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZMSK64rm, X86_INS_TZMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_TZMSK64rr, X86_INS_TZMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_TBM, 0 }, 0, 0
+#endif
+},
+{
+ X86_UD2B, X86_INS_UD2B,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VERRm, X86_INS_VERR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VERRr, X86_INS_VERR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VERWm, X86_INS_VERW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VERWr, X86_INS_VERW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_VMCALL, X86_INS_VMCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMCLEARm, X86_INS_VMCLEAR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMFUNC, X86_INS_VMFUNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMLAUNCH, X86_INS_VMLAUNCH,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMLOAD32, X86_INS_VMLOAD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMLOAD64, X86_INS_VMLOAD,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMMCALL, X86_INS_VMMCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMPTRLDm, X86_INS_VMPTRLD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMPTRSTm, X86_INS_VMPTRST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMREAD32rm, X86_INS_VMREAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMREAD32rr, X86_INS_VMREAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMREAD64rm, X86_INS_VMREAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMREAD64rr, X86_INS_VMREAD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMRESUME, X86_INS_VMRESUME,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMRUN32, X86_INS_VMRUN,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMRUN64, X86_INS_VMRUN,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMSAVE32, X86_INS_VMSAVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMSAVE64, X86_INS_VMSAVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMWRITE32rm, X86_INS_VMWRITE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMWRITE32rr, X86_INS_VMWRITE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMWRITE64rm, X86_INS_VMWRITE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMWRITE64rr, X86_INS_VMWRITE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMXOFF, X86_INS_VMXOFF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_VMXON, X86_INS_VMXON,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_VM, 0 }, 0, 0
+#endif
+},
+{
+ X86_WBINVD, X86_INS_WBINVD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_WRFSBASE, X86_INS_WRFSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_WRFSBASE64, X86_INS_WRFSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_WRGSBASE, X86_INS_WRGSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_WRGSBASE64, X86_INS_WRGSBASE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_FSGSBASE, X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_WRMSR, X86_INS_WRMSR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD16rm, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD16rr, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD32rm, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD32rr, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD64rm, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD64rr, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD8rm, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XADD8rr, X86_INS_XADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG16ar, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG16rm, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG16rr, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG32ar, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG32ar64, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG32rm, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG32rr, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG64ar, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG64rm, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG64rr, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG8rm, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCHG8rr, X86_INS_XCHG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCRYPTCBC, X86_INS_XCRYPTCBC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCRYPTCFB, X86_INS_XCRYPTCFB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCRYPTCTR, X86_INS_XCRYPTCTR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCRYPTECB, X86_INS_XCRYPTECB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XCRYPTOFB, X86_INS_XCRYPTOFB,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RBX, X86_REG_RDX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XGETBV, X86_INS_XGETBV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_ECX, 0 }, { X86_REG_EDX, X86_REG_EAX, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XLAT, X86_INS_XLATB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16i16, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16ri, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16ri8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16rm, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16rr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR16rr_REV, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32i32, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32ri, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32ri8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32rm, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32rr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR32rr_REV, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64i32, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64mi32, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64ri32, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64ri8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64rm, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64rr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR64rr_REV, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8i8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8mi, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8mi8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8mr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8ri, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8ri8, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { X86_GRP_NOT64BITMODE, 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8rm, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8rr, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XOR8rr_REV, X86_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { X86_REG_EFLAGS, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XRSTOR, X86_INS_XRSTOR,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XRSTOR64, X86_INS_XRSTOR64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XRSTORS, X86_INS_XRSTORS,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XRSTORS64, X86_INS_XRSTORS64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVE, X86_INS_XSAVE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVE64, X86_INS_XSAVE64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVEC, X86_INS_XSAVEC,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVEC64, X86_INS_XSAVEC64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVEOPT, X86_INS_XSAVEOPT,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVEOPT64, X86_INS_XSAVEOPT64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVES, X86_INS_XSAVES,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSAVES64, X86_INS_XSAVES64,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RAX, 0 }, { 0 }, { X86_GRP_MODE64, 0 }, 0, 0
+#endif
+},
+{
+ X86_XSETBV, X86_INS_XSETBV,
+#ifndef CAPSTONE_DIET
+ { X86_REG_EDX, X86_REG_EAX, X86_REG_ECX, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSHA1, X86_INS_XSHA1,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSHA256, X86_INS_XSHA256,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RSI, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ X86_XSTORE, X86_INS_XSTORE,
+#ifndef CAPSTONE_DIET
+ { X86_REG_RDX, X86_REG_RDI, 0 }, { X86_REG_RAX, X86_REG_RDI, 0 }, { 0 }, 0, 0
+#endif
+},
diff --git a/arch/XCore/XCoreMapping.c b/arch/XCore/XCoreMapping.c
index b5b145d..9ca0059 100644
--- a/arch/XCore/XCoreMapping.c
+++ b/arch/XCore/XCoreMapping.c
@@ -80,1290 +80,7 @@
#endif
},
- {
- XCore_ADD_2rus, XCORE_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ADD_3r, XCORE_INS_ADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ANDNOT_2r, XCORE_INS_ANDNOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_AND_3r, XCORE_INS_AND,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ASHR_l2rus, XCORE_INS_ASHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ASHR_l3r, XCORE_INS_ASHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BAU_1r, XCORE_INS_BAU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- XCore_BITREV_l2r, XCORE_INS_BITREV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BLACP_lu10, XCORE_INS_BLA,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BLACP_u10, XCORE_INS_BLA,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BLAT_lu6, XCORE_INS_BLAT,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BLAT_u6, XCORE_INS_BLAT,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BLA_1r, XCORE_INS_BLA,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BLRB_lu10, XCORE_INS_BL,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BLRB_u10, XCORE_INS_BL,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BLRF_lu10, XCORE_INS_BL,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BLRF_u10, XCORE_INS_BL,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_BRBF_lru6, XCORE_INS_BF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRBF_ru6, XCORE_INS_BF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRBT_lru6, XCORE_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRBT_ru6, XCORE_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRBU_lu6, XCORE_INS_BU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRBU_u6, XCORE_INS_BU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRFF_lru6, XCORE_INS_BF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRFF_ru6, XCORE_INS_BF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRFT_lru6, XCORE_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRFT_ru6, XCORE_INS_BT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRFU_lu6, XCORE_INS_BU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRFU_u6, XCORE_INS_BU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 0
-#endif
- },
- {
- XCore_BRU_1r, XCORE_INS_BRU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- XCore_BYTEREV_l2r, XCORE_INS_BYTEREV,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_CHKCT_2r, XCORE_INS_CHKCT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_CHKCT_rus, XCORE_INS_CHKCT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_CLRE_0R, XCORE_INS_CLRE,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_CLRPT_1R, XCORE_INS_CLRPT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_CLRSR_branch_lu6, XCORE_INS_CLRSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- XCore_CLRSR_branch_u6, XCORE_INS_CLRSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- XCore_CLRSR_lu6, XCORE_INS_CLRSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_CLRSR_u6, XCORE_INS_CLRSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_CLZ_l2r, XCORE_INS_CLZ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_CRC8_l4r, XCORE_INS_CRC8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_CRC_l3r, XCORE_INS_CRC32,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_DCALL_0R, XCORE_INS_DCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_DENTSP_0R, XCORE_INS_DENTSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_DGETREG_1r, XCORE_INS_DGETREG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_DIVS_l3r, XCORE_INS_DIVS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_DIVU_l3r, XCORE_INS_DIVU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_DRESTSP_0R, XCORE_INS_DRESTSP,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_DRET_0R, XCORE_INS_DRET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ECALLF_1r, XCORE_INS_ECALLF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ECALLT_1r, XCORE_INS_ECALLT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_EDU_1r, XCORE_INS_EDU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_EEF_2r, XCORE_INS_EEF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_EET_2r, XCORE_INS_EET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_EEU_1r, XCORE_INS_EEU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ENDIN_2r, XCORE_INS_ENDIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ENTSP_lu6, XCORE_INS_ENTSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ENTSP_u6, XCORE_INS_ENTSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_EQ_2rus, XCORE_INS_EQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_EQ_3r, XCORE_INS_EQ,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_EXTDP_lu6, XCORE_INS_EXTDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_EXTDP_u6, XCORE_INS_EXTDP,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_EXTSP_lu6, XCORE_INS_EXTSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_EXTSP_u6, XCORE_INS_EXTSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_FREER_1r, XCORE_INS_FREER,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_FREET_0R, XCORE_INS_FREET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETD_l2r, XCORE_INS_GETD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETED_0R, XCORE_INS_GET,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETET_0R, XCORE_INS_GET,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETID_0R, XCORE_INS_GET,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETKEP_0R, XCORE_INS_GET,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETKSP_0R, XCORE_INS_GET,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETN_l2r, XCORE_INS_GETN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETPS_l2r, XCORE_INS_GET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETR_rus, XCORE_INS_GETR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETSR_lu6, XCORE_INS_GETSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETSR_u6, XCORE_INS_GETSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETST_2r, XCORE_INS_GETST,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_GETTS_2r, XCORE_INS_GETTS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_INCT_2r, XCORE_INS_INCT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_INITCP_2r, XCORE_INS_INIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_INITDP_2r, XCORE_INS_INIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_INITLR_l2r, XCORE_INS_INIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_INITPC_2r, XCORE_INS_INIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_INITSP_2r, XCORE_INS_INIT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_INPW_l2rus, XCORE_INS_INPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_INSHR_2r, XCORE_INS_INSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_INT_2r, XCORE_INS_INT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_IN_2r, XCORE_INS_IN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_KCALL_1r, XCORE_INS_KCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_KCALL_lu6, XCORE_INS_KCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_KCALL_u6, XCORE_INS_KCALL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_KENTSP_lu6, XCORE_INS_KENTSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_KENTSP_u6, XCORE_INS_KENTSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_KRESTSP_lu6, XCORE_INS_KRESTSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_KRESTSP_u6, XCORE_INS_KRESTSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_KRET_0R, XCORE_INS_KRET,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LADD_l5r, XCORE_INS_LADD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LD16S_3r, XCORE_INS_LD16S,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LD8U_3r, XCORE_INS_LD8U,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDA16B_l3r, XCORE_INS_LDA16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDA16F_l3r, XCORE_INS_LDA16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAPB_lu10, XCORE_INS_LDAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAPB_u10, XCORE_INS_LDAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAPF_lu10, XCORE_INS_LDAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAPF_lu10_ba, XCORE_INS_LDAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAPF_u10, XCORE_INS_LDAP,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAWB_l2rus, XCORE_INS_LDAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAWB_l3r, XCORE_INS_LDAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAWCP_lu6, XCORE_INS_LDAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAWCP_u6, XCORE_INS_LDAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAWDP_lru6, XCORE_INS_LDAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAWDP_ru6, XCORE_INS_LDAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAWF_l2rus, XCORE_INS_LDAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAWF_l3r, XCORE_INS_LDAW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAWSP_lru6, XCORE_INS_LDAW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDAWSP_ru6, XCORE_INS_LDAW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDC_lru6, XCORE_INS_LDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDC_ru6, XCORE_INS_LDC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDET_0R, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDIVU_l5r, XCORE_INS_LDIVU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDSED_0R, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDSPC_0R, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDSSR_0R, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDWCP_lru6, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDWCP_lu10, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDWCP_ru6, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDWCP_u10, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDWDP_lru6, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDWDP_ru6, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDWSP_lru6, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDWSP_ru6, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDW_2rus, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LDW_3r, XCORE_INS_LDW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LMUL_l6r, XCORE_INS_LMUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LSS_3r, XCORE_INS_LSS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LSUB_l5r, XCORE_INS_LSUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_LSU_3r, XCORE_INS_LSU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_MACCS_l4r, XCORE_INS_MACCS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_MACCU_l4r, XCORE_INS_MACCU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_MJOIN_1r, XCORE_INS_MJOIN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_MKMSK_2r, XCORE_INS_MKMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_MKMSK_rus, XCORE_INS_MKMSK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_MSYNC_1r, XCORE_INS_MSYNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_MUL_l3r, XCORE_INS_MUL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_NEG, XCORE_INS_NEG,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_NOT, XCORE_INS_NOT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_OR_3r, XCORE_INS_OR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_OUTCT_2r, XCORE_INS_OUTCT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_OUTCT_rus, XCORE_INS_OUTCT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_OUTPW_l2rus, XCORE_INS_OUTPW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_OUTSHR_2r, XCORE_INS_OUTSHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_OUTT_2r, XCORE_INS_OUTT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_OUT_2r, XCORE_INS_OUT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_PEEK_2r, XCORE_INS_PEEK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_REMS_l3r, XCORE_INS_REMS,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_REMU_l3r, XCORE_INS_REMU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_RETSP_lu6, XCORE_INS_RETSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_RETSP_u6, XCORE_INS_RETSP,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETCLK_l2r, XCORE_INS_SETCLK,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETCP_1r, XCORE_INS_SET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETC_l2r, XCORE_INS_SETC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETC_lru6, XCORE_INS_SETC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETC_ru6, XCORE_INS_SETC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETDP_1r, XCORE_INS_SET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETD_2r, XCORE_INS_SETD,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETEV_1r, XCORE_INS_SETEV,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETKEP_0R, XCORE_INS_SET,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETN_l2r, XCORE_INS_SETN,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETPSC_2r, XCORE_INS_SETPSC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETPS_l2r, XCORE_INS_SET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETPT_2r, XCORE_INS_SETPT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETRDY_l2r, XCORE_INS_SETRDY,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETSP_1r, XCORE_INS_SET,
-#ifndef CAPSTONE_DIET
- { 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETSR_branch_lu6, XCORE_INS_SETSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- XCore_SETSR_branch_u6, XCORE_INS_SETSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- XCore_SETSR_lu6, XCORE_INS_SETSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETSR_u6, XCORE_INS_SETSR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETTW_l2r, XCORE_INS_SETTW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SETV_1r, XCORE_INS_SETV,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SEXT_2r, XCORE_INS_SEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SEXT_rus, XCORE_INS_SEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SHL_2rus, XCORE_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SHL_3r, XCORE_INS_SHL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SHR_2rus, XCORE_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SHR_3r, XCORE_INS_SHR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SSYNC_0r, XCORE_INS_SSYNC,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ST16_l3r, XCORE_INS_ST16,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ST8_l3r, XCORE_INS_ST8,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_STET_0R, XCORE_INS_STW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_STSED_0R, XCORE_INS_STW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_STSPC_0R, XCORE_INS_STW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_STSSR_0R, XCORE_INS_STW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_STWDP_lru6, XCORE_INS_STW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_STWDP_ru6, XCORE_INS_STW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_STWSP_lru6, XCORE_INS_STW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_STWSP_ru6, XCORE_INS_STW,
-#ifndef CAPSTONE_DIET
- { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_STW_2rus, XCORE_INS_STW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_STW_l3r, XCORE_INS_STW,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SUB_2rus, XCORE_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SUB_3r, XCORE_INS_SUB,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_SYNCR_1r, XCORE_INS_SYNCR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_TESTCT_2r, XCORE_INS_TESTCT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_TESTLCL_l2r, XCORE_INS_TESTLCL,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_TESTWCT_2r, XCORE_INS_TESTWCT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_TSETMR_2r, XCORE_INS_TSETMR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_TSETR_3r, XCORE_INS_SET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_TSTART_1R, XCORE_INS_START,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_WAITEF_1R, XCORE_INS_WAITEF,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_WAITET_1R, XCORE_INS_WAITET,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_WAITEU_0R, XCORE_INS_WAITEU,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 1, 1
-#endif
- },
- {
- XCore_XOR_l3r, XCORE_INS_XOR,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ZEXT_2r, XCORE_INS_ZEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
- {
- XCore_ZEXT_rus, XCORE_INS_ZEXT,
-#ifndef CAPSTONE_DIET
- { 0 }, { 0 }, { 0 }, 0, 0
-#endif
- },
+#include "XCoreMappingInsn.inc"
};
// given internal insn id, return public instruction info
diff --git a/arch/XCore/XCoreMappingInsn.inc b/arch/XCore/XCoreMappingInsn.inc
new file mode 100644
index 0000000..8bcf84b
--- /dev/null
+++ b/arch/XCore/XCoreMappingInsn.inc
@@ -0,0 +1,1287 @@
+// This is auto-gen data for Capstone engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{
+ XCore_ADD_2rus, XCORE_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ADD_3r, XCORE_INS_ADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ANDNOT_2r, XCORE_INS_ANDNOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_AND_3r, XCORE_INS_AND,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ASHR_l2rus, XCORE_INS_ASHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ASHR_l3r, XCORE_INS_ASHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BAU_1r, XCORE_INS_BAU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ XCore_BITREV_l2r, XCORE_INS_BITREV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BLACP_lu10, XCORE_INS_BLA,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BLACP_u10, XCORE_INS_BLA,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BLAT_lu6, XCORE_INS_BLAT,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BLAT_u6, XCORE_INS_BLAT,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BLA_1r, XCORE_INS_BLA,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BLRB_lu10, XCORE_INS_BL,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BLRB_u10, XCORE_INS_BL,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BLRF_lu10, XCORE_INS_BL,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BLRF_u10, XCORE_INS_BL,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_R0, XCORE_REG_R1, XCORE_REG_R2, XCORE_REG_R3, XCORE_REG_R11, XCORE_REG_LR, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_BRBF_lru6, XCORE_INS_BF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRBF_ru6, XCORE_INS_BF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRBT_lru6, XCORE_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRBT_ru6, XCORE_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRBU_lu6, XCORE_INS_BU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRBU_u6, XCORE_INS_BU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRFF_lru6, XCORE_INS_BF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRFF_ru6, XCORE_INS_BF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRFT_lru6, XCORE_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRFT_ru6, XCORE_INS_BT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRFU_lu6, XCORE_INS_BU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRFU_u6, XCORE_INS_BU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 0
+#endif
+},
+{
+ XCore_BRU_1r, XCORE_INS_BRU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ XCore_BYTEREV_l2r, XCORE_INS_BYTEREV,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_CHKCT_2r, XCORE_INS_CHKCT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_CHKCT_rus, XCORE_INS_CHKCT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_CLRE_0R, XCORE_INS_CLRE,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_CLRPT_1R, XCORE_INS_CLRPT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_CLRSR_branch_lu6, XCORE_INS_CLRSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ XCore_CLRSR_branch_u6, XCORE_INS_CLRSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ XCore_CLRSR_lu6, XCORE_INS_CLRSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_CLRSR_u6, XCORE_INS_CLRSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_CLZ_l2r, XCORE_INS_CLZ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_CRC8_l4r, XCORE_INS_CRC8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_CRC_l3r, XCORE_INS_CRC32,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_DCALL_0R, XCORE_INS_DCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_DENTSP_0R, XCORE_INS_DENTSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_DGETREG_1r, XCORE_INS_DGETREG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_DIVS_l3r, XCORE_INS_DIVS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_DIVU_l3r, XCORE_INS_DIVU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_DRESTSP_0R, XCORE_INS_DRESTSP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_DRET_0R, XCORE_INS_DRET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ECALLF_1r, XCORE_INS_ECALLF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ECALLT_1r, XCORE_INS_ECALLT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_EDU_1r, XCORE_INS_EDU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_EEF_2r, XCORE_INS_EEF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_EET_2r, XCORE_INS_EET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_EEU_1r, XCORE_INS_EEU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ENDIN_2r, XCORE_INS_ENDIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ENTSP_lu6, XCORE_INS_ENTSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ENTSP_u6, XCORE_INS_ENTSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_EQ_2rus, XCORE_INS_EQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_EQ_3r, XCORE_INS_EQ,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_EXTDP_lu6, XCORE_INS_EXTDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_EXTDP_u6, XCORE_INS_EXTDP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_EXTSP_lu6, XCORE_INS_EXTSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_EXTSP_u6, XCORE_INS_EXTSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_FREER_1r, XCORE_INS_FREER,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_FREET_0R, XCORE_INS_FREET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETD_l2r, XCORE_INS_GETD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETED_0R, XCORE_INS_GET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETET_0R, XCORE_INS_GET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETID_0R, XCORE_INS_GET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETKEP_0R, XCORE_INS_GET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETKSP_0R, XCORE_INS_GET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETN_l2r, XCORE_INS_GETN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETPS_l2r, XCORE_INS_GET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETR_rus, XCORE_INS_GETR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETSR_lu6, XCORE_INS_GETSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETSR_u6, XCORE_INS_GETSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETST_2r, XCORE_INS_GETST,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_GETTS_2r, XCORE_INS_GETTS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_INCT_2r, XCORE_INS_INCT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_INITCP_2r, XCORE_INS_INIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_INITDP_2r, XCORE_INS_INIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_INITLR_l2r, XCORE_INS_INIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_INITPC_2r, XCORE_INS_INIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_INITSP_2r, XCORE_INS_INIT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_INPW_l2rus, XCORE_INS_INPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_INSHR_2r, XCORE_INS_INSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_INT_2r, XCORE_INS_INT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_IN_2r, XCORE_INS_IN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_KCALL_1r, XCORE_INS_KCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_KCALL_lu6, XCORE_INS_KCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_KCALL_u6, XCORE_INS_KCALL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_KENTSP_lu6, XCORE_INS_KENTSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_KENTSP_u6, XCORE_INS_KENTSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_KRESTSP_lu6, XCORE_INS_KRESTSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_KRESTSP_u6, XCORE_INS_KRESTSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_KRET_0R, XCORE_INS_KRET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LADD_l5r, XCORE_INS_LADD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LD16S_3r, XCORE_INS_LD16S,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LD8U_3r, XCORE_INS_LD8U,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDA16B_l3r, XCORE_INS_LDA16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDA16F_l3r, XCORE_INS_LDA16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAPB_lu10, XCORE_INS_LDAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAPB_u10, XCORE_INS_LDAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAPF_lu10, XCORE_INS_LDAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAPF_lu10_ba, XCORE_INS_LDAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAPF_u10, XCORE_INS_LDAP,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAWB_l2rus, XCORE_INS_LDAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAWB_l3r, XCORE_INS_LDAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAWCP_lu6, XCORE_INS_LDAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAWCP_u6, XCORE_INS_LDAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAWDP_lru6, XCORE_INS_LDAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAWDP_ru6, XCORE_INS_LDAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAWF_l2rus, XCORE_INS_LDAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAWF_l3r, XCORE_INS_LDAW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAWSP_lru6, XCORE_INS_LDAW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDAWSP_ru6, XCORE_INS_LDAW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDC_lru6, XCORE_INS_LDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDC_ru6, XCORE_INS_LDC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDET_0R, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDIVU_l5r, XCORE_INS_LDIVU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDSED_0R, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDSPC_0R, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDSSR_0R, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDWCP_lru6, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDWCP_lu10, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDWCP_ru6, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDWCP_u10, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_R11, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDWDP_lru6, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDWDP_ru6, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDWSP_lru6, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDWSP_ru6, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDW_2rus, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LDW_3r, XCORE_INS_LDW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LMUL_l6r, XCORE_INS_LMUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LSS_3r, XCORE_INS_LSS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LSUB_l5r, XCORE_INS_LSUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_LSU_3r, XCORE_INS_LSU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_MACCS_l4r, XCORE_INS_MACCS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_MACCU_l4r, XCORE_INS_MACCU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_MJOIN_1r, XCORE_INS_MJOIN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_MKMSK_2r, XCORE_INS_MKMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_MKMSK_rus, XCORE_INS_MKMSK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_MSYNC_1r, XCORE_INS_MSYNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_MUL_l3r, XCORE_INS_MUL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_NEG, XCORE_INS_NEG,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_NOT, XCORE_INS_NOT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_OR_3r, XCORE_INS_OR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_OUTCT_2r, XCORE_INS_OUTCT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_OUTCT_rus, XCORE_INS_OUTCT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_OUTPW_l2rus, XCORE_INS_OUTPW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_OUTSHR_2r, XCORE_INS_OUTSHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_OUTT_2r, XCORE_INS_OUTT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_OUT_2r, XCORE_INS_OUT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_PEEK_2r, XCORE_INS_PEEK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_REMS_l3r, XCORE_INS_REMS,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_REMU_l3r, XCORE_INS_REMU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_RETSP_lu6, XCORE_INS_RETSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_RETSP_u6, XCORE_INS_RETSP,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETCLK_l2r, XCORE_INS_SETCLK,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETCP_1r, XCORE_INS_SET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETC_l2r, XCORE_INS_SETC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETC_lru6, XCORE_INS_SETC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETC_ru6, XCORE_INS_SETC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETDP_1r, XCORE_INS_SET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETD_2r, XCORE_INS_SETD,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETEV_1r, XCORE_INS_SETEV,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETKEP_0R, XCORE_INS_SET,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETN_l2r, XCORE_INS_SETN,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETPSC_2r, XCORE_INS_SETPSC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETPS_l2r, XCORE_INS_SET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETPT_2r, XCORE_INS_SETPT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETRDY_l2r, XCORE_INS_SETRDY,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETSP_1r, XCORE_INS_SET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { XCORE_REG_SP, 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETSR_branch_lu6, XCORE_INS_SETSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ XCore_SETSR_branch_u6, XCORE_INS_SETSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ XCore_SETSR_lu6, XCORE_INS_SETSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETSR_u6, XCORE_INS_SETSR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETTW_l2r, XCORE_INS_SETTW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SETV_1r, XCORE_INS_SETV,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_R11, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SEXT_2r, XCORE_INS_SEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SEXT_rus, XCORE_INS_SEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SHL_2rus, XCORE_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SHL_3r, XCORE_INS_SHL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SHR_2rus, XCORE_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SHR_3r, XCORE_INS_SHR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SSYNC_0r, XCORE_INS_SSYNC,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ST16_l3r, XCORE_INS_ST16,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ST8_l3r, XCORE_INS_ST8,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_STET_0R, XCORE_INS_STW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_STSED_0R, XCORE_INS_STW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_STSPC_0R, XCORE_INS_STW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_STSSR_0R, XCORE_INS_STW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_STWDP_lru6, XCORE_INS_STW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_STWDP_ru6, XCORE_INS_STW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_STWSP_lru6, XCORE_INS_STW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_STWSP_ru6, XCORE_INS_STW,
+#ifndef CAPSTONE_DIET
+ { XCORE_REG_SP, 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_STW_2rus, XCORE_INS_STW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_STW_l3r, XCORE_INS_STW,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SUB_2rus, XCORE_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SUB_3r, XCORE_INS_SUB,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_SYNCR_1r, XCORE_INS_SYNCR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_TESTCT_2r, XCORE_INS_TESTCT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_TESTLCL_l2r, XCORE_INS_TESTLCL,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_TESTWCT_2r, XCORE_INS_TESTWCT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_TSETMR_2r, XCORE_INS_TSETMR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_TSETR_3r, XCORE_INS_SET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_TSTART_1R, XCORE_INS_START,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_WAITEF_1R, XCORE_INS_WAITEF,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_WAITET_1R, XCORE_INS_WAITET,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_WAITEU_0R, XCORE_INS_WAITEU,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 1, 1
+#endif
+},
+{
+ XCore_XOR_l3r, XCORE_INS_XOR,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ZEXT_2r, XCORE_INS_ZEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},
+{
+ XCore_ZEXT_rus, XCORE_INS_ZEXT,
+#ifndef CAPSTONE_DIET
+ { 0 }, { 0 }, { 0 }, 0, 0
+#endif
+},