x86: extend cs_x86.opcode to 4 bytes to contain EVEX opcode. this also updates Python binding following this interface change
diff --git a/arch/X86/X86Disassembler.c b/arch/X86/X86Disassembler.c
index a35c011..31751d6 100644
--- a/arch/X86/X86Disassembler.c
+++ b/arch/X86/X86Disassembler.c
@@ -668,12 +668,21 @@
prefixes[2] = inter->prefix2;
prefixes[3] = inter->prefix3;
- if (inter->vectorExtensionType > 0)
+ if (inter->vectorExtensionType != 0)
memcpy(pub->detail->x86.opcode, inter->vectorExtensionPrefix, sizeof(pub->detail->x86.opcode));
else {
- pub->detail->x86.opcode[0] = inter->opcode;
- pub->detail->x86.opcode[1] = inter->twoByteEscape;
- pub->detail->x86.opcode[2] = inter->threeByteEscape;
+ if (inter->twoByteEscape) {
+ if (inter->threeByteEscape) {
+ pub->detail->x86.opcode[0] = inter->twoByteEscape;
+ pub->detail->x86.opcode[1] = inter->threeByteEscape;
+ pub->detail->x86.opcode[2] = inter->opcode;
+ } else {
+ pub->detail->x86.opcode[0] = inter->twoByteEscape;
+ pub->detail->x86.opcode[1] = inter->opcode;
+ }
+ } else {
+ pub->detail->x86.opcode[0] = inter->opcode;
+ }
}
pub->detail->x86.addr_size = inter->addressSize;
@@ -706,6 +715,7 @@
if (instr->flat_insn->detail) {
instr->flat_insn->detail->x86.op_count = 0;
memset(instr->flat_insn->detail->x86.prefix, 0, sizeof(instr->flat_insn->detail->x86.prefix));
+ memset(instr->flat_insn->detail->x86.opcode, 0, sizeof(instr->flat_insn->detail->x86.opcode));
memset(instr->flat_insn->detail->x86.operands, 0, 4 * sizeof(instr->flat_insn->detail->x86.operands[0]));
}
diff --git a/arch/X86/X86DisassemblerDecoder.h b/arch/X86/X86DisassemblerDecoder.h
index 34a2090..2299b9d 100644
--- a/arch/X86/X86DisassemblerDecoder.h
+++ b/arch/X86/X86DisassemblerDecoder.h
@@ -579,6 +579,9 @@
/* 1 if the prefix byte, 0xf2 or 0xf3 is xacquire or xrelease */
BOOL xAcquireRelease;
+ /* The value of the vector extension prefix(EVEX/VEX/XOP), if present */
+ uint8_t vectorExtensionPrefix[4];
+
// end-of-zero-members
/* Reader interface (C) */
@@ -606,8 +609,6 @@
/* contains the location (for use with the reader) of the prefix byte */
uint64_t prefixLocations[0x100];
- /* The value of the vector extension prefix(EVEX/VEX/XOP), if present */
- uint8_t vectorExtensionPrefix[4];
/* The type of the vector extension prefix */
VectorExtensionType vectorExtensionType;
/* The location where a mandatory prefix would have to be (i.e., right before
diff --git a/bindings/python/capstone/x86.py b/bindings/python/capstone/x86.py
index 0986f67..151e053 100644
--- a/bindings/python/capstone/x86.py
+++ b/bindings/python/capstone/x86.py
@@ -48,7 +48,7 @@
class CsX86(ctypes.Structure):
_fields_ = (
('prefix', ctypes.c_uint8 * 4),
- ('opcode', ctypes.c_uint8 * 3),
+ ('opcode', ctypes.c_uint8 * 4),
('addr_size', ctypes.c_uint8),
('modrm', ctypes.c_uint8),
('sib', ctypes.c_uint8),
diff --git a/include/x86.h b/include/x86.h
index 5f1b43e..6090098 100644
--- a/include/x86.h
+++ b/include/x86.h
@@ -110,7 +110,7 @@
// Instruction opcode, wich can be from 1 to 3 bytes in size.
// This contains VEX opcode as well.
// An opcode byte gets value 0 when irrelevant.
- uint8_t opcode[3];
+ uint8_t opcode[4];
// Address size, which can be overrided with above prefix[5].
uint8_t addr_size;
diff --git a/tests/test_x86.c b/tests/test_x86.c
index 8d3efd1..8f896cf 100644
--- a/tests/test_x86.c
+++ b/tests/test_x86.c
@@ -44,7 +44,7 @@
print_string_hex("\tPrefix:", x86->prefix, 4);
- print_string_hex("\tOpcode:", x86->opcode, 3);
+ print_string_hex("\tOpcode:", x86->opcode, 4);
printf("\taddr_size: %u\n", x86->addr_size);
printf("\tmodrm: 0x%x\n", x86->modrm);
printf("\tdisp: 0x%x\n", x86->disp);