change option names for cs_option(), and update python binding accordingly to support new cs_option()
diff --git a/bindings/python/__init__.py b/bindings/python/__init__.py
index 46463a3..5cbebaf 100644
--- a/bindings/python/__init__.py
+++ b/bindings/python/__init__.py
@@ -1 +1 @@
-from capstone import cs, cs_disasm_quick, CS_ARCH_ARM, CS_ARCH_ARM64, CS_ARCH_MIPS, CS_ARCH_X86, CS_MODE_LITTLE_ENDIAN, CS_MODE_ARM, CS_MODE_THUMB, CS_OPT_X86_INTEL, CS_MODE_16, CS_MODE_32, CS_MODE_64, CS_OPT_X86_ATT, CS_MODE_BIG_ENDIAN
+from capstone import cs, cs_disasm_quick, CS_ARCH_ARM, CS_ARCH_ARM64, CS_ARCH_MIPS, CS_ARCH_X86, CS_MODE_LITTLE_ENDIAN, CS_MODE_ARM, CS_MODE_THUMB, CS_OPT_SYNTAX, CS_OPT_SYNTAX_INTEL, CS_MODE_16, CS_MODE_32, CS_MODE_64, CS_OPT_SYNTAX_ATT, CS_MODE_BIG_ENDIAN
diff --git a/bindings/python/capstone/__init__.py b/bindings/python/capstone/__init__.py
index 84aedd6..56cfaa4 100644
--- a/bindings/python/capstone/__init__.py
+++ b/bindings/python/capstone/__init__.py
@@ -1 +1 @@
-from capstone import cs, cs_disasm_quick, cs_version, CS_ARCH_ARM, CS_ARCH_ARM64, CS_ARCH_MIPS, CS_ARCH_X86, CS_MODE_LITTLE_ENDIAN, CS_MODE_ARM, CS_MODE_THUMB, CS_OPT_X86_INTEL, CS_MODE_16, CS_MODE_32, CS_MODE_64, CS_OPT_X86_ATT, CS_MODE_BIG_ENDIAN, CS_MODE_MICRO, CS_MODE_N64
+from capstone import cs, cs_disasm_quick, cs_version, CS_ARCH_ARM, CS_ARCH_ARM64, CS_ARCH_MIPS, CS_ARCH_X86, CS_MODE_LITTLE_ENDIAN, CS_MODE_ARM, CS_MODE_THUMB, CS_OPT_SYNTAX, CS_OPT_SYNTAX_INTEL, CS_MODE_16, CS_MODE_32, CS_MODE_64, CS_OPT_SYNTAX_ATT, CS_MODE_BIG_ENDIAN, CS_MODE_MICRO, CS_MODE_N64
diff --git a/bindings/python/capstone/capstone.py b/bindings/python/capstone/capstone.py
index 7f67903..5baf3de 100644
--- a/bindings/python/capstone/capstone.py
+++ b/bindings/python/capstone/capstone.py
@@ -22,8 +22,9 @@
'CS_MODE_MICRO',
'CS_MODE_N64',
- 'CS_OPT_X86_INTEL',
- 'CS_OPT_X86_ATT',
+ 'CS_OPT_SYNTAX',
+ 'CS_OPT_SYNTAX_INTEL',
+ 'CS_OPT_SYNTAX_ATT',
'CS_ERR_OK',
'CS_ERR_MEM',
@@ -52,8 +53,11 @@
CS_MODE_BIG_ENDIAN = (1 << 31) # big-endian mode
# Capstone option type
-CS_OPT_X86_INTEL = 1 << 0 # Intel X86 asm syntax (CS_ARCH_X86 arch)
-CS_OPT_X86_ATT = 1 << 1 # ATT asm syntax (CS_ARCH_X86 arch)
+CS_OPT_SYNTAX = 1 # Intel X86 asm syntax (CS_ARCH_X86 arch)
+
+# Capstone option value
+CS_OPT_SYNTAX_INTEL = 1 # Intel X86 asm syntax (CS_ARCH_X86 arch)
+CS_OPT_SYNTAX_ATT = 2 # ATT asm syntax (CS_ARCH_X86 arch)
# Capstone error type
CS_ERR_OK = 0 # No error: everything was fine
@@ -153,7 +157,7 @@
_setup_prototype(_cs, "cs_op_index", ctypes.c_int, ctypes.c_size_t, ctypes.POINTER(_cs_insn), ctypes.c_uint, ctypes.c_uint)
_setup_prototype(_cs, "cs_version", None, ctypes.POINTER(ctypes.c_int), ctypes.POINTER(ctypes.c_int))
_setup_prototype(_cs, "cs_errno", ctypes.c_int, ctypes.c_size_t)
-_setup_prototype(_cs, "cs_option", ctypes.c_int, ctypes.c_size_t, ctypes.c_int)
+_setup_prototype(_cs, "cs_option", ctypes.c_int, ctypes.c_size_t, ctypes.c_int, ctypes.c_int)
def cs_version():
@@ -263,8 +267,8 @@
if self.csh:
_cs.cs_close(self.csh)
- def option(self, option):
- return _cs.cs_option(self.csh, option)
+ def option(self, opt_type, opt_value):
+ return _cs.cs_option(self.csh, opt_type, opt_value)
def disasm(self, code, offset, count = 0):
if self.csh is None:
diff --git a/bindings/python/test.py b/bindings/python/test.py
index 8ca8256..766619e 100755
--- a/bindings/python/test.py
+++ b/bindings/python/test.py
@@ -16,17 +16,17 @@
ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9"
all_tests = (
- (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", 0),
- (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32bit (ATT syntax)", CS_OPT_X86_ATT),
- (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", 0),
- (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", 0),
- (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE, "ARM", 0),
- (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "THUMB-2", 0),
- (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE2, "ARM: Cortex-A15 + NEON", 0),
- (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE, "THUMB", 0),
- (CS_ARCH_MIPS, CS_MODE_32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)", 0),
- (CS_ARCH_MIPS, CS_MODE_64+ CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0),
- (CS_ARCH_ARM64, CS_MODE_ARM, ARM64_CODE, "ARM-64", 0),
+ (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", 0, 0),
+ (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32bit (ATT syntax)", CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT),
+ (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", 0, 0),
+ (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", 0, 0),
+ (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE, "ARM", 0, 0),
+ (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "THUMB-2", 0, 0),
+ (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE2, "ARM: Cortex-A15 + NEON", 0, 0),
+ (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE, "THUMB", 0, 0),
+ (CS_ARCH_MIPS, CS_MODE_32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)", 0, 0),
+ (CS_ARCH_MIPS, CS_MODE_64+ CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0, 0),
+ (CS_ARCH_ARM64, CS_MODE_ARM, ARM64_CODE, "ARM-64", 0, 0),
)
@@ -48,7 +48,7 @@
### Test class cs
def test_class():
- for (arch, mode, code, comment, option) in all_tests:
+ for (arch, mode, code, comment, opt_type, opt_value) in all_tests:
print('*' * 16)
print("Platform: %s" %comment)
print("Code: %s" % to_hex(code))
@@ -57,8 +57,8 @@
try:
md = cs(arch, mode)
- if option != 0:
- md.option(option)
+ if opt_type != 0:
+ md.option(opt_type, opt_value)
all_ins = list(md.disasm(code, 0x1000))
for insn in all_ins:
diff --git a/bindings/python/test_detail.py b/bindings/python/test_detail.py
index c8c19f1..acb18e3 100755
--- a/bindings/python/test_detail.py
+++ b/bindings/python/test_detail.py
@@ -16,17 +16,17 @@
ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9"
all_tests = (
- (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", 0),
- (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32bit (ATT syntax)", CS_OPT_X86_ATT),
- (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", 0),
- (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", 0),
- (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE, "ARM", 0),
- (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE2, "ARM: Cortex-A15 + NEON", 0),
- (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE, "THUMB", 0),
- (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "THUMB-2", 0),
- (CS_ARCH_ARM64, CS_MODE_ARM, ARM64_CODE, "ARM-64", 0),
- (CS_ARCH_MIPS, CS_MODE_32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)", 0),
- (CS_ARCH_MIPS, CS_MODE_64+ CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0),
+ (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", 0, 0),
+ (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32bit (ATT syntax)", CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT),
+ (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", 0, 0),
+ (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", 0, 0),
+ (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE, "ARM", 0, 0),
+ (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE2, "ARM: Cortex-A15 + NEON", 0, 0),
+ (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE, "THUMB", 0, 0),
+ (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "THUMB-2", 0, 0),
+ (CS_ARCH_ARM64, CS_MODE_ARM, ARM64_CODE, "ARM-64", 0, 0),
+ (CS_ARCH_MIPS, CS_MODE_32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)", 0, 0),
+ (CS_ARCH_MIPS, CS_MODE_64+ CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0, 0),
)
@@ -52,15 +52,17 @@
print
- for (arch, mode, code, comment, option) in all_tests:
+ for (arch, mode, code, comment, opt_type, opt_value) in all_tests:
print('*' * 40)
print("Platform: %s" %comment)
print("Disasm:")
try:
md = cs(arch, mode)
- if option != 0:
- md.option(option)
+
+ if opt_type != 0:
+ md.option(opt_type, opt_value)
+
for insn in md.disasm(code, 0x1000):
print("0x%x:\t%s\t%s // insn-ID: %u, insn-mnem: %s" \
diff --git a/bindings/python/test_x86.py b/bindings/python/test_x86.py
index 29b749e..ed307e5 100755
--- a/bindings/python/test_x86.py
+++ b/bindings/python/test_x86.py
@@ -10,10 +10,10 @@
X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00\x05\x23\x01\x00\x00\x36\x8b\x84\x91\x23\x01\x00\x00\x41\x8d\x84\x39\x89\x67\x00\x00\x8d\x87\x89\x67\x00\x00\xb4\xc6"
all_tests = (
- (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", 0),
- (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (AT&T syntax)", CS_OPT_X86_ATT),
- (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", 0),
- (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", 0),
+ (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", 0, 0),
+ (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (AT&T syntax)", CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT),
+ (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", 0, 0),
+ (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", 0, 0),
)
def to_hex(s):
@@ -102,15 +102,16 @@
print("\t\t\toperands[%u].mem.disp: 0x%s" %(c, to_x(i.value.mem.disp)))
- for (arch, mode, code, comment, option) in all_tests:
+ for (arch, mode, code, comment, opt_type, opt_value) in all_tests:
print("*" * 16)
print("Platform: %s" %comment)
print("Code: %s" % to_hex(code))
print("Disasm:")
md = cs(arch, mode)
- if option != 0:
- md.option(option)
+
+ if opt_type != 0:
+ md.option(opt_type, opt_value)
last = None
for insn in md.disasm(code, 0x1000):
diff --git a/cs.c b/cs.c
index 039d2b8..a6e2ae2 100644
--- a/cs.c
+++ b/cs.c
@@ -210,10 +210,10 @@
switch(value) {
default:
break;
- case CS_OPT_V_INTEL:
+ case CS_OPT_SYNTAX_INTEL:
handle->printer = X86_Intel_printInst;
break;
- case CS_OPT_V_ATT:
+ case CS_OPT_SYNTAX_ATT:
handle->printer = X86_ATT_printInst;
break;
}
diff --git a/include/capstone.h b/include/capstone.h
index a4698dc..5c24d36 100644
--- a/include/capstone.h
+++ b/include/capstone.h
@@ -44,8 +44,8 @@
// Option value
typedef enum cs_opt_value {
- CS_OPT_V_INTEL = 1, // X86 Intel asm syntax (CS_OPT_SYNTAX)
- CS_OPT_V_ATT, // X86 ATT asm syntax (CS_OPT_SYNTAX)
+ CS_OPT_SYNTAX_INTEL = 1, // X86 Intel asm syntax (CS_OPT_SYNTAX)
+ CS_OPT_SYNTAX_ATT, // X86 ATT asm syntax (CS_OPT_SYNTAX)
} cs_opt_value;
diff --git a/tests/test.c b/tests/test.c
index 1953e30..721ce8f 100644
--- a/tests/test.c
+++ b/tests/test.c
@@ -61,7 +61,7 @@
.size = sizeof(X86_CODE32) - 1,
.comment = "X86 32bit (ATT syntax)",
.opt_type = CS_OPT_SYNTAX,
- .opt_value = CS_OPT_V_ATT,
+ .opt_value = CS_OPT_SYNTAX_ATT,
},
{
.arch = CS_ARCH_X86,
diff --git a/tests/test_detail.c b/tests/test_detail.c
index 12b2f00..3963db6 100644
--- a/tests/test_detail.c
+++ b/tests/test_detail.c
@@ -66,7 +66,7 @@
.size = sizeof(X86_CODE32) - 1,
.comment = "X86 32bit (ATT syntax)",
.opt_type = CS_OPT_SYNTAX,
- .opt_value = CS_OPT_V_ATT,
+ .opt_value = CS_OPT_SYNTAX_ATT,
},
{
.arch = CS_ARCH_X86,
diff --git a/tests/test_x86.c b/tests/test_x86.c
index eb0e0b2..e766248 100644
--- a/tests/test_x86.c
+++ b/tests/test_x86.c
@@ -138,7 +138,7 @@
.size = sizeof(X86_CODE32) - 1,
.comment = "X86 32 (AT&T syntax)",
.opt_type = CS_OPT_SYNTAX,
- .opt_value = CS_OPT_V_ATT,
+ .opt_value = CS_OPT_SYNTAX_ATT,
},
{
.arch = CS_ARCH_X86,