core: fix some warnings
diff --git a/arch/AArch64/AArch64Mapping.c b/arch/AArch64/AArch64Mapping.c
index bd06eaa..7517a5a 100644
--- a/arch/AArch64/AArch64Mapping.c
+++ b/arch/AArch64/AArch64Mapping.c
@@ -17012,6 +17012,8 @@
const char *AArch64_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
+ unsigned int i;
+
if (id >= ARM64_INS_MAX)
return NULL;
@@ -17019,7 +17021,6 @@
return insn_name_maps[id].name;
// then find alias insn
- int i;
for (i = 0; i < ARR_SIZE(alias_insn_name_maps); i++) {
if (alias_insn_name_maps[i].id == id)
return alias_insn_name_maps[i].name;
diff --git a/arch/ARM/ARMInstPrinter.c b/arch/ARM/ARMInstPrinter.c
index 9fc9639..fda3152 100644
--- a/arch/ARM/ARMInstPrinter.c
+++ b/arch/ARM/ARMInstPrinter.c
@@ -245,7 +245,7 @@
// check if this insn requests update flags
if (insn->detail->arm.update_flags == false) {
// some insn still update flags, regardless of tabgen info
- int i;
+ unsigned int i, j;
for (i = 0; i < ARR_SIZE(insn_update_flgs); i++) {
if (insn->id == insn_update_flgs[i].id &&
@@ -253,7 +253,6 @@
strlen(insn_update_flgs[i].name))) {
insn->detail->arm.update_flags = true;
// we have to update regs_write array as well
- int j;
for (j = 0; j < ARR_SIZE(insn->detail->regs_write); j++) {
if (insn->detail->regs_write[j] == 0) {
insn->detail->regs_write[j] = ARM_REG_CPSR;
diff --git a/arch/Mips/MipsMapping.c b/arch/Mips/MipsMapping.c
index baec86c..2d3af70 100644
--- a/arch/Mips/MipsMapping.c
+++ b/arch/Mips/MipsMapping.c
@@ -7872,7 +7872,7 @@
// given internal insn id, return public instruction info
void Mips_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
{
- int i;
+ unsigned int i;
// consider alias insn first
for (i = 0; i < ARR_SIZE(alias_insns); i++) {
@@ -8398,11 +8398,12 @@
const char *Mips_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
+ unsigned int i;
+
if (id >= MIPS_INS_MAX)
return NULL;
// handle special alias first
- int i;
for (i = 0; i < ARR_SIZE(alias_insn_names); i++) {
if (alias_insn_names[i].id == id)
return alias_insn_names[i].name;
@@ -8417,7 +8418,7 @@
mips_reg Mips_map_insn(const char *name)
{
// handle special alias first
- int i;
+ unsigned int i;
for (i = 0; i < ARR_SIZE(alias_insn_names); i++) {
if (!strcasecmp(alias_insn_names[i].name, name))
diff --git a/arch/PowerPC/PPCMapping.c b/arch/PowerPC/PPCMapping.c
index 47a873b..31aeab3 100644
--- a/arch/PowerPC/PPCMapping.c
+++ b/arch/PowerPC/PPCMapping.c
@@ -5159,11 +5159,12 @@
const char *PPC_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
+ unsigned int i;
+
if (id >= PPC_INS_MAX)
return NULL;
// handle special alias first
- int i;
for (i = 0; i < ARR_SIZE(alias_insn_names); i++) {
if (alias_insn_names[i].id == id)
return alias_insn_names[i].name;
diff --git a/arch/Sparc/SparcMapping.c b/arch/Sparc/SparcMapping.c
index 8e24f92..1e2113c 100644
--- a/arch/Sparc/SparcMapping.c
+++ b/arch/Sparc/SparcMapping.c
@@ -3122,11 +3122,12 @@
const char *Sparc_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
+ unsigned int i;
+
if (id >= SPARC_INS_MAX)
return NULL;
// handle special alias first
- int i;
for (i = 0; i < ARR_SIZE(alias_insn_names); i++) {
if (alias_insn_names[i].id == id)
return alias_insn_names[i].name;
diff --git a/arch/X86/X86Mapping.c b/arch/X86/X86Mapping.c
index 68bf0b6..fe49682 100644
--- a/arch/X86/X86Mapping.c
+++ b/arch/X86/X86Mapping.c
@@ -31988,7 +31988,7 @@
// this is to handle instructions embedding accumulate registers into AsmStrs[]
x86_reg X86_insn_reg(unsigned int id)
{
- int i;
+ unsigned int i;
for (i = 0; i < ARR_SIZE(insn_regs); i++) {
if (insn_regs[i].insn == id) {