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Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +08001/* Capstone Disassembler Engine */
2/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
3
4#include <stdio.h>
5#include <stdlib.h>
6#include <inttypes.h>
7
8#include <capstone.h>
9
10struct platform {
11 cs_arch arch;
12 cs_mode mode;
Nguyen Anh Quynhb42a6572013-11-29 17:40:07 +080013 unsigned char *code;
14 size_t size;
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +080015 char *comment;
Nguyen Anh Quynhb8ce68e2013-12-03 23:45:08 +080016 cs_opt_type opt_type;
17 cs_opt_value opt_value;
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +080018};
19
Mr. eXoDia9be1f932014-08-26 12:46:15 +020020static void print_string_hex(unsigned char *str, size_t len)
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +080021{
Nguyen Anh Quynhb42a6572013-11-29 17:40:07 +080022 unsigned char *c;
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +080023
24 printf("Code: ");
25 for (c = str; c < str + len; c++) {
26 printf("0x%02x ", *c & 0xff);
27 }
28 printf("\n");
29}
30
31static void test()
32{
33#define X86_CODE16 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
34#define X86_CODE32 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
Nguyen Anh Quynhb4ce3832013-12-06 08:06:21 +080035//#define X86_CODE32 "\x0f\xa7\xc0" // xstorerng
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +080036#define X86_CODE64 "\x55\x48\x8b\x05\xb8\x13\x00\x00"
37//#define ARM_CODE "\x04\xe0\x2d\xe5"
38#define ARM_CODE "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
39#define ARM_CODE2 "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3"
40#define THUMB_CODE "\x70\x47\xeb\x46\x83\xb0\xc9\x68"
41#define THUMB_CODE2 "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0"
42#define MIPS_CODE "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56"
43#define MIPS_CODE2 "\x56\x34\x21\x34\xc2\x17\x01\x00"
44//#define ARM64_CODE "\x00\x40\x21\x4b" // sub w0, w0, w1, uxtw
45//#define ARM64_CODE "\x21\x7c\x02\x9b" // mul x1, x1, x2
46//#define ARM64_CODE "\x20\x74\x0b\xd5" // dc zva, x0
47//#define ARM64_CODE "\xe1\x0b\x40\xb9" // ldr w1, [sp, #0x8]
48#define ARM64_CODE "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9"
Nguyen Anh Quynhf1d489b2014-01-05 00:00:05 +080049#define PPC_CODE "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21"
Nguyen Anh Quynh05e27132014-03-10 11:58:57 +080050#define SPARC_CODE "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03"
Nguyen Anh Quynhea9f4b12014-03-10 20:38:01 +080051#define SPARCV9_CODE "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0"
Nguyen Anh Quynhda1e8332014-03-23 11:12:07 +080052#define SYSZ_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78"
Nguyen Anh Quynhc80d8402014-05-26 23:02:48 +080053#define XCORE_CODE "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10"
Nguyen Anh Quynh42706a32014-05-09 07:33:35 +080054 struct platform {
55 cs_arch arch;
56 cs_mode mode;
57 unsigned char *code;
58 size_t size;
59 char *comment;
60 cs_opt_type opt_type;
61 cs_opt_value opt_value;
62 };
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +080063 struct platform platforms[] = {
64 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +010065 CS_ARCH_X86,
66 CS_MODE_16,
67 (unsigned char*)X86_CODE16,
68 sizeof(X86_CODE16) - 1,
69 "X86 16bit (Intel syntax)"
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +080070 },
71 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +010072 CS_ARCH_X86,
73 CS_MODE_32,
74 (unsigned char*)X86_CODE32,
75 sizeof(X86_CODE32) - 1,
76 "X86 32bit (ATT syntax)",
77 CS_OPT_SYNTAX,
78 CS_OPT_SYNTAX_ATT,
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +080079 },
80 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +010081 CS_ARCH_X86,
82 CS_MODE_32,
83 (unsigned char*)X86_CODE32,
84 sizeof(X86_CODE32) - 1,
85 "X86 32 (Intel syntax)"
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +080086 },
87 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +010088 CS_ARCH_X86,
89 CS_MODE_64,
90 (unsigned char*)X86_CODE64,
91 sizeof(X86_CODE64) - 1,
92 "X86 64 (Intel syntax)"
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +080093 },
94 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +010095 CS_ARCH_ARM,
96 CS_MODE_ARM,
97 (unsigned char*)ARM_CODE,
98 sizeof(ARM_CODE) - 1,
99 "ARM"
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800100 },
101 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100102 CS_ARCH_ARM,
103 CS_MODE_THUMB,
104 (unsigned char*)THUMB_CODE2,
105 sizeof(THUMB_CODE2) - 1,
106 "THUMB-2"
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800107 },
108 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100109 CS_ARCH_ARM,
110 CS_MODE_ARM,
111 (unsigned char*)ARM_CODE2,
112 sizeof(ARM_CODE2) - 1,
113 "ARM: Cortex-A15 + NEON"
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800114 },
115 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100116 CS_ARCH_ARM,
117 CS_MODE_THUMB,
118 (unsigned char*)THUMB_CODE,
119 sizeof(THUMB_CODE) - 1,
120 "THUMB"
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800121 },
122 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100123 CS_ARCH_MIPS,
124 (cs_mode)(CS_MODE_32 + CS_MODE_BIG_ENDIAN),
125 (unsigned char*)MIPS_CODE,
126 sizeof(MIPS_CODE) - 1,
127 "MIPS-32 (Big-endian)"
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800128 },
129 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100130 CS_ARCH_MIPS,
131 (cs_mode)(CS_MODE_64 + CS_MODE_LITTLE_ENDIAN),
132 (unsigned char*)MIPS_CODE2,
133 sizeof(MIPS_CODE2) - 1,
134 "MIPS-64-EL (Little-endian)"
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800135 },
136 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100137 CS_ARCH_ARM64,
138 CS_MODE_ARM,
139 (unsigned char*)ARM64_CODE,
140 sizeof(ARM64_CODE) - 1,
141 "ARM-64"
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800142 },
Nguyen Anh Quynh42c6b1a2013-12-30 00:15:25 +0800143 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100144 CS_ARCH_PPC,
145 CS_MODE_BIG_ENDIAN,
146 (unsigned char*)PPC_CODE,
147 sizeof(PPC_CODE) - 1,
Nguyen Anh Quynh42706a32014-05-09 07:33:35 +0800148 "PPC-64"
Nguyen Anh Quynh42c6b1a2013-12-30 00:15:25 +0800149 },
150 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100151 CS_ARCH_PPC,
152 CS_MODE_BIG_ENDIAN,
153 (unsigned char*)PPC_CODE,
154 sizeof(PPC_CODE) - 1,
Nguyen Anh Quynh42706a32014-05-09 07:33:35 +0800155 "PPC-64, print register with number only",
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100156 CS_OPT_SYNTAX,
157 CS_OPT_SYNTAX_NOREGNAME
Nguyen Anh Quynh42c6b1a2013-12-30 00:15:25 +0800158 },
Nguyen Anh Quynh05e27132014-03-10 11:58:57 +0800159 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100160 CS_ARCH_SPARC,
161 CS_MODE_BIG_ENDIAN,
162 (unsigned char*)SPARC_CODE,
163 sizeof(SPARC_CODE) - 1,
164 "Sparc"
Nguyen Anh Quynh05e27132014-03-10 11:58:57 +0800165 },
Nguyen Anh Quynhea9f4b12014-03-10 20:38:01 +0800166 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100167 CS_ARCH_SPARC,
168 (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9),
169 (unsigned char*)SPARCV9_CODE,
170 sizeof(SPARCV9_CODE) - 1,
171 "SparcV9"
Nguyen Anh Quynhea9f4b12014-03-10 20:38:01 +0800172 },
Nguyen Anh Quynh48a14ca2014-03-23 08:35:45 +0800173 {
Axel 0vercl0k Souchet779d4c72014-05-08 23:44:49 +0100174 CS_ARCH_SYSZ,
175 (cs_mode)0,
176 (unsigned char*)SYSZ_CODE,
177 sizeof(SYSZ_CODE) - 1,
178 "SystemZ"
Nguyen Anh Quynh48a14ca2014-03-23 08:35:45 +0800179 },
Nguyen Anh Quynhc80d8402014-05-26 23:02:48 +0800180 {
181 CS_ARCH_XCORE,
182 (cs_mode)0,
183 (unsigned char*)XCORE_CODE,
184 sizeof(XCORE_CODE) - 1,
185 "XCore"
186 },
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800187 };
188
189 csh handle;
Nguyen Anh Quynh5df9e4b2013-12-03 15:02:12 +0800190 uint64_t address = 0x1000;
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800191 cs_insn *insn;
192 int i;
Nguyen Anh Quynh5b556e52014-04-11 10:15:26 +0800193 size_t count;
Nguyen Anh Quynh655c7022014-04-11 12:15:33 +0800194 cs_err err;
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800195
196 for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) {
Nguyen Anh Quynh48a14ca2014-03-23 08:35:45 +0800197 printf("****************\n");
198 printf("Platform: %s\n", platforms[i].comment);
Nguyen Anh Quynh655c7022014-04-11 12:15:33 +0800199 err = cs_open(platforms[i].arch, platforms[i].mode, &handle);
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800200 if (err) {
201 printf("Failed on cs_open() with error returned: %u\n", err);
Nguyen Anh Quynh49146912014-02-22 16:54:44 +0800202 continue;
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800203 }
204
Nguyen Anh Quynhb8ce68e2013-12-03 23:45:08 +0800205 if (platforms[i].opt_type)
206 cs_option(handle, platforms[i].opt_type, platforms[i].opt_value);
Nguyen Anh Quynh01aba002013-12-03 21:00:09 +0800207
Nguyen Anh Quynh0beb0d42014-08-27 22:55:29 +0800208 count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn);
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800209 if (count) {
Nguyen Anh Quynh5b556e52014-04-11 10:15:26 +0800210 size_t j;
211
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800212 print_string_hex(platforms[i].code, platforms[i].size);
213 printf("Disasm:\n");
214
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800215 for (j = 0; j < count; j++) {
Nguyen Anh Quynh723687e2013-11-29 22:36:45 +0800216 printf("0x%"PRIx64":\t%s\t\t%s\n",
Nguyen Anh Quynh7b7b40c2013-12-03 12:24:06 +0800217 insn[j].address, insn[j].mnemonic, insn[j].op_str);
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800218 }
219
220 // print out the next offset, after the last insn
Nguyen Anh Quynh7b7b40c2013-12-03 12:24:06 +0800221 printf("0x%"PRIx64":\n", insn[j-1].address + insn[j-1].size);
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800222
Nguyen Anh Quynh0beb0d42014-08-27 22:55:29 +0800223 // free memory allocated by cs_disasm()
Nguyen Anh Quynh4fe224b2013-12-24 16:49:36 +0800224 cs_free(insn, count);
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800225 } else {
226 printf("****************\n");
227 printf("Platform: %s\n", platforms[i].comment);
228 print_string_hex(platforms[i].code, platforms[i].size);
229 printf("ERROR: Failed to disasm given code!\n");
230 }
231
232 printf("\n");
233
Nguyen Anh Quynh226d7dc2014-02-27 22:20:39 +0800234 cs_close(&handle);
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800235 }
236}
237
238int main()
239{
Nguyen Anh Quynh8f13f3c2013-12-04 22:57:04 +0800240 test();
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800241
242#if 0
Nguyen Anh Quynh42706a32014-05-09 07:33:35 +0800243#define offsetof(st, m) __builtin_offsetof(st, m)
Nguyen Anh Quynh723687e2013-11-29 22:36:45 +0800244
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800245 cs_insn insn;
246 printf("size: %lu\n", sizeof(insn));
Nguyen Anh Quynh8f13f3c2013-12-04 22:57:04 +0800247 printf("@id: %lu\n", offsetof(cs_insn, id));
248 printf("@address: %lu\n", offsetof(cs_insn, address));
249 printf("@size: %lu\n", offsetof(cs_insn, size));
250 printf("@bytes: %lu\n", offsetof(cs_insn, bytes));
251 printf("@mnemonic: %lu\n", offsetof(cs_insn, mnemonic));
252 printf("@op_str: %lu\n", offsetof(cs_insn, op_str));
253 printf("@regs_read: %lu\n", offsetof(cs_insn, regs_read));
254 printf("@regs_read_count: %lu\n", offsetof(cs_insn, regs_read_count));
255 printf("@regs_write: %lu\n", offsetof(cs_insn, regs_write));
256 printf("@regs_write_count: %lu\n", offsetof(cs_insn, regs_write_count));
257 printf("@groups: %lu\n", offsetof(cs_insn, groups));
258 printf("@groups_count: %lu\n", offsetof(cs_insn, groups_count));
259 printf("@arch: %lu\n", offsetof(cs_insn, x86));
Nguyen Anh Quynh26ee41a2013-11-27 12:11:31 +0800260#endif
261
262 return 0;
263}