Wolfgang Schwotzer | 22b4d0e | 2017-10-21 15:44:36 +0200 | [diff] [blame^] | 1 | #!/usr/bin/env python |
| 2 | |
| 3 | # Capstone Python bindings, by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> |
| 4 | |
| 5 | from __future__ import print_function |
| 6 | import sys |
| 7 | from capstone import * |
| 8 | from capstone.m680x import * |
| 9 | _python3 = sys.version_info.major == 3 |
| 10 | |
| 11 | |
| 12 | s_access = ( |
| 13 | "UNCHANGED", "READ", "WRITE", "READ | WRITE", |
| 14 | ) |
| 15 | |
| 16 | M6800_CODE = b"\x01\x09\x36\x64\x7f\x74\x10\x00\x90\x10\xA4\x10\xb6\x10\x00\x39" |
| 17 | |
| 18 | M6801_CODE = b"\x04\x05\x3c\x3d\x38\x93\x10\xec\x10\xed\x10\x39" |
| 19 | M6805_CODE = b"\x04\x7f\x00\x17\x22\x28\x00\x2e\x00\x40\x42\x5a\x70\x8e\x97\x9c\xa0\x15\xad\x00\xc3\x10\x00\xda\x12\x34\xe5\x7f\xfe" |
| 20 | M6808_CODE = b"\x31\x22\x00\x35\x22\x45\x10\x00\x4b\x00\x51\x10\x52\x5e\x22\x62\x65\x12\x34\x72\x84\x85\x86\x87\x8a\x8b\x8c\x94\x95\xa7\x10\xaf\x10\x9e\x60\x7f\x9e\x6b\x7f\x00\x9e\xd6\x10\x00\x9e\xe6\x7f" |
| 21 | HCS08_CODE = b"\x32\x10\x00\x9e\xae\x9e\xce\x7f\x9e\xbe\x10\x00\x9e\xfe\x7f\x3e\x10\x00\x9e\xf3\x7f\x96\x10\x00\x9e\xff\x7f\x82" |
| 22 | HD6301_CODE = b"\x6b\x10\x00\x71\x10\x00\x72\x10\x10\x39" |
| 23 | M6809_CODE = b"\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39\xA6\x07\xA6\x27\xA6\x47\xA6\x67\xA6\x0F\xA6\x10\xA6\x80\xA6\x81\xA6\x82\xA6\x83\xA6\x84\xA6\x85\xA6\x86\xA6\x88\x7F\xA6\x88\x80\xA6\x89\x7F\xFF\xA6\x89\x80\x00\xA6\x8B\xA6\x8C\x10\xA6\x8D\x10\x00\xA6\x91\xA6\x93\xA6\x94\xA6\x95\xA6\x96\xA6\x98\x7F\xA6\x98\x80\xA6\x99\x7F\xFF\xA6\x99\x80\x00\xA6\x9B\xA6\x9C\x10\xA6\x9D\x10\x00\xA6\x9F\x10\x00" |
| 24 | M6811_CODE = b"\x02\x03\x12\x7f\x10\x00\x13\x99\x08\x00\x14\x7f\x02\x15\x7f\x01\x1e\x7f\x20\x00\x8f\xcf\x18\x08\x18\x30\x18\x3c\x18\x67\x18\x8c\x10\x00\x18\x8f\x18\xce\x10\x00\x18\xff\x10\x00\x1a\xa3\x7f\x1a\xac\x1a\xee\x7f\x1a\xef\x7f\xcd\xac\x7f" |
| 25 | CPU12_CODE = b"\x00\x04\x01\x00\x0c\x00\x80\x0e\x00\x80\x00\x11\x1e\x10\x00\x80\x00\x3b\x4a\x10\x00\x04\x4b\x01\x04\x4f\x7f\x80\x00\x8f\x10\x00\xb7\x52\xb7\xb1\xa6\x67\xa6\xfe\xa6\xf7\x18\x02\xe2\x30\x39\xe2\x10\x00\x18\x0c\x30\x39\x10\x00\x18\x11\x18\x12\x10\x00\x18\x19\x00\x18\x1e\x00\x18\x3e\x18\x3f\x00" |
| 26 | HD6309_CODE = b"\x01\x10\x10\x62\x10\x10\x7b\x10\x10\x00\xcd\x49\x96\x02\xd2\x10\x30\x23\x10\x38\x10\x3b\x10\x53\x10\x5d\x11\x30\x43\x10\x11\x37\x25\x10\x11\x38\x12\x11\x39\x23\x11\x3b\x34\x11\x8e\x10\x00\x11\xaf\x10\x11\xab\x10\x11\xf6\x80\x00" |
| 27 | |
| 28 | all_tests = ( |
| 29 | (CS_ARCH_M680X, CS_MODE_M680X_6301, HD6301_CODE, "M680X_HD6301", None), |
| 30 | (CS_ARCH_M680X, CS_MODE_M680X_6309, HD6309_CODE, "M680X_HD6309", None), |
| 31 | (CS_ARCH_M680X, CS_MODE_M680X_6800, M6800_CODE, "M680X_M6800", None), |
| 32 | (CS_ARCH_M680X, CS_MODE_M680X_6801, M6801_CODE, "M680X_M6801", None), |
| 33 | (CS_ARCH_M680X, CS_MODE_M680X_6805, M6805_CODE, "M680X_M68HC05", None), |
| 34 | (CS_ARCH_M680X, CS_MODE_M680X_6808, M6808_CODE, "M680X_M68HC08", None), |
| 35 | (CS_ARCH_M680X, CS_MODE_M680X_6809, M6809_CODE, "M680X_M6809", None), |
| 36 | (CS_ARCH_M680X, CS_MODE_M680X_6811, M6811_CODE, "M680X_M68HC11", None), |
| 37 | (CS_ARCH_M680X, CS_MODE_M680X_CPU12, CPU12_CODE, "M680X_CPU12", None), |
| 38 | (CS_ARCH_M680X, CS_MODE_M680X_HCS08, HCS08_CODE, "M680X_HCS08", None), |
| 39 | ) |
| 40 | |
| 41 | # print hex dump from string all upper case |
| 42 | def to_hex_uc(string): |
| 43 | if _python3: |
| 44 | return " ".join("0x%02X" % c for c in string) |
| 45 | else: |
| 46 | return " ".join("0x%02X" % ord(c) for c in string) |
| 47 | |
| 48 | # print short hex dump from byte array all upper case |
| 49 | def to_hex_short_uc(byte_array): |
| 50 | return "".join("%02X" % b for b in byte_array) |
| 51 | |
| 52 | def print_insn_detail(insn): |
| 53 | # print address, mnemonic and operands |
| 54 | #print("0x%x:\t%s\t%s\t%s" % (insn.address, binascii.hexlify(bytearray(insn.bytes)), \ |
| 55 | print("0x%04X: %s\t%s\t%s" % (insn.address, to_hex_short_uc(insn.bytes), \ |
| 56 | insn.mnemonic, insn.op_str)) |
| 57 | |
| 58 | # "data" instruction generated by SKIPDATA option has no detail |
| 59 | if insn.id == 0: |
| 60 | return |
| 61 | |
| 62 | if len(insn.operands) > 0: |
| 63 | print("\top_count: %u" % len(insn.operands)) |
| 64 | c = 0 |
| 65 | for i in insn.operands: |
| 66 | if i.type == M680X_OP_REGISTER: |
| 67 | comment = ""; |
| 68 | if (((c == 0) and (insn.flags & M680X_FIRST_OP_IN_MNEM)) or |
| 69 | ((c == 1) and (insn.flags & M680X_SECOND_OP_IN_MNEM))): |
| 70 | comment = " (in mnemonic)"; |
| 71 | print("\t\toperands[%u].type: REGISTER = %s%s" % (c, |
| 72 | insn.reg_name(i.reg), comment)) |
| 73 | if i.type == M680X_OP_CONSTANT: |
| 74 | print("\t\toperands[%u].type: CONSTANT = %u" % (c, i.const_val)) |
| 75 | if i.type == M680X_OP_IMMEDIATE: |
| 76 | print("\t\toperands[%u].type: IMMEDIATE = #%d" % (c, i.imm)) |
| 77 | if i.type == M680X_OP_DIRECT: |
| 78 | print("\t\toperands[%u].type: DIRECT = 0x%02X" % (c, i.direct_addr)) |
| 79 | if i.type == M680X_OP_EXTENDED: |
| 80 | if i.ext.indirect: |
| 81 | indirect = "INDIRECT" |
| 82 | else: |
| 83 | indirect = "" |
| 84 | print("\t\toperands[%u].type: EXTENDED %s = 0x%04X" % (c, indirect, i.ext.address)) |
| 85 | if i.type == M680X_OP_RELATIVE: |
| 86 | print("\t\toperands[%u].type: RELATIVE = 0x%04X" % (c, i.rel.address)) |
| 87 | if i.type == M680X_OP_INDEXED: |
| 88 | if (i.idx.flags & M680X_IDX_INDIRECT): |
| 89 | indirect = " INDIRECT" |
| 90 | else: |
| 91 | indirect = "" |
| 92 | print("\t\toperands[%u].type: INDEXED%s" % (c, indirect)) |
| 93 | if i.idx.base_reg != M680X_REG_INVALID: |
| 94 | print("\t\t\tbase register: %s" % insn.reg_name(i.idx.base_reg)) |
| 95 | if i.idx.offset_reg != M680X_REG_INVALID: |
| 96 | print("\t\t\toffset register: %s" % insn.reg_name(i.idx.offset_reg)) |
| 97 | if (i.idx.offset_bits != 0) and (i.idx.offset_reg == M680X_REG_INVALID) and (i.idx.inc_dec == 0): |
| 98 | print("\t\t\toffset: %u" % i.idx.offset) |
| 99 | if i.idx.base_reg == M680X_REG_PC: |
| 100 | print("\t\t\toffset address: 0x%04X" % i.idx.offset_addr) |
| 101 | print("\t\t\toffset bits: %u" % i.idx.offset_bits) |
| 102 | if i.idx.inc_dec != 0: |
| 103 | if i.idx.flags & M680X_IDX_POST_INC_DEC: |
| 104 | s_post_pre = "post" |
| 105 | else: |
| 106 | s_post_pre = "pre" |
| 107 | if i.idx.inc_dec > 0: |
| 108 | s_inc_dec = "increment" |
| 109 | else: |
| 110 | s_inc_dec = "decrement" |
| 111 | print("\t\t\t%s %s: %d" % |
| 112 | (s_post_pre, s_inc_dec, abs(i.idx.inc_dec))) |
| 113 | if (i.size != 0): |
| 114 | print("\t\t\tsize: %d" % i.size) |
| 115 | if (i.access != CS_AC_INVALID): |
| 116 | print("\t\t\taccess: %s" % s_access[i.access]) |
| 117 | |
| 118 | c += 1 |
| 119 | |
| 120 | (regs_read, regs_write) = insn.regs_access() |
| 121 | |
| 122 | if len(regs_read) > 0: |
| 123 | print("\tRegisters read:", end="") |
| 124 | for r in regs_read: |
| 125 | print(" %s" %(insn.reg_name(r)), end="") |
| 126 | print("") |
| 127 | |
| 128 | if len(regs_write) > 0: |
| 129 | print("\tRegisters modified:", end="") |
| 130 | for r in regs_write: |
| 131 | print(" %s" %(insn.reg_name(r)), end="") |
| 132 | print("") |
| 133 | |
| 134 | if len(insn.groups) > 0: |
| 135 | print("\tgroups_count: %u" % len(insn.groups)) |
| 136 | |
| 137 | # ## Test class Cs |
| 138 | def test_class(): |
| 139 | |
| 140 | for (arch, mode, code, comment, syntax) in all_tests: |
| 141 | print("*" * 20) |
| 142 | print("Platform: %s" % comment) |
| 143 | print("Code: %s" % to_hex_uc(code)) |
| 144 | print("Disasm:") |
| 145 | |
| 146 | try: |
| 147 | md = Cs(arch, mode) |
| 148 | if syntax is not None: |
| 149 | md.syntax = syntax |
| 150 | md.detail = True |
| 151 | for insn in md.disasm(code, 0x1000): |
| 152 | print_insn_detail(insn) |
| 153 | print () |
| 154 | except CsError as e: |
| 155 | print("ERROR: %s" % e) |
| 156 | |
| 157 | |
| 158 | if __name__ == '__main__': |
| 159 | test_class() |