Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 1 | /* Capstone Disassembler Engine */ |
| 2 | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */ |
| 3 | |
| 4 | #include <stdio.h> // debug |
| 5 | #include <string.h> |
| 6 | #include <caml/mlvalues.h> |
| 7 | #include <caml/memory.h> |
| 8 | #include <caml/alloc.h> |
| 9 | #include <caml/fail.h> |
| 10 | |
| 11 | #include "../../include/capstone.h" |
| 12 | |
| 13 | #define ARR_SIZE(a) (sizeof(a)/sizeof(a[0])) |
| 14 | |
| 15 | // count the number of positive members in @oplist |
| 16 | #define ARCH_LIST_COUNT(_arch, _optype) \ |
| 17 | static unsigned int _arch ## _list_count(_optype *list, unsigned int max) \ |
| 18 | { \ |
| 19 | unsigned int i; \ |
| 20 | for(i = 0; i < max; i++) \ |
| 21 | if (list[i].type == 0) \ |
| 22 | return i; \ |
| 23 | return max; \ |
| 24 | } |
| 25 | |
| 26 | ARCH_LIST_COUNT(arm, cs_arm_op) |
| 27 | ARCH_LIST_COUNT(arm64, cs_arm64_op) |
| 28 | ARCH_LIST_COUNT(mips, cs_mips_op) |
| 29 | ARCH_LIST_COUNT(x86, cs_x86_op) |
| 30 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 31 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 32 | // count the number of positive members in @list |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 33 | static unsigned int list_count(uint8_t *list, unsigned int max) |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 34 | { |
| 35 | unsigned int i; |
| 36 | |
| 37 | for(i = 0; i < max; i++) |
| 38 | if (list[i] == 0) |
| 39 | return i; |
| 40 | |
| 41 | return max; |
| 42 | } |
| 43 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 44 | CAMLprim value _cs_disasm(cs_arch arch, csh handle, const uint8_t * code, size_t code_len, uint64_t addr, size_t count) |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 45 | { |
| 46 | CAMLparam0(); |
| 47 | CAMLlocal5(list, cons, rec_insn, array, tmp); |
| 48 | CAMLlocal4(arch_info, op_info_val, tmp2, tmp3); |
| 49 | cs_insn *insn; |
| 50 | |
| 51 | list = Val_emptylist; |
| 52 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 53 | size_t c = cs_disasm_ex(handle, code, code_len, addr, count, &insn); |
| 54 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 55 | if (c) { |
| 56 | //printf("Found %lu insn, addr: %lx\n", c, addr); |
| 57 | uint64_t j; |
| 58 | for (j = c; j > 0; j--) { |
| 59 | unsigned int lcount, i; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 60 | cons = caml_alloc(2, 0); |
| 61 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 62 | rec_insn = caml_alloc(13, 0); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 63 | Store_field(rec_insn, 0, Val_int(insn[j-1].id)); |
| 64 | Store_field(rec_insn, 1, Val_int(insn[j-1].address)); |
| 65 | Store_field(rec_insn, 2, Val_int(insn[j-1].size)); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 66 | |
| 67 | Store_field(rec_insn, 4, caml_copy_string(insn[j-1].mnemonic)); |
| 68 | Store_field(rec_insn, 5, caml_copy_string(insn[j-1].op_str)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 69 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 70 | // copy raw bytes of instruction |
| 71 | lcount = insn[j-1].size; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 72 | if (lcount) { |
| 73 | array = caml_alloc(lcount, 0); |
| 74 | for (i = 0; i < lcount; i++) { |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 75 | Store_field(array, i, Val_int(insn[j-1].bytes[i])); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 76 | } |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 77 | } else |
| 78 | array = Atom(0); // empty list |
| 79 | Store_field(rec_insn, 3, array); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 80 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 81 | |
| 82 | // copy read registers |
| 83 | lcount = (insn[j-1]).detail->regs_read_count; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 84 | if (lcount) { |
| 85 | array = caml_alloc(lcount, 0); |
| 86 | for (i = 0; i < lcount; i++) { |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 87 | Store_field(array, i, Val_int(insn[j-1].detail->regs_read[i])); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 88 | } |
| 89 | } else |
| 90 | array = Atom(0); // empty list |
| 91 | Store_field(rec_insn, 6, array); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 92 | Store_field(rec_insn, 7, Val_int(lcount)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 93 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 94 | lcount = (insn[j-1]).detail->regs_write_count; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 95 | if (lcount) { |
| 96 | array = caml_alloc(lcount, 0); |
| 97 | for (i = 0; i < lcount; i++) { |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 98 | Store_field(array, i, Val_int(insn[j-1].detail->regs_write[i])); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 99 | } |
| 100 | } else |
| 101 | array = Atom(0); // empty list |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 102 | Store_field(rec_insn, 8, array); |
| 103 | Store_field(rec_insn, 9, Val_int(lcount)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 104 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 105 | |
| 106 | lcount = (insn[j-1]).detail->groups_count; |
| 107 | if (lcount) { |
| 108 | array = caml_alloc(lcount, 0); |
| 109 | for (i = 0; i < lcount; i++) { |
| 110 | Store_field(array, i, Val_int(insn[j-1].detail->groups[i])); |
| 111 | } |
| 112 | } else |
| 113 | array = Atom(0); // empty list |
| 114 | Store_field(rec_insn, 10, array); |
| 115 | Store_field(rec_insn, 11, Val_int(lcount)); |
| 116 | |
| 117 | |
| 118 | |
| 119 | if(insn[j-1].detail) |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 120 | switch(arch) { |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 121 | case CS_ARCH_ARM: |
| 122 | arch_info = caml_alloc(1, 0); |
| 123 | |
| 124 | op_info_val = caml_alloc(5, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 125 | Store_field(op_info_val, 0, Val_int(insn[j-1].detail->arm.cc)); |
| 126 | Store_field(op_info_val, 1, Val_bool(insn[j-1].detail->arm.update_flags)); |
| 127 | Store_field(op_info_val, 2, Val_bool(insn[j-1].detail->arm.writeback)); |
| 128 | Store_field(op_info_val, 3, Val_int(insn[j-1].detail->arm.op_count)); |
| 129 | lcount = arm_list_count(insn[j - 1].detail->arm.operands, ARR_SIZE(insn[j - 1].detail->arm.operands)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 130 | if (lcount > 0) { |
| 131 | array = caml_alloc(lcount, 0); |
| 132 | for (i = 0; i < lcount; i++) { |
| 133 | tmp2 = caml_alloc(2, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 134 | switch(insn[j-1].detail->arm.operands[i].type) { |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 135 | case ARM_OP_REG: |
| 136 | tmp = caml_alloc(1, 1); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 137 | Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].reg)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 138 | break; |
| 139 | case ARM_OP_CIMM: |
| 140 | tmp = caml_alloc(1, 2); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 141 | Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 142 | break; |
| 143 | case ARM_OP_PIMM: |
| 144 | tmp = caml_alloc(1, 3); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 145 | Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 146 | break; |
| 147 | case ARM_OP_IMM: |
| 148 | tmp = caml_alloc(1, 4); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 149 | Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 150 | break; |
| 151 | case ARM_OP_FP: |
| 152 | tmp = caml_alloc(1, 5); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 153 | Store_field(tmp, 0, caml_copy_double(insn[j-1].detail->arm.operands[i].fp)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 154 | break; |
| 155 | case ARM_OP_MEM: |
| 156 | tmp = caml_alloc(1, 6); |
| 157 | tmp3 = caml_alloc(4, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 158 | Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm.operands[i].mem.base)); |
| 159 | Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm.operands[i].mem.index)); |
| 160 | Store_field(tmp3, 2, Val_int(insn[j-1].detail->arm.operands[i].mem.scale)); |
| 161 | Store_field(tmp3, 3, Val_int(insn[j-1].detail->arm.operands[i].mem.disp)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 162 | Store_field(tmp, 0, tmp3); |
| 163 | break; |
| 164 | default: break; |
| 165 | } |
| 166 | tmp3 = caml_alloc(2, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 167 | Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm.operands[i].shift.type)); |
| 168 | Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm.operands[i].shift.value)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 169 | Store_field(tmp2, 0, tmp3); |
| 170 | Store_field(tmp2, 1, tmp); |
| 171 | Store_field(array, i, tmp2); |
| 172 | } |
| 173 | } else // empty list |
| 174 | array = Atom(0); |
| 175 | |
| 176 | Store_field(op_info_val, 4, array); |
| 177 | |
| 178 | // finally, insert this into arch_info |
| 179 | Store_field(arch_info, 0, op_info_val); |
| 180 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 181 | Store_field(rec_insn, 12, arch_info); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 182 | |
| 183 | break; |
| 184 | case CS_ARCH_ARM64: |
| 185 | arch_info = caml_alloc(1, 1); |
| 186 | |
| 187 | op_info_val = caml_alloc(5, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 188 | Store_field(op_info_val, 0, Val_int(insn[j-1].detail->arm64.cc)); |
| 189 | Store_field(op_info_val, 1, Val_bool(insn[j-1].detail->arm64.update_flags)); |
| 190 | Store_field(op_info_val, 2, Val_bool(insn[j-1].detail->arm64.writeback)); |
| 191 | Store_field(op_info_val, 3, Val_int(insn[j-1].detail->arm64.op_count)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 192 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 193 | lcount = arm64_list_count(insn[j - 1].detail->arm64.operands, ARR_SIZE(insn[j - 1].detail->arm64.operands)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 194 | if (lcount > 0) { |
| 195 | array = caml_alloc(lcount, 0); |
| 196 | for (i = 0; i < lcount; i++) { |
| 197 | tmp2 = caml_alloc(3, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 198 | switch(insn[j-1].detail->arm64.operands[i].type) { |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 199 | case ARM64_OP_REG: |
| 200 | tmp = caml_alloc(1, 1); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 201 | Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].reg)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 202 | break; |
| 203 | case ARM64_OP_CIMM: |
| 204 | tmp = caml_alloc(1, 2); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 205 | Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].imm)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 206 | break; |
| 207 | case ARM64_OP_IMM: |
| 208 | tmp = caml_alloc(1, 3); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 209 | Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].imm)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 210 | break; |
| 211 | case ARM64_OP_FP: |
| 212 | tmp = caml_alloc(1, 4); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 213 | Store_field(tmp, 0, caml_copy_double(insn[j-1].detail->arm64.operands[i].fp)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 214 | break; |
| 215 | case ARM64_OP_MEM: |
| 216 | tmp = caml_alloc(1, 5); |
| 217 | tmp3 = caml_alloc(3, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 218 | Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm64.operands[i].mem.base)); |
| 219 | Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm64.operands[i].mem.index)); |
| 220 | Store_field(tmp3, 2, Val_int(insn[j-1].detail->arm64.operands[i].mem.disp)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 221 | Store_field(tmp, 0, tmp3); |
| 222 | break; |
| 223 | default: break; |
| 224 | } |
| 225 | tmp3 = caml_alloc(2, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 226 | Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm64.operands[i].shift.type)); |
| 227 | Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm64.operands[i].shift.value)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 228 | Store_field(tmp2, 0, tmp3); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 229 | Store_field(tmp2, 1, Val_int(insn[j-1].detail->arm64.operands[i].ext)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 230 | |
| 231 | Store_field(tmp2, 2, tmp); |
| 232 | Store_field(array, i, tmp2); |
| 233 | } |
| 234 | } else // empty array |
| 235 | array = Atom(0); |
| 236 | |
| 237 | Store_field(op_info_val, 4, array); |
| 238 | |
| 239 | // finally, insert this into arch_info |
| 240 | Store_field(arch_info, 0, op_info_val); |
| 241 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 242 | Store_field(rec_insn, 12, arch_info); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 243 | |
| 244 | break; |
| 245 | case CS_ARCH_MIPS: |
| 246 | arch_info = caml_alloc(1, 2); |
| 247 | |
| 248 | op_info_val = caml_alloc(2, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 249 | Store_field(op_info_val, 0, Val_int(insn[j-1].detail->mips.op_count)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 250 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 251 | lcount = mips_list_count(insn[j - 1].detail->mips.operands, ARR_SIZE(insn[j - 1].detail->mips.operands)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 252 | if (lcount > 0) { |
| 253 | array = caml_alloc(lcount, 0); |
| 254 | for (i = 0; i < lcount; i++) { |
| 255 | tmp2 = caml_alloc(1, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 256 | switch(insn[j-1].detail->mips.operands[i].type) { |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 257 | case MIPS_OP_REG: |
| 258 | tmp = caml_alloc(1, 1); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 259 | Store_field(tmp, 0, Val_int(insn[j-1].detail->mips.operands[i].reg)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 260 | break; |
| 261 | case MIPS_OP_IMM: |
| 262 | tmp = caml_alloc(1, 2); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 263 | Store_field(tmp, 0, Val_int(insn[j-1].detail->mips.operands[i].imm)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 264 | break; |
| 265 | case MIPS_OP_MEM: |
| 266 | tmp = caml_alloc(1, 3); |
| 267 | tmp3 = caml_alloc(2, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 268 | Store_field(tmp3, 0, Val_int(insn[j-1].detail->mips.operands[i].mem.base)); |
| 269 | Store_field(tmp3, 1, Val_int(insn[j-1].detail->mips.operands[i].mem.disp)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 270 | Store_field(tmp, 0, tmp3); |
| 271 | break; |
| 272 | default: break; |
| 273 | } |
| 274 | Store_field(tmp2, 0, tmp); |
| 275 | Store_field(array, i, tmp2); |
| 276 | } |
| 277 | } else // empty array |
| 278 | array = Atom(0); |
| 279 | |
| 280 | Store_field(op_info_val, 1, array); |
| 281 | |
| 282 | // finally, insert this into arch_info |
| 283 | Store_field(arch_info, 0, op_info_val); |
| 284 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 285 | Store_field(rec_insn, 12, arch_info); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 286 | |
| 287 | break; |
Guillaume Jeanne | e002ac7 | 2014-06-30 15:46:04 +0200 | [diff] [blame^] | 288 | case CS_ARCH_PPC: |
| 289 | |
| 290 | arch_info = caml_alloc(1, 3); |
| 291 | |
| 292 | op_info_val = caml_alloc(5, 0); |
| 293 | |
| 294 | Store_field(op_info_val, 0, Val_int(insn[j-1].detail->ppc.bc)); |
| 295 | Store_field(op_info_val, 1, Val_int(insn[j-1].detail->ppc.bh)); |
| 296 | Store_field(op_info_val, 2, Val_bool(insn[j-1].detail->ppc.update_cr0)); |
| 297 | |
| 298 | lcount = insn[j-1].detail->ppc.op_count; |
| 299 | |
| 300 | Store_field(op_info_val, 3, Val_int(lcount)); |
| 301 | |
| 302 | if (lcount > 0) { |
| 303 | array = caml_alloc(lcount, 0); |
| 304 | for (i = 0; i < lcount; i++) { |
| 305 | tmp2 = caml_alloc(1, 0); |
| 306 | switch(insn[j-1].detail->ppc.operands[i].type) { |
| 307 | case PPC_OP_REG: |
| 308 | tmp = caml_alloc(1, 1); |
| 309 | Store_field(tmp, 0, Val_int(insn[j-1].detail->ppc.operands[i].reg)); |
| 310 | break; |
| 311 | case PPC_OP_IMM: |
| 312 | tmp = caml_alloc(1, 2); |
| 313 | Store_field(tmp, 0, Val_int(insn[j-1].detail->ppc.operands[i].imm)); |
| 314 | break; |
| 315 | case PPC_OP_MEM: |
| 316 | tmp = caml_alloc(1, 3); |
| 317 | tmp3 = caml_alloc(2, 0); |
| 318 | Store_field(tmp3, 0, Val_int(insn[j-1].detail->ppc.operands[i].mem.base)); |
| 319 | Store_field(tmp3, 1, Val_int(insn[j-1].detail->ppc.operands[i].mem.disp)); |
| 320 | Store_field(tmp, 0, tmp3); |
| 321 | break; |
| 322 | default: break; |
| 323 | } |
| 324 | Store_field(tmp2, 0, tmp); |
| 325 | Store_field(array, i, tmp2); |
| 326 | } |
| 327 | } else // empty array |
| 328 | array = Atom(0); |
| 329 | |
| 330 | Store_field(op_info_val, 4, array); |
| 331 | |
| 332 | // finally, insert this into arch_info |
| 333 | Store_field(arch_info, 0, op_info_val); |
| 334 | |
| 335 | Store_field(rec_insn, 12, arch_info); |
| 336 | |
| 337 | break; |
| 338 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 339 | case CS_ARCH_X86: |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 340 | |
Guillaume Jeanne | e002ac7 | 2014-06-30 15:46:04 +0200 | [diff] [blame^] | 341 | arch_info = caml_alloc(1, 4); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 342 | |
| 343 | op_info_val = caml_alloc(15, 0); |
| 344 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 345 | // fill prefix |
| 346 | lcount = list_count(insn[j-1].detail->x86.prefix, ARR_SIZE(insn[j-1].detail->x86.prefix)); |
| 347 | if(lcount) { |
| 348 | array = caml_alloc(lcount, 0); |
| 349 | for (i = 0; i < lcount; i++) { |
| 350 | Store_field(array, i, Val_int(insn[j-1].detail->x86.prefix[i])); |
| 351 | } |
| 352 | } else |
| 353 | array = Atom(0); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 354 | Store_field(op_info_val, 0, array); |
| 355 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 356 | Store_field(op_info_val, 1, Val_int(insn[j-1].detail->x86.segment)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 357 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 358 | // fill opcode |
| 359 | lcount = list_count(insn[j-1].detail->x86.opcode, ARR_SIZE(insn[j-1].detail->x86.opcode)); |
| 360 | if(lcount) { |
| 361 | array = caml_alloc(lcount, 0); |
| 362 | for (i = 0; i < lcount; i++) { |
| 363 | Store_field(array, i, Val_int(insn[j-1].detail->x86.opcode[i])); |
| 364 | } |
| 365 | } else |
| 366 | array = Atom(0); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 367 | Store_field(op_info_val, 2, array); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 368 | Store_field(op_info_val, 3, Val_int(insn[j-1].detail->x86.op_size)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 369 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 370 | Store_field(op_info_val, 4, Val_int(insn[j-1].detail->x86.addr_size)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 371 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 372 | Store_field(op_info_val, 5, Val_int(insn[j-1].detail->x86.disp_size)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 373 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 374 | Store_field(op_info_val, 6, Val_int(insn[j-1].detail->x86.imm_size)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 375 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 376 | Store_field(op_info_val, 7, Val_int(insn[j-1].detail->x86.modrm)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 377 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 378 | Store_field(op_info_val, 8, Val_int(insn[j-1].detail->x86.sib)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 379 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 380 | Store_field(op_info_val, 9, Val_int(insn[j-1].detail->x86.disp)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 381 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 382 | Store_field(op_info_val, 10, Val_int(insn[j-1].detail->x86.sib_index)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 383 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 384 | Store_field(op_info_val, 11, Val_int(insn[j-1].detail->x86.sib_scale)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 385 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 386 | Store_field(op_info_val, 12, Val_int(insn[j-1].detail->x86.sib_base)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 387 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 388 | Store_field(op_info_val, 13, Val_int(insn[j-1].detail->x86.op_count)); |
| 389 | lcount = x86_list_count(insn[j - 1].detail->x86.operands, ARR_SIZE(insn[j - 1].detail->x86.operands)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 390 | if (lcount > 0) { |
| 391 | array = caml_alloc(lcount, 0); |
| 392 | for (i = 0; i < lcount; i++) { |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 393 | switch(insn[j-1].detail->x86.operands[i].type) { |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 394 | case X86_OP_REG: |
| 395 | tmp = caml_alloc(1, 1); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 396 | Store_field(tmp, 0, Val_int(insn[j-1].detail->x86.operands[i].reg)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 397 | break; |
| 398 | case X86_OP_IMM: |
| 399 | tmp = caml_alloc(1, 2); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 400 | Store_field(tmp, 0, Val_int(insn[j-1].detail->x86.operands[i].imm)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 401 | break; |
| 402 | case X86_OP_FP: |
| 403 | tmp = caml_alloc(1, 3); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 404 | Store_field(tmp, 0, caml_copy_double(insn[j-1].detail->x86.operands[i].fp)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 405 | break; |
| 406 | case X86_OP_MEM: |
| 407 | tmp = caml_alloc(1, 4); |
| 408 | tmp2 = caml_alloc(4, 0); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 409 | Store_field(tmp2, 0, Val_int(insn[j-1].detail->x86.operands[i].mem.base)); |
| 410 | Store_field(tmp2, 1, Val_int(insn[j-1].detail->x86.operands[i].mem.index)); |
| 411 | Store_field(tmp2, 2, Val_int(insn[j-1].detail->x86.operands[i].mem.scale)); |
| 412 | Store_field(tmp2, 3, Val_int(insn[j-1].detail->x86.operands[i].mem.disp)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 413 | Store_field(tmp, 0, tmp2); |
| 414 | break; |
| 415 | default: |
| 416 | break; |
| 417 | } |
| 418 | Store_field(array, i, tmp); |
| 419 | } |
| 420 | } else |
| 421 | array = Atom(0); // empty array |
| 422 | |
| 423 | Store_field(op_info_val, 14, array); |
| 424 | |
| 425 | // finally, insert this into arch_info |
| 426 | Store_field(arch_info, 0, op_info_val); |
| 427 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 428 | Store_field(rec_insn, 12, arch_info); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 429 | break; |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 430 | |
| 431 | default: break; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 432 | } |
| 433 | |
| 434 | Store_field(cons, 0, rec_insn); // head |
| 435 | Store_field(cons, 1, list); // tail |
| 436 | list = cons; |
| 437 | } |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 438 | cs_free(insn, count); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 439 | } |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 440 | // do not free the handle here |
| 441 | //cs_close(&handle); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 442 | CAMLreturn(list); |
| 443 | } |
| 444 | |
| 445 | CAMLprim value ocaml_cs_disasm_quick(value _arch, value _mode, value _code, value _addr, value _count) |
| 446 | { |
| 447 | CAMLparam5(_arch, _mode, _code, _addr, _count); |
| 448 | CAMLlocal1(head); |
| 449 | csh handle; |
| 450 | cs_arch arch; |
| 451 | cs_mode mode = 0; |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 452 | const uint8_t *code; |
| 453 | uint64_t addr; |
| 454 | size_t count, code_len; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 455 | |
| 456 | switch (Int_val(_arch)) { |
| 457 | case 0: |
| 458 | arch = CS_ARCH_ARM; |
| 459 | break; |
| 460 | case 1: |
| 461 | arch = CS_ARCH_ARM64; |
| 462 | break; |
| 463 | case 2: |
| 464 | arch = CS_ARCH_MIPS; |
| 465 | break; |
| 466 | case 3: |
Guillaume Jeanne | e002ac7 | 2014-06-30 15:46:04 +0200 | [diff] [blame^] | 467 | arch = CS_ARCH_PPC; |
| 468 | break; |
| 469 | case 4: |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 470 | arch = CS_ARCH_X86; |
| 471 | break; |
| 472 | default: |
| 473 | caml_invalid_argument("Error message"); |
| 474 | return Val_emptylist; |
| 475 | } |
| 476 | |
| 477 | while (_mode != Val_emptylist) { |
| 478 | head = Field(_mode, 0); /* accessing the head */ |
| 479 | switch (Int_val(head)) { |
| 480 | case 0: |
| 481 | mode |= CS_MODE_LITTLE_ENDIAN; |
| 482 | break; |
| 483 | case 1: |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 484 | mode |= CS_OPT_SYNTAX_INTEL; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 485 | break; |
| 486 | case 2: |
| 487 | mode |= CS_MODE_ARM; |
| 488 | break; |
| 489 | case 3: |
| 490 | mode |= CS_MODE_16; |
| 491 | break; |
| 492 | case 4: |
| 493 | mode |= CS_MODE_32; |
| 494 | break; |
| 495 | case 5: |
| 496 | mode |= CS_MODE_64; |
| 497 | break; |
| 498 | case 6: |
| 499 | mode |= CS_MODE_THUMB; |
| 500 | break; |
| 501 | case 7: |
| 502 | mode |= CS_MODE_MICRO; |
| 503 | break; |
| 504 | case 8: |
| 505 | mode |= CS_MODE_N64; |
| 506 | break; |
| 507 | case 9: |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 508 | mode |= CS_OPT_SYNTAX_ATT; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 509 | break; |
| 510 | case 10: |
| 511 | mode |= CS_MODE_BIG_ENDIAN; |
| 512 | break; |
| 513 | default: |
| 514 | caml_invalid_argument("Error message"); |
| 515 | return Val_emptylist; |
| 516 | } |
| 517 | _mode = Field(_mode, 1); /* point to the tail for next loop */ |
| 518 | } |
| 519 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 520 | //CS_ERR_OK = 0, // No error: everything was fine |
| 521 | if (cs_open(arch, mode, &handle) != 0) |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 522 | return Val_emptylist; |
| 523 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 524 | if (cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON) != 0) |
| 525 | CAMLreturn(Val_int(0)); |
| 526 | |
| 527 | code = (uint8_t *)String_val(_code); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 528 | code_len = caml_string_length(_code); |
| 529 | addr = Int64_val(_addr); |
| 530 | count = Int64_val(_count); |
| 531 | |
| 532 | CAMLreturn(_cs_disasm(arch, handle, code, code_len, addr, count)); |
| 533 | } |
| 534 | |
| 535 | CAMLprim value ocaml_cs_disasm_dyn(value _arch, value _handle, value _code, value _addr, value _count) |
| 536 | { |
| 537 | CAMLparam5(_arch, _handle, _code, _addr, _count); |
| 538 | csh handle; |
| 539 | cs_arch arch; |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 540 | const uint8_t *code; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 541 | uint64_t addr, count, code_len; |
| 542 | |
| 543 | handle = Int64_val(_handle); |
| 544 | |
| 545 | arch = Int_val(_arch); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 546 | code = (uint8_t *)String_val(_code); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 547 | code_len = caml_string_length(_code); |
| 548 | addr = Int64_val(_addr); |
| 549 | count = Int64_val(_count); |
| 550 | |
| 551 | CAMLreturn(_cs_disasm(arch, handle, code, code_len, addr, count)); |
| 552 | } |
| 553 | |
| 554 | CAMLprim value ocaml_cs_open(value _arch, value _mode) |
| 555 | { |
| 556 | CAMLparam2(_arch, _mode); |
| 557 | CAMLlocal2(list, head); |
| 558 | csh handle; |
| 559 | cs_arch arch; |
| 560 | cs_mode mode = 0; |
| 561 | |
| 562 | list = Val_emptylist; |
| 563 | |
| 564 | switch (Int_val(_arch)) { |
| 565 | case 0: |
| 566 | arch = CS_ARCH_ARM; |
| 567 | break; |
| 568 | case 1: |
| 569 | arch = CS_ARCH_ARM64; |
| 570 | break; |
| 571 | case 2: |
| 572 | arch = CS_ARCH_MIPS; |
| 573 | break; |
| 574 | case 3: |
Guillaume Jeanne | e002ac7 | 2014-06-30 15:46:04 +0200 | [diff] [blame^] | 575 | arch = CS_ARCH_PPC; |
| 576 | break; |
| 577 | case 4: |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 578 | arch = CS_ARCH_X86; |
| 579 | break; |
| 580 | default: |
| 581 | caml_invalid_argument("Error message"); |
| 582 | return Val_emptylist; |
| 583 | } |
| 584 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 585 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 586 | while (_mode != Val_emptylist) { |
| 587 | head = Field(_mode, 0); /* accessing the head */ |
| 588 | switch (Int_val(head)) { |
| 589 | case 0: |
| 590 | mode |= CS_MODE_LITTLE_ENDIAN; |
| 591 | break; |
| 592 | case 1: |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 593 | mode |= CS_OPT_SYNTAX_INTEL; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 594 | break; |
| 595 | case 2: |
| 596 | mode |= CS_MODE_ARM; |
| 597 | break; |
| 598 | case 3: |
| 599 | mode |= CS_MODE_16; |
| 600 | break; |
| 601 | case 4: |
| 602 | mode |= CS_MODE_32; |
| 603 | break; |
| 604 | case 5: |
| 605 | mode |= CS_MODE_64; |
| 606 | break; |
| 607 | case 6: |
| 608 | mode |= CS_MODE_THUMB; |
| 609 | break; |
| 610 | case 7: |
| 611 | mode |= CS_MODE_MICRO; |
| 612 | break; |
| 613 | case 8: |
| 614 | mode |= CS_MODE_N64; |
| 615 | break; |
| 616 | case 9: |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 617 | mode |= CS_OPT_SYNTAX_ATT; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 618 | break; |
| 619 | case 10: |
| 620 | mode |= CS_MODE_BIG_ENDIAN; |
| 621 | break; |
| 622 | default: |
| 623 | caml_invalid_argument("Error message"); |
| 624 | return Val_emptylist; |
| 625 | } |
| 626 | _mode = Field(_mode, 1); /* point to the tail for next loop */ |
| 627 | } |
| 628 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 629 | if (cs_open(arch, mode, &handle) != 0) |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 630 | CAMLreturn(Val_int(0)); |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 631 | |
| 632 | if (cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON) != 0) |
| 633 | CAMLreturn(Val_int(0)); |
| 634 | |
| 635 | CAMLlocal1(result); |
| 636 | result = caml_alloc(1, 0); |
| 637 | Store_field(result, 0, caml_copy_int64(handle)); |
| 638 | CAMLreturn(result); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 639 | } |
| 640 | |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 641 | CAMLprim value cs_register_name(value _handle, value _reg) |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 642 | { |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 643 | const char *name = cs_reg_name(Int64_val(_handle), Int_val(_reg)); |
| 644 | if(!name) { |
| 645 | caml_invalid_argument("invalid reg_id"); |
| 646 | name = "invalid"; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 647 | } |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 648 | return caml_copy_string(name); |
| 649 | } |
| 650 | |
| 651 | CAMLprim value cs_instruction_name(value _handle, value _insn) |
| 652 | { |
Guillaume Jeanne | cece24e | 2014-06-26 15:35:06 +0200 | [diff] [blame] | 653 | const char *name = cs_insn_name(Int64_val(_handle), Int_val(_insn)); |
| 654 | if(!name) { |
| 655 | caml_invalid_argument("invalid insn_id"); |
| 656 | name = "invalid"; |
| 657 | } |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 658 | return caml_copy_string(name); |
| 659 | } |