1. d06e2f5 arm: expose alias registers SB, SL, FP & IP. attn: bindings by Nguyen Anh Quynh · 11 years ago
  2. df3fb00 arm: add comments to arm.h for coprocessor register types by Nguyen Anh Quynh · 11 years ago
  3. 7957ed1 arm64: add some alias registers. attn: bindings by Nguyen Anh Quynh · 11 years ago
  4. 46a5afd add comment to clarify which information in cs_insn is available when CS_OPT_DETAIL = OFF by Nguyen Anh Quynh · 11 years ago
  5. 4994c58 bindings: support new 'detail' option for java & python by Nguyen Anh Quynh · 11 years ago
  6. 4d3e852 detail option: provide instruction id even when detail option is OFF by Nguyen Anh Quynh · 11 years ago
  7. a209e67 support to turn on/off building instruction details by Nguyen Anh Quynh · 11 years ago
  8. f0e4eed Use const on all read-only buffers by pancake · 11 years ago
  9. ad89d25 mips: optimize Mips_map_register() to O(1). suggested by Pancake by Nguyen Anh Quynh · 11 years ago
  10. 66f6c22 mips: fix NEGU alias instruction. bug reported by Pancake by Nguyen Anh Quynh · 11 years ago
  11. 36df4bb revert the cs_version() API by Nguyen Anh Quynh · 11 years ago
  12. bb64b0b more API version to capstone.h, and remove cs_version(). reset API back to 1.0 for public release by Nguyen Anh Quynh · 11 years ago
  13. bdaf3b5 x86: delete useless constant values assigned for instructions in x86.h by Nguyen Anh Quynh · 11 years ago
  14. 162409e mips: upgrade core engine by Nguyen Anh Quynh · 11 years ago
  15. 731bf2a arm64: update core engine by Nguyen Anh Quynh · 11 years ago
  16. 041e25d add CS_ERR_OPTION type. cs_option() returns this error code on invalid option by Nguyen Anh Quynh · 11 years ago
  17. a236902 fix CS_INSN_OFFSET: calculate offset based on the address of related instruction only by Nguyen Anh Quynh · 11 years ago
  18. a84d747 fix typo in CS_INSN_OFFSET by Nguyen Anh Quynh · 11 years ago
  19. bb54603 add CS_INSN_OFFSET macro, so we can easily calculate offset of one insn, given its position in its array by Nguyen Anh Quynh · 11 years ago
  20. 4d70daf note that Intel is default syntax by Nguyen Anh Quynh · 11 years ago
  21. a2f825f support comments in autogen files, so constant files are more friendly by Nguyen Anh Quynh · 11 years ago
  22. 79976c1 fix some comments in capstone.h by Nguyen Anh Quynh · 11 years ago
  23. 8f13f3c rename @hex_code to @bytes, and move it to next to @size by Nguyen Anh Quynh · 11 years ago
  24. c45b158 Merge branch 'master' of https://github.com/joxeankoret/capstone into hexcode by Nguyen Anh Quynh · 11 years ago
  25. 367a4df Partially reverted previous commit by Joxean · 11 years ago
  26. 114df0e Added @hex_code member by Joxean · 11 years ago
  27. f8db76a arm64: correct value of ARM64_SFT_ROR by Nguyen Anh Quynh · 11 years ago
  28. ea5b79d move some alias registers around to after REG_MAX. this seems to fix some issues of clang, which struggles with enum that assign value from other enum by Nguyen Anh Quynh · 11 years ago
  29. b39ef0b arm: added some alias registers by Nguyen Anh Quynh · 11 years ago
  30. da8adad API cs_option(): @value now has size_t, so mapping opaque pointer is possible for future options by Nguyen Anh Quynh · 11 years ago
  31. c618db4 change option names for cs_option(), and update python binding accordingly to support new cs_option() by Nguyen Anh Quynh · 11 years ago
  32. b8ce68e change cs_option() API to be more flexible with option value by Nguyen Anh Quynh · 11 years ago
  33. 01aba00 add cs_option() API. move ATT & Intel syntax here, rather than having them as CS_MODE, which is wrong by Nguyen Anh Quynh · 11 years ago
  34. 612b5d2 consistently use same param name @address rather than @offset in all cs_disasm*() API by Nguyen Anh Quynh · 11 years ago
  35. f2a649e cs_insn.address also needs to be changed after the change on @offset of cs_disasm*() API by Nguyen Anh Quynh · 11 years ago
  36. 7d5f96d merge Radare's pull request on API change on @address of cs_disasm*() by Nguyen Anh Quynh · 11 years ago
  37. 029df20 add some comments referring to cs_errno() on failure of some APIs by Nguyen Anh Quynh · 11 years ago
  38. f35e2ad add @regs_read_count, @regs_write_count, @groups_count to @cs_insn. bump API to 1.4 by Nguyen Anh Quynh · 11 years ago
  39. c04f873 Use uint64_t instead of size_t for addresses by pancake · 11 years ago
  40. 3582bc1 arm64: ARM64_GRP_JUMP is in the wrong place. move it to its place and also clarify some GRP comments by Nguyen Anh Quynh · 11 years ago
  41. ec0ed8e semantics: add insn group JUMP, so now we can check if this insn is branching by Nguyen Anh Quynh · 11 years ago
  42. 173ed2b arm: upgrade core engine by Nguyen Anh Quynh · 11 years ago
  43. 270d8ae Merge branch 'master' into x86 by Nguyen Anh Quynh · 11 years ago
  44. 3640f3c clarify in capstone.h that no API accepts CS_ARCH_* as handle anymore by Nguyen Anh Quynh · 11 years ago
  45. 36d143b x86: update core engine by Nguyen Anh Quynh · 11 years ago
  46. 6b9b664 arm64: support more alias insn by Nguyen Anh Quynh · 11 years ago
  47. 6b7abe3 arm64: handle alias insn in a better way, and add support for MNEG. bug reported by Patroklos Argyroudis by Nguyen Anh Quynh · 11 years ago
  48. f1656de reduce the size of @operands for arm & arm64 by Nguyen Anh Quynh · 11 years ago
  49. 90acea3 fix arm64_op_mem & arm64_op_type structures: int32_t is enough for imm & disp by Nguyen Anh Quynh · 11 years ago
  50. b42a657 change cs_disasm() and cs_disasm_dyn() to be portable API. fix related code using these API by Nguyen Anh Quynh · 11 years ago
  51. 26ee41a initial import by Nguyen Anh Quynh · 11 years ago