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gerrit-public.fairphone.software / platform / external / capstone / 0b690387b36c262cc4c4e5540d94a1ff501bab16 / arch / X86
  1. 0b69038 x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change by Nguyen Anh Quynh · 10 years ago
  2. 48eb7a6 x86: INTO is invalid in 64bit mode. bug reported by Pancake & Ange Albertini by Nguyen Anh Quynh · 10 years ago
  3. 650f96c add new API cs_group_name() to return group name in string, given the group id by Nguyen Anh Quynh · 10 years ago
  4. bb8bbaa x86: test reg, [mem] -> test [mem], reg. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
  5. dbdb61a x86: regs_write[] of RDTSC & RDTSCP depend on @mode by Nguyen Anh Quynh · 10 years ago
  6. 9f6ed71 x86: add @rex to cs_x86 struct. updated python & java binding for this change by Nguyen Anh Quynh · 10 years ago
  7. 32e2c6c x86: address-size prefix should override RIP relative address in x64 mode. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
  8. af6db2a x86: handle RIP relative addressing in 64bit mode properly. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
  9. 7ef3700 x86: SHL reg, 1 has one too many operands. bug reported by Sean Heelan by Nguyen Anh Quynh · 10 years ago
  10. 1a66fec x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change by Nguyen Anh Quynh · 10 years ago
  11. 12e6e31 x86: rename zero_opmask of cs_x86_op to avx_zero_opmask by Nguyen Anh Quynh · 10 years ago
  12. 92a3d4c x86: add AVX's zero_opmask to cs_x86_op struct. updated Python & Java bindings for this change by Nguyen Anh Quynh · 10 years ago
  13. f1ec526 x86: provide size for X86_OP_IMM operand. thank Gabriel Quadros for some suggestions by Nguyen Anh Quynh · 10 years ago
  14. e1aba17 x86: fix all {cc} instructions to have correct instruction ID by Nguyen Anh Quynh · 10 years ago
  15. 4c5eabc x86: support SSE_CC & AVX_CC in cs_x86 struct. this also updates Python & Java bindings by Nguyen Anh Quynh · 10 years ago
  16. 0d71645 x86: add avx_bcast to cs_x86_op to support AVX512 instructions. this also updates Python & Java binding by Nguyen Anh Quynh · 10 years ago
  17. bb6440c x86: extend cs_x86.opcode to 4 bytes to contain EVEX opcode. this also updates Python binding following this interface change by Nguyen Anh Quynh · 10 years ago
  18. 15b746f x86: op_addReg() & op_addImm() only work when detail mode is ON by Nguyen Anh Quynh · 10 years ago
  19. c74ec28 x86: LEA for 16bit register should have pointer size of word, not dword. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
  20. 14ba46b x86: add segment to x86_op_mem struct. this fixes a bug in generating detail for instructions with segment override. bug reported by Sean Heelan. by Nguyen Anh Quynh · 10 years ago
  21. eb2f3fb x86: properly reset prefixPresent for prefix0/1 group by Nguyen Anh Quynh · 10 years ago
  22. 1e688d4 x86: do not use markup in AT&T syntax by Nguyen Anh Quynh · 10 years ago
  23. 44db3c3 x86: support CS_OPT_MODE for dynamically changing mode at run-time by Nguyen Anh Quynh · 10 years ago
  24. 1085073 x86: remove disp_size, imm_size, op_size. add size to each operand. thanks Gabriel Quadros for some nice ideas by Nguyen Anh Quynh · 10 years ago
  25. cae09bf replace offset_of with offsetof from stddef.h by Nguyen Anh Quynh · 10 years ago
  26. 9cf8811 x86: InternalInstruction@xAcquireRelease should be initialized to 0 (FALSE) by Nguyen Anh Quynh · 10 years ago
  27. 69582d7 initialize cs_insn.detail by properly zero-out right members for each arch by Nguyen Anh Quynh · 10 years ago
  28. 5329a6f directly update cs_insn from MCInst interface to avoid multiple memcpy() by Nguyen Anh Quynh · 10 years ago
  29. 8cae86c x86: copy prefix back after updating it in X86_lockrep() by Nguyen Anh Quynh · 10 years ago
  30. 22a5a76 x86: simplify byteReader_t by Nguyen Anh Quynh · 10 years ago
  31. 5474d87 x86: optimize struct InternalInstruction for memset(). this improve performance by around 4% by Nguyen Anh Quynh · 10 years ago
  32. 0ad226e x86: fix a conflict when merging -next to -optimize branch by Nguyen Anh Quynh · 10 years ago
  33. cf08138 x86: more simplification on managing MCOperand. this also fixes a bug in handling memory reference instructions by Nguyen Anh Quynh · 10 years ago
  34. 0e534bf x86: correct the related comment of the last commit by Nguyen Anh Quynh · 10 years ago
  35. 9417ad6 x86: printDstIdx() should only print segment in non-64bit mode. bug reported by Filipe Cabecinhas (@filcab) by Nguyen Anh Quynh · 10 years ago
  36. e70a043 x86: more simplification for better performance by Nguyen Anh Quynh · 10 years ago
  37. 937e483 x86: avoid malloc/free MCOperand with new API of MCInst: MCInst_addOperand0, MCInst_CreateReg0, MCInst_CreateImm0 by Nguyen Anh Quynh · 10 years ago
  38. a62b9a0 x86: use SStream_concat0() where possible to improve performance - for AT&T and X86_REDUCE by Nguyen Anh Quynh · 10 years ago
  39. 46b6693 x86: save prefixes to avoid expensive copying loop. based on idea of Dang Hoang Vu by Nguyen Anh Quynh · 10 years ago
  40. b76233c avoid using vsnprintf when possible for SStream_concat() to improve performance. based on the idea of Dang Hoang Vu. by Nguyen Anh Quynh · 10 years ago
  41. 368c45b x86 instruction groups: Add SYSEXIT and SYSRET to the X86_GRP_IRET group by Jay Oster · 10 years ago
  42. a19d3f0 Merge branch 'feature/x86-groups' of https://github.com/parasyte/capstone into test by Nguyen Anh Quynh · 10 years ago
  43. 6b00344 x86 instruction groups: Fix RET/IRET mapping. by Jay Oster · 10 years ago
  44. 0577bb7 x86: ATT syntax does not print word size pointer like Intel syntax by Nguyen Anh Quynh · 10 years ago
  45. 6f74ccc Add new x86 instruction groups by Jay Oster · 10 years ago
  46. b70e121 x86: FP instructions are only available when X86_REDUCE mode is off by Nguyen Anh Quynh · 10 years ago
  47. 0150f06 x86: fix a warning on Diet mode by Nguyen Anh Quynh · 10 years ago
  48. d69f9de x86: delete dead code by Nguyen Anh Quynh · 10 years ago
  49. f721e31 Disassembler -> Disassembly by Nguyen Anh Quynh · 10 years ago
  50. 8f50ba8 Merge branch 'next' into xcore by Nguyen Anh Quynh · 10 years ago
  51. 04f2ec6 cleanup redundant headers included by Nguyen Anh Quynh · 10 years ago
  52. 2cf9c52 x86: MOV64rr belongs to GRP_MODE64 group. bug reported by Jason Oster by Nguyen Anh Quynh · 10 years ago
  53. 4ebd062 x86: cleanup unused code by Nguyen Anh Quynh · 10 years ago
  54. fed098f x86: eliminate irrelevant prefixes in x86.prefix[] - such as f2/f3 prefixed irrelevant instructions by Nguyen Anh Quynh · 10 years ago
  55. 1e93adf x86: add CL operand into details for 'SHL *, CL' instruction by Nguyen Anh Quynh · 10 years ago
  56. 7a65ad7 x86: detail operands for 'fstpnce st(0), st(0)' & 'fstpst(7), st(0)' by Nguyen Anh Quynh · 10 years ago
  57. b6e3f01 x86: handle REP MOVSD/CMPSD/SCASD/LODSD/STOSD properly (due to confused 128bit media instructions having the same mnemonics) by Nguyen Anh Quynh · 10 years ago
  58. 3a86d92 x86: correct instructions related to REP prefix by Nguyen Anh Quynh · 10 years ago
  59. 1d6f7ee x86: prefix REP/REPNE are only relevant for MOVS/CMPS/SCAS/LDOS/STOS/INS/OUTS instructions by Nguyen Anh Quynh · 10 years ago
  60. 6456481 x86: add immediate operand (1) for SHL/SHR/ROR/ROL/SAR/SAL in detail mode & Intel syntax by Nguyen Anh Quynh · 10 years ago
  61. f338657 x86: set syntax variable when changing syntax with cs_option() by Nguyen Anh Quynh · 10 years ago
  62. c5cad6c avoid using stdbool.h to support compilers without C99 support by Nguyen Anh Quynh · 10 years ago
  63. 7bab8dc x86: AT&T syntax is irrelevant in Diet mode, so setting this syntax should return CS_ERR_DIET error by Nguyen Anh Quynh · 10 years ago
  64. f785026 x86: enable AT&T code only when DIET mode is off by Nguyen Anh Quynh · 10 years ago
  65. 0ffd811 merge next branch by Nguyen Anh Quynh · 10 years ago
  66. 5068908 x86: assembly syntax is irrelevant in Diet mode. this optimization reduces library size to only 180KB on OSX by Nguyen Anh Quynh · 10 years ago
  67. 8598a21 enable arch code from source with CAPSTONE_HAS_* for MSVC to pick up by Nguyen Anh Quynh · 10 years ago
  68. eb2e840 x86: fix C89 issues for X86GenAsmWriter1_reduce.inc & X86GenAsmWriter_reduce.inc by Nguyen Anh Quynh · 10 years ago
  69. 638835a fix some warnings reported by MSVC by Nguyen Anh Quynh · 10 years ago
  70. bb0744d do not initialize some local vars unnecessarily. this problem was introduced when we fixed C89 issues for MSVC by Nguyen Anh Quynh · 10 years ago
  71. 2d34251 x86: handle 16bit segment bound for JMP. bug reported by Pancake & Anton Kochkov by Nguyen Anh Quynh · 10 years ago
  72. 42706a3 indentation with tab by Nguyen Anh Quynh · 10 years ago
  73. 779d4c7 first changes to get a successfully compiled version of capstone on VS2012 by Axel 0vercl0k Souchet · 10 years ago
  74. e68ee70 x86: simplify code handling LOCK/REP by remembering this prefix status when decoding it by Nguyen Anh Quynh · 10 years ago
  75. 16837f8 x86: MULPD instruction is unavailable in X86_REDUCE mode by Nguyen Anh Quynh · 10 years ago
  76. 288d6b3 x86: properly handle lock/rep prefixes when DIET option is enable by Nguyen Anh Quynh · 10 years ago
  77. 9bcca47 x86: avoid duplicating code when handling prefixes in X86_getInstruction() by Nguyen Anh Quynh · 10 years ago
  78. 45c77ae x86: handle tricky instructions related to MULPD at http://habrahabr.ru/company/intel/blog/200658/ by Nguyen Anh Quynh · 10 years ago
  79. 5c7f0c3 x86: REP & REPNE are mutually exclusive prefixes by Nguyen Anh Quynh · 10 years ago
  80. a5ffdc3 x86: properly handle LOCK/REP in the core, so remove buch of hacks by Nguyen Anh Quynh · 10 years ago
  81. e106f70 x86: only handle 3DNow instructions when X86_REDUCE mode is disable by Nguyen Anh Quynh · 10 years ago
  82. 13d8c6f x86: support 3DNow instructions by Nguyen Anh Quynh · 10 years ago
  83. 57e784b x86: cleanup unused opcode tables for X86_REDUCE by Nguyen Anh Quynh · 10 years ago
  84. ca057fa x86: identation by Nguyen Anh Quynh · 10 years ago
  85. 17874d0 x86: handle NOP instruction 0f18* by Nguyen Anh Quynh · 10 years ago
  86. 2c5e3e5 x86: allow 0x66 & 0x67 prefixes to be put anywhere in front of an instruction by Nguyen Anh Quynh · 10 years ago
  87. 2cff6f6 x86: handle instructions with LOCK/REP/REPNE prefix after other prefixes. bear with this until we have a better approach by Nguyen Anh Quynh · 10 years ago
  88. 1b4864a x86: fix comments on MOVcr, MOVdr, MOVrc, MOVrd by Nguyen Anh Quynh · 10 years ago
  89. e93179b x86: BOUND instruction uses dword & qword for boundary array, but not memory reference by Nguyen Anh Quynh · 10 years ago
  90. 7437a41 x86: minor fixes for comments on MOV32cr etc: this is related to 64bit code as well by Nguyen Anh Quynh · 10 years ago
  91. fe94c2b x86: BOUND opcode is reused by EVEX instruction set, so must be handled properly by Nguyen Anh Quynh · 10 years ago
  92. 96bda4f x86: MOV32cr & co. work for x64, not only x86. thank Joxean Koret for the help to verify this. by Nguyen Anh Quynh · 10 years ago
  93. 0902bf2 x86: handle MOV32cr, MOV32dr, MOV32rc, MOV32rd by Nguyen Anh Quynh · 10 years ago
  94. 2a9c0e0 x86: fix a bug when sign-extend immediate for Ev. backport from upstream LLVM by Nguyen Anh Quynh · 10 years ago
  95. fa69707 x86: handle more tricky instructions. by Nguyen Anh Quynh · 10 years ago
  96. 2ce7713 x86: support some tricky instructions by Nguyen Anh Quynh · 10 years ago
  97. 33e1636 x86: support 0x82 opcode for Arithmetic instructions by Nguyen Anh Quynh · 10 years ago
  98. 6f56ff5 x86: handle SAL instructions. bug reported by Attila Suszter & Ange Albertini by Nguyen Anh Quynh · 10 years ago
  99. 81a6df4 x86: temporarily revert a part of commit 2be9b8791a1bfd820abf526e41091da305481005 due to some broken output by Nguyen Anh Quynh · 10 years ago
  100. 7626808d Merge branch 'x86imm' into next by Nguyen Anh Quynh · 10 years ago