- 3973d8b Silencing Clang warning bys casting values by Félix Cloutier · 10 years ago
- 96ee76f Merge branch 'next' of https://github.com/radare/capstone into test2 by Nguyen Anh Quynh · 10 years ago
- e84d2cd x86: allow prefixes to be positioned anywhere. this should fix the bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
- 651e358 x86: update insn_ops[] by Nguyen Anh Quynh · 10 years ago
- 9c10ace Make pkg-config and source consistent with installation by pancake · 10 years ago
- e3bcbdb x86: REPNE can go with STOS/MOVS. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
- dfa396e x86: add the missing X86 instructions in X86_REDUCE mode in X86DisassemblerDecoder.c. bug reported by Julian Stecklina by Nguyen Anh Quynh · 10 years ago
- 4363911 x86: fix operand size for 'CALL PTR [REG]'. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
- 7ea921e x86: add work-in-progress mapping table on explicit operands access. this reused some code contributed by Vincent Bénony by Nguyen Anh Quynh · 10 years ago
- f601fdd Merge branch 'next' of https://github.com/aquynh/capstone into python by Michael Cohen · 10 years ago
- e95a766 x86: remove some instructions unsupported in 3.x version by Nguyen Anh Quynh · 10 years ago
- 25525fb x86: remove some instructions irrelevant for LOCK prefix in invalidPrefix() by Nguyen Anh Quynh · 10 years ago
- 08482e1 x86: remove some instructions irrelevant for LOCK prefix in invalidPrefix() by Nguyen Anh Quynh · 10 years ago
- 7de172d x86: properly handle REP, REPNE & REPNZ prefixes by Nguyen Anh Quynh · 10 years ago
- 29f41da x86: add more valid instructions for LOCK prefix by Andrew Wesie · 10 years ago
- 5323128 x86: check for invalid instructions with LOCK prefix by Nguyen Anh Quynh · 10 years ago
- a176ba4 x86: properly handle REP, REPNE & REPNZ prefixes by Nguyen Anh Quynh · 10 years ago
- 5de0947 x86: add more valid instructions for LOCK prefix by Andrew Wesie · 10 years ago
- beb3248 x86: check for invalid instructions with LOCK prefix by Nguyen Anh Quynh · 10 years ago
- 4539ba3 x86: support MOVSXD64rm with missing REX byte. bug reported by Aurélien Wailly by Nguyen Anh Quynh · 10 years ago
- 599b559 x86: fix some compilation issues about missing instructions on CAPSTONE_X86_REDUCE setup by Nguyen Anh Quynh · 10 years ago
- 3c27827 x86: handle 0x82 opcode for CAPSTONE_X86_REDUCE setup by Nguyen Anh Quynh · 10 years ago
- 3410b63 x86: handle 0x82 opcode. bug reported by Anton Kochkov by Nguyen Anh Quynh · 10 years ago
- c51e04f x86: support CR9-CR15 registers by Nguyen Anh Quynh · 10 years ago
- 0839077 x86: support CR9-CR15 registers by Nguyen Anh Quynh · 10 years ago
- 61ab007 x86: remove dead code & dead SSE_CC constants. issue reported by Coverity by Nguyen Anh Quynh · 10 years ago
- 1038fdb x86: add new registers DR8-DR15 by Nguyen Anh Quynh · 10 years ago
- 59c72af x86: add 3 new undocumented instructions fdisi8087_nop, feni8087_nop & ffreep by Nguyen Anh Quynh · 10 years ago
- 9f694cc x86: handle undocumented immediates for (v)cmpps/pd/ss/sd instructions by Nguyen Anh Quynh · 10 years ago
- d319c11 x86: more encodings for FXCH & FCOMP. also print LJUMP without * as prefix for Intel syntax. handle BOUND & FARCALL better by Nguyen Anh Quynh · 10 years ago
- 5f8c423 x86: add missing CR8-CR15 registers to arch/X86/X86DisassemblerDecoder.h by Nguyen Anh Quynh · 10 years ago
- 2ac7941 x86: handle REX properly for segment related instructions by ignoring REX.r entirely by Nguyen Anh Quynh · 10 years ago
- 80959c9 code style by Nguyen Anh Quynh · 10 years ago
- 0948114 x86: handle REX properly for x64 MMX related instructions by ignoring REX.b & REX.w entirely by Nguyen Anh Quynh · 10 years ago
- 5175423 x86: check instruction size <=15 as soon as possible by Nguyen Anh Quynh · 10 years ago
- 3539595 x86: instruction length must be <= 15 by Nguyen Anh Quynh · 10 years ago
- a3d689d x86: allow to mix REX & legacy prefix repeatedly in any order by Nguyen Anh Quynh · 10 years ago
- 10ecdae x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP by Nguyen Anh Quynh · 10 years ago
- 1016d32 x86: only eliminate REX prefixes if next byte is not a legacy prefix by Nguyen Anh Quynh · 10 years ago
- 1cbc222 x86: eliminate redundant REX prefixes in front of x86_64 instruction. bug reported by Aurélien Wailly by Nguyen Anh Quynh · 10 years ago
- c2925e9 x86: accept more than one REX prefix for x86_64. bug reported by Aurélien Wailly. thanks Ange Albertini for help by Nguyen Anh Quynh · 10 years ago
- 03fb6f3 x86: MOV32sm should reference word rather than dword. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
- 1befd75 x86: reverse the order of operands for alias instruction IMUL in Intel syntax. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
- 9578185 x86: add missing operands in detail mode for 'IN/OUT reg, reg' instructions. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
- 2ce4da3 x86: fix the last bug on PUSH/POP <segment> for ATT syntax by Nguyen Anh Quynh · 10 years ago
- b32515d x86: add missing operands in detail mode for PUSH/POP <segment> instructions. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
- 5b981a4 x86: also fix AT&T syntax for the last MOV32ms bug by Nguyen Anh Quynh · 10 years ago
- ba31f26 x86: MOV32ms should reference word rather than dword. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
- 4f99ed2 x86: more friendly disassembly for jmp16i (in the form segment:offset). issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
- 4e20e8e x86: 0x66 & 0x67 cannot be anywhere. this fixes CRC32 instruction by Nguyen Anh Quynh · 10 years ago
- 19c63bc x86: hacky temporarily fix for FEMMS instruction (3DNow). bug reported by Ben Nagy by Nguyen Anh Quynh · 10 years ago
- 9cc8787 x86: RET imm16 comes with positive number by Nguyen Anh Quynh · 10 years ago
- ff7bba3 x86: print out immediate as positive number for logic arithmetic operations: AND, OR, XOR. only works for x86 Intel syntax so far. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
- b87f855 x86: print negative number in memory reference address (more friendly). issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
- c2ea812 fix cs_group_name() after the change on generic group ids by Nguyen Anh Quynh · 10 years ago
- 85cfb18 x86: get rid of redundant X86_INS_LOCK/REP/RENE. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
- a90b047 x86: simplify printPCRelImm() in calculating absolute address. also fix the issue on AT&T syntax by Nguyen Anh Quynh · 10 years ago
- ea3c089 some simple optimizations for speed. this improves performance about 5% by Nguyen Anh Quynh · 10 years ago
- a92d2cb x86: properly calculate absolute addresses of relative CALL & JMP. thanks Pedro for valuable helps by Nguyen Anh Quynh · 10 years ago
- c96f1b0 x86: fix Out-of-bounds read error in is16BitEquivalent(). issue reported by Coverity by Nguyen Anh Quynh · 10 years ago
- d7e42b7 rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly by Nguyen Anh Quynh · 10 years ago
- a4da895 x86: relative CALL should print out absolute addresses. bug reported by @acez by Nguyen Anh Quynh · 10 years ago
- ced9d24 Workaround missing <inttypes.h> on MSVC 2010 by Yegor Derevenets · 10 years ago
- 41de05c x86: correct x86_16_bit_eq_tbl[] & x86_16_bit_eq_lookup[]. idea & code provided by @obs1dium by Nguyen Anh Quynh · 10 years ago
- 72bbcac x86: temporarily solve conflicts caused by the last merge by Nguyen Anh Quynh · 10 years ago
- 1f196d1 x86: CALLpcrel32 should be outputed as 'callq' in 64bit mode in AT&T syntax. ported from upstream by Nguyen Anh Quynh · 10 years ago
- 9728200 x86: cpuid, xsetbv, xgetbv involve 32bit registers, not 64bit registers. by Nguyen Anh Quynh · 10 years ago
- 934e180 x86: more update to the core by Nguyen Anh Quynh · 10 years ago
- c44aced x86: properly zero-out x86.operands[] by Nguyen Anh Quynh · 10 years ago
- 14b684e last commit missed a check by Nguyen Anh Quynh · 10 years ago
- b1e87e3 arm, mips, ppc, spac, x86: printAliasInstr() should handle \t (besides space) as separate char between mnemonic & operands by Nguyen Anh Quynh · 10 years ago
- c286b34 Merge branch 'arm64' into v3 by Nguyen Anh Quynh · 10 years ago
- 0efef5d solve some conflicts when merging -next into -v3 by Nguyen Anh Quynh · 10 years ago
- ffb6b23 x86: add SMAP group for CLAC/STAC instructions by Nguyen Anh Quynh · 10 years ago
- 6638294 x86: return proper error if cs_option() enables AT&T syntax but AT&T support is opt-out at compile time by Nguyen Anh Quynh · 10 years ago
- a65e77b Merge branch 'no_att' of https://github.com/obs1dium/capstone into next by Nguyen Anh Quynh · 10 years ago
- 2725a3f X86GenInstrInfo size reduction by obs · 10 years ago
- b7e2ff4 x86.operands array wasn't fully cleared by obs · 10 years ago
- 86e8450 renamed CAPSTONE_NO_ATT to CAPSTONE_X86_ATT_DISABLE, added options to makefile, cmake, compile.txt by baguette · 10 years ago
- 4f412c4 Selectively disable AT&T syntax in non-diet mode to reduce library size by baguette · 10 years ago
- 0b69038 x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change by Nguyen Anh Quynh · 10 years ago
- 48eb7a6 x86: INTO is invalid in 64bit mode. bug reported by Pancake & Ange Albertini by Nguyen Anh Quynh · 10 years ago
- 650f96c add new API cs_group_name() to return group name in string, given the group id by Nguyen Anh Quynh · 10 years ago
- bb8bbaa x86: test reg, [mem] -> test [mem], reg. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
- dbdb61a x86: regs_write[] of RDTSC & RDTSCP depend on @mode by Nguyen Anh Quynh · 10 years ago
- 9f6ed71 x86: add @rex to cs_x86 struct. updated python & java binding for this change by Nguyen Anh Quynh · 10 years ago
- 32e2c6c x86: address-size prefix should override RIP relative address in x64 mode. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
- ed6b8c5 x86: address-size prefix should override RIP relative address in x64 mode. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
- 656ebc9 x86: handle RIP relative addressing in 64bit mode properly. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
- af6db2a x86: handle RIP relative addressing in 64bit mode properly. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
- 7ef3700 x86: SHL reg, 1 has one too many operands. bug reported by Sean Heelan by Nguyen Anh Quynh · 10 years ago
- 1a66fec x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change by Nguyen Anh Quynh · 10 years ago
- 12e6e31 x86: rename zero_opmask of cs_x86_op to avx_zero_opmask by Nguyen Anh Quynh · 10 years ago
- 92a3d4c x86: add AVX's zero_opmask to cs_x86_op struct. updated Python & Java bindings for this change by Nguyen Anh Quynh · 10 years ago
- f1ec526 x86: provide size for X86_OP_IMM operand. thank Gabriel Quadros for some suggestions by Nguyen Anh Quynh · 10 years ago
- e1aba17 x86: fix all {cc} instructions to have correct instruction ID by Nguyen Anh Quynh · 10 years ago
- 4c5eabc x86: support SSE_CC & AVX_CC in cs_x86 struct. this also updates Python & Java bindings by Nguyen Anh Quynh · 10 years ago
- 0d71645 x86: add avx_bcast to cs_x86_op to support AVX512 instructions. this also updates Python & Java binding by Nguyen Anh Quynh · 10 years ago
- bb6440c x86: extend cs_x86.opcode to 4 bytes to contain EVEX opcode. this also updates Python binding following this interface change by Nguyen Anh Quynh · 10 years ago
- 15b746f x86: op_addReg() & op_addImm() only work when detail mode is ON by Nguyen Anh Quynh · 10 years ago