- bb8bbaa x86: test reg, [mem] -> test [mem], reg. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
- 1a66fec x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change by Nguyen Anh Quynh · 10 years ago
- 92a3d4c x86: add AVX's zero_opmask to cs_x86_op struct. updated Python & Java bindings for this change by Nguyen Anh Quynh · 10 years ago
- 0d71645 x86: add avx_bcast to cs_x86_op to support AVX512 instructions. this also updates Python & Java binding by Nguyen Anh Quynh · 10 years ago
- c74ec28 x86: LEA for 16bit register should have pointer size of word, not dword. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
- 14ba46b x86: add segment to x86_op_mem struct. this fixes a bug in generating detail for instructions with segment override. bug reported by Sean Heelan. by Nguyen Anh Quynh · 10 years ago
- b76233c avoid using vsnprintf when possible for SStream_concat() to improve performance. based on the idea of Dang Hoang Vu. by Nguyen Anh Quynh · 10 years ago
- bb0744d do not initialize some local vars unnecessarily. this problem was introduced when we fixed C89 issues for MSVC by Nguyen Anh Quynh · 10 years ago
- 779d4c7 first changes to get a successfully compiled version of capstone on VS2012 by Axel 0vercl0k Souchet · 10 years ago
- 288d6b3 x86: properly handle lock/rep prefixes when DIET option is enable by Nguyen Anh Quynh · 10 years ago
- 45c77ae x86: handle tricky instructions related to MULPD at http://habrahabr.ru/company/intel/blog/200658/ by Nguyen Anh Quynh · 10 years ago
- a5ffdc3 x86: properly handle LOCK/REP in the core, so remove buch of hacks by Nguyen Anh Quynh · 10 years ago
- 17874d0 x86: handle NOP instruction 0f18* by Nguyen Anh Quynh · 10 years ago
- fa69707 x86: handle more tricky instructions. by Nguyen Anh Quynh · 10 years ago
- 2ce7713 x86: support some tricky instructions by Nguyen Anh Quynh · 10 years ago
- 33e1636 x86: support 0x82 opcode for Arithmetic instructions by Nguyen Anh Quynh · 10 years ago
- 6f56ff5 x86: handle SAL instructions. bug reported by Attila Suszter & Ange Albertini by Nguyen Anh Quynh · 10 years ago
- 143759d x86: update core by Nguyen Anh Quynh · 10 years ago
- fc83a43 add diet compile option (CAPSTONE_DIET option in config.mk). This reduces binary size by around 40% by Nguyen Anh Quynh · 10 years ago
- 27b9a96 x86: make printAliasInstr() return string, not id by Nguyen Anh Quynh · 10 years ago
- 005c514 x86: eliminate X86_get_insn_id2() by Nguyen Anh Quynh · 10 years ago
- 13f40d2 x86: upgrade core by Nguyen Anh Quynh · 10 years ago
- 9dfdae6 x86: add new instructions: FSETPM, SALC, GETSEC & INT1. bug reported by Pancake by Nguyen Anh Quynh · 10 years ago
- a9ffb44 replace strdup() with our cs_strdup(), which call cs_mem_malloc() internally by Nguyen Anh Quynh · 10 years ago
- e51e227 ppc & x86: add third dummy MRI argument to printInstruction() to make it consistent with other archs by Nguyen Anh Quynh · 10 years ago
- a8eb7a5 rename memory function pointer types to have cs_ prefix. also rename internal function pointers my_* to have cs_mem_ prefix - suggested by Pancake by Nguyen Anh Quynh · 11 years ago
- 24bf0d9 add new option CS_OPT_MEM for cs_option(): this enable user-defined dynamic memory management. idea proposed by Pancake by Nguyen Anh Quynh · 11 years ago
- 4d85f29 x86: properly output insb/insd instruction with the right mode. bug reported by Pancake by Nguyen Anh Quynh · 11 years ago
- 9c950c1 x86: fix all the shift rotate insns with 1 as immediate: shl, shr, sar, ror, rol. thus, removed the hack on this insns. by Nguyen Anh Quynh · 11 years ago
- b9b3d29 x86: print segment register in some insns with memory references. This fixes the bug reported by Edgar & Attila by Nguyen Anh Quynh · 11 years ago
- 36d143b x86: update core engine by Nguyen Anh Quynh · 11 years ago
- 26ee41a initial import by Nguyen Anh Quynh · 11 years ago