- 60d40cf x86: loope/loopne read EFLAGS. bug reported by Ruslan Kabatsayev by Nguyen Anh Quynh · 9 years ago
- b1c54fe x86: LOOP* instructions should read/write *CX registers. bug reported by Ruslan Kabatsayev by Nguyen Anh Quynh · 9 years ago
- 3dc31d2 x86: properly handle AL/AX/EAX operand of OUT instruction in AT&T syntax by Nguyen Anh Quynh · 9 years ago
- 5160e23 x86: multiple fixes for insns[] - reduced mode (X86Mapping.c) by Nguyen Anh Quynh · 9 years ago
- c0fa5b7 x86: multiple fixes for insns[] (X86Mapping.c) by Nguyen Anh Quynh · 9 years ago
- b2c9159 x86: REPNE can go with STOS/MOVS. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 9 years ago
- 7de172d x86: properly handle REP, REPNE & REPNZ prefixes by Nguyen Anh Quynh · 10 years ago
- d319c11 x86: more encodings for FXCH & FCOMP. also print LJUMP without * as prefix for Intel syntax. handle BOUND & FARCALL better by Nguyen Anh Quynh · 10 years ago
- 10ecdae x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP by Nguyen Anh Quynh · 10 years ago
- 9578185 x86: add missing operands in detail mode for 'IN/OUT reg, reg' instructions. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
- 2ce4da3 x86: fix the last bug on PUSH/POP <segment> for ATT syntax by Nguyen Anh Quynh · 10 years ago
- b32515d x86: add missing operands in detail mode for PUSH/POP <segment> instructions. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
- ff7bba3 x86: print out immediate as positive number for logic arithmetic operations: AND, OR, XOR. only works for x86 Intel syntax so far. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
- c2ea812 fix cs_group_name() after the change on generic group ids by Nguyen Anh Quynh · 10 years ago
- 85cfb18 x86: get rid of redundant X86_INS_LOCK/REP/RENE. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
- ea3c089 some simple optimizations for speed. this improves performance about 5% by Nguyen Anh Quynh · 10 years ago
- d7e42b7 rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly by Nguyen Anh Quynh · 10 years ago
- 9728200 x86: cpuid, xsetbv, xgetbv involve 32bit registers, not 64bit registers. by Nguyen Anh Quynh · 10 years ago
- 934e180 x86: more update to the core by Nguyen Anh Quynh · 10 years ago
- ffb6b23 x86: add SMAP group for CLAC/STAC instructions by Nguyen Anh Quynh · 10 years ago
- 0b69038 x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change by Nguyen Anh Quynh · 10 years ago
- 650f96c add new API cs_group_name() to return group name in string, given the group id by Nguyen Anh Quynh · 10 years ago
- dbdb61a x86: regs_write[] of RDTSC & RDTSCP depend on @mode by Nguyen Anh Quynh · 10 years ago
- 7ef3700 x86: SHL reg, 1 has one too many operands. bug reported by Sean Heelan by Nguyen Anh Quynh · 10 years ago
- 1a66fec x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change by Nguyen Anh Quynh · 10 years ago
- 12e6e31 x86: rename zero_opmask of cs_x86_op to avx_zero_opmask by Nguyen Anh Quynh · 10 years ago
- 92a3d4c x86: add AVX's zero_opmask to cs_x86_op struct. updated Python & Java bindings for this change by Nguyen Anh Quynh · 10 years ago
- e1aba17 x86: fix all {cc} instructions to have correct instruction ID by Nguyen Anh Quynh · 10 years ago
- 4c5eabc x86: support SSE_CC & AVX_CC in cs_x86 struct. this also updates Python & Java bindings by Nguyen Anh Quynh · 10 years ago
- 0d71645 x86: add avx_bcast to cs_x86_op to support AVX512 instructions. this also updates Python & Java binding by Nguyen Anh Quynh · 10 years ago
- 15b746f x86: op_addReg() & op_addImm() only work when detail mode is ON by Nguyen Anh Quynh · 10 years ago
- 14ba46b x86: add segment to x86_op_mem struct. this fixes a bug in generating detail for instructions with segment override. bug reported by Sean Heelan. by Nguyen Anh Quynh · 10 years ago
- 1085073 x86: remove disp_size, imm_size, op_size. add size to each operand. thanks Gabriel Quadros for some nice ideas by Nguyen Anh Quynh · 10 years ago
- 5329a6f directly update cs_insn from MCInst interface to avoid multiple memcpy() by Nguyen Anh Quynh · 10 years ago
- 8cae86c x86: copy prefix back after updating it in X86_lockrep() by Nguyen Anh Quynh · 10 years ago
- e70a043 x86: more simplification for better performance by Nguyen Anh Quynh · 10 years ago
- 368c45b x86 instruction groups: Add SYSEXIT and SYSRET to the X86_GRP_IRET group by Jay Oster · 10 years ago
- 6b00344 x86 instruction groups: Fix RET/IRET mapping. by Jay Oster · 10 years ago
- 6f74ccc Add new x86 instruction groups by Jay Oster · 10 years ago
- b70e121 x86: FP instructions are only available when X86_REDUCE mode is off by Nguyen Anh Quynh · 10 years ago
- 0150f06 x86: fix a warning on Diet mode by Nguyen Anh Quynh · 10 years ago
- d69f9de x86: delete dead code by Nguyen Anh Quynh · 10 years ago
- 8f50ba8 Merge branch 'next' into xcore by Nguyen Anh Quynh · 10 years ago
- 04f2ec6 cleanup redundant headers included by Nguyen Anh Quynh · 10 years ago
- 2cf9c52 x86: MOV64rr belongs to GRP_MODE64 group. bug reported by Jason Oster by Nguyen Anh Quynh · 10 years ago
- fed098f x86: eliminate irrelevant prefixes in x86.prefix[] - such as f2/f3 prefixed irrelevant instructions by Nguyen Anh Quynh · 10 years ago
- 1e93adf x86: add CL operand into details for 'SHL *, CL' instruction by Nguyen Anh Quynh · 10 years ago
- 7a65ad7 x86: detail operands for 'fstpnce st(0), st(0)' & 'fstpst(7), st(0)' by Nguyen Anh Quynh · 10 years ago
- b6e3f01 x86: handle REP MOVSD/CMPSD/SCASD/LODSD/STOSD properly (due to confused 128bit media instructions having the same mnemonics) by Nguyen Anh Quynh · 10 years ago
- 3a86d92 x86: correct instructions related to REP prefix by Nguyen Anh Quynh · 10 years ago
- 1d6f7ee x86: prefix REP/REPNE are only relevant for MOVS/CMPS/SCAS/LDOS/STOS/INS/OUTS instructions by Nguyen Anh Quynh · 10 years ago
- 6456481 x86: add immediate operand (1) for SHL/SHR/ROR/ROL/SAR/SAL in detail mode & Intel syntax by Nguyen Anh Quynh · 10 years ago
- 8598a21 enable arch code from source with CAPSTONE_HAS_* for MSVC to pick up by Nguyen Anh Quynh · 10 years ago
- e68ee70 x86: simplify code handling LOCK/REP by remembering this prefix status when decoding it by Nguyen Anh Quynh · 10 years ago
- 16837f8 x86: MULPD instruction is unavailable in X86_REDUCE mode by Nguyen Anh Quynh · 10 years ago
- 288d6b3 x86: properly handle lock/rep prefixes when DIET option is enable by Nguyen Anh Quynh · 10 years ago
- 45c77ae x86: handle tricky instructions related to MULPD at http://habrahabr.ru/company/intel/blog/200658/ by Nguyen Anh Quynh · 10 years ago
- a5ffdc3 x86: properly handle LOCK/REP in the core, so remove buch of hacks by Nguyen Anh Quynh · 10 years ago
- 17874d0 x86: handle NOP instruction 0f18* by Nguyen Anh Quynh · 10 years ago
- fa69707 x86: handle more tricky instructions. by Nguyen Anh Quynh · 10 years ago
- 2ce7713 x86: support some tricky instructions by Nguyen Anh Quynh · 10 years ago
- 33e1636 x86: support 0x82 opcode for Arithmetic instructions by Nguyen Anh Quynh · 10 years ago
- 6f56ff5 x86: handle SAL instructions. bug reported by Attila Suszter & Ange Albertini by Nguyen Anh Quynh · 10 years ago
- 7626808d Merge branch 'x86imm' into next by Nguyen Anh Quynh · 10 years ago
- 6d3d800 x86: do not print memory offset in negative form. bug reported by Le Dinh Long by Nguyen Anh Quynh · 10 years ago
- d325b1a x86: reduce mode support VMX/SVM instructions now by Nguyen Anh Quynh · 10 years ago
- 59b5489 x86: rename X86_COMPACT to X86_REDUCE. suggested by Pancake by Nguyen Anh Quynh · 10 years ago
- 9518148 add X86_COMPACT option. also add CS_SUPPORT_X86_COMPACT. made Python support this change by Nguyen Anh Quynh · 10 years ago
- f6c7cbc core: fix some warnings by Nguyen Anh Quynh · 10 years ago
- bc22b5b x86: handle rep/repne mulpd case by Nguyen Anh Quynh · 10 years ago
- 143759d x86: update core by Nguyen Anh Quynh · 10 years ago
- fc83a43 add diet compile option (CAPSTONE_DIET option in config.mk). This reduces binary size by around 40% by Nguyen Anh Quynh · 10 years ago
- 85cddef x86: optimize handling special instructions with accumulate registers by Nguyen Anh Quynh · 10 years ago
- 005c514 x86: eliminate X86_get_insn_id2() by Nguyen Anh Quynh · 10 years ago
- a86a127 Merge branch 'msvc0' into next1 by Nguyen Anh Quynh · 10 years ago
- 603f7ac x86: fix a warning on unused variable by kaka22 · 10 years ago
- d7c00fe x86: REP should have *CX registers as implicit registers read/written by Nguyen Anh Quynh · 10 years ago
- 13f40d2 x86: upgrade core by Nguyen Anh Quynh · 10 years ago
- 9389947 x86: fix a mem leaking issue in X86_insn_combine() by Nguyen Anh Quynh · 11 years ago
- a82a089 more more fixes on C coding style by Nguyen Anh Quynh · 11 years ago
- eaeee31 Merge branch 'msvc' into test by Nguyen Anh Quynh · 11 years ago
- 46018db Initial set of changes to support building with MSVC 2013. Right now there's a bunch fo assumptions in the .vcxproj file and some things are not as clean as they should be, but it does build a full build and works (at least the x86 side). The point of this initial checkpoint is to make sure that nothing breaks on the GCC side, that everyone is ok with the changes to the source (or if better fixes/typing can be done). by Alex Ionescu · 11 years ago
- c34959b x86: proper calculation for the trailing instruction in total cache. issue reported by Pancake by Nguyen Anh Quynh · 11 years ago
- c36ce95 x86: proper calculation for the trailing instruction in total cache. issue reported by Pancake by Nguyen Anh Quynh · 11 years ago
- 9a291bd x86: do not use non-standard strlcat & strlcpy by Nguyen Anh Quynh · 11 years ago
- b9ff3aa x86: do not use non-standard strlcat & strlcpy by Nguyen Anh Quynh · 11 years ago
- dc8c346 Merge branch 'prefix' into next by Nguyen Anh Quynh · 11 years ago
- 7772d85 x86: fix known issue with prefix by combining with previous prefix instruction. this is not perfect, but good enough for now by Nguyen Anh Quynh · 11 years ago
- 3732725 rename mapping.c, mapping.h, module.c to have arch prefix. suggested by Alex Ionescu by Nguyen Anh Quynh · 11 years ago[Renamed (99%) from arch/X86/mapping.c]
- f328f30 rename mapping.c, mapping.h, module.c to have arch prefix. suggested by Alex Ionescu by Nguyen Anh Quynh · 11 years ago
- 9dfdae6 x86: add new instructions: FSETPM, SALC, GETSEC & INT1. bug reported by Pancake by Nguyen Anh Quynh · 11 years ago
- 136e2df x86: some arithmetic instructions should not update accumulate registers by Nguyen Anh Quynh · 11 years ago
- 9c2d029 x86: few more SUB insn should not affect accumulate register by Nguyen Anh Quynh · 11 years ago
- 22800aa x86: some ADD & SUB insn should not affect accumulate registers. bug reported by Bleh by Nguyen Anh Quynh · 11 years ago
- 9fac512 no longer need to free insn_cache for each arch: simply do it from cs_close() by Nguyen Anh Quynh · 11 years ago
- 1acfd0b move insn_cache into cs_struct to gurantee thread-safe by Nguyen Anh Quynh · 11 years ago
- c740407 move internal memory management declarations from utils.h to cs_priv.h by Nguyen Anh Quynh · 11 years ago
- 24bf0d9 add new option CS_OPT_MEM for cs_option(): this enable user-defined dynamic memory management. idea proposed by Pancake by Nguyen Anh Quynh · 11 years ago
- ee143c8 fix a crashed bug in cs_close(): call destroy function before freeing handle's memory by Nguyen Anh Quynh · 11 years ago
- b265406 cache insns for fast lookup in mapping.c. based on the idea of Dang Hoang Vu by Nguyen Anh Quynh · 11 years ago