1. 611b0c5 code style by Nguyen Anh Quynh · 10 years ago
  2. dfde75c Merge branch 'out_of_mem_fix' of https://github.com/nedwill/capstone into next by Nguyen Anh Quynh · 10 years ago
  3. f1e4975 check malloc return value by Edward Williamson · 10 years ago
  4. 03a1836 arm64: set absolute (rather than relative) address B/BL. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
  5. c2925e9 x86: accept more than one REX prefix for x86_64. bug reported by Aurélien Wailly. thanks Ange Albertini for help by Nguyen Anh Quynh · 10 years ago
  6. 073a3dd package: update Brew formula (copied from Homebrew repo) by Nguyen Anh Quynh · 10 years ago
  7. 03fb6f3 x86: MOV32sm should reference word rather than dword. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
  8. 1befd75 x86: reverse the order of operands for alias instruction IMUL in Intel syntax. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
  9. 9578185 x86: add missing operands in detail mode for 'IN/OUT reg, reg' instructions. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
  10. 2ce4da3 x86: fix the last bug on PUSH/POP <segment> for ATT syntax by Nguyen Anh Quynh · 10 years ago
  11. b32515d x86: add missing operands in detail mode for PUSH/POP <segment> instructions. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
  12. 5b981a4 x86: also fix AT&T syntax for the last MOV32ms bug by Nguyen Anh Quynh · 10 years ago
  13. 344d5e2 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
  14. ba31f26 x86: MOV32ms should reference word rather than dword. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
  15. 3caf837 arm: alias LDR instruction with operands '[sp], 4' to POP. suggested by Pancake by Nguyen Anh Quynh · 10 years ago
  16. a2934a7 arm: print immediate op of MVN instruction in positive hexadecimal form. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
  17. 4e732c7 Populate PowerPC slwi/srwi instruction details with SH operand. by Peter Mackay · 10 years ago
  18. c00bc2e fix the left-over C89 issues introduced by Pedro by Nguyen Anh Quynh · 10 years ago
  19. 07532bd Merge branch 'master' of https://github.com/gdbinit/capstone into fix by Nguyen Anh Quynh · 10 years ago
  20. 68197d9 Make it C89 compatible. by reverser · 10 years ago
  21. 202da41 Fix compiler warnings about different sizes and sign. by reverser · 10 years ago
  22. 8ab0136 python: export generic operand types & groups by Nguyen Anh Quynh · 10 years ago
  23. b53a59a update ChangeLog for 3.0 by Nguyen Anh Quynh · 10 years ago
  24. 8122218 merge next branch by Nguyen Anh Quynh · 10 years ago
  25. 8946029 python: python2.6 does not understand sys.versionn_info.major by Nguyen Anh Quynh · 10 years ago
  26. 0ea529a java: add close() method to avoid some unknown crash caused by finallize() on Ubuntu 14.04. FIXME by Nguyen Anh Quynh · 10 years ago
  27. fadbddc update ChangeLog for 3.0 by Nguyen Anh Quynh · 10 years ago
  28. 22278ec mips & xcore: some safety guards to make sure printOperand() do not overflow Operands[] for some unknown reasons by Nguyen Anh Quynh · 10 years ago
  29. d83c8c7 suite: change CS_MODE_32 -> CS_MODE_MIPS32, CS_MODE_64 -> CS_MODE_MIPS64 for fuzz.py & benchmark.py by Nguyen Anh Quynh · 10 years ago
  30. faa925a fix bindings (python/java) and tests after the last change on the type of imm of cs_arm64_op by Nguyen Anh Quynh · 10 years ago
  31. 56128da arm64: for operand type IMM, value should have the type int64_t, not int32_t. all bindings should be fixed by Nguyen Anh Quynh · 10 years ago
  32. aa50c64 arm64: fix ADRP (relative offset). bug reported by @shadymallow by Nguyen Anh Quynh · 10 years ago
  33. 57a902d suite: add crc32 instruction to x86odd.py by Nguyen Anh Quynh · 10 years ago
  34. b008229 suite: add some tricky x86 code to x86odd.py by Nguyen Anh Quynh · 10 years ago
  35. bb77154 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
  36. 2328095 arm64: cleanup by Nguyen Anh Quynh · 10 years ago
  37. 736762d update COMPILE.TXT to add more bindings by Nguyen Anh Quynh · 10 years ago
  38. b0ee0c9 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
  39. f85f981 update COMPILE.TXT by Nguyen Anh Quynh · 10 years ago
  40. 02cafeb suite: update Mips modes of MC input to CS_MODE_MIPS32 & CS_MODE_MIPS64 by Nguyen Anh Quynh · 10 years ago
  41. ff9a574 ocaml: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 by Nguyen Anh Quynh · 10 years ago
  42. a7b06fd capstone.h: add comments on some hardware modes by Nguyen Anh Quynh · 10 years ago
  43. e01fdfb java: add comments on hardware modes by Nguyen Anh Quynh · 10 years ago
  44. 75c9b6a python: fix comments on hardware modes by Nguyen Anh Quynh · 10 years ago
  45. 26fd6b1 ocaml: typo (CS_MODE_32) in test_ppc.ml by Nguyen Anh Quynh · 10 years ago
  46. bf4723f java: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 by Nguyen Anh Quynh · 10 years ago
  47. 143a494 python: add CS_MODE_MIPS32/64 by Nguyen Anh Quynh · 10 years ago
  48. ec58a02 python: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 by Nguyen Anh Quynh · 10 years ago
  49. 952da90 suite: add missing tests to test_c.sh by Nguyen Anh Quynh · 10 years ago
  50. 84df600 tests: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 by Nguyen Anh Quynh · 10 years ago
  51. d3f0373 add CS_MODE_MIPS32 & CS_MODE_MIPS64. these modes are aliases of CS_MODE_32 & CS_MODE_64, so no old code is broken by Nguyen Anh Quynh · 10 years ago
  52. 7e75ca6 python: CS_MODE_MIPS32R6 is independent from CS_MODE_32 by Nguyen Anh Quynh · 10 years ago
  53. 0d97a3b mips: CS_MODE_MIPS32R6 is an independent mode, and should not combine with CS_MODE_32 by Nguyen Anh Quynh · 10 years ago
  54. cc60d10 mips: add comments on mips32 & mips64 to capstone.h by Nguyen Anh Quynh · 10 years ago
  55. 7dada4f Merge branch 'next' of https://github.com/wodz/capstone into mips by Nguyen Anh Quynh · 10 years ago
  56. 921a46c mips: Fix j/jal target address calculation by Marcin Bukat · 10 years ago
  57. c36e675 mips: refine getFeatureBits() to make it more clear what Mips features are supported by Nguyen Anh Quynh · 10 years ago
  58. 1ffc1b2 arm: fix printMemBOption() that was wrongly fixed in 51888c3e0824dfcc7571d84fda303a8504763e2d by Nguyen Anh Quynh · 10 years ago
  59. 6782cbf cython: support the newly added field mem_barrier in cs_arm by Nguyen Anh Quynh · 10 years ago
  60. 128124c python: typo on README by Nguyen Anh Quynh · 10 years ago
  61. 6f00a98 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
  62. 753f44a capstone.h: add comment for CS_ARCH_ALL by Nguyen Anh Quynh · 10 years ago
  63. 39785fb java: add CS_SUPPORT_X86_REDUCE by Nguyen Anh Quynh · 10 years ago
  64. bd85431 cython: add XCore to debug string by Nguyen Anh Quynh · 10 years ago
  65. 5db983d java: fix a wrong type for memBarrier in Arm.java by Nguyen Anh Quynh · 10 years ago
  66. 7b7d745 ocaml: properly handle newly added mode CS_MODE_V8 & PPC_OP_CRX in test_ppc.ml by Nguyen Anh Quynh · 10 years ago
  67. 9ba1906 python: test_ppc.py prints crx.scale & crx.cond as integers by Nguyen Anh Quynh · 10 years ago
  68. 51888c3 arm: fix some bugs reported by VS2010. thanks Axel for testing by Nguyen Anh Quynh · 10 years ago
  69. 0b3d95e java/ocaml/python: support the newly added mem_barrier field of cs_arm struct by Nguyen Anh Quynh · 10 years ago
  70. 8cdafda arm: add new field mem_barrier to cs_arm struct. this requires changes in bindings by Nguyen Anh Quynh · 10 years ago
  71. 2e40e69 arm: add sample code for ARM's CS_MODE_MCLASS & CS_MODE_V8 by Nguyen Anh Quynh · 10 years ago
  72. 83466d4 test: add sample code for ARM's CS_MODE_MCLASS & CS_MODE_V8 by Nguyen Anh Quynh · 10 years ago
  73. 435b913 suite: delete duplicate MC input in ppc64-encoding-bookIII.s.cs by Nguyen Anh Quynh · 10 years ago
  74. e07bc91 ppc: fix a stupid mistake on printing operands of MR instruction by Nguyen Anh Quynh · 10 years ago
  75. 4c36374 suite: normalize PPC's branch instructions having immediate operand by Nguyen Anh Quynh · 10 years ago
  76. 278e727 arm: print immediate in positive form for AND/ORR/EOR/BIC instructions by Nguyen Anh Quynh · 10 years ago
  77. d82b28a ppc: do not print a dot in front of absolute address. issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
  78. b6f4c1d sparc: add missing ICC/XCC registers in operands[] for some alias instructions. bug reported by @pancake by Nguyen Anh Quynh · 10 years ago
  79. 1caeee4 sparc: absolute address for Bxx instructions. issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
  80. e16813d sparc: get absolute address for CALL. issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
  81. 8e53890 ocaml/java: support CS_MODE_V8 for Arm by Nguyen Anh Quynh · 10 years ago
  82. 63ec7c5 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
  83. c942f22 arm: support new mode CS_MODE_V8 for Armv8 A32 encodings by Nguyen Anh Quynh · 10 years ago
  84. df7dde2 suite: update test_mc.py to better handle output of different formats of MC & CS by Nguyen Anh Quynh · 10 years ago
  85. 6999d22 suite: fix inputs in MC/ by Nguyen Anh Quynh · 10 years ago
  86. 2ac5d79 arm: print floating point number in %e format by Nguyen Anh Quynh · 10 years ago
  87. 6ee9518 arm64: print immediate in hexa for binary bitwise arith instructions: AND/ORR/EOR/TST by Nguyen Anh Quynh · 10 years ago
  88. 4f99ed2 x86: more friendly disassembly for jmp16i (in the form segment:offset). issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
  89. 6acaaa5 arm: printAddrMode5Operand() is wrong on calculating subtracted variable by Nguyen Anh Quynh · 10 years ago
  90. 4e17eef arm: lowercase for apsr_nzcv by Nguyen Anh Quynh · 10 years ago
  91. d865f39 arm: use lowercase for special registers by Nguyen Anh Quynh · 10 years ago
  92. 2593e22 arm: support V8 as a mode for A32 encodings by Nguyen Anh Quynh · 10 years ago
  93. 05bd294 mips: Mips64 does not go with Mips32R6. this fixes some 64bit instructions by Nguyen Anh Quynh · 10 years ago
  94. 4e20e8e x86: 0x66 & 0x67 cannot be anywhere. this fixes CRC32 instruction by Nguyen Anh Quynh · 10 years ago
  95. 248519e mips: properly handle Mips32R6 mode. bug reported by Jay Oster by Nguyen Anh Quynh · 10 years ago
  96. 0157ba1 arm64: add missing commas in SBFIZ/UBFIZ/SBFX/UBFX instructions by Nguyen Anh Quynh · 10 years ago
  97. d5e6341 suite: indentation for test_mc.py by Nguyen Anh Quynh · 10 years ago
  98. c109e8e arm64: print shifter in decimal mode. this is to be consistent with ARM engine by Nguyen Anh Quynh · 10 years ago
  99. 9025e92 suite: cleaning up test_mc.py by Nguyen Anh Quynh · 10 years ago
  100. 8ba7250 suite: add testsuite tool 'test_mc.sh' to compare output of Capstone & LLVM by Nguyen Anh Quynh · 10 years ago