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gerrit-public.fairphone.software / platform / external / capstone / 9f6ed7155a17cffa5e9d1988d2ef671bbfb2bbb1
  1. 9f6ed71 x86: add @rex to cs_x86 struct. updated python & java binding for this change by Nguyen Anh Quynh · 10 years ago
  2. 32e2c6c x86: address-size prefix should override RIP relative address in x64 mode. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
  3. af6db2a x86: handle RIP relative addressing in 64bit mode properly. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
  4. 7ef3700 x86: SHL reg, 1 has one too many operands. bug reported by Sean Heelan by Nguyen Anh Quynh · 10 years ago
  5. 7178cd0 Merge branch 'next' into opsize by Nguyen Anh Quynh · 10 years ago
  6. 078f833 update CREDITS.TXT by Nguyen Anh Quynh · 10 years ago
  7. 28b1f49 ocaml: update README by Nguyen Anh Quynh · 10 years ago
  8. a3676e3 update .gitignore for Ocaml binding by Nguyen Anh Quynh · 10 years ago
  9. cece24e working OCaml bindings by Guillaume Jeanne · 10 years ago
  10. 1a66fec x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change by Nguyen Anh Quynh · 10 years ago
  11. 7de200a python & java: update after the last change in the core on avx_zero_opmask by Nguyen Anh Quynh · 10 years ago
  12. 12e6e31 x86: rename zero_opmask of cs_x86_op to avx_zero_opmask by Nguyen Anh Quynh · 10 years ago
  13. 2b338ce x86: update some comments on x86.h by Nguyen Anh Quynh · 10 years ago
  14. 92a3d4c x86: add AVX's zero_opmask to cs_x86_op struct. updated Python & Java bindings for this change by Nguyen Anh Quynh · 10 years ago
  15. f1ec526 x86: provide size for X86_OP_IMM operand. thank Gabriel Quadros for some suggestions by Nguyen Anh Quynh · 10 years ago
  16. e1aba17 x86: fix all {cc} instructions to have correct instruction ID by Nguyen Anh Quynh · 10 years ago
  17. 4c5eabc x86: support SSE_CC & AVX_CC in cs_x86 struct. this also updates Python & Java bindings by Nguyen Anh Quynh · 10 years ago
  18. 0de6783 python: print instruction's basic info from print_detail() of test_detail.py by Nguyen Anh Quynh · 10 years ago
  19. 0d71645 x86: add avx_bcast to cs_x86_op to support AVX512 instructions. this also updates Python & Java binding by Nguyen Anh Quynh · 10 years ago
  20. eeb0690 java: update X86 after the last change in the core by Nguyen Anh Quynh · 10 years ago
  21. bb6440c x86: extend cs_x86.opcode to 4 bytes to contain EVEX opcode. this also updates Python binding following this interface change by Nguyen Anh Quynh · 10 years ago
  22. 15b746f x86: op_addReg() & op_addImm() only work when detail mode is ON by Nguyen Anh Quynh · 10 years ago
  23. c74ec28 x86: LEA for 16bit register should have pointer size of word, not dword. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
  24. d29aa62 x86: correct comments on x86_op_mem.scale by Nguyen Anh Quynh · 10 years ago
  25. 0467842 java: update X86 binding after the last update in the core by Nguyen Anh Quynh · 10 years ago
  26. 14ba46b x86: add segment to x86_op_mem struct. this fixes a bug in generating detail for instructions with segment override. bug reported by Sean Heelan. by Nguyen Anh Quynh · 10 years ago
  27. d948dd4 tests/test_x86: prefix[] size is now 4, not 5 by Nguyen Anh Quynh · 10 years ago
  28. f3a9659 python & java: update x86 following the last update in core by Nguyen Anh Quynh · 10 years ago
  29. fb15221 x86: cs_x86.prefix[] should have size 4, not 5 by Nguyen Anh Quynh · 10 years ago
  30. eb2f3fb x86: properly reset prefixPresent for prefix0/1 group by Nguyen Anh Quynh · 10 years ago
  31. 5a7f409 set @insn to NULL on error in cs_disasm_ex() by Nguyen Anh Quynh · 10 years ago
  32. dab17fd set @insn to NULL on error in cs_disasm_ex() by Nguyen Anh Quynh · 10 years ago
  33. 11bb56f Merge branch 'opsize' of https://github.com/aquynh/capstone into opsize by Nguyen Anh Quynh · 10 years ago
  34. 369ecf6 Merge branch 'next' into opsize by Nguyen Anh Quynh · 10 years ago
  35. 6c182ae fix a memleaking issue in cs_disasm_ex() where memory was not freed when input code is illegit by Nguyen Anh Quynh · 10 years ago
  36. 09132bf Merge branch 'next' into opsize by Nguyen Anh Quynh · 10 years ago
  37. cb6fc59 remove redundant return in MCInst_Init() by Nguyen Anh Quynh · 10 years ago
  38. 1e688d4 x86: do not use markup in AT&T syntax by Nguyen Anh Quynh · 10 years ago
  39. 46291c1 Merge branch 'next' into opsize by Nguyen Anh Quynh · 10 years ago
  40. 83800cd python & java: add comments on operand's size by Nguyen Anh Quynh · 10 years ago
  41. 44db3c3 x86: support CS_OPT_MODE for dynamically changing mode at run-time by Nguyen Anh Quynh · 10 years ago
  42. cff0362 arm64: assign NULL to char pointer, not zero. bug reported by Coverity by Nguyen Anh Quynh · 10 years ago
  43. e68ce0e java: update after the last change in x86 core by Nguyen Anh Quynh · 10 years ago
  44. e792451 python: update after the last change in x86 core by Nguyen Anh Quynh · 10 years ago
  45. 1085073 x86: remove disp_size, imm_size, op_size. add size to each operand. thanks Gabriel Quadros for some nice ideas by Nguyen Anh Quynh · 10 years ago
  46. 7ae389e suite: support XCore in fuzz.py by Nguyen Anh Quynh · 10 years ago
  47. 6a5cc57 suite: support XCore in benchmark.py by Nguyen Anh Quynh · 10 years ago
  48. 73eb5d5 arm: op_addImm() is called only when detail mode is ON by Nguyen Anh Quynh · 10 years ago
  49. b287301 bump number of operands supported by MCInst to 48. this fixes a segfault in ARM by Nguyen Anh Quynh · 10 years ago
  50. 476d5ad msvc: disable warning on strcpy() by Nguyen Anh Quynh · 10 years ago
  51. cae09bf replace offset_of with offsetof from stddef.h by Nguyen Anh Quynh · 10 years ago
  52. 4fe5995 python: test_detail.py print groups with space delimiter by Nguyen Anh Quynh · 10 years ago
  53. ebe2443 arm: some special instructions need to have numerical operand added manually in printInstruction() by Nguyen Anh Quynh · 10 years ago
  54. eccb9da arm64: zeroout a whole cs_arm64 struct of MCI in *getInstruction(). by Nguyen Anh Quynh · 10 years ago
  55. aaddb25 no need to zeroout insn_cache in make_id2insn() by Nguyen Anh Quynh · 10 years ago
  56. 73bbbb3 arm: add ASRS, LSRS, VCLE, VCLT instructions. update Python & Java bindings at the same time by Nguyen Anh Quynh · 10 years ago
  57. 8693fcd arm: correct operand setup for REG type in printAddrMode3OffsetOperand() by Nguyen Anh Quynh · 10 years ago
  58. 2a461ed arm: zeroout a whole cs_arm struct in *getInstruction(). this makes sure operand of REG type has shift type = 0 by default by Nguyen Anh Quynh · 10 years ago
  59. 9672cd2 update README by Nguyen Anh Quynh · 10 years ago
  60. 6217f36 update README by Nguyen Anh Quynh · 10 years ago
  61. 64091f7 resize total memory allocated for @insns to just the right size for cs_disasm_ex() by Nguyen Anh Quynh · 10 years ago
  62. 9cf8811 x86: InternalInstruction@xAcquireRelease should be initialized to 0 (FALSE) by Nguyen Anh Quynh · 10 years ago
  63. fec5539 use calloc() to zerout insn_cache in make_id2insn. this makes sure uninitialized data zero by Nguyen Anh Quynh · 10 years ago
  64. 495295e MCInst_Init() is arch-independent by Nguyen Anh Quynh · 10 years ago
  65. 370b7d7 remove unused MCInst/MCOperand functions by Nguyen Anh Quynh · 10 years ago
  66. 264ca37 MCInst_addOperand2() does not need to return value by Nguyen Anh Quynh · 10 years ago
  67. 215e76b ppc: use MCInst_insert0() instead of MCInst_insert() to avoid malloc/free by Nguyen Anh Quynh · 10 years ago
  68. d06f3d6 xcore: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  69. 88fca42 xcore: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  70. 7062988 systemz: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  71. bddd215 systemz: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  72. 3d3b6ce sparc: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  73. 9b91de0 sparc: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  74. 7f945d3 ppc: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  75. 7f15f67 ppc: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  76. f08b83d mips: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  77. 0c764d4 mips: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  78. d489a67 arm64: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  79. cbb3358 arm64: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  80. 730e0c0 update README on Status by Nguyen Anh Quynh · 10 years ago
  81. 97589e9 update README by Nguyen Anh Quynh · 10 years ago
  82. 842457e update README by Nguyen Anh Quynh · 10 years ago
  83. db3c00c consider tab as delimiter char in asm bufffer in fill_insn() by Nguyen Anh Quynh · 10 years ago
  84. 5493c87 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
  85. a8cef7e python: fix an use-after-free issue. bug reported by Luis Miras by Nguyen Anh Quynh · 10 years ago
  86. 02f8176 python: fix an use-after-free issue. bug reported by Luis Miras by Nguyen Anh Quynh · 10 years ago
  87. d025b63 Merge pull request #145 from schwoop/next by Nguyen Anh Quynh · 10 years ago
  88. 3a7c136 Fixed SPARC compilation by schwoop · 10 years ago
  89. 9678705 arm: convert MCOperand_CreateReg() to MCOperand_CreateReg0() to avoid malloc/free by Nguyen Anh Quynh · 10 years ago
  90. 748687d arm: convert the left-over MCOperand_CreateImm to MCOperand_CreateImm0 by Nguyen Anh Quynh · 10 years ago
  91. 21e5c04 Merge branch 'next' into fast by Nguyen Anh Quynh · 10 years ago
  92. 0f648ea arm: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free to improve performance by Nguyen Anh Quynh · 10 years ago
  93. 8c1104b arm: do not use markup by Nguyen Anh Quynh · 10 years ago
  94. dd9225b arm: use SStream_concat0() for SStream_concat() whereever possible for better performance by Nguyen Anh Quynh · 10 years ago
  95. b95647d systemz & xcore: create details only when detail mode is ON. this fixes some crashes in tests/test by Nguyen Anh Quynh · 10 years ago
  96. 69582d7 initialize cs_insn.detail by properly zero-out right members for each arch by Nguyen Anh Quynh · 10 years ago
  97. 29fd0f6 fix all the code in other non-X86 archs after the change made by commit 5329a6ffd485ce4b06305c1b104df5a0adab57e6 by Nguyen Anh Quynh · 10 years ago
  98. 12f93cb use malloc() rather than calloc() for handle->insn_cache in make_id2insn() by Nguyen Anh Quynh · 10 years ago
  99. c88d992 cs_disasm_ex(): properly calculate insn_cache when reallocating total variable by Nguyen Anh Quynh · 10 years ago
  100. ee58394 cs_disasm_ex(): avoid multiple memcpy() by allocating memory for total, then directly work on that instead of using static array insn_cache[] by Nguyen Anh Quynh · 10 years ago