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gerrit-public.fairphone.software / platform / external / capstone / c343a917fb3245722856c2fe0f452fefde8a7cf7
  1. c343a91 python: revert to use distutils rather than setuptools by Nguyen Anh Quynh · 10 years ago
  2. 3feaa11 Add DESTDIR support for the python binding. by Hank Leininger · 10 years ago
  3. 5f22deb add links to Lua & Rust bindings by Nguyen Anh Quynh · 10 years ago
  4. 7fc876a x86: add some FP instructions with st(0) register to insn_regs_att[] & insn_regs_intel[]. also add missing access info for these instructions to insn_ops[] by Nguyen Anh Quynh · 10 years ago
  5. ad18ed0 x86: fix issue #305. also correct arrays insn_regs_att[] & insn_regs_intel[] by Nguyen Anh Quynh · 10 years ago
  6. b023ffe x86: add missing CL register operand for shift rotate instructions involving CL (AT&T syntax) by Nguyen Anh Quynh · 10 years ago
  7. 3f1bfc9 x86: fix operand access info of string instructions by Nguyen Anh Quynh · 10 years ago
  8. 199ef42 x86: the exact registers (*SI/*DI) that string instructions access depend on hardware mode (16/32/64bit) by Nguyen Anh Quynh · 10 years ago
  9. fce28ce x86: revert the old change that check prefix location more strictly by Nguyen Anh Quynh · 10 years ago
  10. 85b194f Merge pull request #303 from bSr43/eflags-fix by Nguyen Anh Quynh · 10 years ago
  11. 1f33733 Same fix on the reduce table. by Vincent Bénony · 10 years ago
  12. 865dd8f Merge branch 'eflags-fix' of https://github.com/bSr43/capstone into t9 by Nguyen Anh Quynh · 10 years ago
  13. 4544ba1 cython: support cs_regs_access() API by Nguyen Anh Quynh · 10 years ago
  14. 7b02b12 Fix EFLAGS for the sar/sal/shr/shl instructions. by Vincent Bénony · 10 years ago
  15. 58eb073 x86: avoid duplicating registers returned by cs_regs_access(). also add *CX registers to regs_read[], regs_write[] for REP* instructions by Nguyen Anh Quynh · 10 years ago
  16. 9239967 x86: fix instruction 66f20f59ff reported by @maijin by Nguyen Anh Quynh · 10 years ago
  17. 6a4d277 x86: fix the pause instruction reported by @maijin in issue #298 by Nguyen Anh Quynh · 10 years ago
  18. d505d6d x86: initialize cs_x86.{xop_cc, eflags} by Nguyen Anh Quynh · 10 years ago
  19. a901539 python: X86Op.avx_zero_mask should have c_bool type by Nguyen Anh Quynh · 10 years ago
  20. 87d754d Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
  21. 228ec96 x86: LEA instruction should not access the second operand. bug reported by @chaplja by Nguyen Anh Quynh · 10 years ago
  22. 19ee2d1 inttypes.h fix by Cr4sh · 10 years ago
  23. 3a99bc6 tests: fix an warning on big left shifting. issue reported by Coverity by Nguyen Anh Quynh · 10 years ago
  24. 076dc6f Merge branch 'newapi' into next by Nguyen Anh Quynh · 10 years ago
  25. 475b962 docs: add link to op_access.html by Nguyen Anh Quynh · 10 years ago
  26. 95d4e9f python: fix access info of test_x86.py (CS_AC_READ|CS_AC_WRITE) by Nguyen Anh Quynh · 10 years ago
  27. 10647ae bindings: update java/ocaml/python after the latest changes in the core for the new API by Nguyen Anh Quynh · 10 years ago
  28. 53ccc2c bump CS_NEXT_VERSION up due to the newly added API cs_regs_access() by Nguyen Anh Quynh · 10 years ago
  29. 19ba71a Makefile: add X86MappingInsnOp_reduce.inc to DEP_X86 by Nguyen Anh Quynh · 10 years ago
  30. a60c595 Merge pull request #295 from richo/python-setuptools by Nguyen Anh Quynh · 10 years ago
  31. efffe78 Add new API and start to provide access information for instruction operands by Nguyen Anh Quynh · 10 years ago
  32. bb171fa Merge branch 'next' into newapi by Nguyen Anh Quynh · 10 years ago
  33. 3c862d5 python: Use setuptools if avilable by Richo Healey · 10 years ago
  34. 7c3fd91 arm: fix some instructions in insn_ops[] where GPRwithAPSR & addr_offset_non should be considered for register access. issue reported by @derrekr by Nguyen Anh Quynh · 10 years ago
  35. 75e94a0 arm: fix some instructions in insn_ops[] where GPRwithAPSR & addr_offset_non should be considered for register access. issue reported by @derrekr by Nguyen Anh Quynh · 10 years ago
  36. b1a4af6 core: rename operand access symbols from CS_OP_* to CS_AC_* by Nguyen Anh Quynh · 10 years ago
  37. 5e5b1f5 core: rename operand access symbols from CS_OP_* to CS_AC_* by Nguyen Anh Quynh · 10 years ago
  38. 6a77cc7 arm: some fixes for insn_ops[] where some registers should be considered for accessing. issue reported by @derrek by Nguyen Anh Quynh · 10 years ago
  39. c79a8a0 arm: fix lots of issues with insn_op[], and move it to a separate file ARMMappingInsnOp.inc by Nguyen Anh Quynh · 10 years ago
  40. abd253a README: add Lua to the list of binding languages by Nguyen Anh Quynh · 10 years ago
  41. 5b93f59 x86: more fix for lots of OP_NOREG in insn_ops[]. also renamed it to OP_IGNORE by Nguyen Anh Quynh · 10 years ago
  42. 1271684 x86: print interrupt number of INT instruction in positive form. bug reported by @pancake by Nguyen Anh Quynh · 10 years ago
  43. 8bb1f04 x86: fix lots of issues with insn_op[], and move it to a separate file X86MappingInsnOp.inc by Nguyen Anh Quynh · 10 years ago
  44. 88a9553 python: simplify setup.py by Nguyen Anh Quynh · 10 years ago
  45. e830b75 python: properly build the core in Cygwin environment for setup.py by Nguyen Tan Cong · 10 years ago
  46. 0950943 Fixed #289 by Mario Vilas · 10 years ago
  47. 85120cc bindings: add ARM64_GRP_CALL & ARM64_GRP_RET groups after the related change in the core by Nguyen Anh Quynh · 10 years ago
  48. f970679 arm64: use symbol rather than constant (128) for calculating group name in AArch64_group_name() by Nguyen Anh Quynh · 10 years ago
  49. a6fb47b Merge branch 'AArch64Details' of https://github.com/DavidCallahan/capstone into test3 by Nguyen Anh Quynh · 10 years ago
  50. 9092e52 Change AArch64 GRP_JUMP to use a static table implementation by David Callahan · 10 years ago
  51. 2c1b7f1 x86: fix Immediate operand size when first register operand is embedded in mnemonic (CMP8i8). bug reported by @joelpx by Nguyen Anh Quynh · 10 years ago
  52. 197fe1c bindings: add {ARM|ARM6}GRP_PRIVILEGE by Nguyen Anh Quynh · 10 years ago
  53. 21bf9ce Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
  54. 681070c Merge pull request #279 from radare/arm64-priv by Nguyen Anh Quynh · 10 years ago
  55. ba7bf10 Merge pull request #278 from radare/arm-priv by Nguyen Anh Quynh · 10 years ago
  56. cac770a bindings: support QPX mode & QPX alias instructions by Nguyen Anh Quynh · 10 years ago
  57. b8ffb86 ppc: fix a bug in QPX mode & add some QPX alias instructions. by Nguyen Anh Quynh · 10 years ago
  58. 0cc0543 ppc: add missing groups to group_name_maps[]. bug reported by Coverity by Nguyen Anh Quynh · 10 years ago
  59. e171243 arm: add the missing Virtualization group to group_name_maps[]. bug reported by Coverity by Nguyen Anh Quynh · 10 years ago
  60. d23fc9d RELEASE_NOTES by Nguyen Anh Quynh · 10 years ago
  61. 6eeb4a5 update ChangeLog for 3.0.2 by Nguyen Anh Quynh · 10 years ago
  62. f92daed TODO by Nguyen Anh Quynh · 10 years ago
  63. 09218a2 x86: remove unsed field @prefixLocations of InternalInstruction struct by Nguyen Anh Quynh · 10 years ago
  64. bcb75a2 x86: F2 can be a part of instruction encoding, but not a prefix by Nguyen Anh Quynh · 10 years ago
  65. a089e14 Fix ARM64_GRP_PRIVILEGE by pancake · 10 years ago
  66. 307973f Fix ARM_GRP_PRIVILEGE by pancake · 10 years ago
  67. 8c212fd ppc: add the missing Q0 register to reg_name_maps[]. bug reported by Coverity by Nguyen Anh Quynh · 10 years ago
  68. fcde1e1 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
  69. 956c24d Merge pull request #281 from radare/indent by Nguyen Anh Quynh · 10 years ago
  70. 21b0bdd Fix indent issue by pancake · 10 years ago
  71. dae7c3e add ARM64_GRP_PRIVILEGE group and tag some instructions by pancake · 10 years ago
  72. cf74a14 add ARM_GRP_PRIVILEGE group and tag some instructions by pancake · 10 years ago
  73. 6791b26 arm: revert the last change on OperandInfo* in ARMGenInstrInfo.inc by Nguyen Anh Quynh · 10 years ago
  74. dfd1c0b arm: get rid of some useless variables in ARMGenInstrInfo.inc. this saves at lease 50KB by Nguyen Anh Quynh · 10 years ago
  75. a7837a4 sparc, systemz, xcore: getInstruction() should return boolean instead of DecodeStatus by Nguyen Anh Quynh · 10 years ago
  76. 037e01f core: remove unused Subregister indices for Sparc, PPC, SystemZ & Mips by Nguyen Anh Quynh · 10 years ago
  77. bf97e21 core: add CS_NEXT_VERSION to version the latest code in the 'next' branch by Nguyen Anh Quynh · 10 years ago
  78. 914066b x86: CLI & STI are privileged instructions. issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
  79. 0423562 x86: RDTSC is not a privilege instructions, but all VM instructions are by Nguyen Anh Quynh · 10 years ago
  80. 4dd0dcb add CS_GRP_PRIVILEGE group, and also add X86_GRP_PRIVILEGE group for bunch of X86 privileged instructions by Nguyen Anh Quynh · 10 years ago
  81. bb5dcce core: put insns[] into separate .inc files to make it easier to manage by Nguyen Anh Quynh · 10 years ago
  82. d3d574e x86: XCHG* do not implicitly access *AX registers (reduce mode) by Nguyen Anh Quynh · 10 years ago
  83. 8b8d762 x86: XCHG* do not implicitly access *AX registers by Nguyen Anh Quynh · 10 years ago
  84. e0329dd arm: printModImmOperand() should print Imm as unsigned number in some special cases by Nguyen Anh Quynh · 10 years ago
  85. 796f1d4 Fix make -j warning by radare · 10 years ago
  86. 8e34388 arm: update insn_ops[] by Nguyen Anh Quynh · 10 years ago
  87. 78699e0 x86: update insn_ops[] by Nguyen Anh Quynh · 10 years ago
  88. e4ca35d x86: delete the fiction instruction X86_INS_VPCOM by Nguyen Anh Quynh · 10 years ago
  89. 7a94483 x86: remove another fiction instruction VCMP by Nguyen Anh Quynh · 10 years ago
  90. e402e02 x86: remove unreal instruction VPCMP by Nguyen Anh Quynh · 10 years ago
  91. 3c626fb mips: add register operands when detail = ON in the newly added function printRegisterList() by Nguyen Anh Quynh · 10 years ago
  92. 825a228 python: make Cython binding support X86's @xop_cc by Nguyen Anh Quynh · 10 years ago
  93. debaa2e bindings: support newly added field @xop_cc in the last commit (Java, Ocaml, Python) by Nguyen Anh Quynh · 10 years ago
  94. a81bf42 x86: add new field @xop_cc to struct @cs_x86 by Nguyen Anh Quynh · 10 years ago
  95. 6bb255b mips: remove mode CS_MODE_MIPSGP64 by Nguyen Anh Quynh · 10 years ago
  96. 522a6f4 Merge branch 'upgrade-core' into next by Nguyen Anh Quynh · 10 years ago
  97. ad42f16 mips: remove the confusing mode CS_MODE_MIPSGP64 by Nguyen Anh Quynh · 10 years ago
  98. b8b8348 arm: print immediate in hex format when suitable for printModImmOperand() by Nguyen Anh Quynh · 10 years ago
  99. 16f703e x86: remove more abundant space at the end of instructions (ATT syntax) by Nguyen Anh Quynh · 10 years ago
  100. a3c8505 x86: remove one extra space in ATT syntax by Nguyen Anh Quynh · 10 years ago