- 0d97a3b mips: CS_MODE_MIPS32R6 is an independent mode, and should not combine with CS_MODE_32 by Nguyen Anh Quynh · 10 years ago
- 921a46c mips: Fix j/jal target address calculation by Marcin Bukat · 10 years ago
- c36e675 mips: refine getFeatureBits() to make it more clear what Mips features are supported by Nguyen Anh Quynh · 10 years ago
- 1ffc1b2 arm: fix printMemBOption() that was wrongly fixed in 51888c3e0824dfcc7571d84fda303a8504763e2d by Nguyen Anh Quynh · 10 years ago
- 51888c3 arm: fix some bugs reported by VS2010. thanks Axel for testing by Nguyen Anh Quynh · 10 years ago
- 8cdafda arm: add new field mem_barrier to cs_arm struct. this requires changes in bindings by Nguyen Anh Quynh · 10 years ago
- e07bc91 ppc: fix a stupid mistake on printing operands of MR instruction by Nguyen Anh Quynh · 10 years ago
- 278e727 arm: print immediate in positive form for AND/ORR/EOR/BIC instructions by Nguyen Anh Quynh · 10 years ago
- d82b28a ppc: do not print a dot in front of absolute address. issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
- b6f4c1d sparc: add missing ICC/XCC registers in operands[] for some alias instructions. bug reported by @pancake by Nguyen Anh Quynh · 10 years ago
- 1caeee4 sparc: absolute address for Bxx instructions. issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
- e16813d sparc: get absolute address for CALL. issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
- 63ec7c5 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
- 2ac5d79 arm: print floating point number in %e format by Nguyen Anh Quynh · 10 years ago
- 6ee9518 arm64: print immediate in hexa for binary bitwise arith instructions: AND/ORR/EOR/TST by Nguyen Anh Quynh · 10 years ago
- 4f99ed2 x86: more friendly disassembly for jmp16i (in the form segment:offset). issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
- 6acaaa5 arm: printAddrMode5Operand() is wrong on calculating subtracted variable by Nguyen Anh Quynh · 10 years ago
- 4e17eef arm: lowercase for apsr_nzcv by Nguyen Anh Quynh · 10 years ago
- d865f39 arm: use lowercase for special registers by Nguyen Anh Quynh · 10 years ago
- 2593e22 arm: support V8 as a mode for A32 encodings by Nguyen Anh Quynh · 10 years ago
- 05bd294 mips: Mips64 does not go with Mips32R6. this fixes some 64bit instructions by Nguyen Anh Quynh · 10 years ago
- 4e20e8e x86: 0x66 & 0x67 cannot be anywhere. this fixes CRC32 instruction by Nguyen Anh Quynh · 10 years ago
- 248519e mips: properly handle Mips32R6 mode. bug reported by Jay Oster by Nguyen Anh Quynh · 10 years ago
- 0157ba1 arm64: add missing commas in SBFIZ/UBFIZ/SBFX/UBFX instructions by Nguyen Anh Quynh · 10 years ago
- c109e8e arm64: print shifter in decimal mode. this is to be consistent with ARM engine by Nguyen Anh Quynh · 10 years ago
- 19c63bc x86: hacky temporarily fix for FEMMS instruction (3DNow). bug reported by Ben Nagy by Nguyen Anh Quynh · 10 years ago
- 9cc8787 x86: RET imm16 comes with positive number by Nguyen Anh Quynh · 10 years ago
- ff7bba3 x86: print out immediate as positive number for logic arithmetic operations: AND, OR, XOR. only works for x86 Intel syntax so far. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
- b87f855 x86: print negative number in memory reference address (more friendly). issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
- c2ea812 fix cs_group_name() after the change on generic group ids by Nguyen Anh Quynh · 10 years ago
- c58e704 do not need to explicitly assign values for operand types in the last commit by Nguyen Anh Quynh · 10 years ago
- 21ac056 use common operand types across all architectures. this adds cs_op_type to capstone.h. suggestion by @zneak by Nguyen Anh Quynh · 10 years ago
- 1084f3a mips: properly support modes MIPS32R6 & CS_MODE_MIPSGP64 by Nguyen Anh Quynh · 10 years ago
- d91f964 * Fixed bug in Thumb2 pop caused by me incorrectly assuming that by flyingsymbols · 10 years ago
- 11f8e7c arm: B, BL, BX, BLX, BXJ belong to ARM_GRP_JUMP group. issue reported by @nanomad by Nguyen Anh Quynh · 10 years ago
- 85cfb18 x86: get rid of redundant X86_INS_LOCK/REP/RENE. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
- 5c0d9a4 Add '4*cri+cond' to operand list by kratolp · 10 years ago
- 79e253c Remove CS_MODE_N64 by Jay Oster · 10 years ago
- c64d629 mips: remove MIPS_REG_PC register. reviewed by Jay Oster by Nguyen Anh Quynh · 10 years ago
- 8bf5fa6 arm: remove dead code by Nguyen Anh Quynh · 10 years ago
- b0cc71d bindings: update java/ocaml/python after the last change in Arm's core by Nguyen Anh Quynh · 10 years ago
- 8fb2eab arm: some operands can get subtracted from base register, thus have '-' sign associated. this adds subtracted field into cs_arm_op to provide this info. issue reported by Yegor Derevenets by Nguyen Anh Quynh · 10 years ago
- f2b699a Don't add cr0 to the operand list as it's not displayed by the disassembly by kratolp · 10 years ago
- e96935e ppc: remove duplicate op_addReg() in printAliasInstrEx() by Nguyen Anh Quynh · 10 years ago
- a90b047 x86: simplify printPCRelImm() in calculating absolute address. also fix the issue on AT&T syntax by Nguyen Anh Quynh · 10 years ago
- ea3c089 some simple optimizations for speed. this improves performance about 5% by Nguyen Anh Quynh · 10 years ago
- a92d2cb x86: properly calculate absolute addresses of relative CALL & JMP. thanks Pedro for valuable helps by Nguyen Anh Quynh · 10 years ago
- df92a7f mips: BC0F is relative branch instruction. bug reported by Pancake by Nguyen Anh Quynh · 10 years ago
- 48eb13c ppc: add detail for alias instructions introduced in the latest change by @kratolp by Nguyen Anh Quynh · 10 years ago
- 6b731a0 fix conflicts when merging by Nguyen Anh Quynh · 10 years ago
- 630bcd6 ppc: c99 by Nguyen Anh Quynh · 10 years ago
- 70fa90f ppc: coding style by Nguyen Anh Quynh · 10 years ago
- 7383510 Merge branch 'next' of https://github.com/aquynh/capstone into next by kratolp · 10 years ago
- a3f0aef PPC: Fix absolute/relative offset for branch instruction by kratolp · 10 years ago
- c96f1b0 x86: fix Out-of-bounds read error in is16BitEquivalent(). issue reported by Coverity by Nguyen Anh Quynh · 10 years ago
- 9bf1b87 mips: fix out-of-bounds read error in Mips_reg_name(). issue reported by Coverity by Nguyen Anh Quynh · 10 years ago
- e135056 fix a negative array index read in PPC_alias_insn(). issue reported by Coverity by Nguyen Anh Quynh · 10 years ago
- 9d54544 mips: verify if RegDecoder can get NULL value. issue reported by Coverity by Nguyen Anh Quynh · 10 years ago
- 7e644f0 ppc: initialize needComma to false. issue reported by Coverity by Nguyen Anh Quynh · 10 years ago
- 9235fdc arm: The Thumb2 ldrexd and strexd instructions are not defined for M-class architectures by Nguyen Anh Quynh · 10 years ago
- 6756edd ppc: alias instructions handled by printAliasInstrEx() miss CR* registers in detail mode. fixed by Nguyen Anh Quynh · 10 years ago
- ca44c48 ppc: coding style for PPCInstPrinter.c by Nguyen Anh Quynh · 10 years ago
- 27767e8 merge PR of @kratolp by Nguyen Anh Quynh · 10 years ago
- d7e42b7 rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly by Nguyen Anh Quynh · 10 years ago
- f0221a2 * Fix pcc branch offset in a better way by kratolp · 10 years ago
- d442fbc arm: t2BXJ also belongs to groups ARM_GRP_NOTMCLASS & ARM_GRP_PREV8 by Nguyen Anh Quynh · 10 years ago
- 54f8cef mips: add JR.HB & JALR.HB instructions. also update Ocaml/Python/Java bindings by Nguyen Anh Quynh · 10 years ago
- 7ac7d4e mips: on BEQZL, printAlias() should return instruction string. also cleanup some redundant code by Nguyen Anh Quynh · 10 years ago
- 240e1c7 mips: print absolute target address for relative branch instructions: BEQL, BGEZALL, BGEZL, BGTZL, BLEZL, BLTZALL, BLTZL, BNEL, BNEZL, BEQZL, BC1F, BC1FL, BC1TL by Nguyen Anh Quynh · 10 years ago
- 5691dd4 mips: fixed & added new instructions. also updated Ocaml/Python/Java bindings by Nguyen Anh Quynh · 10 years ago
- 4e87675 arm: relative branch should not be negative. bug reported by @acez by Nguyen Anh Quynh · 10 years ago
- a4da895 x86: relative CALL should print out absolute addresses. bug reported by @acez by Nguyen Anh Quynh · 10 years ago
- ced9d24 Workaround missing <inttypes.h> on MSVC 2010 by Yegor Derevenets · 10 years ago
- 7e57e79 ppc: handle branch condition for alias instructions. this also updates Python & Java bindings by Nguyen Anh Quynh · 10 years ago
- 9d63839 ppc: move our own alias instructions to PPCInstPrinter.c to isolate them from auto-gen code of LLVM by Nguyen Anh Quynh · 10 years ago
- d37b0df merge PR of @kratolp by Nguyen Anh Quynh · 10 years ago
- 1738a3e sparc: handle some alias instructions & more details for some special instructions. update Python & Java bindings accordingly with new instructions & registers by Nguyen Anh Quynh · 10 years ago
- 05d4b83 Extend sign of the branch destination operand by kratolp · 10 years ago
- 87736c1 Update alias of PPC branch instructions by kratolp · 10 years ago
- eaecfa4 ppc: add PPC_INS_BNE for alias instruction BNE by Nguyen Anh Quynh · 10 years ago
- 3656755 mips: cleanup by Nguyen Anh Quynh · 10 years ago
- 41de05c x86: correct x86_16_bit_eq_tbl[] & x86_16_bit_eq_lookup[]. idea & code provided by @obs1dium by Nguyen Anh Quynh · 10 years ago
- 72bbcac x86: temporarily solve conflicts caused by the last merge by Nguyen Anh Quynh · 10 years ago
- f46ef2e ppc: alias instruction for 'gBC 4, 2, target' to 'bne target'. issue reported by @kratolp by Nguyen Anh Quynh · 10 years ago
- 1f196d1 x86: CALLpcrel32 should be outputed as 'callq' in 64bit mode in AT&T syntax. ported from upstream by Nguyen Anh Quynh · 10 years ago
- 9728200 x86: cpuid, xsetbv, xgetbv involve 32bit registers, not 64bit registers. by Nguyen Anh Quynh · 10 years ago
- 721d07f ppc: support alias instructions. update Python & Java bindings accordingly by Nguyen Anh Quynh · 10 years ago
- 04d9f8e arm: update core with a lot more details provided in detail mode now. update Python & Java bindings to reflect the core's changes by Nguyen Anh Quynh · 10 years ago
- e0eb06b mips: correct mapping instruction string to instruction ID for alias instructions BAL & BEQZ. bug reported by Pancake by Nguyen Anh Quynh · 10 years ago
- 4f0d704 arm64: vector_index = 0 is valid. this changed invalid value of vector_index to -1 by Nguyen Anh Quynh · 10 years ago
- eda8506 mips: add BC1T & BLTZAL to the list of relative branch instructions. thanks @hlide for the input. by Nguyen Anh Quynh · 10 years ago
- d1a9090 mips: relative branch address calculated current IP added to the relative offset. thanks Pancake, Jay Oster, hlide & jvoisin for helping by Nguyen Anh Quynh · 10 years ago
- 0c07cc9 zero-out instruction details, mnemonic & op_str so cs_insn doesnt have garbage in Diet mode by Nguyen Anh Quynh · 10 years ago
- 934e180 x86: more update to the core by Nguyen Anh Quynh · 10 years ago
- 4c95022 fix warnings on unused variables when compiling in Diet mode by Nguyen Anh Quynh · 10 years ago
- 5426fe0 arm64: change headerguard for AArch64AddressingModes.h by Nguyen Anh Quynh · 10 years ago
- c44aced x86: properly zero-out x86.operands[] by Nguyen Anh Quynh · 10 years ago
- 8a429c2 Merge branch 'v3' of https://github.com/aquynh/capstone into v3 by Nguyen Anh Quynh · 10 years ago
- 9be1f93 fixed warnings in MSVC x64 compilation by Mr. eXoDia · 10 years ago
- 0693809 fixed compile errors on visual studio (variable declarations in C have to be in the top of the function) by Mr. eXoDia · 10 years ago