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gerrit-public.fairphone.software / platform / external / capstone / facb90c46675574c7d32b33b7f7d66bf9bb545ec / arch
  1. 2ec0f81 mips: return Fail on assert failure in MipsDisassembler.c by Nguyen Anh Quynh · 9 years ago
  2. 06eacaf ppc: return failure when Base>=32 in decodeMemRIOperands() by Nguyen Anh Quynh · 9 years ago
  3. d49ec46 ppc: handle invalid CR bits with more than 8 zeros in decodeCRBitMOperand(). bug reported by @felixgr by Nguyen Anh Quynh · 9 years ago
  4. 3dcad96 x86: treat prefix-only sequences of bytes as invalid code. this fixes a NDP reported by @felixgr by Nguyen Anh Quynh · 9 years ago
  5. c2bc152 ppc: avoid potential memleak issue when alias mnemonic is empty in PPC_printInst() by Nguyen Anh Quynh · 9 years ago
  6. c4dbf07 ppc: make sure alias mnememonic is not empty in PPC_printInst() by Nguyen Anh Quynh · 9 years ago
  7. 2a8091b xcore: increase op_count in set_mem_access() only on register operand. bug reported by Ben Nagy by Nguyen Anh Quynh · 9 years ago
  8. 3dc31d2 x86: properly handle AL/AX/EAX operand of OUT instruction in AT&T syntax by Nguyen Anh Quynh · 9 years ago
  9. 3f00a72 x86: some algorithm instructions with immediate of 1 byte should be printed in positive form by Nguyen Anh Quynh · 9 years ago
  10. 7c2f5b6 xcore: turn off doing_mem after each printing each instruction. this fixes a memory corruption reported by @felixgr by Nguyen Anh Quynh · 9 years ago
  11. fbae42e x86: revert the old change that check prefix location more strictly by Nguyen Anh Quynh · 9 years ago
  12. 4fcb31c Fix Thumb disassembler memory corruption with IT sequence (issue #385) by Nikolay Igotti · 9 years ago
  13. ded1577 arm: fix an warning on conversion from uint64_t to bool. issue reported by @yegord by Nguyen Anh Quynh · 9 years ago
  14. 478595d arm: remove ASRS, LSRS, SUBS & MOVS from mapping table insns[]. backported from the 'next' branch, but do not really remove these 'dead' instructions for compatibility reason by Nguyen Anh Quynh · 9 years ago
  15. 5dba2c3 arm: BLX should read PC & modify LR registers. bug reported by Zach Riggle by Nguyen Anh Quynh · 9 years ago
  16. 27526f3 x86: make all shifted instructions to support first operand in AT&T syntax by Nguyen Anh Quynh · 9 years ago
  17. 7c47be4 Fix handling of cmpxchg16b with lock prefix by Ole André Vadla Ravnås · 9 years ago
  18. 9668b26 Fix compiling with nmake by learn_more · 9 years ago
  19. 094ae1e Merge pull request #311 from jpenalbae/sparc-branchfix by Nguyen Anh Quynh · 9 years ago
  20. 40e6a99 Improved displacement decoding for sparc banching instructions by NighterMan · 9 years ago
  21. bcf09f4 Add support to embed Capstone into OS X kernel extensions. by reverser · 9 years ago
  22. 27a22f8 Sparc conditional branches displacement fix by NighterMan · 9 years ago
  23. 0915ecc x86: tighter check on return of consumeByte() & lookAtByte(). this fixes the segfault on the sole input of 0xf3 reported by windhl by Nguyen Anh Quynh · 9 years ago
  24. ea296b6 x86: tighter check on return of consumeByte() & lookAtByte(). this fixes the segfault on the sole input of 0xf3 reported by windhl by Nguyen Anh Quynh · 9 years ago
  25. 60b6f9e Merge branch 'master' into v3 by Nguyen Anh Quynh · 9 years ago
  26. e1bde17 x86: fix instruction 66f20f59ff reported by @maijin by Nguyen Anh Quynh · 9 years ago
  27. 3cd999f x86: fix the pause instruction reported by @maijin in issue #298 by Nguyen Anh Quynh · 9 years ago
  28. 9d60607 inttypes.h fix by Cr4sh · 9 years ago
  29. 2cdd422 x86: fix Immediate operand size when first register operand is embedded in mnemonic (CMP8i8). bug reported by @joelpx by Nguyen Anh Quynh · 9 years ago
  30. 93d7dfa x86: fix Immediate operand size when first register operand is embedded in mnemonic (CMP8i8). bug reported by @joelpx by Nguyen Anh Quynh · 9 years ago
  31. 97447d1 Merge branch 'v3' of https://github.com/aquynh/capstone into v3 by Nguyen Anh Quynh · 9 years ago
  32. d50dcc5 x86: F2 can be a part of instruction encoding, but not a prefix by Nguyen Anh Quynh · 9 years ago
  33. 726ade0 arm: more optimization on MCInstrDesc struct to reduce the library size by further 20KB by Nguyen Anh Quynh · 9 years ago
  34. e220b50 arm: rever the change on OperandInfo* in the last commit by Nguyen Anh Quynh · 9 years ago
  35. 3d00666 optimize MCInstrDesc to reduce its size by Nguyen Anh Quynh · 9 years ago
  36. 7d5266d sparc, systemz, xcore: getInstruction() should return boolean instead of DecodeStatus by Nguyen Anh Quynh · 9 years ago
  37. 5160e23 x86: multiple fixes for insns[] - reduced mode (X86Mapping.c) by Nguyen Anh Quynh · 9 years ago
  38. c0fa5b7 x86: multiple fixes for insns[] (X86Mapping.c) by Nguyen Anh Quynh · 9 years ago
  39. 7334a88 Merge branch 'master' into v3 by Nguyen Anh Quynh · 9 years ago
  40. f7e5bfe Silencing Clang warning about losing precision by Félix Cloutier · 9 years ago
  41. e255659 Silencing uninitialized variable warning about insn_id by Félix Cloutier · 9 years ago
  42. c141af9 Silencing Clang warning bys casting values by Félix Cloutier · 9 years ago
  43. fbfa06d mips: sanity check for input code length of Mips64 by Nguyen Anh Quynh · 9 years ago
  44. ed46b0b x86: allow prefixes to be positioned anywhere. this should fix the bug reported by Gabriel Quadros by Nguyen Anh Quynh · 9 years ago
  45. b756aed arm: fix some warnings reported by MSVC by Nguyen Anh Quynh · 9 years ago
  46. 8c9fd12 arm: fix some warnings reported by MSVC by Nguyen Anh Quynh · 9 years ago
  47. 5598301 Correct printAM3PreOrOffsetIndexOp disp value by pzread · 9 years ago
  48. 996f06c Correct printAM3PreOrOffsetIndexOp disp value by pzread · 9 years ago
  49. 61cbeab Remove incorrect ITBlock.size = 0 by pzread · 9 years ago
  50. f15d3dd x86: REPNE can go with STOS/MOVS. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 9 years ago
  51. c48a16a x86: add the missing X86 instructions in X86_REDUCE mode in X86DisassemblerDecoder.c. bug reported by Julian Stecklina by Nguyen Anh Quynh · 9 years ago
  52. e10b53f x86: fix operand size for 'CALL PTR [REG]'. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 9 years ago
  53. 9426ad5 arm: add few more post-indexed instructions doing writeback by Nguyen Anh Quynh · 10 years ago
  54. 7bbb433 arm: fix a bug in the last commit by Nguyen Anh Quynh · 10 years ago
  55. e19490e arm: some load/store instructions writeback without bang letter. bug reported by @jabba2989 by Nguyen Anh Quynh · 10 years ago
  56. f2157de arm: in Thumb mode, ADC & SBC do not update flags. bug reported by @jabba2989 by Nguyen Anh Quynh · 10 years ago
  57. e95a766 x86: remove some instructions unsupported in 3.x version by Nguyen Anh Quynh · 10 years ago
  58. 273c6f4 arm64 & sparc: fix some warnings reported by MSVC by Nguyen Anh Quynh · 10 years ago
  59. 25525fb x86: remove some instructions irrelevant for LOCK prefix in invalidPrefix() by Nguyen Anh Quynh · 10 years ago
  60. 7de172d x86: properly handle REP, REPNE & REPNZ prefixes by Nguyen Anh Quynh · 10 years ago
  61. 29f41da x86: add more valid instructions for LOCK prefix by Andrew Wesie · 10 years ago
  62. 5323128 x86: check for invalid instructions with LOCK prefix by Nguyen Anh Quynh · 10 years ago
  63. 18dfc19 Merge branch 'v3' of https://github.com/aquynh/capstone into v3 by Nguyen Anh Quynh · 10 years ago
  64. 0c30daf arm64: BL & BLR do not read SP register by Nguyen Anh Quynh · 10 years ago
  65. 599b559 x86: fix some compilation issues about missing instructions on CAPSTONE_X86_REDUCE setup by Nguyen Anh Quynh · 10 years ago
  66. 07526e9 arm: Thumb BL & BLX read ARM_REG_PC instead of ARM_REG_SP. by derrek · 10 years ago
  67. c51e04f x86: support CR9-CR15 registers by Nguyen Anh Quynh · 10 years ago
  68. db684b2 arm: BL & BLX do not read SP, but PC register. issue reported by Der Rek by Nguyen Anh Quynh · 10 years ago
  69. 9f694cc x86: handle undocumented immediates for (v)cmpps/pd/ss/sd instructions by Nguyen Anh Quynh · 10 years ago
  70. d319c11 x86: more encodings for FXCH & FCOMP. also print LJUMP without * as prefix for Intel syntax. handle BOUND & FARCALL better by Nguyen Anh Quynh · 10 years ago
  71. 5f8c423 x86: add missing CR8-CR15 registers to arch/X86/X86DisassemblerDecoder.h by Nguyen Anh Quynh · 10 years ago
  72. 2ac7941 x86: handle REX properly for segment related instructions by ignoring REX.r entirely by Nguyen Anh Quynh · 10 years ago
  73. 80959c9 code style by Nguyen Anh Quynh · 10 years ago
  74. 0948114 x86: handle REX properly for x64 MMX related instructions by ignoring REX.b & REX.w entirely by Nguyen Anh Quynh · 10 years ago
  75. c9c3fdc arm64: print ADR with absolute address. bug reported by blackboxer123 by Nguyen Anh Quynh · 10 years ago
  76. 5175423 x86: check instruction size <=15 as soon as possible by Nguyen Anh Quynh · 10 years ago
  77. 3539595 x86: instruction length must be <= 15 by Nguyen Anh Quynh · 10 years ago
  78. a3d689d x86: allow to mix REX & legacy prefix repeatedly in any order by Nguyen Anh Quynh · 10 years ago
  79. 674db4c ppc: fix some compilation bugs when DIET mode is enable by Nguyen Anh Quynh · 10 years ago
  80. 10ecdae x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP by Nguyen Anh Quynh · 10 years ago
  81. 1016d32 x86: only eliminate REX prefixes if next byte is not a legacy prefix by Nguyen Anh Quynh · 10 years ago
  82. 1cbc222 x86: eliminate redundant REX prefixes in front of x86_64 instruction. bug reported by Aurélien Wailly by Nguyen Anh Quynh · 10 years ago
  83. 03a1836 arm64: set absolute (rather than relative) address B/BL. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
  84. c2925e9 x86: accept more than one REX prefix for x86_64. bug reported by Aurélien Wailly. thanks Ange Albertini for help by Nguyen Anh Quynh · 10 years ago
  85. 03fb6f3 x86: MOV32sm should reference word rather than dword. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
  86. 1befd75 x86: reverse the order of operands for alias instruction IMUL in Intel syntax. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
  87. 9578185 x86: add missing operands in detail mode for 'IN/OUT reg, reg' instructions. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
  88. 2ce4da3 x86: fix the last bug on PUSH/POP <segment> for ATT syntax by Nguyen Anh Quynh · 10 years ago
  89. b32515d x86: add missing operands in detail mode for PUSH/POP <segment> instructions. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
  90. 5b981a4 x86: also fix AT&T syntax for the last MOV32ms bug by Nguyen Anh Quynh · 10 years ago
  91. 344d5e2 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
  92. ba31f26 x86: MOV32ms should reference word rather than dword. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
  93. 3caf837 arm: alias LDR instruction with operands '[sp], 4' to POP. suggested by Pancake by Nguyen Anh Quynh · 10 years ago
  94. a2934a7 arm: print immediate op of MVN instruction in positive hexadecimal form. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
  95. 4e732c7 Populate PowerPC slwi/srwi instruction details with SH operand. by Peter Mackay · 10 years ago
  96. c00bc2e fix the left-over C89 issues introduced by Pedro by Nguyen Anh Quynh · 10 years ago
  97. 68197d9 Make it C89 compatible. by reverser · 10 years ago
  98. 202da41 Fix compiler warnings about different sizes and sign. by reverser · 10 years ago
  99. 22278ec mips & xcore: some safety guards to make sure printOperand() do not overflow Operands[] for some unknown reasons by Nguyen Anh Quynh · 10 years ago
  100. aa50c64 arm64: fix ADRP (relative offset). bug reported by @shadymallow by Nguyen Anh Quynh · 10 years ago