commit 0d79b04d53ce38692d8f12a2eb693edcb7593014
author Dale Johannesen <dalej@apple.com> Thu Oct 28 01:05:37 2010 +0000
committer Dale Johannesen <dalej@apple.com> Thu Oct 28 01:05:37 2010 +0000
tree 5b756f812c4213facf889af04ed21efd6d3a522b
parent badeec8cb9bdde379da71a3475e268fd6e57f323

Ahem.  Add rest of D and Q registers to ARM inline asm handling.



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@117517 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Basic/Targets.cpp

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index ad79949..5ed285d 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -1891,9 +1891,12 @@
   // Double registers
   "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
   "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
+  "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
+  "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
 
   // Quad registers
-  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7"
+  "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
+  "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
 };
 
 void ARMTargetInfo::getGCCRegNames(const char * const *&Names,