commit 146e5a4a787a2ebfe89a6b74e7c22d850bf1c858
author Manman Ren <mren@apple.com> Thu Oct 11 00:59:55 2012 +0000
committer Manman Ren <mren@apple.com> Thu Oct 11 00:59:55 2012 +0000
tree 8774ff332c6f10959f86969bc5482cc847b4bc56
parent 4145228b758892afd3545835a4caaea722f20510

X86: add F16C support in Clang

Support the following intrinsics:
  _mm_cvtph_ps, _mm256_cvtph_ps, _mm_cvtps_ph, _mm256_cvtps_ph

rdar://12407875


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@165685 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Basic/Targets.cpp

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 17f1a61..bc32d75 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -1360,6 +1360,7 @@
   bool HasFMA4;
   bool HasFMA;
   bool HasXOP;
+  bool HasF16C;
 
   /// \brief Enumeration of all of the X86 CPUs supported by Clang.
   ///
@@ -1506,7 +1507,8 @@
     : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
       HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false),
       HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasSSE4a(false),
-      HasFMA4(false), HasFMA(false), HasXOP(false), CPU(CK_Generic) {
+      HasFMA4(false), HasFMA(false), HasXOP(false), HasF16C(false),
+      CPU(CK_Generic) {
     BigEndian = false;
     LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
   }
@@ -1712,6 +1714,7 @@
   Features["fma4"] = false;
   Features["fma"] = false;
   Features["xop"] = false;
+  Features["f16c"] = false;
 
   // FIXME: This *really* should not be here.
 
@@ -1922,6 +1925,8 @@
       Features["bmi2"] = true;
     else if (Name == "popcnt")
       Features["popcnt"] = true;
+    else if (Name == "f16c")
+      Features["f16c"] = true;
   } else {
     if (Name == "mmx")
       Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
@@ -1982,6 +1987,8 @@
       Features["fma4"] = Features["xop"] = false;
     else if (Name == "xop")
       Features["xop"] = false;
+    else if (Name == "f16c")
+      Features["f16c"] = false;
   }
 
   return true;
@@ -2053,6 +2060,11 @@
       continue;
     }
 
+    if (Feature == "f16c") {
+      HasF16C = true;
+      continue;
+    }
+
     assert(Features[i][0] == '+' && "Invalid target feature!");
     X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
       .Case("avx2", AVX2)
@@ -2261,6 +2273,9 @@
   if (HasXOP)
     Builder.defineMacro("__XOP__");
 
+  if (HasF16C)
+    Builder.defineMacro("__F16C__");
+
   // Each case falls through to the previous one here.
   switch (SSELevel) {
   case AVX2:
@@ -2344,6 +2359,7 @@
       .Case("x86_32", PointerWidth == 32)
       .Case("x86_64", PointerWidth == 64)
       .Case("xop", HasXOP)
+      .Case("f16c", HasF16C)
       .Default(false);
 }