IRgen: Fix case where we might generate an access component with width == 0, if
we have to narrow the access side immediately (can happen with packed,
-fno-bitfield-type-align).

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@102067 91177308-0d34-0410-b5e6-96231b3b80d8
2 files changed