Generate tests for all of the x86 SIMD instruction feature set
predefines based on the output of GCC as well as the CPU predefines.
Invert tests for __AVX__, Clang's AVX feature is hard coded off still.
Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's
documentation, and ICC's documentation (such as I could dig up).
Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and
nothing (resp.).
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@140692 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 2442054..3ae21d4 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -1471,7 +1471,6 @@
case CK_Pentium:
case CK_i686:
case CK_PentiumPro:
- case CK_Geode:
break;
case CK_PentiumMMX:
case CK_Pentium2:
@@ -1506,7 +1505,7 @@
break;
case CK_Atom:
setFeatureEnabled(Features, "mmx", true);
- setFeatureEnabled(Features, "sse3", true);
+ setFeatureEnabled(Features, "ssse3", true);
break;
case CK_Corei7:
setFeatureEnabled(Features, "mmx", true);
@@ -1526,12 +1525,15 @@
break;
case CK_K6_2:
case CK_K6_3:
- case CK_Athlon:
- case CK_AthlonThunderbird:
case CK_WinChip2:
case CK_C3:
setFeatureEnabled(Features, "3dnow", true);
break;
+ case CK_Athlon:
+ case CK_AthlonThunderbird:
+ case CK_Geode:
+ setFeatureEnabled(Features, "3dnowa", true);
+ break;
case CK_Athlon4:
case CK_AthlonXP:
case CK_AthlonMP: