Add support for sse4a and enable it for amdfam10 cpu.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@143312 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 035fec5..60642b3 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -1466,12 +1466,10 @@
Features["ssse3"] = false;
Features["sse41"] = false;
Features["sse42"] = false;
+ Features["sse4a"] = false;
Features["aes"] = false;
Features["avx"] = false;
- // LLVM does not currently recognize this.
- // Features["sse4a"] = false;
-
// FIXME: This *really* should not be here.
// X86_64 always has SSE2.
@@ -1565,8 +1563,12 @@
case CK_K8SSE3:
case CK_OpteronSSE3:
case CK_Athlon64SSE3:
+ setFeatureEnabled(Features, "sse3", true);
+ setFeatureEnabled(Features, "3dnowa", true);
+ break;
case CK_AMDFAM10:
setFeatureEnabled(Features, "sse3", true);
+ setFeatureEnabled(Features, "sse4a", true);
setFeatureEnabled(Features, "3dnowa", true);
break;
case CK_C3_2:
@@ -1612,6 +1614,8 @@
else if (Name == "avx")
Features["avx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
+ else if (Name == "sse4a")
+ Features["sse4a"] = true;
} else {
if (Name == "mmx")
Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
@@ -1638,6 +1642,8 @@
Features["aes"] = false;
else if (Name == "avx")
Features["avx"] = false;
+ else if (Name == "sse4a")
+ Features["sse4a"] = false;
}
return true;