commit 8712ded79d0e80e6a4158682f78626637ad90a7a
author Weiming Zhao <weimingz@codeaurora.org> Mon Sep 30 22:51:32 2013 +0000
committer Weiming Zhao <weimingz@codeaurora.org> Mon Sep 30 22:51:32 2013 +0000
tree f94e68230108e07a90b8638e82c1d3dcc47f4cf2
parent 69220e76ec232e5659b42f8885c7cec5ee8f1106

Fix PR 12730: Add _GCC_HAVE_SYNC_COMPARE_AND_SWAP macros for ARM



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@191707 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Basic/Targets.cpp

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 3ee9cd4..9c26521 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -3862,6 +3862,13 @@
 
     if (CPUArch.startswith("8"))
       Builder.defineMacro("__ARM_FEATURE_CRC32");
+
+    if (CPUArch[0] >= '6' && CPUArch != "6M") {
+      Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+      Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+      Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
+      Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
+    }
   }
   virtual void getTargetBuiltins(const Builtin::Info *&Records,
                                  unsigned &NumRecords) const {