clang side to match the LLVM IR type system rewrite patch.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@134831 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGenCXX/new-overflow.cpp b/test/CodeGenCXX/new-overflow.cpp
index e16b30e..fd56d5e 100644
--- a/test/CodeGenCXX/new-overflow.cpp
+++ b/test/CodeGenCXX/new-overflow.cpp
@@ -2,8 +2,6 @@
// rdar://problem/9246208
-// CHECK: [[OVR_T:%.*]] = type { i32, i1 }
-
// Basic test.
namespace test0 {
struct A {
@@ -15,9 +13,9 @@
// CHECK: define [[A:%.*]]* @_ZN5test04testEs(i16 signext
// CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32
- // CHECK-NEXT: [[T0:%.*]] = call [[OVR_T]] @llvm.umul.with.overflow.i32(i32 [[N]], i32 4)
- // CHECK-NEXT: [[T1:%.*]] = extractvalue [[OVR_T]] [[T0]], 1
- // CHECK-NEXT: [[T2:%.*]] = extractvalue [[OVR_T]] [[T0]], 0
+ // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 4)
+ // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1
+ // CHECK-NEXT: [[T2:%.*]] = extractvalue { i32, i1 } [[T0]], 0
// CHECK-NEXT: [[T3:%.*]] = select i1 [[T1]], i32 -1, i32 [[T2]]
// CHECK-NEXT: call noalias i8* @_Znaj(i32 [[T3]])
// CHECK: icmp ult i32 {{.*}}, [[N]]
@@ -37,9 +35,9 @@
// CHECK: define [100 x [[A:%.*]]]* @_ZN5test14testEs(i16 signext
// CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32
- // CHECK-NEXT: [[T0:%.*]] = call [[OVR_T]] @llvm.umul.with.overflow.i32(i32 [[N]], i32 400)
- // CHECK-NEXT: [[T1:%.*]] = extractvalue [[OVR_T]] [[T0]], 1
- // CHECK-NEXT: [[T2:%.*]] = extractvalue [[OVR_T]] [[T0]], 0
+ // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 400)
+ // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1
+ // CHECK-NEXT: [[T2:%.*]] = extractvalue { i32, i1 } [[T0]], 0
// CHECK-NEXT: [[T3:%.*]] = mul i32 [[N]], 100
// CHECK-NEXT: [[T4:%.*]] = select i1 [[T1]], i32 -1, i32 [[T2]]
// CHECK-NEXT: call noalias i8* @_Znaj(i32 [[T4]])
@@ -61,14 +59,14 @@
// CHECK: define [100 x [[A:%.*]]]* @_ZN5test24testEs(i16 signext
// CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32
- // CHECK-NEXT: [[T0:%.*]] = call [[OVR_T]] @llvm.umul.with.overflow.i32(i32 [[N]], i32 400)
- // CHECK-NEXT: [[T1:%.*]] = extractvalue [[OVR_T]] [[T0]], 1
- // CHECK-NEXT: [[T2:%.*]] = extractvalue [[OVR_T]] [[T0]], 0
+ // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 400)
+ // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1
+ // CHECK-NEXT: [[T2:%.*]] = extractvalue { i32, i1 } [[T0]], 0
// CHECK-NEXT: [[T3:%.*]] = mul i32 [[N]], 100
- // CHECK-NEXT: [[T4:%.*]] = call [[OVR_T]] @llvm.uadd.with.overflow.i32(i32 [[T2]], i32 4)
- // CHECK-NEXT: [[T5:%.*]] = extractvalue [[OVR_T]] [[T4]], 1
+ // CHECK-NEXT: [[T4:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[T2]], i32 4)
+ // CHECK-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T4]], 1
// CHECK-NEXT: [[T6:%.*]] = or i1 [[T1]], [[T5]]
- // CHECK-NEXT: [[T7:%.*]] = extractvalue [[OVR_T]] [[T4]], 0
+ // CHECK-NEXT: [[T7:%.*]] = extractvalue { i32, i1 } [[T4]], 0
// CHECK-NEXT: [[T8:%.*]] = select i1 [[T6]], i32 -1, i32 [[T7]]
// CHECK-NEXT: call noalias i8* @_Znaj(i32 [[T8]])
// CHECK: icmp ult i32 {{.*}}, [[T3]]
@@ -126,9 +124,9 @@
// CHECK: define [[A:%.*]]* @_ZN5test64testEt(i16 zeroext
// CHECK: [[N:%.*]] = zext i16 {{%.*}} to i32
- // CHECK-NEXT: [[T0:%.*]] = call [[OVR_T]] @llvm.umul.with.overflow.i32(i32 [[N]], i32 4)
- // CHECK-NEXT: [[T1:%.*]] = extractvalue [[OVR_T]] [[T0]], 1
- // CHECK-NEXT: [[T2:%.*]] = extractvalue [[OVR_T]] [[T0]], 0
+ // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 4)
+ // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1
+ // CHECK-NEXT: [[T2:%.*]] = extractvalue { i32, i1 } [[T0]], 0
// CHECK-NEXT: [[T3:%.*]] = select i1 [[T1]], i32 -1, i32 [[T2]]
// CHECK-NEXT: call noalias i8* @_Znaj(i32 [[T3]])
// CHECK: icmp ult i32 {{.*}}, [[N]]
@@ -148,9 +146,9 @@
// CHECK: define [100 x [[A:%.*]]]* @_ZN5test74testEt(i16 zeroext
// CHECK: [[N:%.*]] = zext i16 {{%.*}} to i32
- // CHECK-NEXT: [[T0:%.*]] = call [[OVR_T]] @llvm.umul.with.overflow.i32(i32 [[N]], i32 400)
- // CHECK-NEXT: [[T1:%.*]] = extractvalue [[OVR_T]] [[T0]], 1
- // CHECK-NEXT: [[T2:%.*]] = extractvalue [[OVR_T]] [[T0]], 0
+ // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 400)
+ // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1
+ // CHECK-NEXT: [[T2:%.*]] = extractvalue { i32, i1 } [[T0]], 0
// CHECK-NEXT: [[T3:%.*]] = mul i32 [[N]], 100
// CHECK-NEXT: [[T4:%.*]] = select i1 [[T1]], i32 -1, i32 [[T2]]
// CHECK-NEXT: call noalias i8* @_Znaj(i32 [[T4]])
@@ -173,10 +171,10 @@
// CHECK: [[N:%.*]] = load i64*
// CHECK-NEXT: [[T0:%.*]] = icmp uge i64 [[N]], 4294967296
// CHECK-NEXT: [[T1:%.*]] = trunc i64 [[N]] to i32
- // CHECK-NEXT: [[T2:%.*]] = call [[OVR_T]] @llvm.umul.with.overflow.i32(i32 [[T1]], i32 4)
- // CHECK-NEXT: [[T3:%.*]] = extractvalue [[OVR_T]] [[T2]], 1
+ // CHECK-NEXT: [[T2:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[T1]], i32 4)
+ // CHECK-NEXT: [[T3:%.*]] = extractvalue { i32, i1 } [[T2]], 1
// CHECK-NEXT: [[T4:%.*]] = or i1 [[T0]], [[T3]]
- // CHECK-NEXT: [[T5:%.*]] = extractvalue [[OVR_T]] [[T2]], 0
+ // CHECK-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T2]], 0
// CHECK-NEXT: [[T6:%.*]] = select i1 [[T4]], i32 -1, i32 [[T5]]
// CHECK-NEXT: call noalias i8* @_Znaj(i32 [[T6]])
// CHECK: icmp ult i32 {{.*}}, [[T1]]
@@ -198,10 +196,10 @@
// CHECK: [[N:%.*]] = load i64*
// CHECK-NEXT: [[T0:%.*]] = icmp uge i64 [[N]], 4294967296
// CHECK-NEXT: [[T1:%.*]] = trunc i64 [[N]] to i32
- // CHECK-NEXT: [[T2:%.*]] = call [[OVR_T]] @llvm.umul.with.overflow.i32(i32 [[T1]], i32 4)
- // CHECK-NEXT: [[T3:%.*]] = extractvalue [[OVR_T]] [[T2]], 1
+ // CHECK-NEXT: [[T2:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[T1]], i32 4)
+ // CHECK-NEXT: [[T3:%.*]] = extractvalue { i32, i1 } [[T2]], 1
// CHECK-NEXT: [[T4:%.*]] = or i1 [[T0]], [[T3]]
- // CHECK-NEXT: [[T5:%.*]] = extractvalue [[OVR_T]] [[T2]], 0
+ // CHECK-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T2]], 0
// CHECK-NEXT: [[T6:%.*]] = select i1 [[T4]], i32 -1, i32 [[T5]]
// CHECK-NEXT: call noalias i8* @_Znaj(i32 [[T6]])
// CHECK: icmp ult i32 {{.*}}, [[T1]]