Mips specific inline assembler constraint 'R'
'R' An address that can be sued in a non-macro load or store.
This patch includes a positive test case.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@176453 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index c63ccce..9ff4ac0 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -4486,6 +4486,9 @@
case 'x': // hilo register pair
Info.setAllowsRegister();
return true;
+ case 'R': // An address tha can be used in a non-macro load or store
+ Info.setAllowsMemory();
+ return true;
}
}