commit f7a9da053f5bd6c18450c1796d953b42c3b7ad3a
author Bill Wendling <isanbard@gmail.com> Wed Feb 20 07:22:19 2013 +0000
committer Bill Wendling <isanbard@gmail.com> Wed Feb 20 07:22:19 2013 +0000
tree 3a4accecdb98419478035c3bf5be57df768e0625
parent 5251abea41b446c26e3239c8dd6c7edea6fc335d

Modify the tests to use attribute group references instead of listing the
function attributes.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@175606 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/mips-vector-arg.c

diff --git a/test/CodeGen/mips-vector-arg.c b/test/CodeGen/mips-vector-arg.c
index 584192f..9b2b35c 100644
--- a/test/CodeGen/mips-vector-arg.c
+++ b/test/CodeGen/mips-vector-arg.c
@@ -8,21 +8,26 @@
 typedef float  v4sf __attribute__ ((__vector_size__ (16)));
 typedef int v4i32 __attribute__ ((__vector_size__ (16)));
 
-// O32: define void @test_v4sf(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) nounwind 
+// O32: define void @test_v4sf(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) #0
 // O32: declare i32 @test_v4sf_2(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
-// N64: define void @test_v4sf(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) nounwind
+// N64: define void @test_v4sf(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) #0
 // N64: declare i32 @test_v4sf_2(i64, i64, i32, i64, i64, i64)
 extern test_v4sf_2(v4sf, int, v4sf);
 void test_v4sf(v4sf a1, int a2, v4sf a3) {
   test_v4sf_2(a3, a2, a1);
 }
 
-// O32: define void @test_v4i32(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) nounwind 
+// O32: define void @test_v4i32(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) #0
 // O32: declare i32 @test_v4i32_2(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
-// N64: define void @test_v4i32(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) nounwind
+// N64: define void @test_v4i32(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) #0
 // N64: declare i32 @test_v4i32_2(i64, i64, i32, i64, i64, i64)
 extern test_v4i32_2(v4i32, int, v4i32);
 void test_v4i32(v4i32 a1, int a2, v4i32 a3) {
   test_v4i32_2(a3, a2, a1);
 }
 
+// O32: attributes #0 = { nounwind "target-cpu"={{.*}} "target-features"={{.*}} }
+// O32: attributes #1 = { "target-cpu"={{.*}} "target-features"={{.*}} }
+
+// N64: attributes #0 = { nounwind "target-cpu"={{.*}} "target-features"={{.*}} }
+// N64: attributes #1 = { "target-cpu"={{.*}} "target-features"={{.*}} }