- cdab59a [NFC] Simplify build by removing inl files. (#139) by Guillaume Chatelet · 3 years, 8 months ago
- 9a8f04b [NFC] Generate separate tables via macro (#137) by Guillaume Chatelet · 3 years, 8 months ago
- 3cc8f31 [NFC] Update copyright from Google Inc. to Google LLC by Guillaume Chatelet · 3 years, 8 months ago
- e63405f Remove need for utsname (#136) by Guillaume Chatelet · 3 years, 9 months ago
- 4795373 Fix SSE detection on non-AVX CPUs (#135) by Guillaume Chatelet · 3 years, 9 months ago
- 17ffb65 detect AVX-512 FMA count (#125) by Jeff Hammond · 3 years, 9 months ago
- 76dafc7 [NFC] Remove unused `max_cpuid_leaf` variable (#131) by Guillaume Chatelet · 3 years, 9 months ago
- 33bd72c detect future Intel AVX/AMX features (#124) by Jeff Hammond · 3 years, 9 months ago
- e698327 add future Intel microarchitectures (#123) by Jeff Hammond · 3 years, 9 months ago
- 339bfd3 Add OsSupport structure by Corentin Le Molgat · 4 years, 3 months ago
- 404e462 Move AMD extra flags to its own function by Corentin Le Molgat · 4 years, 3 months ago
- 3262a55 Support x86 FMA4 and SSE4A features by gadoofou87 · 4 years, 3 months ago
- e50d7db [NFC] Use Designated Initializers by Guillaume Chatelet · 4 years, 5 months ago
- 24b8a1d Add INTEL_WHL and INTEL_ICL to uarch get name function by Moxeja · 4 years, 6 months ago
- 73a121b Differentiate between different Lake uarch by Moxeja · 4 years, 6 months ago
- 8a6fd87 [NFC] Fixed signed shift by Guillaume Chatelet · 4 years, 7 months ago
- be306b7 [NFC] fix unused and shadowing variables by Guillaume Chatelet · 4 years, 7 months ago
- bdb36d9 Fix a few compile warnings (#84) by Leonard Mosescu · 5 years ago
- 653d581 Add support for leaf2 and leaf4 on Intel's x86 arch (#80) by Artem Alekseev · 5 years ago
- bfb4cf9 Add CpuIdEx function to pass inputs in ecx register (required for E.g. leaf4) (#77) by Artem Alekseev · 5 years ago
- 3ee4a9e Support x86 DCA and SS features (#76) by Artem Alekseev · 5 years ago
- 367bc42 Support x86 features: FPU, TSC, CX8, CLFSH, MMX, VAES, HLE, RTM, RDSEED, CLFLUSHOPT, CLWB, SSE, SSE2, SSE3, PCLMULQDQ (#73) by Dr.-Ing. Patrick Siegl · 5 years ago
- 084ec5c Convert XGETBV to equivalent byte form in GetXCR0Eax (#69) by natanbc · 5 years ago
- d395dfa Add x86 missing feature detections for ndk_compat (#58) by Guillaume Chatelet · 5 years ago
- dfdac6a Add partial implementation of ndk_compat (#54) by Guillaume Chatelet · 5 years ago
- e8e5610 Per arch build and inlining of cpuid_x86. by Guillaume Chatelet · 5 years ago
- 9d9134c Parantheses added to CPUID macro by fuzun · 6 years ago
- 9b872ce Add cx16 (cmpxchg16b) cpuid flag. Fixes #30 by Guillaume Chatelet · 6 years ago
- 0f1f3ac sort the detection by leaf and bit by Patrik Fiedler · 6 years ago
- 3ee0d62 detect intel sgx and smx cpu features for the x86 arch by Patrik Fiedler · 6 years ago
- 11e3e20 Reverting 338484f6f2176c3d8ede0ed2f3fbd6cf1eb0274c. Fixes #2 by Guillaume Chatelet · 6 years ago
- 338484f Fixes #2 - vpclmulqdq should be pclmulqdq. by Guillaume Chatelet · 6 years ago
- 439d371 Adding code. Closes #0. by Guillaume Chatelet · 6 years ago