Build mock test for ARM64
diff --git a/test/galaxy-c9-pro.cc b/test/galaxy-c9-pro.cc
index adb477c..d43a6fc 100644
--- a/test/galaxy-c9-pro.cc
+++ b/test/galaxy-c9-pro.cc
@@ -92,6 +92,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -163,6 +164,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -184,6 +186,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/galaxy-j7-tmobile.cc b/test/galaxy-j7-tmobile.cc
index 80bed3e..f046bdc 100644
--- a/test/galaxy-j7-tmobile.cc
+++ b/test/galaxy-j7-tmobile.cc
@@ -79,6 +79,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -150,6 +151,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -171,6 +173,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/galaxy-j7-uae.cc b/test/galaxy-j7-uae.cc
index 5276776..1d7f5e9 100644
--- a/test/galaxy-j7-uae.cc
+++ b/test/galaxy-j7-uae.cc
@@ -79,6 +79,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -150,6 +151,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -171,6 +173,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/galaxy-s6.cc b/test/galaxy-s6.cc
index 06ccf1a..ab8ffca 100644
--- a/test/galaxy-s6.cc
+++ b/test/galaxy-s6.cc
@@ -92,6 +92,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -163,6 +164,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -184,6 +186,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/galaxy-s7-global.cc b/test/galaxy-s7-global.cc
index 78ed7e4..9c12ffb 100644
--- a/test/galaxy-s7-global.cc
+++ b/test/galaxy-s7-global.cc
@@ -105,6 +105,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -176,6 +177,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -197,6 +199,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/galaxy-s7-us.cc b/test/galaxy-s7-us.cc
index 9867459..072be7f 100644
--- a/test/galaxy-s7-us.cc
+++ b/test/galaxy-s7-us.cc
@@ -75,6 +75,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -146,6 +147,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -167,6 +169,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(4, l1i.count);
diff --git a/test/galaxy-s8-global.cc b/test/galaxy-s8-global.cc
index 8f8eb25..43f5272 100644
--- a/test/galaxy-s8-global.cc
+++ b/test/galaxy-s8-global.cc
@@ -105,6 +105,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -176,6 +177,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -197,6 +199,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/galaxy-s8-us.cc b/test/galaxy-s8-us.cc
index e2d722d..5663821 100644
--- a/test/galaxy-s8-us.cc
+++ b/test/galaxy-s8-us.cc
@@ -92,6 +92,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -163,6 +164,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -184,6 +186,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/huawei-mate-8.cc b/test/huawei-mate-8.cc
index 255b0b5..fcc860f 100644
--- a/test/huawei-mate-8.cc
+++ b/test/huawei-mate-8.cc
@@ -92,6 +92,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -163,6 +164,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -184,6 +186,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/huawei-p9-lite.cc b/test/huawei-p9-lite.cc
index b34883f..f87738b 100644
--- a/test/huawei-p9-lite.cc
+++ b/test/huawei-p9-lite.cc
@@ -79,6 +79,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -150,6 +151,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -171,6 +173,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/meizu-pro-6s.cc b/test/meizu-pro-6s.cc
index e1f905b..fbcc7bf 100644
--- a/test/meizu-pro-6s.cc
+++ b/test/meizu-pro-6s.cc
@@ -98,6 +98,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -169,6 +170,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -190,6 +192,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(10, l1i.count);
diff --git a/test/nexus5x.cc b/test/nexus5x.cc
index 1093e10..d5be448 100644
--- a/test/nexus5x.cc
+++ b/test/nexus5x.cc
@@ -88,6 +88,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -159,6 +160,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -180,6 +182,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(6, l1i.count);
diff --git a/test/nexus6p.cc b/test/nexus6p.cc
index 88215b8..ccc5c95 100644
--- a/test/nexus6p.cc
+++ b/test/nexus6p.cc
@@ -92,6 +92,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -163,6 +164,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -184,6 +186,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/oppo-r9.cc b/test/oppo-r9.cc
index 2a27d1a..1013204 100644
--- a/test/oppo-r9.cc
+++ b/test/oppo-r9.cc
@@ -79,6 +79,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -150,6 +151,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -171,6 +173,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);
diff --git a/test/pixel-c.cc b/test/pixel-c.cc
index 2a40a62..e2572b3 100644
--- a/test/pixel-c.cc
+++ b/test/pixel-c.cc
@@ -66,6 +66,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -137,6 +138,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -158,6 +160,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(4, l1i.count);
diff --git a/test/pixel-xl.cc b/test/pixel-xl.cc
index 6644134..1acebfd 100644
--- a/test/pixel-xl.cc
+++ b/test/pixel-xl.cc
@@ -75,6 +75,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -146,6 +147,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -167,6 +169,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(4, l1i.count);
diff --git a/test/pixel.cc b/test/pixel.cc
index 32bc855..7677739 100644
--- a/test/pixel.cc
+++ b/test/pixel.cc
@@ -75,6 +75,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -146,6 +147,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -167,6 +169,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(4, l1i.count);
diff --git a/test/scaleway.cc b/test/scaleway.cc
index 531dd15..c53facb 100644
--- a/test/scaleway.cc
+++ b/test/scaleway.cc
@@ -24,7 +24,6 @@
}
}
-#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -96,7 +95,6 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
-#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
diff --git a/test/xperia-c4-dual.cc b/test/xperia-c4-dual.cc
index bd4e77d..74ba90f 100644
--- a/test/xperia-c4-dual.cc
+++ b/test/xperia-c4-dual.cc
@@ -79,6 +79,7 @@
}
}
+#if CPUINFO_ARCH_ARM
TEST(ISA, thumb) {
ASSERT_TRUE(cpuinfo_isa.thumb);
}
@@ -150,6 +151,7 @@
TEST(ISA, neon) {
ASSERT_TRUE(cpuinfo_isa.neon);
}
+#endif /* CPUINFO_ARCH_ARM */
TEST(ISA, aes) {
ASSERT_TRUE(cpuinfo_isa.aes);
@@ -171,6 +173,28 @@
ASSERT_TRUE(cpuinfo_isa.crc32);
}
+#if CPUINFO_ARCH_ARM64
+TEST(ISA, atomics) {
+ ASSERT_FALSE(cpuinfo_isa.atomics);
+}
+
+TEST(ISA, rdm) {
+ ASSERT_FALSE(cpuinfo_isa.rdm);
+}
+
+TEST(ISA, fp16arith) {
+ ASSERT_FALSE(cpuinfo_isa.fp16arith);
+}
+
+TEST(ISA, jscvt) {
+ ASSERT_FALSE(cpuinfo_isa.jscvt);
+}
+
+TEST(ISA, fcma) {
+ ASSERT_FALSE(cpuinfo_isa.fcma);
+}
+#endif /* CPUINFO_ARCH_ARM64 */
+
TEST(L1I, count) {
cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
ASSERT_EQ(8, l1i.count);