Enable all cache test on Galaxy S9 (US)
diff --git a/test/mock/galaxy-s9-us.cc b/test/mock/galaxy-s9-us.cc
index 9b30949..4e81832 100644
--- a/test/mock/galaxy-s9-us.cc
+++ b/test/mock/galaxy-s9-us.cc
@@ -80,13 +80,13 @@
}
}
-TEST(PROCESSORS, DISABLED_l2) {
+TEST(PROCESSORS, l2) {
for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
ASSERT_EQ(cpuinfo_get_l2_cache(i), cpuinfo_get_processor(i)->cache.l2);
}
}
-TEST(PROCESSORS, DISABLED_l3) {
+TEST(PROCESSORS, l3) {
for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
ASSERT_EQ(cpuinfo_get_l3_cache(0), cpuinfo_get_processor(i)->cache.l3);
}
@@ -531,7 +531,7 @@
ASSERT_TRUE(cpuinfo_get_l1i_caches());
}
-TEST(L1I, DISABLED_size) {
+TEST(L1I, size) {
for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
switch (i) {
case 0:
@@ -550,7 +550,7 @@
}
}
-TEST(L1I, DISABLED_associativity) {
+TEST(L1I, associativity) {
for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity);
}
@@ -596,7 +596,7 @@
ASSERT_TRUE(cpuinfo_get_l1d_caches());
}
-TEST(L1D, DISABLED_size) {
+TEST(L1D, size) {
for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
switch (i) {
case 0:
@@ -615,7 +615,7 @@
}
}
-TEST(L1D, DISABLED_associativity) {
+TEST(L1D, associativity) {
for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
switch (i) {
case 0:
@@ -666,7 +666,7 @@
}
}
-TEST(L2, DISABLED_count) {
+TEST(L2, count) {
ASSERT_EQ(8, cpuinfo_get_l2_caches_count());
}
@@ -674,26 +674,26 @@
ASSERT_TRUE(cpuinfo_get_l2_caches());
}
-TEST(L2, DISABLED_size) {
+TEST(L2, size) {
for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
switch (i) {
case 0:
case 1:
case 2:
case 3:
- ASSERT_EQ(128 * 1024, cpuinfo_get_l2_cache(i)->size);
+ ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size);
break;
case 4:
case 5:
case 6:
case 7:
- ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size);
+ ASSERT_EQ(128 * 1024, cpuinfo_get_l2_cache(i)->size);
break;
}
}
}
-TEST(L2, DISABLED_associativity) {
+TEST(L2, associativity) {
for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
switch (i) {
case 0:
@@ -731,36 +731,36 @@
}
}
-TEST(L2, DISABLED_flags) {
+TEST(L2, flags) {
for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
}
}
-TEST(L2, DISABLED_processors) {
+TEST(L2, processors) {
for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
ASSERT_EQ(i, cpuinfo_get_l2_cache(i)->processor_start);
ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->processor_count);
}
}
-TEST(L3, DISABLED_count) {
+TEST(L3, count) {
ASSERT_EQ(1, cpuinfo_get_l3_caches_count());
}
-TEST(L3, DISABLED_non_null) {
+TEST(L3, non_null) {
ASSERT_TRUE(cpuinfo_get_l3_caches());
}
-TEST(L3, DISABLED_size) {
+TEST(L3, size) {
for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
ASSERT_EQ(2 * 1024 * 1024, cpuinfo_get_l3_cache(i)->size);
}
}
-TEST(L3, DISABLED_associativity) {
+TEST(L3, associativity) {
for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
- ASSERT_EQ(8, cpuinfo_get_l3_cache(i)->associativity);
+ ASSERT_EQ(16, cpuinfo_get_l3_cache(i)->associativity);
}
}
@@ -783,7 +783,7 @@
}
}
-TEST(L3, DISABLED_flags) {
+TEST(L3, flags) {
for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
ASSERT_EQ(0, cpuinfo_get_l3_cache(i)->flags);
}