Fix ARM32 /proc/cpuinfo dumps on 5 phones
diff --git a/test/cpuinfo/galaxy-s7-us.armeabi.log b/test/cpuinfo/galaxy-s7-us.armeabi.log
index 1e9b672..ad0bba5 100644
--- a/test/cpuinfo/galaxy-s7-us.armeabi.log
+++ b/test/cpuinfo/galaxy-s7-us.armeabi.log
@@ -1,38 +1,38 @@
-processor	: 0

-model name	: AArch64 Processor rev 2 (aarch64)

-Features	: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32

-CPU implementer	: 0x51

-CPU architecture: 8

-CPU variant	: 0x1

-CPU part	: 0x211

-CPU revision	: 2

-

-processor	: 1

-model name	: AArch64 Processor rev 2 (aarch64)

-Features	: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32

-CPU implementer	: 0x51

-CPU architecture: 8

-CPU variant	: 0x1

-CPU part	: 0x211

-CPU revision	: 2

-

-processor	: 2

-model name	: AArch64 Processor rev 2 (aarch64)

-Features	: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32

-CPU implementer	: 0x51

-CPU architecture: 8

-CPU variant	: 0x1

-CPU part	: 0x205

-CPU revision	: 2

-

-processor	: 3

-model name	: AArch64 Processor rev 2 (aarch64)

-Features	: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32

-CPU implementer	: 0x51

-CPU architecture: 8

-CPU variant	: 0x1

-CPU part	: 0x205

-CPU revision	: 2

-

-Hardware	: Qualcomm Technologies, Inc MSM8996

-Revision	: 000f

+processor	: 0
+model name	: AArch64 Processor rev 2 (aarch64)
+Features	: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32
+CPU implementer	: 0x51
+CPU architecture: 8
+CPU variant	: 0x1
+CPU part	: 0x211
+CPU revision	: 2
+
+processor	: 1
+model name	: AArch64 Processor rev 2 (aarch64)
+Features	: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32
+CPU implementer	: 0x51
+CPU architecture: 8
+CPU variant	: 0x1
+CPU part	: 0x211
+CPU revision	: 2
+
+processor	: 2
+model name	: AArch64 Processor rev 2 (aarch64)
+Features	: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32
+CPU implementer	: 0x51
+CPU architecture: 8
+CPU variant	: 0x1
+CPU part	: 0x205
+CPU revision	: 2
+
+processor	: 3
+model name	: AArch64 Processor rev 2 (aarch64)
+Features	: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32
+CPU implementer	: 0x51
+CPU architecture: 8
+CPU variant	: 0x1
+CPU part	: 0x205
+CPU revision	: 2
+
+Hardware	: Qualcomm Technologies, Inc MSM8996
+Revision	: 000f
\ No newline at end of file
diff --git a/test/cpuinfo/huawei-p8-lite.armeabi.log b/test/cpuinfo/huawei-p8-lite.armeabi.log
index 1ae8c23..e8115da 100644
--- a/test/cpuinfo/huawei-p8-lite.armeabi.log
+++ b/test/cpuinfo/huawei-p8-lite.armeabi.log
@@ -1,17 +1,17 @@
-Processor	: AArch64 Processor rev 3 (aarch64)

-processor	: 0

-processor	: 1

-processor	: 2

-processor	: 3

-processor	: 4

-processor	: 5

-processor	: 6

-processor	: 7

-Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt 

-CPU implementer	: 0x41

-CPU architecture: 8

-CPU variant	: 0x0

-CPU part	: 0xd03

-CPU revision	: 3

-

-Hardware	: hi6210sft

+Processor	: AArch64 Processor rev 3 (aarch64)
+processor	: 0
+processor	: 1
+processor	: 2
+processor	: 3
+processor	: 4
+processor	: 5
+processor	: 6
+processor	: 7
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt 
+CPU implementer	: 0x41
+CPU architecture: 8
+CPU variant	: 0x0
+CPU part	: 0xd03
+CPU revision	: 3
+
+Hardware	: hi6210sft
\ No newline at end of file
diff --git a/test/cpuinfo/huawei-p9-lite.armeabi.log b/test/cpuinfo/huawei-p9-lite.armeabi.log
index e9500c7..4baa8b6 100644
--- a/test/cpuinfo/huawei-p9-lite.armeabi.log
+++ b/test/cpuinfo/huawei-p9-lite.armeabi.log
@@ -1,17 +1,17 @@
-Processor	: AArch64 Processor rev 4 (aarch64)

-processor	: 0

-processor	: 1

-processor	: 2

-processor	: 3

-processor	: 4

-processor	: 5

-processor	: 6

-processor	: 7

-Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt 

-CPU implementer	: 0x41

-CPU architecture: 8

-CPU variant	: 0x0

-CPU part	: 0xd03

-CPU revision	: 4

-

-Hardware	: hi6250

+Processor	: AArch64 Processor rev 4 (aarch64)
+processor	: 0
+processor	: 1
+processor	: 2
+processor	: 3
+processor	: 4
+processor	: 5
+processor	: 6
+processor	: 7
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt 
+CPU implementer	: 0x41
+CPU architecture: 8
+CPU variant	: 0x0
+CPU part	: 0xd03
+CPU revision	: 4
+
+Hardware	: hi6250
\ No newline at end of file
diff --git a/test/cpuinfo/oppo-r9.armeabi.log b/test/cpuinfo/oppo-r9.armeabi.log
index 3413d8c..4297045 100644
--- a/test/cpuinfo/oppo-r9.armeabi.log
+++ b/test/cpuinfo/oppo-r9.armeabi.log
@@ -1,13 +1,11 @@
-WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6ffffffe arg 0x52c

-WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6fffffff arg 0x1

-Processor	: AArch64 Processor rev 2 (aarch64)

-processor	: 0

-BogoMIPS	: 26.00

-Features	: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt 

-CPU implementer	: 0x41

-CPU architecture: 8

-CPU variant	: 0x0

-CPU part	: 0xd03

-CPU revision	: 2

-

-Hardware	: MT6755

+Processor	: AArch64 Processor rev 2 (aarch64)
+processor	: 0
+BogoMIPS	: 26.00
+Features	: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt 
+CPU implementer	: 0x41
+CPU architecture: 8
+CPU variant	: 0x0
+CPU part	: 0xd03
+CPU revision	: 2
+
+Hardware	: MT6755
\ No newline at end of file
diff --git a/test/cpuinfo/xperia-c4-dual.armeabi.log b/test/cpuinfo/xperia-c4-dual.armeabi.log
index 255cb21..f8d63d2 100644
--- a/test/cpuinfo/xperia-c4-dual.armeabi.log
+++ b/test/cpuinfo/xperia-c4-dual.armeabi.log
@@ -1,13 +1,11 @@
-WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6ffffffe arg 0x52c

-WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6fffffff arg 0x1

-Processor	: AArch64 Processor rev 2 (aarch64)

-processor	: 0

-BogoMIPS	: 26.00

-Features	: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt 

-CPU implementer	: 0x41

-CPU architecture: 8

-CPU variant	: 0x0

-CPU part	: 0xd03

-CPU revision	: 2

-

-Hardware	: MT6752

+Processor	: AArch64 Processor rev 2 (aarch64)
+processor	: 0
+BogoMIPS	: 26.00
+Features	: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt 
+CPU implementer	: 0x41
+CPU architecture: 8
+CPU variant	: 0x0
+CPU part	: 0xd03
+CPU revision	: 2
+
+Hardware	: MT6752
\ No newline at end of file
diff --git a/test/mock/galaxy-s7-us.h b/test/mock/galaxy-s7-us.h
index 7f8c4ef..f4a1a8c 100644
--- a/test/mock/galaxy-s7-us.h
+++ b/test/mock/galaxy-s7-us.h
@@ -46,46 +46,46 @@
 #elif CPUINFO_ARCH_ARM
 	{
 		.path = "/proc/cpuinfo",
-		.size = 1176,
+		.size = 1137,
 		.content =
-			"processor\t: 0\r\n"
-			"model name\t: AArch64 Processor rev 2 (aarch64)\r\n"
-			"Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\r\n"
-			"CPU implementer\t: 0x51\r\n"
-			"CPU architecture: 8\r\n"
-			"CPU variant\t: 0x1\r\n"
-			"CPU part\t: 0x211\r\n"
-			"CPU revision\t: 2\r\n"
-			"\r\n"
-			"processor\t: 1\r\n"
-			"model name\t: AArch64 Processor rev 2 (aarch64)\r\n"
-			"Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\r\n"
-			"CPU implementer\t: 0x51\r\n"
-			"CPU architecture: 8\r\n"
-			"CPU variant\t: 0x1\r\n"
-			"CPU part\t: 0x211\r\n"
-			"CPU revision\t: 2\r\n"
-			"\r\n"
-			"processor\t: 2\r\n"
-			"model name\t: AArch64 Processor rev 2 (aarch64)\r\n"
-			"Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\r\n"
-			"CPU implementer\t: 0x51\r\n"
-			"CPU architecture: 8\r\n"
-			"CPU variant\t: 0x1\r\n"
-			"CPU part\t: 0x205\r\n"
-			"CPU revision\t: 2\r\n"
-			"\r\n"
-			"processor\t: 3\r\n"
-			"model name\t: AArch64 Processor rev 2 (aarch64)\r\n"
-			"Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\r\n"
-			"CPU implementer\t: 0x51\r\n"
-			"CPU architecture: 8\r\n"
-			"CPU variant\t: 0x1\r\n"
-			"CPU part\t: 0x205\r\n"
-			"CPU revision\t: 2\r\n"
-			"\r\n"
-			"Hardware\t: Qualcomm Technologies, Inc MSM8996\r\n"
-			"Revision\t: 000f\r\n",
+			"processor\t: 0\n"
+			"model name\t: AArch64 Processor rev 2 (aarch64)\n"
+			"Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n"
+			"CPU implementer\t: 0x51\n"
+			"CPU architecture: 8\n"
+			"CPU variant\t: 0x1\n"
+			"CPU part\t: 0x211\n"
+			"CPU revision\t: 2\n"
+			"\n"
+			"processor\t: 1\n"
+			"model name\t: AArch64 Processor rev 2 (aarch64)\n"
+			"Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n"
+			"CPU implementer\t: 0x51\n"
+			"CPU architecture: 8\n"
+			"CPU variant\t: 0x1\n"
+			"CPU part\t: 0x211\n"
+			"CPU revision\t: 2\n"
+			"\n"
+			"processor\t: 2\n"
+			"model name\t: AArch64 Processor rev 2 (aarch64)\n"
+			"Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n"
+			"CPU implementer\t: 0x51\n"
+			"CPU architecture: 8\n"
+			"CPU variant\t: 0x1\n"
+			"CPU part\t: 0x205\n"
+			"CPU revision\t: 2\n"
+			"\n"
+			"processor\t: 3\n"
+			"model name\t: AArch64 Processor rev 2 (aarch64)\n"
+			"Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n"
+			"CPU implementer\t: 0x51\n"
+			"CPU architecture: 8\n"
+			"CPU variant\t: 0x1\n"
+			"CPU part\t: 0x205\n"
+			"CPU revision\t: 2\n"
+			"\n"
+			"Hardware\t: Qualcomm Technologies, Inc MSM8996\n"
+			"Revision\t: 000f",
 	},
 #endif
 	{
diff --git a/test/mock/huawei-p8-lite.h b/test/mock/huawei-p8-lite.h
index ed7f3c9..d0754bf 100644
--- a/test/mock/huawei-p8-lite.h
+++ b/test/mock/huawei-p8-lite.h
@@ -25,25 +25,25 @@
 #elif CPUINFO_ARCH_ARM
 	{
 		.path = "/proc/cpuinfo",
-		.size = 413,
+		.size = 395,
 		.content =
-			"Processor\t: AArch64 Processor rev 3 (aarch64)\r\n"
-			"processor\t: 0\r\n"
-			"processor\t: 1\r\n"
-			"processor\t: 2\r\n"
-			"processor\t: 3\r\n"
-			"processor\t: 4\r\n"
-			"processor\t: 5\r\n"
-			"processor\t: 6\r\n"
-			"processor\t: 7\r\n"
-			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \r\n"
-			"CPU implementer\t: 0x41\r\n"
-			"CPU architecture: 8\r\n"
-			"CPU variant\t: 0x0\r\n"
-			"CPU part\t: 0xd03\r\n"
-			"CPU revision\t: 3\r\n"
-			"\r\n"
-			"Hardware\t: hi6210sft\r\n",
+			"Processor\t: AArch64 Processor rev 3 (aarch64)\n"
+			"processor\t: 0\n"
+			"processor\t: 1\n"
+			"processor\t: 2\n"
+			"processor\t: 3\n"
+			"processor\t: 4\n"
+			"processor\t: 5\n"
+			"processor\t: 6\n"
+			"processor\t: 7\n"
+			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \n"
+			"CPU implementer\t: 0x41\n"
+			"CPU architecture: 8\n"
+			"CPU variant\t: 0x0\n"
+			"CPU part\t: 0xd03\n"
+			"CPU revision\t: 3\n"
+			"\n"
+			"Hardware\t: hi6210sft",
 	},
 #endif
 	{
diff --git a/test/mock/huawei-p9-lite.h b/test/mock/huawei-p9-lite.h
index bed7330..e5539b8 100644
--- a/test/mock/huawei-p9-lite.h
+++ b/test/mock/huawei-p9-lite.h
@@ -25,25 +25,25 @@
 #elif CPUINFO_ARCH_ARM
 	{
 		.path = "/proc/cpuinfo",
-		.size = 410,
+		.size = 392,
 		.content =
-			"Processor\t: AArch64 Processor rev 4 (aarch64)\r\n"
-			"processor\t: 0\r\n"
-			"processor\t: 1\r\n"
-			"processor\t: 2\r\n"
-			"processor\t: 3\r\n"
-			"processor\t: 4\r\n"
-			"processor\t: 5\r\n"
-			"processor\t: 6\r\n"
-			"processor\t: 7\r\n"
-			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \r\n"
-			"CPU implementer\t: 0x41\r\n"
-			"CPU architecture: 8\r\n"
-			"CPU variant\t: 0x0\r\n"
-			"CPU part\t: 0xd03\r\n"
-			"CPU revision\t: 4\r\n"
-			"\r\n"
-			"Hardware\t: hi6250\r\n",
+			"Processor\t: AArch64 Processor rev 4 (aarch64)\n"
+			"processor\t: 0\n"
+			"processor\t: 1\n"
+			"processor\t: 2\n"
+			"processor\t: 3\n"
+			"processor\t: 4\n"
+			"processor\t: 5\n"
+			"processor\t: 6\n"
+			"processor\t: 7\n"
+			"Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \n"
+			"CPU implementer\t: 0x41\n"
+			"CPU architecture: 8\n"
+			"CPU variant\t: 0x0\n"
+			"CPU part\t: 0xd03\n"
+			"CPU revision\t: 4\n"
+			"\n"
+			"Hardware\t: hi6250",
 	},
 #endif
 	{
diff --git a/test/mock/oppo-r9.h b/test/mock/oppo-r9.h
index 6ea02e1..5b687a2 100644
--- a/test/mock/oppo-r9.h
+++ b/test/mock/oppo-r9.h
@@ -27,21 +27,19 @@
 #elif CPUINFO_ARCH_ARM
 	{
 		.path = "/proc/cpuinfo",
-		.size = 495,
+		.size = 303,
 		.content =
-			"WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6ffffffe arg 0x52c\r\n"
-			"WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6fffffff arg 0x1\r\n"
-			"Processor\t: AArch64 Processor rev 2 (aarch64)\r\n"
-			"processor\t: 0\r\n"
-			"BogoMIPS\t: 26.00\r\n"
-			"Features\t: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \r\n"
-			"CPU implementer\t: 0x41\r\n"
-			"CPU architecture: 8\r\n"
-			"CPU variant\t: 0x0\r\n"
-			"CPU part\t: 0xd03\r\n"
-			"CPU revision\t: 2\r\n"
-			"\r\n"
-			"Hardware\t: MT6755\r\n",
+			"Processor\t: AArch64 Processor rev 2 (aarch64)\n"
+			"processor\t: 0\n"
+			"BogoMIPS\t: 26.00\n"
+			"Features\t: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \n"
+			"CPU implementer\t: 0x41\n"
+			"CPU architecture: 8\n"
+			"CPU variant\t: 0x0\n"
+			"CPU part\t: 0xd03\n"
+			"CPU revision\t: 2\n"
+			"\n"
+			"Hardware\t: MT6755",
 	},
 #endif
 	{
diff --git a/test/mock/xperia-c4-dual.h b/test/mock/xperia-c4-dual.h
index 1606aaa..fe84a1f 100644
--- a/test/mock/xperia-c4-dual.h
+++ b/test/mock/xperia-c4-dual.h
@@ -19,21 +19,19 @@
 #elif CPUINFO_ARCH_ARM
 	{
 		.path = "/proc/cpuinfo",
-		.size = 495,
+		.size = 303,
 		.content =
-			"WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6ffffffe arg 0x52c\r\n"
-			"WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6fffffff arg 0x1\r\n"
-			"Processor\t: AArch64 Processor rev 2 (aarch64)\r\n"
-			"processor\t: 0\r\n"
-			"BogoMIPS\t: 26.00\r\n"
-			"Features\t: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \r\n"
-			"CPU implementer\t: 0x41\r\n"
-			"CPU architecture: 8\r\n"
-			"CPU variant\t: 0x0\r\n"
-			"CPU part\t: 0xd03\r\n"
-			"CPU revision\t: 2\r\n"
-			"\r\n"
-			"Hardware\t: MT6752\r\n",
+			"Processor\t: AArch64 Processor rev 2 (aarch64)\n"
+			"processor\t: 0\n"
+			"BogoMIPS\t: 26.00\n"
+			"Features\t: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \n"
+			"CPU implementer\t: 0x41\n"
+			"CPU architecture: 8\n"
+			"CPU variant\t: 0x0\n"
+			"CPU part\t: 0xd03\n"
+			"CPU revision\t: 2\n"
+			"\n"
+			"Hardware\t: MT6752",
 	},
 #endif
 	{