Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 1 | #include <gtest/gtest.h> |
| 2 | |
| 3 | #include <cpuinfo.h> |
| 4 | #include <cpuinfo-mock.h> |
| 5 | |
| 6 | |
| 7 | TEST(PROCESSORS, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 8 | ASSERT_EQ(8, cpuinfo_get_processors_count()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 9 | } |
| 10 | |
| 11 | TEST(PROCESSORS, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 12 | ASSERT_TRUE(cpuinfo_get_processors()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 13 | } |
| 14 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 15 | TEST(PROCESSORS, smt_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 16 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 17 | ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 18 | } |
| 19 | } |
| 20 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 21 | TEST(PROCESSORS, core) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 22 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 23 | ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 24 | } |
| 25 | } |
| 26 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 27 | TEST(PROCESSORS, cluster) { |
| 28 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 29 | switch (i) { |
| 30 | case 0: |
| 31 | case 1: |
| 32 | case 2: |
| 33 | case 3: |
| 34 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster); |
| 35 | break; |
| 36 | case 4: |
| 37 | case 5: |
| 38 | case 6: |
| 39 | case 7: |
| 40 | ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster); |
| 41 | break; |
| 42 | } |
| 43 | } |
| 44 | } |
| 45 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 46 | TEST(PROCESSORS, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 47 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 48 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 49 | } |
| 50 | } |
| 51 | |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 52 | TEST(PROCESSORS, linux_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 53 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 54 | switch (i) { |
| 55 | case 0: |
| 56 | case 1: |
| 57 | case 2: |
| 58 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 59 | ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 60 | break; |
| 61 | case 4: |
| 62 | case 5: |
| 63 | case 6: |
| 64 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 65 | ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 66 | break; |
| 67 | } |
| 68 | } |
| 69 | } |
| 70 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 71 | TEST(PROCESSORS, l1i) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 72 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 73 | ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 74 | } |
| 75 | } |
| 76 | |
| 77 | TEST(PROCESSORS, l1d) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 78 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 79 | ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 80 | } |
| 81 | } |
| 82 | |
| 83 | TEST(PROCESSORS, l2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 84 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 85 | switch (i) { |
| 86 | case 0: |
| 87 | case 1: |
| 88 | case 2: |
| 89 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 90 | ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 91 | break; |
| 92 | case 4: |
| 93 | case 5: |
| 94 | case 6: |
| 95 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 96 | ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 97 | break; |
| 98 | } |
| 99 | } |
| 100 | } |
| 101 | |
| 102 | TEST(PROCESSORS, l3) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 103 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 104 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 105 | } |
| 106 | } |
| 107 | |
| 108 | TEST(PROCESSORS, l4) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 109 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 110 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 111 | } |
| 112 | } |
| 113 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 114 | TEST(CORES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 115 | ASSERT_EQ(8, cpuinfo_get_cores_count()); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 116 | } |
| 117 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 118 | TEST(CORES, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 119 | ASSERT_TRUE(cpuinfo_get_cores()); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 120 | } |
| 121 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 122 | TEST(CORES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 123 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 124 | ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 125 | } |
| 126 | } |
| 127 | |
| 128 | TEST(CORES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 129 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 130 | ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 131 | } |
| 132 | } |
| 133 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 134 | TEST(CORES, core_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 135 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 136 | ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 137 | } |
| 138 | } |
| 139 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 140 | TEST(CORES, cluster) { |
| 141 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 142 | switch (i) { |
| 143 | case 0: |
| 144 | case 1: |
| 145 | case 2: |
| 146 | case 3: |
| 147 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster); |
| 148 | break; |
| 149 | case 4: |
| 150 | case 5: |
| 151 | case 6: |
| 152 | case 7: |
| 153 | ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster); |
| 154 | break; |
| 155 | } |
| 156 | } |
| 157 | } |
| 158 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 159 | TEST(CORES, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 160 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 161 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 162 | } |
| 163 | } |
| 164 | |
| 165 | TEST(CORES, vendor) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 166 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 167 | switch (i) { |
| 168 | case 0: |
| 169 | case 1: |
| 170 | case 2: |
| 171 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 172 | ASSERT_EQ(cpuinfo_vendor_samsung, cpuinfo_get_core(i)->vendor); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 173 | break; |
| 174 | case 4: |
| 175 | case 5: |
| 176 | case 6: |
| 177 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 178 | ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 179 | break; |
| 180 | } |
| 181 | } |
| 182 | } |
| 183 | |
| 184 | TEST(CORES, uarch) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 185 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 186 | switch (i) { |
| 187 | case 0: |
| 188 | case 1: |
| 189 | case 2: |
| 190 | case 3: |
Marat Dukhan | a750f2a | 2018-03-07 11:07:48 -0800 | [diff] [blame] | 191 | ASSERT_EQ(cpuinfo_uarch_mongoose_m2, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 192 | break; |
| 193 | case 4: |
| 194 | case 5: |
| 195 | case 6: |
| 196 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 197 | ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 198 | break; |
| 199 | } |
| 200 | } |
| 201 | } |
| 202 | |
| 203 | TEST(CORES, midr) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 204 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 205 | switch (i) { |
| 206 | case 0: |
| 207 | case 1: |
| 208 | case 2: |
| 209 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 210 | ASSERT_EQ(UINT32_C(0x534F0010), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 211 | break; |
| 212 | case 4: |
| 213 | case 5: |
| 214 | case 6: |
| 215 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 216 | ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 217 | break; |
| 218 | } |
| 219 | } |
| 220 | } |
| 221 | |
Marat Dukhan | 575a630 | 2018-03-10 14:38:49 -0800 | [diff] [blame] | 222 | TEST(CORES, DISABLED_frequency) { |
| 223 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 224 | switch (i) { |
| 225 | case 0: |
| 226 | case 1: |
| 227 | case 2: |
| 228 | case 3: |
| 229 | ASSERT_EQ(UINT64_C(2314000000), cpuinfo_get_core(i)->frequency); |
| 230 | break; |
| 231 | case 4: |
| 232 | case 5: |
| 233 | case 6: |
| 234 | case 7: |
| 235 | ASSERT_EQ(UINT64_C(1690000000), cpuinfo_get_core(i)->frequency); |
| 236 | break; |
| 237 | } |
| 238 | } |
| 239 | } |
| 240 | |
Marat Dukhan | dbc7840 | 2018-03-18 22:49:35 -0700 | [diff] [blame^] | 241 | TEST(CLUSTERS, count) { |
| 242 | ASSERT_EQ(2, cpuinfo_get_clusters_count()); |
| 243 | } |
| 244 | |
| 245 | TEST(CLUSTERS, non_null) { |
| 246 | ASSERT_TRUE(cpuinfo_get_clusters()); |
| 247 | } |
| 248 | |
| 249 | TEST(CLUSTERS, processor_start) { |
| 250 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 251 | switch (i) { |
| 252 | case 0: |
| 253 | ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start); |
| 254 | break; |
| 255 | case 1: |
| 256 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_start); |
| 257 | break; |
| 258 | } |
| 259 | } |
| 260 | } |
| 261 | |
| 262 | TEST(CLUSTERS, processor_count) { |
| 263 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 264 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count); |
| 265 | } |
| 266 | } |
| 267 | |
| 268 | TEST(CLUSTERS, core_start) { |
| 269 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 270 | switch (i) { |
| 271 | case 0: |
| 272 | ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start); |
| 273 | break; |
| 274 | case 1: |
| 275 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_start); |
| 276 | break; |
| 277 | } |
| 278 | } |
| 279 | } |
| 280 | |
| 281 | TEST(CLUSTERS, core_count) { |
| 282 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 283 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count); |
| 284 | } |
| 285 | } |
| 286 | |
| 287 | TEST(CLUSTERS, cluster_id) { |
| 288 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 289 | ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id); |
| 290 | } |
| 291 | } |
| 292 | |
| 293 | TEST(CLUSTERS, package) { |
| 294 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 295 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package); |
| 296 | } |
| 297 | } |
| 298 | |
| 299 | TEST(CLUSTERS, vendor) { |
| 300 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 301 | switch (i) { |
| 302 | case 0: |
| 303 | ASSERT_EQ(cpuinfo_vendor_samsung, cpuinfo_get_cluster(i)->vendor); |
| 304 | break; |
| 305 | case 1: |
| 306 | ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor); |
| 307 | break; |
| 308 | } |
| 309 | } |
| 310 | } |
| 311 | |
| 312 | TEST(CLUSTERS, uarch) { |
| 313 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 314 | switch (i) { |
| 315 | case 0: |
| 316 | ASSERT_EQ(cpuinfo_uarch_mongoose_m2, cpuinfo_get_cluster(i)->uarch); |
| 317 | break; |
| 318 | case 1: |
| 319 | ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch); |
| 320 | break; |
| 321 | } |
| 322 | } |
| 323 | } |
| 324 | |
| 325 | TEST(CLUSTERS, midr) { |
| 326 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 327 | switch (i) { |
| 328 | case 0: |
| 329 | ASSERT_EQ(UINT32_C(0x534F0010), cpuinfo_get_cluster(i)->midr); |
| 330 | break; |
| 331 | case 1: |
| 332 | ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_cluster(i)->midr); |
| 333 | break; |
| 334 | } |
| 335 | } |
| 336 | } |
| 337 | |
| 338 | TEST(CLUSTERS, DISABLED_frequency) { |
| 339 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 340 | switch (i) { |
| 341 | case 0: |
| 342 | ASSERT_EQ(UINT64_C(2314000000), cpuinfo_get_cluster(i)->frequency); |
| 343 | break; |
| 344 | case 1: |
| 345 | ASSERT_EQ(UINT64_C(1690000000), cpuinfo_get_cluster(i)->frequency); |
| 346 | break; |
| 347 | } |
| 348 | } |
| 349 | } |
| 350 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 351 | TEST(PACKAGES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 352 | ASSERT_EQ(1, cpuinfo_get_packages_count()); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 353 | } |
| 354 | |
| 355 | TEST(PACKAGES, name) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 356 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 357 | ASSERT_EQ("Samsung Exynos 8895", |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 358 | std::string(cpuinfo_get_package(i)->name, |
| 359 | strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 360 | } |
| 361 | } |
| 362 | |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 363 | TEST(PACKAGES, gpu_name) { |
| 364 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 365 | ASSERT_EQ("ARM Mali-G71", |
| 366 | std::string(cpuinfo_get_package(i)->gpu_name, |
| 367 | strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX))); |
| 368 | } |
| 369 | } |
| 370 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 371 | TEST(PACKAGES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 372 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 373 | ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 374 | } |
| 375 | } |
| 376 | |
| 377 | TEST(PACKAGES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 378 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 379 | ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 380 | } |
| 381 | } |
| 382 | |
| 383 | TEST(PACKAGES, core_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 384 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 385 | ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 386 | } |
| 387 | } |
| 388 | |
| 389 | TEST(PACKAGES, core_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 390 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 391 | ASSERT_EQ(8, cpuinfo_get_package(i)->core_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 392 | } |
| 393 | } |
| 394 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 395 | TEST(PACKAGES, cluster_start) { |
| 396 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 397 | ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start); |
| 398 | } |
| 399 | } |
| 400 | |
| 401 | TEST(PACKAGES, cluster_count) { |
| 402 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 403 | ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count); |
| 404 | } |
| 405 | } |
| 406 | |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 407 | TEST(ISA, thumb) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 408 | #if CPUINFO_ARCH_ARM |
| 409 | ASSERT_TRUE(cpuinfo_has_arm_thumb()); |
| 410 | #elif CPUINFO_ARCH_ARM64 |
| 411 | ASSERT_FALSE(cpuinfo_has_arm_thumb()); |
| 412 | #endif |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 413 | } |
| 414 | |
| 415 | TEST(ISA, thumb2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 416 | #if CPUINFO_ARCH_ARM |
| 417 | ASSERT_TRUE(cpuinfo_has_arm_thumb2()); |
| 418 | #elif CPUINFO_ARCH_ARM64 |
| 419 | ASSERT_FALSE(cpuinfo_has_arm_thumb2()); |
| 420 | #endif |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 421 | } |
| 422 | |
| 423 | TEST(ISA, armv5e) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 424 | #if CPUINFO_ARCH_ARM |
| 425 | ASSERT_TRUE(cpuinfo_has_arm_v5e()); |
| 426 | #elif CPUINFO_ARCH_ARM64 |
| 427 | ASSERT_FALSE(cpuinfo_has_arm_v5e()); |
| 428 | #endif |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 429 | } |
| 430 | |
| 431 | TEST(ISA, armv6) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 432 | #if CPUINFO_ARCH_ARM |
| 433 | ASSERT_TRUE(cpuinfo_has_arm_v6()); |
| 434 | #elif CPUINFO_ARCH_ARM64 |
| 435 | ASSERT_FALSE(cpuinfo_has_arm_v6()); |
| 436 | #endif |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 437 | } |
| 438 | |
| 439 | TEST(ISA, armv6k) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 440 | #if CPUINFO_ARCH_ARM |
| 441 | ASSERT_TRUE(cpuinfo_has_arm_v6k()); |
| 442 | #elif CPUINFO_ARCH_ARM64 |
| 443 | ASSERT_FALSE(cpuinfo_has_arm_v6k()); |
| 444 | #endif |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 445 | } |
| 446 | |
| 447 | TEST(ISA, armv7) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 448 | #if CPUINFO_ARCH_ARM |
| 449 | ASSERT_TRUE(cpuinfo_has_arm_v7()); |
| 450 | #elif CPUINFO_ARCH_ARM64 |
| 451 | ASSERT_FALSE(cpuinfo_has_arm_v7()); |
| 452 | #endif |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 453 | } |
| 454 | |
| 455 | TEST(ISA, armv7mp) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 456 | #if CPUINFO_ARCH_ARM |
| 457 | ASSERT_TRUE(cpuinfo_has_arm_v7mp()); |
| 458 | #elif CPUINFO_ARCH_ARM64 |
| 459 | ASSERT_FALSE(cpuinfo_has_arm_v7mp()); |
| 460 | #endif |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 461 | } |
| 462 | |
| 463 | TEST(ISA, idiv) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 464 | ASSERT_TRUE(cpuinfo_has_arm_idiv()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 465 | } |
| 466 | |
| 467 | TEST(ISA, vfpv2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 468 | ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 469 | } |
| 470 | |
| 471 | TEST(ISA, vfpv3) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 472 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 473 | } |
| 474 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 475 | TEST(ISA, vfpv3_d32) { |
| 476 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 477 | } |
| 478 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 479 | TEST(ISA, vfpv3_fp16) { |
| 480 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 481 | } |
| 482 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 483 | TEST(ISA, vfpv3_fp16_d32) { |
| 484 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); |
| 485 | } |
| 486 | |
| 487 | TEST(ISA, vfpv4) { |
| 488 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); |
| 489 | } |
| 490 | |
| 491 | TEST(ISA, vfpv4_d32) { |
| 492 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 493 | } |
| 494 | |
| 495 | TEST(ISA, wmmx) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 496 | ASSERT_FALSE(cpuinfo_has_arm_wmmx()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 497 | } |
| 498 | |
| 499 | TEST(ISA, wmmx2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 500 | ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 501 | } |
| 502 | |
| 503 | TEST(ISA, neon) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 504 | ASSERT_TRUE(cpuinfo_has_arm_neon()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 505 | } |
| 506 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 507 | TEST(ISA, neon_fp16) { |
| 508 | ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 509 | } |
| 510 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 511 | TEST(ISA, neon_fma) { |
| 512 | ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 513 | } |
| 514 | |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 515 | TEST(ISA, atomics) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 516 | ASSERT_FALSE(cpuinfo_has_arm_atomics()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 517 | } |
| 518 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 519 | TEST(ISA, neon_rdm) { |
| 520 | ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 521 | } |
| 522 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 523 | TEST(ISA, fp16_arith) { |
| 524 | ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 525 | } |
| 526 | |
| 527 | TEST(ISA, jscvt) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 528 | ASSERT_FALSE(cpuinfo_has_arm_jscvt()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 529 | } |
| 530 | |
| 531 | TEST(ISA, fcma) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 532 | ASSERT_FALSE(cpuinfo_has_arm_fcma()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 533 | } |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 534 | |
| 535 | TEST(ISA, aes) { |
| 536 | ASSERT_TRUE(cpuinfo_has_arm_aes()); |
| 537 | } |
| 538 | |
| 539 | TEST(ISA, sha1) { |
| 540 | ASSERT_TRUE(cpuinfo_has_arm_sha1()); |
| 541 | } |
| 542 | |
| 543 | TEST(ISA, sha2) { |
| 544 | ASSERT_TRUE(cpuinfo_has_arm_sha2()); |
| 545 | } |
| 546 | |
| 547 | TEST(ISA, pmull) { |
| 548 | ASSERT_TRUE(cpuinfo_has_arm_pmull()); |
| 549 | } |
| 550 | |
| 551 | TEST(ISA, crc32) { |
| 552 | ASSERT_TRUE(cpuinfo_has_arm_crc32()); |
| 553 | } |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 554 | |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 555 | TEST(L1I, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 556 | ASSERT_EQ(8, cpuinfo_get_l1i_caches_count()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 557 | } |
| 558 | |
| 559 | TEST(L1I, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 560 | ASSERT_TRUE(cpuinfo_get_l1i_caches()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 561 | } |
| 562 | |
| 563 | TEST(L1I, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 564 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 565 | switch (i) { |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 566 | case 0: |
| 567 | case 1: |
| 568 | case 2: |
| 569 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 570 | ASSERT_EQ(64 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 571 | break; |
| 572 | case 4: |
| 573 | case 5: |
| 574 | case 6: |
| 575 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 576 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 577 | break; |
| 578 | } |
| 579 | } |
| 580 | } |
| 581 | |
| 582 | TEST(L1I, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 583 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 584 | switch (i) { |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 585 | case 0: |
| 586 | case 1: |
| 587 | case 2: |
| 588 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 589 | ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 590 | break; |
| 591 | case 4: |
| 592 | case 5: |
| 593 | case 6: |
| 594 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 595 | ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 596 | break; |
| 597 | } |
| 598 | } |
| 599 | } |
| 600 | |
| 601 | TEST(L1I, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 602 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 603 | ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, |
| 604 | cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 605 | } |
| 606 | } |
| 607 | |
| 608 | TEST(L1I, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 609 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 610 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 611 | } |
| 612 | } |
| 613 | |
| 614 | TEST(L1I, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 615 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 616 | switch (i) { |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 617 | case 0: |
| 618 | case 1: |
| 619 | case 2: |
| 620 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 621 | ASSERT_EQ(128, cpuinfo_get_l1i_cache(i)->line_size); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 622 | break; |
| 623 | case 4: |
| 624 | case 5: |
| 625 | case 6: |
| 626 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 627 | ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 628 | break; |
| 629 | } |
| 630 | } |
| 631 | } |
| 632 | |
| 633 | TEST(L1I, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 634 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 635 | ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 636 | } |
| 637 | } |
| 638 | |
| 639 | TEST(L1I, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 640 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 641 | ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); |
| 642 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 643 | } |
| 644 | } |
| 645 | |
| 646 | TEST(L1D, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 647 | ASSERT_EQ(8, cpuinfo_get_l1d_caches_count()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 648 | } |
| 649 | |
| 650 | TEST(L1D, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 651 | ASSERT_TRUE(cpuinfo_get_l1d_caches()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 652 | } |
| 653 | |
| 654 | TEST(L1D, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 655 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 656 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 657 | } |
| 658 | } |
| 659 | |
| 660 | TEST(L1D, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 661 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 662 | switch (i) { |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 663 | case 0: |
| 664 | case 1: |
| 665 | case 2: |
| 666 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 667 | ASSERT_EQ(8, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 668 | break; |
| 669 | case 4: |
| 670 | case 5: |
| 671 | case 6: |
| 672 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 673 | ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 674 | break; |
| 675 | } |
| 676 | } |
| 677 | } |
| 678 | |
| 679 | TEST(L1D, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 680 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 681 | ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, |
| 682 | cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 683 | } |
| 684 | } |
| 685 | |
| 686 | TEST(L1D, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 687 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 688 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 689 | } |
| 690 | } |
| 691 | |
| 692 | TEST(L1D, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 693 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 694 | ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 695 | } |
| 696 | } |
| 697 | |
| 698 | TEST(L1D, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 699 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 700 | ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 701 | } |
| 702 | } |
| 703 | |
| 704 | TEST(L1D, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 705 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 706 | ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); |
| 707 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 708 | } |
| 709 | } |
| 710 | |
| 711 | TEST(L2, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 712 | ASSERT_EQ(2, cpuinfo_get_l2_caches_count()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 713 | } |
| 714 | |
| 715 | TEST(L2, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 716 | ASSERT_TRUE(cpuinfo_get_l2_caches()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 717 | } |
| 718 | |
| 719 | TEST(L2, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 720 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 721 | switch (i) { |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 722 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 723 | ASSERT_EQ(2 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 724 | break; |
| 725 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 726 | ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 727 | break; |
| 728 | } |
| 729 | } |
| 730 | } |
| 731 | |
| 732 | TEST(L2, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 733 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 734 | ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 735 | } |
| 736 | } |
| 737 | |
| 738 | TEST(L2, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 739 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 740 | ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, |
| 741 | cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 742 | } |
| 743 | } |
| 744 | |
| 745 | TEST(L2, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 746 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 747 | ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 748 | } |
| 749 | } |
| 750 | |
| 751 | TEST(L2, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 752 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 753 | ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 754 | } |
| 755 | } |
| 756 | |
| 757 | TEST(L2, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 758 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 759 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 760 | } |
| 761 | } |
| 762 | |
| 763 | TEST(L2, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 764 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 765 | switch (i) { |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 766 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 767 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start); |
| 768 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 769 | break; |
| 770 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 771 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start); |
| 772 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 773 | break; |
| 774 | } |
| 775 | } |
| 776 | } |
| 777 | |
| 778 | TEST(L3, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 779 | ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); |
| 780 | ASSERT_FALSE(cpuinfo_get_l3_caches()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 781 | } |
| 782 | |
| 783 | TEST(L4, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 784 | ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); |
| 785 | ASSERT_FALSE(cpuinfo_get_l4_caches()); |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 786 | } |
| 787 | |
| 788 | #include <galaxy-s8-global.h> |
| 789 | |
| 790 | int main(int argc, char* argv[]) { |
Marat Dukhan | 63a7a6b | 2017-11-29 15:11:56 -0800 | [diff] [blame] | 791 | #if CPUINFO_ARCH_ARM |
| 792 | cpuinfo_set_hwcap(UINT32_C(0x0037B0D6)); |
| 793 | cpuinfo_set_hwcap2(UINT32_C(0x0000001F)); |
| 794 | #elif CPUINFO_ARCH_ARM64 |
| 795 | cpuinfo_set_hwcap(UINT32_C(0x000000FF)); |
| 796 | #endif |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 797 | cpuinfo_mock_filesystem(filesystem); |
Marat Dukhan | a2658a6 | 2017-09-17 11:14:51 -0700 | [diff] [blame] | 798 | #ifdef __ANDROID__ |
| 799 | cpuinfo_mock_android_properties(properties); |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 800 | cpuinfo_mock_gl_renderer("Mali-G71"); |
Marat Dukhan | a2658a6 | 2017-09-17 11:14:51 -0700 | [diff] [blame] | 801 | #endif |
Marat Dukhan | 5d35868 | 2017-08-11 15:21:54 -0700 | [diff] [blame] | 802 | cpuinfo_initialize(); |
| 803 | ::testing::InitGoogleTest(&argc, argv); |
| 804 | return RUN_ALL_TESTS(); |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 805 | } |