HLSL: Don't do logical short-circuits when the operands are bool-vectors.
This seems a bit ill-defined, and was generating code that made OpPhi of two
operands that were Boolean vectors result in a scalar bool.
diff --git a/SPIRV/GlslangToSpv.cpp b/SPIRV/GlslangToSpv.cpp
index 95ad7f9..f8722fc 100755
--- a/SPIRV/GlslangToSpv.cpp
+++ b/SPIRV/GlslangToSpv.cpp
@@ -5356,13 +5356,19 @@
}
// A node is trivial if it is a single operation with no side effects.
-// Error on the side of saying non-trivial.
+// Vector results seem ill-defined, currently classifying them as trivial too,
+// to avoid scalar bool-based control-flow logic.
+// Otherwise, error on the side of saying non-trivial.
// Return true if trivial.
bool TGlslangToSpvTraverser::isTrivial(const glslang::TIntermTyped* node)
{
if (node == nullptr)
return false;
+ // count vectors as trivial
+ if (node->getType().isVector())
+ return true;
+
// symbols and constants are trivial
if (isTrivialLeaf(node))
return true;
diff --git a/Test/baseResults/hlsl.isfinite.frag.out b/Test/baseResults/hlsl.isfinite.frag.out
index 0d6d8d2..9721219 100644
--- a/Test/baseResults/hlsl.isfinite.frag.out
+++ b/Test/baseResults/hlsl.isfinite.frag.out
@@ -173,12 +173,12 @@
// Module Version 10000
// Generated by (magic number): 80001
-// Id's are bound by 95
+// Id's are bound by 91
Capability Shader
1: ExtInstImport "GLSL.std.450"
MemoryModel Logical GLSL450
- EntryPoint Fragment 4 "main" 93
+ EntryPoint Fragment 4 "main" 89
ExecutionMode 4 OriginUpperLeft
Source HLSL 500
Name 4 "main"
@@ -193,14 +193,14 @@
MemberName 39($Global) 2 "f3"
Name 41 ""
Name 57 "@finitetmp"
- Name 73 "@finitetmp"
- Name 93 "@entryPointOutput"
+ Name 71 "@finitetmp"
+ Name 89 "@entryPointOutput"
MemberDecorate 39($Global) 0 Offset 0
MemberDecorate 39($Global) 1 Offset 4
MemberDecorate 39($Global) 2 Offset 16
Decorate 39($Global) Block
Decorate 41 DescriptorSet 0
- Decorate 93(@entryPointOutput) Location 0
+ Decorate 89(@entryPointOutput) Location 0
2: TypeVoid
3: TypeFunction 2
6: TypeFloat 32
@@ -221,18 +221,18 @@
58: 42(int) Constant 1
59: TypePointer Uniform 37(fvec2)
63: TypeVector 8(bool) 2
- 72: TypePointer Function 38(fvec3)
- 74: 42(int) Constant 2
- 75: TypePointer Uniform 38(fvec3)
- 79: TypeVector 8(bool) 3
- 88: 6(float) Constant 0
- 89: 13(fvec4) ConstantComposite 88 88 88 88
- 92: TypePointer Output 13(fvec4)
-93(@entryPointOutput): 92(ptr) Variable Output
+ 70: TypePointer Function 38(fvec3)
+ 72: 42(int) Constant 2
+ 73: TypePointer Uniform 38(fvec3)
+ 77: TypeVector 8(bool) 3
+ 84: 6(float) Constant 0
+ 85: 13(fvec4) ConstantComposite 84 84 84 84
+ 88: TypePointer Output 13(fvec4)
+89(@entryPointOutput): 88(ptr) Variable Output
4(main): 2 Function None 3
5: Label
- 94: 13(fvec4) FunctionCall 15(@main()
- Store 93(@entryPointOutput) 94
+ 90: 13(fvec4) FunctionCall 15(@main()
+ Store 89(@entryPointOutput) 90
Return
FunctionEnd
11(test1(f1;): 8(bool) Function None 9
@@ -268,7 +268,7 @@
16: Label
36(@finitetmp): 7(ptr) Variable Function
57(@finitetmp): 56(ptr) Variable Function
- 73(@finitetmp): 72(ptr) Variable Function
+ 71(@finitetmp): 70(ptr) Variable Function
45: 44(ptr) AccessChain 41 43
46: 6(float) Load 45
Store 36(@finitetmp) 46
@@ -290,29 +290,19 @@
62: 37(fvec2) Load 57(@finitetmp)
64: 63(bvec2) IsNan 62
65: 63(bvec2) LogicalNot 64
- SelectionMerge 67 None
- BranchConditional 65 66 67
- 66: Label
- 68: 37(fvec2) Load 57(@finitetmp)
- 69: 63(bvec2) IsInf 68
- 70: 63(bvec2) LogicalNot 69
- Branch 67
- 67: Label
- 71: 8(bool) Phi 65 51 70 66
- 76: 75(ptr) AccessChain 41 74
- 77: 38(fvec3) Load 76
- Store 73(@finitetmp) 77
- 78: 38(fvec3) Load 73(@finitetmp)
- 80: 79(bvec3) IsNan 78
- 81: 79(bvec3) LogicalNot 80
- SelectionMerge 83 None
- BranchConditional 81 82 83
- 82: Label
- 84: 38(fvec3) Load 73(@finitetmp)
- 85: 79(bvec3) IsInf 84
- 86: 79(bvec3) LogicalNot 85
- Branch 83
- 83: Label
- 87: 8(bool) Phi 81 67 86 82
- ReturnValue 89
+ 66: 37(fvec2) Load 57(@finitetmp)
+ 67: 63(bvec2) IsInf 66
+ 68: 63(bvec2) LogicalNot 67
+ 69: 63(bvec2) LogicalAnd 65 68
+ 74: 73(ptr) AccessChain 41 72
+ 75: 38(fvec3) Load 74
+ Store 71(@finitetmp) 75
+ 76: 38(fvec3) Load 71(@finitetmp)
+ 78: 77(bvec3) IsNan 76
+ 79: 77(bvec3) LogicalNot 78
+ 80: 38(fvec3) Load 71(@finitetmp)
+ 81: 77(bvec3) IsInf 80
+ 82: 77(bvec3) LogicalNot 81
+ 83: 77(bvec3) LogicalAnd 79 82
+ ReturnValue 85
FunctionEnd
diff --git a/Test/baseResults/hlsl.logical.binary.vec.frag.out b/Test/baseResults/hlsl.logical.binary.vec.frag.out
index a03890c..8243814 100644
--- a/Test/baseResults/hlsl.logical.binary.vec.frag.out
+++ b/Test/baseResults/hlsl.logical.binary.vec.frag.out
@@ -255,12 +255,12 @@
// Module Version 10000
// Generated by (magic number): 80001
-// Id's are bound by 120
+// Id's are bound by 115
Capability Shader
1: ExtInstImport "GLSL.std.450"
MemoryModel Logical GLSL450
- EntryPoint Fragment 4 "main" 117
+ EntryPoint Fragment 4 "main" 112
ExecutionMode 4 OriginUpperLeft
Source HLSL 500
Name 4 "main"
@@ -279,16 +279,16 @@
Name 47 "r10"
Name 58 "r11"
Name 67 "r20"
- Name 79 "r21"
- Name 92 "psout"
- Name 117 "Color"
+ Name 77 "r21"
+ Name 87 "psout"
+ Name 112 "Color"
MemberDecorate 18($Global) 0 Offset 0
MemberDecorate 18($Global) 1 Offset 16
MemberDecorate 18($Global) 2 Offset 32
MemberDecorate 18($Global) 3 Offset 36
Decorate 18($Global) Block
Decorate 20 DescriptorSet 0
- Decorate 117(Color) Location 0
+ Decorate 112(Color) Location 0
2: TypeVoid
3: TypeFunction 2
6: TypeFloat 32
@@ -311,20 +311,20 @@
34: 21(int) Constant 1
48: 21(int) Constant 2
49: TypePointer Uniform 16(int)
- 73: 21(int) Constant 3
- 91: TypePointer Function 8(PS_OUTPUT)
- 106: 6(float) Constant 0
- 107: 6(float) Constant 1065353216
- 108: 7(fvec4) ConstantComposite 106 106 106 106
- 109: 7(fvec4) ConstantComposite 107 107 107 107
- 111: TypePointer Function 7(fvec4)
- 116: TypePointer Output 7(fvec4)
- 117(Color): 116(ptr) Variable Output
+ 71: 21(int) Constant 3
+ 86: TypePointer Function 8(PS_OUTPUT)
+ 101: 6(float) Constant 0
+ 102: 6(float) Constant 1065353216
+ 103: 7(fvec4) ConstantComposite 101 101 101 101
+ 104: 7(fvec4) ConstantComposite 102 102 102 102
+ 106: TypePointer Function 7(fvec4)
+ 111: TypePointer Output 7(fvec4)
+ 112(Color): 111(ptr) Variable Output
4(main): 2 Function None 3
5: Label
- 118:8(PS_OUTPUT) FunctionCall 10(@main()
- 119: 7(fvec4) CompositeExtract 118 0
- Store 117(Color) 119
+ 113:8(PS_OUTPUT) FunctionCall 10(@main()
+ 114: 7(fvec4) CompositeExtract 113 0
+ Store 112(Color) 114
Return
FunctionEnd
10(@main():8(PS_OUTPUT) Function None 9
@@ -335,8 +335,8 @@
47(r10): 14(ptr) Variable Function
58(r11): 14(ptr) Variable Function
67(r20): 14(ptr) Variable Function
- 79(r21): 14(ptr) Variable Function
- 92(psout): 91(ptr) Variable Function
+ 77(r21): 14(ptr) Variable Function
+ 87(psout): 86(ptr) Variable Function
24: 23(ptr) AccessChain 20 22
25: 17(ivec4) Load 24
28: 13(bvec4) INotEqual 25 27
@@ -379,48 +379,37 @@
68: 23(ptr) AccessChain 20 22
69: 17(ivec4) Load 68
70: 13(bvec4) INotEqual 69 27
- SelectionMerge 72 None
- BranchConditional 70 71 72
- 71: Label
- 74: 49(ptr) AccessChain 20 73
- 75: 16(int) Load 74
- 76: 12(bool) INotEqual 75 26
- 77: 13(bvec4) CompositeConstruct 76 76 76 76
- Branch 72
- 72: Label
- 78: 12(bool) Phi 70 11 77 71
- Store 67(r20) 78
- 80: 23(ptr) AccessChain 20 22
- 81: 17(ivec4) Load 80
- 82: 13(bvec4) INotEqual 81 27
- 83: 12(bool) LogicalNot 82
- SelectionMerge 85 None
- BranchConditional 83 84 85
- 84: Label
- 86: 49(ptr) AccessChain 20 73
- 87: 16(int) Load 86
- 88: 12(bool) INotEqual 87 26
- 89: 13(bvec4) CompositeConstruct 88 88 88 88
- Branch 85
- 85: Label
- 90: 12(bool) Phi 82 72 89 84
- Store 79(r21) 90
- 93: 13(bvec4) Load 15(r00)
- 94: 13(bvec4) Load 30(r01)
- 95: 13(bvec4) LogicalOr 93 94
- 96: 13(bvec4) Load 39(r02)
- 97: 13(bvec4) LogicalOr 95 96
- 98: 13(bvec4) Load 47(r10)
- 99: 13(bvec4) LogicalOr 97 98
- 100: 13(bvec4) Load 58(r11)
- 101: 13(bvec4) LogicalOr 99 100
- 102: 13(bvec4) Load 67(r20)
- 103: 13(bvec4) LogicalOr 101 102
- 104: 13(bvec4) Load 79(r21)
- 105: 13(bvec4) LogicalOr 103 104
- 110: 7(fvec4) Select 105 109 108
- 112: 111(ptr) AccessChain 92(psout) 22
- Store 112 110
- 113:8(PS_OUTPUT) Load 92(psout)
- ReturnValue 113
+ 72: 49(ptr) AccessChain 20 71
+ 73: 16(int) Load 72
+ 74: 12(bool) INotEqual 73 26
+ 75: 13(bvec4) CompositeConstruct 74 74 74 74
+ 76: 13(bvec4) LogicalAnd 70 75
+ Store 67(r20) 76
+ 78: 23(ptr) AccessChain 20 22
+ 79: 17(ivec4) Load 78
+ 80: 13(bvec4) INotEqual 79 27
+ 81: 49(ptr) AccessChain 20 71
+ 82: 16(int) Load 81
+ 83: 12(bool) INotEqual 82 26
+ 84: 13(bvec4) CompositeConstruct 83 83 83 83
+ 85: 13(bvec4) LogicalOr 80 84
+ Store 77(r21) 85
+ 88: 13(bvec4) Load 15(r00)
+ 89: 13(bvec4) Load 30(r01)
+ 90: 13(bvec4) LogicalOr 88 89
+ 91: 13(bvec4) Load 39(r02)
+ 92: 13(bvec4) LogicalOr 90 91
+ 93: 13(bvec4) Load 47(r10)
+ 94: 13(bvec4) LogicalOr 92 93
+ 95: 13(bvec4) Load 58(r11)
+ 96: 13(bvec4) LogicalOr 94 95
+ 97: 13(bvec4) Load 67(r20)
+ 98: 13(bvec4) LogicalOr 96 97
+ 99: 13(bvec4) Load 77(r21)
+ 100: 13(bvec4) LogicalOr 98 99
+ 105: 7(fvec4) Select 100 104 103
+ 107: 106(ptr) AccessChain 87(psout) 22
+ Store 107 105
+ 108:8(PS_OUTPUT) Load 87(psout)
+ ReturnValue 108
FunctionEnd