Update test results to expect OpFUnordNotEqual
diff --git a/Test/baseResults/hlsl.comparison.vec.frag.out b/Test/baseResults/hlsl.comparison.vec.frag.out
index 397eea4..ddab4d3 100644
--- a/Test/baseResults/hlsl.comparison.vec.frag.out
+++ b/Test/baseResults/hlsl.comparison.vec.frag.out
@@ -355,7 +355,7 @@
                               Store 25(r00) 28
               30:    7(fvec4) Load 10(a)
               31:    7(fvec4) Load 17(v04)
-              32:   23(bvec4) FOrdNotEqual 30 31
+              32:   23(bvec4) FUnordNotEqual 30 31
                               Store 29(r01) 32
               34:    7(fvec4) Load 10(a)
               35:    7(fvec4) Load 17(v04)
@@ -373,7 +373,7 @@
               47:    7(fvec4) Load 10(a)
               48:    6(float) Load 21(v01)
               49:    7(fvec4) CompositeConstruct 48 48 48 48
-              50:   23(bvec4) FOrdNotEqual 47 49
+              50:   23(bvec4) FUnordNotEqual 47 49
                               Store 46(r11) 50
               52:    7(fvec4) Load 10(a)
               53:    6(float) Load 21(v01)
@@ -393,7 +393,7 @@
               67:    6(float) Load 21(v01)
               68:    7(fvec4) CompositeConstruct 67 67 67 67
               69:    7(fvec4) Load 10(a)
-              70:   23(bvec4) FOrdNotEqual 68 69
+              70:   23(bvec4) FUnordNotEqual 68 69
                               Store 66(r21) 70
               72:    6(float) Load 21(v01)
               73:    7(fvec4) CompositeConstruct 72 72 72 72
diff --git a/Test/baseResults/hlsl.conditional.frag.out b/Test/baseResults/hlsl.conditional.frag.out
index 75342de..38175e5 100644
--- a/Test/baseResults/hlsl.conditional.frag.out
+++ b/Test/baseResults/hlsl.conditional.frag.out
@@ -644,7 +644,7 @@
               39:    7(fvec4) Load 38
               41:     34(ptr) AccessChain 31 40
               42:    7(fvec4) Load 41
-              46:   43(bvec4) FOrdNotEqual 42 45
+              46:   43(bvec4) FUnordNotEqual 42 45
               47:    7(fvec4) Select 46 39 36
               50:     49(ptr) AccessChain 31 48
               51:    6(float) Load 50
@@ -654,7 +654,7 @@
               56:    7(fvec4) CompositeConstruct 55 55 55 55
               57:     34(ptr) AccessChain 31 40
               58:    7(fvec4) Load 57
-              59:   43(bvec4) FOrdNotEqual 58 45
+              59:   43(bvec4) FUnordNotEqual 58 45
               60:    7(fvec4) Select 59 56 52
               61:    7(fvec4) FAdd 47 60
               62:     34(ptr) AccessChain 31 33
@@ -675,7 +675,7 @@
               77:    7(fvec4) CompositeConstruct 76 76 76 76
               78:     34(ptr) AccessChain 31 40
               79:    7(fvec4) Load 78
-              80:   43(bvec4) FOrdNotEqual 79 45
+              80:   43(bvec4) FUnordNotEqual 79 45
               81:    7(fvec4) Select 80 77 74
               82:    7(fvec4) FAdd 72 81
                               ReturnValue 82
@@ -687,7 +687,7 @@
               87:    6(float) Load 86
               88:     49(ptr) AccessChain 31 48
               89:    6(float) Load 88
-              90:    13(bool) FOrdNotEqual 87 89
+              90:    13(bool) FUnordNotEqual 87 89
               91:     49(ptr) AccessChain 31 53
               92:    6(float) Load 91
               93:     34(ptr) AccessChain 31 33
diff --git a/Test/baseResults/hlsl.discard.frag.out b/Test/baseResults/hlsl.discard.frag.out
index c88cf0e..9f017fe 100644
--- a/Test/baseResults/hlsl.discard.frag.out
+++ b/Test/baseResults/hlsl.discard.frag.out
@@ -178,7 +178,7 @@
               30:           2 FunctionCall 10(foo(f1;) 25(param)
               32:      7(ptr) AccessChain 15(input) 31
               33:    6(float) Load 32
-              35:    20(bool) FOrdNotEqual 33 34
+              35:    20(bool) FUnordNotEqual 33 34
                               SelectionMerge 37 None
                               BranchConditional 35 36 37
               36:               Label
diff --git a/Test/baseResults/hlsl.forLoop.frag.out b/Test/baseResults/hlsl.forLoop.frag.out
index 096ecd3..2abf3c0 100644
--- a/Test/baseResults/hlsl.forLoop.frag.out
+++ b/Test/baseResults/hlsl.forLoop.frag.out
@@ -644,7 +644,7 @@
               58:             Label
               59:    9(fvec4) Load 15(input)
               60:    9(fvec4) Load 15(input)
-              63:   62(bvec4) FOrdNotEqual 59 60
+              63:   62(bvec4) FUnordNotEqual 59 60
               64:    61(bool) Any 63
                               BranchConditional 64 55 56
               55:               Label
@@ -664,7 +664,7 @@
               69:             Label
               70:    9(fvec4) Load 19(input)
               71:    9(fvec4) Load 19(input)
-              72:   62(bvec4) FOrdNotEqual 70 71
+              72:   62(bvec4) FUnordNotEqual 70 71
               73:    61(bool) Any 72
                               BranchConditional 73 66 67
               66:               Label
@@ -692,7 +692,7 @@
               86:             Label
               87:    9(fvec4) Load 22(input)
               88:    9(fvec4) Load 22(input)
-              89:   62(bvec4) FOrdNotEqual 87 88
+              89:   62(bvec4) FUnordNotEqual 87 88
               90:    61(bool) Any 89
                               BranchConditional 90 83 84
               83:               Label
diff --git a/Test/baseResults/hlsl.if.frag.out b/Test/baseResults/hlsl.if.frag.out
index 2b05bf0..d7ab858 100644
--- a/Test/baseResults/hlsl.if.frag.out
+++ b/Test/baseResults/hlsl.if.frag.out
@@ -390,7 +390,7 @@
               85:     81(ptr) AccessChain 16(input) 84
               86:    6(float) Load 85
                               Store 82(ii) 86
-              88:    21(bool) FOrdNotEqual 86 87
+              88:    21(bool) FUnordNotEqual 86 87
                               SelectionMerge 90 None
                               BranchConditional 88 89 90
               89:               Label
diff --git a/Test/baseResults/hlsl.implicitBool.frag.out b/Test/baseResults/hlsl.implicitBool.frag.out
index 67dca12..447c9ee 100644
--- a/Test/baseResults/hlsl.implicitBool.frag.out
+++ b/Test/baseResults/hlsl.implicitBool.frag.out
@@ -420,7 +420,7 @@
               28:             Label
               36:     35(ptr) AccessChain 18 34
               37:    6(float) Load 36
-              39:    23(bool) FOrdNotEqual 37 38
+              39:    23(bool) FUnordNotEqual 37 38
                               SelectionMerge 41 None
                               BranchConditional 39 40 41
               40:               Label
@@ -431,7 +431,7 @@
               41:             Label
               47:     35(ptr) AccessChain 18 46
               48:    6(float) Load 47
-              49:    23(bool) FOrdNotEqual 48 38
+              49:    23(bool) FUnordNotEqual 48 38
                               SelectionMerge 51 None
                               BranchConditional 49 50 51
               50:               Label
@@ -456,11 +456,11 @@
               70:    23(bool) INotEqual 69 25
               71:     35(ptr) AccessChain 18 34
               72:    6(float) Load 71
-              73:    23(bool) FOrdNotEqual 72 38
+              73:    23(bool) FUnordNotEqual 72 38
               74:    23(bool) LogicalAnd 70 73
               75:     35(ptr) AccessChain 18 46
               76:    6(float) Load 75
-              77:    23(bool) FOrdNotEqual 76 38
+              77:    23(bool) FUnordNotEqual 76 38
               78:    23(bool) LogicalOr 74 77
                               SelectionMerge 80 None
                               BranchConditional 78 79 80
@@ -479,7 +479,7 @@
                               Branch 94
               94:             Label
               95:    6(float) Load 87(f)
-              96:    23(bool) FOrdNotEqual 95 38
+              96:    23(bool) FUnordNotEqual 95 38
                               BranchConditional 96 91 92
               91:               Label
               97:    6(float)   Load 87(f)
@@ -524,7 +524,7 @@
              113:             Label
              121:     35(ptr) AccessChain 18 34
              122:    6(float) Load 121
-             123:    23(bool) FOrdNotEqual 122 38
+             123:    23(bool) FUnordNotEqual 122 38
              126:    6(float) Select 123 124 125
                               Store 120(g) 126
              127:    6(float) Load 120(g)
diff --git a/Test/baseResults/hlsl.intrinsics.comp.out b/Test/baseResults/hlsl.intrinsics.comp.out
index 6caed60..8a07791 100644
--- a/Test/baseResults/hlsl.intrinsics.comp.out
+++ b/Test/baseResults/hlsl.intrinsics.comp.out
@@ -903,7 +903,7 @@
               17:             Label
       72(out_u1):      9(ptr) Variable Function
               60:    6(float) Load 11(inF0)
-              63:    61(bool) FOrdNotEqual 60 62
+              63:    61(bool) FUnordNotEqual 60 62
               64:    61(bool) All 63
               68:      8(int) Load 67(gs_ub)
               71:      8(int) AtomicIAdd 66(gs_ua) 69 70 68
@@ -960,7 +960,7 @@
               35:             Label
      115(out_u2):     27(ptr) Variable Function
              105:   24(fvec2) Load 29(inF0)
-             108:  106(bvec2) FOrdNotEqual 105 107
+             108:  106(bvec2) FUnordNotEqual 105 107
              109:    61(bool) All 108
              113:   26(ivec2) Load 112(gs_ub2)
              114:   26(ivec2) AtomicIAdd 111(gs_ua2) 69 70 113
@@ -1010,7 +1010,7 @@
               47:             Label
      159(out_u3):     39(ptr) Variable Function
              149:   36(fvec3) Load 41(inF0)
-             152:  150(bvec3) FOrdNotEqual 149 151
+             152:  150(bvec3) FUnordNotEqual 149 151
              153:    61(bool) All 152
              157:   38(ivec3) Load 156(gs_ub3)
              158:   38(ivec3) AtomicIAdd 155(gs_ua3) 69 70 157
@@ -1060,7 +1060,7 @@
               59:             Label
      202(out_u4):     51(ptr) Variable Function
              192:   48(fvec4) Load 53(inF0)
-             195:  193(bvec4) FOrdNotEqual 192 194
+             195:  193(bvec4) FUnordNotEqual 192 194
              196:    61(bool) All 195
              200:   50(ivec4) Load 199(gs_ub4)
              201:   50(ivec4) AtomicIAdd 198(gs_ua4) 69 70 200
diff --git a/Test/baseResults/hlsl.intrinsics.frag.out b/Test/baseResults/hlsl.intrinsics.frag.out
index 023b5fd..b4a054d 100644
--- a/Test/baseResults/hlsl.intrinsics.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.frag.out
@@ -6389,7 +6389,7 @@
        341(r060):      7(ptr) Variable Function
        344(r061):      7(ptr) Variable Function
              140:    6(float) Load 13(inF0)
-             142:   137(bool) FOrdNotEqual 140 141
+             142:   137(bool) FUnordNotEqual 140 141
              143:   137(bool) All 142
                               Store 139(r000) 143
              145:    6(float) Load 13(inF0)
@@ -6399,7 +6399,7 @@
              149:    6(float) ExtInst 1(GLSL.std.450) 17(Acos) 148
                               Store 147(r002) 149
              151:    6(float) Load 13(inF0)
-             152:   137(bool) FOrdNotEqual 151 141
+             152:   137(bool) FUnordNotEqual 151 141
              153:   137(bool) Any 152
                               Store 150(r003) 153
              155:    6(float) Load 13(inF0)
@@ -6674,7 +6674,7 @@
        583(r065):     27(ptr) Variable Function
        586(r066):     27(ptr) Variable Function
              352:   26(fvec2) Load 31(inF0)
-             355:  353(bvec2) FOrdNotEqual 352 354
+             355:  353(bvec2) FUnordNotEqual 352 354
              356:   137(bool) All 355
                               Store 351(r000) 356
              358:   26(fvec2) Load 31(inF0)
@@ -6684,7 +6684,7 @@
              362:   26(fvec2) ExtInst 1(GLSL.std.450) 17(Acos) 361
                               Store 360(r002) 362
              364:   26(fvec2) Load 31(inF0)
-             365:  353(bvec2) FOrdNotEqual 364 354
+             365:  353(bvec2) FUnordNotEqual 364 354
              366:   137(bool) Any 365
                               Store 363(r003) 366
              368:   26(fvec2) Load 31(inF0)
@@ -6976,7 +6976,7 @@
        831(r066):     39(ptr) Variable Function
        834(r067):     39(ptr) Variable Function
              593:   38(fvec3) Load 43(inF0)
-             596:  594(bvec3) FOrdNotEqual 593 595
+             596:  594(bvec3) FUnordNotEqual 593 595
              597:   137(bool) All 596
                               Store 592(r000) 597
              599:   38(fvec3) Load 43(inF0)
@@ -6986,7 +6986,7 @@
              603:   38(fvec3) ExtInst 1(GLSL.std.450) 17(Acos) 602
                               Store 601(r002) 603
              605:   38(fvec3) Load 43(inF0)
-             606:  594(bvec3) FOrdNotEqual 605 595
+             606:  594(bvec3) FUnordNotEqual 605 595
              607:   137(bool) Any 606
                               Store 604(r003) 607
              609:   38(fvec3) Load 43(inF0)
@@ -7286,7 +7286,7 @@
       1080(r066):     51(ptr) Variable Function
       1083(r067):     51(ptr) Variable Function
              842:   50(fvec4) Load 55(inF0)
-             845:  843(bvec4) FOrdNotEqual 842 844
+             845:  843(bvec4) FUnordNotEqual 842 844
              846:   137(bool) All 845
                               Store 841(r000) 846
              848:   50(fvec4) Load 55(inF0)
@@ -7296,7 +7296,7 @@
              852:   50(fvec4) ExtInst 1(GLSL.std.450) 17(Acos) 851
                               Store 850(r002) 852
              854:   50(fvec4) Load 55(inF0)
-             855:  843(bvec4) FOrdNotEqual 854 844
+             855:  843(bvec4) FUnordNotEqual 854 844
              856:   137(bool) Any 855
                               Store 853(r003) 856
              858:   50(fvec4) Load 55(inF0)
@@ -7578,7 +7578,7 @@
       1257(r044):     63(ptr) Variable Function
       1262(r046):     63(ptr) Variable Function
             1091:          62 Load 65(inF0)
-            1093:        1092 FOrdNotEqual 1091 141
+            1093:        1092 FUnordNotEqual 1091 141
             1094:   137(bool) All 1093
                               Store 1090(r000) 1094
             1096:          62 Load 65(inF0)
@@ -7587,7 +7587,7 @@
             1098:          62 Load 65(inF0)
             1099:          62 ExtInst 1(GLSL.std.450) 17(Acos) 1098
             1101:          62 Load 65(inF0)
-            1102:        1092 FOrdNotEqual 1101 141
+            1102:        1092 FUnordNotEqual 1101 141
             1103:   137(bool) Any 1102
                               Store 1100(r003) 1103
             1105:          62 Load 65(inF0)
@@ -7807,7 +7807,7 @@
       1439(r044):     71(ptr) Variable Function
       1444(r046):     71(ptr) Variable Function
             1270:          70 Load 73(inF0)
-            1272:        1271 FOrdNotEqual 1270 141
+            1272:        1271 FUnordNotEqual 1270 141
             1273:   137(bool) All 1272
                               Store 1269(r000) 1273
             1275:          70 Load 73(inF0)
@@ -7816,7 +7816,7 @@
             1277:          70 Load 73(inF0)
             1278:          70 ExtInst 1(GLSL.std.450) 17(Acos) 1277
             1280:          70 Load 73(inF0)
-            1281:        1271 FOrdNotEqual 1280 141
+            1281:        1271 FUnordNotEqual 1280 141
             1282:   137(bool) Any 1281
                               Store 1279(r003) 1282
             1284:          70 Load 73(inF0)
@@ -8039,7 +8039,7 @@
       1624(r044):     79(ptr) Variable Function
       1629(r046):     79(ptr) Variable Function
             1452:          78 Load 81(inF0)
-            1454:        1453 FOrdNotEqual 1452 141
+            1454:        1453 FUnordNotEqual 1452 141
             1455:   137(bool) All 1454
                               Store 1451(r000) 1455
             1457:          78 Load 81(inF0)
@@ -8048,7 +8048,7 @@
             1459:          78 Load 81(inF0)
             1460:          78 ExtInst 1(GLSL.std.450) 17(Acos) 1459
             1462:          78 Load 81(inF0)
-            1463:        1453 FOrdNotEqual 1462 141
+            1463:        1453 FUnordNotEqual 1462 141
             1464:   137(bool) Any 1463
                               Store 1461(r003) 1464
             1466:          78 Load 81(inF0)
diff --git a/Test/baseResults/hlsl.intrinsics.vert.out b/Test/baseResults/hlsl.intrinsics.vert.out
index d1117ea..8038c09 100644
--- a/Test/baseResults/hlsl.intrinsics.vert.out
+++ b/Test/baseResults/hlsl.intrinsics.vert.out
@@ -3004,14 +3004,14 @@
         15(inU1):      9(ptr) FunctionParameter
               17:             Label
              131:    6(float) Load 11(inF0)
-             134:   132(bool) FOrdNotEqual 131 133
+             134:   132(bool) FUnordNotEqual 131 133
              135:   132(bool) All 134
              136:    6(float) Load 11(inF0)
              137:    6(float) ExtInst 1(GLSL.std.450) 4(FAbs) 136
              138:    6(float) Load 11(inF0)
              139:    6(float) ExtInst 1(GLSL.std.450) 17(Acos) 138
              140:    6(float) Load 11(inF0)
-             141:   132(bool) FOrdNotEqual 140 133
+             141:   132(bool) FUnordNotEqual 140 133
              142:   132(bool) Any 141
              143:    6(float) Load 11(inF0)
              144:    6(float) ExtInst 1(GLSL.std.450) 16(Asin) 143
@@ -3132,14 +3132,14 @@
         33(inU1):     27(ptr) FunctionParameter
               35:             Label
              252:   24(fvec2) Load 29(inF0)
-             255:  253(bvec2) FOrdNotEqual 252 254
+             255:  253(bvec2) FUnordNotEqual 252 254
              256:   132(bool) All 255
              257:   24(fvec2) Load 29(inF0)
              258:   24(fvec2) ExtInst 1(GLSL.std.450) 4(FAbs) 257
              259:   24(fvec2) Load 29(inF0)
              260:   24(fvec2) ExtInst 1(GLSL.std.450) 17(Acos) 259
              261:   24(fvec2) Load 29(inF0)
-             262:  253(bvec2) FOrdNotEqual 261 254
+             262:  253(bvec2) FUnordNotEqual 261 254
              263:   132(bool) Any 262
              264:   24(fvec2) Load 29(inF0)
              265:   24(fvec2) ExtInst 1(GLSL.std.450) 16(Asin) 264
@@ -3275,14 +3275,14 @@
         45(inU1):     39(ptr) FunctionParameter
               47:             Label
              395:   36(fvec3) Load 41(inF0)
-             398:  396(bvec3) FOrdNotEqual 395 397
+             398:  396(bvec3) FUnordNotEqual 395 397
              399:   132(bool) All 398
              400:   36(fvec3) Load 41(inF0)
              401:   36(fvec3) ExtInst 1(GLSL.std.450) 4(FAbs) 400
              402:   36(fvec3) Load 41(inF0)
              403:   36(fvec3) ExtInst 1(GLSL.std.450) 17(Acos) 402
              404:   36(fvec3) Load 41(inF0)
-             405:  396(bvec3) FOrdNotEqual 404 397
+             405:  396(bvec3) FUnordNotEqual 404 397
              406:   132(bool) Any 405
              407:   36(fvec3) Load 41(inF0)
              408:   36(fvec3) ExtInst 1(GLSL.std.450) 16(Asin) 407
@@ -3421,14 +3421,14 @@
         57(inU1):     51(ptr) FunctionParameter
               59:             Label
              540:   48(fvec4) Load 53(inF0)
-             543:  541(bvec4) FOrdNotEqual 540 542
+             543:  541(bvec4) FUnordNotEqual 540 542
              544:   132(bool) All 543
              545:   48(fvec4) Load 53(inF0)
              546:   48(fvec4) ExtInst 1(GLSL.std.450) 4(FAbs) 545
              547:   48(fvec4) Load 53(inF0)
              548:   48(fvec4) ExtInst 1(GLSL.std.450) 17(Acos) 547
              549:   48(fvec4) Load 53(inF0)
-             550:  541(bvec4) FOrdNotEqual 549 542
+             550:  541(bvec4) FUnordNotEqual 549 542
              551:   132(bool) Any 550
              552:   48(fvec4) Load 53(inF0)
              553:   48(fvec4) ExtInst 1(GLSL.std.450) 16(Asin) 552
@@ -3572,14 +3572,14 @@
         65(inF2):     61(ptr) FunctionParameter
               67:             Label
              695:          60 Load 63(inF0)
-             697:         696 FOrdNotEqual 695 133
+             697:         696 FUnordNotEqual 695 133
              698:   132(bool) All 697
              699:          60 Load 63(inF0)
              700:          60 ExtInst 1(GLSL.std.450) 4(FAbs) 699
              701:          60 Load 63(inF0)
              702:          60 ExtInst 1(GLSL.std.450) 17(Acos) 701
              703:          60 Load 63(inF0)
-             704:         696 FOrdNotEqual 703 133
+             704:         696 FUnordNotEqual 703 133
              705:   132(bool) Any 704
              706:          60 Load 63(inF0)
              707:          60 ExtInst 1(GLSL.std.450) 16(Asin) 706
@@ -3691,14 +3691,14 @@
         73(inF2):     69(ptr) FunctionParameter
               75:             Label
              810:          68 Load 71(inF0)
-             812:         811 FOrdNotEqual 810 133
+             812:         811 FUnordNotEqual 810 133
              813:   132(bool) All 812
              814:          68 Load 71(inF0)
              815:          68 ExtInst 1(GLSL.std.450) 4(FAbs) 814
              816:          68 Load 71(inF0)
              817:          68 ExtInst 1(GLSL.std.450) 17(Acos) 816
              818:          68 Load 71(inF0)
-             819:         811 FOrdNotEqual 818 133
+             819:         811 FUnordNotEqual 818 133
              820:   132(bool) Any 819
              821:          68 Load 71(inF0)
              822:          68 ExtInst 1(GLSL.std.450) 16(Asin) 821
@@ -3813,14 +3813,14 @@
         81(inF2):     77(ptr) FunctionParameter
               83:             Label
              928:          76 Load 79(inF0)
-             930:         929 FOrdNotEqual 928 133
+             930:         929 FUnordNotEqual 928 133
              931:   132(bool) All 930
              932:          76 Load 79(inF0)
              933:          76 ExtInst 1(GLSL.std.450) 4(FAbs) 932
              934:          76 Load 79(inF0)
              935:          76 ExtInst 1(GLSL.std.450) 17(Acos) 934
              936:          76 Load 79(inF0)
-             937:         929 FOrdNotEqual 936 133
+             937:         929 FUnordNotEqual 936 133
              938:   132(bool) Any 937
              939:          76 Load 79(inF0)
              940:          76 ExtInst 1(GLSL.std.450) 16(Asin) 939
diff --git a/Test/baseResults/hlsl.logical.binary.frag.out b/Test/baseResults/hlsl.logical.binary.frag.out
index 4d5cd1f..8a58b8c 100644
--- a/Test/baseResults/hlsl.logical.binary.frag.out
+++ b/Test/baseResults/hlsl.logical.binary.frag.out
@@ -193,7 +193,7 @@
               24:    21(bool) INotEqual 20 23
               27:     26(ptr) AccessChain 16 25
               28:    6(float) Load 27
-              30:    21(bool) FOrdNotEqual 28 29
+              30:    21(bool) FUnordNotEqual 28 29
               31:    21(bool) LogicalAnd 24 30
                               SelectionMerge 33 None
                               BranchConditional 31 32 33
@@ -205,7 +205,7 @@
               36:    21(bool) INotEqual 35 23
               37:     26(ptr) AccessChain 16 25
               38:    6(float) Load 37
-              39:    21(bool) FOrdNotEqual 38 29
+              39:    21(bool) FUnordNotEqual 38 29
               40:    21(bool) LogicalOr 36 39
                               SelectionMerge 42 None
                               BranchConditional 40 41 42
diff --git a/Test/baseResults/hlsl.logical.unary.frag.out b/Test/baseResults/hlsl.logical.unary.frag.out
index 37d8881..f4cca39 100644
--- a/Test/baseResults/hlsl.logical.unary.frag.out
+++ b/Test/baseResults/hlsl.logical.unary.frag.out
@@ -266,11 +266,11 @@
               34:   30(bvec4) LogicalNot 33
               37:     36(ptr) AccessChain 16 35
               38:    6(float) Load 37
-              40:    21(bool) FOrdNotEqual 38 39
+              40:    21(bool) FUnordNotEqual 38 39
               41:    21(bool) LogicalNot 40
               44:     43(ptr) AccessChain 16 42
               45:    7(fvec4) Load 44
-              47:   30(bvec4) FOrdNotEqual 45 46
+              47:   30(bvec4) FUnordNotEqual 45 46
               48:   30(bvec4) LogicalNot 47
               49:     18(ptr) AccessChain 16 17
               50:     12(int) Load 49
@@ -282,7 +282,7 @@
               53:             Label
               54:     36(ptr) AccessChain 16 35
               55:    6(float) Load 54
-              56:    21(bool) FOrdNotEqual 55 39
+              56:    21(bool) FUnordNotEqual 55 39
                               SelectionMerge 58 None
                               BranchConditional 56 57 58
               57:               Label
@@ -299,7 +299,7 @@
               64:             Label
               65:     36(ptr) AccessChain 16 35
               66:    6(float) Load 65
-              67:    21(bool) FOrdNotEqual 66 39
+              67:    21(bool) FUnordNotEqual 66 39
               68:    21(bool) LogicalNot 67
                               SelectionMerge 70 None
                               BranchConditional 68 69 70
diff --git a/Test/baseResults/hlsl.overload.frag.out b/Test/baseResults/hlsl.overload.frag.out
index b0a064d..bfa6b84 100644
--- a/Test/baseResults/hlsl.overload.frag.out
+++ b/Test/baseResults/hlsl.overload.frag.out
@@ -1457,7 +1457,7 @@
                               Store 330(param) 331
              332:           2 FunctionCall 68(foo3(b1;) 330(param)
              333:6(float64_t) Load 155(d)
-             335:     8(bool) FOrdNotEqual 333 334
+             335:     8(bool) FUnordNotEqual 333 334
                               Store 336(param) 335
              337:           2 FunctionCall 68(foo3(b1;) 336(param)
              338:     15(int) Load 167(u)
@@ -1469,7 +1469,7 @@
                               Store 345(param) 344
              346:           2 FunctionCall 68(foo3(b1;) 345(param)
              347:   29(float) Load 179(f)
-             349:     8(bool) FOrdNotEqual 347 348
+             349:     8(bool) FUnordNotEqual 347 348
                               Store 350(param) 349
              351:           2 FunctionCall 68(foo3(b1;) 350(param)
              352:     8(bool) Load 156(b)
diff --git a/Test/baseResults/hlsl.promotions.frag.out b/Test/baseResults/hlsl.promotions.frag.out
index 67397c1..6ed0232 100644
--- a/Test/baseResults/hlsl.promotions.frag.out
+++ b/Test/baseResults/hlsl.promotions.frag.out
@@ -1979,11 +1979,11 @@
               89:             Label
              251:    182(ptr) AccessChain 113 181
              252:    7(fvec3) Load 251
-             253:   28(bvec3) FOrdNotEqual 252 142
+             253:   28(bvec3) FUnordNotEqual 252 142
                               Store 87(p) 253
              254:    182(ptr) AccessChain 113 181
              255:    7(fvec3) Load 254
-             256:   28(bvec3) FOrdNotEqual 255 142
+             256:   28(bvec3) FUnordNotEqual 255 142
                               ReturnValue 256
                               FunctionEnd
 91(Fn_R_B3D(vb3;):   28(bvec3) Function None 80
@@ -1991,11 +1991,11 @@
               92:             Label
              259:    152(ptr) AccessChain 113 151
              260: 35(f64vec3) Load 259
-             263:   28(bvec3) FOrdNotEqual 260 262
+             263:   28(bvec3) FUnordNotEqual 260 262
                               Store 90(p) 263
              264:    152(ptr) AccessChain 113 151
              265: 35(f64vec3) Load 264
-             266:   28(bvec3) FOrdNotEqual 265 262
+             266:   28(bvec3) FUnordNotEqual 265 262
                               ReturnValue 266
                               FunctionEnd
 95(Fn_R_D3I(vd3;): 35(f64vec3) Function None 93
@@ -2135,11 +2135,11 @@
                               Store 360(r31) 363
              365:    182(ptr) AccessChain 113 181
              366:    7(fvec3) Load 365
-             367:   28(bvec3) FOrdNotEqual 366 142
+             367:   28(bvec3) FUnordNotEqual 366 142
                               Store 364(r32) 367
              369:    152(ptr) AccessChain 113 151
              370: 35(f64vec3) Load 369
-             371:   28(bvec3) FOrdNotEqual 370 262
+             371:   28(bvec3) FUnordNotEqual 370 262
                               Store 368(r33) 371
              373:    115(ptr) AccessChain 113 114
              374:   14(ivec3) Load 373
diff --git a/Test/baseResults/hlsl.shapeConv.frag.out b/Test/baseResults/hlsl.shapeConv.frag.out
index 79ca3f9..f447f64 100644
--- a/Test/baseResults/hlsl.shapeConv.frag.out
+++ b/Test/baseResults/hlsl.shapeConv.frag.out
@@ -432,7 +432,7 @@
               65:    6(float) Load 12(f)
               66:    7(fvec4) CompositeConstruct 65 65 65 65
               67:    7(fvec4) Load 15(v)
-              68:   62(bvec4) FOrdNotEqual 66 67
+              68:   62(bvec4) FUnordNotEqual 66 67
               69:    41(bool) Any 68
               71:    6(float) Load 70(f1)
               72:    7(fvec4) CompositeConstruct 71 71 71 71
diff --git a/Test/baseResults/hlsl.type.identifier.frag.out b/Test/baseResults/hlsl.type.identifier.frag.out
index 3f08c6c..add0c5f 100644
--- a/Test/baseResults/hlsl.type.identifier.frag.out
+++ b/Test/baseResults/hlsl.type.identifier.frag.out
@@ -372,9 +372,9 @@
      89(half2x3):     88(ptr) Variable Function
                               Store 19(float) 20
               27:    6(float) Load 19(float)
-              29:    21(bool) FOrdNotEqual 27 28
+              29:    21(bool) FUnordNotEqual 27 28
               30:    6(float) Load 19(float)
-              31:    21(bool) FOrdNotEqual 30 28
+              31:    21(bool) FUnordNotEqual 30 28
               32:          24 CompositeConstruct 29 31
                               Store 26(bool) 32
               38:     37(ptr) AccessChain 26(bool) 36
diff --git a/Test/baseResults/hlsl.whileLoop.frag.out b/Test/baseResults/hlsl.whileLoop.frag.out
index d84746e..33a2533 100644
--- a/Test/baseResults/hlsl.whileLoop.frag.out
+++ b/Test/baseResults/hlsl.whileLoop.frag.out
@@ -149,7 +149,7 @@
               17:             Label
               18:    7(fvec4) Load 10(input)
               19:    7(fvec4) Load 10(input)
-              22:   21(bvec4) FOrdNotEqual 18 19
+              22:   21(bvec4) FUnordNotEqual 18 19
               23:    20(bool) Any 22
                               BranchConditional 23 14 15
               14:               Label
diff --git a/Test/baseResults/spv.300layout.vert.out b/Test/baseResults/spv.300layout.vert.out
index 0e65557..fb68ee7 100644
--- a/Test/baseResults/spv.300layout.vert.out
+++ b/Test/baseResults/spv.300layout.vert.out
@@ -224,7 +224,7 @@
                               Store 136 134
              139:    138(ptr) AccessChain 47 102 24
              140:   14(fvec3) Load 139
-             144:  143(bvec3) FOrdNotEqual 140 142
+             144:  143(bvec3) FUnordNotEqual 140 142
              145:   137(bool) Any 144
              146:   137(bool) LogicalNot 145
                               SelectionMerge 148 None
diff --git a/Test/baseResults/spv.300layoutp.vert.out b/Test/baseResults/spv.300layoutp.vert.out
index 2342527..141d34c 100644
--- a/Test/baseResults/spv.300layoutp.vert.out
+++ b/Test/baseResults/spv.300layoutp.vert.out
@@ -176,7 +176,7 @@
                               Store 88 86
               91:     90(ptr) AccessChain 35 54 24
               92:   14(fvec3) Load 91
-              96:   95(bvec3) FOrdNotEqual 92 94
+              96:   95(bvec3) FUnordNotEqual 92 94
               97:    89(bool) Any 96
               98:    89(bool) LogicalNot 97
                               SelectionMerge 100 None
diff --git a/Test/baseResults/spv.Operations.frag.out b/Test/baseResults/spv.Operations.frag.out
index ec31b75..273d8c2 100644
--- a/Test/baseResults/spv.Operations.frag.out
+++ b/Test/baseResults/spv.Operations.frag.out
@@ -681,9 +681,9 @@
              502:               Label
              504:    6(float)   Load 196(f)
              505:    6(float)   Load 220(uf)
-             506:   186(bool)   FOrdNotEqual 504 505
+             506:   186(bool)   FUnordNotEqual 504 505
              507:    6(float)   Load 196(f)
-             509:   186(bool)   FOrdNotEqual 507 508
+             509:   186(bool)   FUnordNotEqual 507 508
              510:   186(bool)   LogicalAnd 506 509
                                 Branch 503
              503:             Label
diff --git a/Test/baseResults/spv.aggOps.frag.out b/Test/baseResults/spv.aggOps.frag.out
index 49a0742..ab8843e 100644
--- a/Test/baseResults/spv.aggOps.frag.out
+++ b/Test/baseResults/spv.aggOps.frag.out
@@ -208,7 +208,7 @@
              116:             Label
              120:   14(fvec4) Load 16(u)
              121:   14(fvec4) Load 93(v)
-             122:  112(bvec4) FOrdNotEqual 120 121
+             122:  112(bvec4) FUnordNotEqual 120 121
              123:    72(bool) Any 122
                               SelectionMerge 125 None
                               BranchConditional 123 124 125
@@ -279,7 +279,7 @@
              182:    72(bool) INotEqual 180 181
              183:    7(float) CompositeExtract 178 1
              184:    7(float) CompositeExtract 179 1
-             185:    72(bool) FOrdNotEqual 183 184
+             185:    72(bool) FUnordNotEqual 183 184
              186:    72(bool) LogicalOr 182 185
              187:       8(s1) CompositeExtract 176 1
              188:       8(s1) CompositeExtract 177 1
@@ -288,7 +288,7 @@
              191:    72(bool) INotEqual 189 190
              192:    7(float) CompositeExtract 187 1
              193:    7(float) CompositeExtract 188 1
-             194:    72(bool) FOrdNotEqual 192 193
+             194:    72(bool) FUnordNotEqual 192 193
              195:    72(bool) LogicalOr 191 194
              196:    72(bool) LogicalOr 186 195
              197:       8(s1) CompositeExtract 176 2
@@ -298,7 +298,7 @@
              201:    72(bool) INotEqual 199 200
              202:    7(float) CompositeExtract 197 1
              203:    7(float) CompositeExtract 198 1
-             204:    72(bool) FOrdNotEqual 202 203
+             204:    72(bool) FUnordNotEqual 202 203
              205:    72(bool) LogicalOr 201 204
              206:    72(bool) LogicalOr 196 205
                               SelectionMerge 208 None
diff --git a/Test/baseResults/spv.conversion.frag.out b/Test/baseResults/spv.conversion.frag.out
index e352752..7f15e4c 100644
--- a/Test/baseResults/spv.conversion.frag.out
+++ b/Test/baseResults/spv.conversion.frag.out
@@ -171,19 +171,19 @@
               12:      9(int) Load 11(u_i)
               15:     6(bool) INotEqual 12 14
               19:   16(float) Load 18(u_f)
-              21:     6(bool) FOrdNotEqual 19 20
+              21:     6(bool) FUnordNotEqual 19 20
               22:     6(bool) LogicalNotEqual 15 21
                               Store 8(b) 22
               26:      9(int) Load 11(u_i)
               27:     6(bool) INotEqual 26 14
               28:   16(float) Load 18(u_f)
-              29:     6(bool) FOrdNotEqual 28 20
+              29:     6(bool) FUnordNotEqual 28 20
               30:   23(bvec2) CompositeConstruct 27 29
                               Store 25(b2) 30
               34:      9(int) Load 11(u_i)
               35:     6(bool) INotEqual 34 14
               36:   16(float) Load 18(u_f)
-              37:     6(bool) FOrdNotEqual 36 20
+              37:     6(bool) FUnordNotEqual 36 20
               40:      9(int) Load 39(i_i)
               41:     6(bool) INotEqual 40 14
               42:   31(bvec3) CompositeConstruct 35 37 41
@@ -191,11 +191,11 @@
               46:      9(int) Load 11(u_i)
               47:     6(bool) INotEqual 46 14
               48:   16(float) Load 18(u_f)
-              49:     6(bool) FOrdNotEqual 48 20
+              49:     6(bool) FUnordNotEqual 48 20
               50:      9(int) Load 39(i_i)
               51:     6(bool) INotEqual 50 14
               54:   16(float) Load 53(i_f)
-              55:     6(bool) FOrdNotEqual 54 20
+              55:     6(bool) FUnordNotEqual 54 20
               56:   43(bvec4) CompositeConstruct 47 49 51 55
                               Store 45(b4) 56
               59:   16(float) Load 18(u_f)
@@ -273,7 +273,7 @@
              164:   95(fvec4) FAdd 163 162
                               Store 118(f4) 164
              165:   95(fvec4) Load 97(u_f4)
-             166:   43(bvec4) FOrdNotEqual 165 150
+             166:   43(bvec4) FUnordNotEqual 165 150
              167:   95(fvec4) Select 166 151 150
              168:   95(fvec4) Load 118(f4)
              169:   95(fvec4) FAdd 168 167
@@ -417,7 +417,7 @@
              289:   79(ivec3)   Load 81(i3)
              290:   82(fvec3)   ConvertSToF 289
              291:   82(fvec3)   Load 114(f3)
-             292:   31(bvec3)   FOrdNotEqual 290 291
+             292:   31(bvec3)   FUnordNotEqual 290 291
              293:     6(bool)   Any 292
                                 Branch 288
              288:             Label
diff --git a/Test/baseResults/spv.float16.frag.out b/Test/baseResults/spv.float16.frag.out
index e2596aa..08710f4 100644
--- a/Test/baseResults/spv.float16.frag.out
+++ b/Test/baseResults/spv.float16.frag.out
@@ -340,7 +340,7 @@
              112:     35(ptr) AccessChain 42(f16v) 34
              113:28(float16_t) Load 112
              114:28(float16_t) Load 87(f16)
-             115:   109(bool) FOrdNotEqual 113 114
+             115:   109(bool) FUnordNotEqual 113 114
                               Store 111(b) 115
              116:     35(ptr) AccessChain 42(f16v) 90
              117:28(float16_t) Load 116
@@ -403,7 +403,7 @@
              161:151(f16vec3) Select 157 160 159
                               Store 153(f16v) 161
              162:151(f16vec3) Load 153(f16v)
-             163:  154(bvec3) FOrdNotEqual 162 159
+             163:  154(bvec3) FUnordNotEqual 162 159
                               Store 156(bv) 163
              168:  165(fvec3) Load 167(fv)
              169:151(f16vec3) FConvert 168
@@ -780,7 +780,7 @@
                               Store 442(bv) 459
              460:151(f16vec3) Load 443(f16v1)
              461:151(f16vec3) Load 445(f16v2)
-             462:  154(bvec3) FOrdNotEqual 460 461
+             462:  154(bvec3) FUnordNotEqual 460 461
                               Store 442(bv) 462
                               Return
                               FunctionEnd
diff --git a/Test/baseResults/spv.float32.frag.out b/Test/baseResults/spv.float32.frag.out
index 2143d53..4606f83 100644
--- a/Test/baseResults/spv.float32.frag.out
+++ b/Test/baseResults/spv.float32.frag.out
@@ -312,7 +312,7 @@
              110:     33(ptr) AccessChain 40(f32v) 32
              111:   26(float) Load 110
              112:   26(float) Load 85(f32)
-             113:   107(bool) FOrdNotEqual 111 112
+             113:   107(bool) FUnordNotEqual 111 112
                               Store 109(b) 113
              114:     33(ptr) AccessChain 40(f32v) 88
              115:   26(float) Load 114
@@ -382,7 +382,7 @@
              165:  153(fvec3) Select 161 164 163
                               Store 155(f32v) 165
              166:  153(fvec3) Load 155(f32v)
-             167:  158(bvec3) FOrdNotEqual 166 163
+             167:  158(bvec3) FUnordNotEqual 166 163
                               Store 160(bv) 167
              168:150(f64vec3) Load 152(f64v)
              169:  153(fvec3) FConvert 168
@@ -744,7 +744,7 @@
                               Store 448(bv) 465
              466:  153(fvec3) Load 449(f32v1)
              467:  153(fvec3) Load 451(f32v2)
-             468:  158(bvec3) FOrdNotEqual 466 467
+             468:  158(bvec3) FUnordNotEqual 466 467
                               Store 448(bv) 468
                               Return
                               FunctionEnd
diff --git a/Test/baseResults/spv.float64.frag.out b/Test/baseResults/spv.float64.frag.out
index 52d4ee4..c076d00 100644
--- a/Test/baseResults/spv.float64.frag.out
+++ b/Test/baseResults/spv.float64.frag.out
@@ -311,7 +311,7 @@
              110:     33(ptr) AccessChain 40(f64v) 32
              111:26(float64_t) Load 110
              112:26(float64_t) Load 85(f64)
-             113:   107(bool) FOrdNotEqual 111 112
+             113:   107(bool) FUnordNotEqual 111 112
                               Store 109(b) 113
              114:     33(ptr) AccessChain 40(f64v) 88
              115:26(float64_t) Load 114
@@ -377,7 +377,7 @@
              159:149(f64vec3) Select 155 158 157
                               Store 151(f64v) 159
              160:149(f64vec3) Load 151(f64v)
-             161:  152(bvec3) FOrdNotEqual 160 157
+             161:  152(bvec3) FUnordNotEqual 160 157
                               Store 154(bv) 161
              166:163(f16vec3) Load 165(f16v)
              167:149(f64vec3) FConvert 166
@@ -733,7 +733,7 @@
                               Store 438(bv) 455
              456:149(f64vec3) Load 439(f64v1)
              457:149(f64vec3) Load 441(f64v2)
-             458:  152(bvec3) FOrdNotEqual 456 457
+             458:  152(bvec3) FUnordNotEqual 456 457
                               Store 438(bv) 458
                               Return
                               FunctionEnd
diff --git a/Test/baseResults/vulkan.ast.vert.out b/Test/baseResults/vulkan.ast.vert.out
index 74edfb5..8645b35 100644
--- a/Test/baseResults/vulkan.ast.vert.out
+++ b/Test/baseResults/vulkan.ast.vert.out
@@ -306,7 +306,7 @@
               48:             TypeArray 44(fvec2) 41
          4(main):           2 Function None 3
                5:             Label
-              10:     8(bool) FOrdNotEqual 7(scf1) 9
+              10:     8(bool) FUnordNotEqual 7(scf1) 9
               18:    6(float) Select 11(scbt) 17 9
               19:    6(float) ConvertSToF 13(sci2)
               20:     12(int) ConvertFToS 7(scf1)
@@ -315,7 +315,7 @@
               28:    6(float) FAdd 7(scf1) 27
               29:    6(float) FNegate 7(scf1)
               32:     8(bool) FOrdGreaterThan 7(scf1) 7(scf1)
-              34:     8(bool) FOrdNotEqual 7(scf1) 7(scf1)
+              34:     8(bool) FUnordNotEqual 7(scf1) 7(scf1)
               43:          42 CompositeConstruct 39 40
               45:   44(fvec2) CompositeConstruct 7(scf1) 7(scf1)
               46:   44(fvec2) CompositeConstruct 7(scf1) 7(scf1)
diff --git a/Test/baseResults/web.operations.frag.out b/Test/baseResults/web.operations.frag.out
index d7e4d6e..b08480f 100644
--- a/Test/baseResults/web.operations.frag.out
+++ b/Test/baseResults/web.operations.frag.out
@@ -205,21 +205,21 @@
          %70 = OpLoad %mat4v4float %m4
          %72 = OpCompositeExtract %v4float %69 0
          %73 = OpCompositeExtract %v4float %70 0
-         %75 = OpFOrdNotEqual %v4bool %72 %73
+         %75 = OpFUnordNotEqual %v4bool %72 %73
          %76 = OpAny %bool %75
          %77 = OpCompositeExtract %v4float %69 1
          %78 = OpCompositeExtract %v4float %70 1
-         %79 = OpFOrdNotEqual %v4bool %77 %78
+         %79 = OpFUnordNotEqual %v4bool %77 %78
          %80 = OpAny %bool %79
          %81 = OpLogicalOr %bool %76 %80
          %82 = OpCompositeExtract %v4float %69 2
          %83 = OpCompositeExtract %v4float %70 2
-         %84 = OpFOrdNotEqual %v4bool %82 %83
+         %84 = OpFUnordNotEqual %v4bool %82 %83
          %85 = OpAny %bool %84
          %86 = OpLogicalOr %bool %81 %85
          %87 = OpCompositeExtract %v4float %69 3
          %88 = OpCompositeExtract %v4float %70 3
-         %89 = OpFOrdNotEqual %v4bool %87 %88
+         %89 = OpFUnordNotEqual %v4bool %87 %88
          %90 = OpAny %bool %89
          %91 = OpLogicalOr %bool %86 %90
          %92 = OpLoad %mat2v2float %m2